1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/ManagedStatic.h"
35 #include "llvm/Support/MathExtras.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/System/Mutex.h"
38 #include "llvm/ADT/SetVector.h"
39 #include "llvm/ADT/SmallPtrSet.h"
40 #include "llvm/ADT/SmallSet.h"
41 #include "llvm/ADT/SmallVector.h"
42 #include "llvm/ADT/StringExtras.h"
47 /// makeVTList - Return an instance of the SDVTList struct initialized with the
48 /// specified members.
49 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
50 SDVTList Res = {VTs, NumVTs};
54 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
55 switch (VT.getSimpleVT()) {
56 default: assert(0 && "Unknown FP format");
57 case MVT::f32: return &APFloat::IEEEsingle;
58 case MVT::f64: return &APFloat::IEEEdouble;
59 case MVT::f80: return &APFloat::x87DoubleExtended;
60 case MVT::f128: return &APFloat::IEEEquad;
61 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
65 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(MVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // PPC long double cannot be converted to any other type.
84 if (VT == MVT::ppcf128 ||
85 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
88 // convert modifies in place, so make a copy.
89 APFloat Val2 = APFloat(Val);
91 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
96 //===----------------------------------------------------------------------===//
98 //===----------------------------------------------------------------------===//
100 /// isBuildVectorAllOnes - Return true if the specified node is a
101 /// BUILD_VECTOR where all of the elements are ~0 or undef.
102 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
103 // Look through a bit convert.
104 if (N->getOpcode() == ISD::BIT_CONVERT)
105 N = N->getOperand(0).getNode();
107 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
109 unsigned i = 0, e = N->getNumOperands();
111 // Skip over all of the undef values.
112 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
115 // Do not accept an all-undef vector.
116 if (i == e) return false;
118 // Do not accept build_vectors that aren't all constants or which have non-~0
120 SDValue NotZero = N->getOperand(i);
121 if (isa<ConstantSDNode>(NotZero)) {
122 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
124 } else if (isa<ConstantFPSDNode>(NotZero)) {
125 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
126 bitcastToAPInt().isAllOnesValue())
131 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 for (++i; i != e; ++i)
134 if (N->getOperand(i) != NotZero &&
135 N->getOperand(i).getOpcode() != ISD::UNDEF)
141 /// isBuildVectorAllZeros - Return true if the specified node is a
142 /// BUILD_VECTOR where all of the elements are 0 or undef.
143 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
144 // Look through a bit convert.
145 if (N->getOpcode() == ISD::BIT_CONVERT)
146 N = N->getOperand(0).getNode();
148 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
150 unsigned i = 0, e = N->getNumOperands();
152 // Skip over all of the undef values.
153 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
156 // Do not accept an all-undef vector.
157 if (i == e) return false;
159 // Do not accept build_vectors that aren't all constants or which have non-0
161 SDValue Zero = N->getOperand(i);
162 if (isa<ConstantSDNode>(Zero)) {
163 if (!cast<ConstantSDNode>(Zero)->isNullValue())
165 } else if (isa<ConstantFPSDNode>(Zero)) {
166 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
171 // Okay, we have at least one 0 value, check to see if the rest match or are
173 for (++i; i != e; ++i)
174 if (N->getOperand(i) != Zero &&
175 N->getOperand(i).getOpcode() != ISD::UNDEF)
180 /// isScalarToVector - Return true if the specified node is a
181 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
182 /// element is not an undef.
183 bool ISD::isScalarToVector(const SDNode *N) {
184 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
187 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
191 unsigned NumElems = N->getNumOperands();
192 for (unsigned i = 1; i < NumElems; ++i) {
193 SDValue V = N->getOperand(i);
194 if (V.getOpcode() != ISD::UNDEF)
201 /// isDebugLabel - Return true if the specified node represents a debug
202 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
203 bool ISD::isDebugLabel(const SDNode *N) {
205 if (N->getOpcode() == ISD::DBG_LABEL)
207 if (N->isMachineOpcode() &&
208 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
213 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
214 /// when given the operation for (X op Y).
215 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
216 // To perform this operation, we just need to swap the L and G bits of the
218 unsigned OldL = (Operation >> 2) & 1;
219 unsigned OldG = (Operation >> 1) & 1;
220 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
221 (OldL << 1) | // New G bit
222 (OldG << 2)); // New L bit.
225 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
226 /// 'op' is a valid SetCC operation.
227 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
228 unsigned Operation = Op;
230 Operation ^= 7; // Flip L, G, E bits, but not U.
232 Operation ^= 15; // Flip all of the condition bits.
234 if (Operation > ISD::SETTRUE2)
235 Operation &= ~8; // Don't let N and U bits get set.
237 return ISD::CondCode(Operation);
241 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
242 /// signed operation and 2 if the result is an unsigned comparison. Return zero
243 /// if the operation does not depend on the sign of the input (setne and seteq).
244 static int isSignedOp(ISD::CondCode Opcode) {
246 default: assert(0 && "Illegal integer setcc operation!");
248 case ISD::SETNE: return 0;
252 case ISD::SETGE: return 1;
256 case ISD::SETUGE: return 2;
260 /// getSetCCOrOperation - Return the result of a logical OR between different
261 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
262 /// returns SETCC_INVALID if it is not possible to represent the resultant
264 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
266 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
267 // Cannot fold a signed integer setcc with an unsigned integer setcc.
268 return ISD::SETCC_INVALID;
270 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
272 // If the N and U bits get set then the resultant comparison DOES suddenly
273 // care about orderedness, and is true when ordered.
274 if (Op > ISD::SETTRUE2)
275 Op &= ~16; // Clear the U bit if the N bit is set.
277 // Canonicalize illegal integer setcc's.
278 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
281 return ISD::CondCode(Op);
284 /// getSetCCAndOperation - Return the result of a logical AND between different
285 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
286 /// function returns zero if it is not possible to represent the resultant
288 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
290 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
291 // Cannot fold a signed setcc with an unsigned setcc.
292 return ISD::SETCC_INVALID;
294 // Combine all of the condition bits.
295 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
297 // Canonicalize illegal integer setcc's.
301 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
302 case ISD::SETOEQ: // SETEQ & SETU[LG]E
303 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
304 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
305 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
312 const TargetMachine &SelectionDAG::getTarget() const {
313 return MF->getTarget();
316 //===----------------------------------------------------------------------===//
317 // SDNode Profile Support
318 //===----------------------------------------------------------------------===//
320 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
322 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
326 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
327 /// solely with their pointer.
328 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
329 ID.AddPointer(VTList.VTs);
332 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
334 static void AddNodeIDOperands(FoldingSetNodeID &ID,
335 const SDValue *Ops, unsigned NumOps) {
336 for (; NumOps; --NumOps, ++Ops) {
337 ID.AddPointer(Ops->getNode());
338 ID.AddInteger(Ops->getResNo());
342 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
344 static void AddNodeIDOperands(FoldingSetNodeID &ID,
345 const SDUse *Ops, unsigned NumOps) {
346 for (; NumOps; --NumOps, ++Ops) {
347 ID.AddPointer(Ops->getNode());
348 ID.AddInteger(Ops->getResNo());
352 static void AddNodeIDNode(FoldingSetNodeID &ID,
353 unsigned short OpC, SDVTList VTList,
354 const SDValue *OpList, unsigned N) {
355 AddNodeIDOpcode(ID, OpC);
356 AddNodeIDValueTypes(ID, VTList);
357 AddNodeIDOperands(ID, OpList, N);
360 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
362 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
363 switch (N->getOpcode()) {
364 case ISD::TargetExternalSymbol:
365 case ISD::ExternalSymbol:
366 assert(0 && "Should only be used on nodes with operands");
367 default: break; // Normal nodes don't need extra info.
369 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
371 case ISD::TargetConstant:
373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
375 case ISD::TargetConstantFP:
376 case ISD::ConstantFP: {
377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
380 case ISD::TargetGlobalAddress:
381 case ISD::GlobalAddress:
382 case ISD::TargetGlobalTLSAddress:
383 case ISD::GlobalTLSAddress: {
384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
385 ID.AddPointer(GA->getGlobal());
386 ID.AddInteger(GA->getOffset());
387 ID.AddInteger(GA->getTargetFlags());
390 case ISD::BasicBlock:
391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
396 case ISD::DBG_STOPPOINT: {
397 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
398 ID.AddInteger(DSP->getLine());
399 ID.AddInteger(DSP->getColumn());
400 ID.AddPointer(DSP->getCompileUnit());
404 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
406 case ISD::MEMOPERAND: {
407 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
411 case ISD::FrameIndex:
412 case ISD::TargetFrameIndex:
413 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
416 case ISD::TargetJumpTable:
417 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
418 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
420 case ISD::ConstantPool:
421 case ISD::TargetConstantPool: {
422 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
423 ID.AddInteger(CP->getAlignment());
424 ID.AddInteger(CP->getOffset());
425 if (CP->isMachineConstantPoolEntry())
426 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
428 ID.AddPointer(CP->getConstVal());
429 ID.AddInteger(CP->getTargetFlags());
433 const CallSDNode *Call = cast<CallSDNode>(N);
434 ID.AddInteger(Call->getCallingConv());
435 ID.AddInteger(Call->isVarArg());
439 const LoadSDNode *LD = cast<LoadSDNode>(N);
440 ID.AddInteger(LD->getMemoryVT().getRawBits());
441 ID.AddInteger(LD->getRawSubclassData());
445 const StoreSDNode *ST = cast<StoreSDNode>(N);
446 ID.AddInteger(ST->getMemoryVT().getRawBits());
447 ID.AddInteger(ST->getRawSubclassData());
450 case ISD::ATOMIC_CMP_SWAP:
451 case ISD::ATOMIC_SWAP:
452 case ISD::ATOMIC_LOAD_ADD:
453 case ISD::ATOMIC_LOAD_SUB:
454 case ISD::ATOMIC_LOAD_AND:
455 case ISD::ATOMIC_LOAD_OR:
456 case ISD::ATOMIC_LOAD_XOR:
457 case ISD::ATOMIC_LOAD_NAND:
458 case ISD::ATOMIC_LOAD_MIN:
459 case ISD::ATOMIC_LOAD_MAX:
460 case ISD::ATOMIC_LOAD_UMIN:
461 case ISD::ATOMIC_LOAD_UMAX: {
462 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
463 ID.AddInteger(AT->getMemoryVT().getRawBits());
464 ID.AddInteger(AT->getRawSubclassData());
467 case ISD::VECTOR_SHUFFLE: {
468 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
469 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
471 ID.AddInteger(SVN->getMaskElt(i));
474 } // end switch (N->getOpcode())
477 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
479 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
480 AddNodeIDOpcode(ID, N->getOpcode());
481 // Add the return value info.
482 AddNodeIDValueTypes(ID, N->getVTList());
483 // Add the operand info.
484 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
486 // Handle SDNode leafs with special info.
487 AddNodeIDCustom(ID, N);
490 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
491 /// the CSE map that carries alignment, volatility, indexing mode, and
492 /// extension/truncation information.
494 static inline unsigned
495 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
496 bool isVolatile, unsigned Alignment) {
497 assert((ConvType & 3) == ConvType &&
498 "ConvType may not require more than 2 bits!");
499 assert((AM & 7) == AM &&
500 "AM may not require more than 3 bits!");
504 ((Log2_32(Alignment) + 1) << 6);
507 //===----------------------------------------------------------------------===//
508 // SelectionDAG Class
509 //===----------------------------------------------------------------------===//
511 /// doNotCSE - Return true if CSE should not be performed for this node.
512 static bool doNotCSE(SDNode *N) {
513 if (N->getValueType(0) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
516 switch (N->getOpcode()) {
518 case ISD::HANDLENODE:
520 case ISD::DBG_STOPPOINT:
523 return true; // Never CSE these nodes.
526 // Check that remaining values produced are not flags.
527 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
528 if (N->getValueType(i) == MVT::Flag)
529 return true; // Never CSE anything that produces a flag.
534 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
536 void SelectionDAG::RemoveDeadNodes() {
537 // Create a dummy node (which is not added to allnodes), that adds a reference
538 // to the root node, preventing it from being deleted.
539 HandleSDNode Dummy(getRoot());
541 SmallVector<SDNode*, 128> DeadNodes;
543 // Add all obviously-dead nodes to the DeadNodes worklist.
544 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
546 DeadNodes.push_back(I);
548 RemoveDeadNodes(DeadNodes);
550 // If the root changed (e.g. it was a dead load, update the root).
551 setRoot(Dummy.getValue());
554 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
555 /// given list, and any nodes that become unreachable as a result.
556 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
557 DAGUpdateListener *UpdateListener) {
559 // Process the worklist, deleting the nodes and adding their uses to the
561 while (!DeadNodes.empty()) {
562 SDNode *N = DeadNodes.pop_back_val();
565 UpdateListener->NodeDeleted(N, 0);
567 // Take the node out of the appropriate CSE map.
568 RemoveNodeFromCSEMaps(N);
570 // Next, brutally remove the operand list. This is safe to do, as there are
571 // no cycles in the graph.
572 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
574 SDNode *Operand = Use.getNode();
577 // Now that we removed this operand, see if there are no uses of it left.
578 if (Operand->use_empty())
579 DeadNodes.push_back(Operand);
586 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
587 SmallVector<SDNode*, 16> DeadNodes(1, N);
588 RemoveDeadNodes(DeadNodes, UpdateListener);
591 void SelectionDAG::DeleteNode(SDNode *N) {
592 // First take this out of the appropriate CSE map.
593 RemoveNodeFromCSEMaps(N);
595 // Finally, remove uses due to operands of this node, remove from the
596 // AllNodes list, and delete the node.
597 DeleteNodeNotInCSEMaps(N);
600 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
601 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
602 assert(N->use_empty() && "Cannot delete a node that is not dead!");
604 // Drop all of the operands and decrement used node's use counts.
610 void SelectionDAG::DeallocateNode(SDNode *N) {
611 if (N->OperandsNeedDelete)
612 delete[] N->OperandList;
614 // Set the opcode to DELETED_NODE to help catch bugs when node
615 // memory is reallocated.
616 N->NodeType = ISD::DELETED_NODE;
618 NodeAllocator.Deallocate(AllNodes.remove(N));
621 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
622 /// correspond to it. This is useful when we're about to delete or repurpose
623 /// the node. We don't want future request for structurally identical nodes
624 /// to return N anymore.
625 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
627 switch (N->getOpcode()) {
628 case ISD::EntryToken:
629 assert(0 && "EntryToken should not be in CSEMaps!");
631 case ISD::HANDLENODE: return false; // noop.
633 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
634 "Cond code doesn't exist!");
635 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
636 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
638 case ISD::ExternalSymbol:
639 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
641 case ISD::TargetExternalSymbol: {
642 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
643 Erased = TargetExternalSymbols.erase(
644 std::pair<std::string,unsigned char>(ESN->getSymbol(),
645 ESN->getTargetFlags()));
648 case ISD::VALUETYPE: {
649 MVT VT = cast<VTSDNode>(N)->getVT();
650 if (VT.isExtended()) {
651 Erased = ExtendedValueTypeNodes.erase(VT);
653 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
654 ValueTypeNodes[VT.getSimpleVT()] = 0;
659 // Remove it from the CSE Map.
660 Erased = CSEMap.RemoveNode(N);
664 // Verify that the node was actually in one of the CSE maps, unless it has a
665 // flag result (which cannot be CSE'd) or is one of the special cases that are
666 // not subject to CSE.
667 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
668 !N->isMachineOpcode() && !doNotCSE(N)) {
671 assert(0 && "Node is not in map!");
677 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
678 /// maps and modified in place. Add it back to the CSE maps, unless an identical
679 /// node already exists, in which case transfer all its users to the existing
680 /// node. This transfer can potentially trigger recursive merging.
683 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
684 DAGUpdateListener *UpdateListener) {
685 // For node types that aren't CSE'd, just act as if no identical node
688 SDNode *Existing = CSEMap.GetOrInsertNode(N);
690 // If there was already an existing matching node, use ReplaceAllUsesWith
691 // to replace the dead one with the existing one. This can cause
692 // recursive merging of other unrelated nodes down the line.
693 ReplaceAllUsesWith(N, Existing, UpdateListener);
695 // N is now dead. Inform the listener if it exists and delete it.
697 UpdateListener->NodeDeleted(N, Existing);
698 DeleteNodeNotInCSEMaps(N);
703 // If the node doesn't already exist, we updated it. Inform a listener if
706 UpdateListener->NodeUpdated(N);
709 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
710 /// were replaced with those specified. If this node is never memoized,
711 /// return null, otherwise return a pointer to the slot it would take. If a
712 /// node already exists with these operands, the slot will be non-null.
713 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
718 SDValue Ops[] = { Op };
720 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
721 AddNodeIDCustom(ID, N);
722 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 SDValue Op1, SDValue Op2,
735 SDValue Ops[] = { Op1, Op2 };
737 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
738 AddNodeIDCustom(ID, N);
739 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
743 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
744 /// were replaced with those specified. If this node is never memoized,
745 /// return null, otherwise return a pointer to the slot it would take. If a
746 /// node already exists with these operands, the slot will be non-null.
747 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
748 const SDValue *Ops,unsigned NumOps,
754 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
755 AddNodeIDCustom(ID, N);
756 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
759 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
760 void SelectionDAG::VerifyNode(SDNode *N) {
761 switch (N->getOpcode()) {
764 case ISD::BUILD_PAIR: {
765 MVT VT = N->getValueType(0);
766 assert(N->getNumValues() == 1 && "Too many results!");
767 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
768 "Wrong return type!");
769 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
770 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
771 "Mismatched operand types!");
772 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
773 "Wrong operand type!");
774 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
775 "Wrong return type size");
778 case ISD::BUILD_VECTOR: {
779 assert(N->getNumValues() == 1 && "Too many results!");
780 assert(N->getValueType(0).isVector() && "Wrong return type!");
781 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
782 "Wrong number of operands!");
783 MVT EltVT = N->getValueType(0).getVectorElementType();
784 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
785 assert((I->getValueType() == EltVT ||
786 (EltVT.isInteger() && I->getValueType().isInteger() &&
787 EltVT.bitsLE(I->getValueType()))) &&
788 "Wrong operand type!");
794 /// getMVTAlignment - Compute the default alignment value for the
797 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
798 const Type *Ty = VT == MVT::iPTR ?
799 PointerType::get(Type::Int8Ty, 0) :
802 return TLI.getTargetData()->getABITypeAlignment(Ty);
805 // EntryNode could meaningfully have debug info if we can find it...
806 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
807 : TLI(tli), FLI(fli), DW(0),
808 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
809 getVTList(MVT::Other)), Root(getEntryNode()) {
810 AllNodes.push_back(&EntryNode);
813 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
820 SelectionDAG::~SelectionDAG() {
824 void SelectionDAG::allnodes_clear() {
825 assert(&*AllNodes.begin() == &EntryNode);
826 AllNodes.remove(AllNodes.begin());
827 while (!AllNodes.empty())
828 DeallocateNode(AllNodes.begin());
831 void SelectionDAG::clear() {
833 OperandAllocator.Reset();
836 ExtendedValueTypeNodes.clear();
837 ExternalSymbols.clear();
838 TargetExternalSymbols.clear();
839 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
840 static_cast<CondCodeSDNode*>(0));
841 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
842 static_cast<SDNode*>(0));
844 EntryNode.UseList = 0;
845 AllNodes.push_back(&EntryNode);
846 Root = getEntryNode();
849 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
850 if (Op.getValueType() == VT) return Op;
851 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
853 return getNode(ISD::AND, DL, Op.getValueType(), Op,
854 getConstant(Imm, Op.getValueType()));
857 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
859 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
860 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
862 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
863 return getNode(ISD::XOR, DL, VT, Val, NegOne);
866 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
867 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
868 assert((EltVT.getSizeInBits() >= 64 ||
869 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
870 "getConstant with a uint64_t value that doesn't fit in the type!");
871 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
874 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
875 return getConstant(*ConstantInt::get(Val), VT, isT);
878 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
879 assert(VT.isInteger() && "Cannot create FP integer constant!");
881 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
882 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
883 "APInt size does not match type size!");
885 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
887 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
891 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
893 return SDValue(N, 0);
895 N = NodeAllocator.Allocate<ConstantSDNode>();
896 new (N) ConstantSDNode(isT, &Val, EltVT);
897 CSEMap.InsertNode(N, IP);
898 AllNodes.push_back(N);
901 SDValue Result(N, 0);
903 SmallVector<SDValue, 8> Ops;
904 Ops.assign(VT.getVectorNumElements(), Result);
905 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
906 VT, &Ops[0], Ops.size());
911 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
912 return getConstant(Val, TLI.getPointerTy(), isTarget);
916 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
917 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
920 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
921 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
924 VT.isVector() ? VT.getVectorElementType() : VT;
926 // Do the map lookup using the actual bit pattern for the floating point
927 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
928 // we don't have issues with SNANs.
929 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
931 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
935 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
937 return SDValue(N, 0);
939 N = NodeAllocator.Allocate<ConstantFPSDNode>();
940 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
941 CSEMap.InsertNode(N, IP);
942 AllNodes.push_back(N);
945 SDValue Result(N, 0);
947 SmallVector<SDValue, 8> Ops;
948 Ops.assign(VT.getVectorNumElements(), Result);
949 // FIXME DebugLoc info might be appropriate here
950 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
951 VT, &Ops[0], Ops.size());
956 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
958 VT.isVector() ? VT.getVectorElementType() : VT;
960 return getConstantFP(APFloat((float)Val), VT, isTarget);
962 return getConstantFP(APFloat(Val), VT, isTarget);
965 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
966 MVT VT, int64_t Offset,
968 unsigned char TargetFlags) {
969 assert((TargetFlags == 0 || isTargetGA) &&
970 "Cannot set target flags on target-independent globals");
972 // Truncate (with sign-extension) the offset value to the pointer size.
973 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
975 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
977 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
979 // If GV is an alias then use the aliasee for determining thread-localness.
980 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
981 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
985 if (GVar && GVar->isThreadLocal())
986 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
988 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
991 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
993 ID.AddInteger(Offset);
994 ID.AddInteger(TargetFlags);
996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
997 return SDValue(E, 0);
998 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
999 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset, TargetFlags);
1000 CSEMap.InsertNode(N, IP);
1001 AllNodes.push_back(N);
1002 return SDValue(N, 0);
1005 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
1006 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1007 FoldingSetNodeID ID;
1008 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1012 return SDValue(E, 0);
1013 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1014 new (N) FrameIndexSDNode(FI, VT, isTarget);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1017 return SDValue(N, 0);
1020 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget,
1021 unsigned char TargetFlags) {
1022 assert((TargetFlags == 0 || isTarget) &&
1023 "Cannot set target flags on target-independent jump tables");
1024 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1025 FoldingSetNodeID ID;
1026 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1028 ID.AddInteger(TargetFlags);
1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1031 return SDValue(E, 0);
1032 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1033 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1034 CSEMap.InsertNode(N, IP);
1035 AllNodes.push_back(N);
1036 return SDValue(N, 0);
1039 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1040 unsigned Alignment, int Offset,
1042 unsigned char TargetFlags) {
1043 assert((TargetFlags == 0 || isTarget) &&
1044 "Cannot set target flags on target-independent globals");
1046 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1047 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1048 FoldingSetNodeID ID;
1049 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1050 ID.AddInteger(Alignment);
1051 ID.AddInteger(Offset);
1053 ID.AddInteger(TargetFlags);
1055 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1056 return SDValue(E, 0);
1057 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1058 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1059 CSEMap.InsertNode(N, IP);
1060 AllNodes.push_back(N);
1061 return SDValue(N, 0);
1065 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1066 unsigned Alignment, int Offset,
1068 unsigned char TargetFlags) {
1069 assert((TargetFlags == 0 || isTarget) &&
1070 "Cannot set target flags on target-independent globals");
1072 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1073 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1074 FoldingSetNodeID ID;
1075 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1076 ID.AddInteger(Alignment);
1077 ID.AddInteger(Offset);
1078 C->AddSelectionDAGCSEId(ID);
1079 ID.AddInteger(TargetFlags);
1081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1082 return SDValue(E, 0);
1083 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1084 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1085 CSEMap.InsertNode(N, IP);
1086 AllNodes.push_back(N);
1087 return SDValue(N, 0);
1090 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1091 FoldingSetNodeID ID;
1092 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1096 return SDValue(E, 0);
1097 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1098 new (N) BasicBlockSDNode(MBB);
1099 CSEMap.InsertNode(N, IP);
1100 AllNodes.push_back(N);
1101 return SDValue(N, 0);
1104 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1107 ID.AddInteger(Flags.getRawBits());
1109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1110 return SDValue(E, 0);
1111 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1112 new (N) ARG_FLAGSSDNode(Flags);
1113 CSEMap.InsertNode(N, IP);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getValueType(MVT VT) {
1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1120 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1122 SDNode *&N = VT.isExtended() ?
1123 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1125 if (N) return SDValue(N, 0);
1126 N = NodeAllocator.Allocate<VTSDNode>();
1127 new (N) VTSDNode(VT);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1133 SDNode *&N = ExternalSymbols[Sym];
1134 if (N) return SDValue(N, 0);
1135 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1136 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT,
1142 unsigned char TargetFlags) {
1144 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1146 if (N) return SDValue(N, 0);
1147 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1148 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1149 AllNodes.push_back(N);
1150 return SDValue(N, 0);
1153 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1154 if ((unsigned)Cond >= CondCodeNodes.size())
1155 CondCodeNodes.resize(Cond+1);
1157 if (CondCodeNodes[Cond] == 0) {
1158 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1159 new (N) CondCodeSDNode(Cond);
1160 CondCodeNodes[Cond] = N;
1161 AllNodes.push_back(N);
1163 return SDValue(CondCodeNodes[Cond], 0);
1166 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1167 // the shuffle mask M that point at N1 to point at N2, and indices that point
1168 // N2 to point at N1.
1169 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1171 int NElts = M.size();
1172 for (int i = 0; i != NElts; ++i) {
1180 SDValue SelectionDAG::getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1,
1181 SDValue N2, const int *Mask) {
1182 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1183 assert(VT.isVector() && N1.getValueType().isVector() &&
1184 "Vector Shuffle VTs must be a vectors");
1185 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1186 && "Vector Shuffle VTs must have same element type");
1188 // Canonicalize shuffle undef, undef -> undef
1189 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1192 // Validate that all indices in Mask are within the range of the elements
1193 // input to the shuffle.
1194 unsigned NElts = VT.getVectorNumElements();
1195 SmallVector<int, 8> MaskVec;
1196 for (unsigned i = 0; i != NElts; ++i) {
1197 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1198 MaskVec.push_back(Mask[i]);
1201 // Canonicalize shuffle v, v -> v, undef
1204 for (unsigned i = 0; i != NElts; ++i)
1205 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1208 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1209 if (N1.getOpcode() == ISD::UNDEF)
1210 commuteShuffle(N1, N2, MaskVec);
1212 // Canonicalize all index into lhs, -> shuffle lhs, undef
1213 // Canonicalize all index into rhs, -> shuffle rhs, undef
1214 bool AllLHS = true, AllRHS = true;
1215 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1216 for (unsigned i = 0; i != NElts; ++i) {
1217 if (MaskVec[i] >= (int)NElts) {
1222 } else if (MaskVec[i] >= 0) {
1226 if (AllLHS && AllRHS)
1227 return getUNDEF(VT);
1228 if (AllLHS && !N2Undef)
1232 commuteShuffle(N1, N2, MaskVec);
1235 // If Identity shuffle, or all shuffle in to undef, return that node.
1236 bool AllUndef = true;
1237 bool Identity = true;
1238 for (unsigned i = 0; i != NElts; ++i) {
1239 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1240 if (MaskVec[i] >= 0) AllUndef = false;
1245 return getUNDEF(VT);
1247 FoldingSetNodeID ID;
1248 SDValue Ops[2] = { N1, N2 };
1249 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1250 for (unsigned i = 0; i != NElts; ++i)
1251 ID.AddInteger(MaskVec[i]);
1254 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1255 return SDValue(E, 0);
1257 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1258 // SDNode doesn't have access to it. This memory will be "leaked" when
1259 // the node is deallocated, but recovered when the NodeAllocator is released.
1260 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1261 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1263 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1264 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1265 CSEMap.InsertNode(N, IP);
1266 AllNodes.push_back(N);
1267 return SDValue(N, 0);
1270 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1271 SDValue Val, SDValue DTy,
1272 SDValue STy, SDValue Rnd, SDValue Sat,
1273 ISD::CvtCode Code) {
1274 // If the src and dest types are the same and the conversion is between
1275 // integer types of the same sign or two floats, no conversion is necessary.
1277 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1280 FoldingSetNodeID ID;
1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1283 return SDValue(E, 0);
1284 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1286 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1287 CSEMap.InsertNode(N, IP);
1288 AllNodes.push_back(N);
1289 return SDValue(N, 0);
1292 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1293 FoldingSetNodeID ID;
1294 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1295 ID.AddInteger(RegNo);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1299 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1300 new (N) RegisterSDNode(RegNo, VT);
1301 CSEMap.InsertNode(N, IP);
1302 AllNodes.push_back(N);
1303 return SDValue(N, 0);
1306 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1307 unsigned Line, unsigned Col,
1309 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1310 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1312 AllNodes.push_back(N);
1313 return SDValue(N, 0);
1316 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1319 FoldingSetNodeID ID;
1320 SDValue Ops[] = { Root };
1321 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1322 ID.AddInteger(LabelID);
1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1325 return SDValue(E, 0);
1326 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1327 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1328 CSEMap.InsertNode(N, IP);
1329 AllNodes.push_back(N);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getSrcValue(const Value *V) {
1334 assert((!V || isa<PointerType>(V->getType())) &&
1335 "SrcValue is not a pointer?");
1337 FoldingSetNodeID ID;
1338 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1346 new (N) SrcValueSDNode(V);
1347 CSEMap.InsertNode(N, IP);
1348 AllNodes.push_back(N);
1349 return SDValue(N, 0);
1352 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1354 const Value *v = MO.getValue();
1355 assert((!v || isa<PointerType>(v->getType())) &&
1356 "SrcValue is not a pointer?");
1359 FoldingSetNodeID ID;
1360 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1365 return SDValue(E, 0);
1367 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1368 new (N) MemOperandSDNode(MO);
1369 CSEMap.InsertNode(N, IP);
1370 AllNodes.push_back(N);
1371 return SDValue(N, 0);
1374 /// getShiftAmountOperand - Return the specified value casted to
1375 /// the target's desired shift amount type.
1376 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1377 MVT OpTy = Op.getValueType();
1378 MVT ShTy = TLI.getShiftAmountTy();
1379 if (OpTy == ShTy || OpTy.isVector()) return Op;
1381 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1382 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1385 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1386 /// specified value type.
1387 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1388 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1389 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1390 const Type *Ty = VT.getTypeForMVT();
1391 unsigned StackAlign =
1392 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1394 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1395 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1398 /// CreateStackTemporary - Create a stack temporary suitable for holding
1399 /// either of the specified value types.
1400 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1401 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1402 VT2.getStoreSizeInBits())/8;
1403 const Type *Ty1 = VT1.getTypeForMVT();
1404 const Type *Ty2 = VT2.getTypeForMVT();
1405 const TargetData *TD = TLI.getTargetData();
1406 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1407 TD->getPrefTypeAlignment(Ty2));
1409 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1410 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1411 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1414 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1415 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1416 // These setcc operations always fold.
1420 case ISD::SETFALSE2: return getConstant(0, VT);
1422 case ISD::SETTRUE2: return getConstant(1, VT);
1434 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1438 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1439 const APInt &C2 = N2C->getAPIntValue();
1440 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1441 const APInt &C1 = N1C->getAPIntValue();
1444 default: assert(0 && "Unknown integer setcc!");
1445 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1446 case ISD::SETNE: return getConstant(C1 != C2, VT);
1447 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1448 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1449 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1450 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1451 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1452 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1453 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1454 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1458 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1459 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1460 // No compile time operations on this type yet.
1461 if (N1C->getValueType(0) == MVT::ppcf128)
1464 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1467 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1471 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1475 R==APFloat::cmpLessThan, VT);
1476 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1477 return getUNDEF(VT);
1479 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1480 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1481 return getUNDEF(VT);
1483 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1484 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1485 return getUNDEF(VT);
1487 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1488 R==APFloat::cmpEqual, VT);
1489 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1490 return getUNDEF(VT);
1492 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1493 R==APFloat::cmpEqual, VT);
1494 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1495 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1496 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1497 R==APFloat::cmpEqual, VT);
1498 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1499 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1500 R==APFloat::cmpLessThan, VT);
1501 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1502 R==APFloat::cmpUnordered, VT);
1503 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1504 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1507 // Ensure that the constant occurs on the RHS.
1508 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1512 // Could not fold it.
1516 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1517 /// use this predicate to simplify operations downstream.
1518 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1519 unsigned BitWidth = Op.getValueSizeInBits();
1520 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1523 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1524 /// this predicate to simplify operations downstream. Mask is known to be zero
1525 /// for bits that V cannot have.
1526 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1527 unsigned Depth) const {
1528 APInt KnownZero, KnownOne;
1529 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1530 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1531 return (KnownZero & Mask) == Mask;
1534 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1535 /// known to be either zero or one and return them in the KnownZero/KnownOne
1536 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1538 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1539 APInt &KnownZero, APInt &KnownOne,
1540 unsigned Depth) const {
1541 unsigned BitWidth = Mask.getBitWidth();
1542 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1543 "Mask size mismatches value type size!");
1545 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1546 if (Depth == 6 || Mask == 0)
1547 return; // Limit search depth.
1549 APInt KnownZero2, KnownOne2;
1551 switch (Op.getOpcode()) {
1553 // We know all of the bits for a constant!
1554 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1555 KnownZero = ~KnownOne & Mask;
1558 // If either the LHS or the RHS are Zero, the result is zero.
1559 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1560 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1561 KnownZero2, KnownOne2, Depth+1);
1562 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1563 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1565 // Output known-1 bits are only known if set in both the LHS & RHS.
1566 KnownOne &= KnownOne2;
1567 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1568 KnownZero |= KnownZero2;
1571 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1572 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1573 KnownZero2, KnownOne2, Depth+1);
1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1577 // Output known-0 bits are only known if clear in both the LHS & RHS.
1578 KnownZero &= KnownZero2;
1579 // Output known-1 are known to be set if set in either the LHS | RHS.
1580 KnownOne |= KnownOne2;
1583 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1584 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1585 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1586 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1588 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1589 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1590 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1591 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1592 KnownZero = KnownZeroOut;
1596 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1597 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1598 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1599 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1600 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1602 // If low bits are zero in either operand, output low known-0 bits.
1603 // Also compute a conserative estimate for high known-0 bits.
1604 // More trickiness is possible, but this is sufficient for the
1605 // interesting case of alignment computation.
1607 unsigned TrailZ = KnownZero.countTrailingOnes() +
1608 KnownZero2.countTrailingOnes();
1609 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1610 KnownZero2.countLeadingOnes(),
1611 BitWidth) - BitWidth;
1613 TrailZ = std::min(TrailZ, BitWidth);
1614 LeadZ = std::min(LeadZ, BitWidth);
1615 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1616 APInt::getHighBitsSet(BitWidth, LeadZ);
1621 // For the purposes of computing leading zeros we can conservatively
1622 // treat a udiv as a logical right shift by the power of 2 known to
1623 // be less than the denominator.
1624 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1625 ComputeMaskedBits(Op.getOperand(0),
1626 AllOnes, KnownZero2, KnownOne2, Depth+1);
1627 unsigned LeadZ = KnownZero2.countLeadingOnes();
1631 ComputeMaskedBits(Op.getOperand(1),
1632 AllOnes, KnownZero2, KnownOne2, Depth+1);
1633 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1634 if (RHSUnknownLeadingOnes != BitWidth)
1635 LeadZ = std::min(BitWidth,
1636 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1638 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1642 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1643 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1644 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1645 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1647 // Only known if known in both the LHS and RHS.
1648 KnownOne &= KnownOne2;
1649 KnownZero &= KnownZero2;
1651 case ISD::SELECT_CC:
1652 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1653 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1657 // Only known if known in both the LHS and RHS.
1658 KnownOne &= KnownOne2;
1659 KnownZero &= KnownZero2;
1667 if (Op.getResNo() != 1)
1669 // The boolean result conforms to getBooleanContents. Fall through.
1671 // If we know the result of a setcc has the top bits zero, use this info.
1672 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1674 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1677 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1678 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1679 unsigned ShAmt = SA->getZExtValue();
1681 // If the shift count is an invalid immediate, don't do anything.
1682 if (ShAmt >= BitWidth)
1685 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1686 KnownZero, KnownOne, Depth+1);
1687 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1688 KnownZero <<= ShAmt;
1690 // low bits known zero.
1691 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1695 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1696 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1697 unsigned ShAmt = SA->getZExtValue();
1699 // If the shift count is an invalid immediate, don't do anything.
1700 if (ShAmt >= BitWidth)
1703 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1704 KnownZero, KnownOne, Depth+1);
1705 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1706 KnownZero = KnownZero.lshr(ShAmt);
1707 KnownOne = KnownOne.lshr(ShAmt);
1709 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1710 KnownZero |= HighBits; // High bits known zero.
1714 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1715 unsigned ShAmt = SA->getZExtValue();
1717 // If the shift count is an invalid immediate, don't do anything.
1718 if (ShAmt >= BitWidth)
1721 APInt InDemandedMask = (Mask << ShAmt);
1722 // If any of the demanded bits are produced by the sign extension, we also
1723 // demand the input sign bit.
1724 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1725 if (HighBits.getBoolValue())
1726 InDemandedMask |= APInt::getSignBit(BitWidth);
1728 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1731 KnownZero = KnownZero.lshr(ShAmt);
1732 KnownOne = KnownOne.lshr(ShAmt);
1734 // Handle the sign bits.
1735 APInt SignBit = APInt::getSignBit(BitWidth);
1736 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1738 if (KnownZero.intersects(SignBit)) {
1739 KnownZero |= HighBits; // New bits are known zero.
1740 } else if (KnownOne.intersects(SignBit)) {
1741 KnownOne |= HighBits; // New bits are known one.
1745 case ISD::SIGN_EXTEND_INREG: {
1746 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1747 unsigned EBits = EVT.getSizeInBits();
1749 // Sign extension. Compute the demanded bits in the result that are not
1750 // present in the input.
1751 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1753 APInt InSignBit = APInt::getSignBit(EBits);
1754 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1756 // If the sign extended bits are demanded, we know that the sign
1758 InSignBit.zext(BitWidth);
1759 if (NewBits.getBoolValue())
1760 InputDemandedBits |= InSignBit;
1762 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1763 KnownZero, KnownOne, Depth+1);
1764 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1766 // If the sign bit of the input is known set or clear, then we know the
1767 // top bits of the result.
1768 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1769 KnownZero |= NewBits;
1770 KnownOne &= ~NewBits;
1771 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1772 KnownOne |= NewBits;
1773 KnownZero &= ~NewBits;
1774 } else { // Input sign bit unknown
1775 KnownZero &= ~NewBits;
1776 KnownOne &= ~NewBits;
1783 unsigned LowBits = Log2_32(BitWidth)+1;
1784 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1789 if (ISD::isZEXTLoad(Op.getNode())) {
1790 LoadSDNode *LD = cast<LoadSDNode>(Op);
1791 MVT VT = LD->getMemoryVT();
1792 unsigned MemBits = VT.getSizeInBits();
1793 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1797 case ISD::ZERO_EXTEND: {
1798 MVT InVT = Op.getOperand(0).getValueType();
1799 unsigned InBits = InVT.getSizeInBits();
1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1801 APInt InMask = Mask;
1802 InMask.trunc(InBits);
1803 KnownZero.trunc(InBits);
1804 KnownOne.trunc(InBits);
1805 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1806 KnownZero.zext(BitWidth);
1807 KnownOne.zext(BitWidth);
1808 KnownZero |= NewBits;
1811 case ISD::SIGN_EXTEND: {
1812 MVT InVT = Op.getOperand(0).getValueType();
1813 unsigned InBits = InVT.getSizeInBits();
1814 APInt InSignBit = APInt::getSignBit(InBits);
1815 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1816 APInt InMask = Mask;
1817 InMask.trunc(InBits);
1819 // If any of the sign extended bits are demanded, we know that the sign
1820 // bit is demanded. Temporarily set this bit in the mask for our callee.
1821 if (NewBits.getBoolValue())
1822 InMask |= InSignBit;
1824 KnownZero.trunc(InBits);
1825 KnownOne.trunc(InBits);
1826 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1828 // Note if the sign bit is known to be zero or one.
1829 bool SignBitKnownZero = KnownZero.isNegative();
1830 bool SignBitKnownOne = KnownOne.isNegative();
1831 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1832 "Sign bit can't be known to be both zero and one!");
1834 // If the sign bit wasn't actually demanded by our caller, we don't
1835 // want it set in the KnownZero and KnownOne result values. Reset the
1836 // mask and reapply it to the result values.
1838 InMask.trunc(InBits);
1839 KnownZero &= InMask;
1842 KnownZero.zext(BitWidth);
1843 KnownOne.zext(BitWidth);
1845 // If the sign bit is known zero or one, the top bits match.
1846 if (SignBitKnownZero)
1847 KnownZero |= NewBits;
1848 else if (SignBitKnownOne)
1849 KnownOne |= NewBits;
1852 case ISD::ANY_EXTEND: {
1853 MVT InVT = Op.getOperand(0).getValueType();
1854 unsigned InBits = InVT.getSizeInBits();
1855 APInt InMask = Mask;
1856 InMask.trunc(InBits);
1857 KnownZero.trunc(InBits);
1858 KnownOne.trunc(InBits);
1859 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1860 KnownZero.zext(BitWidth);
1861 KnownOne.zext(BitWidth);
1864 case ISD::TRUNCATE: {
1865 MVT InVT = Op.getOperand(0).getValueType();
1866 unsigned InBits = InVT.getSizeInBits();
1867 APInt InMask = Mask;
1868 InMask.zext(InBits);
1869 KnownZero.zext(InBits);
1870 KnownOne.zext(InBits);
1871 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1872 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1873 KnownZero.trunc(BitWidth);
1874 KnownOne.trunc(BitWidth);
1877 case ISD::AssertZext: {
1878 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1879 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1880 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1882 KnownZero |= (~InMask) & Mask;
1886 // All bits are zero except the low bit.
1887 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1891 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1892 // We know that the top bits of C-X are clear if X contains less bits
1893 // than C (i.e. no wrap-around can happen). For example, 20-X is
1894 // positive if we can prove that X is >= 0 and < 16.
1895 if (CLHS->getAPIntValue().isNonNegative()) {
1896 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1897 // NLZ can't be BitWidth with no sign bit
1898 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1899 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1902 // If all of the MaskV bits are known to be zero, then we know the
1903 // output top bits are zero, because we now know that the output is
1905 if ((KnownZero2 & MaskV) == MaskV) {
1906 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1907 // Top bits known zero.
1908 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1915 // Output known-0 bits are known if clear or set in both the low clear bits
1916 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1917 // low 3 bits clear.
1918 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1919 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1920 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1921 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1923 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1924 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1925 KnownZeroOut = std::min(KnownZeroOut,
1926 KnownZero2.countTrailingOnes());
1928 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1932 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1933 const APInt &RA = Rem->getAPIntValue();
1934 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1935 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1936 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1937 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1939 // If the sign bit of the first operand is zero, the sign bit of
1940 // the result is zero. If the first operand has no one bits below
1941 // the second operand's single 1 bit, its sign will be zero.
1942 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1943 KnownZero2 |= ~LowBits;
1945 KnownZero |= KnownZero2 & Mask;
1947 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1952 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1953 const APInt &RA = Rem->getAPIntValue();
1954 if (RA.isPowerOf2()) {
1955 APInt LowBits = (RA - 1);
1956 APInt Mask2 = LowBits & Mask;
1957 KnownZero |= ~LowBits & Mask;
1958 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1959 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1964 // Since the result is less than or equal to either operand, any leading
1965 // zero bits in either operand must also exist in the result.
1966 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1967 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1969 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1972 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1973 KnownZero2.countLeadingOnes());
1975 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1979 // Allow the target to implement this method for its nodes.
1980 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1981 case ISD::INTRINSIC_WO_CHAIN:
1982 case ISD::INTRINSIC_W_CHAIN:
1983 case ISD::INTRINSIC_VOID:
1984 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1990 /// ComputeNumSignBits - Return the number of times the sign bit of the
1991 /// register is replicated into the other bits. We know that at least 1 bit
1992 /// is always equal to the sign bit (itself), but other cases can give us
1993 /// information. For example, immediately after an "SRA X, 2", we know that
1994 /// the top 3 bits are all equal to each other, so we return 3.
1995 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1996 MVT VT = Op.getValueType();
1997 assert(VT.isInteger() && "Invalid VT!");
1998 unsigned VTBits = VT.getSizeInBits();
2000 unsigned FirstAnswer = 1;
2003 return 1; // Limit search depth.
2005 switch (Op.getOpcode()) {
2007 case ISD::AssertSext:
2008 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2009 return VTBits-Tmp+1;
2010 case ISD::AssertZext:
2011 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2014 case ISD::Constant: {
2015 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2016 // If negative, return # leading ones.
2017 if (Val.isNegative())
2018 return Val.countLeadingOnes();
2020 // Return # leading zeros.
2021 return Val.countLeadingZeros();
2024 case ISD::SIGN_EXTEND:
2025 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2026 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2028 case ISD::SIGN_EXTEND_INREG:
2029 // Max of the input and what this extends.
2030 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2033 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2034 return std::max(Tmp, Tmp2);
2037 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2038 // SRA X, C -> adds C sign bits.
2039 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2040 Tmp += C->getZExtValue();
2041 if (Tmp > VTBits) Tmp = VTBits;
2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2046 // shl destroys sign bits.
2047 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2048 if (C->getZExtValue() >= VTBits || // Bad shift.
2049 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2050 return Tmp - C->getZExtValue();
2055 case ISD::XOR: // NOT is handled here.
2056 // Logical binary ops preserve the number of sign bits at the worst.
2057 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2059 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2060 FirstAnswer = std::min(Tmp, Tmp2);
2061 // We computed what we know about the sign bits as our first
2062 // answer. Now proceed to the generic code that uses
2063 // ComputeMaskedBits, and pick whichever answer is better.
2068 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2069 if (Tmp == 1) return 1; // Early out.
2070 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2071 return std::min(Tmp, Tmp2);
2079 if (Op.getResNo() != 1)
2081 // The boolean result conforms to getBooleanContents. Fall through.
2083 // If setcc returns 0/-1, all bits are sign bits.
2084 if (TLI.getBooleanContents() ==
2085 TargetLowering::ZeroOrNegativeOneBooleanContent)
2090 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2091 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2093 // Handle rotate right by N like a rotate left by 32-N.
2094 if (Op.getOpcode() == ISD::ROTR)
2095 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2097 // If we aren't rotating out all of the known-in sign bits, return the
2098 // number that are left. This handles rotl(sext(x), 1) for example.
2099 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2100 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2104 // Add can have at most one carry bit. Thus we know that the output
2105 // is, at worst, one more bit than the inputs.
2106 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2107 if (Tmp == 1) return 1; // Early out.
2109 // Special case decrementing a value (ADD X, -1):
2110 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2111 if (CRHS->isAllOnesValue()) {
2112 APInt KnownZero, KnownOne;
2113 APInt Mask = APInt::getAllOnesValue(VTBits);
2114 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2116 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2118 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2121 // If we are subtracting one from a positive number, there is no carry
2122 // out of the result.
2123 if (KnownZero.isNegative())
2127 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2128 if (Tmp2 == 1) return 1;
2129 return std::min(Tmp, Tmp2)-1;
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2134 if (Tmp2 == 1) return 1;
2137 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2138 if (CLHS->isNullValue()) {
2139 APInt KnownZero, KnownOne;
2140 APInt Mask = APInt::getAllOnesValue(VTBits);
2141 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2144 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2147 // If the input is known to be positive (the sign bit is known clear),
2148 // the output of the NEG has the same number of sign bits as the input.
2149 if (KnownZero.isNegative())
2152 // Otherwise, we treat this like a SUB.
2155 // Sub can have at most one carry bit. Thus we know that the output
2156 // is, at worst, one more bit than the inputs.
2157 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2158 if (Tmp == 1) return 1; // Early out.
2159 return std::min(Tmp, Tmp2)-1;
2162 // FIXME: it's tricky to do anything useful for this, but it is an important
2163 // case for targets like X86.
2167 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2168 if (Op.getOpcode() == ISD::LOAD) {
2169 LoadSDNode *LD = cast<LoadSDNode>(Op);
2170 unsigned ExtType = LD->getExtensionType();
2173 case ISD::SEXTLOAD: // '17' bits known
2174 Tmp = LD->getMemoryVT().getSizeInBits();
2175 return VTBits-Tmp+1;
2176 case ISD::ZEXTLOAD: // '16' bits known
2177 Tmp = LD->getMemoryVT().getSizeInBits();
2182 // Allow the target to implement this method for its nodes.
2183 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2184 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2185 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2186 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2187 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2188 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2191 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2192 // use this information.
2193 APInt KnownZero, KnownOne;
2194 APInt Mask = APInt::getAllOnesValue(VTBits);
2195 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2197 if (KnownZero.isNegative()) { // sign bit is 0
2199 } else if (KnownOne.isNegative()) { // sign bit is 1;
2206 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2207 // the number of identical bits in the top of the input value.
2209 Mask <<= Mask.getBitWidth()-VTBits;
2210 // Return # leading zeros. We use 'min' here in case Val was zero before
2211 // shifting. We don't want to return '64' as for an i32 "0".
2212 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2216 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2217 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2218 if (!GA) return false;
2219 if (GA->getOffset() != 0) return false;
2220 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2221 if (!GV) return false;
2222 MachineModuleInfo *MMI = getMachineModuleInfo();
2223 return MMI && MMI->hasDebugInfo();
2227 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2228 /// element of the result of the vector shuffle.
2229 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2231 MVT VT = N->getValueType(0);
2232 DebugLoc dl = N->getDebugLoc();
2233 if (N->getMaskElt(i) < 0)
2234 return getUNDEF(VT.getVectorElementType());
2235 unsigned Index = N->getMaskElt(i);
2236 unsigned NumElems = VT.getVectorNumElements();
2237 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2240 if (V.getOpcode() == ISD::BIT_CONVERT) {
2241 V = V.getOperand(0);
2242 MVT VVT = V.getValueType();
2243 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2246 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2247 return (Index == 0) ? V.getOperand(0)
2248 : getUNDEF(VT.getVectorElementType());
2249 if (V.getOpcode() == ISD::BUILD_VECTOR)
2250 return V.getOperand(Index);
2251 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2252 return getShuffleScalarElt(SVN, Index);
2257 /// getNode - Gets or creates the specified node.
2259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2260 FoldingSetNodeID ID;
2261 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2264 return SDValue(E, 0);
2265 SDNode *N = NodeAllocator.Allocate<SDNode>();
2266 new (N) SDNode(Opcode, DL, getVTList(VT));
2267 CSEMap.InsertNode(N, IP);
2269 AllNodes.push_back(N);
2273 return SDValue(N, 0);
2276 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2277 MVT VT, SDValue Operand) {
2278 // Constant fold unary operations with an integer constant operand.
2279 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2280 const APInt &Val = C->getAPIntValue();
2281 unsigned BitWidth = VT.getSizeInBits();
2284 case ISD::SIGN_EXTEND:
2285 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2286 case ISD::ANY_EXTEND:
2287 case ISD::ZERO_EXTEND:
2289 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2290 case ISD::UINT_TO_FP:
2291 case ISD::SINT_TO_FP: {
2292 const uint64_t zero[] = {0, 0};
2293 // No compile time operations on this type.
2294 if (VT==MVT::ppcf128)
2296 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2297 (void)apf.convertFromAPInt(Val,
2298 Opcode==ISD::SINT_TO_FP,
2299 APFloat::rmNearestTiesToEven);
2300 return getConstantFP(apf, VT);
2302 case ISD::BIT_CONVERT:
2303 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2304 return getConstantFP(Val.bitsToFloat(), VT);
2305 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2306 return getConstantFP(Val.bitsToDouble(), VT);
2309 return getConstant(Val.byteSwap(), VT);
2311 return getConstant(Val.countPopulation(), VT);
2313 return getConstant(Val.countLeadingZeros(), VT);
2315 return getConstant(Val.countTrailingZeros(), VT);
2319 // Constant fold unary operations with a floating point constant operand.
2320 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2321 APFloat V = C->getValueAPF(); // make copy
2322 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2326 return getConstantFP(V, VT);
2329 return getConstantFP(V, VT);
2331 case ISD::FP_EXTEND: {
2333 // This can return overflow, underflow, or inexact; we don't care.
2334 // FIXME need to be more flexible about rounding mode.
2335 (void)V.convert(*MVTToAPFloatSemantics(VT),
2336 APFloat::rmNearestTiesToEven, &ignored);
2337 return getConstantFP(V, VT);
2339 case ISD::FP_TO_SINT:
2340 case ISD::FP_TO_UINT: {
2343 assert(integerPartWidth >= 64);
2344 // FIXME need to be more flexible about rounding mode.
2345 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2346 Opcode==ISD::FP_TO_SINT,
2347 APFloat::rmTowardZero, &ignored);
2348 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2350 APInt api(VT.getSizeInBits(), 2, x);
2351 return getConstant(api, VT);
2353 case ISD::BIT_CONVERT:
2354 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2355 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2356 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2357 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2363 unsigned OpOpcode = Operand.getNode()->getOpcode();
2365 case ISD::TokenFactor:
2366 case ISD::MERGE_VALUES:
2367 case ISD::CONCAT_VECTORS:
2368 return Operand; // Factor, merge or concat of one node? No need.
2369 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2370 case ISD::FP_EXTEND:
2371 assert(VT.isFloatingPoint() &&
2372 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2373 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2374 if (Operand.getOpcode() == ISD::UNDEF)
2375 return getUNDEF(VT);
2377 case ISD::SIGN_EXTEND:
2378 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2379 "Invalid SIGN_EXTEND!");
2380 if (Operand.getValueType() == VT) return Operand; // noop extension
2381 assert(Operand.getValueType().bitsLT(VT)
2382 && "Invalid sext node, dst < src!");
2383 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2384 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2386 case ISD::ZERO_EXTEND:
2387 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2388 "Invalid ZERO_EXTEND!");
2389 if (Operand.getValueType() == VT) return Operand; // noop extension
2390 assert(Operand.getValueType().bitsLT(VT)
2391 && "Invalid zext node, dst < src!");
2392 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2393 return getNode(ISD::ZERO_EXTEND, DL, VT,
2394 Operand.getNode()->getOperand(0));
2396 case ISD::ANY_EXTEND:
2397 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2398 "Invalid ANY_EXTEND!");
2399 if (Operand.getValueType() == VT) return Operand; // noop extension
2400 assert(Operand.getValueType().bitsLT(VT)
2401 && "Invalid anyext node, dst < src!");
2402 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2403 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2404 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2407 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2408 "Invalid TRUNCATE!");
2409 if (Operand.getValueType() == VT) return Operand; // noop truncate
2410 assert(Operand.getValueType().bitsGT(VT)
2411 && "Invalid truncate node, src < dst!");
2412 if (OpOpcode == ISD::TRUNCATE)
2413 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2414 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2415 OpOpcode == ISD::ANY_EXTEND) {
2416 // If the source is smaller than the dest, we still need an extend.
2417 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2418 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2419 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2420 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2422 return Operand.getNode()->getOperand(0);
2425 case ISD::BIT_CONVERT:
2426 // Basic sanity checking.
2427 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2428 && "Cannot BIT_CONVERT between types of different sizes!");
2429 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2430 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2431 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2432 if (OpOpcode == ISD::UNDEF)
2433 return getUNDEF(VT);
2435 case ISD::SCALAR_TO_VECTOR:
2436 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2437 (VT.getVectorElementType() == Operand.getValueType() ||
2438 (VT.getVectorElementType().isInteger() &&
2439 Operand.getValueType().isInteger() &&
2440 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2441 "Illegal SCALAR_TO_VECTOR node!");
2442 if (OpOpcode == ISD::UNDEF)
2443 return getUNDEF(VT);
2444 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2445 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2446 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2447 Operand.getConstantOperandVal(1) == 0 &&
2448 Operand.getOperand(0).getValueType() == VT)
2449 return Operand.getOperand(0);
2452 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2453 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2454 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2455 Operand.getNode()->getOperand(0));
2456 if (OpOpcode == ISD::FNEG) // --X -> X
2457 return Operand.getNode()->getOperand(0);
2460 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2461 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2466 SDVTList VTs = getVTList(VT);
2467 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2468 FoldingSetNodeID ID;
2469 SDValue Ops[1] = { Operand };
2470 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2473 return SDValue(E, 0);
2474 N = NodeAllocator.Allocate<UnarySDNode>();
2475 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2476 CSEMap.InsertNode(N, IP);
2478 N = NodeAllocator.Allocate<UnarySDNode>();
2479 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2482 AllNodes.push_back(N);
2486 return SDValue(N, 0);
2489 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2491 ConstantSDNode *Cst1,
2492 ConstantSDNode *Cst2) {
2493 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2496 case ISD::ADD: return getConstant(C1 + C2, VT);
2497 case ISD::SUB: return getConstant(C1 - C2, VT);
2498 case ISD::MUL: return getConstant(C1 * C2, VT);
2500 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2503 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2506 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2509 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2511 case ISD::AND: return getConstant(C1 & C2, VT);
2512 case ISD::OR: return getConstant(C1 | C2, VT);
2513 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2514 case ISD::SHL: return getConstant(C1 << C2, VT);
2515 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2516 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2517 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2518 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2525 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2526 SDValue N1, SDValue N2) {
2527 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2528 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2531 case ISD::TokenFactor:
2532 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2533 N2.getValueType() == MVT::Other && "Invalid token factor!");
2534 // Fold trivial token factors.
2535 if (N1.getOpcode() == ISD::EntryToken) return N2;
2536 if (N2.getOpcode() == ISD::EntryToken) return N1;
2537 if (N1 == N2) return N1;
2539 case ISD::CONCAT_VECTORS:
2540 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2541 // one big BUILD_VECTOR.
2542 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2543 N2.getOpcode() == ISD::BUILD_VECTOR) {
2544 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2545 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2546 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2550 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2551 N1.getValueType() == VT && "Binary operator types must match!");
2552 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2553 // worth handling here.
2554 if (N2C && N2C->isNullValue())
2556 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2563 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2564 N1.getValueType() == VT && "Binary operator types must match!");
2565 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2566 // it's worth handling here.
2567 if (N2C && N2C->isNullValue())
2577 assert(VT.isInteger() && "This operator does not apply to FP types!");
2585 if (Opcode == ISD::FADD) {
2587 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2588 if (CFP->getValueAPF().isZero())
2591 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2592 if (CFP->getValueAPF().isZero())
2594 } else if (Opcode == ISD::FSUB) {
2596 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2597 if (CFP->getValueAPF().isZero())
2601 assert(N1.getValueType() == N2.getValueType() &&
2602 N1.getValueType() == VT && "Binary operator types must match!");
2604 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2605 assert(N1.getValueType() == VT &&
2606 N1.getValueType().isFloatingPoint() &&
2607 N2.getValueType().isFloatingPoint() &&
2608 "Invalid FCOPYSIGN!");
2615 assert(VT == N1.getValueType() &&
2616 "Shift operators return type must be the same as their first arg");
2617 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2618 "Shifts only work on integers");
2620 // Always fold shifts of i1 values so the code generator doesn't need to
2621 // handle them. Since we know the size of the shift has to be less than the
2622 // size of the value, the shift/rotate count is guaranteed to be zero.
2626 case ISD::FP_ROUND_INREG: {
2627 MVT EVT = cast<VTSDNode>(N2)->getVT();
2628 assert(VT == N1.getValueType() && "Not an inreg round!");
2629 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2630 "Cannot FP_ROUND_INREG integer types");
2631 assert(EVT.bitsLE(VT) && "Not rounding down!");
2632 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2636 assert(VT.isFloatingPoint() &&
2637 N1.getValueType().isFloatingPoint() &&
2638 VT.bitsLE(N1.getValueType()) &&
2639 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2640 if (N1.getValueType() == VT) return N1; // noop conversion.
2642 case ISD::AssertSext:
2643 case ISD::AssertZext: {
2644 MVT EVT = cast<VTSDNode>(N2)->getVT();
2645 assert(VT == N1.getValueType() && "Not an inreg extend!");
2646 assert(VT.isInteger() && EVT.isInteger() &&
2647 "Cannot *_EXTEND_INREG FP types");
2648 assert(EVT.bitsLE(VT) && "Not extending!");
2649 if (VT == EVT) return N1; // noop assertion.
2652 case ISD::SIGN_EXTEND_INREG: {
2653 MVT EVT = cast<VTSDNode>(N2)->getVT();
2654 assert(VT == N1.getValueType() && "Not an inreg extend!");
2655 assert(VT.isInteger() && EVT.isInteger() &&
2656 "Cannot *_EXTEND_INREG FP types");
2657 assert(EVT.bitsLE(VT) && "Not extending!");
2658 if (EVT == VT) return N1; // Not actually extending
2661 APInt Val = N1C->getAPIntValue();
2662 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2663 Val <<= Val.getBitWidth()-FromBits;
2664 Val = Val.ashr(Val.getBitWidth()-FromBits);
2665 return getConstant(Val, VT);
2669 case ISD::EXTRACT_VECTOR_ELT:
2670 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2671 if (N1.getOpcode() == ISD::UNDEF)
2672 return getUNDEF(VT);
2674 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2675 // expanding copies of large vectors from registers.
2677 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2678 N1.getNumOperands() > 0) {
2680 N1.getOperand(0).getValueType().getVectorNumElements();
2681 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2682 N1.getOperand(N2C->getZExtValue() / Factor),
2683 getConstant(N2C->getZExtValue() % Factor,
2684 N2.getValueType()));
2687 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2688 // expanding large vector constants.
2689 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2690 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2691 if (Elt.getValueType() != VT) {
2692 // If the vector element type is not legal, the BUILD_VECTOR operands
2693 // are promoted and implicitly truncated. Make that explicit here.
2694 assert(VT.isInteger() && Elt.getValueType().isInteger() &&
2695 VT.bitsLE(Elt.getValueType()) &&
2696 "Bad type for BUILD_VECTOR operand");
2697 Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
2702 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2703 // operations are lowered to scalars.
2704 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2705 // If the indices are the same, return the inserted element.
2706 if (N1.getOperand(2) == N2)
2707 return N1.getOperand(1);
2708 // If the indices are known different, extract the element from
2709 // the original vector.
2710 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2711 isa<ConstantSDNode>(N2))
2712 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2715 case ISD::EXTRACT_ELEMENT:
2716 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2717 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2718 (N1.getValueType().isInteger() == VT.isInteger()) &&
2719 "Wrong types for EXTRACT_ELEMENT!");
2721 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2722 // 64-bit integers into 32-bit parts. Instead of building the extract of
2723 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2724 if (N1.getOpcode() == ISD::BUILD_PAIR)
2725 return N1.getOperand(N2C->getZExtValue());
2727 // EXTRACT_ELEMENT of a constant int is also very common.
2728 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2729 unsigned ElementSize = VT.getSizeInBits();
2730 unsigned Shift = ElementSize * N2C->getZExtValue();
2731 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2732 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2735 case ISD::EXTRACT_SUBVECTOR:
2736 if (N1.getValueType() == VT) // Trivial extraction.
2743 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2744 if (SV.getNode()) return SV;
2745 } else { // Cannonicalize constant to RHS if commutative
2746 if (isCommutativeBinOp(Opcode)) {
2747 std::swap(N1C, N2C);
2753 // Constant fold FP operations.
2754 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2755 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2757 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2758 // Cannonicalize constant to RHS if commutative
2759 std::swap(N1CFP, N2CFP);
2761 } else if (N2CFP && VT != MVT::ppcf128) {
2762 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2763 APFloat::opStatus s;
2766 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2767 if (s != APFloat::opInvalidOp)
2768 return getConstantFP(V1, VT);
2771 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2772 if (s!=APFloat::opInvalidOp)
2773 return getConstantFP(V1, VT);
2776 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2777 if (s!=APFloat::opInvalidOp)
2778 return getConstantFP(V1, VT);
2781 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2782 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2783 return getConstantFP(V1, VT);
2786 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2787 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2788 return getConstantFP(V1, VT);
2790 case ISD::FCOPYSIGN:
2792 return getConstantFP(V1, VT);
2798 // Canonicalize an UNDEF to the RHS, even over a constant.
2799 if (N1.getOpcode() == ISD::UNDEF) {
2800 if (isCommutativeBinOp(Opcode)) {
2804 case ISD::FP_ROUND_INREG:
2805 case ISD::SIGN_EXTEND_INREG:
2811 return N1; // fold op(undef, arg2) -> undef
2819 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2820 // For vectors, we can't easily build an all zero vector, just return
2827 // Fold a bunch of operators when the RHS is undef.
2828 if (N2.getOpcode() == ISD::UNDEF) {
2831 if (N1.getOpcode() == ISD::UNDEF)
2832 // Handle undef ^ undef -> 0 special case. This is a common
2834 return getConstant(0, VT);
2844 return N2; // fold op(arg1, undef) -> undef
2858 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2859 // For vectors, we can't easily build an all zero vector, just return
2864 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2865 // For vectors, we can't easily build an all one vector, just return
2873 // Memoize this node if possible.
2875 SDVTList VTs = getVTList(VT);
2876 if (VT != MVT::Flag) {
2877 SDValue Ops[] = { N1, N2 };
2878 FoldingSetNodeID ID;
2879 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2882 return SDValue(E, 0);
2883 N = NodeAllocator.Allocate<BinarySDNode>();
2884 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2885 CSEMap.InsertNode(N, IP);
2887 N = NodeAllocator.Allocate<BinarySDNode>();
2888 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2891 AllNodes.push_back(N);
2895 return SDValue(N, 0);
2898 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2899 SDValue N1, SDValue N2, SDValue N3) {
2900 // Perform various simplifications.
2901 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2902 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2904 case ISD::CONCAT_VECTORS:
2905 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2906 // one big BUILD_VECTOR.
2907 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2908 N2.getOpcode() == ISD::BUILD_VECTOR &&
2909 N3.getOpcode() == ISD::BUILD_VECTOR) {
2910 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2911 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2912 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2913 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2917 // Use FoldSetCC to simplify SETCC's.
2918 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2919 if (Simp.getNode()) return Simp;
2924 if (N1C->getZExtValue())
2925 return N2; // select true, X, Y -> X
2927 return N3; // select false, X, Y -> Y
2930 if (N2 == N3) return N2; // select C, X, X -> X
2934 if (N2C->getZExtValue()) // Unconditional branch
2935 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2937 return N1; // Never-taken branch
2940 case ISD::VECTOR_SHUFFLE:
2941 assert(0 && "should use getVectorShuffle constructor!");
2943 case ISD::BIT_CONVERT:
2944 // Fold bit_convert nodes from a type to themselves.
2945 if (N1.getValueType() == VT)
2950 // Memoize node if it doesn't produce a flag.
2952 SDVTList VTs = getVTList(VT);
2953 if (VT != MVT::Flag) {
2954 SDValue Ops[] = { N1, N2, N3 };
2955 FoldingSetNodeID ID;
2956 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2958 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2959 return SDValue(E, 0);
2960 N = NodeAllocator.Allocate<TernarySDNode>();
2961 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2962 CSEMap.InsertNode(N, IP);
2964 N = NodeAllocator.Allocate<TernarySDNode>();
2965 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2967 AllNodes.push_back(N);
2971 return SDValue(N, 0);
2974 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2975 SDValue N1, SDValue N2, SDValue N3,
2977 SDValue Ops[] = { N1, N2, N3, N4 };
2978 return getNode(Opcode, DL, VT, Ops, 4);
2981 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2982 SDValue N1, SDValue N2, SDValue N3,
2983 SDValue N4, SDValue N5) {
2984 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2985 return getNode(Opcode, DL, VT, Ops, 5);
2988 /// getMemsetValue - Vectorized representation of the memset value
2990 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2992 unsigned NumBits = VT.isVector() ?
2993 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2994 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2995 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2997 for (unsigned i = NumBits; i > 8; i >>= 1) {
2998 Val = (Val << Shift) | Val;
3002 return DAG.getConstant(Val, VT);
3003 return DAG.getConstantFP(APFloat(Val), VT);
3006 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3007 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3009 for (unsigned i = NumBits; i > 8; i >>= 1) {
3010 Value = DAG.getNode(ISD::OR, dl, VT,
3011 DAG.getNode(ISD::SHL, dl, VT, Value,
3012 DAG.getConstant(Shift,
3013 TLI.getShiftAmountTy())),
3021 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3022 /// used when a memcpy is turned into a memset when the source is a constant
3024 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
3025 const TargetLowering &TLI,
3026 std::string &Str, unsigned Offset) {
3027 // Handle vector with all elements zero.
3030 return DAG.getConstant(0, VT);
3031 unsigned NumElts = VT.getVectorNumElements();
3032 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3033 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3034 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
3037 assert(!VT.isVector() && "Can't handle vector type here!");
3038 unsigned NumBits = VT.getSizeInBits();
3039 unsigned MSB = NumBits / 8;
3041 if (TLI.isLittleEndian())
3042 Offset = Offset + MSB - 1;
3043 for (unsigned i = 0; i != MSB; ++i) {
3044 Val = (Val << 8) | (unsigned char)Str[Offset];
3045 Offset += TLI.isLittleEndian() ? -1 : 1;
3047 return DAG.getConstant(Val, VT);
3050 /// getMemBasePlusOffset - Returns base and offset node for the
3052 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3053 SelectionDAG &DAG) {
3054 MVT VT = Base.getValueType();
3055 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3056 VT, Base, DAG.getConstant(Offset, VT));
3059 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3061 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3062 unsigned SrcDelta = 0;
3063 GlobalAddressSDNode *G = NULL;
3064 if (Src.getOpcode() == ISD::GlobalAddress)
3065 G = cast<GlobalAddressSDNode>(Src);
3066 else if (Src.getOpcode() == ISD::ADD &&
3067 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3068 Src.getOperand(1).getOpcode() == ISD::Constant) {
3069 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3070 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3075 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3076 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3082 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3083 /// to replace the memset / memcpy is below the threshold. It also returns the
3084 /// types of the sequence of memory ops to perform memset / memcpy.
3086 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3087 SDValue Dst, SDValue Src,
3088 unsigned Limit, uint64_t Size, unsigned &Align,
3089 std::string &Str, bool &isSrcStr,
3091 const TargetLowering &TLI) {
3092 isSrcStr = isMemSrcFromString(Src, Str);
3093 bool isSrcConst = isa<ConstantSDNode>(Src);
3094 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3095 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3096 if (VT != MVT::iAny) {
3097 unsigned NewAlign = (unsigned)
3098 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3099 // If source is a string constant, this will require an unaligned load.
3100 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3101 if (Dst.getOpcode() != ISD::FrameIndex) {
3102 // Can't change destination alignment. It requires a unaligned store.
3106 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3107 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3108 if (MFI->isFixedObjectIndex(FI)) {
3109 // Can't change destination alignment. It requires a unaligned store.
3113 // Give the stack frame object a larger alignment if needed.
3114 if (MFI->getObjectAlignment(FI) < NewAlign)
3115 MFI->setObjectAlignment(FI, NewAlign);
3122 if (VT == MVT::iAny) {
3126 switch (Align & 7) {
3127 case 0: VT = MVT::i64; break;
3128 case 4: VT = MVT::i32; break;
3129 case 2: VT = MVT::i16; break;
3130 default: VT = MVT::i8; break;
3135 while (!TLI.isTypeLegal(LVT))
3136 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3137 assert(LVT.isInteger());
3143 unsigned NumMemOps = 0;
3145 unsigned VTSize = VT.getSizeInBits() / 8;
3146 while (VTSize > Size) {
3147 // For now, only use non-vector load / store's for the left-over pieces.
3148 if (VT.isVector()) {
3150 while (!TLI.isTypeLegal(VT))
3151 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3152 VTSize = VT.getSizeInBits() / 8;
3154 // This can result in a type that is not legal on the target, e.g.
3155 // 1 or 2 bytes on PPC.
3156 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3161 if (++NumMemOps > Limit)
3163 MemOps.push_back(VT);
3170 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3171 SDValue Chain, SDValue Dst,
3172 SDValue Src, uint64_t Size,
3173 unsigned Align, bool AlwaysInline,
3174 const Value *DstSV, uint64_t DstSVOff,
3175 const Value *SrcSV, uint64_t SrcSVOff){
3176 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3178 // Expand memcpy to a series of load and store ops if the size operand falls
3179 // below a certain threshold.
3180 std::vector<MVT> MemOps;
3181 uint64_t Limit = -1ULL;
3183 Limit = TLI.getMaxStoresPerMemcpy();
3184 unsigned DstAlign = Align; // Destination alignment can change.
3187 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3188 Str, CopyFromStr, DAG, TLI))
3192 bool isZeroStr = CopyFromStr && Str.empty();
3193 SmallVector<SDValue, 8> OutChains;
3194 unsigned NumMemOps = MemOps.size();
3195 uint64_t SrcOff = 0, DstOff = 0;
3196 for (unsigned i = 0; i < NumMemOps; i++) {
3198 unsigned VTSize = VT.getSizeInBits() / 8;
3199 SDValue Value, Store;
3201 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3202 // It's unlikely a store of a vector immediate can be done in a single
3203 // instruction. It would require a load from a constantpool first.
3204 // We also handle store a vector with all zero's.
3205 // FIXME: Handle other cases where store of vector immediate is done in
3206 // a single instruction.
3207 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3208 Store = DAG.getStore(Chain, dl, Value,
3209 getMemBasePlusOffset(Dst, DstOff, DAG),
3210 DstSV, DstSVOff + DstOff, false, DstAlign);
3212 // The type might not be legal for the target. This should only happen
3213 // if the type is smaller than a legal type, as on PPC, so the right
3214 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3215 // to Load/Store if NVT==VT.
3216 // FIXME does the case above also need this?
3217 MVT NVT = TLI.getTypeToTransformTo(VT);
3218 assert(NVT.bitsGE(VT));
3219 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3220 getMemBasePlusOffset(Src, SrcOff, DAG),
3221 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3222 Store = DAG.getTruncStore(Chain, dl, Value,
3223 getMemBasePlusOffset(Dst, DstOff, DAG),
3224 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3226 OutChains.push_back(Store);
3231 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3232 &OutChains[0], OutChains.size());
3235 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3236 SDValue Chain, SDValue Dst,
3237 SDValue Src, uint64_t Size,
3238 unsigned Align, bool AlwaysInline,
3239 const Value *DstSV, uint64_t DstSVOff,
3240 const Value *SrcSV, uint64_t SrcSVOff){
3241 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3243 // Expand memmove to a series of load and store ops if the size operand falls
3244 // below a certain threshold.
3245 std::vector<MVT> MemOps;
3246 uint64_t Limit = -1ULL;
3248 Limit = TLI.getMaxStoresPerMemmove();
3249 unsigned DstAlign = Align; // Destination alignment can change.
3252 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3253 Str, CopyFromStr, DAG, TLI))
3256 uint64_t SrcOff = 0, DstOff = 0;
3258 SmallVector<SDValue, 8> LoadValues;
3259 SmallVector<SDValue, 8> LoadChains;
3260 SmallVector<SDValue, 8> OutChains;
3261 unsigned NumMemOps = MemOps.size();
3262 for (unsigned i = 0; i < NumMemOps; i++) {
3264 unsigned VTSize = VT.getSizeInBits() / 8;
3265 SDValue Value, Store;
3267 Value = DAG.getLoad(VT, dl, Chain,
3268 getMemBasePlusOffset(Src, SrcOff, DAG),
3269 SrcSV, SrcSVOff + SrcOff, false, Align);
3270 LoadValues.push_back(Value);
3271 LoadChains.push_back(Value.getValue(1));
3274 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3275 &LoadChains[0], LoadChains.size());
3277 for (unsigned i = 0; i < NumMemOps; i++) {
3279 unsigned VTSize = VT.getSizeInBits() / 8;
3280 SDValue Value, Store;
3282 Store = DAG.getStore(Chain, dl, LoadValues[i],
3283 getMemBasePlusOffset(Dst, DstOff, DAG),
3284 DstSV, DstSVOff + DstOff, false, DstAlign);
3285 OutChains.push_back(Store);
3289 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3290 &OutChains[0], OutChains.size());
3293 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3294 SDValue Chain, SDValue Dst,
3295 SDValue Src, uint64_t Size,
3297 const Value *DstSV, uint64_t DstSVOff) {
3298 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3300 // Expand memset to a series of load/store ops if the size operand
3301 // falls below a certain threshold.
3302 std::vector<MVT> MemOps;
3305 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3306 Size, Align, Str, CopyFromStr, DAG, TLI))
3309 SmallVector<SDValue, 8> OutChains;
3310 uint64_t DstOff = 0;
3312 unsigned NumMemOps = MemOps.size();
3313 for (unsigned i = 0; i < NumMemOps; i++) {
3315 unsigned VTSize = VT.getSizeInBits() / 8;
3316 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3317 SDValue Store = DAG.getStore(Chain, dl, Value,
3318 getMemBasePlusOffset(Dst, DstOff, DAG),
3319 DstSV, DstSVOff + DstOff);
3320 OutChains.push_back(Store);
3324 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3325 &OutChains[0], OutChains.size());
3328 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3329 SDValue Src, SDValue Size,
3330 unsigned Align, bool AlwaysInline,
3331 const Value *DstSV, uint64_t DstSVOff,
3332 const Value *SrcSV, uint64_t SrcSVOff) {
3334 // Check to see if we should lower the memcpy to loads and stores first.
3335 // For cases within the target-specified limits, this is the best choice.
3336 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3338 // Memcpy with size zero? Just return the original chain.
3339 if (ConstantSize->isNullValue())
3343 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3344 ConstantSize->getZExtValue(),
3345 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3346 if (Result.getNode())
3350 // Then check to see if we should lower the memcpy with target-specific
3351 // code. If the target chooses to do this, this is the next best.
3353 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3355 DstSV, DstSVOff, SrcSV, SrcSVOff);
3356 if (Result.getNode())
3359 // If we really need inline code and the target declined to provide it,
3360 // use a (potentially long) sequence of loads and stores.
3362 assert(ConstantSize && "AlwaysInline requires a constant size!");
3363 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3364 ConstantSize->getZExtValue(), Align, true,
3365 DstSV, DstSVOff, SrcSV, SrcSVOff);
3368 // Emit a library call.
3369 TargetLowering::ArgListTy Args;
3370 TargetLowering::ArgListEntry Entry;
3371 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3372 Entry.Node = Dst; Args.push_back(Entry);
3373 Entry.Node = Src; Args.push_back(Entry);
3374 Entry.Node = Size; Args.push_back(Entry);
3375 // FIXME: pass in DebugLoc
3376 std::pair<SDValue,SDValue> CallResult =
3377 TLI.LowerCallTo(Chain, Type::VoidTy,
3378 false, false, false, false, CallingConv::C, false,
3379 getExternalSymbol("memcpy", TLI.getPointerTy()),
3381 return CallResult.second;
3384 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3385 SDValue Src, SDValue Size,
3387 const Value *DstSV, uint64_t DstSVOff,
3388 const Value *SrcSV, uint64_t SrcSVOff) {
3390 // Check to see if we should lower the memmove to loads and stores first.
3391 // For cases within the target-specified limits, this is the best choice.
3392 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3394 // Memmove with size zero? Just return the original chain.
3395 if (ConstantSize->isNullValue())
3399 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3400 ConstantSize->getZExtValue(),
3401 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3402 if (Result.getNode())
3406 // Then check to see if we should lower the memmove with target-specific
3407 // code. If the target chooses to do this, this is the next best.
3409 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3410 DstSV, DstSVOff, SrcSV, SrcSVOff);
3411 if (Result.getNode())
3414 // Emit a library call.
3415 TargetLowering::ArgListTy Args;
3416 TargetLowering::ArgListEntry Entry;
3417 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3418 Entry.Node = Dst; Args.push_back(Entry);
3419 Entry.Node = Src; Args.push_back(Entry);
3420 Entry.Node = Size; Args.push_back(Entry);
3421 // FIXME: pass in DebugLoc
3422 std::pair<SDValue,SDValue> CallResult =
3423 TLI.LowerCallTo(Chain, Type::VoidTy,
3424 false, false, false, false, CallingConv::C, false,
3425 getExternalSymbol("memmove", TLI.getPointerTy()),
3427 return CallResult.second;
3430 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3431 SDValue Src, SDValue Size,
3433 const Value *DstSV, uint64_t DstSVOff) {
3435 // Check to see if we should lower the memset to stores first.
3436 // For cases within the target-specified limits, this is the best choice.
3437 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3439 // Memset with size zero? Just return the original chain.
3440 if (ConstantSize->isNullValue())
3444 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3445 Align, DstSV, DstSVOff);
3446 if (Result.getNode())
3450 // Then check to see if we should lower the memset with target-specific
3451 // code. If the target chooses to do this, this is the next best.
3453 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3455 if (Result.getNode())
3458 // Emit a library call.
3459 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3460 TargetLowering::ArgListTy Args;
3461 TargetLowering::ArgListEntry Entry;
3462 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3463 Args.push_back(Entry);
3464 // Extend or truncate the argument to be an i32 value for the call.
3465 if (Src.getValueType().bitsGT(MVT::i32))
3466 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3468 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3469 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3470 Args.push_back(Entry);
3471 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3472 Args.push_back(Entry);
3473 // FIXME: pass in DebugLoc
3474 std::pair<SDValue,SDValue> CallResult =
3475 TLI.LowerCallTo(Chain, Type::VoidTy,
3476 false, false, false, false, CallingConv::C, false,
3477 getExternalSymbol("memset", TLI.getPointerTy()),
3479 return CallResult.second;
3482 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3484 SDValue Ptr, SDValue Cmp,
3485 SDValue Swp, const Value* PtrVal,
3486 unsigned Alignment) {
3487 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3488 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3490 MVT VT = Cmp.getValueType();
3492 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3493 Alignment = getMVTAlignment(MemVT);
3495 SDVTList VTs = getVTList(VT, MVT::Other);
3496 FoldingSetNodeID ID;
3497 ID.AddInteger(MemVT.getRawBits());
3498 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3499 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3502 return SDValue(E, 0);
3503 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3504 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3505 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3506 CSEMap.InsertNode(N, IP);
3507 AllNodes.push_back(N);
3508 return SDValue(N, 0);
3511 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3513 SDValue Ptr, SDValue Val,
3514 const Value* PtrVal,
3515 unsigned Alignment) {
3516 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3517 Opcode == ISD::ATOMIC_LOAD_SUB ||
3518 Opcode == ISD::ATOMIC_LOAD_AND ||
3519 Opcode == ISD::ATOMIC_LOAD_OR ||
3520 Opcode == ISD::ATOMIC_LOAD_XOR ||
3521 Opcode == ISD::ATOMIC_LOAD_NAND ||
3522 Opcode == ISD::ATOMIC_LOAD_MIN ||
3523 Opcode == ISD::ATOMIC_LOAD_MAX ||
3524 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3525 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3526 Opcode == ISD::ATOMIC_SWAP) &&
3527 "Invalid Atomic Op");
3529 MVT VT = Val.getValueType();
3531 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3532 Alignment = getMVTAlignment(MemVT);
3534 SDVTList VTs = getVTList(VT, MVT::Other);
3535 FoldingSetNodeID ID;
3536 ID.AddInteger(MemVT.getRawBits());
3537 SDValue Ops[] = {Chain, Ptr, Val};
3538 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3540 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3541 return SDValue(E, 0);
3542 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3543 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3544 Chain, Ptr, Val, PtrVal, Alignment);
3545 CSEMap.InsertNode(N, IP);
3546 AllNodes.push_back(N);
3547 return SDValue(N, 0);
3550 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3551 /// Allowed to return something different (and simpler) if Simplify is true.
3552 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3557 SmallVector<MVT, 4> VTs;
3558 VTs.reserve(NumOps);
3559 for (unsigned i = 0; i < NumOps; ++i)
3560 VTs.push_back(Ops[i].getValueType());
3561 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3566 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3567 const MVT *VTs, unsigned NumVTs,
3568 const SDValue *Ops, unsigned NumOps,
3569 MVT MemVT, const Value *srcValue, int SVOff,
3570 unsigned Align, bool Vol,
3571 bool ReadMem, bool WriteMem) {
3572 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3573 MemVT, srcValue, SVOff, Align, Vol,
3578 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3579 const SDValue *Ops, unsigned NumOps,
3580 MVT MemVT, const Value *srcValue, int SVOff,
3581 unsigned Align, bool Vol,
3582 bool ReadMem, bool WriteMem) {
3583 // Memoize the node unless it returns a flag.
3584 MemIntrinsicSDNode *N;
3585 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3586 FoldingSetNodeID ID;
3587 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3589 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3590 return SDValue(E, 0);
3592 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3593 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3594 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3595 CSEMap.InsertNode(N, IP);
3597 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3598 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3599 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3601 AllNodes.push_back(N);
3602 return SDValue(N, 0);
3606 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3607 bool IsTailCall, bool IsInreg, SDVTList VTs,
3608 const SDValue *Operands, unsigned NumOperands) {
3609 // Do not include isTailCall in the folding set profile.
3610 FoldingSetNodeID ID;
3611 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3612 ID.AddInteger(CallingConv);
3613 ID.AddInteger(IsVarArgs);
3615 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3616 // Instead of including isTailCall in the folding set, we just
3617 // set the flag of the existing node.
3619 cast<CallSDNode>(E)->setNotTailCall();
3620 return SDValue(E, 0);
3622 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3623 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3624 VTs, Operands, NumOperands);
3625 CSEMap.InsertNode(N, IP);
3626 AllNodes.push_back(N);
3627 return SDValue(N, 0);
3631 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3632 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3633 SDValue Ptr, SDValue Offset,
3634 const Value *SV, int SVOffset, MVT EVT,
3635 bool isVolatile, unsigned Alignment) {
3636 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3637 Alignment = getMVTAlignment(VT);
3640 ExtType = ISD::NON_EXTLOAD;
3641 } else if (ExtType == ISD::NON_EXTLOAD) {
3642 assert(VT == EVT && "Non-extending load from different memory type!");
3646 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3647 "Invalid vector extload!");
3649 assert(EVT.bitsLT(VT) &&
3650 "Should only be an extending load, not truncating!");
3651 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3652 "Cannot sign/zero extend a FP/Vector load!");
3653 assert(VT.isInteger() == EVT.isInteger() &&
3654 "Cannot convert from FP to Int or Int -> FP!");
3657 bool Indexed = AM != ISD::UNINDEXED;
3658 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3659 "Unindexed load with an offset!");
3661 SDVTList VTs = Indexed ?
3662 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3663 SDValue Ops[] = { Chain, Ptr, Offset };
3664 FoldingSetNodeID ID;
3665 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3666 ID.AddInteger(EVT.getRawBits());
3667 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3669 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3670 return SDValue(E, 0);
3671 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3672 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3673 Alignment, isVolatile);
3674 CSEMap.InsertNode(N, IP);
3675 AllNodes.push_back(N);
3676 return SDValue(N, 0);
3679 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3680 SDValue Chain, SDValue Ptr,
3681 const Value *SV, int SVOffset,
3682 bool isVolatile, unsigned Alignment) {
3683 SDValue Undef = getUNDEF(Ptr.getValueType());
3684 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3685 SV, SVOffset, VT, isVolatile, Alignment);
3688 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3689 SDValue Chain, SDValue Ptr,
3691 int SVOffset, MVT EVT,
3692 bool isVolatile, unsigned Alignment) {
3693 SDValue Undef = getUNDEF(Ptr.getValueType());
3694 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3695 SV, SVOffset, EVT, isVolatile, Alignment);
3699 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3700 SDValue Offset, ISD::MemIndexedMode AM) {
3701 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3702 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3703 "Load is already a indexed load!");
3704 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3705 LD->getChain(), Base, Offset, LD->getSrcValue(),
3706 LD->getSrcValueOffset(), LD->getMemoryVT(),
3707 LD->isVolatile(), LD->getAlignment());
3710 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3711 SDValue Ptr, const Value *SV, int SVOffset,
3712 bool isVolatile, unsigned Alignment) {
3713 MVT VT = Val.getValueType();
3715 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3716 Alignment = getMVTAlignment(VT);
3718 SDVTList VTs = getVTList(MVT::Other);
3719 SDValue Undef = getUNDEF(Ptr.getValueType());
3720 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3721 FoldingSetNodeID ID;
3722 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3723 ID.AddInteger(VT.getRawBits());
3724 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3725 isVolatile, Alignment));
3727 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3728 return SDValue(E, 0);
3729 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3730 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3731 VT, SV, SVOffset, Alignment, isVolatile);
3732 CSEMap.InsertNode(N, IP);
3733 AllNodes.push_back(N);
3734 return SDValue(N, 0);
3737 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3738 SDValue Ptr, const Value *SV,
3739 int SVOffset, MVT SVT,
3740 bool isVolatile, unsigned Alignment) {
3741 MVT VT = Val.getValueType();
3744 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3746 assert(VT.bitsGT(SVT) && "Not a truncation?");
3747 assert(VT.isInteger() == SVT.isInteger() &&
3748 "Can't do FP-INT conversion!");
3750 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3751 Alignment = getMVTAlignment(VT);
3753 SDVTList VTs = getVTList(MVT::Other);
3754 SDValue Undef = getUNDEF(Ptr.getValueType());
3755 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3756 FoldingSetNodeID ID;
3757 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3758 ID.AddInteger(SVT.getRawBits());
3759 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3760 isVolatile, Alignment));
3762 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3763 return SDValue(E, 0);
3764 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3765 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3766 SVT, SV, SVOffset, Alignment, isVolatile);
3767 CSEMap.InsertNode(N, IP);
3768 AllNodes.push_back(N);
3769 return SDValue(N, 0);
3773 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3774 SDValue Offset, ISD::MemIndexedMode AM) {
3775 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3776 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3777 "Store is already a indexed store!");
3778 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3779 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3780 FoldingSetNodeID ID;
3781 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3782 ID.AddInteger(ST->getMemoryVT().getRawBits());
3783 ID.AddInteger(ST->getRawSubclassData());
3785 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3786 return SDValue(E, 0);
3787 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3788 new (N) StoreSDNode(Ops, dl, VTs, AM,
3789 ST->isTruncatingStore(), ST->getMemoryVT(),
3790 ST->getSrcValue(), ST->getSrcValueOffset(),
3791 ST->getAlignment(), ST->isVolatile());
3792 CSEMap.InsertNode(N, IP);
3793 AllNodes.push_back(N);
3794 return SDValue(N, 0);
3797 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3798 SDValue Chain, SDValue Ptr,
3800 SDValue Ops[] = { Chain, Ptr, SV };
3801 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3804 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3805 const SDUse *Ops, unsigned NumOps) {
3807 case 0: return getNode(Opcode, DL, VT);
3808 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3809 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3810 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3814 // Copy from an SDUse array into an SDValue array for use with
3815 // the regular getNode logic.
3816 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3817 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3820 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3821 const SDValue *Ops, unsigned NumOps) {
3823 case 0: return getNode(Opcode, DL, VT);
3824 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3825 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3826 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3832 case ISD::SELECT_CC: {
3833 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3834 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3835 "LHS and RHS of condition must have same type!");
3836 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3837 "True and False arms of SelectCC must have same type!");
3838 assert(Ops[2].getValueType() == VT &&
3839 "select_cc node must be of same type as true and false value!");
3843 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3844 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3845 "LHS/RHS of comparison should match types!");
3852 SDVTList VTs = getVTList(VT);
3854 if (VT != MVT::Flag) {
3855 FoldingSetNodeID ID;
3856 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3859 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3860 return SDValue(E, 0);
3862 N = NodeAllocator.Allocate<SDNode>();
3863 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3864 CSEMap.InsertNode(N, IP);
3866 N = NodeAllocator.Allocate<SDNode>();
3867 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3870 AllNodes.push_back(N);
3874 return SDValue(N, 0);
3877 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3878 const std::vector<MVT> &ResultTys,
3879 const SDValue *Ops, unsigned NumOps) {
3880 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3884 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3885 const MVT *VTs, unsigned NumVTs,
3886 const SDValue *Ops, unsigned NumOps) {
3888 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3889 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3892 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3893 const SDValue *Ops, unsigned NumOps) {
3894 if (VTList.NumVTs == 1)
3895 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3898 // FIXME: figure out how to safely handle things like
3899 // int foo(int x) { return 1 << (x & 255); }
3900 // int bar() { return foo(256); }
3902 case ISD::SRA_PARTS:
3903 case ISD::SRL_PARTS:
3904 case ISD::SHL_PARTS:
3905 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3906 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3907 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3908 else if (N3.getOpcode() == ISD::AND)
3909 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3910 // If the and is only masking out bits that cannot effect the shift,
3911 // eliminate the and.
3912 unsigned NumBits = VT.getSizeInBits()*2;
3913 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3914 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3920 // Memoize the node unless it returns a flag.
3922 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3923 FoldingSetNodeID ID;
3924 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3926 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3927 return SDValue(E, 0);
3929 N = NodeAllocator.Allocate<UnarySDNode>();
3930 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3931 } else if (NumOps == 2) {
3932 N = NodeAllocator.Allocate<BinarySDNode>();
3933 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3934 } else if (NumOps == 3) {
3935 N = NodeAllocator.Allocate<TernarySDNode>();
3936 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3938 N = NodeAllocator.Allocate<SDNode>();
3939 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3941 CSEMap.InsertNode(N, IP);
3944 N = NodeAllocator.Allocate<UnarySDNode>();
3945 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3946 } else if (NumOps == 2) {
3947 N = NodeAllocator.Allocate<BinarySDNode>();
3948 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3949 } else if (NumOps == 3) {
3950 N = NodeAllocator.Allocate<TernarySDNode>();
3951 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3953 N = NodeAllocator.Allocate<SDNode>();
3954 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3957 AllNodes.push_back(N);
3961 return SDValue(N, 0);
3964 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3965 return getNode(Opcode, DL, VTList, 0, 0);
3968 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3970 SDValue Ops[] = { N1 };
3971 return getNode(Opcode, DL, VTList, Ops, 1);
3974 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3975 SDValue N1, SDValue N2) {
3976 SDValue Ops[] = { N1, N2 };
3977 return getNode(Opcode, DL, VTList, Ops, 2);
3980 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3981 SDValue N1, SDValue N2, SDValue N3) {
3982 SDValue Ops[] = { N1, N2, N3 };
3983 return getNode(Opcode, DL, VTList, Ops, 3);
3986 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3987 SDValue N1, SDValue N2, SDValue N3,
3989 SDValue Ops[] = { N1, N2, N3, N4 };
3990 return getNode(Opcode, DL, VTList, Ops, 4);
3993 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3994 SDValue N1, SDValue N2, SDValue N3,
3995 SDValue N4, SDValue N5) {
3996 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3997 return getNode(Opcode, DL, VTList, Ops, 5);
4000 SDVTList SelectionDAG::getVTList(MVT VT) {
4001 return makeVTList(SDNode::getValueTypeList(VT), 1);
4004 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4005 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4006 E = VTList.rend(); I != E; ++I)
4007 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4010 MVT *Array = Allocator.Allocate<MVT>(2);
4013 SDVTList Result = makeVTList(Array, 2);
4014 VTList.push_back(Result);
4018 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4019 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4020 E = VTList.rend(); I != E; ++I)
4021 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4025 MVT *Array = Allocator.Allocate<MVT>(3);
4029 SDVTList Result = makeVTList(Array, 3);
4030 VTList.push_back(Result);
4034 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4035 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4036 E = VTList.rend(); I != E; ++I)
4037 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4038 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4041 MVT *Array = Allocator.Allocate<MVT>(3);
4046 SDVTList Result = makeVTList(Array, 4);
4047 VTList.push_back(Result);
4051 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4053 case 0: assert(0 && "Cannot have nodes without results!");
4054 case 1: return getVTList(VTs[0]);
4055 case 2: return getVTList(VTs[0], VTs[1]);
4056 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4060 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4061 E = VTList.rend(); I != E; ++I) {
4062 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4065 bool NoMatch = false;
4066 for (unsigned i = 2; i != NumVTs; ++i)
4067 if (VTs[i] != I->VTs[i]) {
4075 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4076 std::copy(VTs, VTs+NumVTs, Array);
4077 SDVTList Result = makeVTList(Array, NumVTs);
4078 VTList.push_back(Result);
4083 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4084 /// specified operands. If the resultant node already exists in the DAG,
4085 /// this does not modify the specified node, instead it returns the node that
4086 /// already exists. If the resultant node does not exist in the DAG, the
4087 /// input node is returned. As a degenerate case, if you specify the same
4088 /// input operands as the node already has, the input node is returned.
4089 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4090 SDNode *N = InN.getNode();
4091 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4093 // Check to see if there is no change.
4094 if (Op == N->getOperand(0)) return InN;
4096 // See if the modified node already exists.
4097 void *InsertPos = 0;
4098 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4099 return SDValue(Existing, InN.getResNo());
4101 // Nope it doesn't. Remove the node from its current place in the maps.
4103 if (!RemoveNodeFromCSEMaps(N))
4106 // Now we update the operands.
4107 N->OperandList[0].set(Op);
4109 // If this gets put into a CSE map, add it.
4110 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4114 SDValue SelectionDAG::
4115 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4116 SDNode *N = InN.getNode();
4117 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4119 // Check to see if there is no change.
4120 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4121 return InN; // No operands changed, just return the input node.
4123 // See if the modified node already exists.
4124 void *InsertPos = 0;
4125 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4126 return SDValue(Existing, InN.getResNo());
4128 // Nope it doesn't. Remove the node from its current place in the maps.
4130 if (!RemoveNodeFromCSEMaps(N))
4133 // Now we update the operands.
4134 if (N->OperandList[0] != Op1)
4135 N->OperandList[0].set(Op1);
4136 if (N->OperandList[1] != Op2)
4137 N->OperandList[1].set(Op2);
4139 // If this gets put into a CSE map, add it.
4140 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4144 SDValue SelectionDAG::
4145 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4146 SDValue Ops[] = { Op1, Op2, Op3 };
4147 return UpdateNodeOperands(N, Ops, 3);
4150 SDValue SelectionDAG::
4151 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4152 SDValue Op3, SDValue Op4) {
4153 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4154 return UpdateNodeOperands(N, Ops, 4);
4157 SDValue SelectionDAG::
4158 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4159 SDValue Op3, SDValue Op4, SDValue Op5) {
4160 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4161 return UpdateNodeOperands(N, Ops, 5);
4164 SDValue SelectionDAG::
4165 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4166 SDNode *N = InN.getNode();
4167 assert(N->getNumOperands() == NumOps &&
4168 "Update with wrong number of operands");
4170 // Check to see if there is no change.
4171 bool AnyChange = false;
4172 for (unsigned i = 0; i != NumOps; ++i) {
4173 if (Ops[i] != N->getOperand(i)) {
4179 // No operands changed, just return the input node.
4180 if (!AnyChange) return InN;
4182 // See if the modified node already exists.
4183 void *InsertPos = 0;
4184 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4185 return SDValue(Existing, InN.getResNo());
4187 // Nope it doesn't. Remove the node from its current place in the maps.
4189 if (!RemoveNodeFromCSEMaps(N))
4192 // Now we update the operands.
4193 for (unsigned i = 0; i != NumOps; ++i)
4194 if (N->OperandList[i] != Ops[i])
4195 N->OperandList[i].set(Ops[i]);
4197 // If this gets put into a CSE map, add it.
4198 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4202 /// DropOperands - Release the operands and set this node to have
4204 void SDNode::DropOperands() {
4205 // Unlike the code in MorphNodeTo that does this, we don't need to
4206 // watch for dead nodes here.
4207 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4213 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4216 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4218 SDVTList VTs = getVTList(VT);
4219 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4222 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4223 MVT VT, SDValue Op1) {
4224 SDVTList VTs = getVTList(VT);
4225 SDValue Ops[] = { Op1 };
4226 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4229 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4230 MVT VT, SDValue Op1,
4232 SDVTList VTs = getVTList(VT);
4233 SDValue Ops[] = { Op1, Op2 };
4234 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4237 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4238 MVT VT, SDValue Op1,
4239 SDValue Op2, SDValue Op3) {
4240 SDVTList VTs = getVTList(VT);
4241 SDValue Ops[] = { Op1, Op2, Op3 };
4242 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4245 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4246 MVT VT, const SDValue *Ops,
4248 SDVTList VTs = getVTList(VT);
4249 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4252 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4253 MVT VT1, MVT VT2, const SDValue *Ops,
4255 SDVTList VTs = getVTList(VT1, VT2);
4256 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4259 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4261 SDVTList VTs = getVTList(VT1, VT2);
4262 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4265 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4266 MVT VT1, MVT VT2, MVT VT3,
4267 const SDValue *Ops, unsigned NumOps) {
4268 SDVTList VTs = getVTList(VT1, VT2, VT3);
4269 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4272 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4273 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4274 const SDValue *Ops, unsigned NumOps) {
4275 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4276 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4279 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4282 SDVTList VTs = getVTList(VT1, VT2);
4283 SDValue Ops[] = { Op1 };
4284 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4287 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4289 SDValue Op1, SDValue Op2) {
4290 SDVTList VTs = getVTList(VT1, VT2);
4291 SDValue Ops[] = { Op1, Op2 };
4292 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4295 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4297 SDValue Op1, SDValue Op2,
4299 SDVTList VTs = getVTList(VT1, VT2);
4300 SDValue Ops[] = { Op1, Op2, Op3 };
4301 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4304 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4305 MVT VT1, MVT VT2, MVT VT3,
4306 SDValue Op1, SDValue Op2,
4308 SDVTList VTs = getVTList(VT1, VT2, VT3);
4309 SDValue Ops[] = { Op1, Op2, Op3 };
4310 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4313 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4314 SDVTList VTs, const SDValue *Ops,
4316 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4319 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4321 SDVTList VTs = getVTList(VT);
4322 return MorphNodeTo(N, Opc, VTs, 0, 0);
4325 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4326 MVT VT, SDValue Op1) {
4327 SDVTList VTs = getVTList(VT);
4328 SDValue Ops[] = { Op1 };
4329 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4332 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4333 MVT VT, SDValue Op1,
4335 SDVTList VTs = getVTList(VT);
4336 SDValue Ops[] = { Op1, Op2 };
4337 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4340 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4341 MVT VT, SDValue Op1,
4342 SDValue Op2, SDValue Op3) {
4343 SDVTList VTs = getVTList(VT);
4344 SDValue Ops[] = { Op1, Op2, Op3 };
4345 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4348 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4349 MVT VT, const SDValue *Ops,
4351 SDVTList VTs = getVTList(VT);
4352 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4355 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4356 MVT VT1, MVT VT2, const SDValue *Ops,
4358 SDVTList VTs = getVTList(VT1, VT2);
4359 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4362 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4364 SDVTList VTs = getVTList(VT1, VT2);
4365 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4368 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4369 MVT VT1, MVT VT2, MVT VT3,
4370 const SDValue *Ops, unsigned NumOps) {
4371 SDVTList VTs = getVTList(VT1, VT2, VT3);
4372 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4375 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4378 SDVTList VTs = getVTList(VT1, VT2);
4379 SDValue Ops[] = { Op1 };
4380 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4383 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4385 SDValue Op1, SDValue Op2) {
4386 SDVTList VTs = getVTList(VT1, VT2);
4387 SDValue Ops[] = { Op1, Op2 };
4388 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4391 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4393 SDValue Op1, SDValue Op2,
4395 SDVTList VTs = getVTList(VT1, VT2);
4396 SDValue Ops[] = { Op1, Op2, Op3 };
4397 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4400 /// MorphNodeTo - These *mutate* the specified node to have the specified
4401 /// return type, opcode, and operands.
4403 /// Note that MorphNodeTo returns the resultant node. If there is already a
4404 /// node of the specified opcode and operands, it returns that node instead of
4405 /// the current one. Note that the DebugLoc need not be the same.
4407 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4408 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4409 /// node, and because it doesn't require CSE recalculation for any of
4410 /// the node's users.
4412 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4413 SDVTList VTs, const SDValue *Ops,
4415 // If an identical node already exists, use it.
4417 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4418 FoldingSetNodeID ID;
4419 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4420 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4424 if (!RemoveNodeFromCSEMaps(N))
4427 // Start the morphing.
4429 N->ValueList = VTs.VTs;
4430 N->NumValues = VTs.NumVTs;
4432 // Clear the operands list, updating used nodes to remove this from their
4433 // use list. Keep track of any operands that become dead as a result.
4434 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4435 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4437 SDNode *Used = Use.getNode();
4439 if (Used->use_empty())
4440 DeadNodeSet.insert(Used);
4443 // If NumOps is larger than the # of operands we currently have, reallocate
4444 // the operand list.
4445 if (NumOps > N->NumOperands) {
4446 if (N->OperandsNeedDelete)
4447 delete[] N->OperandList;
4449 if (N->isMachineOpcode()) {
4450 // We're creating a final node that will live unmorphed for the
4451 // remainder of the current SelectionDAG iteration, so we can allocate
4452 // the operands directly out of a pool with no recycling metadata.
4453 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4454 N->OperandsNeedDelete = false;
4456 N->OperandList = new SDUse[NumOps];
4457 N->OperandsNeedDelete = true;
4461 // Assign the new operands.
4462 N->NumOperands = NumOps;
4463 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4464 N->OperandList[i].setUser(N);
4465 N->OperandList[i].setInitial(Ops[i]);
4468 // Delete any nodes that are still dead after adding the uses for the
4470 SmallVector<SDNode *, 16> DeadNodes;
4471 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4472 E = DeadNodeSet.end(); I != E; ++I)
4473 if ((*I)->use_empty())
4474 DeadNodes.push_back(*I);
4475 RemoveDeadNodes(DeadNodes);
4478 CSEMap.InsertNode(N, IP); // Memoize the new node.
4483 /// getTargetNode - These are used for target selectors to create a new node
4484 /// with specified return type(s), target opcode, and operands.
4486 /// Note that getTargetNode returns the resultant node. If there is already a
4487 /// node of the specified opcode and operands, it returns that node instead of
4488 /// the current one.
4489 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4490 return getNode(~Opcode, dl, VT).getNode();
4493 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4495 return getNode(~Opcode, dl, VT, Op1).getNode();
4498 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4499 SDValue Op1, SDValue Op2) {
4500 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4503 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4504 SDValue Op1, SDValue Op2,
4506 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4509 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4510 const SDValue *Ops, unsigned NumOps) {
4511 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4514 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4516 SDVTList VTs = getVTList(VT1, VT2);
4518 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4521 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4522 MVT VT2, SDValue Op1) {
4523 SDVTList VTs = getVTList(VT1, VT2);
4524 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4527 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4528 MVT VT2, SDValue Op1,
4530 SDVTList VTs = getVTList(VT1, VT2);
4531 SDValue Ops[] = { Op1, Op2 };
4532 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4535 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4536 MVT VT2, SDValue Op1,
4537 SDValue Op2, SDValue Op3) {
4538 SDVTList VTs = getVTList(VT1, VT2);
4539 SDValue Ops[] = { Op1, Op2, Op3 };
4540 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4543 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4545 const SDValue *Ops, unsigned NumOps) {
4546 SDVTList VTs = getVTList(VT1, VT2);
4547 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4550 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4551 MVT VT1, MVT VT2, MVT VT3,
4552 SDValue Op1, SDValue Op2) {
4553 SDVTList VTs = getVTList(VT1, VT2, VT3);
4554 SDValue Ops[] = { Op1, Op2 };
4555 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4558 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4559 MVT VT1, MVT VT2, MVT VT3,
4560 SDValue Op1, SDValue Op2,
4562 SDVTList VTs = getVTList(VT1, VT2, VT3);
4563 SDValue Ops[] = { Op1, Op2, Op3 };
4564 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4567 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4568 MVT VT1, MVT VT2, MVT VT3,
4569 const SDValue *Ops, unsigned NumOps) {
4570 SDVTList VTs = getVTList(VT1, VT2, VT3);
4571 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4574 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4575 MVT VT2, MVT VT3, MVT VT4,
4576 const SDValue *Ops, unsigned NumOps) {
4577 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4578 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4581 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4582 const std::vector<MVT> &ResultTys,
4583 const SDValue *Ops, unsigned NumOps) {
4584 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4587 /// getNodeIfExists - Get the specified node if it's already available, or
4588 /// else return NULL.
4589 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4590 const SDValue *Ops, unsigned NumOps) {
4591 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4592 FoldingSetNodeID ID;
4593 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4595 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4601 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4602 /// This can cause recursive merging of nodes in the DAG.
4604 /// This version assumes From has a single result value.
4606 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4607 DAGUpdateListener *UpdateListener) {
4608 SDNode *From = FromN.getNode();
4609 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4610 "Cannot replace with this method!");
4611 assert(From != To.getNode() && "Cannot replace uses of with self");
4613 // Iterate over all the existing uses of From. New uses will be added
4614 // to the beginning of the use list, which we avoid visiting.
4615 // This specifically avoids visiting uses of From that arise while the
4616 // replacement is happening, because any such uses would be the result
4617 // of CSE: If an existing node looks like From after one of its operands
4618 // is replaced by To, we don't want to replace of all its users with To
4619 // too. See PR3018 for more info.
4620 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4624 // This node is about to morph, remove its old self from the CSE maps.
4625 RemoveNodeFromCSEMaps(User);
4627 // A user can appear in a use list multiple times, and when this
4628 // happens the uses are usually next to each other in the list.
4629 // To help reduce the number of CSE recomputations, process all
4630 // the uses of this user that we can find this way.
4632 SDUse &Use = UI.getUse();
4635 } while (UI != UE && *UI == User);
4637 // Now that we have modified User, add it back to the CSE maps. If it
4638 // already exists there, recursively merge the results together.
4639 AddModifiedNodeToCSEMaps(User, UpdateListener);
4643 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4644 /// This can cause recursive merging of nodes in the DAG.
4646 /// This version assumes that for each value of From, there is a
4647 /// corresponding value in To in the same position with the same type.
4649 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4650 DAGUpdateListener *UpdateListener) {
4652 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4653 assert((!From->hasAnyUseOfValue(i) ||
4654 From->getValueType(i) == To->getValueType(i)) &&
4655 "Cannot use this version of ReplaceAllUsesWith!");
4658 // Handle the trivial case.
4662 // Iterate over just the existing users of From. See the comments in
4663 // the ReplaceAllUsesWith above.
4664 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4668 // This node is about to morph, remove its old self from the CSE maps.
4669 RemoveNodeFromCSEMaps(User);
4671 // A user can appear in a use list multiple times, and when this
4672 // happens the uses are usually next to each other in the list.
4673 // To help reduce the number of CSE recomputations, process all
4674 // the uses of this user that we can find this way.
4676 SDUse &Use = UI.getUse();
4679 } while (UI != UE && *UI == User);
4681 // Now that we have modified User, add it back to the CSE maps. If it
4682 // already exists there, recursively merge the results together.
4683 AddModifiedNodeToCSEMaps(User, UpdateListener);
4687 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4688 /// This can cause recursive merging of nodes in the DAG.
4690 /// This version can replace From with any result values. To must match the
4691 /// number and types of values returned by From.
4692 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4694 DAGUpdateListener *UpdateListener) {
4695 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4696 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4698 // Iterate over just the existing users of From. See the comments in
4699 // the ReplaceAllUsesWith above.
4700 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4704 // This node is about to morph, remove its old self from the CSE maps.
4705 RemoveNodeFromCSEMaps(User);
4707 // A user can appear in a use list multiple times, and when this
4708 // happens the uses are usually next to each other in the list.
4709 // To help reduce the number of CSE recomputations, process all
4710 // the uses of this user that we can find this way.
4712 SDUse &Use = UI.getUse();
4713 const SDValue &ToOp = To[Use.getResNo()];
4716 } while (UI != UE && *UI == User);
4718 // Now that we have modified User, add it back to the CSE maps. If it
4719 // already exists there, recursively merge the results together.
4720 AddModifiedNodeToCSEMaps(User, UpdateListener);
4724 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4725 /// uses of other values produced by From.getNode() alone. The Deleted
4726 /// vector is handled the same way as for ReplaceAllUsesWith.
4727 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4728 DAGUpdateListener *UpdateListener){
4729 // Handle the really simple, really trivial case efficiently.
4730 if (From == To) return;
4732 // Handle the simple, trivial, case efficiently.
4733 if (From.getNode()->getNumValues() == 1) {
4734 ReplaceAllUsesWith(From, To, UpdateListener);
4738 // Iterate over just the existing users of From. See the comments in
4739 // the ReplaceAllUsesWith above.
4740 SDNode::use_iterator UI = From.getNode()->use_begin(),
4741 UE = From.getNode()->use_end();
4744 bool UserRemovedFromCSEMaps = false;
4746 // A user can appear in a use list multiple times, and when this
4747 // happens the uses are usually next to each other in the list.
4748 // To help reduce the number of CSE recomputations, process all
4749 // the uses of this user that we can find this way.
4751 SDUse &Use = UI.getUse();
4753 // Skip uses of different values from the same node.
4754 if (Use.getResNo() != From.getResNo()) {
4759 // If this node hasn't been modified yet, it's still in the CSE maps,
4760 // so remove its old self from the CSE maps.
4761 if (!UserRemovedFromCSEMaps) {
4762 RemoveNodeFromCSEMaps(User);
4763 UserRemovedFromCSEMaps = true;
4768 } while (UI != UE && *UI == User);
4770 // We are iterating over all uses of the From node, so if a use
4771 // doesn't use the specific value, no changes are made.
4772 if (!UserRemovedFromCSEMaps)
4775 // Now that we have modified User, add it back to the CSE maps. If it
4776 // already exists there, recursively merge the results together.
4777 AddModifiedNodeToCSEMaps(User, UpdateListener);
4782 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4783 /// to record information about a use.
4790 /// operator< - Sort Memos by User.
4791 bool operator<(const UseMemo &L, const UseMemo &R) {
4792 return (intptr_t)L.User < (intptr_t)R.User;
4796 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4797 /// uses of other values produced by From.getNode() alone. The same value
4798 /// may appear in both the From and To list. The Deleted vector is
4799 /// handled the same way as for ReplaceAllUsesWith.
4800 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4803 DAGUpdateListener *UpdateListener){
4804 // Handle the simple, trivial case efficiently.
4806 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4808 // Read up all the uses and make records of them. This helps
4809 // processing new uses that are introduced during the
4810 // replacement process.
4811 SmallVector<UseMemo, 4> Uses;
4812 for (unsigned i = 0; i != Num; ++i) {
4813 unsigned FromResNo = From[i].getResNo();
4814 SDNode *FromNode = From[i].getNode();
4815 for (SDNode::use_iterator UI = FromNode->use_begin(),
4816 E = FromNode->use_end(); UI != E; ++UI) {
4817 SDUse &Use = UI.getUse();
4818 if (Use.getResNo() == FromResNo) {
4819 UseMemo Memo = { *UI, i, &Use };
4820 Uses.push_back(Memo);
4825 // Sort the uses, so that all the uses from a given User are together.
4826 std::sort(Uses.begin(), Uses.end());
4828 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4829 UseIndex != UseIndexEnd; ) {
4830 // We know that this user uses some value of From. If it is the right
4831 // value, update it.
4832 SDNode *User = Uses[UseIndex].User;
4834 // This node is about to morph, remove its old self from the CSE maps.
4835 RemoveNodeFromCSEMaps(User);
4837 // The Uses array is sorted, so all the uses for a given User
4838 // are next to each other in the list.
4839 // To help reduce the number of CSE recomputations, process all
4840 // the uses of this user that we can find this way.
4842 unsigned i = Uses[UseIndex].Index;
4843 SDUse &Use = *Uses[UseIndex].Use;
4847 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4849 // Now that we have modified User, add it back to the CSE maps. If it
4850 // already exists there, recursively merge the results together.
4851 AddModifiedNodeToCSEMaps(User, UpdateListener);
4855 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4856 /// based on their topological order. It returns the maximum id and a vector
4857 /// of the SDNodes* in assigned order by reference.
4858 unsigned SelectionDAG::AssignTopologicalOrder() {
4860 unsigned DAGSize = 0;
4862 // SortedPos tracks the progress of the algorithm. Nodes before it are
4863 // sorted, nodes after it are unsorted. When the algorithm completes
4864 // it is at the end of the list.
4865 allnodes_iterator SortedPos = allnodes_begin();
4867 // Visit all the nodes. Move nodes with no operands to the front of
4868 // the list immediately. Annotate nodes that do have operands with their
4869 // operand count. Before we do this, the Node Id fields of the nodes
4870 // may contain arbitrary values. After, the Node Id fields for nodes
4871 // before SortedPos will contain the topological sort index, and the
4872 // Node Id fields for nodes At SortedPos and after will contain the
4873 // count of outstanding operands.
4874 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4876 unsigned Degree = N->getNumOperands();
4878 // A node with no uses, add it to the result array immediately.
4879 N->setNodeId(DAGSize++);
4880 allnodes_iterator Q = N;
4882 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4885 // Temporarily use the Node Id as scratch space for the degree count.
4886 N->setNodeId(Degree);
4890 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4891 // such that by the time the end is reached all nodes will be sorted.
4892 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4894 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4897 unsigned Degree = P->getNodeId();
4900 // All of P's operands are sorted, so P may sorted now.
4901 P->setNodeId(DAGSize++);
4903 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4906 // Update P's outstanding operand count.
4907 P->setNodeId(Degree);
4912 assert(SortedPos == AllNodes.end() &&
4913 "Topological sort incomplete!");
4914 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4915 "First node in topological sort is not the entry token!");
4916 assert(AllNodes.front().getNodeId() == 0 &&
4917 "First node in topological sort has non-zero id!");
4918 assert(AllNodes.front().getNumOperands() == 0 &&
4919 "First node in topological sort has operands!");
4920 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4921 "Last node in topologic sort has unexpected id!");
4922 assert(AllNodes.back().use_empty() &&
4923 "Last node in topologic sort has users!");
4924 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4930 //===----------------------------------------------------------------------===//
4932 //===----------------------------------------------------------------------===//
4934 HandleSDNode::~HandleSDNode() {
4938 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4939 MVT VT, int64_t o, unsigned char TF)
4940 : SDNode(isa<GlobalVariable>(GA) &&
4941 cast<GlobalVariable>(GA)->isThreadLocal() ?
4943 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4945 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4946 DebugLoc::getUnknownLoc(), getSDVTList(VT)),
4947 Offset(o), TargetFlags(TF) {
4948 TheGlobal = const_cast<GlobalValue*>(GA);
4951 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4952 const Value *srcValue, int SVO,
4953 unsigned alignment, bool vol)
4954 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4955 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4956 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4957 assert(getAlignment() == alignment && "Alignment representation error!");
4958 assert(isVolatile() == vol && "Volatile representation error!");
4961 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4963 unsigned NumOps, MVT memvt, const Value *srcValue,
4964 int SVO, unsigned alignment, bool vol)
4965 : SDNode(Opc, dl, VTs, Ops, NumOps),
4966 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4967 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4968 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4969 assert(getAlignment() == alignment && "Alignment representation error!");
4970 assert(isVolatile() == vol && "Volatile representation error!");
4973 /// getMemOperand - Return a MachineMemOperand object describing the memory
4974 /// reference performed by this memory reference.
4975 MachineMemOperand MemSDNode::getMemOperand() const {
4977 if (isa<LoadSDNode>(this))
4978 Flags = MachineMemOperand::MOLoad;
4979 else if (isa<StoreSDNode>(this))
4980 Flags = MachineMemOperand::MOStore;
4981 else if (isa<AtomicSDNode>(this)) {
4982 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4985 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4986 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4987 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4988 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4991 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4992 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4994 // Check if the memory reference references a frame index
4995 const FrameIndexSDNode *FI =
4996 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4997 if (!getSrcValue() && FI)
4998 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4999 Flags, 0, Size, getAlignment());
5001 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5002 Size, getAlignment());
5005 /// Profile - Gather unique data for the node.
5007 void SDNode::Profile(FoldingSetNodeID &ID) const {
5008 AddNodeIDNode(ID, this);
5011 static ManagedStatic<std::set<MVT, MVT::compareRawBits> > EVTs;
5012 static MVT VTs[MVT::LAST_VALUETYPE];
5013 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5015 /// getValueTypeList - Return a pointer to the specified value type.
5017 const MVT *SDNode::getValueTypeList(MVT VT) {
5018 sys::SmartScopedLock<true> Lock(&*VTMutex);
5019 if (VT.isExtended()) {
5020 return &(*EVTs->insert(VT).first);
5022 VTs[VT.getSimpleVT()] = VT;
5023 return &VTs[VT.getSimpleVT()];
5027 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5028 /// indicated value. This method ignores uses of other values defined by this
5030 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5031 assert(Value < getNumValues() && "Bad value!");
5033 // TODO: Only iterate over uses of a given value of the node
5034 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5035 if (UI.getUse().getResNo() == Value) {
5042 // Found exactly the right number of uses?
5047 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5048 /// value. This method ignores uses of other values defined by this operation.
5049 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5050 assert(Value < getNumValues() && "Bad value!");
5052 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5053 if (UI.getUse().getResNo() == Value)
5060 /// isOnlyUserOf - Return true if this node is the only use of N.
5062 bool SDNode::isOnlyUserOf(SDNode *N) const {
5064 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5075 /// isOperand - Return true if this node is an operand of N.
5077 bool SDValue::isOperandOf(SDNode *N) const {
5078 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5079 if (*this == N->getOperand(i))
5084 bool SDNode::isOperandOf(SDNode *N) const {
5085 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5086 if (this == N->OperandList[i].getNode())
5091 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5092 /// be a chain) reaches the specified operand without crossing any
5093 /// side-effecting instructions. In practice, this looks through token
5094 /// factors and non-volatile loads. In order to remain efficient, this only
5095 /// looks a couple of nodes in, it does not do an exhaustive search.
5096 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5097 unsigned Depth) const {
5098 if (*this == Dest) return true;
5100 // Don't search too deeply, we just want to be able to see through
5101 // TokenFactor's etc.
5102 if (Depth == 0) return false;
5104 // If this is a token factor, all inputs to the TF happen in parallel. If any
5105 // of the operands of the TF reach dest, then we can do the xform.
5106 if (getOpcode() == ISD::TokenFactor) {
5107 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5108 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5113 // Loads don't have side effects, look through them.
5114 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5115 if (!Ld->isVolatile())
5116 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5122 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5123 SmallPtrSet<SDNode *, 32> &Visited) {
5124 if (found || !Visited.insert(N))
5127 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5128 SDNode *Op = N->getOperand(i).getNode();
5133 findPredecessor(Op, P, found, Visited);
5137 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5138 /// is either an operand of N or it can be reached by recursively traversing
5139 /// up the operands.
5140 /// NOTE: this is an expensive method. Use it carefully.
5141 bool SDNode::isPredecessorOf(SDNode *N) const {
5142 SmallPtrSet<SDNode *, 32> Visited;
5144 findPredecessor(N, this, found, Visited);
5148 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5149 assert(Num < NumOperands && "Invalid child # of SDNode!");
5150 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5153 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5154 switch (getOpcode()) {
5156 if (getOpcode() < ISD::BUILTIN_OP_END)
5157 return "<<Unknown DAG Node>>";
5158 if (isMachineOpcode()) {
5160 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5161 if (getMachineOpcode() < TII->getNumOpcodes())
5162 return TII->get(getMachineOpcode()).getName();
5163 return "<<Unknown Machine Node>>";
5166 const TargetLowering &TLI = G->getTargetLoweringInfo();
5167 const char *Name = TLI.getTargetNodeName(getOpcode());
5168 if (Name) return Name;
5169 return "<<Unknown Target Node>>";
5171 return "<<Unknown Node>>";
5174 case ISD::DELETED_NODE:
5175 return "<<Deleted Node!>>";
5177 case ISD::PREFETCH: return "Prefetch";
5178 case ISD::MEMBARRIER: return "MemBarrier";
5179 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5180 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5181 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5182 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5183 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5184 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5185 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5186 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5187 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5188 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5189 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5190 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5191 case ISD::PCMARKER: return "PCMarker";
5192 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5193 case ISD::SRCVALUE: return "SrcValue";
5194 case ISD::MEMOPERAND: return "MemOperand";
5195 case ISD::EntryToken: return "EntryToken";
5196 case ISD::TokenFactor: return "TokenFactor";
5197 case ISD::AssertSext: return "AssertSext";
5198 case ISD::AssertZext: return "AssertZext";
5200 case ISD::BasicBlock: return "BasicBlock";
5201 case ISD::ARG_FLAGS: return "ArgFlags";
5202 case ISD::VALUETYPE: return "ValueType";
5203 case ISD::Register: return "Register";
5205 case ISD::Constant: return "Constant";
5206 case ISD::ConstantFP: return "ConstantFP";
5207 case ISD::GlobalAddress: return "GlobalAddress";
5208 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5209 case ISD::FrameIndex: return "FrameIndex";
5210 case ISD::JumpTable: return "JumpTable";
5211 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5212 case ISD::RETURNADDR: return "RETURNADDR";
5213 case ISD::FRAMEADDR: return "FRAMEADDR";
5214 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5215 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5216 case ISD::EHSELECTION: return "EHSELECTION";
5217 case ISD::EH_RETURN: return "EH_RETURN";
5218 case ISD::ConstantPool: return "ConstantPool";
5219 case ISD::ExternalSymbol: return "ExternalSymbol";
5220 case ISD::INTRINSIC_WO_CHAIN: {
5221 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5222 return Intrinsic::getName((Intrinsic::ID)IID);
5224 case ISD::INTRINSIC_VOID:
5225 case ISD::INTRINSIC_W_CHAIN: {
5226 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5227 return Intrinsic::getName((Intrinsic::ID)IID);
5230 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5231 case ISD::TargetConstant: return "TargetConstant";
5232 case ISD::TargetConstantFP:return "TargetConstantFP";
5233 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5234 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5235 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5236 case ISD::TargetJumpTable: return "TargetJumpTable";
5237 case ISD::TargetConstantPool: return "TargetConstantPool";
5238 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5240 case ISD::CopyToReg: return "CopyToReg";
5241 case ISD::CopyFromReg: return "CopyFromReg";
5242 case ISD::UNDEF: return "undef";
5243 case ISD::MERGE_VALUES: return "merge_values";
5244 case ISD::INLINEASM: return "inlineasm";
5245 case ISD::DBG_LABEL: return "dbg_label";
5246 case ISD::EH_LABEL: return "eh_label";
5247 case ISD::DECLARE: return "declare";
5248 case ISD::HANDLENODE: return "handlenode";
5249 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5250 case ISD::CALL: return "call";
5253 case ISD::FABS: return "fabs";
5254 case ISD::FNEG: return "fneg";
5255 case ISD::FSQRT: return "fsqrt";
5256 case ISD::FSIN: return "fsin";
5257 case ISD::FCOS: return "fcos";
5258 case ISD::FPOWI: return "fpowi";
5259 case ISD::FPOW: return "fpow";
5260 case ISD::FTRUNC: return "ftrunc";
5261 case ISD::FFLOOR: return "ffloor";
5262 case ISD::FCEIL: return "fceil";
5263 case ISD::FRINT: return "frint";
5264 case ISD::FNEARBYINT: return "fnearbyint";
5267 case ISD::ADD: return "add";
5268 case ISD::SUB: return "sub";
5269 case ISD::MUL: return "mul";
5270 case ISD::MULHU: return "mulhu";
5271 case ISD::MULHS: return "mulhs";
5272 case ISD::SDIV: return "sdiv";
5273 case ISD::UDIV: return "udiv";
5274 case ISD::SREM: return "srem";
5275 case ISD::UREM: return "urem";
5276 case ISD::SMUL_LOHI: return "smul_lohi";
5277 case ISD::UMUL_LOHI: return "umul_lohi";
5278 case ISD::SDIVREM: return "sdivrem";
5279 case ISD::UDIVREM: return "udivrem";
5280 case ISD::AND: return "and";
5281 case ISD::OR: return "or";
5282 case ISD::XOR: return "xor";
5283 case ISD::SHL: return "shl";
5284 case ISD::SRA: return "sra";
5285 case ISD::SRL: return "srl";
5286 case ISD::ROTL: return "rotl";
5287 case ISD::ROTR: return "rotr";
5288 case ISD::FADD: return "fadd";
5289 case ISD::FSUB: return "fsub";
5290 case ISD::FMUL: return "fmul";
5291 case ISD::FDIV: return "fdiv";
5292 case ISD::FREM: return "frem";
5293 case ISD::FCOPYSIGN: return "fcopysign";
5294 case ISD::FGETSIGN: return "fgetsign";
5296 case ISD::SETCC: return "setcc";
5297 case ISD::VSETCC: return "vsetcc";
5298 case ISD::SELECT: return "select";
5299 case ISD::SELECT_CC: return "select_cc";
5300 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5301 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5302 case ISD::CONCAT_VECTORS: return "concat_vectors";
5303 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5304 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5305 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5306 case ISD::CARRY_FALSE: return "carry_false";
5307 case ISD::ADDC: return "addc";
5308 case ISD::ADDE: return "adde";
5309 case ISD::SADDO: return "saddo";
5310 case ISD::UADDO: return "uaddo";
5311 case ISD::SSUBO: return "ssubo";
5312 case ISD::USUBO: return "usubo";
5313 case ISD::SMULO: return "smulo";
5314 case ISD::UMULO: return "umulo";
5315 case ISD::SUBC: return "subc";
5316 case ISD::SUBE: return "sube";
5317 case ISD::SHL_PARTS: return "shl_parts";
5318 case ISD::SRA_PARTS: return "sra_parts";
5319 case ISD::SRL_PARTS: return "srl_parts";
5321 // Conversion operators.
5322 case ISD::SIGN_EXTEND: return "sign_extend";
5323 case ISD::ZERO_EXTEND: return "zero_extend";
5324 case ISD::ANY_EXTEND: return "any_extend";
5325 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5326 case ISD::TRUNCATE: return "truncate";
5327 case ISD::FP_ROUND: return "fp_round";
5328 case ISD::FLT_ROUNDS_: return "flt_rounds";
5329 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5330 case ISD::FP_EXTEND: return "fp_extend";
5332 case ISD::SINT_TO_FP: return "sint_to_fp";
5333 case ISD::UINT_TO_FP: return "uint_to_fp";
5334 case ISD::FP_TO_SINT: return "fp_to_sint";
5335 case ISD::FP_TO_UINT: return "fp_to_uint";
5336 case ISD::BIT_CONVERT: return "bit_convert";
5338 case ISD::CONVERT_RNDSAT: {
5339 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5340 default: assert(0 && "Unknown cvt code!");
5341 case ISD::CVT_FF: return "cvt_ff";
5342 case ISD::CVT_FS: return "cvt_fs";
5343 case ISD::CVT_FU: return "cvt_fu";
5344 case ISD::CVT_SF: return "cvt_sf";
5345 case ISD::CVT_UF: return "cvt_uf";
5346 case ISD::CVT_SS: return "cvt_ss";
5347 case ISD::CVT_SU: return "cvt_su";
5348 case ISD::CVT_US: return "cvt_us";
5349 case ISD::CVT_UU: return "cvt_uu";
5353 // Control flow instructions
5354 case ISD::BR: return "br";
5355 case ISD::BRIND: return "brind";
5356 case ISD::BR_JT: return "br_jt";
5357 case ISD::BRCOND: return "brcond";
5358 case ISD::BR_CC: return "br_cc";
5359 case ISD::RET: return "ret";
5360 case ISD::CALLSEQ_START: return "callseq_start";
5361 case ISD::CALLSEQ_END: return "callseq_end";
5364 case ISD::LOAD: return "load";
5365 case ISD::STORE: return "store";
5366 case ISD::VAARG: return "vaarg";
5367 case ISD::VACOPY: return "vacopy";
5368 case ISD::VAEND: return "vaend";
5369 case ISD::VASTART: return "vastart";
5370 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5371 case ISD::EXTRACT_ELEMENT: return "extract_element";
5372 case ISD::BUILD_PAIR: return "build_pair";
5373 case ISD::STACKSAVE: return "stacksave";
5374 case ISD::STACKRESTORE: return "stackrestore";
5375 case ISD::TRAP: return "trap";
5378 case ISD::BSWAP: return "bswap";
5379 case ISD::CTPOP: return "ctpop";
5380 case ISD::CTTZ: return "cttz";
5381 case ISD::CTLZ: return "ctlz";
5384 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5385 case ISD::DEBUG_LOC: return "debug_loc";
5388 case ISD::TRAMPOLINE: return "trampoline";
5391 switch (cast<CondCodeSDNode>(this)->get()) {
5392 default: assert(0 && "Unknown setcc condition!");
5393 case ISD::SETOEQ: return "setoeq";
5394 case ISD::SETOGT: return "setogt";
5395 case ISD::SETOGE: return "setoge";
5396 case ISD::SETOLT: return "setolt";
5397 case ISD::SETOLE: return "setole";
5398 case ISD::SETONE: return "setone";
5400 case ISD::SETO: return "seto";
5401 case ISD::SETUO: return "setuo";
5402 case ISD::SETUEQ: return "setue";
5403 case ISD::SETUGT: return "setugt";
5404 case ISD::SETUGE: return "setuge";
5405 case ISD::SETULT: return "setult";
5406 case ISD::SETULE: return "setule";
5407 case ISD::SETUNE: return "setune";
5409 case ISD::SETEQ: return "seteq";
5410 case ISD::SETGT: return "setgt";
5411 case ISD::SETGE: return "setge";
5412 case ISD::SETLT: return "setlt";
5413 case ISD::SETLE: return "setle";
5414 case ISD::SETNE: return "setne";
5419 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5428 return "<post-inc>";
5430 return "<post-dec>";
5434 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5435 std::string S = "< ";
5449 if (getByValAlign())
5450 S += "byval-align:" + utostr(getByValAlign()) + " ";
5452 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5454 S += "byval-size:" + utostr(getByValSize()) + " ";
5458 void SDNode::dump() const { dump(0); }
5459 void SDNode::dump(const SelectionDAG *G) const {
5463 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5464 OS << (void*)this << ": ";
5466 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5468 if (getValueType(i) == MVT::Other)
5471 OS << getValueType(i).getMVTString();
5473 OS << " = " << getOperationName(G);
5476 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5477 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5478 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5480 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5481 int Idx = SVN->getMaskElt(i);
5491 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5492 OS << '<' << CSDN->getAPIntValue() << '>';
5493 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5494 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5495 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5496 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5497 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5500 CSDN->getValueAPF().bitcastToAPInt().dump();
5503 } else if (const GlobalAddressSDNode *GADN =
5504 dyn_cast<GlobalAddressSDNode>(this)) {
5505 int64_t offset = GADN->getOffset();
5507 WriteAsOperand(OS, GADN->getGlobal());
5510 OS << " + " << offset;
5512 OS << " " << offset;
5513 if (unsigned char TF = GADN->getTargetFlags())
5514 OS << " [TF=" << TF << ']';
5515 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5516 OS << "<" << FIDN->getIndex() << ">";
5517 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5518 OS << "<" << JTDN->getIndex() << ">";
5519 if (unsigned char TF = JTDN->getTargetFlags())
5520 OS << " [TF=" << TF << ']';
5521 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5522 int offset = CP->getOffset();
5523 if (CP->isMachineConstantPoolEntry())
5524 OS << "<" << *CP->getMachineCPVal() << ">";
5526 OS << "<" << *CP->getConstVal() << ">";
5528 OS << " + " << offset;
5530 OS << " " << offset;
5531 if (unsigned char TF = CP->getTargetFlags())
5532 OS << " [TF=" << TF << ']';
5533 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5535 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5537 OS << LBB->getName() << " ";
5538 OS << (const void*)BBDN->getBasicBlock() << ">";
5539 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5540 if (G && R->getReg() &&
5541 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5542 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5544 OS << " #" << R->getReg();
5546 } else if (const ExternalSymbolSDNode *ES =
5547 dyn_cast<ExternalSymbolSDNode>(this)) {
5548 OS << "'" << ES->getSymbol() << "'";
5549 if (unsigned char TF = GADN->getTargetFlags())
5550 OS << " [TF=" << TF << ']';
5551 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5553 OS << "<" << M->getValue() << ">";
5556 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5557 if (M->MO.getValue())
5558 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5560 OS << "<null:" << M->MO.getOffset() << ">";
5561 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5562 OS << N->getArgFlags().getArgFlagsString();
5563 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5564 OS << ":" << N->getVT().getMVTString();
5566 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5567 const Value *SrcValue = LD->getSrcValue();
5568 int SrcOffset = LD->getSrcValueOffset();
5574 OS << ":" << SrcOffset << ">";
5577 switch (LD->getExtensionType()) {
5578 default: doExt = false; break;
5579 case ISD::EXTLOAD: OS << " <anyext "; break;
5580 case ISD::SEXTLOAD: OS << " <sext "; break;
5581 case ISD::ZEXTLOAD: OS << " <zext "; break;
5584 OS << LD->getMemoryVT().getMVTString() << ">";
5586 const char *AM = getIndexedModeName(LD->getAddressingMode());
5589 if (LD->isVolatile())
5590 OS << " <volatile>";
5591 OS << " alignment=" << LD->getAlignment();
5592 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5593 const Value *SrcValue = ST->getSrcValue();
5594 int SrcOffset = ST->getSrcValueOffset();
5600 OS << ":" << SrcOffset << ">";
5602 if (ST->isTruncatingStore())
5603 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5605 const char *AM = getIndexedModeName(ST->getAddressingMode());
5608 if (ST->isVolatile())
5609 OS << " <volatile>";
5610 OS << " alignment=" << ST->getAlignment();
5611 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5612 const Value *SrcValue = AT->getSrcValue();
5613 int SrcOffset = AT->getSrcValueOffset();
5619 OS << ":" << SrcOffset << ">";
5620 if (AT->isVolatile())
5621 OS << " <volatile>";
5622 OS << " alignment=" << AT->getAlignment();
5626 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5629 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5631 OS << (void*)getOperand(i).getNode();
5632 if (unsigned RN = getOperand(i).getResNo())
5635 print_details(OS, G);
5638 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5639 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5640 if (N->getOperand(i).getNode()->hasOneUse())
5641 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5643 cerr << "\n" << std::string(indent+2, ' ')
5644 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5647 cerr << "\n" << std::string(indent, ' ');
5651 void SelectionDAG::dump() const {
5652 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5654 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5656 const SDNode *N = I;
5657 if (!N->hasOneUse() && N != getRoot().getNode())
5658 DumpNodes(N, 2, this);
5661 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5666 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5668 print_details(OS, G);
5671 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5672 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5673 const SelectionDAG *G, VisitedSDNodeSet &once) {
5674 if (!once.insert(N)) // If we've been here before, return now.
5676 // Dump the current SDNode, but don't end the line yet.
5677 OS << std::string(indent, ' ');
5679 // Having printed this SDNode, walk the children:
5680 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5681 const SDNode *child = N->getOperand(i).getNode();
5684 if (child->getNumOperands() == 0) {
5685 // This child has no grandchildren; print it inline right here.
5686 child->printr(OS, G);
5688 } else { // Just the address. FIXME: also print the child's opcode
5690 if (unsigned RN = N->getOperand(i).getResNo())
5695 // Dump children that have grandchildren on their own line(s).
5696 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5697 const SDNode *child = N->getOperand(i).getNode();
5698 DumpNodesr(OS, child, indent+2, G, once);
5702 void SDNode::dumpr() const {
5703 VisitedSDNodeSet once;
5704 DumpNodesr(errs(), this, 0, 0, once);
5708 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5709 unsigned GlobalAddressSDNode::getAddressSpace() const {
5710 return getGlobal()->getType()->getAddressSpace();
5714 const Type *ConstantPoolSDNode::getType() const {
5715 if (isMachineConstantPoolEntry())
5716 return Val.MachineCPVal->getType();
5717 return Val.ConstVal->getType();
5720 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5722 unsigned &SplatBitSize,
5724 unsigned MinSplatBits) {
5725 MVT VT = getValueType(0);
5726 assert(VT.isVector() && "Expected a vector type");
5727 unsigned sz = VT.getSizeInBits();
5728 if (MinSplatBits > sz)
5731 SplatValue = APInt(sz, 0);
5732 SplatUndef = APInt(sz, 0);
5734 // Get the bits. Bits with undefined values (when the corresponding element
5735 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5736 // in SplatValue. If any of the values are not constant, give up and return
5738 unsigned int nOps = getNumOperands();
5739 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5740 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5741 for (unsigned i = 0; i < nOps; ++i) {
5742 SDValue OpVal = getOperand(i);
5743 unsigned BitPos = i * EltBitSize;
5745 if (OpVal.getOpcode() == ISD::UNDEF)
5746 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5747 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5748 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5749 zextOrTrunc(sz) << BitPos);
5750 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5751 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5756 // The build_vector is all constants or undefs. Find the smallest element
5757 // size that splats the vector.
5759 HasAnyUndefs = (SplatUndef != 0);
5762 unsigned HalfSize = sz / 2;
5763 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5764 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5765 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5766 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5768 // If the two halves do not match (ignoring undef bits), stop here.
5769 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5770 MinSplatBits > HalfSize)
5773 SplatValue = HighValue | LowValue;
5774 SplatUndef = HighUndef & LowUndef;
5783 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, MVT VT) {
5784 // Find the first non-undef value in the shuffle mask.
5786 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5789 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5791 // Make sure all remaining elements are either undef or the same as the first
5793 for (int Idx = Mask[i]; i != e; ++i)
5794 if (Mask[i] >= 0 && Mask[i] != Idx)