1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/ValueTracking.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/Constants.h"
30 #include "llvm/DataLayout.h"
31 #include "llvm/DebugInfo.h"
32 #include "llvm/DerivedTypes.h"
33 #include "llvm/Function.h"
34 #include "llvm/GlobalAlias.h"
35 #include "llvm/GlobalVariable.h"
36 #include "llvm/Intrinsics.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/ManagedStatic.h"
41 #include "llvm/Support/MathExtras.h"
42 #include "llvm/Support/Mutex.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/Target/TargetInstrInfo.h"
45 #include "llvm/Target/TargetIntrinsicInfo.h"
46 #include "llvm/Target/TargetLowering.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "llvm/Target/TargetOptions.h"
49 #include "llvm/Target/TargetRegisterInfo.h"
50 #include "llvm/Target/TargetSelectionDAGInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 // Default null implementations of the callbacks.
75 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
76 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
78 //===----------------------------------------------------------------------===//
79 // ConstantFPSDNode Class
80 //===----------------------------------------------------------------------===//
82 /// isExactlyValue - We don't rely on operator== working on double values, as
83 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
84 /// As such, this method can be used to do an exact bit-for-bit comparison of
85 /// two floating point values.
86 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
87 return getValueAPF().bitwiseIsEqual(V);
90 bool ConstantFPSDNode::isValueValidForType(EVT VT,
92 assert(VT.isFloatingPoint() && "Can only convert between FP types");
94 // convert modifies in place, so make a copy.
95 APFloat Val2 = APFloat(Val);
97 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
102 //===----------------------------------------------------------------------===//
104 //===----------------------------------------------------------------------===//
106 /// isBuildVectorAllOnes - Return true if the specified node is a
107 /// BUILD_VECTOR where all of the elements are ~0 or undef.
108 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
109 // Look through a bit convert.
110 if (N->getOpcode() == ISD::BITCAST)
111 N = N->getOperand(0).getNode();
113 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
115 unsigned i = 0, e = N->getNumOperands();
117 // Skip over all of the undef values.
118 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
121 // Do not accept an all-undef vector.
122 if (i == e) return false;
124 // Do not accept build_vectors that aren't all constants or which have non-~0
125 // elements. We have to be a bit careful here, as the type of the constant
126 // may not be the same as the type of the vector elements due to type
127 // legalization (the elements are promoted to a legal type for the target and
128 // a vector of a type may be legal when the base element type is not).
129 // We only want to check enough bits to cover the vector elements, because
130 // we care if the resultant vector is all ones, not whether the individual
132 SDValue NotZero = N->getOperand(i);
133 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
134 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
135 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
137 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
138 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
143 // Okay, we have at least one ~0 value, check to see if the rest match or are
144 // undefs. Even with the above element type twiddling, this should be OK, as
145 // the same type legalization should have applied to all the elements.
146 for (++i; i != e; ++i)
147 if (N->getOperand(i) != NotZero &&
148 N->getOperand(i).getOpcode() != ISD::UNDEF)
154 /// isBuildVectorAllZeros - Return true if the specified node is a
155 /// BUILD_VECTOR where all of the elements are 0 or undef.
156 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
157 // Look through a bit convert.
158 if (N->getOpcode() == ISD::BITCAST)
159 N = N->getOperand(0).getNode();
161 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
163 unsigned i = 0, e = N->getNumOperands();
165 // Skip over all of the undef values.
166 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
169 // Do not accept an all-undef vector.
170 if (i == e) return false;
172 // Do not accept build_vectors that aren't all constants or which have non-0
174 SDValue Zero = N->getOperand(i);
175 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
176 if (!CN->isNullValue())
178 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
179 if (!CFPN->getValueAPF().isPosZero())
184 // Okay, we have at least one 0 value, check to see if the rest match or are
186 for (++i; i != e; ++i)
187 if (N->getOperand(i) != Zero &&
188 N->getOperand(i).getOpcode() != ISD::UNDEF)
193 /// isScalarToVector - Return true if the specified node is a
194 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
195 /// element is not an undef.
196 bool ISD::isScalarToVector(const SDNode *N) {
197 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
200 if (N->getOpcode() != ISD::BUILD_VECTOR)
202 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
204 unsigned NumElems = N->getNumOperands();
207 for (unsigned i = 1; i < NumElems; ++i) {
208 SDValue V = N->getOperand(i);
209 if (V.getOpcode() != ISD::UNDEF)
215 /// allOperandsUndef - Return true if the node has at least one operand
216 /// and all operands of the specified node are ISD::UNDEF.
217 bool ISD::allOperandsUndef(const SDNode *N) {
218 // Return false if the node has no operands.
219 // This is "logically inconsistent" with the definition of "all" but
220 // is probably the desired behavior.
221 if (N->getNumOperands() == 0)
224 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
225 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
231 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
232 /// when given the operation for (X op Y).
233 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
234 // To perform this operation, we just need to swap the L and G bits of the
236 unsigned OldL = (Operation >> 2) & 1;
237 unsigned OldG = (Operation >> 1) & 1;
238 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
239 (OldL << 1) | // New G bit
240 (OldG << 2)); // New L bit.
243 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
244 /// 'op' is a valid SetCC operation.
245 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
246 unsigned Operation = Op;
248 Operation ^= 7; // Flip L, G, E bits, but not U.
250 Operation ^= 15; // Flip all of the condition bits.
252 if (Operation > ISD::SETTRUE2)
253 Operation &= ~8; // Don't let N and U bits get set.
255 return ISD::CondCode(Operation);
259 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
260 /// signed operation and 2 if the result is an unsigned comparison. Return zero
261 /// if the operation does not depend on the sign of the input (setne and seteq).
262 static int isSignedOp(ISD::CondCode Opcode) {
264 default: llvm_unreachable("Illegal integer setcc operation!");
266 case ISD::SETNE: return 0;
270 case ISD::SETGE: return 1;
274 case ISD::SETUGE: return 2;
278 /// getSetCCOrOperation - Return the result of a logical OR between different
279 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
280 /// returns SETCC_INVALID if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed integer setcc with an unsigned integer setcc.
286 return ISD::SETCC_INVALID;
288 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
290 // If the N and U bits get set then the resultant comparison DOES suddenly
291 // care about orderedness, and is true when ordered.
292 if (Op > ISD::SETTRUE2)
293 Op &= ~16; // Clear the U bit if the N bit is set.
295 // Canonicalize illegal integer setcc's.
296 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
299 return ISD::CondCode(Op);
302 /// getSetCCAndOperation - Return the result of a logical AND between different
303 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
304 /// function returns zero if it is not possible to represent the resultant
306 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
308 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
309 // Cannot fold a signed setcc with an unsigned setcc.
310 return ISD::SETCC_INVALID;
312 // Combine all of the condition bits.
313 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
315 // Canonicalize illegal integer setcc's.
319 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
320 case ISD::SETOEQ: // SETEQ & SETU[LG]E
321 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
322 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
323 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
330 //===----------------------------------------------------------------------===//
331 // SDNode Profile Support
332 //===----------------------------------------------------------------------===//
334 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
336 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
340 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
341 /// solely with their pointer.
342 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
343 ID.AddPointer(VTList.VTs);
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDValue *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
358 static void AddNodeIDOperands(FoldingSetNodeID &ID,
359 const SDUse *Ops, unsigned NumOps) {
360 for (; NumOps; --NumOps, ++Ops) {
361 ID.AddPointer(Ops->getNode());
362 ID.AddInteger(Ops->getResNo());
366 static void AddNodeIDNode(FoldingSetNodeID &ID,
367 unsigned short OpC, SDVTList VTList,
368 const SDValue *OpList, unsigned N) {
369 AddNodeIDOpcode(ID, OpC);
370 AddNodeIDValueTypes(ID, VTList);
371 AddNodeIDOperands(ID, OpList, N);
374 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
376 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
377 switch (N->getOpcode()) {
378 case ISD::TargetExternalSymbol:
379 case ISD::ExternalSymbol:
380 llvm_unreachable("Should only be used on nodes with operands");
381 default: break; // Normal nodes don't need extra info.
382 case ISD::TargetConstant:
384 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
386 case ISD::TargetConstantFP:
387 case ISD::ConstantFP: {
388 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
391 case ISD::TargetGlobalAddress:
392 case ISD::GlobalAddress:
393 case ISD::TargetGlobalTLSAddress:
394 case ISD::GlobalTLSAddress: {
395 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
396 ID.AddPointer(GA->getGlobal());
397 ID.AddInteger(GA->getOffset());
398 ID.AddInteger(GA->getTargetFlags());
399 ID.AddInteger(GA->getAddressSpace());
402 case ISD::BasicBlock:
403 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
406 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
408 case ISD::RegisterMask:
409 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
412 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
414 case ISD::FrameIndex:
415 case ISD::TargetFrameIndex:
416 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
419 case ISD::TargetJumpTable:
420 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
421 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
423 case ISD::ConstantPool:
424 case ISD::TargetConstantPool: {
425 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
426 ID.AddInteger(CP->getAlignment());
427 ID.AddInteger(CP->getOffset());
428 if (CP->isMachineConstantPoolEntry())
429 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
431 ID.AddPointer(CP->getConstVal());
432 ID.AddInteger(CP->getTargetFlags());
435 case ISD::TargetIndex: {
436 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
437 ID.AddInteger(TI->getIndex());
438 ID.AddInteger(TI->getOffset());
439 ID.AddInteger(TI->getTargetFlags());
443 const LoadSDNode *LD = cast<LoadSDNode>(N);
444 ID.AddInteger(LD->getMemoryVT().getRawBits());
445 ID.AddInteger(LD->getRawSubclassData());
446 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
450 const StoreSDNode *ST = cast<StoreSDNode>(N);
451 ID.AddInteger(ST->getMemoryVT().getRawBits());
452 ID.AddInteger(ST->getRawSubclassData());
453 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
456 case ISD::ATOMIC_CMP_SWAP:
457 case ISD::ATOMIC_SWAP:
458 case ISD::ATOMIC_LOAD_ADD:
459 case ISD::ATOMIC_LOAD_SUB:
460 case ISD::ATOMIC_LOAD_AND:
461 case ISD::ATOMIC_LOAD_OR:
462 case ISD::ATOMIC_LOAD_XOR:
463 case ISD::ATOMIC_LOAD_NAND:
464 case ISD::ATOMIC_LOAD_MIN:
465 case ISD::ATOMIC_LOAD_MAX:
466 case ISD::ATOMIC_LOAD_UMIN:
467 case ISD::ATOMIC_LOAD_UMAX:
468 case ISD::ATOMIC_LOAD:
469 case ISD::ATOMIC_STORE: {
470 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
471 ID.AddInteger(AT->getMemoryVT().getRawBits());
472 ID.AddInteger(AT->getRawSubclassData());
473 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
476 case ISD::PREFETCH: {
477 const MemSDNode *PF = cast<MemSDNode>(N);
478 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
481 case ISD::VECTOR_SHUFFLE: {
482 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
483 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
485 ID.AddInteger(SVN->getMaskElt(i));
488 case ISD::TargetBlockAddress:
489 case ISD::BlockAddress: {
490 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
491 ID.AddPointer(BA->getBlockAddress());
492 ID.AddInteger(BA->getOffset());
493 ID.AddInteger(BA->getTargetFlags());
496 } // end switch (N->getOpcode())
498 // Target specific memory nodes could also have address spaces to check.
499 if (N->isTargetMemoryOpcode())
500 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
503 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
505 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
506 AddNodeIDOpcode(ID, N->getOpcode());
507 // Add the return value info.
508 AddNodeIDValueTypes(ID, N->getVTList());
509 // Add the operand info.
510 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
512 // Handle SDNode leafs with special info.
513 AddNodeIDCustom(ID, N);
516 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
517 /// the CSE map that carries volatility, temporalness, indexing mode, and
518 /// extension/truncation information.
520 static inline unsigned
521 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
522 bool isNonTemporal, bool isInvariant) {
523 assert((ConvType & 3) == ConvType &&
524 "ConvType may not require more than 2 bits!");
525 assert((AM & 7) == AM &&
526 "AM may not require more than 3 bits!");
530 (isNonTemporal << 6) |
534 //===----------------------------------------------------------------------===//
535 // SelectionDAG Class
536 //===----------------------------------------------------------------------===//
538 /// doNotCSE - Return true if CSE should not be performed for this node.
539 static bool doNotCSE(SDNode *N) {
540 if (N->getValueType(0) == MVT::Glue)
541 return true; // Never CSE anything that produces a flag.
543 switch (N->getOpcode()) {
545 case ISD::HANDLENODE:
547 return true; // Never CSE these nodes.
550 // Check that remaining values produced are not flags.
551 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
552 if (N->getValueType(i) == MVT::Glue)
553 return true; // Never CSE anything that produces a flag.
558 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
560 void SelectionDAG::RemoveDeadNodes() {
561 // Create a dummy node (which is not added to allnodes), that adds a reference
562 // to the root node, preventing it from being deleted.
563 HandleSDNode Dummy(getRoot());
565 SmallVector<SDNode*, 128> DeadNodes;
567 // Add all obviously-dead nodes to the DeadNodes worklist.
568 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
570 DeadNodes.push_back(I);
572 RemoveDeadNodes(DeadNodes);
574 // If the root changed (e.g. it was a dead load, update the root).
575 setRoot(Dummy.getValue());
578 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
579 /// given list, and any nodes that become unreachable as a result.
580 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
582 // Process the worklist, deleting the nodes and adding their uses to the
584 while (!DeadNodes.empty()) {
585 SDNode *N = DeadNodes.pop_back_val();
587 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
588 DUL->NodeDeleted(N, 0);
590 // Take the node out of the appropriate CSE map.
591 RemoveNodeFromCSEMaps(N);
593 // Next, brutally remove the operand list. This is safe to do, as there are
594 // no cycles in the graph.
595 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
597 SDNode *Operand = Use.getNode();
600 // Now that we removed this operand, see if there are no uses of it left.
601 if (Operand->use_empty())
602 DeadNodes.push_back(Operand);
609 void SelectionDAG::RemoveDeadNode(SDNode *N){
610 SmallVector<SDNode*, 16> DeadNodes(1, N);
612 // Create a dummy node that adds a reference to the root node, preventing
613 // it from being deleted. (This matters if the root is an operand of the
615 HandleSDNode Dummy(getRoot());
617 RemoveDeadNodes(DeadNodes);
620 void SelectionDAG::DeleteNode(SDNode *N) {
621 // First take this out of the appropriate CSE map.
622 RemoveNodeFromCSEMaps(N);
624 // Finally, remove uses due to operands of this node, remove from the
625 // AllNodes list, and delete the node.
626 DeleteNodeNotInCSEMaps(N);
629 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
630 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
631 assert(N->use_empty() && "Cannot delete a node that is not dead!");
633 // Drop all of the operands and decrement used node's use counts.
639 void SelectionDAG::DeallocateNode(SDNode *N) {
640 if (N->OperandsNeedDelete)
641 delete[] N->OperandList;
643 // Set the opcode to DELETED_NODE to help catch bugs when node
644 // memory is reallocated.
645 N->NodeType = ISD::DELETED_NODE;
647 NodeAllocator.Deallocate(AllNodes.remove(N));
649 // Remove the ordering of this node.
652 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
653 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
654 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
655 DbgVals[i]->setIsInvalidated();
658 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
659 /// correspond to it. This is useful when we're about to delete or repurpose
660 /// the node. We don't want future request for structurally identical nodes
661 /// to return N anymore.
662 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
664 switch (N->getOpcode()) {
665 case ISD::HANDLENODE: return false; // noop.
667 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
668 "Cond code doesn't exist!");
669 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
670 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
672 case ISD::ExternalSymbol:
673 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
675 case ISD::TargetExternalSymbol: {
676 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
677 Erased = TargetExternalSymbols.erase(
678 std::pair<std::string,unsigned char>(ESN->getSymbol(),
679 ESN->getTargetFlags()));
682 case ISD::VALUETYPE: {
683 EVT VT = cast<VTSDNode>(N)->getVT();
684 if (VT.isExtended()) {
685 Erased = ExtendedValueTypeNodes.erase(VT);
687 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
688 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
693 // Remove it from the CSE Map.
694 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
695 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
696 Erased = CSEMap.RemoveNode(N);
700 // Verify that the node was actually in one of the CSE maps, unless it has a
701 // flag result (which cannot be CSE'd) or is one of the special cases that are
702 // not subject to CSE.
703 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
704 !N->isMachineOpcode() && !doNotCSE(N)) {
707 llvm_unreachable("Node is not in map!");
713 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
714 /// maps and modified in place. Add it back to the CSE maps, unless an identical
715 /// node already exists, in which case transfer all its users to the existing
716 /// node. This transfer can potentially trigger recursive merging.
719 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
720 // For node types that aren't CSE'd, just act as if no identical node
723 SDNode *Existing = CSEMap.GetOrInsertNode(N);
725 // If there was already an existing matching node, use ReplaceAllUsesWith
726 // to replace the dead one with the existing one. This can cause
727 // recursive merging of other unrelated nodes down the line.
728 ReplaceAllUsesWith(N, Existing);
730 // N is now dead. Inform the listeners and delete it.
731 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
732 DUL->NodeDeleted(N, Existing);
733 DeleteNodeNotInCSEMaps(N);
738 // If the node doesn't already exist, we updated it. Inform listeners.
739 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
743 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
744 /// were replaced with those specified. If this node is never memoized,
745 /// return null, otherwise return a pointer to the slot it would take. If a
746 /// node already exists with these operands, the slot will be non-null.
747 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
752 SDValue Ops[] = { Op };
754 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
755 AddNodeIDCustom(ID, N);
756 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
760 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
761 /// were replaced with those specified. If this node is never memoized,
762 /// return null, otherwise return a pointer to the slot it would take. If a
763 /// node already exists with these operands, the slot will be non-null.
764 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
765 SDValue Op1, SDValue Op2,
770 SDValue Ops[] = { Op1, Op2 };
772 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
773 AddNodeIDCustom(ID, N);
774 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
779 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
780 /// were replaced with those specified. If this node is never memoized,
781 /// return null, otherwise return a pointer to the slot it would take. If a
782 /// node already exists with these operands, the slot will be non-null.
783 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
784 const SDValue *Ops,unsigned NumOps,
790 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
791 AddNodeIDCustom(ID, N);
792 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
797 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
798 static void VerifyNodeCommon(SDNode *N) {
799 switch (N->getOpcode()) {
802 case ISD::BUILD_PAIR: {
803 EVT VT = N->getValueType(0);
804 assert(N->getNumValues() == 1 && "Too many results!");
805 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
806 "Wrong return type!");
807 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
808 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
809 "Mismatched operand types!");
810 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
811 "Wrong operand type!");
812 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
813 "Wrong return type size");
816 case ISD::BUILD_VECTOR: {
817 assert(N->getNumValues() == 1 && "Too many results!");
818 assert(N->getValueType(0).isVector() && "Wrong return type!");
819 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
820 "Wrong number of operands!");
821 EVT EltVT = N->getValueType(0).getVectorElementType();
822 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
823 assert((I->getValueType() == EltVT ||
824 (EltVT.isInteger() && I->getValueType().isInteger() &&
825 EltVT.bitsLE(I->getValueType()))) &&
826 "Wrong operand type!");
827 assert(I->getValueType() == N->getOperand(0).getValueType() &&
828 "Operands must all have the same type");
835 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
836 static void VerifySDNode(SDNode *N) {
837 // The SDNode allocators cannot be used to allocate nodes with fields that are
838 // not present in an SDNode!
839 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
840 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
841 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
842 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
843 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
844 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
845 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
846 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
847 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
848 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
849 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
850 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
851 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
852 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
853 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
854 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
855 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
856 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
857 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
862 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
864 static void VerifyMachineNode(SDNode *N) {
865 // The MachineNode allocators cannot be used to allocate nodes with fields
866 // that are not present in a MachineNode!
867 // Currently there are no such nodes.
873 /// getEVTAlignment - Compute the default alignment value for the
876 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
877 Type *Ty = VT == MVT::iPTR ?
878 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
879 VT.getTypeForEVT(*getContext());
881 return TLI.getDataLayout()->getABITypeAlignment(Ty);
884 // EntryNode could meaningfully have debug info if we can find it...
885 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
886 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
887 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
888 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
889 AllNodes.push_back(&EntryNode);
890 Ordering = new SDNodeOrdering();
891 DbgInfo = new SDDbgInfo();
894 void SelectionDAG::init(MachineFunction &mf) {
896 Context = &mf.getFunction()->getContext();
899 SelectionDAG::~SelectionDAG() {
900 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
906 void SelectionDAG::allnodes_clear() {
907 assert(&*AllNodes.begin() == &EntryNode);
908 AllNodes.remove(AllNodes.begin());
909 while (!AllNodes.empty())
910 DeallocateNode(AllNodes.begin());
913 void SelectionDAG::clear() {
915 OperandAllocator.Reset();
918 ExtendedValueTypeNodes.clear();
919 ExternalSymbols.clear();
920 TargetExternalSymbols.clear();
921 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
922 static_cast<CondCodeSDNode*>(0));
923 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
924 static_cast<SDNode*>(0));
926 EntryNode.UseList = 0;
927 AllNodes.push_back(&EntryNode);
928 Root = getEntryNode();
933 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
934 return VT.bitsGT(Op.getValueType()) ?
935 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
936 getNode(ISD::TRUNCATE, DL, VT, Op);
939 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
940 return VT.bitsGT(Op.getValueType()) ?
941 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
942 getNode(ISD::TRUNCATE, DL, VT, Op);
945 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
946 return VT.bitsGT(Op.getValueType()) ?
947 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
948 getNode(ISD::TRUNCATE, DL, VT, Op);
951 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
952 assert(!VT.isVector() &&
953 "getZeroExtendInReg should use the vector element type instead of "
955 if (Op.getValueType() == VT) return Op;
956 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
957 APInt Imm = APInt::getLowBitsSet(BitWidth,
959 return getNode(ISD::AND, DL, Op.getValueType(), Op,
960 getConstant(Imm, Op.getValueType()));
963 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
965 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
966 EVT EltVT = VT.getScalarType();
968 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
969 return getNode(ISD::XOR, DL, VT, Val, NegOne);
972 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
973 EVT EltVT = VT.getScalarType();
974 assert((EltVT.getSizeInBits() >= 64 ||
975 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
976 "getConstant with a uint64_t value that doesn't fit in the type!");
977 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
980 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
981 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
984 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
985 assert(VT.isInteger() && "Cannot create FP integer constant!");
987 EVT EltVT = VT.getScalarType();
988 const ConstantInt *Elt = &Val;
990 // In some cases the vector type is legal but the element type is illegal and
991 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
992 // inserted value (the type does not need to match the vector element type).
993 // Any extra bits introduced will be truncated away.
994 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
995 TargetLowering::TypePromoteInteger) {
996 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
997 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
998 Elt = ConstantInt::get(*getContext(), NewVal);
1001 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1002 "APInt size does not match type size!");
1003 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1004 FoldingSetNodeID ID;
1005 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1009 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1011 return SDValue(N, 0);
1014 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1019 SDValue Result(N, 0);
1020 if (VT.isVector()) {
1021 SmallVector<SDValue, 8> Ops;
1022 Ops.assign(VT.getVectorNumElements(), Result);
1023 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1028 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1029 return getConstant(Val, TLI.getPointerTy(), isTarget);
1033 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1034 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1037 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1038 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1040 EVT EltVT = VT.getScalarType();
1042 // Do the map lookup using the actual bit pattern for the floating point
1043 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1044 // we don't have issues with SNANs.
1045 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1046 FoldingSetNodeID ID;
1047 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1051 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1053 return SDValue(N, 0);
1056 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1057 CSEMap.InsertNode(N, IP);
1058 AllNodes.push_back(N);
1061 SDValue Result(N, 0);
1062 if (VT.isVector()) {
1063 SmallVector<SDValue, 8> Ops;
1064 Ops.assign(VT.getVectorNumElements(), Result);
1065 // FIXME DebugLoc info might be appropriate here
1066 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1071 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1072 EVT EltVT = VT.getScalarType();
1073 if (EltVT==MVT::f32)
1074 return getConstantFP(APFloat((float)Val), VT, isTarget);
1075 else if (EltVT==MVT::f64)
1076 return getConstantFP(APFloat(Val), VT, isTarget);
1077 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1079 APFloat apf = APFloat(Val);
1080 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1082 return getConstantFP(apf, VT, isTarget);
1084 llvm_unreachable("Unsupported type in getConstantFP");
1087 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1088 EVT VT, int64_t Offset,
1090 unsigned char TargetFlags) {
1091 assert((TargetFlags == 0 || isTargetGA) &&
1092 "Cannot set target flags on target-independent globals");
1094 // Truncate (with sign-extension) the offset value to the pointer size.
1095 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1097 Offset = SignExtend64(Offset, BitWidth);
1099 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1101 // If GV is an alias then use the aliasee for determining thread-localness.
1102 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1103 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1107 if (GVar && GVar->isThreadLocal())
1108 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1110 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1112 FoldingSetNodeID ID;
1113 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1115 ID.AddInteger(Offset);
1116 ID.AddInteger(TargetFlags);
1117 ID.AddInteger(GV->getType()->getAddressSpace());
1119 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1120 return SDValue(E, 0);
1122 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1123 Offset, TargetFlags);
1124 CSEMap.InsertNode(N, IP);
1125 AllNodes.push_back(N);
1126 return SDValue(N, 0);
1129 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1130 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1131 FoldingSetNodeID ID;
1132 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1135 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1136 return SDValue(E, 0);
1138 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1139 CSEMap.InsertNode(N, IP);
1140 AllNodes.push_back(N);
1141 return SDValue(N, 0);
1144 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1145 unsigned char TargetFlags) {
1146 assert((TargetFlags == 0 || isTarget) &&
1147 "Cannot set target flags on target-independent jump tables");
1148 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1149 FoldingSetNodeID ID;
1150 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1152 ID.AddInteger(TargetFlags);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1159 CSEMap.InsertNode(N, IP);
1160 AllNodes.push_back(N);
1161 return SDValue(N, 0);
1164 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1165 unsigned Alignment, int Offset,
1167 unsigned char TargetFlags) {
1168 assert((TargetFlags == 0 || isTarget) &&
1169 "Cannot set target flags on target-independent globals");
1171 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1172 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1175 ID.AddInteger(Alignment);
1176 ID.AddInteger(Offset);
1178 ID.AddInteger(TargetFlags);
1180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1181 return SDValue(E, 0);
1183 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1184 Alignment, TargetFlags);
1185 CSEMap.InsertNode(N, IP);
1186 AllNodes.push_back(N);
1187 return SDValue(N, 0);
1191 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1192 unsigned Alignment, int Offset,
1194 unsigned char TargetFlags) {
1195 assert((TargetFlags == 0 || isTarget) &&
1196 "Cannot set target flags on target-independent globals");
1198 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1199 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1202 ID.AddInteger(Alignment);
1203 ID.AddInteger(Offset);
1204 C->addSelectionDAGCSEId(ID);
1205 ID.AddInteger(TargetFlags);
1207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1208 return SDValue(E, 0);
1210 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1211 Alignment, TargetFlags);
1212 CSEMap.InsertNode(N, IP);
1213 AllNodes.push_back(N);
1214 return SDValue(N, 0);
1217 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1218 unsigned char TargetFlags) {
1219 FoldingSetNodeID ID;
1220 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1221 ID.AddInteger(Index);
1222 ID.AddInteger(Offset);
1223 ID.AddInteger(TargetFlags);
1225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1226 return SDValue(E, 0);
1228 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1230 CSEMap.InsertNode(N, IP);
1231 AllNodes.push_back(N);
1232 return SDValue(N, 0);
1235 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1236 FoldingSetNodeID ID;
1237 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1241 return SDValue(E, 0);
1243 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1244 CSEMap.InsertNode(N, IP);
1245 AllNodes.push_back(N);
1246 return SDValue(N, 0);
1249 SDValue SelectionDAG::getValueType(EVT VT) {
1250 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1251 ValueTypeNodes.size())
1252 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1254 SDNode *&N = VT.isExtended() ?
1255 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1257 if (N) return SDValue(N, 0);
1258 N = new (NodeAllocator) VTSDNode(VT);
1259 AllNodes.push_back(N);
1260 return SDValue(N, 0);
1263 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1264 SDNode *&N = ExternalSymbols[Sym];
1265 if (N) return SDValue(N, 0);
1266 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1267 AllNodes.push_back(N);
1268 return SDValue(N, 0);
1271 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1272 unsigned char TargetFlags) {
1274 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1276 if (N) return SDValue(N, 0);
1277 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1278 AllNodes.push_back(N);
1279 return SDValue(N, 0);
1282 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1283 if ((unsigned)Cond >= CondCodeNodes.size())
1284 CondCodeNodes.resize(Cond+1);
1286 if (CondCodeNodes[Cond] == 0) {
1287 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1288 CondCodeNodes[Cond] = N;
1289 AllNodes.push_back(N);
1292 return SDValue(CondCodeNodes[Cond], 0);
1295 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1296 // the shuffle mask M that point at N1 to point at N2, and indices that point
1297 // N2 to point at N1.
1298 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1300 int NElts = M.size();
1301 for (int i = 0; i != NElts; ++i) {
1309 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1310 SDValue N2, const int *Mask) {
1311 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1312 assert(VT.isVector() && N1.getValueType().isVector() &&
1313 "Vector Shuffle VTs must be a vectors");
1314 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1315 && "Vector Shuffle VTs must have same element type");
1317 // Canonicalize shuffle undef, undef -> undef
1318 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1319 return getUNDEF(VT);
1321 // Validate that all indices in Mask are within the range of the elements
1322 // input to the shuffle.
1323 unsigned NElts = VT.getVectorNumElements();
1324 SmallVector<int, 8> MaskVec;
1325 for (unsigned i = 0; i != NElts; ++i) {
1326 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1327 MaskVec.push_back(Mask[i]);
1330 // Canonicalize shuffle v, v -> v, undef
1333 for (unsigned i = 0; i != NElts; ++i)
1334 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1337 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1338 if (N1.getOpcode() == ISD::UNDEF)
1339 commuteShuffle(N1, N2, MaskVec);
1341 // Canonicalize all index into lhs, -> shuffle lhs, undef
1342 // Canonicalize all index into rhs, -> shuffle rhs, undef
1343 bool AllLHS = true, AllRHS = true;
1344 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1345 for (unsigned i = 0; i != NElts; ++i) {
1346 if (MaskVec[i] >= (int)NElts) {
1351 } else if (MaskVec[i] >= 0) {
1355 if (AllLHS && AllRHS)
1356 return getUNDEF(VT);
1357 if (AllLHS && !N2Undef)
1361 commuteShuffle(N1, N2, MaskVec);
1364 // If Identity shuffle, or all shuffle in to undef, return that node.
1365 bool AllUndef = true;
1366 bool Identity = true;
1367 for (unsigned i = 0; i != NElts; ++i) {
1368 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1369 if (MaskVec[i] >= 0) AllUndef = false;
1371 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1374 return getUNDEF(VT);
1376 FoldingSetNodeID ID;
1377 SDValue Ops[2] = { N1, N2 };
1378 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1379 for (unsigned i = 0; i != NElts; ++i)
1380 ID.AddInteger(MaskVec[i]);
1383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1384 return SDValue(E, 0);
1386 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1387 // SDNode doesn't have access to it. This memory will be "leaked" when
1388 // the node is deallocated, but recovered when the NodeAllocator is released.
1389 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1390 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1392 ShuffleVectorSDNode *N =
1393 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1394 CSEMap.InsertNode(N, IP);
1395 AllNodes.push_back(N);
1396 return SDValue(N, 0);
1399 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1400 SDValue Val, SDValue DTy,
1401 SDValue STy, SDValue Rnd, SDValue Sat,
1402 ISD::CvtCode Code) {
1403 // If the src and dest types are the same and the conversion is between
1404 // integer types of the same sign or two floats, no conversion is necessary.
1406 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1409 FoldingSetNodeID ID;
1410 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1411 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1413 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1414 return SDValue(E, 0);
1416 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1418 CSEMap.InsertNode(N, IP);
1419 AllNodes.push_back(N);
1420 return SDValue(N, 0);
1423 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1424 FoldingSetNodeID ID;
1425 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1426 ID.AddInteger(RegNo);
1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1429 return SDValue(E, 0);
1431 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1432 CSEMap.InsertNode(N, IP);
1433 AllNodes.push_back(N);
1434 return SDValue(N, 0);
1437 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1438 FoldingSetNodeID ID;
1439 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1440 ID.AddPointer(RegMask);
1442 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1443 return SDValue(E, 0);
1445 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1446 CSEMap.InsertNode(N, IP);
1447 AllNodes.push_back(N);
1448 return SDValue(N, 0);
1451 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1452 FoldingSetNodeID ID;
1453 SDValue Ops[] = { Root };
1454 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1455 ID.AddPointer(Label);
1457 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1458 return SDValue(E, 0);
1460 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1461 CSEMap.InsertNode(N, IP);
1462 AllNodes.push_back(N);
1463 return SDValue(N, 0);
1467 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1470 unsigned char TargetFlags) {
1471 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1473 FoldingSetNodeID ID;
1474 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1476 ID.AddInteger(Offset);
1477 ID.AddInteger(TargetFlags);
1479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1480 return SDValue(E, 0);
1482 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1484 CSEMap.InsertNode(N, IP);
1485 AllNodes.push_back(N);
1486 return SDValue(N, 0);
1489 SDValue SelectionDAG::getSrcValue(const Value *V) {
1490 assert((!V || V->getType()->isPointerTy()) &&
1491 "SrcValue is not a pointer?");
1493 FoldingSetNodeID ID;
1494 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1498 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1499 return SDValue(E, 0);
1501 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1502 CSEMap.InsertNode(N, IP);
1503 AllNodes.push_back(N);
1504 return SDValue(N, 0);
1507 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1508 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1509 FoldingSetNodeID ID;
1510 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1514 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1515 return SDValue(E, 0);
1517 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1518 CSEMap.InsertNode(N, IP);
1519 AllNodes.push_back(N);
1520 return SDValue(N, 0);
1524 /// getShiftAmountOperand - Return the specified value casted to
1525 /// the target's desired shift amount type.
1526 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1527 EVT OpTy = Op.getValueType();
1528 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1529 if (OpTy == ShTy || OpTy.isVector()) return Op;
1531 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1532 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1535 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1536 /// specified value type.
1537 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1538 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1539 unsigned ByteSize = VT.getStoreSize();
1540 Type *Ty = VT.getTypeForEVT(*getContext());
1541 unsigned StackAlign =
1542 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1544 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1545 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1548 /// CreateStackTemporary - Create a stack temporary suitable for holding
1549 /// either of the specified value types.
1550 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1551 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1552 VT2.getStoreSizeInBits())/8;
1553 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1554 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1555 const DataLayout *TD = TLI.getDataLayout();
1556 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1557 TD->getPrefTypeAlignment(Ty2));
1559 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1560 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1561 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1564 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1565 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1566 // These setcc operations always fold.
1570 case ISD::SETFALSE2: return getConstant(0, VT);
1572 case ISD::SETTRUE2: return getConstant(1, VT);
1584 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1588 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1589 const APInt &C2 = N2C->getAPIntValue();
1590 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1591 const APInt &C1 = N1C->getAPIntValue();
1594 default: llvm_unreachable("Unknown integer setcc!");
1595 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1596 case ISD::SETNE: return getConstant(C1 != C2, VT);
1597 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1598 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1599 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1600 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1601 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1602 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1603 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1604 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1608 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1609 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1610 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1613 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1614 return getUNDEF(VT);
1616 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1617 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1618 return getUNDEF(VT);
1620 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1621 R==APFloat::cmpLessThan, VT);
1622 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1623 return getUNDEF(VT);
1625 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1626 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1629 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1630 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1631 return getUNDEF(VT);
1633 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1634 R==APFloat::cmpEqual, VT);
1635 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1636 return getUNDEF(VT);
1638 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1639 R==APFloat::cmpEqual, VT);
1640 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1641 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1642 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1645 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1646 R==APFloat::cmpLessThan, VT);
1647 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1648 R==APFloat::cmpUnordered, VT);
1649 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1650 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1653 // Ensure that the constant occurs on the RHS.
1654 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1658 // Could not fold it.
1662 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1663 /// use this predicate to simplify operations downstream.
1664 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1665 // This predicate is not safe for vector operations.
1666 if (Op.getValueType().isVector())
1669 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1670 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1673 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1674 /// this predicate to simplify operations downstream. Mask is known to be zero
1675 /// for bits that V cannot have.
1676 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1677 unsigned Depth) const {
1678 APInt KnownZero, KnownOne;
1679 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1680 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1681 return (KnownZero & Mask) == Mask;
1684 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1685 /// known to be either zero or one and return them in the KnownZero/KnownOne
1686 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1688 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1689 APInt &KnownOne, unsigned Depth) const {
1690 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1692 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1694 return; // Limit search depth.
1696 APInt KnownZero2, KnownOne2;
1698 switch (Op.getOpcode()) {
1700 // We know all of the bits for a constant!
1701 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1702 KnownZero = ~KnownOne;
1705 // If either the LHS or the RHS are Zero, the result is zero.
1706 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1707 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1709 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1711 // Output known-1 bits are only known if set in both the LHS & RHS.
1712 KnownOne &= KnownOne2;
1713 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1714 KnownZero |= KnownZero2;
1717 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1722 // Output known-0 bits are only known if clear in both the LHS & RHS.
1723 KnownZero &= KnownZero2;
1724 // Output known-1 are known to be set if set in either the LHS | RHS.
1725 KnownOne |= KnownOne2;
1728 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1729 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1731 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1733 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1734 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1735 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1736 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1737 KnownZero = KnownZeroOut;
1741 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1742 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1743 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1744 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1746 // If low bits are zero in either operand, output low known-0 bits.
1747 // Also compute a conserative estimate for high known-0 bits.
1748 // More trickiness is possible, but this is sufficient for the
1749 // interesting case of alignment computation.
1750 KnownOne.clearAllBits();
1751 unsigned TrailZ = KnownZero.countTrailingOnes() +
1752 KnownZero2.countTrailingOnes();
1753 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1754 KnownZero2.countLeadingOnes(),
1755 BitWidth) - BitWidth;
1757 TrailZ = std::min(TrailZ, BitWidth);
1758 LeadZ = std::min(LeadZ, BitWidth);
1759 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1760 APInt::getHighBitsSet(BitWidth, LeadZ);
1764 // For the purposes of computing leading zeros we can conservatively
1765 // treat a udiv as a logical right shift by the power of 2 known to
1766 // be less than the denominator.
1767 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1768 unsigned LeadZ = KnownZero2.countLeadingOnes();
1770 KnownOne2.clearAllBits();
1771 KnownZero2.clearAllBits();
1772 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1773 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1774 if (RHSUnknownLeadingOnes != BitWidth)
1775 LeadZ = std::min(BitWidth,
1776 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1778 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1782 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1783 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1784 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1785 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1787 // Only known if known in both the LHS and RHS.
1788 KnownOne &= KnownOne2;
1789 KnownZero &= KnownZero2;
1791 case ISD::SELECT_CC:
1792 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1793 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1795 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1797 // Only known if known in both the LHS and RHS.
1798 KnownOne &= KnownOne2;
1799 KnownZero &= KnownZero2;
1807 if (Op.getResNo() != 1)
1809 // The boolean result conforms to getBooleanContents. Fall through.
1811 // If we know the result of a setcc has the top bits zero, use this info.
1812 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1813 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1814 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1817 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1818 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1819 unsigned ShAmt = SA->getZExtValue();
1821 // If the shift count is an invalid immediate, don't do anything.
1822 if (ShAmt >= BitWidth)
1825 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1826 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1827 KnownZero <<= ShAmt;
1829 // low bits known zero.
1830 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1834 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1835 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1836 unsigned ShAmt = SA->getZExtValue();
1838 // If the shift count is an invalid immediate, don't do anything.
1839 if (ShAmt >= BitWidth)
1842 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1843 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1844 KnownZero = KnownZero.lshr(ShAmt);
1845 KnownOne = KnownOne.lshr(ShAmt);
1847 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1848 KnownZero |= HighBits; // High bits known zero.
1852 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1853 unsigned ShAmt = SA->getZExtValue();
1855 // If the shift count is an invalid immediate, don't do anything.
1856 if (ShAmt >= BitWidth)
1859 // If any of the demanded bits are produced by the sign extension, we also
1860 // demand the input sign bit.
1861 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1863 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1864 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1865 KnownZero = KnownZero.lshr(ShAmt);
1866 KnownOne = KnownOne.lshr(ShAmt);
1868 // Handle the sign bits.
1869 APInt SignBit = APInt::getSignBit(BitWidth);
1870 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1872 if (KnownZero.intersects(SignBit)) {
1873 KnownZero |= HighBits; // New bits are known zero.
1874 } else if (KnownOne.intersects(SignBit)) {
1875 KnownOne |= HighBits; // New bits are known one.
1879 case ISD::SIGN_EXTEND_INREG: {
1880 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1881 unsigned EBits = EVT.getScalarType().getSizeInBits();
1883 // Sign extension. Compute the demanded bits in the result that are not
1884 // present in the input.
1885 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1887 APInt InSignBit = APInt::getSignBit(EBits);
1888 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1890 // If the sign extended bits are demanded, we know that the sign
1892 InSignBit = InSignBit.zext(BitWidth);
1893 if (NewBits.getBoolValue())
1894 InputDemandedBits |= InSignBit;
1896 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1897 KnownOne &= InputDemandedBits;
1898 KnownZero &= InputDemandedBits;
1899 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1901 // If the sign bit of the input is known set or clear, then we know the
1902 // top bits of the result.
1903 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1904 KnownZero |= NewBits;
1905 KnownOne &= ~NewBits;
1906 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1907 KnownOne |= NewBits;
1908 KnownZero &= ~NewBits;
1909 } else { // Input sign bit unknown
1910 KnownZero &= ~NewBits;
1911 KnownOne &= ~NewBits;
1916 case ISD::CTTZ_ZERO_UNDEF:
1918 case ISD::CTLZ_ZERO_UNDEF:
1920 unsigned LowBits = Log2_32(BitWidth)+1;
1921 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1922 KnownOne.clearAllBits();
1926 LoadSDNode *LD = cast<LoadSDNode>(Op);
1927 if (ISD::isZEXTLoad(Op.getNode())) {
1928 EVT VT = LD->getMemoryVT();
1929 unsigned MemBits = VT.getScalarType().getSizeInBits();
1930 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1931 } else if (const MDNode *Ranges = LD->getRanges()) {
1932 computeMaskedBitsLoad(*Ranges, KnownZero);
1936 case ISD::ZERO_EXTEND: {
1937 EVT InVT = Op.getOperand(0).getValueType();
1938 unsigned InBits = InVT.getScalarType().getSizeInBits();
1939 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1940 KnownZero = KnownZero.trunc(InBits);
1941 KnownOne = KnownOne.trunc(InBits);
1942 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1943 KnownZero = KnownZero.zext(BitWidth);
1944 KnownOne = KnownOne.zext(BitWidth);
1945 KnownZero |= NewBits;
1948 case ISD::SIGN_EXTEND: {
1949 EVT InVT = Op.getOperand(0).getValueType();
1950 unsigned InBits = InVT.getScalarType().getSizeInBits();
1951 APInt InSignBit = APInt::getSignBit(InBits);
1952 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1954 KnownZero = KnownZero.trunc(InBits);
1955 KnownOne = KnownOne.trunc(InBits);
1956 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1958 // Note if the sign bit is known to be zero or one.
1959 bool SignBitKnownZero = KnownZero.isNegative();
1960 bool SignBitKnownOne = KnownOne.isNegative();
1961 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1962 "Sign bit can't be known to be both zero and one!");
1964 KnownZero = KnownZero.zext(BitWidth);
1965 KnownOne = KnownOne.zext(BitWidth);
1967 // If the sign bit is known zero or one, the top bits match.
1968 if (SignBitKnownZero)
1969 KnownZero |= NewBits;
1970 else if (SignBitKnownOne)
1971 KnownOne |= NewBits;
1974 case ISD::ANY_EXTEND: {
1975 EVT InVT = Op.getOperand(0).getValueType();
1976 unsigned InBits = InVT.getScalarType().getSizeInBits();
1977 KnownZero = KnownZero.trunc(InBits);
1978 KnownOne = KnownOne.trunc(InBits);
1979 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1980 KnownZero = KnownZero.zext(BitWidth);
1981 KnownOne = KnownOne.zext(BitWidth);
1984 case ISD::TRUNCATE: {
1985 EVT InVT = Op.getOperand(0).getValueType();
1986 unsigned InBits = InVT.getScalarType().getSizeInBits();
1987 KnownZero = KnownZero.zext(InBits);
1988 KnownOne = KnownOne.zext(InBits);
1989 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1990 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1991 KnownZero = KnownZero.trunc(BitWidth);
1992 KnownOne = KnownOne.trunc(BitWidth);
1995 case ISD::AssertZext: {
1996 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1997 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1999 KnownZero |= (~InMask);
2000 KnownOne &= (~KnownZero);
2004 // All bits are zero except the low bit.
2005 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2009 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2010 // We know that the top bits of C-X are clear if X contains less bits
2011 // than C (i.e. no wrap-around can happen). For example, 20-X is
2012 // positive if we can prove that X is >= 0 and < 16.
2013 if (CLHS->getAPIntValue().isNonNegative()) {
2014 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2015 // NLZ can't be BitWidth with no sign bit
2016 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2017 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2019 // If all of the MaskV bits are known to be zero, then we know the
2020 // output top bits are zero, because we now know that the output is
2022 if ((KnownZero2 & MaskV) == MaskV) {
2023 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2024 // Top bits known zero.
2025 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2033 // Output known-0 bits are known if clear or set in both the low clear bits
2034 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2035 // low 3 bits clear.
2036 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2038 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2040 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2041 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2042 KnownZeroOut = std::min(KnownZeroOut,
2043 KnownZero2.countTrailingOnes());
2045 if (Op.getOpcode() == ISD::ADD) {
2046 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2050 // With ADDE, a carry bit may be added in, so we can only use this
2051 // information if we know (at least) that the low two bits are clear. We
2052 // then return to the caller that the low bit is unknown but that other bits
2054 if (KnownZeroOut >= 2) // ADDE
2055 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2059 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2060 const APInt &RA = Rem->getAPIntValue().abs();
2061 if (RA.isPowerOf2()) {
2062 APInt LowBits = RA - 1;
2063 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2064 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2066 // The low bits of the first operand are unchanged by the srem.
2067 KnownZero = KnownZero2 & LowBits;
2068 KnownOne = KnownOne2 & LowBits;
2070 // If the first operand is non-negative or has all low bits zero, then
2071 // the upper bits are all zero.
2072 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2073 KnownZero |= ~LowBits;
2075 // If the first operand is negative and not all low bits are zero, then
2076 // the upper bits are all one.
2077 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2078 KnownOne |= ~LowBits;
2079 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2084 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2085 const APInt &RA = Rem->getAPIntValue();
2086 if (RA.isPowerOf2()) {
2087 APInt LowBits = (RA - 1);
2088 KnownZero |= ~LowBits;
2089 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2090 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2095 // Since the result is less than or equal to either operand, any leading
2096 // zero bits in either operand must also exist in the result.
2097 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2098 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2100 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2101 KnownZero2.countLeadingOnes());
2102 KnownOne.clearAllBits();
2103 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2106 case ISD::FrameIndex:
2107 case ISD::TargetFrameIndex:
2108 if (unsigned Align = InferPtrAlignment(Op)) {
2109 // The low bits are known zero if the pointer is aligned.
2110 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2116 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2119 case ISD::INTRINSIC_WO_CHAIN:
2120 case ISD::INTRINSIC_W_CHAIN:
2121 case ISD::INTRINSIC_VOID:
2122 // Allow the target to implement this method for its nodes.
2123 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2128 /// ComputeNumSignBits - Return the number of times the sign bit of the
2129 /// register is replicated into the other bits. We know that at least 1 bit
2130 /// is always equal to the sign bit (itself), but other cases can give us
2131 /// information. For example, immediately after an "SRA X, 2", we know that
2132 /// the top 3 bits are all equal to each other, so we return 3.
2133 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2134 EVT VT = Op.getValueType();
2135 assert(VT.isInteger() && "Invalid VT!");
2136 unsigned VTBits = VT.getScalarType().getSizeInBits();
2138 unsigned FirstAnswer = 1;
2141 return 1; // Limit search depth.
2143 switch (Op.getOpcode()) {
2145 case ISD::AssertSext:
2146 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2147 return VTBits-Tmp+1;
2148 case ISD::AssertZext:
2149 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2152 case ISD::Constant: {
2153 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2154 return Val.getNumSignBits();
2157 case ISD::SIGN_EXTEND:
2158 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2159 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2161 case ISD::SIGN_EXTEND_INREG:
2162 // Max of the input and what this extends.
2164 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2167 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2168 return std::max(Tmp, Tmp2);
2171 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2172 // SRA X, C -> adds C sign bits.
2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2174 Tmp += C->getZExtValue();
2175 if (Tmp > VTBits) Tmp = VTBits;
2179 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2180 // shl destroys sign bits.
2181 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2182 if (C->getZExtValue() >= VTBits || // Bad shift.
2183 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2184 return Tmp - C->getZExtValue();
2189 case ISD::XOR: // NOT is handled here.
2190 // Logical binary ops preserve the number of sign bits at the worst.
2191 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2193 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2194 FirstAnswer = std::min(Tmp, Tmp2);
2195 // We computed what we know about the sign bits as our first
2196 // answer. Now proceed to the generic code that uses
2197 // ComputeMaskedBits, and pick whichever answer is better.
2202 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2203 if (Tmp == 1) return 1; // Early out.
2204 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2205 return std::min(Tmp, Tmp2);
2213 if (Op.getResNo() != 1)
2215 // The boolean result conforms to getBooleanContents. Fall through.
2217 // If setcc returns 0/-1, all bits are sign bits.
2218 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2219 TargetLowering::ZeroOrNegativeOneBooleanContent)
2224 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2225 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2227 // Handle rotate right by N like a rotate left by 32-N.
2228 if (Op.getOpcode() == ISD::ROTR)
2229 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2231 // If we aren't rotating out all of the known-in sign bits, return the
2232 // number that are left. This handles rotl(sext(x), 1) for example.
2233 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2234 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2238 // Add can have at most one carry bit. Thus we know that the output
2239 // is, at worst, one more bit than the inputs.
2240 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2241 if (Tmp == 1) return 1; // Early out.
2243 // Special case decrementing a value (ADD X, -1):
2244 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2245 if (CRHS->isAllOnesValue()) {
2246 APInt KnownZero, KnownOne;
2247 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2249 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2251 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2254 // If we are subtracting one from a positive number, there is no carry
2255 // out of the result.
2256 if (KnownZero.isNegative())
2260 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2261 if (Tmp2 == 1) return 1;
2262 return std::min(Tmp, Tmp2)-1;
2265 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2266 if (Tmp2 == 1) return 1;
2269 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2270 if (CLHS->isNullValue()) {
2271 APInt KnownZero, KnownOne;
2272 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2273 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2275 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2278 // If the input is known to be positive (the sign bit is known clear),
2279 // the output of the NEG has the same number of sign bits as the input.
2280 if (KnownZero.isNegative())
2283 // Otherwise, we treat this like a SUB.
2286 // Sub can have at most one carry bit. Thus we know that the output
2287 // is, at worst, one more bit than the inputs.
2288 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2289 if (Tmp == 1) return 1; // Early out.
2290 return std::min(Tmp, Tmp2)-1;
2292 // FIXME: it's tricky to do anything useful for this, but it is an important
2293 // case for targets like X86.
2297 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2298 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2299 unsigned ExtType = LD->getExtensionType();
2302 case ISD::SEXTLOAD: // '17' bits known
2303 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2304 return VTBits-Tmp+1;
2305 case ISD::ZEXTLOAD: // '16' bits known
2306 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2311 // Allow the target to implement this method for its nodes.
2312 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2313 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2314 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2315 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2316 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2317 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2320 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2321 // use this information.
2322 APInt KnownZero, KnownOne;
2323 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2326 if (KnownZero.isNegative()) { // sign bit is 0
2328 } else if (KnownOne.isNegative()) { // sign bit is 1;
2335 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2336 // the number of identical bits in the top of the input value.
2338 Mask <<= Mask.getBitWidth()-VTBits;
2339 // Return # leading zeros. We use 'min' here in case Val was zero before
2340 // shifting. We don't want to return '64' as for an i32 "0".
2341 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2344 /// isBaseWithConstantOffset - Return true if the specified operand is an
2345 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2346 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2347 /// semantics as an ADD. This handles the equivalence:
2348 /// X|Cst == X+Cst iff X&Cst = 0.
2349 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2350 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2351 !isa<ConstantSDNode>(Op.getOperand(1)))
2354 if (Op.getOpcode() == ISD::OR &&
2355 !MaskedValueIsZero(Op.getOperand(0),
2356 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2363 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2364 // If we're told that NaNs won't happen, assume they won't.
2365 if (getTarget().Options.NoNaNsFPMath)
2368 // If the value is a constant, we can obviously see if it is a NaN or not.
2369 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2370 return !C->getValueAPF().isNaN();
2372 // TODO: Recognize more cases here.
2377 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2378 // If the value is a constant, we can obviously see if it is a zero or not.
2379 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2380 return !C->isZero();
2382 // TODO: Recognize more cases here.
2383 switch (Op.getOpcode()) {
2386 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2387 return !C->isNullValue();
2394 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2395 // Check the obvious case.
2396 if (A == B) return true;
2398 // For for negative and positive zero.
2399 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2400 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2401 if (CA->isZero() && CB->isZero()) return true;
2403 // Otherwise they may not be equal.
2407 /// getNode - Gets or creates the specified node.
2409 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2410 FoldingSetNodeID ID;
2411 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2413 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2414 return SDValue(E, 0);
2416 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2417 CSEMap.InsertNode(N, IP);
2419 AllNodes.push_back(N);
2423 return SDValue(N, 0);
2426 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2427 EVT VT, SDValue Operand) {
2428 // Constant fold unary operations with an integer constant operand.
2429 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2430 const APInt &Val = C->getAPIntValue();
2433 case ISD::SIGN_EXTEND:
2434 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2435 case ISD::ANY_EXTEND:
2436 case ISD::ZERO_EXTEND:
2438 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2439 case ISD::UINT_TO_FP:
2440 case ISD::SINT_TO_FP: {
2441 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2442 (void)apf.convertFromAPInt(Val,
2443 Opcode==ISD::SINT_TO_FP,
2444 APFloat::rmNearestTiesToEven);
2445 return getConstantFP(apf, VT);
2448 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2449 return getConstantFP(APFloat(Val), VT);
2450 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2451 return getConstantFP(APFloat(Val), VT);
2454 return getConstant(Val.byteSwap(), VT);
2456 return getConstant(Val.countPopulation(), VT);
2458 case ISD::CTLZ_ZERO_UNDEF:
2459 return getConstant(Val.countLeadingZeros(), VT);
2461 case ISD::CTTZ_ZERO_UNDEF:
2462 return getConstant(Val.countTrailingZeros(), VT);
2466 // Constant fold unary operations with a floating point constant operand.
2467 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2468 APFloat V = C->getValueAPF(); // make copy
2472 return getConstantFP(V, VT);
2475 return getConstantFP(V, VT);
2477 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2478 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2479 return getConstantFP(V, VT);
2483 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2484 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2485 return getConstantFP(V, VT);
2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2490 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2491 return getConstantFP(V, VT);
2494 case ISD::FP_EXTEND: {
2496 // This can return overflow, underflow, or inexact; we don't care.
2497 // FIXME need to be more flexible about rounding mode.
2498 (void)V.convert(*EVTToAPFloatSemantics(VT),
2499 APFloat::rmNearestTiesToEven, &ignored);
2500 return getConstantFP(V, VT);
2502 case ISD::FP_TO_SINT:
2503 case ISD::FP_TO_UINT: {
2506 assert(integerPartWidth >= 64);
2507 // FIXME need to be more flexible about rounding mode.
2508 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2509 Opcode==ISD::FP_TO_SINT,
2510 APFloat::rmTowardZero, &ignored);
2511 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2513 APInt api(VT.getSizeInBits(), x);
2514 return getConstant(api, VT);
2517 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2518 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2519 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2520 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2525 unsigned OpOpcode = Operand.getNode()->getOpcode();
2527 case ISD::TokenFactor:
2528 case ISD::MERGE_VALUES:
2529 case ISD::CONCAT_VECTORS:
2530 return Operand; // Factor, merge or concat of one node? No need.
2531 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2532 case ISD::FP_EXTEND:
2533 assert(VT.isFloatingPoint() &&
2534 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2535 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2536 assert((!VT.isVector() ||
2537 VT.getVectorNumElements() ==
2538 Operand.getValueType().getVectorNumElements()) &&
2539 "Vector element count mismatch!");
2540 if (Operand.getOpcode() == ISD::UNDEF)
2541 return getUNDEF(VT);
2543 case ISD::SIGN_EXTEND:
2544 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2545 "Invalid SIGN_EXTEND!");
2546 if (Operand.getValueType() == VT) return Operand; // noop extension
2547 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2548 "Invalid sext node, dst < src!");
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2554 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2555 else if (OpOpcode == ISD::UNDEF)
2556 // sext(undef) = 0, because the top bits will all be the same.
2557 return getConstant(0, VT);
2559 case ISD::ZERO_EXTEND:
2560 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2561 "Invalid ZERO_EXTEND!");
2562 if (Operand.getValueType() == VT) return Operand; // noop extension
2563 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2564 "Invalid zext node, dst < src!");
2565 assert((!VT.isVector() ||
2566 VT.getVectorNumElements() ==
2567 Operand.getValueType().getVectorNumElements()) &&
2568 "Vector element count mismatch!");
2569 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2570 return getNode(ISD::ZERO_EXTEND, DL, VT,
2571 Operand.getNode()->getOperand(0));
2572 else if (OpOpcode == ISD::UNDEF)
2573 // zext(undef) = 0, because the top bits will be zero.
2574 return getConstant(0, VT);
2576 case ISD::ANY_EXTEND:
2577 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2578 "Invalid ANY_EXTEND!");
2579 if (Operand.getValueType() == VT) return Operand; // noop extension
2580 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2581 "Invalid anyext node, dst < src!");
2582 assert((!VT.isVector() ||
2583 VT.getVectorNumElements() ==
2584 Operand.getValueType().getVectorNumElements()) &&
2585 "Vector element count mismatch!");
2587 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2588 OpOpcode == ISD::ANY_EXTEND)
2589 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2590 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2591 else if (OpOpcode == ISD::UNDEF)
2592 return getUNDEF(VT);
2594 // (ext (trunx x)) -> x
2595 if (OpOpcode == ISD::TRUNCATE) {
2596 SDValue OpOp = Operand.getNode()->getOperand(0);
2597 if (OpOp.getValueType() == VT)
2602 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2603 "Invalid TRUNCATE!");
2604 if (Operand.getValueType() == VT) return Operand; // noop truncate
2605 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2606 "Invalid truncate node, src < dst!");
2607 assert((!VT.isVector() ||
2608 VT.getVectorNumElements() ==
2609 Operand.getValueType().getVectorNumElements()) &&
2610 "Vector element count mismatch!");
2611 if (OpOpcode == ISD::TRUNCATE)
2612 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2613 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2614 OpOpcode == ISD::ANY_EXTEND) {
2615 // If the source is smaller than the dest, we still need an extend.
2616 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2617 .bitsLT(VT.getScalarType()))
2618 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2619 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2620 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2621 return Operand.getNode()->getOperand(0);
2623 if (OpOpcode == ISD::UNDEF)
2624 return getUNDEF(VT);
2627 // Basic sanity checking.
2628 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2629 && "Cannot BITCAST between types of different sizes!");
2630 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2631 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2632 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2633 if (OpOpcode == ISD::UNDEF)
2634 return getUNDEF(VT);
2636 case ISD::SCALAR_TO_VECTOR:
2637 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2638 (VT.getVectorElementType() == Operand.getValueType() ||
2639 (VT.getVectorElementType().isInteger() &&
2640 Operand.getValueType().isInteger() &&
2641 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2642 "Illegal SCALAR_TO_VECTOR node!");
2643 if (OpOpcode == ISD::UNDEF)
2644 return getUNDEF(VT);
2645 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2646 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2647 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2648 Operand.getConstantOperandVal(1) == 0 &&
2649 Operand.getOperand(0).getValueType() == VT)
2650 return Operand.getOperand(0);
2653 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2654 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2655 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2656 Operand.getNode()->getOperand(0));
2657 if (OpOpcode == ISD::FNEG) // --X -> X
2658 return Operand.getNode()->getOperand(0);
2661 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2662 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2667 SDVTList VTs = getVTList(VT);
2668 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2669 FoldingSetNodeID ID;
2670 SDValue Ops[1] = { Operand };
2671 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2673 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2674 return SDValue(E, 0);
2676 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2677 CSEMap.InsertNode(N, IP);
2679 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2682 AllNodes.push_back(N);
2686 return SDValue(N, 0);
2689 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2691 ConstantSDNode *Cst1,
2692 ConstantSDNode *Cst2) {
2693 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2696 case ISD::ADD: return getConstant(C1 + C2, VT);
2697 case ISD::SUB: return getConstant(C1 - C2, VT);
2698 case ISD::MUL: return getConstant(C1 * C2, VT);
2700 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2703 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2706 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2709 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2711 case ISD::AND: return getConstant(C1 & C2, VT);
2712 case ISD::OR: return getConstant(C1 | C2, VT);
2713 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2714 case ISD::SHL: return getConstant(C1 << C2, VT);
2715 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2716 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2717 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2718 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2725 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2726 SDValue N1, SDValue N2) {
2727 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2728 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2731 case ISD::TokenFactor:
2732 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2733 N2.getValueType() == MVT::Other && "Invalid token factor!");
2734 // Fold trivial token factors.
2735 if (N1.getOpcode() == ISD::EntryToken) return N2;
2736 if (N2.getOpcode() == ISD::EntryToken) return N1;
2737 if (N1 == N2) return N1;
2739 case ISD::CONCAT_VECTORS:
2740 // Concat of UNDEFs is UNDEF.
2741 if (N1.getOpcode() == ISD::UNDEF &&
2742 N2.getOpcode() == ISD::UNDEF)
2743 return getUNDEF(VT);
2745 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2746 // one big BUILD_VECTOR.
2747 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2748 N2.getOpcode() == ISD::BUILD_VECTOR) {
2749 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2750 N1.getNode()->op_end());
2751 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2752 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2756 assert(VT.isInteger() && "This operator does not apply to FP types!");
2757 assert(N1.getValueType() == N2.getValueType() &&
2758 N1.getValueType() == VT && "Binary operator types must match!");
2759 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2760 // worth handling here.
2761 if (N2C && N2C->isNullValue())
2763 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2770 assert(VT.isInteger() && "This operator does not apply to FP types!");
2771 assert(N1.getValueType() == N2.getValueType() &&
2772 N1.getValueType() == VT && "Binary operator types must match!");
2773 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2774 // it's worth handling here.
2775 if (N2C && N2C->isNullValue())
2785 assert(VT.isInteger() && "This operator does not apply to FP types!");
2786 assert(N1.getValueType() == N2.getValueType() &&
2787 N1.getValueType() == VT && "Binary operator types must match!");
2794 if (getTarget().Options.UnsafeFPMath) {
2795 if (Opcode == ISD::FADD) {
2797 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2798 if (CFP->getValueAPF().isZero())
2801 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2802 if (CFP->getValueAPF().isZero())
2804 } else if (Opcode == ISD::FSUB) {
2806 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2807 if (CFP->getValueAPF().isZero())
2809 } else if (Opcode == ISD::FMUL) {
2810 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2813 // If the first operand isn't the constant, try the second
2815 CFP = dyn_cast<ConstantFPSDNode>(N2);
2822 return SDValue(CFP,0);
2824 if (CFP->isExactlyValue(1.0))
2829 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2830 assert(N1.getValueType() == N2.getValueType() &&
2831 N1.getValueType() == VT && "Binary operator types must match!");
2833 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2834 assert(N1.getValueType() == VT &&
2835 N1.getValueType().isFloatingPoint() &&
2836 N2.getValueType().isFloatingPoint() &&
2837 "Invalid FCOPYSIGN!");
2844 assert(VT == N1.getValueType() &&
2845 "Shift operators return type must be the same as their first arg");
2846 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2847 "Shifts only work on integers");
2848 // Verify that the shift amount VT is bit enough to hold valid shift
2849 // amounts. This catches things like trying to shift an i1024 value by an
2850 // i8, which is easy to fall into in generic code that uses
2851 // TLI.getShiftAmount().
2852 assert(N2.getValueType().getSizeInBits() >=
2853 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2854 "Invalid use of small shift amount with oversized value!");
2856 // Always fold shifts of i1 values so the code generator doesn't need to
2857 // handle them. Since we know the size of the shift has to be less than the
2858 // size of the value, the shift/rotate count is guaranteed to be zero.
2861 if (N2C && N2C->isNullValue())
2864 case ISD::FP_ROUND_INREG: {
2865 EVT EVT = cast<VTSDNode>(N2)->getVT();
2866 assert(VT == N1.getValueType() && "Not an inreg round!");
2867 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2868 "Cannot FP_ROUND_INREG integer types");
2869 assert(EVT.isVector() == VT.isVector() &&
2870 "FP_ROUND_INREG type should be vector iff the operand "
2872 assert((!EVT.isVector() ||
2873 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2874 "Vector element counts must match in FP_ROUND_INREG");
2875 assert(EVT.bitsLE(VT) && "Not rounding down!");
2877 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2881 assert(VT.isFloatingPoint() &&
2882 N1.getValueType().isFloatingPoint() &&
2883 VT.bitsLE(N1.getValueType()) &&
2884 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2885 if (N1.getValueType() == VT) return N1; // noop conversion.
2887 case ISD::AssertSext:
2888 case ISD::AssertZext: {
2889 EVT EVT = cast<VTSDNode>(N2)->getVT();
2890 assert(VT == N1.getValueType() && "Not an inreg extend!");
2891 assert(VT.isInteger() && EVT.isInteger() &&
2892 "Cannot *_EXTEND_INREG FP types");
2893 assert(!EVT.isVector() &&
2894 "AssertSExt/AssertZExt type should be the vector element type "
2895 "rather than the vector type!");
2896 assert(EVT.bitsLE(VT) && "Not extending!");
2897 if (VT == EVT) return N1; // noop assertion.
2900 case ISD::SIGN_EXTEND_INREG: {
2901 EVT EVT = cast<VTSDNode>(N2)->getVT();
2902 assert(VT == N1.getValueType() && "Not an inreg extend!");
2903 assert(VT.isInteger() && EVT.isInteger() &&
2904 "Cannot *_EXTEND_INREG FP types");
2905 assert(EVT.isVector() == VT.isVector() &&
2906 "SIGN_EXTEND_INREG type should be vector iff the operand "
2908 assert((!EVT.isVector() ||
2909 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2910 "Vector element counts must match in SIGN_EXTEND_INREG");
2911 assert(EVT.bitsLE(VT) && "Not extending!");
2912 if (EVT == VT) return N1; // Not actually extending
2915 APInt Val = N1C->getAPIntValue();
2916 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2917 Val <<= Val.getBitWidth()-FromBits;
2918 Val = Val.ashr(Val.getBitWidth()-FromBits);
2919 return getConstant(Val, VT);
2923 case ISD::EXTRACT_VECTOR_ELT:
2924 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2925 if (N1.getOpcode() == ISD::UNDEF)
2926 return getUNDEF(VT);
2928 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2929 // expanding copies of large vectors from registers.
2931 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2932 N1.getNumOperands() > 0) {
2934 N1.getOperand(0).getValueType().getVectorNumElements();
2935 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2936 N1.getOperand(N2C->getZExtValue() / Factor),
2937 getConstant(N2C->getZExtValue() % Factor,
2938 N2.getValueType()));
2941 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2942 // expanding large vector constants.
2943 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2944 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2946 if (VT != Elt.getValueType())
2947 // If the vector element type is not legal, the BUILD_VECTOR operands
2948 // are promoted and implicitly truncated, and the result implicitly
2949 // extended. Make that explicit here.
2950 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2955 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2956 // operations are lowered to scalars.
2957 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2958 // If the indices are the same, return the inserted element else
2959 // if the indices are known different, extract the element from
2960 // the original vector.
2961 SDValue N1Op2 = N1.getOperand(2);
2962 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2964 if (N1Op2C && N2C) {
2965 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2966 if (VT == N1.getOperand(1).getValueType())
2967 return N1.getOperand(1);
2969 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2972 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2976 case ISD::EXTRACT_ELEMENT:
2977 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2978 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2979 (N1.getValueType().isInteger() == VT.isInteger()) &&
2980 N1.getValueType() != VT &&
2981 "Wrong types for EXTRACT_ELEMENT!");
2983 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2984 // 64-bit integers into 32-bit parts. Instead of building the extract of
2985 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2986 if (N1.getOpcode() == ISD::BUILD_PAIR)
2987 return N1.getOperand(N2C->getZExtValue());
2989 // EXTRACT_ELEMENT of a constant int is also very common.
2990 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2991 unsigned ElementSize = VT.getSizeInBits();
2992 unsigned Shift = ElementSize * N2C->getZExtValue();
2993 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2994 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2997 case ISD::EXTRACT_SUBVECTOR: {
2999 if (VT.isSimple() && N1.getValueType().isSimple()) {
3000 assert(VT.isVector() && N1.getValueType().isVector() &&
3001 "Extract subvector VTs must be a vectors!");
3002 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3003 "Extract subvector VTs must have the same element type!");
3004 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3005 "Extract subvector must be from larger vector to smaller vector!");
3007 if (isa<ConstantSDNode>(Index.getNode())) {
3008 assert((VT.getVectorNumElements() +
3009 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3010 <= N1.getValueType().getVectorNumElements())
3011 && "Extract subvector overflow!");
3014 // Trivial extraction.
3015 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3024 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3025 if (SV.getNode()) return SV;
3026 } else { // Cannonicalize constant to RHS if commutative
3027 if (isCommutativeBinOp(Opcode)) {
3028 std::swap(N1C, N2C);
3034 // Constant fold FP operations.
3035 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3036 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3038 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3039 // Cannonicalize constant to RHS if commutative
3040 std::swap(N1CFP, N2CFP);
3043 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3044 APFloat::opStatus s;
3047 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3048 if (s != APFloat::opInvalidOp)
3049 return getConstantFP(V1, VT);
3052 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3053 if (s!=APFloat::opInvalidOp)
3054 return getConstantFP(V1, VT);
3057 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3058 if (s!=APFloat::opInvalidOp)
3059 return getConstantFP(V1, VT);
3062 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3063 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3064 return getConstantFP(V1, VT);
3067 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3068 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3069 return getConstantFP(V1, VT);
3071 case ISD::FCOPYSIGN:
3073 return getConstantFP(V1, VT);
3078 if (Opcode == ISD::FP_ROUND) {
3079 APFloat V = N1CFP->getValueAPF(); // make copy
3081 // This can return overflow, underflow, or inexact; we don't care.
3082 // FIXME need to be more flexible about rounding mode.
3083 (void)V.convert(*EVTToAPFloatSemantics(VT),
3084 APFloat::rmNearestTiesToEven, &ignored);
3085 return getConstantFP(V, VT);
3089 // Canonicalize an UNDEF to the RHS, even over a constant.
3090 if (N1.getOpcode() == ISD::UNDEF) {
3091 if (isCommutativeBinOp(Opcode)) {
3095 case ISD::FP_ROUND_INREG:
3096 case ISD::SIGN_EXTEND_INREG:
3102 return N1; // fold op(undef, arg2) -> undef
3110 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3111 // For vectors, we can't easily build an all zero vector, just return
3118 // Fold a bunch of operators when the RHS is undef.
3119 if (N2.getOpcode() == ISD::UNDEF) {
3122 if (N1.getOpcode() == ISD::UNDEF)
3123 // Handle undef ^ undef -> 0 special case. This is a common
3125 return getConstant(0, VT);
3135 return N2; // fold op(arg1, undef) -> undef
3141 if (getTarget().Options.UnsafeFPMath)
3149 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3150 // For vectors, we can't easily build an all zero vector, just return
3155 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3156 // For vectors, we can't easily build an all one vector, just return
3164 // Memoize this node if possible.
3166 SDVTList VTs = getVTList(VT);
3167 if (VT != MVT::Glue) {
3168 SDValue Ops[] = { N1, N2 };
3169 FoldingSetNodeID ID;
3170 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3173 return SDValue(E, 0);
3175 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3176 CSEMap.InsertNode(N, IP);
3178 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3181 AllNodes.push_back(N);
3185 return SDValue(N, 0);
3188 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3189 SDValue N1, SDValue N2, SDValue N3) {
3190 // Perform various simplifications.
3191 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3193 case ISD::CONCAT_VECTORS:
3194 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3195 // one big BUILD_VECTOR.
3196 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3197 N2.getOpcode() == ISD::BUILD_VECTOR &&
3198 N3.getOpcode() == ISD::BUILD_VECTOR) {
3199 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3200 N1.getNode()->op_end());
3201 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3202 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3203 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3207 // Use FoldSetCC to simplify SETCC's.
3208 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3209 if (Simp.getNode()) return Simp;
3214 if (N1C->getZExtValue())
3215 return N2; // select true, X, Y -> X
3216 return N3; // select false, X, Y -> Y
3219 if (N2 == N3) return N2; // select C, X, X -> X
3221 case ISD::VECTOR_SHUFFLE:
3222 llvm_unreachable("should use getVectorShuffle constructor!");
3223 case ISD::INSERT_SUBVECTOR: {
3225 if (VT.isSimple() && N1.getValueType().isSimple()
3226 && N2.getValueType().isSimple()) {
3227 assert(VT.isVector() && N1.getValueType().isVector() &&
3228 N2.getValueType().isVector() &&
3229 "Insert subvector VTs must be a vectors");
3230 assert(VT == N1.getValueType() &&
3231 "Dest and insert subvector source types must match!");
3232 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3233 "Insert subvector must be from smaller vector to larger vector!");
3234 if (isa<ConstantSDNode>(Index.getNode())) {
3235 assert((N2.getValueType().getVectorNumElements() +
3236 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3237 <= VT.getVectorNumElements())
3238 && "Insert subvector overflow!");
3241 // Trivial insertion.
3242 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3248 // Fold bit_convert nodes from a type to themselves.
3249 if (N1.getValueType() == VT)
3254 // Memoize node if it doesn't produce a flag.
3256 SDVTList VTs = getVTList(VT);
3257 if (VT != MVT::Glue) {
3258 SDValue Ops[] = { N1, N2, N3 };
3259 FoldingSetNodeID ID;
3260 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3263 return SDValue(E, 0);
3265 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3266 CSEMap.InsertNode(N, IP);
3268 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3271 AllNodes.push_back(N);
3275 return SDValue(N, 0);
3278 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3279 SDValue N1, SDValue N2, SDValue N3,
3281 SDValue Ops[] = { N1, N2, N3, N4 };
3282 return getNode(Opcode, DL, VT, Ops, 4);
3285 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3286 SDValue N1, SDValue N2, SDValue N3,
3287 SDValue N4, SDValue N5) {
3288 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3289 return getNode(Opcode, DL, VT, Ops, 5);
3292 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3293 /// the incoming stack arguments to be loaded from the stack.
3294 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3295 SmallVector<SDValue, 8> ArgChains;
3297 // Include the original chain at the beginning of the list. When this is
3298 // used by target LowerCall hooks, this helps legalize find the
3299 // CALLSEQ_BEGIN node.
3300 ArgChains.push_back(Chain);
3302 // Add a chain value for each stack argument.
3303 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3304 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3305 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3306 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3307 if (FI->getIndex() < 0)
3308 ArgChains.push_back(SDValue(L, 1));
3310 // Build a tokenfactor for all the chains.
3311 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3312 &ArgChains[0], ArgChains.size());
3315 /// SplatByte - Distribute ByteVal over NumBits bits.
3316 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3317 APInt Val = APInt(NumBits, ByteVal);
3319 for (unsigned i = NumBits; i > 8; i >>= 1) {
3320 Val = (Val << Shift) | Val;
3326 /// getMemsetValue - Vectorized representation of the memset value
3328 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3330 assert(Value.getOpcode() != ISD::UNDEF);
3332 unsigned NumBits = VT.getScalarType().getSizeInBits();
3333 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3334 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3336 return DAG.getConstant(Val, VT);
3337 return DAG.getConstantFP(APFloat(Val), VT);
3340 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3342 // Use a multiplication with 0x010101... to extend the input to the
3344 APInt Magic = SplatByte(NumBits, 0x01);
3345 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3351 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3352 /// used when a memcpy is turned into a memset when the source is a constant
3354 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3355 const TargetLowering &TLI, StringRef Str) {
3356 // Handle vector with all elements zero.
3359 return DAG.getConstant(0, VT);
3360 else if (VT == MVT::f32 || VT == MVT::f64)
3361 return DAG.getConstantFP(0.0, VT);
3362 else if (VT.isVector()) {
3363 unsigned NumElts = VT.getVectorNumElements();
3364 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3365 return DAG.getNode(ISD::BITCAST, dl, VT,
3366 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3369 llvm_unreachable("Expected type!");
3372 assert(!VT.isVector() && "Can't handle vector type here!");
3373 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3374 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3376 APInt Val(NumBytes*8, 0);
3377 if (TLI.isLittleEndian()) {
3378 for (unsigned i = 0; i != NumBytes; ++i)
3379 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3381 for (unsigned i = 0; i != NumBytes; ++i)
3382 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3385 if (TLI.isIntImmLegal(Val, VT))
3386 return DAG.getConstant(Val, VT);
3387 return SDValue(0, 0);
3390 /// getMemBasePlusOffset - Returns base and offset node for the
3392 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3393 SelectionDAG &DAG) {
3394 EVT VT = Base.getValueType();
3395 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3396 VT, Base, DAG.getConstant(Offset, VT));
3399 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3401 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3402 unsigned SrcDelta = 0;
3403 GlobalAddressSDNode *G = NULL;
3404 if (Src.getOpcode() == ISD::GlobalAddress)
3405 G = cast<GlobalAddressSDNode>(Src);
3406 else if (Src.getOpcode() == ISD::ADD &&
3407 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3408 Src.getOperand(1).getOpcode() == ISD::Constant) {
3409 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3410 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3415 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3418 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3419 /// to replace the memset / memcpy. Return true if the number of memory ops
3420 /// is below the threshold. It returns the types of the sequence of
3421 /// memory ops to perform memset / memcpy by reference.
3422 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3423 unsigned Limit, uint64_t Size,
3424 unsigned DstAlign, unsigned SrcAlign,
3429 const TargetLowering &TLI) {
3430 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3431 "Expecting memcpy / memset source to meet alignment requirement!");
3432 // If 'SrcAlign' is zero, that means the memory operation does not need to
3433 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3434 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3435 // is the specified alignment of the memory operation. If it is zero, that
3436 // means it's possible to change the alignment of the destination.
3437 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3438 // not need to be loaded.
3439 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3440 IsZeroVal, MemcpyStrSrc,
3441 DAG.getMachineFunction());
3443 if (VT == MVT::Other) {
3444 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3445 TLI.allowsUnalignedMemoryAccesses(VT)) {
3446 VT = TLI.getPointerTy();
3448 switch (DstAlign & 7) {
3449 case 0: VT = MVT::i64; break;
3450 case 4: VT = MVT::i32; break;
3451 case 2: VT = MVT::i16; break;
3452 default: VT = MVT::i8; break;
3457 while (!TLI.isTypeLegal(LVT))
3458 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3459 assert(LVT.isInteger());
3465 unsigned NumMemOps = 0;
3467 if (++NumMemOps > Limit)
3470 unsigned VTSize = VT.getSizeInBits() / 8;
3471 while (VTSize > Size) {
3472 // For now, only use non-vector load / store's for the left-over pieces.
3475 if (VT.isVector() || VT.isFloatingPoint()) {
3476 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3477 while (!TLI.isOperationLegalOrCustom(ISD::STORE, NewVT)) {
3478 if (NewVT == MVT::i64 &&
3479 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64)) {
3480 // i64 is usually not legal on 32-bit targets, but f64 may be.
3484 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3486 NewVTSize = NewVT.getSizeInBits() / 8;
3488 // This can result in a type that is not legal on the target, e.g.
3489 // 1 or 2 bytes on PPC.
3490 NewVT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3491 NewVTSize = VTSize >> 1;
3494 // If the new VT cannot cover all of the remaining bits, then consider
3495 // issuing a (or a pair of) unaligned and overlapping load / store.
3496 // FIXME: Only does this for 64-bit or more since we don't have proper
3497 // cost model for unaligned load / store.
3499 if (AllowOverlap && VTSize >= 8 && NewVTSize < Size &&
3500 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3508 MemOps.push_back(VT);
3515 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3516 SDValue Chain, SDValue Dst,
3517 SDValue Src, uint64_t Size,
3518 unsigned Align, bool isVol,
3520 MachinePointerInfo DstPtrInfo,
3521 MachinePointerInfo SrcPtrInfo) {
3522 // Turn a memcpy of undef to nop.
3523 if (Src.getOpcode() == ISD::UNDEF)
3526 // Expand memcpy to a series of load and store ops if the size operand falls
3527 // below a certain threshold.
3528 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3529 // rather than maybe a humongous number of loads and stores.
3530 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3531 std::vector<EVT> MemOps;
3532 bool DstAlignCanChange = false;
3533 MachineFunction &MF = DAG.getMachineFunction();
3534 MachineFrameInfo *MFI = MF.getFrameInfo();
3536 MF.getFunction()->getFnAttributes().
3537 hasAttribute(Attributes::OptimizeForSize);
3538 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3539 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3540 DstAlignCanChange = true;
3541 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3542 if (Align > SrcAlign)
3545 bool CopyFromStr = isMemSrcFromString(Src, Str);
3546 bool isZeroStr = CopyFromStr && Str.empty();
3547 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3549 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3550 (DstAlignCanChange ? 0 : Align),
3551 (isZeroStr ? 0 : SrcAlign),
3552 true, CopyFromStr, true, DAG, TLI))
3555 if (DstAlignCanChange) {
3556 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3557 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3558 if (NewAlign > Align) {
3559 // Give the stack frame object a larger alignment if needed.
3560 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3561 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3566 SmallVector<SDValue, 8> OutChains;
3567 unsigned NumMemOps = MemOps.size();
3568 uint64_t SrcOff = 0, DstOff = 0;
3569 for (unsigned i = 0; i != NumMemOps; ++i) {
3571 unsigned VTSize = VT.getSizeInBits() / 8;
3572 SDValue Value, Store;
3574 if (VTSize > Size) {
3575 // Issuing an unaligned load / store pair that overlaps with the previous
3576 // pair. Adjust the offset accordingly.
3577 assert(i == NumMemOps-1 && i != 0);
3578 SrcOff -= VTSize - Size;
3579 DstOff -= VTSize - Size;
3583 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3584 // It's unlikely a store of a vector immediate can be done in a single
3585 // instruction. It would require a load from a constantpool first.
3586 // We only handle zero vectors here.
3587 // FIXME: Handle other cases where store of vector immediate is done in
3588 // a single instruction.
3589 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3590 if (Value.getNode())
3591 Store = DAG.getStore(Chain, dl, Value,
3592 getMemBasePlusOffset(Dst, DstOff, DAG),
3593 DstPtrInfo.getWithOffset(DstOff), isVol,
3597 if (!Store.getNode()) {
3598 // The type might not be legal for the target. This should only happen
3599 // if the type is smaller than a legal type, as on PPC, so the right
3600 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3601 // to Load/Store if NVT==VT.
3602 // FIXME does the case above also need this?
3603 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3604 assert(NVT.bitsGE(VT));
3605 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3606 getMemBasePlusOffset(Src, SrcOff, DAG),
3607 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3608 MinAlign(SrcAlign, SrcOff));
3609 Store = DAG.getTruncStore(Chain, dl, Value,
3610 getMemBasePlusOffset(Dst, DstOff, DAG),
3611 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3614 OutChains.push_back(Store);
3620 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3621 &OutChains[0], OutChains.size());
3624 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3625 SDValue Chain, SDValue Dst,
3626 SDValue Src, uint64_t Size,
3627 unsigned Align, bool isVol,
3629 MachinePointerInfo DstPtrInfo,
3630 MachinePointerInfo SrcPtrInfo) {
3631 // Turn a memmove of undef to nop.
3632 if (Src.getOpcode() == ISD::UNDEF)
3635 // Expand memmove to a series of load and store ops if the size operand falls
3636 // below a certain threshold.
3637 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3638 std::vector<EVT> MemOps;
3639 bool DstAlignCanChange = false;
3640 MachineFunction &MF = DAG.getMachineFunction();
3641 MachineFrameInfo *MFI = MF.getFrameInfo();
3642 bool OptSize = MF.getFunction()->getFnAttributes().
3643 hasAttribute(Attributes::OptimizeForSize);
3644 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3645 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3646 DstAlignCanChange = true;
3647 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3648 if (Align > SrcAlign)
3650 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3652 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3653 (DstAlignCanChange ? 0 : Align),
3654 SrcAlign, true, false, false, DAG, TLI))
3657 if (DstAlignCanChange) {
3658 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3659 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3660 if (NewAlign > Align) {
3661 // Give the stack frame object a larger alignment if needed.
3662 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3663 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3668 uint64_t SrcOff = 0, DstOff = 0;
3669 SmallVector<SDValue, 8> LoadValues;
3670 SmallVector<SDValue, 8> LoadChains;
3671 SmallVector<SDValue, 8> OutChains;
3672 unsigned NumMemOps = MemOps.size();
3673 for (unsigned i = 0; i < NumMemOps; i++) {
3675 unsigned VTSize = VT.getSizeInBits() / 8;
3676 SDValue Value, Store;
3678 Value = DAG.getLoad(VT, dl, Chain,
3679 getMemBasePlusOffset(Src, SrcOff, DAG),
3680 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3681 false, false, SrcAlign);
3682 LoadValues.push_back(Value);
3683 LoadChains.push_back(Value.getValue(1));
3686 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3687 &LoadChains[0], LoadChains.size());
3689 for (unsigned i = 0; i < NumMemOps; i++) {
3691 unsigned VTSize = VT.getSizeInBits() / 8;
3692 SDValue Value, Store;
3694 Store = DAG.getStore(Chain, dl, LoadValues[i],
3695 getMemBasePlusOffset(Dst, DstOff, DAG),
3696 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3697 OutChains.push_back(Store);
3701 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3702 &OutChains[0], OutChains.size());
3705 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3706 SDValue Chain, SDValue Dst,
3707 SDValue Src, uint64_t Size,
3708 unsigned Align, bool isVol,
3709 MachinePointerInfo DstPtrInfo) {
3710 // Turn a memset of undef to nop.
3711 if (Src.getOpcode() == ISD::UNDEF)
3714 // Expand memset to a series of load/store ops if the size operand
3715 // falls below a certain threshold.
3716 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3717 std::vector<EVT> MemOps;
3718 bool DstAlignCanChange = false;
3719 MachineFunction &MF = DAG.getMachineFunction();
3720 MachineFrameInfo *MFI = MF.getFrameInfo();
3721 bool OptSize = MF.getFunction()->getFnAttributes().
3722 hasAttribute(Attributes::OptimizeForSize);
3723 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3724 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3725 DstAlignCanChange = true;
3727 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3728 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3729 Size, (DstAlignCanChange ? 0 : Align), 0,
3730 IsZeroVal, false, true, DAG, TLI))
3733 if (DstAlignCanChange) {
3734 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3735 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3736 if (NewAlign > Align) {
3737 // Give the stack frame object a larger alignment if needed.
3738 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3739 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3744 SmallVector<SDValue, 8> OutChains;
3745 uint64_t DstOff = 0;
3746 unsigned NumMemOps = MemOps.size();
3748 // Find the largest store and generate the bit pattern for it.
3749 EVT LargestVT = MemOps[0];
3750 for (unsigned i = 1; i < NumMemOps; i++)
3751 if (MemOps[i].bitsGT(LargestVT))
3752 LargestVT = MemOps[i];
3753 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3755 for (unsigned i = 0; i < NumMemOps; i++) {
3757 unsigned VTSize = VT.getSizeInBits() / 8;
3758 if (VTSize > Size) {
3759 // Issuing an unaligned load / store pair that overlaps with the previous
3760 // pair. Adjust the offset accordingly.
3761 assert(i == NumMemOps-1 && i != 0);
3762 DstOff -= VTSize - Size;
3765 // If this store is smaller than the largest store see whether we can get
3766 // the smaller value for free with a truncate.
3767 SDValue Value = MemSetValue;
3768 if (VT.bitsLT(LargestVT)) {
3769 if (!LargestVT.isVector() && !VT.isVector() &&
3770 TLI.isTruncateFree(LargestVT, VT))
3771 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3773 Value = getMemsetValue(Src, VT, DAG, dl);
3775 assert(Value.getValueType() == VT && "Value with wrong type.");
3776 SDValue Store = DAG.getStore(Chain, dl, Value,
3777 getMemBasePlusOffset(Dst, DstOff, DAG),
3778 DstPtrInfo.getWithOffset(DstOff),
3779 isVol, false, Align);
3780 OutChains.push_back(Store);
3781 DstOff += VT.getSizeInBits() / 8;
3785 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3786 &OutChains[0], OutChains.size());
3789 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3790 SDValue Src, SDValue Size,
3791 unsigned Align, bool isVol, bool AlwaysInline,
3792 MachinePointerInfo DstPtrInfo,
3793 MachinePointerInfo SrcPtrInfo) {
3795 // Check to see if we should lower the memcpy to loads and stores first.
3796 // For cases within the target-specified limits, this is the best choice.
3797 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3799 // Memcpy with size zero? Just return the original chain.
3800 if (ConstantSize->isNullValue())
3803 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3804 ConstantSize->getZExtValue(),Align,
3805 isVol, false, DstPtrInfo, SrcPtrInfo);
3806 if (Result.getNode())
3810 // Then check to see if we should lower the memcpy with target-specific
3811 // code. If the target chooses to do this, this is the next best.
3813 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3814 isVol, AlwaysInline,
3815 DstPtrInfo, SrcPtrInfo);
3816 if (Result.getNode())
3819 // If we really need inline code and the target declined to provide it,
3820 // use a (potentially long) sequence of loads and stores.
3822 assert(ConstantSize && "AlwaysInline requires a constant size!");
3823 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3824 ConstantSize->getZExtValue(), Align, isVol,
3825 true, DstPtrInfo, SrcPtrInfo);
3828 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3829 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3830 // respect volatile, so they may do things like read or write memory
3831 // beyond the given memory regions. But fixing this isn't easy, and most
3832 // people don't care.
3834 // Emit a library call.
3835 TargetLowering::ArgListTy Args;
3836 TargetLowering::ArgListEntry Entry;
3837 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3838 Entry.Node = Dst; Args.push_back(Entry);
3839 Entry.Node = Src; Args.push_back(Entry);
3840 Entry.Node = Size; Args.push_back(Entry);
3841 // FIXME: pass in DebugLoc
3843 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3844 false, false, false, false, 0,
3845 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3846 /*isTailCall=*/false,
3847 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3848 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3849 TLI.getPointerTy()),
3851 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3853 return CallResult.second;
3856 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3857 SDValue Src, SDValue Size,
3858 unsigned Align, bool isVol,
3859 MachinePointerInfo DstPtrInfo,
3860 MachinePointerInfo SrcPtrInfo) {
3862 // Check to see if we should lower the memmove to loads and stores first.
3863 // For cases within the target-specified limits, this is the best choice.
3864 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3866 // Memmove with size zero? Just return the original chain.
3867 if (ConstantSize->isNullValue())
3871 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3872 ConstantSize->getZExtValue(), Align, isVol,
3873 false, DstPtrInfo, SrcPtrInfo);
3874 if (Result.getNode())
3878 // Then check to see if we should lower the memmove with target-specific
3879 // code. If the target chooses to do this, this is the next best.
3881 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3882 DstPtrInfo, SrcPtrInfo);
3883 if (Result.getNode())
3886 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3887 // not be safe. See memcpy above for more details.
3889 // Emit a library call.
3890 TargetLowering::ArgListTy Args;
3891 TargetLowering::ArgListEntry Entry;
3892 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3893 Entry.Node = Dst; Args.push_back(Entry);
3894 Entry.Node = Src; Args.push_back(Entry);
3895 Entry.Node = Size; Args.push_back(Entry);
3896 // FIXME: pass in DebugLoc
3898 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3899 false, false, false, false, 0,
3900 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3901 /*isTailCall=*/false,
3902 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3903 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3904 TLI.getPointerTy()),
3906 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3908 return CallResult.second;
3911 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3912 SDValue Src, SDValue Size,
3913 unsigned Align, bool isVol,
3914 MachinePointerInfo DstPtrInfo) {
3916 // Check to see if we should lower the memset to stores first.
3917 // For cases within the target-specified limits, this is the best choice.
3918 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3920 // Memset with size zero? Just return the original chain.
3921 if (ConstantSize->isNullValue())
3925 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3926 Align, isVol, DstPtrInfo);
3928 if (Result.getNode())
3932 // Then check to see if we should lower the memset with target-specific
3933 // code. If the target chooses to do this, this is the next best.
3935 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3937 if (Result.getNode())
3940 // Emit a library call.
3941 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3942 TargetLowering::ArgListTy Args;
3943 TargetLowering::ArgListEntry Entry;
3944 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3945 Args.push_back(Entry);
3946 // Extend or truncate the argument to be an i32 value for the call.
3947 if (Src.getValueType().bitsGT(MVT::i32))
3948 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3950 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3952 Entry.Ty = Type::getInt32Ty(*getContext());
3953 Entry.isSExt = true;
3954 Args.push_back(Entry);
3956 Entry.Ty = IntPtrTy;
3957 Entry.isSExt = false;
3958 Args.push_back(Entry);
3959 // FIXME: pass in DebugLoc
3961 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3962 false, false, false, false, 0,
3963 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3964 /*isTailCall=*/false,
3965 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3966 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3967 TLI.getPointerTy()),
3969 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3971 return CallResult.second;
3974 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3975 SDValue Chain, SDValue Ptr, SDValue Cmp,
3976 SDValue Swp, MachinePointerInfo PtrInfo,
3978 AtomicOrdering Ordering,
3979 SynchronizationScope SynchScope) {
3980 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3981 Alignment = getEVTAlignment(MemVT);
3983 MachineFunction &MF = getMachineFunction();
3985 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3986 // For now, atomics are considered to be volatile always.
3987 // FIXME: Volatile isn't really correct; we should keep track of atomic
3988 // orderings in the memoperand.
3989 unsigned Flags = MachineMemOperand::MOVolatile;
3990 if (Opcode != ISD::ATOMIC_STORE)
3991 Flags |= MachineMemOperand::MOLoad;
3992 if (Opcode != ISD::ATOMIC_LOAD)
3993 Flags |= MachineMemOperand::MOStore;
3995 MachineMemOperand *MMO =
3996 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3998 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3999 Ordering, SynchScope);
4002 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4004 SDValue Ptr, SDValue Cmp,
4005 SDValue Swp, MachineMemOperand *MMO,
4006 AtomicOrdering Ordering,
4007 SynchronizationScope SynchScope) {
4008 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4009 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4011 EVT VT = Cmp.getValueType();
4013 SDVTList VTs = getVTList(VT, MVT::Other);
4014 FoldingSetNodeID ID;
4015 ID.AddInteger(MemVT.getRawBits());
4016 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4017 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4018 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4021 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4022 return SDValue(E, 0);
4024 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4025 Ptr, Cmp, Swp, MMO, Ordering,
4027 CSEMap.InsertNode(N, IP);
4028 AllNodes.push_back(N);
4029 return SDValue(N, 0);
4032 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4034 SDValue Ptr, SDValue Val,
4035 const Value* PtrVal,
4037 AtomicOrdering Ordering,
4038 SynchronizationScope SynchScope) {
4039 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4040 Alignment = getEVTAlignment(MemVT);
4042 MachineFunction &MF = getMachineFunction();
4043 // An atomic store does not load. An atomic load does not store.
4044 // (An atomicrmw obviously both loads and stores.)
4045 // For now, atomics are considered to be volatile always, and they are
4047 // FIXME: Volatile isn't really correct; we should keep track of atomic
4048 // orderings in the memoperand.
4049 unsigned Flags = MachineMemOperand::MOVolatile;
4050 if (Opcode != ISD::ATOMIC_STORE)
4051 Flags |= MachineMemOperand::MOLoad;
4052 if (Opcode != ISD::ATOMIC_LOAD)
4053 Flags |= MachineMemOperand::MOStore;
4055 MachineMemOperand *MMO =
4056 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4057 MemVT.getStoreSize(), Alignment);
4059 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4060 Ordering, SynchScope);
4063 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4065 SDValue Ptr, SDValue Val,
4066 MachineMemOperand *MMO,
4067 AtomicOrdering Ordering,
4068 SynchronizationScope SynchScope) {
4069 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4070 Opcode == ISD::ATOMIC_LOAD_SUB ||
4071 Opcode == ISD::ATOMIC_LOAD_AND ||
4072 Opcode == ISD::ATOMIC_LOAD_OR ||
4073 Opcode == ISD::ATOMIC_LOAD_XOR ||
4074 Opcode == ISD::ATOMIC_LOAD_NAND ||
4075 Opcode == ISD::ATOMIC_LOAD_MIN ||
4076 Opcode == ISD::ATOMIC_LOAD_MAX ||
4077 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4078 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4079 Opcode == ISD::ATOMIC_SWAP ||
4080 Opcode == ISD::ATOMIC_STORE) &&
4081 "Invalid Atomic Op");
4083 EVT VT = Val.getValueType();
4085 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4086 getVTList(VT, MVT::Other);
4087 FoldingSetNodeID ID;
4088 ID.AddInteger(MemVT.getRawBits());
4089 SDValue Ops[] = {Chain, Ptr, Val};
4090 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4091 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4094 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4095 return SDValue(E, 0);
4097 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4099 Ordering, SynchScope);
4100 CSEMap.InsertNode(N, IP);
4101 AllNodes.push_back(N);
4102 return SDValue(N, 0);
4105 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4106 EVT VT, SDValue Chain,
4108 const Value* PtrVal,
4110 AtomicOrdering Ordering,
4111 SynchronizationScope SynchScope) {
4112 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4113 Alignment = getEVTAlignment(MemVT);
4115 MachineFunction &MF = getMachineFunction();
4116 // An atomic store does not load. An atomic load does not store.
4117 // (An atomicrmw obviously both loads and stores.)
4118 // For now, atomics are considered to be volatile always, and they are
4120 // FIXME: Volatile isn't really correct; we should keep track of atomic
4121 // orderings in the memoperand.
4122 unsigned Flags = MachineMemOperand::MOVolatile;
4123 if (Opcode != ISD::ATOMIC_STORE)
4124 Flags |= MachineMemOperand::MOLoad;
4125 if (Opcode != ISD::ATOMIC_LOAD)
4126 Flags |= MachineMemOperand::MOStore;
4128 MachineMemOperand *MMO =
4129 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4130 MemVT.getStoreSize(), Alignment);
4132 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4133 Ordering, SynchScope);
4136 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4137 EVT VT, SDValue Chain,
4139 MachineMemOperand *MMO,
4140 AtomicOrdering Ordering,
4141 SynchronizationScope SynchScope) {
4142 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4144 SDVTList VTs = getVTList(VT, MVT::Other);
4145 FoldingSetNodeID ID;
4146 ID.AddInteger(MemVT.getRawBits());
4147 SDValue Ops[] = {Chain, Ptr};
4148 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4149 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4151 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4152 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4153 return SDValue(E, 0);
4155 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4156 Ptr, MMO, Ordering, SynchScope);
4157 CSEMap.InsertNode(N, IP);
4158 AllNodes.push_back(N);
4159 return SDValue(N, 0);
4162 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4163 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4168 SmallVector<EVT, 4> VTs;
4169 VTs.reserve(NumOps);
4170 for (unsigned i = 0; i < NumOps; ++i)
4171 VTs.push_back(Ops[i].getValueType());
4172 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4177 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4178 const EVT *VTs, unsigned NumVTs,
4179 const SDValue *Ops, unsigned NumOps,
4180 EVT MemVT, MachinePointerInfo PtrInfo,
4181 unsigned Align, bool Vol,
4182 bool ReadMem, bool WriteMem) {
4183 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4184 MemVT, PtrInfo, Align, Vol,
4189 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4190 const SDValue *Ops, unsigned NumOps,
4191 EVT MemVT, MachinePointerInfo PtrInfo,
4192 unsigned Align, bool Vol,
4193 bool ReadMem, bool WriteMem) {
4194 if (Align == 0) // Ensure that codegen never sees alignment 0
4195 Align = getEVTAlignment(MemVT);
4197 MachineFunction &MF = getMachineFunction();
4200 Flags |= MachineMemOperand::MOStore;
4202 Flags |= MachineMemOperand::MOLoad;
4204 Flags |= MachineMemOperand::MOVolatile;
4205 MachineMemOperand *MMO =
4206 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4208 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4212 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4213 const SDValue *Ops, unsigned NumOps,
4214 EVT MemVT, MachineMemOperand *MMO) {
4215 assert((Opcode == ISD::INTRINSIC_VOID ||
4216 Opcode == ISD::INTRINSIC_W_CHAIN ||
4217 Opcode == ISD::PREFETCH ||
4218 Opcode == ISD::LIFETIME_START ||
4219 Opcode == ISD::LIFETIME_END ||
4220 (Opcode <= INT_MAX &&
4221 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4222 "Opcode is not a memory-accessing opcode!");
4224 // Memoize the node unless it returns a flag.
4225 MemIntrinsicSDNode *N;
4226 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4227 FoldingSetNodeID ID;
4228 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4229 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4232 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4233 return SDValue(E, 0);
4236 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4238 CSEMap.InsertNode(N, IP);
4240 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4243 AllNodes.push_back(N);
4244 return SDValue(N, 0);
4247 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4248 /// MachinePointerInfo record from it. This is particularly useful because the
4249 /// code generator has many cases where it doesn't bother passing in a
4250 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4251 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4252 // If this is FI+Offset, we can model it.
4253 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4254 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4256 // If this is (FI+Offset1)+Offset2, we can model it.
4257 if (Ptr.getOpcode() != ISD::ADD ||
4258 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4259 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4260 return MachinePointerInfo();
4262 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4263 return MachinePointerInfo::getFixedStack(FI, Offset+
4264 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4267 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4268 /// MachinePointerInfo record from it. This is particularly useful because the
4269 /// code generator has many cases where it doesn't bother passing in a
4270 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4271 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4272 // If the 'Offset' value isn't a constant, we can't handle this.
4273 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4274 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4275 if (OffsetOp.getOpcode() == ISD::UNDEF)
4276 return InferPointerInfo(Ptr);
4277 return MachinePointerInfo();
4282 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4283 EVT VT, DebugLoc dl, SDValue Chain,
4284 SDValue Ptr, SDValue Offset,
4285 MachinePointerInfo PtrInfo, EVT MemVT,
4286 bool isVolatile, bool isNonTemporal, bool isInvariant,
4287 unsigned Alignment, const MDNode *TBAAInfo,
4288 const MDNode *Ranges) {
4289 assert(Chain.getValueType() == MVT::Other &&
4290 "Invalid chain type");
4291 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4292 Alignment = getEVTAlignment(VT);
4294 unsigned Flags = MachineMemOperand::MOLoad;
4296 Flags |= MachineMemOperand::MOVolatile;
4298 Flags |= MachineMemOperand::MONonTemporal;
4300 Flags |= MachineMemOperand::MOInvariant;
4302 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4305 PtrInfo = InferPointerInfo(Ptr, Offset);
4307 MachineFunction &MF = getMachineFunction();
4308 MachineMemOperand *MMO =
4309 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4311 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4315 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4316 EVT VT, DebugLoc dl, SDValue Chain,
4317 SDValue Ptr, SDValue Offset, EVT MemVT,
4318 MachineMemOperand *MMO) {
4320 ExtType = ISD::NON_EXTLOAD;
4321 } else if (ExtType == ISD::NON_EXTLOAD) {
4322 assert(VT == MemVT && "Non-extending load from different memory type!");
4325 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4326 "Should only be an extending load, not truncating!");
4327 assert(VT.isInteger() == MemVT.isInteger() &&
4328 "Cannot convert from FP to Int or Int -> FP!");
4329 assert(VT.isVector() == MemVT.isVector() &&
4330 "Cannot use trunc store to convert to or from a vector!");
4331 assert((!VT.isVector() ||
4332 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4333 "Cannot use trunc store to change the number of vector elements!");
4336 bool Indexed = AM != ISD::UNINDEXED;
4337 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4338 "Unindexed load with an offset!");
4340 SDVTList VTs = Indexed ?
4341 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4342 SDValue Ops[] = { Chain, Ptr, Offset };
4343 FoldingSetNodeID ID;
4344 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4345 ID.AddInteger(MemVT.getRawBits());
4346 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4347 MMO->isNonTemporal(),
4348 MMO->isInvariant()));
4349 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4351 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4352 cast<LoadSDNode>(E)->refineAlignment(MMO);
4353 return SDValue(E, 0);
4355 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4357 CSEMap.InsertNode(N, IP);
4358 AllNodes.push_back(N);
4359 return SDValue(N, 0);
4362 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4363 SDValue Chain, SDValue Ptr,
4364 MachinePointerInfo PtrInfo,
4365 bool isVolatile, bool isNonTemporal,
4366 bool isInvariant, unsigned Alignment,
4367 const MDNode *TBAAInfo,
4368 const MDNode *Ranges) {
4369 SDValue Undef = getUNDEF(Ptr.getValueType());
4370 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4371 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4375 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4376 SDValue Chain, SDValue Ptr,
4377 MachinePointerInfo PtrInfo, EVT MemVT,
4378 bool isVolatile, bool isNonTemporal,
4379 unsigned Alignment, const MDNode *TBAAInfo) {
4380 SDValue Undef = getUNDEF(Ptr.getValueType());
4381 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4382 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4388 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4389 SDValue Offset, ISD::MemIndexedMode AM) {
4390 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4391 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4392 "Load is already a indexed load!");
4393 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4394 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4395 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4396 false, LD->getAlignment());
4399 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4400 SDValue Ptr, MachinePointerInfo PtrInfo,
4401 bool isVolatile, bool isNonTemporal,
4402 unsigned Alignment, const MDNode *TBAAInfo) {
4403 assert(Chain.getValueType() == MVT::Other &&
4404 "Invalid chain type");
4405 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4406 Alignment = getEVTAlignment(Val.getValueType());
4408 unsigned Flags = MachineMemOperand::MOStore;
4410 Flags |= MachineMemOperand::MOVolatile;
4412 Flags |= MachineMemOperand::MONonTemporal;
4415 PtrInfo = InferPointerInfo(Ptr);
4417 MachineFunction &MF = getMachineFunction();
4418 MachineMemOperand *MMO =
4419 MF.getMachineMemOperand(PtrInfo, Flags,
4420 Val.getValueType().getStoreSize(), Alignment,
4423 return getStore(Chain, dl, Val, Ptr, MMO);
4426 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4427 SDValue Ptr, MachineMemOperand *MMO) {
4428 assert(Chain.getValueType() == MVT::Other &&
4429 "Invalid chain type");
4430 EVT VT = Val.getValueType();
4431 SDVTList VTs = getVTList(MVT::Other);
4432 SDValue Undef = getUNDEF(Ptr.getValueType());
4433 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4434 FoldingSetNodeID ID;
4435 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4436 ID.AddInteger(VT.getRawBits());
4437 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4438 MMO->isNonTemporal(), MMO->isInvariant()));
4439 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4441 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4442 cast<StoreSDNode>(E)->refineAlignment(MMO);
4443 return SDValue(E, 0);
4445 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4447 CSEMap.InsertNode(N, IP);
4448 AllNodes.push_back(N);
4449 return SDValue(N, 0);
4452 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4453 SDValue Ptr, MachinePointerInfo PtrInfo,
4454 EVT SVT,bool isVolatile, bool isNonTemporal,
4456 const MDNode *TBAAInfo) {
4457 assert(Chain.getValueType() == MVT::Other &&
4458 "Invalid chain type");
4459 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4460 Alignment = getEVTAlignment(SVT);
4462 unsigned Flags = MachineMemOperand::MOStore;
4464 Flags |= MachineMemOperand::MOVolatile;
4466 Flags |= MachineMemOperand::MONonTemporal;
4469 PtrInfo = InferPointerInfo(Ptr);
4471 MachineFunction &MF = getMachineFunction();
4472 MachineMemOperand *MMO =
4473 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4476 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4479 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4480 SDValue Ptr, EVT SVT,
4481 MachineMemOperand *MMO) {
4482 EVT VT = Val.getValueType();
4484 assert(Chain.getValueType() == MVT::Other &&
4485 "Invalid chain type");
4487 return getStore(Chain, dl, Val, Ptr, MMO);
4489 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4490 "Should only be a truncating store, not extending!");
4491 assert(VT.isInteger() == SVT.isInteger() &&
4492 "Can't do FP-INT conversion!");
4493 assert(VT.isVector() == SVT.isVector() &&
4494 "Cannot use trunc store to convert to or from a vector!");
4495 assert((!VT.isVector() ||
4496 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4497 "Cannot use trunc store to change the number of vector elements!");
4499 SDVTList VTs = getVTList(MVT::Other);
4500 SDValue Undef = getUNDEF(Ptr.getValueType());
4501 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4502 FoldingSetNodeID ID;
4503 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4504 ID.AddInteger(SVT.getRawBits());
4505 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4506 MMO->isNonTemporal(), MMO->isInvariant()));
4507 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4509 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4510 cast<StoreSDNode>(E)->refineAlignment(MMO);
4511 return SDValue(E, 0);
4513 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4515 CSEMap.InsertNode(N, IP);
4516 AllNodes.push_back(N);
4517 return SDValue(N, 0);
4521 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4522 SDValue Offset, ISD::MemIndexedMode AM) {
4523 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4524 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4525 "Store is already a indexed store!");
4526 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4527 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4528 FoldingSetNodeID ID;
4529 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4530 ID.AddInteger(ST->getMemoryVT().getRawBits());
4531 ID.AddInteger(ST->getRawSubclassData());
4532 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4534 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4535 return SDValue(E, 0);
4537 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4538 ST->isTruncatingStore(),
4540 ST->getMemOperand());
4541 CSEMap.InsertNode(N, IP);
4542 AllNodes.push_back(N);
4543 return SDValue(N, 0);
4546 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4547 SDValue Chain, SDValue Ptr,
4550 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4551 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4554 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4555 const SDUse *Ops, unsigned NumOps) {
4557 case 0: return getNode(Opcode, DL, VT);
4558 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4559 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4560 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4564 // Copy from an SDUse array into an SDValue array for use with
4565 // the regular getNode logic.
4566 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4567 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4570 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4571 const SDValue *Ops, unsigned NumOps) {
4573 case 0: return getNode(Opcode, DL, VT);
4574 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4575 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4576 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4582 case ISD::SELECT_CC: {
4583 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4584 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4585 "LHS and RHS of condition must have same type!");
4586 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4587 "True and False arms of SelectCC must have same type!");
4588 assert(Ops[2].getValueType() == VT &&
4589 "select_cc node must be of same type as true and false value!");
4593 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4594 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4595 "LHS/RHS of comparison should match types!");
4602 SDVTList VTs = getVTList(VT);
4604 if (VT != MVT::Glue) {
4605 FoldingSetNodeID ID;
4606 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4610 return SDValue(E, 0);
4612 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4613 CSEMap.InsertNode(N, IP);
4615 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4618 AllNodes.push_back(N);
4622 return SDValue(N, 0);
4625 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4626 const std::vector<EVT> &ResultTys,
4627 const SDValue *Ops, unsigned NumOps) {
4628 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4632 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4633 const EVT *VTs, unsigned NumVTs,
4634 const SDValue *Ops, unsigned NumOps) {
4636 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4637 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4640 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4641 const SDValue *Ops, unsigned NumOps) {
4642 if (VTList.NumVTs == 1)
4643 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4647 // FIXME: figure out how to safely handle things like
4648 // int foo(int x) { return 1 << (x & 255); }
4649 // int bar() { return foo(256); }
4650 case ISD::SRA_PARTS:
4651 case ISD::SRL_PARTS:
4652 case ISD::SHL_PARTS:
4653 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4654 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4655 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4656 else if (N3.getOpcode() == ISD::AND)
4657 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4658 // If the and is only masking out bits that cannot effect the shift,
4659 // eliminate the and.
4660 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4661 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4662 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4668 // Memoize the node unless it returns a flag.
4670 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4671 FoldingSetNodeID ID;
4672 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4674 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4675 return SDValue(E, 0);
4678 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4679 } else if (NumOps == 2) {
4680 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4681 } else if (NumOps == 3) {
4682 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4685 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4687 CSEMap.InsertNode(N, IP);
4690 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4691 } else if (NumOps == 2) {
4692 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4693 } else if (NumOps == 3) {
4694 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4697 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4700 AllNodes.push_back(N);
4704 return SDValue(N, 0);
4707 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4708 return getNode(Opcode, DL, VTList, 0, 0);
4711 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4713 SDValue Ops[] = { N1 };
4714 return getNode(Opcode, DL, VTList, Ops, 1);
4717 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4718 SDValue N1, SDValue N2) {
4719 SDValue Ops[] = { N1, N2 };
4720 return getNode(Opcode, DL, VTList, Ops, 2);
4723 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4724 SDValue N1, SDValue N2, SDValue N3) {
4725 SDValue Ops[] = { N1, N2, N3 };
4726 return getNode(Opcode, DL, VTList, Ops, 3);
4729 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4730 SDValue N1, SDValue N2, SDValue N3,
4732 SDValue Ops[] = { N1, N2, N3, N4 };
4733 return getNode(Opcode, DL, VTList, Ops, 4);
4736 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4737 SDValue N1, SDValue N2, SDValue N3,
4738 SDValue N4, SDValue N5) {
4739 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4740 return getNode(Opcode, DL, VTList, Ops, 5);
4743 SDVTList SelectionDAG::getVTList(EVT VT) {
4744 return makeVTList(SDNode::getValueTypeList(VT), 1);
4747 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4748 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4749 E = VTList.rend(); I != E; ++I)
4750 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4753 EVT *Array = Allocator.Allocate<EVT>(2);
4756 SDVTList Result = makeVTList(Array, 2);
4757 VTList.push_back(Result);
4761 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4762 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4763 E = VTList.rend(); I != E; ++I)
4764 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4768 EVT *Array = Allocator.Allocate<EVT>(3);
4772 SDVTList Result = makeVTList(Array, 3);
4773 VTList.push_back(Result);
4777 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4778 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4779 E = VTList.rend(); I != E; ++I)
4780 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4781 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4784 EVT *Array = Allocator.Allocate<EVT>(4);
4789 SDVTList Result = makeVTList(Array, 4);
4790 VTList.push_back(Result);
4794 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4796 case 0: llvm_unreachable("Cannot have nodes without results!");
4797 case 1: return getVTList(VTs[0]);
4798 case 2: return getVTList(VTs[0], VTs[1]);
4799 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4800 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4804 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4805 E = VTList.rend(); I != E; ++I) {
4806 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4809 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4813 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4814 std::copy(VTs, VTs+NumVTs, Array);
4815 SDVTList Result = makeVTList(Array, NumVTs);
4816 VTList.push_back(Result);
4821 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4822 /// specified operands. If the resultant node already exists in the DAG,
4823 /// this does not modify the specified node, instead it returns the node that
4824 /// already exists. If the resultant node does not exist in the DAG, the
4825 /// input node is returned. As a degenerate case, if you specify the same
4826 /// input operands as the node already has, the input node is returned.
4827 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4828 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4830 // Check to see if there is no change.
4831 if (Op == N->getOperand(0)) return N;
4833 // See if the modified node already exists.
4834 void *InsertPos = 0;
4835 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4838 // Nope it doesn't. Remove the node from its current place in the maps.
4840 if (!RemoveNodeFromCSEMaps(N))
4843 // Now we update the operands.
4844 N->OperandList[0].set(Op);
4846 // If this gets put into a CSE map, add it.
4847 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4851 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4852 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4854 // Check to see if there is no change.
4855 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4856 return N; // No operands changed, just return the input node.
4858 // See if the modified node already exists.
4859 void *InsertPos = 0;
4860 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4863 // Nope it doesn't. Remove the node from its current place in the maps.
4865 if (!RemoveNodeFromCSEMaps(N))
4868 // Now we update the operands.
4869 if (N->OperandList[0] != Op1)
4870 N->OperandList[0].set(Op1);
4871 if (N->OperandList[1] != Op2)
4872 N->OperandList[1].set(Op2);
4874 // If this gets put into a CSE map, add it.
4875 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4879 SDNode *SelectionDAG::
4880 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4881 SDValue Ops[] = { Op1, Op2, Op3 };
4882 return UpdateNodeOperands(N, Ops, 3);
4885 SDNode *SelectionDAG::
4886 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4887 SDValue Op3, SDValue Op4) {
4888 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4889 return UpdateNodeOperands(N, Ops, 4);
4892 SDNode *SelectionDAG::
4893 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4894 SDValue Op3, SDValue Op4, SDValue Op5) {
4895 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4896 return UpdateNodeOperands(N, Ops, 5);
4899 SDNode *SelectionDAG::
4900 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4901 assert(N->getNumOperands() == NumOps &&
4902 "Update with wrong number of operands");
4904 // Check to see if there is no change.
4905 bool AnyChange = false;
4906 for (unsigned i = 0; i != NumOps; ++i) {
4907 if (Ops[i] != N->getOperand(i)) {
4913 // No operands changed, just return the input node.
4914 if (!AnyChange) return N;
4916 // See if the modified node already exists.
4917 void *InsertPos = 0;
4918 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4921 // Nope it doesn't. Remove the node from its current place in the maps.
4923 if (!RemoveNodeFromCSEMaps(N))
4926 // Now we update the operands.
4927 for (unsigned i = 0; i != NumOps; ++i)
4928 if (N->OperandList[i] != Ops[i])
4929 N->OperandList[i].set(Ops[i]);
4931 // If this gets put into a CSE map, add it.
4932 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4936 /// DropOperands - Release the operands and set this node to have
4938 void SDNode::DropOperands() {
4939 // Unlike the code in MorphNodeTo that does this, we don't need to
4940 // watch for dead nodes here.
4941 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4947 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4950 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4952 SDVTList VTs = getVTList(VT);
4953 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4956 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4957 EVT VT, SDValue Op1) {
4958 SDVTList VTs = getVTList(VT);
4959 SDValue Ops[] = { Op1 };
4960 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4963 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4964 EVT VT, SDValue Op1,
4966 SDVTList VTs = getVTList(VT);
4967 SDValue Ops[] = { Op1, Op2 };
4968 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4971 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4972 EVT VT, SDValue Op1,
4973 SDValue Op2, SDValue Op3) {
4974 SDVTList VTs = getVTList(VT);
4975 SDValue Ops[] = { Op1, Op2, Op3 };
4976 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4979 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4980 EVT VT, const SDValue *Ops,
4982 SDVTList VTs = getVTList(VT);
4983 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4986 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4987 EVT VT1, EVT VT2, const SDValue *Ops,
4989 SDVTList VTs = getVTList(VT1, VT2);
4990 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4993 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4995 SDVTList VTs = getVTList(VT1, VT2);
4996 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4999 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5000 EVT VT1, EVT VT2, EVT VT3,
5001 const SDValue *Ops, unsigned NumOps) {
5002 SDVTList VTs = getVTList(VT1, VT2, VT3);
5003 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5006 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5007 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5008 const SDValue *Ops, unsigned NumOps) {
5009 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5010 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5013 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5016 SDVTList VTs = getVTList(VT1, VT2);
5017 SDValue Ops[] = { Op1 };
5018 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5021 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5023 SDValue Op1, SDValue Op2) {
5024 SDVTList VTs = getVTList(VT1, VT2);
5025 SDValue Ops[] = { Op1, Op2 };
5026 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5029 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5031 SDValue Op1, SDValue Op2,
5033 SDVTList VTs = getVTList(VT1, VT2);
5034 SDValue Ops[] = { Op1, Op2, Op3 };
5035 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5038 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5039 EVT VT1, EVT VT2, EVT VT3,
5040 SDValue Op1, SDValue Op2,
5042 SDVTList VTs = getVTList(VT1, VT2, VT3);
5043 SDValue Ops[] = { Op1, Op2, Op3 };
5044 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5047 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5048 SDVTList VTs, const SDValue *Ops,
5050 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5051 // Reset the NodeID to -1.
5056 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5057 /// the line number information on the merged node since it is not possible to
5058 /// preserve the information that operation is associated with multiple lines.
5059 /// This will make the debugger working better at -O0, were there is a higher
5060 /// probability having other instructions associated with that line.
5062 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5063 DebugLoc NLoc = N->getDebugLoc();
5064 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5065 N->setDebugLoc(DebugLoc());
5070 /// MorphNodeTo - This *mutates* the specified node to have the specified
5071 /// return type, opcode, and operands.
5073 /// Note that MorphNodeTo returns the resultant node. If there is already a
5074 /// node of the specified opcode and operands, it returns that node instead of
5075 /// the current one. Note that the DebugLoc need not be the same.
5077 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5078 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5079 /// node, and because it doesn't require CSE recalculation for any of
5080 /// the node's users.
5082 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5083 SDVTList VTs, const SDValue *Ops,
5085 // If an identical node already exists, use it.
5087 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5088 FoldingSetNodeID ID;
5089 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5090 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5091 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5094 if (!RemoveNodeFromCSEMaps(N))
5097 // Start the morphing.
5099 N->ValueList = VTs.VTs;
5100 N->NumValues = VTs.NumVTs;
5102 // Clear the operands list, updating used nodes to remove this from their
5103 // use list. Keep track of any operands that become dead as a result.
5104 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5105 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5107 SDNode *Used = Use.getNode();
5109 if (Used->use_empty())
5110 DeadNodeSet.insert(Used);
5113 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5114 // Initialize the memory references information.
5115 MN->setMemRefs(0, 0);
5116 // If NumOps is larger than the # of operands we can have in a
5117 // MachineSDNode, reallocate the operand list.
5118 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5119 if (MN->OperandsNeedDelete)
5120 delete[] MN->OperandList;
5121 if (NumOps > array_lengthof(MN->LocalOperands))
5122 // We're creating a final node that will live unmorphed for the
5123 // remainder of the current SelectionDAG iteration, so we can allocate
5124 // the operands directly out of a pool with no recycling metadata.
5125 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5128 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5129 MN->OperandsNeedDelete = false;
5131 MN->InitOperands(MN->OperandList, Ops, NumOps);
5133 // If NumOps is larger than the # of operands we currently have, reallocate
5134 // the operand list.
5135 if (NumOps > N->NumOperands) {
5136 if (N->OperandsNeedDelete)
5137 delete[] N->OperandList;
5138 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5139 N->OperandsNeedDelete = true;
5141 N->InitOperands(N->OperandList, Ops, NumOps);
5144 // Delete any nodes that are still dead after adding the uses for the
5146 if (!DeadNodeSet.empty()) {
5147 SmallVector<SDNode *, 16> DeadNodes;
5148 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5149 E = DeadNodeSet.end(); I != E; ++I)
5150 if ((*I)->use_empty())
5151 DeadNodes.push_back(*I);
5152 RemoveDeadNodes(DeadNodes);
5156 CSEMap.InsertNode(N, IP); // Memoize the new node.
5161 /// getMachineNode - These are used for target selectors to create a new node
5162 /// with specified return type(s), MachineInstr opcode, and operands.
5164 /// Note that getMachineNode returns the resultant node. If there is already a
5165 /// node of the specified opcode and operands, it returns that node instead of
5166 /// the current one.
5168 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5169 SDVTList VTs = getVTList(VT);
5170 return getMachineNode(Opcode, dl, VTs, 0, 0);
5174 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5175 SDVTList VTs = getVTList(VT);
5176 SDValue Ops[] = { Op1 };
5177 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5181 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5182 SDValue Op1, SDValue Op2) {
5183 SDVTList VTs = getVTList(VT);
5184 SDValue Ops[] = { Op1, Op2 };
5185 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5189 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5190 SDValue Op1, SDValue Op2, SDValue Op3) {
5191 SDVTList VTs = getVTList(VT);
5192 SDValue Ops[] = { Op1, Op2, Op3 };
5193 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5197 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5198 const SDValue *Ops, unsigned NumOps) {
5199 SDVTList VTs = getVTList(VT);
5200 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5204 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5205 SDVTList VTs = getVTList(VT1, VT2);
5206 return getMachineNode(Opcode, dl, VTs, 0, 0);
5210 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5211 EVT VT1, EVT VT2, SDValue Op1) {
5212 SDVTList VTs = getVTList(VT1, VT2);
5213 SDValue Ops[] = { Op1 };
5214 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5218 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5219 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5220 SDVTList VTs = getVTList(VT1, VT2);
5221 SDValue Ops[] = { Op1, Op2 };
5222 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5226 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5227 EVT VT1, EVT VT2, SDValue Op1,
5228 SDValue Op2, SDValue Op3) {
5229 SDVTList VTs = getVTList(VT1, VT2);
5230 SDValue Ops[] = { Op1, Op2, Op3 };
5231 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5235 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5237 const SDValue *Ops, unsigned NumOps) {
5238 SDVTList VTs = getVTList(VT1, VT2);
5239 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5243 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5244 EVT VT1, EVT VT2, EVT VT3,
5245 SDValue Op1, SDValue Op2) {
5246 SDVTList VTs = getVTList(VT1, VT2, VT3);
5247 SDValue Ops[] = { Op1, Op2 };
5248 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5252 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5253 EVT VT1, EVT VT2, EVT VT3,
5254 SDValue Op1, SDValue Op2, SDValue Op3) {
5255 SDVTList VTs = getVTList(VT1, VT2, VT3);
5256 SDValue Ops[] = { Op1, Op2, Op3 };
5257 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5261 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5262 EVT VT1, EVT VT2, EVT VT3,
5263 const SDValue *Ops, unsigned NumOps) {
5264 SDVTList VTs = getVTList(VT1, VT2, VT3);
5265 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5269 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5270 EVT VT2, EVT VT3, EVT VT4,
5271 const SDValue *Ops, unsigned NumOps) {
5272 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5273 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5277 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5278 const std::vector<EVT> &ResultTys,
5279 const SDValue *Ops, unsigned NumOps) {
5280 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5281 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5285 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5286 const SDValue *Ops, unsigned NumOps) {
5287 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5292 FoldingSetNodeID ID;
5293 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5296 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5300 // Allocate a new MachineSDNode.
5301 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5303 // Initialize the operands list.
5304 if (NumOps > array_lengthof(N->LocalOperands))
5305 // We're creating a final node that will live unmorphed for the
5306 // remainder of the current SelectionDAG iteration, so we can allocate
5307 // the operands directly out of a pool with no recycling metadata.
5308 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5311 N->InitOperands(N->LocalOperands, Ops, NumOps);
5312 N->OperandsNeedDelete = false;
5315 CSEMap.InsertNode(N, IP);
5317 AllNodes.push_back(N);
5319 VerifyMachineNode(N);
5324 /// getTargetExtractSubreg - A convenience function for creating
5325 /// TargetOpcode::EXTRACT_SUBREG nodes.
5327 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5329 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5330 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5331 VT, Operand, SRIdxVal);
5332 return SDValue(Subreg, 0);
5335 /// getTargetInsertSubreg - A convenience function for creating
5336 /// TargetOpcode::INSERT_SUBREG nodes.
5338 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5339 SDValue Operand, SDValue Subreg) {
5340 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5341 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5342 VT, Operand, Subreg, SRIdxVal);
5343 return SDValue(Result, 0);
5346 /// getNodeIfExists - Get the specified node if it's already available, or
5347 /// else return NULL.
5348 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5349 const SDValue *Ops, unsigned NumOps) {
5350 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5351 FoldingSetNodeID ID;
5352 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5360 /// getDbgValue - Creates a SDDbgValue node.
5363 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5364 DebugLoc DL, unsigned O) {
5365 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5369 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5370 DebugLoc DL, unsigned O) {
5371 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5375 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5376 DebugLoc DL, unsigned O) {
5377 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5382 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5383 /// pointed to by a use iterator is deleted, increment the use iterator
5384 /// so that it doesn't dangle.
5386 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5387 SDNode::use_iterator &UI;
5388 SDNode::use_iterator &UE;
5390 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5391 // Increment the iterator as needed.
5392 while (UI != UE && N == *UI)
5397 RAUWUpdateListener(SelectionDAG &d,
5398 SDNode::use_iterator &ui,
5399 SDNode::use_iterator &ue)
5400 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5405 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5406 /// This can cause recursive merging of nodes in the DAG.
5408 /// This version assumes From has a single result value.
5410 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5411 SDNode *From = FromN.getNode();
5412 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5413 "Cannot replace with this method!");
5414 assert(From != To.getNode() && "Cannot replace uses of with self");
5416 // Iterate over all the existing uses of From. New uses will be added
5417 // to the beginning of the use list, which we avoid visiting.
5418 // This specifically avoids visiting uses of From that arise while the
5419 // replacement is happening, because any such uses would be the result
5420 // of CSE: If an existing node looks like From after one of its operands
5421 // is replaced by To, we don't want to replace of all its users with To
5422 // too. See PR3018 for more info.
5423 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5424 RAUWUpdateListener Listener(*this, UI, UE);
5428 // This node is about to morph, remove its old self from the CSE maps.
5429 RemoveNodeFromCSEMaps(User);
5431 // A user can appear in a use list multiple times, and when this
5432 // happens the uses are usually next to each other in the list.
5433 // To help reduce the number of CSE recomputations, process all
5434 // the uses of this user that we can find this way.
5436 SDUse &Use = UI.getUse();
5439 } while (UI != UE && *UI == User);
5441 // Now that we have modified User, add it back to the CSE maps. If it
5442 // already exists there, recursively merge the results together.
5443 AddModifiedNodeToCSEMaps(User);
5446 // If we just RAUW'd the root, take note.
5447 if (FromN == getRoot())
5451 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5452 /// This can cause recursive merging of nodes in the DAG.
5454 /// This version assumes that for each value of From, there is a
5455 /// corresponding value in To in the same position with the same type.
5457 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5459 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5460 assert((!From->hasAnyUseOfValue(i) ||
5461 From->getValueType(i) == To->getValueType(i)) &&
5462 "Cannot use this version of ReplaceAllUsesWith!");
5465 // Handle the trivial case.
5469 // Iterate over just the existing users of From. See the comments in
5470 // the ReplaceAllUsesWith above.
5471 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5472 RAUWUpdateListener Listener(*this, UI, UE);
5476 // This node is about to morph, remove its old self from the CSE maps.
5477 RemoveNodeFromCSEMaps(User);
5479 // A user can appear in a use list multiple times, and when this
5480 // happens the uses are usually next to each other in the list.
5481 // To help reduce the number of CSE recomputations, process all
5482 // the uses of this user that we can find this way.
5484 SDUse &Use = UI.getUse();
5487 } while (UI != UE && *UI == User);
5489 // Now that we have modified User, add it back to the CSE maps. If it
5490 // already exists there, recursively merge the results together.
5491 AddModifiedNodeToCSEMaps(User);
5494 // If we just RAUW'd the root, take note.
5495 if (From == getRoot().getNode())
5496 setRoot(SDValue(To, getRoot().getResNo()));
5499 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5500 /// This can cause recursive merging of nodes in the DAG.
5502 /// This version can replace From with any result values. To must match the
5503 /// number and types of values returned by From.
5504 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5505 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5506 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5508 // Iterate over just the existing users of From. See the comments in
5509 // the ReplaceAllUsesWith above.
5510 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5511 RAUWUpdateListener Listener(*this, UI, UE);
5515 // This node is about to morph, remove its old self from the CSE maps.
5516 RemoveNodeFromCSEMaps(User);
5518 // A user can appear in a use list multiple times, and when this
5519 // happens the uses are usually next to each other in the list.
5520 // To help reduce the number of CSE recomputations, process all
5521 // the uses of this user that we can find this way.
5523 SDUse &Use = UI.getUse();
5524 const SDValue &ToOp = To[Use.getResNo()];
5527 } while (UI != UE && *UI == User);
5529 // Now that we have modified User, add it back to the CSE maps. If it
5530 // already exists there, recursively merge the results together.
5531 AddModifiedNodeToCSEMaps(User);
5534 // If we just RAUW'd the root, take note.
5535 if (From == getRoot().getNode())
5536 setRoot(SDValue(To[getRoot().getResNo()]));
5539 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5540 /// uses of other values produced by From.getNode() alone. The Deleted
5541 /// vector is handled the same way as for ReplaceAllUsesWith.
5542 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5543 // Handle the really simple, really trivial case efficiently.
5544 if (From == To) return;
5546 // Handle the simple, trivial, case efficiently.
5547 if (From.getNode()->getNumValues() == 1) {
5548 ReplaceAllUsesWith(From, To);
5552 // Iterate over just the existing users of From. See the comments in
5553 // the ReplaceAllUsesWith above.
5554 SDNode::use_iterator UI = From.getNode()->use_begin(),
5555 UE = From.getNode()->use_end();
5556 RAUWUpdateListener Listener(*this, UI, UE);
5559 bool UserRemovedFromCSEMaps = false;
5561 // A user can appear in a use list multiple times, and when this
5562 // happens the uses are usually next to each other in the list.
5563 // To help reduce the number of CSE recomputations, process all
5564 // the uses of this user that we can find this way.
5566 SDUse &Use = UI.getUse();
5568 // Skip uses of different values from the same node.
5569 if (Use.getResNo() != From.getResNo()) {
5574 // If this node hasn't been modified yet, it's still in the CSE maps,
5575 // so remove its old self from the CSE maps.
5576 if (!UserRemovedFromCSEMaps) {
5577 RemoveNodeFromCSEMaps(User);
5578 UserRemovedFromCSEMaps = true;
5583 } while (UI != UE && *UI == User);
5585 // We are iterating over all uses of the From node, so if a use
5586 // doesn't use the specific value, no changes are made.
5587 if (!UserRemovedFromCSEMaps)
5590 // Now that we have modified User, add it back to the CSE maps. If it
5591 // already exists there, recursively merge the results together.
5592 AddModifiedNodeToCSEMaps(User);
5595 // If we just RAUW'd the root, take note.
5596 if (From == getRoot())
5601 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5602 /// to record information about a use.
5609 /// operator< - Sort Memos by User.
5610 bool operator<(const UseMemo &L, const UseMemo &R) {
5611 return (intptr_t)L.User < (intptr_t)R.User;
5615 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5616 /// uses of other values produced by From.getNode() alone. The same value
5617 /// may appear in both the From and To list. The Deleted vector is
5618 /// handled the same way as for ReplaceAllUsesWith.
5619 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5622 // Handle the simple, trivial case efficiently.
5624 return ReplaceAllUsesOfValueWith(*From, *To);
5626 // Read up all the uses and make records of them. This helps
5627 // processing new uses that are introduced during the
5628 // replacement process.
5629 SmallVector<UseMemo, 4> Uses;
5630 for (unsigned i = 0; i != Num; ++i) {
5631 unsigned FromResNo = From[i].getResNo();
5632 SDNode *FromNode = From[i].getNode();
5633 for (SDNode::use_iterator UI = FromNode->use_begin(),
5634 E = FromNode->use_end(); UI != E; ++UI) {
5635 SDUse &Use = UI.getUse();
5636 if (Use.getResNo() == FromResNo) {
5637 UseMemo Memo = { *UI, i, &Use };
5638 Uses.push_back(Memo);
5643 // Sort the uses, so that all the uses from a given User are together.
5644 std::sort(Uses.begin(), Uses.end());
5646 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5647 UseIndex != UseIndexEnd; ) {
5648 // We know that this user uses some value of From. If it is the right
5649 // value, update it.
5650 SDNode *User = Uses[UseIndex].User;
5652 // This node is about to morph, remove its old self from the CSE maps.
5653 RemoveNodeFromCSEMaps(User);
5655 // The Uses array is sorted, so all the uses for a given User
5656 // are next to each other in the list.
5657 // To help reduce the number of CSE recomputations, process all
5658 // the uses of this user that we can find this way.
5660 unsigned i = Uses[UseIndex].Index;
5661 SDUse &Use = *Uses[UseIndex].Use;
5665 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5667 // Now that we have modified User, add it back to the CSE maps. If it
5668 // already exists there, recursively merge the results together.
5669 AddModifiedNodeToCSEMaps(User);
5673 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5674 /// based on their topological order. It returns the maximum id and a vector
5675 /// of the SDNodes* in assigned order by reference.
5676 unsigned SelectionDAG::AssignTopologicalOrder() {
5678 unsigned DAGSize = 0;
5680 // SortedPos tracks the progress of the algorithm. Nodes before it are
5681 // sorted, nodes after it are unsorted. When the algorithm completes
5682 // it is at the end of the list.
5683 allnodes_iterator SortedPos = allnodes_begin();
5685 // Visit all the nodes. Move nodes with no operands to the front of
5686 // the list immediately. Annotate nodes that do have operands with their
5687 // operand count. Before we do this, the Node Id fields of the nodes
5688 // may contain arbitrary values. After, the Node Id fields for nodes
5689 // before SortedPos will contain the topological sort index, and the
5690 // Node Id fields for nodes At SortedPos and after will contain the
5691 // count of outstanding operands.
5692 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5695 unsigned Degree = N->getNumOperands();
5697 // A node with no uses, add it to the result array immediately.
5698 N->setNodeId(DAGSize++);
5699 allnodes_iterator Q = N;
5701 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5702 assert(SortedPos != AllNodes.end() && "Overran node list");
5705 // Temporarily use the Node Id as scratch space for the degree count.
5706 N->setNodeId(Degree);
5710 // Visit all the nodes. As we iterate, move nodes into sorted order,
5711 // such that by the time the end is reached all nodes will be sorted.
5712 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5715 // N is in sorted position, so all its uses have one less operand
5716 // that needs to be sorted.
5717 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5720 unsigned Degree = P->getNodeId();
5721 assert(Degree != 0 && "Invalid node degree");
5724 // All of P's operands are sorted, so P may sorted now.
5725 P->setNodeId(DAGSize++);
5727 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5728 assert(SortedPos != AllNodes.end() && "Overran node list");
5731 // Update P's outstanding operand count.
5732 P->setNodeId(Degree);
5735 if (I == SortedPos) {
5738 dbgs() << "Overran sorted position:\n";
5741 llvm_unreachable(0);
5745 assert(SortedPos == AllNodes.end() &&
5746 "Topological sort incomplete!");
5747 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5748 "First node in topological sort is not the entry token!");
5749 assert(AllNodes.front().getNodeId() == 0 &&
5750 "First node in topological sort has non-zero id!");
5751 assert(AllNodes.front().getNumOperands() == 0 &&
5752 "First node in topological sort has operands!");
5753 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5754 "Last node in topologic sort has unexpected id!");
5755 assert(AllNodes.back().use_empty() &&
5756 "Last node in topologic sort has users!");
5757 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5761 /// AssignOrdering - Assign an order to the SDNode.
5762 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5763 assert(SD && "Trying to assign an order to a null node!");
5764 Ordering->add(SD, Order);
5767 /// GetOrdering - Get the order for the SDNode.
5768 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5769 assert(SD && "Trying to get the order of a null node!");
5770 return Ordering->getOrder(SD);
5773 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5774 /// value is produced by SD.
5775 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5776 DbgInfo->add(DB, SD, isParameter);
5778 SD->setHasDebugValue(true);
5781 /// TransferDbgValues - Transfer SDDbgValues.
5782 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5783 if (From == To || !From.getNode()->getHasDebugValue())
5785 SDNode *FromNode = From.getNode();
5786 SDNode *ToNode = To.getNode();
5787 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5788 SmallVector<SDDbgValue *, 2> ClonedDVs;
5789 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5791 SDDbgValue *Dbg = *I;
5792 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5793 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5794 Dbg->getOffset(), Dbg->getDebugLoc(),
5796 ClonedDVs.push_back(Clone);
5799 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5800 E = ClonedDVs.end(); I != E; ++I)
5801 AddDbgValue(*I, ToNode, false);
5804 //===----------------------------------------------------------------------===//
5806 //===----------------------------------------------------------------------===//
5808 HandleSDNode::~HandleSDNode() {
5812 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5813 const GlobalValue *GA,
5814 EVT VT, int64_t o, unsigned char TF)
5815 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5819 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5820 MachineMemOperand *mmo)
5821 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5822 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5823 MMO->isNonTemporal(), MMO->isInvariant());
5824 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5825 assert(isNonTemporal() == MMO->isNonTemporal() &&
5826 "Non-temporal encoding error!");
5827 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5830 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5831 const SDValue *Ops, unsigned NumOps, EVT memvt,
5832 MachineMemOperand *mmo)
5833 : SDNode(Opc, dl, VTs, Ops, NumOps),
5834 MemoryVT(memvt), MMO(mmo) {
5835 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5836 MMO->isNonTemporal(), MMO->isInvariant());
5837 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5838 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5841 /// Profile - Gather unique data for the node.
5843 void SDNode::Profile(FoldingSetNodeID &ID) const {
5844 AddNodeIDNode(ID, this);
5849 std::vector<EVT> VTs;
5852 VTs.reserve(MVT::LAST_VALUETYPE);
5853 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5854 VTs.push_back(MVT((MVT::SimpleValueType)i));
5859 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5860 static ManagedStatic<EVTArray> SimpleVTArray;
5861 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5863 /// getValueTypeList - Return a pointer to the specified value type.
5865 const EVT *SDNode::getValueTypeList(EVT VT) {
5866 if (VT.isExtended()) {
5867 sys::SmartScopedLock<true> Lock(*VTMutex);
5868 return &(*EVTs->insert(VT).first);
5870 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5871 "Value type out of range!");
5872 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5876 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5877 /// indicated value. This method ignores uses of other values defined by this
5879 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5880 assert(Value < getNumValues() && "Bad value!");
5882 // TODO: Only iterate over uses of a given value of the node
5883 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5884 if (UI.getUse().getResNo() == Value) {
5891 // Found exactly the right number of uses?
5896 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5897 /// value. This method ignores uses of other values defined by this operation.
5898 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5899 assert(Value < getNumValues() && "Bad value!");
5901 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5902 if (UI.getUse().getResNo() == Value)
5909 /// isOnlyUserOf - Return true if this node is the only use of N.
5911 bool SDNode::isOnlyUserOf(SDNode *N) const {
5913 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5924 /// isOperand - Return true if this node is an operand of N.
5926 bool SDValue::isOperandOf(SDNode *N) const {
5927 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5928 if (*this == N->getOperand(i))
5933 bool SDNode::isOperandOf(SDNode *N) const {
5934 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5935 if (this == N->OperandList[i].getNode())
5940 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5941 /// be a chain) reaches the specified operand without crossing any
5942 /// side-effecting instructions on any chain path. In practice, this looks
5943 /// through token factors and non-volatile loads. In order to remain efficient,
5944 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5945 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5946 unsigned Depth) const {
5947 if (*this == Dest) return true;
5949 // Don't search too deeply, we just want to be able to see through
5950 // TokenFactor's etc.
5951 if (Depth == 0) return false;
5953 // If this is a token factor, all inputs to the TF happen in parallel. If any
5954 // of the operands of the TF does not reach dest, then we cannot do the xform.
5955 if (getOpcode() == ISD::TokenFactor) {
5956 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5957 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5962 // Loads don't have side effects, look through them.
5963 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5964 if (!Ld->isVolatile())
5965 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5970 /// hasPredecessor - Return true if N is a predecessor of this node.
5971 /// N is either an operand of this node, or can be reached by recursively
5972 /// traversing up the operands.
5973 /// NOTE: This is an expensive method. Use it carefully.
5974 bool SDNode::hasPredecessor(const SDNode *N) const {
5975 SmallPtrSet<const SDNode *, 32> Visited;
5976 SmallVector<const SDNode *, 16> Worklist;
5977 return hasPredecessorHelper(N, Visited, Worklist);
5980 bool SDNode::hasPredecessorHelper(const SDNode *N,
5981 SmallPtrSet<const SDNode *, 32> &Visited,
5982 SmallVector<const SDNode *, 16> &Worklist) const {
5983 if (Visited.empty()) {
5984 Worklist.push_back(this);
5986 // Take a look in the visited set. If we've already encountered this node
5987 // we needn't search further.
5988 if (Visited.count(N))
5992 // Haven't visited N yet. Continue the search.
5993 while (!Worklist.empty()) {
5994 const SDNode *M = Worklist.pop_back_val();
5995 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5996 SDNode *Op = M->getOperand(i).getNode();
5997 if (Visited.insert(Op))
5998 Worklist.push_back(Op);
6007 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6008 assert(Num < NumOperands && "Invalid child # of SDNode!");
6009 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6012 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6013 assert(N->getNumValues() == 1 &&
6014 "Can't unroll a vector with multiple results!");
6016 EVT VT = N->getValueType(0);
6017 unsigned NE = VT.getVectorNumElements();
6018 EVT EltVT = VT.getVectorElementType();
6019 DebugLoc dl = N->getDebugLoc();
6021 SmallVector<SDValue, 8> Scalars;
6022 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6024 // If ResNE is 0, fully unroll the vector op.
6027 else if (NE > ResNE)
6031 for (i= 0; i != NE; ++i) {
6032 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6033 SDValue Operand = N->getOperand(j);
6034 EVT OperandVT = Operand.getValueType();
6035 if (OperandVT.isVector()) {
6036 // A vector operand; extract a single element.
6037 EVT OperandEltVT = OperandVT.getVectorElementType();
6038 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6041 getConstant(i, TLI.getPointerTy()));
6043 // A scalar operand; just use it as is.
6044 Operands[j] = Operand;
6048 switch (N->getOpcode()) {
6050 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6051 &Operands[0], Operands.size()));
6054 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6055 &Operands[0], Operands.size()));
6062 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6063 getShiftAmountOperand(Operands[0].getValueType(),
6066 case ISD::SIGN_EXTEND_INREG:
6067 case ISD::FP_ROUND_INREG: {
6068 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6069 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6071 getValueType(ExtVT)));
6076 for (; i < ResNE; ++i)
6077 Scalars.push_back(getUNDEF(EltVT));
6079 return getNode(ISD::BUILD_VECTOR, dl,
6080 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6081 &Scalars[0], Scalars.size());
6085 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6086 /// location that is 'Dist' units away from the location that the 'Base' load
6087 /// is loading from.
6088 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6089 unsigned Bytes, int Dist) const {
6090 if (LD->getChain() != Base->getChain())
6092 EVT VT = LD->getValueType(0);
6093 if (VT.getSizeInBits() / 8 != Bytes)
6096 SDValue Loc = LD->getOperand(1);
6097 SDValue BaseLoc = Base->getOperand(1);
6098 if (Loc.getOpcode() == ISD::FrameIndex) {
6099 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6101 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6102 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6103 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6104 int FS = MFI->getObjectSize(FI);
6105 int BFS = MFI->getObjectSize(BFI);
6106 if (FS != BFS || FS != (int)Bytes) return false;
6107 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6111 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6112 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6115 const GlobalValue *GV1 = NULL;
6116 const GlobalValue *GV2 = NULL;
6117 int64_t Offset1 = 0;
6118 int64_t Offset2 = 0;
6119 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6120 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6121 if (isGA1 && isGA2 && GV1 == GV2)
6122 return Offset1 == (Offset2 + Dist*Bytes);
6127 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6128 /// it cannot be inferred.
6129 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6130 // If this is a GlobalAddress + cst, return the alignment.
6131 const GlobalValue *GV;
6132 int64_t GVOffset = 0;
6133 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6134 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6135 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6136 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6137 TLI.getDataLayout());
6138 unsigned AlignBits = KnownZero.countTrailingOnes();
6139 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6141 return MinAlign(Align, GVOffset);
6144 // If this is a direct reference to a stack slot, use information about the
6145 // stack slot's alignment.
6146 int FrameIdx = 1 << 31;
6147 int64_t FrameOffset = 0;
6148 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6149 FrameIdx = FI->getIndex();
6150 } else if (isBaseWithConstantOffset(Ptr) &&
6151 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6153 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6154 FrameOffset = Ptr.getConstantOperandVal(1);
6157 if (FrameIdx != (1 << 31)) {
6158 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6159 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6167 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6168 unsigned GlobalAddressSDNode::getAddressSpace() const {
6169 return getGlobal()->getType()->getAddressSpace();
6173 Type *ConstantPoolSDNode::getType() const {
6174 if (isMachineConstantPoolEntry())
6175 return Val.MachineCPVal->getType();
6176 return Val.ConstVal->getType();
6179 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6181 unsigned &SplatBitSize,
6183 unsigned MinSplatBits,
6185 EVT VT = getValueType(0);
6186 assert(VT.isVector() && "Expected a vector type");
6187 unsigned sz = VT.getSizeInBits();
6188 if (MinSplatBits > sz)
6191 SplatValue = APInt(sz, 0);
6192 SplatUndef = APInt(sz, 0);
6194 // Get the bits. Bits with undefined values (when the corresponding element
6195 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6196 // in SplatValue. If any of the values are not constant, give up and return
6198 unsigned int nOps = getNumOperands();
6199 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6200 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6202 for (unsigned j = 0; j < nOps; ++j) {
6203 unsigned i = isBigEndian ? nOps-1-j : j;
6204 SDValue OpVal = getOperand(i);
6205 unsigned BitPos = j * EltBitSize;
6207 if (OpVal.getOpcode() == ISD::UNDEF)
6208 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6209 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6210 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6211 zextOrTrunc(sz) << BitPos;
6212 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6213 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6218 // The build_vector is all constants or undefs. Find the smallest element
6219 // size that splats the vector.
6221 HasAnyUndefs = (SplatUndef != 0);
6224 unsigned HalfSize = sz / 2;
6225 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6226 APInt LowValue = SplatValue.trunc(HalfSize);
6227 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6228 APInt LowUndef = SplatUndef.trunc(HalfSize);
6230 // If the two halves do not match (ignoring undef bits), stop here.
6231 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6232 MinSplatBits > HalfSize)
6235 SplatValue = HighValue | LowValue;
6236 SplatUndef = HighUndef & LowUndef;
6245 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6246 // Find the first non-undef value in the shuffle mask.
6248 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6251 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6253 // Make sure all remaining elements are either undef or the same as the first
6255 for (int Idx = Mask[i]; i != e; ++i)
6256 if (Mask[i] >= 0 && Mask[i] != Idx)
6262 static void checkForCyclesHelper(const SDNode *N,
6263 SmallPtrSet<const SDNode*, 32> &Visited,
6264 SmallPtrSet<const SDNode*, 32> &Checked) {
6265 // If this node has already been checked, don't check it again.
6266 if (Checked.count(N))
6269 // If a node has already been visited on this depth-first walk, reject it as
6271 if (!Visited.insert(N)) {
6272 dbgs() << "Offending node:\n";
6274 errs() << "Detected cycle in SelectionDAG\n";
6278 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6279 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6286 void llvm::checkForCycles(const llvm::SDNode *N) {
6288 assert(N && "Checking nonexistant SDNode");
6289 SmallPtrSet<const SDNode*, 32> visited;
6290 SmallPtrSet<const SDNode*, 32> checked;
6291 checkForCyclesHelper(N, visited, checked);
6295 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6296 checkForCycles(DAG->getRoot().getNode());