1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 if (N->getOpcode() == ISD::BIT_CONVERT)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
117 SDValue NotZero = N->getOperand(i);
118 if (isa<ConstantSDNode>(NotZero)) {
119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
121 } else if (isa<ConstantFPSDNode>(NotZero)) {
122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
123 bitcastToAPInt().isAllOnesValue())
128 // Okay, we have at least one ~0 value, check to see if the rest match or are
130 for (++i; i != e; ++i)
131 if (N->getOperand(i) != NotZero &&
132 N->getOperand(i).getOpcode() != ISD::UNDEF)
138 /// isBuildVectorAllZeros - Return true if the specified node is a
139 /// BUILD_VECTOR where all of the elements are 0 or undef.
140 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
141 // Look through a bit convert.
142 if (N->getOpcode() == ISD::BIT_CONVERT)
143 N = N->getOperand(0).getNode();
145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
147 unsigned i = 0, e = N->getNumOperands();
149 // Skip over all of the undef values.
150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 // Do not accept an all-undef vector.
154 if (i == e) return false;
156 // Do not accept build_vectors that aren't all constants or which have non-~0
158 SDValue Zero = N->getOperand(i);
159 if (isa<ConstantSDNode>(Zero)) {
160 if (!cast<ConstantSDNode>(Zero)->isNullValue())
162 } else if (isa<ConstantFPSDNode>(Zero)) {
163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
168 // Okay, we have at least one ~0 value, check to see if the rest match or are
170 for (++i; i != e; ++i)
171 if (N->getOperand(i) != Zero &&
172 N->getOperand(i).getOpcode() != ISD::UNDEF)
177 /// isScalarToVector - Return true if the specified node is a
178 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
179 /// element is not an undef.
180 bool ISD::isScalarToVector(const SDNode *N) {
181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
184 if (N->getOpcode() != ISD::BUILD_VECTOR)
186 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
188 unsigned NumElems = N->getNumOperands();
189 for (unsigned i = 1; i < NumElems; ++i) {
190 SDValue V = N->getOperand(i);
191 if (V.getOpcode() != ISD::UNDEF)
198 /// isDebugLabel - Return true if the specified node represents a debug
199 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
200 bool ISD::isDebugLabel(const SDNode *N) {
202 if (N->getOpcode() == ISD::DBG_LABEL)
204 if (N->isMachineOpcode() &&
205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: assert(0 && "Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 const TargetMachine &SelectionDAG::getTarget() const {
310 return MF->getTarget();
313 //===----------------------------------------------------------------------===//
314 // SDNode Profile Support
315 //===----------------------------------------------------------------------===//
317 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
319 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
323 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
324 /// solely with their pointer.
325 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
326 ID.AddPointer(VTList.VTs);
329 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
331 static void AddNodeIDOperands(FoldingSetNodeID &ID,
332 const SDValue *Ops, unsigned NumOps) {
333 for (; NumOps; --NumOps, ++Ops) {
334 ID.AddPointer(Ops->getNode());
335 ID.AddInteger(Ops->getResNo());
339 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
341 static void AddNodeIDOperands(FoldingSetNodeID &ID,
342 const SDUse *Ops, unsigned NumOps) {
343 for (; NumOps; --NumOps, ++Ops) {
344 ID.AddPointer(Ops->getVal());
345 ID.AddInteger(Ops->getSDValue().getResNo());
349 static void AddNodeIDNode(FoldingSetNodeID &ID,
350 unsigned short OpC, SDVTList VTList,
351 const SDValue *OpList, unsigned N) {
352 AddNodeIDOpcode(ID, OpC);
353 AddNodeIDValueTypes(ID, VTList);
354 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
360 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
361 AddNodeIDOpcode(ID, N->getOpcode());
362 // Add the return value info.
363 AddNodeIDValueTypes(ID, N->getVTList());
364 // Add the operand info.
365 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
367 // Handle SDNode leafs with special info.
368 switch (N->getOpcode()) {
369 default: break; // Normal nodes don't need extra info.
371 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
373 case ISD::TargetConstant:
375 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
377 case ISD::TargetConstantFP:
378 case ISD::ConstantFP: {
379 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
382 case ISD::TargetGlobalAddress:
383 case ISD::GlobalAddress:
384 case ISD::TargetGlobalTLSAddress:
385 case ISD::GlobalTLSAddress: {
386 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
387 ID.AddPointer(GA->getGlobal());
388 ID.AddInteger(GA->getOffset());
391 case ISD::BasicBlock:
392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
397 case ISD::DBG_STOPPOINT: {
398 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
399 ID.AddInteger(DSP->getLine());
400 ID.AddInteger(DSP->getColumn());
401 ID.AddPointer(DSP->getCompileUnit());
405 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
407 case ISD::MEMOPERAND: {
408 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
412 case ISD::FrameIndex:
413 case ISD::TargetFrameIndex:
414 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
417 case ISD::TargetJumpTable:
418 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
420 case ISD::ConstantPool:
421 case ISD::TargetConstantPool: {
422 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
423 ID.AddInteger(CP->getAlignment());
424 ID.AddInteger(CP->getOffset());
425 if (CP->isMachineConstantPoolEntry())
426 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
428 ID.AddPointer(CP->getConstVal());
432 const CallSDNode *Call = cast<CallSDNode>(N);
433 ID.AddInteger(Call->getCallingConv());
434 ID.AddInteger(Call->isVarArg());
438 const LoadSDNode *LD = cast<LoadSDNode>(N);
439 ID.AddInteger(LD->getAddressingMode());
440 ID.AddInteger(LD->getExtensionType());
441 ID.AddInteger(LD->getMemoryVT().getRawBits());
442 ID.AddInteger(LD->getRawFlags());
446 const StoreSDNode *ST = cast<StoreSDNode>(N);
447 ID.AddInteger(ST->getAddressingMode());
448 ID.AddInteger(ST->isTruncatingStore());
449 ID.AddInteger(ST->getMemoryVT().getRawBits());
450 ID.AddInteger(ST->getRawFlags());
453 case ISD::ATOMIC_CMP_SWAP_8:
454 case ISD::ATOMIC_SWAP_8:
455 case ISD::ATOMIC_LOAD_ADD_8:
456 case ISD::ATOMIC_LOAD_SUB_8:
457 case ISD::ATOMIC_LOAD_AND_8:
458 case ISD::ATOMIC_LOAD_OR_8:
459 case ISD::ATOMIC_LOAD_XOR_8:
460 case ISD::ATOMIC_LOAD_NAND_8:
461 case ISD::ATOMIC_LOAD_MIN_8:
462 case ISD::ATOMIC_LOAD_MAX_8:
463 case ISD::ATOMIC_LOAD_UMIN_8:
464 case ISD::ATOMIC_LOAD_UMAX_8:
465 case ISD::ATOMIC_CMP_SWAP_16:
466 case ISD::ATOMIC_SWAP_16:
467 case ISD::ATOMIC_LOAD_ADD_16:
468 case ISD::ATOMIC_LOAD_SUB_16:
469 case ISD::ATOMIC_LOAD_AND_16:
470 case ISD::ATOMIC_LOAD_OR_16:
471 case ISD::ATOMIC_LOAD_XOR_16:
472 case ISD::ATOMIC_LOAD_NAND_16:
473 case ISD::ATOMIC_LOAD_MIN_16:
474 case ISD::ATOMIC_LOAD_MAX_16:
475 case ISD::ATOMIC_LOAD_UMIN_16:
476 case ISD::ATOMIC_LOAD_UMAX_16:
477 case ISD::ATOMIC_CMP_SWAP_32:
478 case ISD::ATOMIC_SWAP_32:
479 case ISD::ATOMIC_LOAD_ADD_32:
480 case ISD::ATOMIC_LOAD_SUB_32:
481 case ISD::ATOMIC_LOAD_AND_32:
482 case ISD::ATOMIC_LOAD_OR_32:
483 case ISD::ATOMIC_LOAD_XOR_32:
484 case ISD::ATOMIC_LOAD_NAND_32:
485 case ISD::ATOMIC_LOAD_MIN_32:
486 case ISD::ATOMIC_LOAD_MAX_32:
487 case ISD::ATOMIC_LOAD_UMIN_32:
488 case ISD::ATOMIC_LOAD_UMAX_32:
489 case ISD::ATOMIC_CMP_SWAP_64:
490 case ISD::ATOMIC_SWAP_64:
491 case ISD::ATOMIC_LOAD_ADD_64:
492 case ISD::ATOMIC_LOAD_SUB_64:
493 case ISD::ATOMIC_LOAD_AND_64:
494 case ISD::ATOMIC_LOAD_OR_64:
495 case ISD::ATOMIC_LOAD_XOR_64:
496 case ISD::ATOMIC_LOAD_NAND_64:
497 case ISD::ATOMIC_LOAD_MIN_64:
498 case ISD::ATOMIC_LOAD_MAX_64:
499 case ISD::ATOMIC_LOAD_UMIN_64:
500 case ISD::ATOMIC_LOAD_UMAX_64: {
501 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
502 ID.AddInteger(AT->getRawFlags());
505 } // end switch (N->getOpcode())
508 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
509 /// the CSE map that carries both alignment and volatility information.
511 static inline unsigned
512 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
513 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
516 //===----------------------------------------------------------------------===//
517 // SelectionDAG Class
518 //===----------------------------------------------------------------------===//
520 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
522 void SelectionDAG::RemoveDeadNodes() {
523 // Create a dummy node (which is not added to allnodes), that adds a reference
524 // to the root node, preventing it from being deleted.
525 HandleSDNode Dummy(getRoot());
527 SmallVector<SDNode*, 128> DeadNodes;
529 // Add all obviously-dead nodes to the DeadNodes worklist.
530 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
532 DeadNodes.push_back(I);
534 RemoveDeadNodes(DeadNodes);
536 // If the root changed (e.g. it was a dead load, update the root).
537 setRoot(Dummy.getValue());
540 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
541 /// given list, and any nodes that become unreachable as a result.
542 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
543 DAGUpdateListener *UpdateListener) {
545 // Process the worklist, deleting the nodes and adding their uses to the
547 while (!DeadNodes.empty()) {
548 SDNode *N = DeadNodes.back();
549 DeadNodes.pop_back();
552 UpdateListener->NodeDeleted(N, 0);
554 // Take the node out of the appropriate CSE map.
555 RemoveNodeFromCSEMaps(N);
557 // Next, brutally remove the operand list. This is safe to do, as there are
558 // no cycles in the graph.
559 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
560 SDNode *Operand = I->getVal();
561 Operand->removeUser(std::distance(N->op_begin(), I), N);
563 // Now that we removed this operand, see if there are no uses of it left.
564 if (Operand->use_empty())
565 DeadNodes.push_back(Operand);
568 if (N->OperandsNeedDelete)
569 delete[] N->OperandList;
574 // Finally, remove N itself.
575 NodeAllocator.Deallocate(AllNodes.remove(N));
579 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
580 SmallVector<SDNode*, 16> DeadNodes(1, N);
581 RemoveDeadNodes(DeadNodes, UpdateListener);
584 void SelectionDAG::DeleteNode(SDNode *N) {
585 assert(N->use_empty() && "Cannot delete a node that is not dead!");
587 // First take this out of the appropriate CSE map.
588 RemoveNodeFromCSEMaps(N);
590 // Finally, remove uses due to operands of this node, remove from the
591 // AllNodes list, and delete the node.
592 DeleteNodeNotInCSEMaps(N);
595 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
596 // Drop all of the operands and decrement used node's use counts.
597 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
598 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
600 if (N->OperandsNeedDelete) {
601 delete[] N->OperandList;
605 assert(N != AllNodes.begin());
606 NodeAllocator.Deallocate(AllNodes.remove(N));
609 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
610 /// correspond to it. This is useful when we're about to delete or repurpose
611 /// the node. We don't want future request for structurally identical nodes
612 /// to return N anymore.
613 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
615 switch (N->getOpcode()) {
616 case ISD::EntryToken:
617 assert(0 && "EntryToken should not be in CSEMaps!");
619 case ISD::HANDLENODE: return false; // noop.
621 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
622 "Cond code doesn't exist!");
623 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
624 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
626 case ISD::ExternalSymbol:
627 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
629 case ISD::TargetExternalSymbol:
631 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::VALUETYPE: {
634 MVT VT = cast<VTSDNode>(N)->getVT();
635 if (VT.isExtended()) {
636 Erased = ExtendedValueTypeNodes.erase(VT);
638 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
639 ValueTypeNodes[VT.getSimpleVT()] = 0;
644 // Remove it from the CSE Map.
645 Erased = CSEMap.RemoveNode(N);
649 // Verify that the node was actually in one of the CSE maps, unless it has a
650 // flag result (which cannot be CSE'd) or is one of the special cases that are
651 // not subject to CSE.
652 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
653 !N->isMachineOpcode() &&
654 N->getOpcode() != ISD::DBG_LABEL &&
655 N->getOpcode() != ISD::DBG_STOPPOINT &&
656 N->getOpcode() != ISD::EH_LABEL &&
657 N->getOpcode() != ISD::DECLARE) {
660 assert(0 && "Node is not in map!");
666 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
667 /// has been taken out and modified in some way. If the specified node already
668 /// exists in the CSE maps, do not modify the maps, but return the existing node
669 /// instead. If it doesn't exist, add it and return null.
671 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
672 assert(N->getNumOperands() && "This is a leaf node!");
674 if (N->getValueType(0) == MVT::Flag)
675 return 0; // Never CSE anything that produces a flag.
677 switch (N->getOpcode()) {
679 case ISD::HANDLENODE:
681 case ISD::DBG_STOPPOINT:
684 return 0; // Never add these nodes.
687 // Check that remaining values produced are not flags.
688 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
689 if (N->getValueType(i) == MVT::Flag)
690 return 0; // Never CSE anything that produces a flag.
692 SDNode *New = CSEMap.GetOrInsertNode(N);
693 if (New != N) return New; // Node already existed.
697 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
698 /// were replaced with those specified. If this node is never memoized,
699 /// return null, otherwise return a pointer to the slot it would take. If a
700 /// node already exists with these operands, the slot will be non-null.
701 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
703 if (N->getValueType(0) == MVT::Flag)
704 return 0; // Never CSE anything that produces a flag.
706 switch (N->getOpcode()) {
708 case ISD::HANDLENODE:
710 case ISD::DBG_STOPPOINT:
712 return 0; // Never add these nodes.
715 // Check that remaining values produced are not flags.
716 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
717 if (N->getValueType(i) == MVT::Flag)
718 return 0; // Never CSE anything that produces a flag.
720 SDValue Ops[] = { Op };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
723 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
726 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
727 /// were replaced with those specified. If this node is never memoized,
728 /// return null, otherwise return a pointer to the slot it would take. If a
729 /// node already exists with these operands, the slot will be non-null.
730 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
731 SDValue Op1, SDValue Op2,
733 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
735 // Check that remaining values produced are not flags.
736 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
737 if (N->getValueType(i) == MVT::Flag)
738 return 0; // Never CSE anything that produces a flag.
740 SDValue Ops[] = { Op1, Op2 };
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
743 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
747 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
748 /// were replaced with those specified. If this node is never memoized,
749 /// return null, otherwise return a pointer to the slot it would take. If a
750 /// node already exists with these operands, the slot will be non-null.
751 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
752 const SDValue *Ops,unsigned NumOps,
754 if (N->getValueType(0) == MVT::Flag)
755 return 0; // Never CSE anything that produces a flag.
757 switch (N->getOpcode()) {
759 case ISD::HANDLENODE:
761 case ISD::DBG_STOPPOINT:
764 return 0; // Never add these nodes.
767 // Check that remaining values produced are not flags.
768 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
769 if (N->getValueType(i) == MVT::Flag)
770 return 0; // Never CSE anything that produces a flag.
773 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
775 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
776 ID.AddInteger(LD->getAddressingMode());
777 ID.AddInteger(LD->getExtensionType());
778 ID.AddInteger(LD->getMemoryVT().getRawBits());
779 ID.AddInteger(LD->getRawFlags());
780 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
781 ID.AddInteger(ST->getAddressingMode());
782 ID.AddInteger(ST->isTruncatingStore());
783 ID.AddInteger(ST->getMemoryVT().getRawBits());
784 ID.AddInteger(ST->getRawFlags());
787 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
790 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
791 void SelectionDAG::VerifyNode(SDNode *N) {
792 switch (N->getOpcode()) {
795 case ISD::BUILD_VECTOR: {
796 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!");
797 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!");
798 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
799 "Wrong number of BUILD_VECTOR operands!");
800 MVT EltVT = N->getValueType(0).getVectorElementType();
801 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
802 assert(I->getSDValue().getValueType() == EltVT &&
803 "Wrong BUILD_VECTOR operand type!");
809 /// getMVTAlignment - Compute the default alignment value for the
812 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
813 const Type *Ty = VT == MVT::iPTR ?
814 PointerType::get(Type::Int8Ty, 0) :
817 return TLI.getTargetData()->getABITypeAlignment(Ty);
820 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
821 : TLI(tli), FLI(fli),
822 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
823 Root(getEntryNode()) {
824 AllNodes.push_back(&EntryNode);
827 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
832 SelectionDAG::~SelectionDAG() {
836 void SelectionDAG::allnodes_clear() {
837 assert(&*AllNodes.begin() == &EntryNode);
838 AllNodes.remove(AllNodes.begin());
839 while (!AllNodes.empty()) {
840 SDNode *N = AllNodes.remove(AllNodes.begin());
841 N->SetNextInBucket(0);
843 if (N->OperandsNeedDelete) {
844 delete [] N->OperandList;
848 NodeAllocator.Deallocate(N);
852 void SelectionDAG::clear() {
854 OperandAllocator.Reset();
857 ExtendedValueTypeNodes.clear();
858 ExternalSymbols.clear();
859 TargetExternalSymbols.clear();
860 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
861 static_cast<CondCodeSDNode*>(0));
862 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
863 static_cast<SDNode*>(0));
866 AllNodes.push_back(&EntryNode);
867 Root = getEntryNode();
870 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
871 if (Op.getValueType() == VT) return Op;
872 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
874 return getNode(ISD::AND, Op.getValueType(), Op,
875 getConstant(Imm, Op.getValueType()));
878 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
879 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
883 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
884 return getConstant(*ConstantInt::get(Val), VT, isT);
887 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
888 assert(VT.isInteger() && "Cannot create FP integer constant!");
890 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
891 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
892 "APInt size does not match type size!");
894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
902 return SDValue(N, 0);
904 N = NodeAllocator.Allocate<ConstantSDNode>();
905 new (N) ConstantSDNode(isT, &Val, EltVT);
906 CSEMap.InsertNode(N, IP);
907 AllNodes.push_back(N);
910 SDValue Result(N, 0);
912 SmallVector<SDValue, 8> Ops;
913 Ops.assign(VT.getVectorNumElements(), Result);
914 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
919 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
920 return getConstant(Val, TLI.getPointerTy(), isTarget);
924 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
925 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
928 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
932 VT.isVector() ? VT.getVectorElementType() : VT;
934 // Do the map lookup using the actual bit pattern for the floating point
935 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
936 // we don't have issues with SNANs.
937 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
939 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
943 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
945 return SDValue(N, 0);
947 N = NodeAllocator.Allocate<ConstantFPSDNode>();
948 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
949 CSEMap.InsertNode(N, IP);
950 AllNodes.push_back(N);
953 SDValue Result(N, 0);
955 SmallVector<SDValue, 8> Ops;
956 Ops.assign(VT.getVectorNumElements(), Result);
957 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
962 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
964 VT.isVector() ? VT.getVectorElementType() : VT;
966 return getConstantFP(APFloat((float)Val), VT, isTarget);
968 return getConstantFP(APFloat(Val), VT, isTarget);
971 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
972 MVT VT, int64_t Offset,
976 // Truncate (with sign-extension) the offset value to the pointer size.
977 unsigned BitWidth = VT.getSizeInBits();
979 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
981 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
983 // If GV is an alias then use the aliasee for determining thread-localness.
984 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
985 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
988 if (GVar && GVar->isThreadLocal())
989 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
991 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
994 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
996 ID.AddInteger(Offset);
998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
999 return SDValue(E, 0);
1000 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1001 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
1002 CSEMap.InsertNode(N, IP);
1003 AllNodes.push_back(N);
1004 return SDValue(N, 0);
1007 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
1008 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1014 return SDValue(E, 0);
1015 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1016 new (N) FrameIndexSDNode(FI, VT, isTarget);
1017 CSEMap.InsertNode(N, IP);
1018 AllNodes.push_back(N);
1019 return SDValue(N, 0);
1022 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1023 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1024 FoldingSetNodeID ID;
1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1029 return SDValue(E, 0);
1030 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1031 new (N) JumpTableSDNode(JTI, VT, isTarget);
1032 CSEMap.InsertNode(N, IP);
1033 AllNodes.push_back(N);
1034 return SDValue(N, 0);
1037 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1038 unsigned Alignment, int Offset,
1042 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1043 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1044 FoldingSetNodeID ID;
1045 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1046 ID.AddInteger(Alignment);
1047 ID.AddInteger(Offset);
1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1051 return SDValue(E, 0);
1052 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1053 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1054 CSEMap.InsertNode(N, IP);
1055 AllNodes.push_back(N);
1056 return SDValue(N, 0);
1060 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1061 unsigned Alignment, int Offset,
1065 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1066 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1067 FoldingSetNodeID ID;
1068 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1069 ID.AddInteger(Alignment);
1070 ID.AddInteger(Offset);
1071 C->AddSelectionDAGCSEId(ID);
1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1074 return SDValue(E, 0);
1075 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1076 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1077 CSEMap.InsertNode(N, IP);
1078 AllNodes.push_back(N);
1079 return SDValue(N, 0);
1083 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1084 FoldingSetNodeID ID;
1085 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1089 return SDValue(E, 0);
1090 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1091 new (N) BasicBlockSDNode(MBB);
1092 CSEMap.InsertNode(N, IP);
1093 AllNodes.push_back(N);
1094 return SDValue(N, 0);
1097 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1098 FoldingSetNodeID ID;
1099 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1100 ID.AddInteger(Flags.getRawBits());
1102 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1103 return SDValue(E, 0);
1104 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1105 new (N) ARG_FLAGSSDNode(Flags);
1106 CSEMap.InsertNode(N, IP);
1107 AllNodes.push_back(N);
1108 return SDValue(N, 0);
1111 SDValue SelectionDAG::getValueType(MVT VT) {
1112 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1113 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1115 SDNode *&N = VT.isExtended() ?
1116 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1118 if (N) return SDValue(N, 0);
1119 N = NodeAllocator.Allocate<VTSDNode>();
1120 new (N) VTSDNode(VT);
1121 AllNodes.push_back(N);
1122 return SDValue(N, 0);
1125 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1126 SDNode *&N = ExternalSymbols[Sym];
1127 if (N) return SDValue(N, 0);
1128 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1129 new (N) ExternalSymbolSDNode(false, Sym, VT);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1134 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1135 SDNode *&N = TargetExternalSymbols[Sym];
1136 if (N) return SDValue(N, 0);
1137 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1138 new (N) ExternalSymbolSDNode(true, Sym, VT);
1139 AllNodes.push_back(N);
1140 return SDValue(N, 0);
1143 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1144 if ((unsigned)Cond >= CondCodeNodes.size())
1145 CondCodeNodes.resize(Cond+1);
1147 if (CondCodeNodes[Cond] == 0) {
1148 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1149 new (N) CondCodeSDNode(Cond);
1150 CondCodeNodes[Cond] = N;
1151 AllNodes.push_back(N);
1153 return SDValue(CondCodeNodes[Cond], 0);
1156 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1157 FoldingSetNodeID ID;
1158 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1159 ID.AddInteger(RegNo);
1161 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1162 return SDValue(E, 0);
1163 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1164 new (N) RegisterSDNode(RegNo, VT);
1165 CSEMap.InsertNode(N, IP);
1166 AllNodes.push_back(N);
1167 return SDValue(N, 0);
1170 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1171 unsigned Line, unsigned Col,
1172 const CompileUnitDesc *CU) {
1173 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1174 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1175 AllNodes.push_back(N);
1176 return SDValue(N, 0);
1179 SDValue SelectionDAG::getLabel(unsigned Opcode,
1182 FoldingSetNodeID ID;
1183 SDValue Ops[] = { Root };
1184 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1185 ID.AddInteger(LabelID);
1187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1188 return SDValue(E, 0);
1189 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1190 new (N) LabelSDNode(Opcode, Root, LabelID);
1191 CSEMap.InsertNode(N, IP);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getSrcValue(const Value *V) {
1197 assert((!V || isa<PointerType>(V->getType())) &&
1198 "SrcValue is not a pointer?");
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1205 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1206 return SDValue(E, 0);
1208 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1209 new (N) SrcValueSDNode(V);
1210 CSEMap.InsertNode(N, IP);
1211 AllNodes.push_back(N);
1212 return SDValue(N, 0);
1215 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1216 const Value *v = MO.getValue();
1217 assert((!v || isa<PointerType>(v->getType())) &&
1218 "SrcValue is not a pointer?");
1220 FoldingSetNodeID ID;
1221 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1226 return SDValue(E, 0);
1228 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1229 new (N) MemOperandSDNode(MO);
1230 CSEMap.InsertNode(N, IP);
1231 AllNodes.push_back(N);
1232 return SDValue(N, 0);
1235 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1236 /// specified value type.
1237 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1238 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1239 unsigned ByteSize = VT.getSizeInBits()/8;
1240 const Type *Ty = VT.getTypeForMVT();
1241 unsigned StackAlign =
1242 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1244 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1245 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1248 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1249 SDValue N2, ISD::CondCode Cond) {
1250 // These setcc operations always fold.
1254 case ISD::SETFALSE2: return getConstant(0, VT);
1256 case ISD::SETTRUE2: return getConstant(1, VT);
1268 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1272 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1273 const APInt &C2 = N2C->getAPIntValue();
1274 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1275 const APInt &C1 = N1C->getAPIntValue();
1278 default: assert(0 && "Unknown integer setcc!");
1279 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1280 case ISD::SETNE: return getConstant(C1 != C2, VT);
1281 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1282 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1283 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1284 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1285 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1286 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1287 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1288 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1292 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1293 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1294 // No compile time operations on this type yet.
1295 if (N1C->getValueType(0) == MVT::ppcf128)
1298 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1301 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1302 return getNode(ISD::UNDEF, VT);
1304 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1305 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1306 return getNode(ISD::UNDEF, VT);
1308 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1309 R==APFloat::cmpLessThan, VT);
1310 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1311 return getNode(ISD::UNDEF, VT);
1313 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1314 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1315 return getNode(ISD::UNDEF, VT);
1317 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1318 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1319 return getNode(ISD::UNDEF, VT);
1321 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1322 R==APFloat::cmpEqual, VT);
1323 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1324 return getNode(ISD::UNDEF, VT);
1326 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1327 R==APFloat::cmpEqual, VT);
1328 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1329 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1330 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1331 R==APFloat::cmpEqual, VT);
1332 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1333 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1334 R==APFloat::cmpLessThan, VT);
1335 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1336 R==APFloat::cmpUnordered, VT);
1337 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1338 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1341 // Ensure that the constant occurs on the RHS.
1342 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1346 // Could not fold it.
1350 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1351 /// use this predicate to simplify operations downstream.
1352 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1353 unsigned BitWidth = Op.getValueSizeInBits();
1354 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1357 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1358 /// this predicate to simplify operations downstream. Mask is known to be zero
1359 /// for bits that V cannot have.
1360 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1361 unsigned Depth) const {
1362 APInt KnownZero, KnownOne;
1363 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1364 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1365 return (KnownZero & Mask) == Mask;
1368 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1369 /// known to be either zero or one and return them in the KnownZero/KnownOne
1370 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1372 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1373 APInt &KnownZero, APInt &KnownOne,
1374 unsigned Depth) const {
1375 unsigned BitWidth = Mask.getBitWidth();
1376 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1377 "Mask size mismatches value type size!");
1379 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1380 if (Depth == 6 || Mask == 0)
1381 return; // Limit search depth.
1383 APInt KnownZero2, KnownOne2;
1385 switch (Op.getOpcode()) {
1387 // We know all of the bits for a constant!
1388 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1389 KnownZero = ~KnownOne & Mask;
1392 // If either the LHS or the RHS are Zero, the result is zero.
1393 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1394 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1395 KnownZero2, KnownOne2, Depth+1);
1396 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1397 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1399 // Output known-1 bits are only known if set in both the LHS & RHS.
1400 KnownOne &= KnownOne2;
1401 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1402 KnownZero |= KnownZero2;
1405 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1406 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1407 KnownZero2, KnownOne2, Depth+1);
1408 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1409 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1411 // Output known-0 bits are only known if clear in both the LHS & RHS.
1412 KnownZero &= KnownZero2;
1413 // Output known-1 are known to be set if set in either the LHS | RHS.
1414 KnownOne |= KnownOne2;
1417 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1418 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1419 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1420 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1422 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1423 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1424 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1425 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1426 KnownZero = KnownZeroOut;
1430 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1431 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1432 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1433 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1434 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1436 // If low bits are zero in either operand, output low known-0 bits.
1437 // Also compute a conserative estimate for high known-0 bits.
1438 // More trickiness is possible, but this is sufficient for the
1439 // interesting case of alignment computation.
1441 unsigned TrailZ = KnownZero.countTrailingOnes() +
1442 KnownZero2.countTrailingOnes();
1443 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1444 KnownZero2.countLeadingOnes(),
1445 BitWidth) - BitWidth;
1447 TrailZ = std::min(TrailZ, BitWidth);
1448 LeadZ = std::min(LeadZ, BitWidth);
1449 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1450 APInt::getHighBitsSet(BitWidth, LeadZ);
1455 // For the purposes of computing leading zeros we can conservatively
1456 // treat a udiv as a logical right shift by the power of 2 known to
1457 // be less than the denominator.
1458 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1459 ComputeMaskedBits(Op.getOperand(0),
1460 AllOnes, KnownZero2, KnownOne2, Depth+1);
1461 unsigned LeadZ = KnownZero2.countLeadingOnes();
1465 ComputeMaskedBits(Op.getOperand(1),
1466 AllOnes, KnownZero2, KnownOne2, Depth+1);
1467 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1468 if (RHSUnknownLeadingOnes != BitWidth)
1469 LeadZ = std::min(BitWidth,
1470 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1472 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1476 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1477 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1478 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1479 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1481 // Only known if known in both the LHS and RHS.
1482 KnownOne &= KnownOne2;
1483 KnownZero &= KnownZero2;
1485 case ISD::SELECT_CC:
1486 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1487 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1488 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1489 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1491 // Only known if known in both the LHS and RHS.
1492 KnownOne &= KnownOne2;
1493 KnownZero &= KnownZero2;
1496 // If we know the result of a setcc has the top bits zero, use this info.
1497 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1499 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1502 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1503 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1504 unsigned ShAmt = SA->getZExtValue();
1506 // If the shift count is an invalid immediate, don't do anything.
1507 if (ShAmt >= BitWidth)
1510 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1511 KnownZero, KnownOne, Depth+1);
1512 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1513 KnownZero <<= ShAmt;
1515 // low bits known zero.
1516 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1520 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1521 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1522 unsigned ShAmt = SA->getZExtValue();
1524 // If the shift count is an invalid immediate, don't do anything.
1525 if (ShAmt >= BitWidth)
1528 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1529 KnownZero, KnownOne, Depth+1);
1530 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1531 KnownZero = KnownZero.lshr(ShAmt);
1532 KnownOne = KnownOne.lshr(ShAmt);
1534 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1535 KnownZero |= HighBits; // High bits known zero.
1539 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1540 unsigned ShAmt = SA->getZExtValue();
1542 // If the shift count is an invalid immediate, don't do anything.
1543 if (ShAmt >= BitWidth)
1546 APInt InDemandedMask = (Mask << ShAmt);
1547 // If any of the demanded bits are produced by the sign extension, we also
1548 // demand the input sign bit.
1549 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1550 if (HighBits.getBoolValue())
1551 InDemandedMask |= APInt::getSignBit(BitWidth);
1553 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1555 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1556 KnownZero = KnownZero.lshr(ShAmt);
1557 KnownOne = KnownOne.lshr(ShAmt);
1559 // Handle the sign bits.
1560 APInt SignBit = APInt::getSignBit(BitWidth);
1561 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1563 if (KnownZero.intersects(SignBit)) {
1564 KnownZero |= HighBits; // New bits are known zero.
1565 } else if (KnownOne.intersects(SignBit)) {
1566 KnownOne |= HighBits; // New bits are known one.
1570 case ISD::SIGN_EXTEND_INREG: {
1571 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1572 unsigned EBits = EVT.getSizeInBits();
1574 // Sign extension. Compute the demanded bits in the result that are not
1575 // present in the input.
1576 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1578 APInt InSignBit = APInt::getSignBit(EBits);
1579 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1581 // If the sign extended bits are demanded, we know that the sign
1583 InSignBit.zext(BitWidth);
1584 if (NewBits.getBoolValue())
1585 InputDemandedBits |= InSignBit;
1587 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1588 KnownZero, KnownOne, Depth+1);
1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1591 // If the sign bit of the input is known set or clear, then we know the
1592 // top bits of the result.
1593 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1594 KnownZero |= NewBits;
1595 KnownOne &= ~NewBits;
1596 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1597 KnownOne |= NewBits;
1598 KnownZero &= ~NewBits;
1599 } else { // Input sign bit unknown
1600 KnownZero &= ~NewBits;
1601 KnownOne &= ~NewBits;
1608 unsigned LowBits = Log2_32(BitWidth)+1;
1609 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1614 if (ISD::isZEXTLoad(Op.getNode())) {
1615 LoadSDNode *LD = cast<LoadSDNode>(Op);
1616 MVT VT = LD->getMemoryVT();
1617 unsigned MemBits = VT.getSizeInBits();
1618 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1622 case ISD::ZERO_EXTEND: {
1623 MVT InVT = Op.getOperand(0).getValueType();
1624 unsigned InBits = InVT.getSizeInBits();
1625 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1626 APInt InMask = Mask;
1627 InMask.trunc(InBits);
1628 KnownZero.trunc(InBits);
1629 KnownOne.trunc(InBits);
1630 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1631 KnownZero.zext(BitWidth);
1632 KnownOne.zext(BitWidth);
1633 KnownZero |= NewBits;
1636 case ISD::SIGN_EXTEND: {
1637 MVT InVT = Op.getOperand(0).getValueType();
1638 unsigned InBits = InVT.getSizeInBits();
1639 APInt InSignBit = APInt::getSignBit(InBits);
1640 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1641 APInt InMask = Mask;
1642 InMask.trunc(InBits);
1644 // If any of the sign extended bits are demanded, we know that the sign
1645 // bit is demanded. Temporarily set this bit in the mask for our callee.
1646 if (NewBits.getBoolValue())
1647 InMask |= InSignBit;
1649 KnownZero.trunc(InBits);
1650 KnownOne.trunc(InBits);
1651 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1653 // Note if the sign bit is known to be zero or one.
1654 bool SignBitKnownZero = KnownZero.isNegative();
1655 bool SignBitKnownOne = KnownOne.isNegative();
1656 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1657 "Sign bit can't be known to be both zero and one!");
1659 // If the sign bit wasn't actually demanded by our caller, we don't
1660 // want it set in the KnownZero and KnownOne result values. Reset the
1661 // mask and reapply it to the result values.
1663 InMask.trunc(InBits);
1664 KnownZero &= InMask;
1667 KnownZero.zext(BitWidth);
1668 KnownOne.zext(BitWidth);
1670 // If the sign bit is known zero or one, the top bits match.
1671 if (SignBitKnownZero)
1672 KnownZero |= NewBits;
1673 else if (SignBitKnownOne)
1674 KnownOne |= NewBits;
1677 case ISD::ANY_EXTEND: {
1678 MVT InVT = Op.getOperand(0).getValueType();
1679 unsigned InBits = InVT.getSizeInBits();
1680 APInt InMask = Mask;
1681 InMask.trunc(InBits);
1682 KnownZero.trunc(InBits);
1683 KnownOne.trunc(InBits);
1684 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1685 KnownZero.zext(BitWidth);
1686 KnownOne.zext(BitWidth);
1689 case ISD::TRUNCATE: {
1690 MVT InVT = Op.getOperand(0).getValueType();
1691 unsigned InBits = InVT.getSizeInBits();
1692 APInt InMask = Mask;
1693 InMask.zext(InBits);
1694 KnownZero.zext(InBits);
1695 KnownOne.zext(InBits);
1696 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1697 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1698 KnownZero.trunc(BitWidth);
1699 KnownOne.trunc(BitWidth);
1702 case ISD::AssertZext: {
1703 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1704 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1705 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1707 KnownZero |= (~InMask) & Mask;
1711 // All bits are zero except the low bit.
1712 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1716 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1717 // We know that the top bits of C-X are clear if X contains less bits
1718 // than C (i.e. no wrap-around can happen). For example, 20-X is
1719 // positive if we can prove that X is >= 0 and < 16.
1720 if (CLHS->getAPIntValue().isNonNegative()) {
1721 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1722 // NLZ can't be BitWidth with no sign bit
1723 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1724 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1727 // If all of the MaskV bits are known to be zero, then we know the
1728 // output top bits are zero, because we now know that the output is
1730 if ((KnownZero2 & MaskV) == MaskV) {
1731 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1732 // Top bits known zero.
1733 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1740 // Output known-0 bits are known if clear or set in both the low clear bits
1741 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1742 // low 3 bits clear.
1743 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1744 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1745 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1746 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1748 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1749 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1750 KnownZeroOut = std::min(KnownZeroOut,
1751 KnownZero2.countTrailingOnes());
1753 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1757 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1758 const APInt &RA = Rem->getAPIntValue();
1759 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1760 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1761 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1762 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1764 // If the sign bit of the first operand is zero, the sign bit of
1765 // the result is zero. If the first operand has no one bits below
1766 // the second operand's single 1 bit, its sign will be zero.
1767 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1768 KnownZero2 |= ~LowBits;
1770 KnownZero |= KnownZero2 & Mask;
1772 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1777 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1778 const APInt &RA = Rem->getAPIntValue();
1779 if (RA.isPowerOf2()) {
1780 APInt LowBits = (RA - 1);
1781 APInt Mask2 = LowBits & Mask;
1782 KnownZero |= ~LowBits & Mask;
1783 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1784 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1789 // Since the result is less than or equal to either operand, any leading
1790 // zero bits in either operand must also exist in the result.
1791 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1792 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1794 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1797 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1798 KnownZero2.countLeadingOnes());
1800 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1804 // Allow the target to implement this method for its nodes.
1805 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1806 case ISD::INTRINSIC_WO_CHAIN:
1807 case ISD::INTRINSIC_W_CHAIN:
1808 case ISD::INTRINSIC_VOID:
1809 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1815 /// ComputeNumSignBits - Return the number of times the sign bit of the
1816 /// register is replicated into the other bits. We know that at least 1 bit
1817 /// is always equal to the sign bit (itself), but other cases can give us
1818 /// information. For example, immediately after an "SRA X, 2", we know that
1819 /// the top 3 bits are all equal to each other, so we return 3.
1820 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1821 MVT VT = Op.getValueType();
1822 assert(VT.isInteger() && "Invalid VT!");
1823 unsigned VTBits = VT.getSizeInBits();
1825 unsigned FirstAnswer = 1;
1828 return 1; // Limit search depth.
1830 switch (Op.getOpcode()) {
1832 case ISD::AssertSext:
1833 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1834 return VTBits-Tmp+1;
1835 case ISD::AssertZext:
1836 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1839 case ISD::Constant: {
1840 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1841 // If negative, return # leading ones.
1842 if (Val.isNegative())
1843 return Val.countLeadingOnes();
1845 // Return # leading zeros.
1846 return Val.countLeadingZeros();
1849 case ISD::SIGN_EXTEND:
1850 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1851 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1853 case ISD::SIGN_EXTEND_INREG:
1854 // Max of the input and what this extends.
1855 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1858 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1859 return std::max(Tmp, Tmp2);
1862 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1863 // SRA X, C -> adds C sign bits.
1864 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1865 Tmp += C->getZExtValue();
1866 if (Tmp > VTBits) Tmp = VTBits;
1870 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1871 // shl destroys sign bits.
1872 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1873 if (C->getZExtValue() >= VTBits || // Bad shift.
1874 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1875 return Tmp - C->getZExtValue();
1880 case ISD::XOR: // NOT is handled here.
1881 // Logical binary ops preserve the number of sign bits at the worst.
1882 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1884 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1885 FirstAnswer = std::min(Tmp, Tmp2);
1886 // We computed what we know about the sign bits as our first
1887 // answer. Now proceed to the generic code that uses
1888 // ComputeMaskedBits, and pick whichever answer is better.
1893 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1894 if (Tmp == 1) return 1; // Early out.
1895 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1896 return std::min(Tmp, Tmp2);
1899 // If setcc returns 0/-1, all bits are sign bits.
1900 if (TLI.getSetCCResultContents() ==
1901 TargetLowering::ZeroOrNegativeOneSetCCResult)
1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1907 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1909 // Handle rotate right by N like a rotate left by 32-N.
1910 if (Op.getOpcode() == ISD::ROTR)
1911 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1913 // If we aren't rotating out all of the known-in sign bits, return the
1914 // number that are left. This handles rotl(sext(x), 1) for example.
1915 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1916 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1920 // Add can have at most one carry bit. Thus we know that the output
1921 // is, at worst, one more bit than the inputs.
1922 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1923 if (Tmp == 1) return 1; // Early out.
1925 // Special case decrementing a value (ADD X, -1):
1926 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1927 if (CRHS->isAllOnesValue()) {
1928 APInt KnownZero, KnownOne;
1929 APInt Mask = APInt::getAllOnesValue(VTBits);
1930 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1932 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1934 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1937 // If we are subtracting one from a positive number, there is no carry
1938 // out of the result.
1939 if (KnownZero.isNegative())
1943 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1944 if (Tmp2 == 1) return 1;
1945 return std::min(Tmp, Tmp2)-1;
1949 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1950 if (Tmp2 == 1) return 1;
1953 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1954 if (CLHS->isNullValue()) {
1955 APInt KnownZero, KnownOne;
1956 APInt Mask = APInt::getAllOnesValue(VTBits);
1957 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1958 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1960 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1963 // If the input is known to be positive (the sign bit is known clear),
1964 // the output of the NEG has the same number of sign bits as the input.
1965 if (KnownZero.isNegative())
1968 // Otherwise, we treat this like a SUB.
1971 // Sub can have at most one carry bit. Thus we know that the output
1972 // is, at worst, one more bit than the inputs.
1973 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1974 if (Tmp == 1) return 1; // Early out.
1975 return std::min(Tmp, Tmp2)-1;
1978 // FIXME: it's tricky to do anything useful for this, but it is an important
1979 // case for targets like X86.
1983 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1984 if (Op.getOpcode() == ISD::LOAD) {
1985 LoadSDNode *LD = cast<LoadSDNode>(Op);
1986 unsigned ExtType = LD->getExtensionType();
1989 case ISD::SEXTLOAD: // '17' bits known
1990 Tmp = LD->getMemoryVT().getSizeInBits();
1991 return VTBits-Tmp+1;
1992 case ISD::ZEXTLOAD: // '16' bits known
1993 Tmp = LD->getMemoryVT().getSizeInBits();
1998 // Allow the target to implement this method for its nodes.
1999 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2000 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2001 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2002 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2003 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2004 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2007 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2008 // use this information.
2009 APInt KnownZero, KnownOne;
2010 APInt Mask = APInt::getAllOnesValue(VTBits);
2011 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2013 if (KnownZero.isNegative()) { // sign bit is 0
2015 } else if (KnownOne.isNegative()) { // sign bit is 1;
2022 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2023 // the number of identical bits in the top of the input value.
2025 Mask <<= Mask.getBitWidth()-VTBits;
2026 // Return # leading zeros. We use 'min' here in case Val was zero before
2027 // shifting. We don't want to return '64' as for an i32 "0".
2028 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2032 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2033 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2034 if (!GA) return false;
2035 if (GA->getOffset() != 0) return false;
2036 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2037 if (!GV) return false;
2038 MachineModuleInfo *MMI = getMachineModuleInfo();
2039 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
2043 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2044 /// element of the result of the vector shuffle.
2045 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2046 MVT VT = N->getValueType(0);
2047 SDValue PermMask = N->getOperand(2);
2048 SDValue Idx = PermMask.getOperand(i);
2049 if (Idx.getOpcode() == ISD::UNDEF)
2050 return getNode(ISD::UNDEF, VT.getVectorElementType());
2051 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2052 unsigned NumElems = PermMask.getNumOperands();
2053 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2056 if (V.getOpcode() == ISD::BIT_CONVERT) {
2057 V = V.getOperand(0);
2058 if (V.getValueType().getVectorNumElements() != NumElems)
2061 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2062 return (Index == 0) ? V.getOperand(0)
2063 : getNode(ISD::UNDEF, VT.getVectorElementType());
2064 if (V.getOpcode() == ISD::BUILD_VECTOR)
2065 return V.getOperand(Index);
2066 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2067 return getShuffleScalarElt(V.getNode(), Index);
2072 /// getNode - Gets or creates the specified node.
2074 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2075 FoldingSetNodeID ID;
2076 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2079 return SDValue(E, 0);
2080 SDNode *N = NodeAllocator.Allocate<SDNode>();
2081 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2082 CSEMap.InsertNode(N, IP);
2084 AllNodes.push_back(N);
2088 return SDValue(N, 0);
2091 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2092 // Constant fold unary operations with an integer constant operand.
2093 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2094 const APInt &Val = C->getAPIntValue();
2095 unsigned BitWidth = VT.getSizeInBits();
2098 case ISD::SIGN_EXTEND:
2099 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2100 case ISD::ANY_EXTEND:
2101 case ISD::ZERO_EXTEND:
2103 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2104 case ISD::UINT_TO_FP:
2105 case ISD::SINT_TO_FP: {
2106 const uint64_t zero[] = {0, 0};
2107 // No compile time operations on this type.
2108 if (VT==MVT::ppcf128)
2110 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2111 (void)apf.convertFromAPInt(Val,
2112 Opcode==ISD::SINT_TO_FP,
2113 APFloat::rmNearestTiesToEven);
2114 return getConstantFP(apf, VT);
2116 case ISD::BIT_CONVERT:
2117 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2118 return getConstantFP(Val.bitsToFloat(), VT);
2119 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2120 return getConstantFP(Val.bitsToDouble(), VT);
2123 return getConstant(Val.byteSwap(), VT);
2125 return getConstant(Val.countPopulation(), VT);
2127 return getConstant(Val.countLeadingZeros(), VT);
2129 return getConstant(Val.countTrailingZeros(), VT);
2133 // Constant fold unary operations with a floating point constant operand.
2134 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2135 APFloat V = C->getValueAPF(); // make copy
2136 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2140 return getConstantFP(V, VT);
2143 return getConstantFP(V, VT);
2145 case ISD::FP_EXTEND: {
2147 // This can return overflow, underflow, or inexact; we don't care.
2148 // FIXME need to be more flexible about rounding mode.
2149 (void)V.convert(*MVTToAPFloatSemantics(VT),
2150 APFloat::rmNearestTiesToEven, &ignored);
2151 return getConstantFP(V, VT);
2153 case ISD::FP_TO_SINT:
2154 case ISD::FP_TO_UINT: {
2157 assert(integerPartWidth >= 64);
2158 // FIXME need to be more flexible about rounding mode.
2159 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2160 Opcode==ISD::FP_TO_SINT,
2161 APFloat::rmTowardZero, &ignored);
2162 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2164 return getConstant(x, VT);
2166 case ISD::BIT_CONVERT:
2167 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2168 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2169 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2170 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2176 unsigned OpOpcode = Operand.getNode()->getOpcode();
2178 case ISD::TokenFactor:
2179 case ISD::CONCAT_VECTORS:
2180 return Operand; // Factor or concat of one node? No need.
2181 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2182 case ISD::FP_EXTEND:
2183 assert(VT.isFloatingPoint() &&
2184 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2185 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2186 if (Operand.getOpcode() == ISD::UNDEF)
2187 return getNode(ISD::UNDEF, VT);
2189 case ISD::SIGN_EXTEND:
2190 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2191 "Invalid SIGN_EXTEND!");
2192 if (Operand.getValueType() == VT) return Operand; // noop extension
2193 assert(Operand.getValueType().bitsLT(VT)
2194 && "Invalid sext node, dst < src!");
2195 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2196 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2198 case ISD::ZERO_EXTEND:
2199 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2200 "Invalid ZERO_EXTEND!");
2201 if (Operand.getValueType() == VT) return Operand; // noop extension
2202 assert(Operand.getValueType().bitsLT(VT)
2203 && "Invalid zext node, dst < src!");
2204 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2205 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2207 case ISD::ANY_EXTEND:
2208 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2209 "Invalid ANY_EXTEND!");
2210 if (Operand.getValueType() == VT) return Operand; // noop extension
2211 assert(Operand.getValueType().bitsLT(VT)
2212 && "Invalid anyext node, dst < src!");
2213 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2214 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2215 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2218 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2219 "Invalid TRUNCATE!");
2220 if (Operand.getValueType() == VT) return Operand; // noop truncate
2221 assert(Operand.getValueType().bitsGT(VT)
2222 && "Invalid truncate node, src < dst!");
2223 if (OpOpcode == ISD::TRUNCATE)
2224 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2225 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2226 OpOpcode == ISD::ANY_EXTEND) {
2227 // If the source is smaller than the dest, we still need an extend.
2228 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2229 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2230 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2231 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2233 return Operand.getNode()->getOperand(0);
2236 case ISD::BIT_CONVERT:
2237 // Basic sanity checking.
2238 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2239 && "Cannot BIT_CONVERT between types of different sizes!");
2240 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2241 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2242 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2243 if (OpOpcode == ISD::UNDEF)
2244 return getNode(ISD::UNDEF, VT);
2246 case ISD::SCALAR_TO_VECTOR:
2247 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2248 VT.getVectorElementType() == Operand.getValueType() &&
2249 "Illegal SCALAR_TO_VECTOR node!");
2250 if (OpOpcode == ISD::UNDEF)
2251 return getNode(ISD::UNDEF, VT);
2252 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2253 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2254 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2255 Operand.getConstantOperandVal(1) == 0 &&
2256 Operand.getOperand(0).getValueType() == VT)
2257 return Operand.getOperand(0);
2260 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2261 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2262 Operand.getNode()->getOperand(0));
2263 if (OpOpcode == ISD::FNEG) // --X -> X
2264 return Operand.getNode()->getOperand(0);
2267 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2268 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2273 SDVTList VTs = getVTList(VT);
2274 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2275 FoldingSetNodeID ID;
2276 SDValue Ops[1] = { Operand };
2277 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2280 return SDValue(E, 0);
2281 N = NodeAllocator.Allocate<UnarySDNode>();
2282 new (N) UnarySDNode(Opcode, VTs, Operand);
2283 CSEMap.InsertNode(N, IP);
2285 N = NodeAllocator.Allocate<UnarySDNode>();
2286 new (N) UnarySDNode(Opcode, VTs, Operand);
2289 AllNodes.push_back(N);
2293 return SDValue(N, 0);
2296 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2298 ConstantSDNode *Cst1,
2299 ConstantSDNode *Cst2) {
2300 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2303 case ISD::ADD: return getConstant(C1 + C2, VT);
2304 case ISD::SUB: return getConstant(C1 - C2, VT);
2305 case ISD::MUL: return getConstant(C1 * C2, VT);
2307 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2310 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2313 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2316 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2318 case ISD::AND: return getConstant(C1 & C2, VT);
2319 case ISD::OR: return getConstant(C1 | C2, VT);
2320 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2321 case ISD::SHL: return getConstant(C1 << C2, VT);
2322 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2323 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2324 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2325 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2332 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2333 SDValue N1, SDValue N2) {
2334 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2335 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2338 case ISD::TokenFactor:
2339 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2340 N2.getValueType() == MVT::Other && "Invalid token factor!");
2341 // Fold trivial token factors.
2342 if (N1.getOpcode() == ISD::EntryToken) return N2;
2343 if (N2.getOpcode() == ISD::EntryToken) return N1;
2344 if (N1 == N2) return N1;
2346 case ISD::CONCAT_VECTORS:
2347 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2348 // one big BUILD_VECTOR.
2349 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2350 N2.getOpcode() == ISD::BUILD_VECTOR) {
2351 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2352 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2353 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2357 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2358 N1.getValueType() == VT && "Binary operator types must match!");
2359 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2360 // worth handling here.
2361 if (N2C && N2C->isNullValue())
2363 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2370 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2371 N1.getValueType() == VT && "Binary operator types must match!");
2372 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2373 // it's worth handling here.
2374 if (N2C && N2C->isNullValue())
2381 assert(VT.isInteger() && "This operator does not apply to FP types!");
2391 assert(N1.getValueType() == N2.getValueType() &&
2392 N1.getValueType() == VT && "Binary operator types must match!");
2394 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2395 assert(N1.getValueType() == VT &&
2396 N1.getValueType().isFloatingPoint() &&
2397 N2.getValueType().isFloatingPoint() &&
2398 "Invalid FCOPYSIGN!");
2405 assert(VT == N1.getValueType() &&
2406 "Shift operators return type must be the same as their first arg");
2407 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2408 "Shifts only work on integers");
2410 // Always fold shifts of i1 values so the code generator doesn't need to
2411 // handle them. Since we know the size of the shift has to be less than the
2412 // size of the value, the shift/rotate count is guaranteed to be zero.
2416 case ISD::FP_ROUND_INREG: {
2417 MVT EVT = cast<VTSDNode>(N2)->getVT();
2418 assert(VT == N1.getValueType() && "Not an inreg round!");
2419 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2420 "Cannot FP_ROUND_INREG integer types");
2421 assert(EVT.bitsLE(VT) && "Not rounding down!");
2422 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2426 assert(VT.isFloatingPoint() &&
2427 N1.getValueType().isFloatingPoint() &&
2428 VT.bitsLE(N1.getValueType()) &&
2429 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2430 if (N1.getValueType() == VT) return N1; // noop conversion.
2432 case ISD::AssertSext:
2433 case ISD::AssertZext: {
2434 MVT EVT = cast<VTSDNode>(N2)->getVT();
2435 assert(VT == N1.getValueType() && "Not an inreg extend!");
2436 assert(VT.isInteger() && EVT.isInteger() &&
2437 "Cannot *_EXTEND_INREG FP types");
2438 assert(EVT.bitsLE(VT) && "Not extending!");
2439 if (VT == EVT) return N1; // noop assertion.
2442 case ISD::SIGN_EXTEND_INREG: {
2443 MVT EVT = cast<VTSDNode>(N2)->getVT();
2444 assert(VT == N1.getValueType() && "Not an inreg extend!");
2445 assert(VT.isInteger() && EVT.isInteger() &&
2446 "Cannot *_EXTEND_INREG FP types");
2447 assert(EVT.bitsLE(VT) && "Not extending!");
2448 if (EVT == VT) return N1; // Not actually extending
2451 APInt Val = N1C->getAPIntValue();
2452 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2453 Val <<= Val.getBitWidth()-FromBits;
2454 Val = Val.ashr(Val.getBitWidth()-FromBits);
2455 return getConstant(Val, VT);
2459 case ISD::EXTRACT_VECTOR_ELT:
2460 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2461 if (N1.getOpcode() == ISD::UNDEF)
2462 return getNode(ISD::UNDEF, VT);
2464 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2465 // expanding copies of large vectors from registers.
2467 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2468 N1.getNumOperands() > 0) {
2470 N1.getOperand(0).getValueType().getVectorNumElements();
2471 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2472 N1.getOperand(N2C->getZExtValue() / Factor),
2473 getConstant(N2C->getZExtValue() % Factor,
2474 N2.getValueType()));
2477 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2478 // expanding large vector constants.
2479 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2480 return N1.getOperand(N2C->getZExtValue());
2482 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2483 // operations are lowered to scalars.
2484 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2485 if (N1.getOperand(2) == N2)
2486 return N1.getOperand(1);
2488 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2491 case ISD::EXTRACT_ELEMENT:
2492 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2493 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2494 (N1.getValueType().isInteger() == VT.isInteger()) &&
2495 "Wrong types for EXTRACT_ELEMENT!");
2497 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2498 // 64-bit integers into 32-bit parts. Instead of building the extract of
2499 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2500 if (N1.getOpcode() == ISD::BUILD_PAIR)
2501 return N1.getOperand(N2C->getZExtValue());
2503 // EXTRACT_ELEMENT of a constant int is also very common.
2504 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2505 unsigned ElementSize = VT.getSizeInBits();
2506 unsigned Shift = ElementSize * N2C->getZExtValue();
2507 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2508 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2511 case ISD::EXTRACT_SUBVECTOR:
2512 if (N1.getValueType() == VT) // Trivial extraction.
2519 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2520 if (SV.getNode()) return SV;
2521 } else { // Cannonicalize constant to RHS if commutative
2522 if (isCommutativeBinOp(Opcode)) {
2523 std::swap(N1C, N2C);
2529 // Constant fold FP operations.
2530 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2531 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2533 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2534 // Cannonicalize constant to RHS if commutative
2535 std::swap(N1CFP, N2CFP);
2537 } else if (N2CFP && VT != MVT::ppcf128) {
2538 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2539 APFloat::opStatus s;
2542 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2543 if (s != APFloat::opInvalidOp)
2544 return getConstantFP(V1, VT);
2547 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2548 if (s!=APFloat::opInvalidOp)
2549 return getConstantFP(V1, VT);
2552 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2553 if (s!=APFloat::opInvalidOp)
2554 return getConstantFP(V1, VT);
2557 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2558 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2559 return getConstantFP(V1, VT);
2562 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2563 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2564 return getConstantFP(V1, VT);
2566 case ISD::FCOPYSIGN:
2568 return getConstantFP(V1, VT);
2574 // Canonicalize an UNDEF to the RHS, even over a constant.
2575 if (N1.getOpcode() == ISD::UNDEF) {
2576 if (isCommutativeBinOp(Opcode)) {
2580 case ISD::FP_ROUND_INREG:
2581 case ISD::SIGN_EXTEND_INREG:
2587 return N1; // fold op(undef, arg2) -> undef
2595 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2596 // For vectors, we can't easily build an all zero vector, just return
2603 // Fold a bunch of operators when the RHS is undef.
2604 if (N2.getOpcode() == ISD::UNDEF) {
2607 if (N1.getOpcode() == ISD::UNDEF)
2608 // Handle undef ^ undef -> 0 special case. This is a common
2610 return getConstant(0, VT);
2625 return N2; // fold op(arg1, undef) -> undef
2631 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2632 // For vectors, we can't easily build an all zero vector, just return
2637 return getConstant(VT.getIntegerVTBitMask(), VT);
2638 // For vectors, we can't easily build an all one vector, just return
2646 // Memoize this node if possible.
2648 SDVTList VTs = getVTList(VT);
2649 if (VT != MVT::Flag) {
2650 SDValue Ops[] = { N1, N2 };
2651 FoldingSetNodeID ID;
2652 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2654 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2655 return SDValue(E, 0);
2656 N = NodeAllocator.Allocate<BinarySDNode>();
2657 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2658 CSEMap.InsertNode(N, IP);
2660 N = NodeAllocator.Allocate<BinarySDNode>();
2661 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2664 AllNodes.push_back(N);
2668 return SDValue(N, 0);
2671 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2672 SDValue N1, SDValue N2, SDValue N3) {
2673 // Perform various simplifications.
2674 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2675 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2677 case ISD::CONCAT_VECTORS:
2678 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2679 // one big BUILD_VECTOR.
2680 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2681 N2.getOpcode() == ISD::BUILD_VECTOR &&
2682 N3.getOpcode() == ISD::BUILD_VECTOR) {
2683 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2684 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2685 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2686 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2690 // Use FoldSetCC to simplify SETCC's.
2691 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2692 if (Simp.getNode()) return Simp;
2697 if (N1C->getZExtValue())
2698 return N2; // select true, X, Y -> X
2700 return N3; // select false, X, Y -> Y
2703 if (N2 == N3) return N2; // select C, X, X -> X
2707 if (N2C->getZExtValue()) // Unconditional branch
2708 return getNode(ISD::BR, MVT::Other, N1, N3);
2710 return N1; // Never-taken branch
2713 case ISD::VECTOR_SHUFFLE:
2714 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2715 VT.isVector() && N3.getValueType().isVector() &&
2716 N3.getOpcode() == ISD::BUILD_VECTOR &&
2717 VT.getVectorNumElements() == N3.getNumOperands() &&
2718 "Illegal VECTOR_SHUFFLE node!");
2720 case ISD::BIT_CONVERT:
2721 // Fold bit_convert nodes from a type to themselves.
2722 if (N1.getValueType() == VT)
2727 // Memoize node if it doesn't produce a flag.
2729 SDVTList VTs = getVTList(VT);
2730 if (VT != MVT::Flag) {
2731 SDValue Ops[] = { N1, N2, N3 };
2732 FoldingSetNodeID ID;
2733 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2735 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2736 return SDValue(E, 0);
2737 N = NodeAllocator.Allocate<TernarySDNode>();
2738 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2739 CSEMap.InsertNode(N, IP);
2741 N = NodeAllocator.Allocate<TernarySDNode>();
2742 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2744 AllNodes.push_back(N);
2748 return SDValue(N, 0);
2751 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2752 SDValue N1, SDValue N2, SDValue N3,
2754 SDValue Ops[] = { N1, N2, N3, N4 };
2755 return getNode(Opcode, VT, Ops, 4);
2758 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2759 SDValue N1, SDValue N2, SDValue N3,
2760 SDValue N4, SDValue N5) {
2761 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2762 return getNode(Opcode, VT, Ops, 5);
2765 /// getMemsetValue - Vectorized representation of the memset value
2767 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2768 unsigned NumBits = VT.isVector() ?
2769 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2770 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2771 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2773 for (unsigned i = NumBits; i > 8; i >>= 1) {
2774 Val = (Val << Shift) | Val;
2778 return DAG.getConstant(Val, VT);
2779 return DAG.getConstantFP(APFloat(Val), VT);
2782 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2784 for (unsigned i = NumBits; i > 8; i >>= 1) {
2785 Value = DAG.getNode(ISD::OR, VT,
2786 DAG.getNode(ISD::SHL, VT, Value,
2787 DAG.getConstant(Shift, MVT::i8)), Value);
2794 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2795 /// used when a memcpy is turned into a memset when the source is a constant
2797 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2798 const TargetLowering &TLI,
2799 std::string &Str, unsigned Offset) {
2800 // Handle vector with all elements zero.
2803 return DAG.getConstant(0, VT);
2804 unsigned NumElts = VT.getVectorNumElements();
2805 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2806 return DAG.getNode(ISD::BIT_CONVERT, VT,
2807 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2810 assert(!VT.isVector() && "Can't handle vector type here!");
2811 unsigned NumBits = VT.getSizeInBits();
2812 unsigned MSB = NumBits / 8;
2814 if (TLI.isLittleEndian())
2815 Offset = Offset + MSB - 1;
2816 for (unsigned i = 0; i != MSB; ++i) {
2817 Val = (Val << 8) | (unsigned char)Str[Offset];
2818 Offset += TLI.isLittleEndian() ? -1 : 1;
2820 return DAG.getConstant(Val, VT);
2823 /// getMemBasePlusOffset - Returns base and offset node for the
2825 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2826 SelectionDAG &DAG) {
2827 MVT VT = Base.getValueType();
2828 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2831 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2833 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2834 unsigned SrcDelta = 0;
2835 GlobalAddressSDNode *G = NULL;
2836 if (Src.getOpcode() == ISD::GlobalAddress)
2837 G = cast<GlobalAddressSDNode>(Src);
2838 else if (Src.getOpcode() == ISD::ADD &&
2839 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2840 Src.getOperand(1).getOpcode() == ISD::Constant) {
2841 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2842 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2847 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2848 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2854 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2855 /// to replace the memset / memcpy is below the threshold. It also returns the
2856 /// types of the sequence of memory ops to perform memset / memcpy.
2858 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2859 SDValue Dst, SDValue Src,
2860 unsigned Limit, uint64_t Size, unsigned &Align,
2861 std::string &Str, bool &isSrcStr,
2863 const TargetLowering &TLI) {
2864 isSrcStr = isMemSrcFromString(Src, Str);
2865 bool isSrcConst = isa<ConstantSDNode>(Src);
2866 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2867 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2868 if (VT != MVT::iAny) {
2869 unsigned NewAlign = (unsigned)
2870 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2871 // If source is a string constant, this will require an unaligned load.
2872 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2873 if (Dst.getOpcode() != ISD::FrameIndex) {
2874 // Can't change destination alignment. It requires a unaligned store.
2878 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2879 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2880 if (MFI->isFixedObjectIndex(FI)) {
2881 // Can't change destination alignment. It requires a unaligned store.
2885 // Give the stack frame object a larger alignment if needed.
2886 if (MFI->getObjectAlignment(FI) < NewAlign)
2887 MFI->setObjectAlignment(FI, NewAlign);
2894 if (VT == MVT::iAny) {
2898 switch (Align & 7) {
2899 case 0: VT = MVT::i64; break;
2900 case 4: VT = MVT::i32; break;
2901 case 2: VT = MVT::i16; break;
2902 default: VT = MVT::i8; break;
2907 while (!TLI.isTypeLegal(LVT))
2908 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2909 assert(LVT.isInteger());
2915 unsigned NumMemOps = 0;
2917 unsigned VTSize = VT.getSizeInBits() / 8;
2918 while (VTSize > Size) {
2919 // For now, only use non-vector load / store's for the left-over pieces.
2920 if (VT.isVector()) {
2922 while (!TLI.isTypeLegal(VT))
2923 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2924 VTSize = VT.getSizeInBits() / 8;
2926 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2931 if (++NumMemOps > Limit)
2933 MemOps.push_back(VT);
2940 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2941 SDValue Chain, SDValue Dst,
2942 SDValue Src, uint64_t Size,
2943 unsigned Align, bool AlwaysInline,
2944 const Value *DstSV, uint64_t DstSVOff,
2945 const Value *SrcSV, uint64_t SrcSVOff){
2946 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2948 // Expand memcpy to a series of load and store ops if the size operand falls
2949 // below a certain threshold.
2950 std::vector<MVT> MemOps;
2951 uint64_t Limit = -1ULL;
2953 Limit = TLI.getMaxStoresPerMemcpy();
2954 unsigned DstAlign = Align; // Destination alignment can change.
2957 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2958 Str, CopyFromStr, DAG, TLI))
2962 bool isZeroStr = CopyFromStr && Str.empty();
2963 SmallVector<SDValue, 8> OutChains;
2964 unsigned NumMemOps = MemOps.size();
2965 uint64_t SrcOff = 0, DstOff = 0;
2966 for (unsigned i = 0; i < NumMemOps; i++) {
2968 unsigned VTSize = VT.getSizeInBits() / 8;
2969 SDValue Value, Store;
2971 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2972 // It's unlikely a store of a vector immediate can be done in a single
2973 // instruction. It would require a load from a constantpool first.
2974 // We also handle store a vector with all zero's.
2975 // FIXME: Handle other cases where store of vector immediate is done in
2976 // a single instruction.
2977 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2978 Store = DAG.getStore(Chain, Value,
2979 getMemBasePlusOffset(Dst, DstOff, DAG),
2980 DstSV, DstSVOff + DstOff, false, DstAlign);
2982 Value = DAG.getLoad(VT, Chain,
2983 getMemBasePlusOffset(Src, SrcOff, DAG),
2984 SrcSV, SrcSVOff + SrcOff, false, Align);
2985 Store = DAG.getStore(Chain, Value,
2986 getMemBasePlusOffset(Dst, DstOff, DAG),
2987 DstSV, DstSVOff + DstOff, false, DstAlign);
2989 OutChains.push_back(Store);
2994 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2995 &OutChains[0], OutChains.size());
2998 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
2999 SDValue Chain, SDValue Dst,
3000 SDValue Src, uint64_t Size,
3001 unsigned Align, bool AlwaysInline,
3002 const Value *DstSV, uint64_t DstSVOff,
3003 const Value *SrcSV, uint64_t SrcSVOff){
3004 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3006 // Expand memmove to a series of load and store ops if the size operand falls
3007 // below a certain threshold.
3008 std::vector<MVT> MemOps;
3009 uint64_t Limit = -1ULL;
3011 Limit = TLI.getMaxStoresPerMemmove();
3012 unsigned DstAlign = Align; // Destination alignment can change.
3015 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3016 Str, CopyFromStr, DAG, TLI))
3019 uint64_t SrcOff = 0, DstOff = 0;
3021 SmallVector<SDValue, 8> LoadValues;
3022 SmallVector<SDValue, 8> LoadChains;
3023 SmallVector<SDValue, 8> OutChains;
3024 unsigned NumMemOps = MemOps.size();
3025 for (unsigned i = 0; i < NumMemOps; i++) {
3027 unsigned VTSize = VT.getSizeInBits() / 8;
3028 SDValue Value, Store;
3030 Value = DAG.getLoad(VT, Chain,
3031 getMemBasePlusOffset(Src, SrcOff, DAG),
3032 SrcSV, SrcSVOff + SrcOff, false, Align);
3033 LoadValues.push_back(Value);
3034 LoadChains.push_back(Value.getValue(1));
3037 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3038 &LoadChains[0], LoadChains.size());
3040 for (unsigned i = 0; i < NumMemOps; i++) {
3042 unsigned VTSize = VT.getSizeInBits() / 8;
3043 SDValue Value, Store;
3045 Store = DAG.getStore(Chain, LoadValues[i],
3046 getMemBasePlusOffset(Dst, DstOff, DAG),
3047 DstSV, DstSVOff + DstOff, false, DstAlign);
3048 OutChains.push_back(Store);
3052 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3053 &OutChains[0], OutChains.size());
3056 static SDValue getMemsetStores(SelectionDAG &DAG,
3057 SDValue Chain, SDValue Dst,
3058 SDValue Src, uint64_t Size,
3060 const Value *DstSV, uint64_t DstSVOff) {
3061 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3063 // Expand memset to a series of load/store ops if the size operand
3064 // falls below a certain threshold.
3065 std::vector<MVT> MemOps;
3068 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3069 Size, Align, Str, CopyFromStr, DAG, TLI))
3072 SmallVector<SDValue, 8> OutChains;
3073 uint64_t DstOff = 0;
3075 unsigned NumMemOps = MemOps.size();
3076 for (unsigned i = 0; i < NumMemOps; i++) {
3078 unsigned VTSize = VT.getSizeInBits() / 8;
3079 SDValue Value = getMemsetValue(Src, VT, DAG);
3080 SDValue Store = DAG.getStore(Chain, Value,
3081 getMemBasePlusOffset(Dst, DstOff, DAG),
3082 DstSV, DstSVOff + DstOff);
3083 OutChains.push_back(Store);
3087 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3088 &OutChains[0], OutChains.size());
3091 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3092 SDValue Src, SDValue Size,
3093 unsigned Align, bool AlwaysInline,
3094 const Value *DstSV, uint64_t DstSVOff,
3095 const Value *SrcSV, uint64_t SrcSVOff) {
3097 // Check to see if we should lower the memcpy to loads and stores first.
3098 // For cases within the target-specified limits, this is the best choice.
3099 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3101 // Memcpy with size zero? Just return the original chain.
3102 if (ConstantSize->isNullValue())
3106 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3107 ConstantSize->getZExtValue(),
3108 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3109 if (Result.getNode())
3113 // Then check to see if we should lower the memcpy with target-specific
3114 // code. If the target chooses to do this, this is the next best.
3116 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3118 DstSV, DstSVOff, SrcSV, SrcSVOff);
3119 if (Result.getNode())
3122 // If we really need inline code and the target declined to provide it,
3123 // use a (potentially long) sequence of loads and stores.
3125 assert(ConstantSize && "AlwaysInline requires a constant size!");
3126 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3127 ConstantSize->getZExtValue(), Align, true,
3128 DstSV, DstSVOff, SrcSV, SrcSVOff);
3131 // Emit a library call.
3132 TargetLowering::ArgListTy Args;
3133 TargetLowering::ArgListEntry Entry;
3134 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3135 Entry.Node = Dst; Args.push_back(Entry);
3136 Entry.Node = Src; Args.push_back(Entry);
3137 Entry.Node = Size; Args.push_back(Entry);
3138 std::pair<SDValue,SDValue> CallResult =
3139 TLI.LowerCallTo(Chain, Type::VoidTy,
3140 false, false, false, false, CallingConv::C, false,
3141 getExternalSymbol("memcpy", TLI.getPointerTy()),
3143 return CallResult.second;
3146 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3147 SDValue Src, SDValue Size,
3149 const Value *DstSV, uint64_t DstSVOff,
3150 const Value *SrcSV, uint64_t SrcSVOff) {
3152 // Check to see if we should lower the memmove to loads and stores first.
3153 // For cases within the target-specified limits, this is the best choice.
3154 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3156 // Memmove with size zero? Just return the original chain.
3157 if (ConstantSize->isNullValue())
3161 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3162 ConstantSize->getZExtValue(),
3163 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3164 if (Result.getNode())
3168 // Then check to see if we should lower the memmove with target-specific
3169 // code. If the target chooses to do this, this is the next best.
3171 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3172 DstSV, DstSVOff, SrcSV, SrcSVOff);
3173 if (Result.getNode())
3176 // Emit a library call.
3177 TargetLowering::ArgListTy Args;
3178 TargetLowering::ArgListEntry Entry;
3179 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3180 Entry.Node = Dst; Args.push_back(Entry);
3181 Entry.Node = Src; Args.push_back(Entry);
3182 Entry.Node = Size; Args.push_back(Entry);
3183 std::pair<SDValue,SDValue> CallResult =
3184 TLI.LowerCallTo(Chain, Type::VoidTy,
3185 false, false, false, false, CallingConv::C, false,
3186 getExternalSymbol("memmove", TLI.getPointerTy()),
3188 return CallResult.second;
3191 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3192 SDValue Src, SDValue Size,
3194 const Value *DstSV, uint64_t DstSVOff) {
3196 // Check to see if we should lower the memset to stores first.
3197 // For cases within the target-specified limits, this is the best choice.
3198 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3200 // Memset with size zero? Just return the original chain.
3201 if (ConstantSize->isNullValue())
3205 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3206 Align, DstSV, DstSVOff);
3207 if (Result.getNode())
3211 // Then check to see if we should lower the memset with target-specific
3212 // code. If the target chooses to do this, this is the next best.
3214 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3216 if (Result.getNode())
3219 // Emit a library call.
3220 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3221 TargetLowering::ArgListTy Args;
3222 TargetLowering::ArgListEntry Entry;
3223 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3224 Args.push_back(Entry);
3225 // Extend or truncate the argument to be an i32 value for the call.
3226 if (Src.getValueType().bitsGT(MVT::i32))
3227 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3229 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3230 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3231 Args.push_back(Entry);
3232 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3233 Args.push_back(Entry);
3234 std::pair<SDValue,SDValue> CallResult =
3235 TLI.LowerCallTo(Chain, Type::VoidTy,
3236 false, false, false, false, CallingConv::C, false,
3237 getExternalSymbol("memset", TLI.getPointerTy()),
3239 return CallResult.second;
3242 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3243 SDValue Ptr, SDValue Cmp,
3244 SDValue Swp, const Value* PtrVal,
3245 unsigned Alignment) {
3246 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 ||
3247 Opcode == ISD::ATOMIC_CMP_SWAP_16 ||
3248 Opcode == ISD::ATOMIC_CMP_SWAP_32 ||
3249 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op");
3250 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3252 MVT VT = Cmp.getValueType();
3254 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3255 Alignment = getMVTAlignment(VT);
3257 SDVTList VTs = getVTList(VT, MVT::Other);
3258 FoldingSetNodeID ID;
3259 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3260 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3263 return SDValue(E, 0);
3264 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3265 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3266 CSEMap.InsertNode(N, IP);
3267 AllNodes.push_back(N);
3268 return SDValue(N, 0);
3271 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3272 SDValue Ptr, SDValue Val,
3273 const Value* PtrVal,
3274 unsigned Alignment) {
3275 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 ||
3276 Opcode == ISD::ATOMIC_LOAD_SUB_8 ||
3277 Opcode == ISD::ATOMIC_LOAD_AND_8 ||
3278 Opcode == ISD::ATOMIC_LOAD_OR_8 ||
3279 Opcode == ISD::ATOMIC_LOAD_XOR_8 ||
3280 Opcode == ISD::ATOMIC_LOAD_NAND_8 ||
3281 Opcode == ISD::ATOMIC_LOAD_MIN_8 ||
3282 Opcode == ISD::ATOMIC_LOAD_MAX_8 ||
3283 Opcode == ISD::ATOMIC_LOAD_UMIN_8 ||
3284 Opcode == ISD::ATOMIC_LOAD_UMAX_8 ||
3285 Opcode == ISD::ATOMIC_SWAP_8 ||
3286 Opcode == ISD::ATOMIC_LOAD_ADD_16 ||
3287 Opcode == ISD::ATOMIC_LOAD_SUB_16 ||
3288 Opcode == ISD::ATOMIC_LOAD_AND_16 ||
3289 Opcode == ISD::ATOMIC_LOAD_OR_16 ||
3290 Opcode == ISD::ATOMIC_LOAD_XOR_16 ||
3291 Opcode == ISD::ATOMIC_LOAD_NAND_16 ||
3292 Opcode == ISD::ATOMIC_LOAD_MIN_16 ||
3293 Opcode == ISD::ATOMIC_LOAD_MAX_16 ||
3294 Opcode == ISD::ATOMIC_LOAD_UMIN_16 ||
3295 Opcode == ISD::ATOMIC_LOAD_UMAX_16 ||
3296 Opcode == ISD::ATOMIC_SWAP_16 ||
3297 Opcode == ISD::ATOMIC_LOAD_ADD_32 ||
3298 Opcode == ISD::ATOMIC_LOAD_SUB_32 ||
3299 Opcode == ISD::ATOMIC_LOAD_AND_32 ||
3300 Opcode == ISD::ATOMIC_LOAD_OR_32 ||
3301 Opcode == ISD::ATOMIC_LOAD_XOR_32 ||
3302 Opcode == ISD::ATOMIC_LOAD_NAND_32 ||
3303 Opcode == ISD::ATOMIC_LOAD_MIN_32 ||
3304 Opcode == ISD::ATOMIC_LOAD_MAX_32 ||
3305 Opcode == ISD::ATOMIC_LOAD_UMIN_32 ||
3306 Opcode == ISD::ATOMIC_LOAD_UMAX_32 ||
3307 Opcode == ISD::ATOMIC_SWAP_32 ||
3308 Opcode == ISD::ATOMIC_LOAD_ADD_64 ||
3309 Opcode == ISD::ATOMIC_LOAD_SUB_64 ||
3310 Opcode == ISD::ATOMIC_LOAD_AND_64 ||
3311 Opcode == ISD::ATOMIC_LOAD_OR_64 ||
3312 Opcode == ISD::ATOMIC_LOAD_XOR_64 ||
3313 Opcode == ISD::ATOMIC_LOAD_NAND_64 ||
3314 Opcode == ISD::ATOMIC_LOAD_MIN_64 ||
3315 Opcode == ISD::ATOMIC_LOAD_MAX_64 ||
3316 Opcode == ISD::ATOMIC_LOAD_UMIN_64 ||
3317 Opcode == ISD::ATOMIC_LOAD_UMAX_64 ||
3318 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op");
3320 MVT VT = Val.getValueType();
3322 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3323 Alignment = getMVTAlignment(VT);
3325 SDVTList VTs = getVTList(VT, MVT::Other);
3326 FoldingSetNodeID ID;
3327 SDValue Ops[] = {Chain, Ptr, Val};
3328 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3330 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3331 return SDValue(E, 0);
3332 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3333 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3334 CSEMap.InsertNode(N, IP);
3335 AllNodes.push_back(N);
3336 return SDValue(N, 0);
3339 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3340 /// Allowed to return something different (and simpler) if Simplify is true.
3341 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3343 if (Simplify && NumOps == 1)
3346 SmallVector<MVT, 4> VTs;
3347 VTs.reserve(NumOps);
3348 for (unsigned i = 0; i < NumOps; ++i)
3349 VTs.push_back(Ops[i].getValueType());
3350 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3354 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3355 const MVT *VTs, unsigned NumVTs,
3356 const SDValue *Ops, unsigned NumOps,
3357 MVT MemVT, const Value *srcValue, int SVOff,
3358 unsigned Align, bool Vol,
3359 bool ReadMem, bool WriteMem) {
3360 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3361 MemVT, srcValue, SVOff, Align, Vol,
3366 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3367 const SDValue *Ops, unsigned NumOps,
3368 MVT MemVT, const Value *srcValue, int SVOff,
3369 unsigned Align, bool Vol,
3370 bool ReadMem, bool WriteMem) {
3371 // Memoize the node unless it returns a flag.
3372 MemIntrinsicSDNode *N;
3373 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3374 FoldingSetNodeID ID;
3375 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3378 return SDValue(E, 0);
3380 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3381 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3382 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3383 CSEMap.InsertNode(N, IP);
3385 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3386 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3387 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3389 AllNodes.push_back(N);
3390 return SDValue(N, 0);
3394 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3395 bool IsInreg, SDVTList VTs,
3396 const SDValue *Operands, unsigned NumOperands) {
3397 // Do not include isTailCall in the folding set profile.
3398 FoldingSetNodeID ID;
3399 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3400 ID.AddInteger(CallingConv);
3401 ID.AddInteger(IsVarArgs);
3403 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3404 // Instead of including isTailCall in the folding set, we just
3405 // set the flag of the existing node.
3407 cast<CallSDNode>(E)->setNotTailCall();
3408 return SDValue(E, 0);
3410 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3411 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3412 VTs, Operands, NumOperands);
3413 CSEMap.InsertNode(N, IP);
3414 AllNodes.push_back(N);
3415 return SDValue(N, 0);
3419 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3420 MVT VT, SDValue Chain,
3421 SDValue Ptr, SDValue Offset,
3422 const Value *SV, int SVOffset, MVT EVT,
3423 bool isVolatile, unsigned Alignment) {
3424 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3425 Alignment = getMVTAlignment(VT);
3428 ExtType = ISD::NON_EXTLOAD;
3429 } else if (ExtType == ISD::NON_EXTLOAD) {
3430 assert(VT == EVT && "Non-extending load from different memory type!");
3434 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3435 "Invalid vector extload!");
3437 assert(EVT.bitsLT(VT) &&
3438 "Should only be an extending load, not truncating!");
3439 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3440 "Cannot sign/zero extend a FP/Vector load!");
3441 assert(VT.isInteger() == EVT.isInteger() &&
3442 "Cannot convert from FP to Int or Int -> FP!");
3445 bool Indexed = AM != ISD::UNINDEXED;
3446 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3447 "Unindexed load with an offset!");
3449 SDVTList VTs = Indexed ?
3450 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3451 SDValue Ops[] = { Chain, Ptr, Offset };
3452 FoldingSetNodeID ID;
3453 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3455 ID.AddInteger(ExtType);
3456 ID.AddInteger(EVT.getRawBits());
3457 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3460 return SDValue(E, 0);
3461 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3462 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3463 Alignment, isVolatile);
3464 CSEMap.InsertNode(N, IP);
3465 AllNodes.push_back(N);
3466 return SDValue(N, 0);
3469 SDValue SelectionDAG::getLoad(MVT VT,
3470 SDValue Chain, SDValue Ptr,
3471 const Value *SV, int SVOffset,
3472 bool isVolatile, unsigned Alignment) {
3473 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3474 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3475 SV, SVOffset, VT, isVolatile, Alignment);
3478 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3479 SDValue Chain, SDValue Ptr,
3481 int SVOffset, MVT EVT,
3482 bool isVolatile, unsigned Alignment) {
3483 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3484 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3485 SV, SVOffset, EVT, isVolatile, Alignment);
3489 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3490 SDValue Offset, ISD::MemIndexedMode AM) {
3491 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3492 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3493 "Load is already a indexed load!");
3494 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3495 LD->getChain(), Base, Offset, LD->getSrcValue(),
3496 LD->getSrcValueOffset(), LD->getMemoryVT(),
3497 LD->isVolatile(), LD->getAlignment());
3500 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3501 SDValue Ptr, const Value *SV, int SVOffset,
3502 bool isVolatile, unsigned Alignment) {
3503 MVT VT = Val.getValueType();
3505 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3506 Alignment = getMVTAlignment(VT);
3508 SDVTList VTs = getVTList(MVT::Other);
3509 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3510 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3511 FoldingSetNodeID ID;
3512 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3513 ID.AddInteger(ISD::UNINDEXED);
3514 ID.AddInteger(false);
3515 ID.AddInteger(VT.getRawBits());
3516 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3518 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3519 return SDValue(E, 0);
3520 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3521 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3522 VT, SV, SVOffset, Alignment, isVolatile);
3523 CSEMap.InsertNode(N, IP);
3524 AllNodes.push_back(N);
3525 return SDValue(N, 0);
3528 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3529 SDValue Ptr, const Value *SV,
3530 int SVOffset, MVT SVT,
3531 bool isVolatile, unsigned Alignment) {
3532 MVT VT = Val.getValueType();
3535 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3537 assert(VT.bitsGT(SVT) && "Not a truncation?");
3538 assert(VT.isInteger() == SVT.isInteger() &&
3539 "Can't do FP-INT conversion!");
3541 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3542 Alignment = getMVTAlignment(VT);
3544 SDVTList VTs = getVTList(MVT::Other);
3545 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3546 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3547 FoldingSetNodeID ID;
3548 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3549 ID.AddInteger(ISD::UNINDEXED);
3551 ID.AddInteger(SVT.getRawBits());
3552 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3554 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3555 return SDValue(E, 0);
3556 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3557 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3558 SVT, SV, SVOffset, Alignment, isVolatile);
3559 CSEMap.InsertNode(N, IP);
3560 AllNodes.push_back(N);
3561 return SDValue(N, 0);
3565 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3566 SDValue Offset, ISD::MemIndexedMode AM) {
3567 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3568 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3569 "Store is already a indexed store!");
3570 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3571 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3572 FoldingSetNodeID ID;
3573 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3575 ID.AddInteger(ST->isTruncatingStore());
3576 ID.AddInteger(ST->getMemoryVT().getRawBits());
3577 ID.AddInteger(ST->getRawFlags());
3579 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3580 return SDValue(E, 0);
3581 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3582 new (N) StoreSDNode(Ops, VTs, AM,
3583 ST->isTruncatingStore(), ST->getMemoryVT(),
3584 ST->getSrcValue(), ST->getSrcValueOffset(),
3585 ST->getAlignment(), ST->isVolatile());
3586 CSEMap.InsertNode(N, IP);
3587 AllNodes.push_back(N);
3588 return SDValue(N, 0);
3591 SDValue SelectionDAG::getVAArg(MVT VT,
3592 SDValue Chain, SDValue Ptr,
3594 SDValue Ops[] = { Chain, Ptr, SV };
3595 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3598 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3599 const SDUse *Ops, unsigned NumOps) {
3601 case 0: return getNode(Opcode, VT);
3602 case 1: return getNode(Opcode, VT, Ops[0]);
3603 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3604 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3608 // Copy from an SDUse array into an SDValue array for use with
3609 // the regular getNode logic.
3610 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3611 return getNode(Opcode, VT, &NewOps[0], NumOps);
3614 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3615 const SDValue *Ops, unsigned NumOps) {
3617 case 0: return getNode(Opcode, VT);
3618 case 1: return getNode(Opcode, VT, Ops[0]);
3619 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3620 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3626 case ISD::SELECT_CC: {
3627 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3628 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3629 "LHS and RHS of condition must have same type!");
3630 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3631 "True and False arms of SelectCC must have same type!");
3632 assert(Ops[2].getValueType() == VT &&
3633 "select_cc node must be of same type as true and false value!");
3637 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3638 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3639 "LHS/RHS of comparison should match types!");
3646 SDVTList VTs = getVTList(VT);
3647 if (VT != MVT::Flag) {
3648 FoldingSetNodeID ID;
3649 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3651 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3652 return SDValue(E, 0);
3653 N = NodeAllocator.Allocate<SDNode>();
3654 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3655 CSEMap.InsertNode(N, IP);
3657 N = NodeAllocator.Allocate<SDNode>();
3658 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3660 AllNodes.push_back(N);
3664 return SDValue(N, 0);
3667 SDValue SelectionDAG::getNode(unsigned Opcode,
3668 const std::vector<MVT> &ResultTys,
3669 const SDValue *Ops, unsigned NumOps) {
3670 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3674 SDValue SelectionDAG::getNode(unsigned Opcode,
3675 const MVT *VTs, unsigned NumVTs,
3676 const SDValue *Ops, unsigned NumOps) {
3678 return getNode(Opcode, VTs[0], Ops, NumOps);
3679 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3682 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3683 const SDValue *Ops, unsigned NumOps) {
3684 if (VTList.NumVTs == 1)
3685 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3688 // FIXME: figure out how to safely handle things like
3689 // int foo(int x) { return 1 << (x & 255); }
3690 // int bar() { return foo(256); }
3692 case ISD::SRA_PARTS:
3693 case ISD::SRL_PARTS:
3694 case ISD::SHL_PARTS:
3695 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3696 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3697 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3698 else if (N3.getOpcode() == ISD::AND)
3699 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3700 // If the and is only masking out bits that cannot effect the shift,
3701 // eliminate the and.
3702 unsigned NumBits = VT.getSizeInBits()*2;
3703 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3704 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3710 // Memoize the node unless it returns a flag.
3712 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3713 FoldingSetNodeID ID;
3714 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3716 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3717 return SDValue(E, 0);
3719 N = NodeAllocator.Allocate<UnarySDNode>();
3720 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3721 } else if (NumOps == 2) {
3722 N = NodeAllocator.Allocate<BinarySDNode>();
3723 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3724 } else if (NumOps == 3) {
3725 N = NodeAllocator.Allocate<TernarySDNode>();
3726 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3728 N = NodeAllocator.Allocate<SDNode>();
3729 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3731 CSEMap.InsertNode(N, IP);
3734 N = NodeAllocator.Allocate<UnarySDNode>();
3735 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3736 } else if (NumOps == 2) {
3737 N = NodeAllocator.Allocate<BinarySDNode>();
3738 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3739 } else if (NumOps == 3) {
3740 N = NodeAllocator.Allocate<TernarySDNode>();
3741 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3743 N = NodeAllocator.Allocate<SDNode>();
3744 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3747 AllNodes.push_back(N);
3751 return SDValue(N, 0);
3754 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3755 return getNode(Opcode, VTList, 0, 0);
3758 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3760 SDValue Ops[] = { N1 };
3761 return getNode(Opcode, VTList, Ops, 1);
3764 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3765 SDValue N1, SDValue N2) {
3766 SDValue Ops[] = { N1, N2 };
3767 return getNode(Opcode, VTList, Ops, 2);
3770 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3771 SDValue N1, SDValue N2, SDValue N3) {
3772 SDValue Ops[] = { N1, N2, N3 };
3773 return getNode(Opcode, VTList, Ops, 3);
3776 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3777 SDValue N1, SDValue N2, SDValue N3,
3779 SDValue Ops[] = { N1, N2, N3, N4 };
3780 return getNode(Opcode, VTList, Ops, 4);
3783 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3784 SDValue N1, SDValue N2, SDValue N3,
3785 SDValue N4, SDValue N5) {
3786 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3787 return getNode(Opcode, VTList, Ops, 5);
3790 SDVTList SelectionDAG::getVTList(MVT VT) {
3791 return makeVTList(SDNode::getValueTypeList(VT), 1);
3794 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3795 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3796 E = VTList.rend(); I != E; ++I)
3797 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3800 MVT *Array = Allocator.Allocate<MVT>(2);
3803 SDVTList Result = makeVTList(Array, 2);
3804 VTList.push_back(Result);
3808 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3809 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3810 E = VTList.rend(); I != E; ++I)
3811 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3815 MVT *Array = Allocator.Allocate<MVT>(3);
3819 SDVTList Result = makeVTList(Array, 3);
3820 VTList.push_back(Result);
3824 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3826 case 0: assert(0 && "Cannot have nodes without results!");
3827 case 1: return getVTList(VTs[0]);
3828 case 2: return getVTList(VTs[0], VTs[1]);
3829 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3833 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3834 E = VTList.rend(); I != E; ++I) {
3835 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3838 bool NoMatch = false;
3839 for (unsigned i = 2; i != NumVTs; ++i)
3840 if (VTs[i] != I->VTs[i]) {
3848 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3849 std::copy(VTs, VTs+NumVTs, Array);
3850 SDVTList Result = makeVTList(Array, NumVTs);
3851 VTList.push_back(Result);
3856 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3857 /// specified operands. If the resultant node already exists in the DAG,
3858 /// this does not modify the specified node, instead it returns the node that
3859 /// already exists. If the resultant node does not exist in the DAG, the
3860 /// input node is returned. As a degenerate case, if you specify the same
3861 /// input operands as the node already has, the input node is returned.
3862 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3863 SDNode *N = InN.getNode();
3864 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3866 // Check to see if there is no change.
3867 if (Op == N->getOperand(0)) return InN;
3869 // See if the modified node already exists.
3870 void *InsertPos = 0;
3871 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3872 return SDValue(Existing, InN.getResNo());
3874 // Nope it doesn't. Remove the node from its current place in the maps.
3876 if (!RemoveNodeFromCSEMaps(N))
3879 // Now we update the operands.
3880 N->OperandList[0].getVal()->removeUser(0, N);
3881 N->OperandList[0] = Op;
3882 N->OperandList[0].setUser(N);
3883 Op.getNode()->addUser(0, N);
3885 // If this gets put into a CSE map, add it.
3886 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3890 SDValue SelectionDAG::
3891 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3892 SDNode *N = InN.getNode();
3893 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3895 // Check to see if there is no change.
3896 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3897 return InN; // No operands changed, just return the input node.
3899 // See if the modified node already exists.
3900 void *InsertPos = 0;
3901 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3902 return SDValue(Existing, InN.getResNo());
3904 // Nope it doesn't. Remove the node from its current place in the maps.
3906 if (!RemoveNodeFromCSEMaps(N))
3909 // Now we update the operands.
3910 if (N->OperandList[0] != Op1) {
3911 N->OperandList[0].getVal()->removeUser(0, N);
3912 N->OperandList[0] = Op1;
3913 N->OperandList[0].setUser(N);
3914 Op1.getNode()->addUser(0, N);
3916 if (N->OperandList[1] != Op2) {
3917 N->OperandList[1].getVal()->removeUser(1, N);
3918 N->OperandList[1] = Op2;
3919 N->OperandList[1].setUser(N);
3920 Op2.getNode()->addUser(1, N);
3923 // If this gets put into a CSE map, add it.
3924 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3928 SDValue SelectionDAG::
3929 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3930 SDValue Ops[] = { Op1, Op2, Op3 };
3931 return UpdateNodeOperands(N, Ops, 3);
3934 SDValue SelectionDAG::
3935 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3936 SDValue Op3, SDValue Op4) {
3937 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3938 return UpdateNodeOperands(N, Ops, 4);
3941 SDValue SelectionDAG::
3942 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3943 SDValue Op3, SDValue Op4, SDValue Op5) {
3944 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3945 return UpdateNodeOperands(N, Ops, 5);
3948 SDValue SelectionDAG::
3949 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3950 SDNode *N = InN.getNode();
3951 assert(N->getNumOperands() == NumOps &&
3952 "Update with wrong number of operands");
3954 // Check to see if there is no change.
3955 bool AnyChange = false;
3956 for (unsigned i = 0; i != NumOps; ++i) {
3957 if (Ops[i] != N->getOperand(i)) {
3963 // No operands changed, just return the input node.
3964 if (!AnyChange) return InN;
3966 // See if the modified node already exists.
3967 void *InsertPos = 0;
3968 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3969 return SDValue(Existing, InN.getResNo());
3971 // Nope it doesn't. Remove the node from its current place in the maps.
3973 if (!RemoveNodeFromCSEMaps(N))
3976 // Now we update the operands.
3977 for (unsigned i = 0; i != NumOps; ++i) {
3978 if (N->OperandList[i] != Ops[i]) {
3979 N->OperandList[i].getVal()->removeUser(i, N);
3980 N->OperandList[i] = Ops[i];
3981 N->OperandList[i].setUser(N);
3982 Ops[i].getNode()->addUser(i, N);
3986 // If this gets put into a CSE map, add it.
3987 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3991 /// DropOperands - Release the operands and set this node to have
3993 void SDNode::DropOperands() {
3994 // Unlike the code in MorphNodeTo that does this, we don't need to
3995 // watch for dead nodes here.
3996 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3997 I->getVal()->removeUser(std::distance(op_begin(), I), this);
4002 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4005 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4007 SDVTList VTs = getVTList(VT);
4008 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4011 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4012 MVT VT, SDValue Op1) {
4013 SDVTList VTs = getVTList(VT);
4014 SDValue Ops[] = { Op1 };
4015 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4018 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4019 MVT VT, SDValue Op1,
4021 SDVTList VTs = getVTList(VT);
4022 SDValue Ops[] = { Op1, Op2 };
4023 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4026 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4027 MVT VT, SDValue Op1,
4028 SDValue Op2, SDValue Op3) {
4029 SDVTList VTs = getVTList(VT);
4030 SDValue Ops[] = { Op1, Op2, Op3 };
4031 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4034 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4035 MVT VT, const SDValue *Ops,
4037 SDVTList VTs = getVTList(VT);
4038 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4041 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4042 MVT VT1, MVT VT2, const SDValue *Ops,
4044 SDVTList VTs = getVTList(VT1, VT2);
4045 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4048 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4050 SDVTList VTs = getVTList(VT1, VT2);
4051 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4054 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4055 MVT VT1, MVT VT2, MVT VT3,
4056 const SDValue *Ops, unsigned NumOps) {
4057 SDVTList VTs = getVTList(VT1, VT2, VT3);
4058 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4061 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4064 SDVTList VTs = getVTList(VT1, VT2);
4065 SDValue Ops[] = { Op1 };
4066 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4069 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4071 SDValue Op1, SDValue Op2) {
4072 SDVTList VTs = getVTList(VT1, VT2);
4073 SDValue Ops[] = { Op1, Op2 };
4074 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4077 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4079 SDValue Op1, SDValue Op2,
4081 SDVTList VTs = getVTList(VT1, VT2);
4082 SDValue Ops[] = { Op1, Op2, Op3 };
4083 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4086 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4087 SDVTList VTs, const SDValue *Ops,
4089 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4092 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4094 SDVTList VTs = getVTList(VT);
4095 return MorphNodeTo(N, Opc, VTs, 0, 0);
4098 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4099 MVT VT, SDValue Op1) {
4100 SDVTList VTs = getVTList(VT);
4101 SDValue Ops[] = { Op1 };
4102 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4105 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4106 MVT VT, SDValue Op1,
4108 SDVTList VTs = getVTList(VT);
4109 SDValue Ops[] = { Op1, Op2 };
4110 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4113 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4114 MVT VT, SDValue Op1,
4115 SDValue Op2, SDValue Op3) {
4116 SDVTList VTs = getVTList(VT);
4117 SDValue Ops[] = { Op1, Op2, Op3 };
4118 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4121 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4122 MVT VT, const SDValue *Ops,
4124 SDVTList VTs = getVTList(VT);
4125 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4128 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4129 MVT VT1, MVT VT2, const SDValue *Ops,
4131 SDVTList VTs = getVTList(VT1, VT2);
4132 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4135 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4137 SDVTList VTs = getVTList(VT1, VT2);
4138 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4141 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4142 MVT VT1, MVT VT2, MVT VT3,
4143 const SDValue *Ops, unsigned NumOps) {
4144 SDVTList VTs = getVTList(VT1, VT2, VT3);
4145 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4148 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4151 SDVTList VTs = getVTList(VT1, VT2);
4152 SDValue Ops[] = { Op1 };
4153 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4156 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4158 SDValue Op1, SDValue Op2) {
4159 SDVTList VTs = getVTList(VT1, VT2);
4160 SDValue Ops[] = { Op1, Op2 };
4161 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4164 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4166 SDValue Op1, SDValue Op2,
4168 SDVTList VTs = getVTList(VT1, VT2);
4169 SDValue Ops[] = { Op1, Op2, Op3 };
4170 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4173 /// MorphNodeTo - These *mutate* the specified node to have the specified
4174 /// return type, opcode, and operands.
4176 /// Note that MorphNodeTo returns the resultant node. If there is already a
4177 /// node of the specified opcode and operands, it returns that node instead of
4178 /// the current one.
4180 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4181 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4182 /// node, and because it doesn't require CSE recalculation for any of
4183 /// the node's users.
4185 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4186 SDVTList VTs, const SDValue *Ops,
4188 // If an identical node already exists, use it.
4190 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4191 FoldingSetNodeID ID;
4192 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4193 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4197 if (!RemoveNodeFromCSEMaps(N))
4200 // Start the morphing.
4202 N->ValueList = VTs.VTs;
4203 N->NumValues = VTs.NumVTs;
4205 // Clear the operands list, updating used nodes to remove this from their
4206 // use list. Keep track of any operands that become dead as a result.
4207 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4208 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4210 SDNode *Used = I->getVal();
4211 Used->removeUser(std::distance(B, I), N);
4212 if (Used->use_empty())
4213 DeadNodeSet.insert(Used);
4216 // If NumOps is larger than the # of operands we currently have, reallocate
4217 // the operand list.
4218 if (NumOps > N->NumOperands) {
4219 if (N->OperandsNeedDelete)
4220 delete[] N->OperandList;
4222 if (N->isMachineOpcode()) {
4223 // We're creating a final node that will live unmorphed for the
4224 // remainder of the current SelectionDAG iteration, so we can allocate
4225 // the operands directly out of a pool with no recycling metadata.
4226 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4227 N->OperandsNeedDelete = false;
4229 N->OperandList = new SDUse[NumOps];
4230 N->OperandsNeedDelete = true;
4234 // Assign the new operands.
4235 N->NumOperands = NumOps;
4236 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4237 N->OperandList[i] = Ops[i];
4238 N->OperandList[i].setUser(N);
4239 SDNode *ToUse = N->OperandList[i].getVal();
4240 ToUse->addUser(i, N);
4243 // Delete any nodes that are still dead after adding the uses for the
4245 SmallVector<SDNode *, 16> DeadNodes;
4246 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4247 E = DeadNodeSet.end(); I != E; ++I)
4248 if ((*I)->use_empty())
4249 DeadNodes.push_back(*I);
4250 RemoveDeadNodes(DeadNodes);
4253 CSEMap.InsertNode(N, IP); // Memoize the new node.
4258 /// getTargetNode - These are used for target selectors to create a new node
4259 /// with specified return type(s), target opcode, and operands.
4261 /// Note that getTargetNode returns the resultant node. If there is already a
4262 /// node of the specified opcode and operands, it returns that node instead of
4263 /// the current one.
4264 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4265 return getNode(~Opcode, VT).getNode();
4267 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4268 return getNode(~Opcode, VT, Op1).getNode();
4270 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4271 SDValue Op1, SDValue Op2) {
4272 return getNode(~Opcode, VT, Op1, Op2).getNode();
4274 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4275 SDValue Op1, SDValue Op2,
4277 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4279 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4280 const SDValue *Ops, unsigned NumOps) {
4281 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4283 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4284 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4286 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4288 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4289 MVT VT2, SDValue Op1) {
4290 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4291 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4293 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4294 MVT VT2, SDValue Op1,
4296 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4297 SDValue Ops[] = { Op1, Op2 };
4298 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4300 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4301 MVT VT2, SDValue Op1,
4302 SDValue Op2, SDValue Op3) {
4303 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4304 SDValue Ops[] = { Op1, Op2, Op3 };
4305 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4307 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4308 const SDValue *Ops, unsigned NumOps) {
4309 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4310 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4312 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4313 SDValue Op1, SDValue Op2) {
4314 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4315 SDValue Ops[] = { Op1, Op2 };
4316 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4318 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4319 SDValue Op1, SDValue Op2,
4321 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4322 SDValue Ops[] = { Op1, Op2, Op3 };
4323 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4325 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4326 const SDValue *Ops, unsigned NumOps) {
4327 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4328 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4330 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4331 MVT VT2, MVT VT3, MVT VT4,
4332 const SDValue *Ops, unsigned NumOps) {
4333 std::vector<MVT> VTList;
4334 VTList.push_back(VT1);
4335 VTList.push_back(VT2);
4336 VTList.push_back(VT3);
4337 VTList.push_back(VT4);
4338 const MVT *VTs = getNodeValueTypes(VTList);
4339 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4341 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4342 const std::vector<MVT> &ResultTys,
4343 const SDValue *Ops, unsigned NumOps) {
4344 const MVT *VTs = getNodeValueTypes(ResultTys);
4345 return getNode(~Opcode, VTs, ResultTys.size(),
4346 Ops, NumOps).getNode();
4349 /// getNodeIfExists - Get the specified node if it's already available, or
4350 /// else return NULL.
4351 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4352 const SDValue *Ops, unsigned NumOps) {
4353 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4354 FoldingSetNodeID ID;
4355 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4364 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4365 /// This can cause recursive merging of nodes in the DAG.
4367 /// This version assumes From has a single result value.
4369 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4370 DAGUpdateListener *UpdateListener) {
4371 SDNode *From = FromN.getNode();
4372 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4373 "Cannot replace with this method!");
4374 assert(From != To.getNode() && "Cannot replace uses of with self");
4376 while (!From->use_empty()) {
4377 SDNode::use_iterator UI = From->use_begin();
4380 // This node is about to morph, remove its old self from the CSE maps.
4381 RemoveNodeFromCSEMaps(U);
4383 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4384 I != E; ++I, ++operandNum)
4385 if (I->getVal() == From) {
4386 From->removeUser(operandNum, U);
4389 To.getNode()->addUser(operandNum, U);
4392 // Now that we have modified U, add it back to the CSE maps. If it already
4393 // exists there, recursively merge the results together.
4394 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4395 ReplaceAllUsesWith(U, Existing, UpdateListener);
4396 // U is now dead. Inform the listener if it exists and delete it.
4398 UpdateListener->NodeDeleted(U, Existing);
4399 DeleteNodeNotInCSEMaps(U);
4401 // If the node doesn't already exist, we updated it. Inform a listener if
4404 UpdateListener->NodeUpdated(U);
4409 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4410 /// This can cause recursive merging of nodes in the DAG.
4412 /// This version assumes From/To have matching types and numbers of result
4415 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4416 DAGUpdateListener *UpdateListener) {
4417 assert(From->getVTList().VTs == To->getVTList().VTs &&
4418 From->getNumValues() == To->getNumValues() &&
4419 "Cannot use this version of ReplaceAllUsesWith!");
4421 // Handle the trivial case.
4425 while (!From->use_empty()) {
4426 SDNode::use_iterator UI = From->use_begin();
4429 // This node is about to morph, remove its old self from the CSE maps.
4430 RemoveNodeFromCSEMaps(U);
4432 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4433 I != E; ++I, ++operandNum)
4434 if (I->getVal() == From) {
4435 From->removeUser(operandNum, U);
4436 I->getSDValue().setNode(To);
4437 To->addUser(operandNum, U);
4440 // Now that we have modified U, add it back to the CSE maps. If it already
4441 // exists there, recursively merge the results together.
4442 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4443 ReplaceAllUsesWith(U, Existing, UpdateListener);
4444 // U is now dead. Inform the listener if it exists and delete it.
4446 UpdateListener->NodeDeleted(U, Existing);
4447 DeleteNodeNotInCSEMaps(U);
4449 // If the node doesn't already exist, we updated it. Inform a listener if
4452 UpdateListener->NodeUpdated(U);
4457 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4458 /// This can cause recursive merging of nodes in the DAG.
4460 /// This version can replace From with any result values. To must match the
4461 /// number and types of values returned by From.
4462 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4464 DAGUpdateListener *UpdateListener) {
4465 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4466 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4468 while (!From->use_empty()) {
4469 SDNode::use_iterator UI = From->use_begin();
4472 // This node is about to morph, remove its old self from the CSE maps.
4473 RemoveNodeFromCSEMaps(U);
4475 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4476 I != E; ++I, ++operandNum)
4477 if (I->getVal() == From) {
4478 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4479 From->removeUser(operandNum, U);
4482 ToOp.getNode()->addUser(operandNum, U);
4485 // Now that we have modified U, add it back to the CSE maps. If it already
4486 // exists there, recursively merge the results together.
4487 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4488 ReplaceAllUsesWith(U, Existing, UpdateListener);
4489 // U is now dead. Inform the listener if it exists and delete it.
4491 UpdateListener->NodeDeleted(U, Existing);
4492 DeleteNodeNotInCSEMaps(U);
4494 // If the node doesn't already exist, we updated it. Inform a listener if
4497 UpdateListener->NodeUpdated(U);
4502 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4503 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4504 /// handled the same way as for ReplaceAllUsesWith.
4505 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4506 DAGUpdateListener *UpdateListener){
4507 // Handle the really simple, really trivial case efficiently.
4508 if (From == To) return;
4510 // Handle the simple, trivial, case efficiently.
4511 if (From.getNode()->getNumValues() == 1) {
4512 ReplaceAllUsesWith(From, To, UpdateListener);
4516 // Get all of the users of From.getNode(). We want these in a nice,
4517 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4518 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4520 while (!Users.empty()) {
4521 // We know that this user uses some value of From. If it is the right
4522 // value, update it.
4523 SDNode *User = Users.back();
4526 // Scan for an operand that matches From.
4527 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4528 for (; Op != E; ++Op)
4529 if (*Op == From) break;
4531 // If there are no matches, the user must use some other result of From.
4532 if (Op == E) continue;
4534 // Okay, we know this user needs to be updated. Remove its old self
4535 // from the CSE maps.
4536 RemoveNodeFromCSEMaps(User);
4538 // Update all operands that match "From" in case there are multiple uses.
4539 for (; Op != E; ++Op) {
4541 From.getNode()->removeUser(Op-User->op_begin(), User);
4544 To.getNode()->addUser(Op-User->op_begin(), User);
4548 // Now that we have modified User, add it back to the CSE maps. If it
4549 // already exists there, recursively merge the results together.
4550 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4552 if (UpdateListener) UpdateListener->NodeUpdated(User);
4553 continue; // Continue on to next user.
4556 // If there was already an existing matching node, use ReplaceAllUsesWith
4557 // to replace the dead one with the existing one. This can cause
4558 // recursive merging of other unrelated nodes down the line.
4559 ReplaceAllUsesWith(User, Existing, UpdateListener);
4561 // User is now dead. Notify a listener if present.
4562 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4563 DeleteNodeNotInCSEMaps(User);
4567 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4568 /// uses of other values produced by From.getVal() alone. The same value may
4569 /// appear in both the From and To list. The Deleted vector is
4570 /// handled the same way as for ReplaceAllUsesWith.
4571 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4574 DAGUpdateListener *UpdateListener){
4575 // Handle the simple, trivial case efficiently.
4577 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4579 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4580 for (unsigned i = 0; i != Num; ++i)
4581 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4582 E = From[i].getNode()->use_end(); UI != E; ++UI)
4583 Users.push_back(std::make_pair(*UI, i));
4585 while (!Users.empty()) {
4586 // We know that this user uses some value of From. If it is the right
4587 // value, update it.
4588 SDNode *User = Users.back().first;
4589 unsigned i = Users.back().second;
4592 // Scan for an operand that matches From.
4593 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4594 for (; Op != E; ++Op)
4595 if (*Op == From[i]) break;
4597 // If there are no matches, the user must use some other result of From.
4598 if (Op == E) continue;
4600 // Okay, we know this user needs to be updated. Remove its old self
4601 // from the CSE maps.
4602 RemoveNodeFromCSEMaps(User);
4604 // Update all operands that match "From" in case there are multiple uses.
4605 for (; Op != E; ++Op) {
4606 if (*Op == From[i]) {
4607 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4610 To[i].getNode()->addUser(Op-User->op_begin(), User);
4614 // Now that we have modified User, add it back to the CSE maps. If it
4615 // already exists there, recursively merge the results together.
4616 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4618 if (UpdateListener) UpdateListener->NodeUpdated(User);
4619 continue; // Continue on to next user.
4622 // If there was already an existing matching node, use ReplaceAllUsesWith
4623 // to replace the dead one with the existing one. This can cause
4624 // recursive merging of other unrelated nodes down the line.
4625 ReplaceAllUsesWith(User, Existing, UpdateListener);
4627 // User is now dead. Notify a listener if present.
4628 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4629 DeleteNodeNotInCSEMaps(User);
4633 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4634 /// based on their topological order. It returns the maximum id and a vector
4635 /// of the SDNodes* in assigned order by reference.
4636 unsigned SelectionDAG::AssignTopologicalOrder() {
4638 unsigned DAGSize = 0;
4640 // SortedPos tracks the progress of the algorithm. Nodes before it are
4641 // sorted, nodes after it are unsorted. When the algorithm completes
4642 // it is at the end of the list.
4643 allnodes_iterator SortedPos = allnodes_begin();
4645 // Visit all the nodes. Add nodes with no operands to the TopOrder result
4646 // array immediately. Annotate nodes that do have operands with their
4647 // operand count. Before we do this, the Node Id fields of the nodes
4648 // may contain arbitrary values. After, the Node Id fields for nodes
4649 // before SortedPos will contain the topological sort index, and the
4650 // Node Id fields for nodes At SortedPos and after will contain the
4651 // count of outstanding operands.
4652 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4654 unsigned Degree = N->getNumOperands();
4656 // A node with no uses, add it to the result array immediately.
4657 N->setNodeId(DAGSize++);
4658 allnodes_iterator Q = N;
4660 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4663 // Temporarily use the Node Id as scratch space for the degree count.
4664 N->setNodeId(Degree);
4668 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4669 // such that by the time the end is reached all nodes will be sorted.
4670 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4672 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4675 unsigned Degree = P->getNodeId();
4678 // All of P's operands are sorted, so P may sorted now.
4679 P->setNodeId(DAGSize++);
4681 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4684 // Update P's outstanding operand count.
4685 P->setNodeId(Degree);
4690 assert(SortedPos == AllNodes.end() &&
4691 "Topological sort incomplete!");
4692 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4693 "First node in topological sort is not the entry token!");
4694 assert(AllNodes.front().getNodeId() == 0 &&
4695 "First node in topological sort has non-zero id!");
4696 assert(AllNodes.front().getNumOperands() == 0 &&
4697 "First node in topological sort has operands!");
4698 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4699 "Last node in topologic sort has unexpected id!");
4700 assert(AllNodes.back().use_empty() &&
4701 "Last node in topologic sort has users!");
4702 assert(DAGSize == allnodes_size() && "TopOrder result count mismatch!");
4708 //===----------------------------------------------------------------------===//
4710 //===----------------------------------------------------------------------===//
4712 // Out-of-line virtual method to give class a home.
4713 void SDNode::ANCHOR() {}
4714 void UnarySDNode::ANCHOR() {}
4715 void BinarySDNode::ANCHOR() {}
4716 void TernarySDNode::ANCHOR() {}
4717 void HandleSDNode::ANCHOR() {}
4718 void ConstantSDNode::ANCHOR() {}
4719 void ConstantFPSDNode::ANCHOR() {}
4720 void GlobalAddressSDNode::ANCHOR() {}
4721 void FrameIndexSDNode::ANCHOR() {}
4722 void JumpTableSDNode::ANCHOR() {}
4723 void ConstantPoolSDNode::ANCHOR() {}
4724 void BasicBlockSDNode::ANCHOR() {}
4725 void SrcValueSDNode::ANCHOR() {}
4726 void MemOperandSDNode::ANCHOR() {}
4727 void RegisterSDNode::ANCHOR() {}
4728 void DbgStopPointSDNode::ANCHOR() {}
4729 void LabelSDNode::ANCHOR() {}
4730 void ExternalSymbolSDNode::ANCHOR() {}
4731 void CondCodeSDNode::ANCHOR() {}
4732 void ARG_FLAGSSDNode::ANCHOR() {}
4733 void VTSDNode::ANCHOR() {}
4734 void MemSDNode::ANCHOR() {}
4735 void LoadSDNode::ANCHOR() {}
4736 void StoreSDNode::ANCHOR() {}
4737 void AtomicSDNode::ANCHOR() {}
4738 void MemIntrinsicSDNode::ANCHOR() {}
4739 void CallSDNode::ANCHOR() {}
4741 HandleSDNode::~HandleSDNode() {
4745 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4747 : SDNode(isa<GlobalVariable>(GA) &&
4748 cast<GlobalVariable>(GA)->isThreadLocal() ?
4750 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4752 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4753 getSDVTList(VT)), Offset(o) {
4754 TheGlobal = const_cast<GlobalValue*>(GA);
4757 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4758 const Value *srcValue, int SVO,
4759 unsigned alignment, bool vol)
4760 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4761 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4763 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4764 assert(getAlignment() == alignment && "Alignment representation error!");
4765 assert(isVolatile() == vol && "Volatile representation error!");
4768 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4769 unsigned NumOps, MVT memvt, const Value *srcValue,
4770 int SVO, unsigned alignment, bool vol)
4771 : SDNode(Opc, VTs, Ops, NumOps),
4772 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4773 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4774 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4775 assert(getAlignment() == alignment && "Alignment representation error!");
4776 assert(isVolatile() == vol && "Volatile representation error!");
4779 /// getMemOperand - Return a MachineMemOperand object describing the memory
4780 /// reference performed by this memory reference.
4781 MachineMemOperand MemSDNode::getMemOperand() const {
4783 if (isa<LoadSDNode>(this))
4784 Flags = MachineMemOperand::MOLoad;
4785 else if (isa<StoreSDNode>(this))
4786 Flags = MachineMemOperand::MOStore;
4787 else if (isa<AtomicSDNode>(this)) {
4788 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4791 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4792 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4793 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4794 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4797 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4798 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4800 // Check if the memory reference references a frame index
4801 const FrameIndexSDNode *FI =
4802 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4803 if (!getSrcValue() && FI)
4804 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4805 Flags, 0, Size, getAlignment());
4807 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4808 Size, getAlignment());
4811 /// Profile - Gather unique data for the node.
4813 void SDNode::Profile(FoldingSetNodeID &ID) const {
4814 AddNodeIDNode(ID, this);
4817 /// getValueTypeList - Return a pointer to the specified value type.
4819 const MVT *SDNode::getValueTypeList(MVT VT) {
4820 if (VT.isExtended()) {
4821 static std::set<MVT, MVT::compareRawBits> EVTs;
4822 return &(*EVTs.insert(VT).first);
4824 static MVT VTs[MVT::LAST_VALUETYPE];
4825 VTs[VT.getSimpleVT()] = VT;
4826 return &VTs[VT.getSimpleVT()];
4830 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4831 /// indicated value. This method ignores uses of other values defined by this
4833 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4834 assert(Value < getNumValues() && "Bad value!");
4836 // TODO: Only iterate over uses of a given value of the node
4837 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4838 if (UI.getUse().getSDValue().getResNo() == Value) {
4845 // Found exactly the right number of uses?
4850 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4851 /// value. This method ignores uses of other values defined by this operation.
4852 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4853 assert(Value < getNumValues() && "Bad value!");
4855 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4856 if (UI.getUse().getSDValue().getResNo() == Value)
4863 /// isOnlyUserOf - Return true if this node is the only use of N.
4865 bool SDNode::isOnlyUserOf(SDNode *N) const {
4867 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4878 /// isOperand - Return true if this node is an operand of N.
4880 bool SDValue::isOperandOf(SDNode *N) const {
4881 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4882 if (*this == N->getOperand(i))
4887 bool SDNode::isOperandOf(SDNode *N) const {
4888 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4889 if (this == N->OperandList[i].getVal())
4894 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4895 /// be a chain) reaches the specified operand without crossing any
4896 /// side-effecting instructions. In practice, this looks through token
4897 /// factors and non-volatile loads. In order to remain efficient, this only
4898 /// looks a couple of nodes in, it does not do an exhaustive search.
4899 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4900 unsigned Depth) const {
4901 if (*this == Dest) return true;
4903 // Don't search too deeply, we just want to be able to see through
4904 // TokenFactor's etc.
4905 if (Depth == 0) return false;
4907 // If this is a token factor, all inputs to the TF happen in parallel. If any
4908 // of the operands of the TF reach dest, then we can do the xform.
4909 if (getOpcode() == ISD::TokenFactor) {
4910 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4911 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4916 // Loads don't have side effects, look through them.
4917 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4918 if (!Ld->isVolatile())
4919 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4925 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4926 SmallPtrSet<SDNode *, 32> &Visited) {
4927 if (found || !Visited.insert(N))
4930 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4931 SDNode *Op = N->getOperand(i).getNode();
4936 findPredecessor(Op, P, found, Visited);
4940 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4941 /// is either an operand of N or it can be reached by recursively traversing
4942 /// up the operands.
4943 /// NOTE: this is an expensive method. Use it carefully.
4944 bool SDNode::isPredecessorOf(SDNode *N) const {
4945 SmallPtrSet<SDNode *, 32> Visited;
4947 findPredecessor(N, this, found, Visited);
4951 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4952 assert(Num < NumOperands && "Invalid child # of SDNode!");
4953 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4956 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4957 switch (getOpcode()) {
4959 if (getOpcode() < ISD::BUILTIN_OP_END)
4960 return "<<Unknown DAG Node>>";
4961 if (isMachineOpcode()) {
4963 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4964 if (getMachineOpcode() < TII->getNumOpcodes())
4965 return TII->get(getMachineOpcode()).getName();
4966 return "<<Unknown Machine Node>>";
4969 TargetLowering &TLI = G->getTargetLoweringInfo();
4970 const char *Name = TLI.getTargetNodeName(getOpcode());
4971 if (Name) return Name;
4972 return "<<Unknown Target Node>>";
4974 return "<<Unknown Node>>";
4977 case ISD::DELETED_NODE:
4978 return "<<Deleted Node!>>";
4980 case ISD::PREFETCH: return "Prefetch";
4981 case ISD::MEMBARRIER: return "MemBarrier";
4982 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8";
4983 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8";
4984 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8";
4985 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8";
4986 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8";
4987 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8";
4988 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8";
4989 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8";
4990 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8";
4991 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8";
4992 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8";
4993 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8";
4994 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16";
4995 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16";
4996 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16";
4997 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16";
4998 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16";
4999 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16";
5000 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16";
5001 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16";
5002 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16";
5003 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16";
5004 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16";
5005 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16";
5006 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32";
5007 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32";
5008 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32";
5009 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32";
5010 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32";
5011 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32";
5012 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32";
5013 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32";
5014 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32";
5015 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32";
5016 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32";
5017 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32";
5018 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64";
5019 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64";
5020 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64";
5021 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64";
5022 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64";
5023 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64";
5024 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64";
5025 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64";
5026 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64";
5027 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64";
5028 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64";
5029 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64";
5030 case ISD::PCMARKER: return "PCMarker";
5031 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5032 case ISD::SRCVALUE: return "SrcValue";
5033 case ISD::MEMOPERAND: return "MemOperand";
5034 case ISD::EntryToken: return "EntryToken";
5035 case ISD::TokenFactor: return "TokenFactor";
5036 case ISD::AssertSext: return "AssertSext";
5037 case ISD::AssertZext: return "AssertZext";
5039 case ISD::BasicBlock: return "BasicBlock";
5040 case ISD::ARG_FLAGS: return "ArgFlags";
5041 case ISD::VALUETYPE: return "ValueType";
5042 case ISD::Register: return "Register";
5044 case ISD::Constant: return "Constant";
5045 case ISD::ConstantFP: return "ConstantFP";
5046 case ISD::GlobalAddress: return "GlobalAddress";
5047 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5048 case ISD::FrameIndex: return "FrameIndex";
5049 case ISD::JumpTable: return "JumpTable";
5050 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5051 case ISD::RETURNADDR: return "RETURNADDR";
5052 case ISD::FRAMEADDR: return "FRAMEADDR";
5053 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5054 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5055 case ISD::EHSELECTION: return "EHSELECTION";
5056 case ISD::EH_RETURN: return "EH_RETURN";
5057 case ISD::ConstantPool: return "ConstantPool";
5058 case ISD::ExternalSymbol: return "ExternalSymbol";
5059 case ISD::INTRINSIC_WO_CHAIN: {
5060 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5061 return Intrinsic::getName((Intrinsic::ID)IID);
5063 case ISD::INTRINSIC_VOID:
5064 case ISD::INTRINSIC_W_CHAIN: {
5065 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5066 return Intrinsic::getName((Intrinsic::ID)IID);
5069 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5070 case ISD::TargetConstant: return "TargetConstant";
5071 case ISD::TargetConstantFP:return "TargetConstantFP";
5072 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5073 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5074 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5075 case ISD::TargetJumpTable: return "TargetJumpTable";
5076 case ISD::TargetConstantPool: return "TargetConstantPool";
5077 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5079 case ISD::CopyToReg: return "CopyToReg";
5080 case ISD::CopyFromReg: return "CopyFromReg";
5081 case ISD::UNDEF: return "undef";
5082 case ISD::MERGE_VALUES: return "merge_values";
5083 case ISD::INLINEASM: return "inlineasm";
5084 case ISD::DBG_LABEL: return "dbg_label";
5085 case ISD::EH_LABEL: return "eh_label";
5086 case ISD::DECLARE: return "declare";
5087 case ISD::HANDLENODE: return "handlenode";
5088 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5089 case ISD::CALL: return "call";
5092 case ISD::FABS: return "fabs";
5093 case ISD::FNEG: return "fneg";
5094 case ISD::FSQRT: return "fsqrt";
5095 case ISD::FSIN: return "fsin";
5096 case ISD::FCOS: return "fcos";
5097 case ISD::FPOWI: return "fpowi";
5098 case ISD::FPOW: return "fpow";
5099 case ISD::FTRUNC: return "ftrunc";
5100 case ISD::FFLOOR: return "ffloor";
5101 case ISD::FCEIL: return "fceil";
5102 case ISD::FRINT: return "frint";
5103 case ISD::FNEARBYINT: return "fnearbyint";
5106 case ISD::ADD: return "add";
5107 case ISD::SUB: return "sub";
5108 case ISD::MUL: return "mul";
5109 case ISD::MULHU: return "mulhu";
5110 case ISD::MULHS: return "mulhs";
5111 case ISD::SDIV: return "sdiv";
5112 case ISD::UDIV: return "udiv";
5113 case ISD::SREM: return "srem";
5114 case ISD::UREM: return "urem";
5115 case ISD::SMUL_LOHI: return "smul_lohi";
5116 case ISD::UMUL_LOHI: return "umul_lohi";
5117 case ISD::SDIVREM: return "sdivrem";
5118 case ISD::UDIVREM: return "udivrem";
5119 case ISD::AND: return "and";
5120 case ISD::OR: return "or";
5121 case ISD::XOR: return "xor";
5122 case ISD::SHL: return "shl";
5123 case ISD::SRA: return "sra";
5124 case ISD::SRL: return "srl";
5125 case ISD::ROTL: return "rotl";
5126 case ISD::ROTR: return "rotr";
5127 case ISD::FADD: return "fadd";
5128 case ISD::FSUB: return "fsub";
5129 case ISD::FMUL: return "fmul";
5130 case ISD::FDIV: return "fdiv";
5131 case ISD::FREM: return "frem";
5132 case ISD::FCOPYSIGN: return "fcopysign";
5133 case ISD::FGETSIGN: return "fgetsign";
5135 case ISD::SETCC: return "setcc";
5136 case ISD::VSETCC: return "vsetcc";
5137 case ISD::SELECT: return "select";
5138 case ISD::SELECT_CC: return "select_cc";
5139 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5140 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5141 case ISD::CONCAT_VECTORS: return "concat_vectors";
5142 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5143 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5144 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5145 case ISD::CARRY_FALSE: return "carry_false";
5146 case ISD::ADDC: return "addc";
5147 case ISD::ADDE: return "adde";
5148 case ISD::SUBC: return "subc";
5149 case ISD::SUBE: return "sube";
5150 case ISD::SHL_PARTS: return "shl_parts";
5151 case ISD::SRA_PARTS: return "sra_parts";
5152 case ISD::SRL_PARTS: return "srl_parts";
5154 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5155 case ISD::INSERT_SUBREG: return "insert_subreg";
5157 // Conversion operators.
5158 case ISD::SIGN_EXTEND: return "sign_extend";
5159 case ISD::ZERO_EXTEND: return "zero_extend";
5160 case ISD::ANY_EXTEND: return "any_extend";
5161 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5162 case ISD::TRUNCATE: return "truncate";
5163 case ISD::FP_ROUND: return "fp_round";
5164 case ISD::FLT_ROUNDS_: return "flt_rounds";
5165 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5166 case ISD::FP_EXTEND: return "fp_extend";
5168 case ISD::SINT_TO_FP: return "sint_to_fp";
5169 case ISD::UINT_TO_FP: return "uint_to_fp";
5170 case ISD::FP_TO_SINT: return "fp_to_sint";
5171 case ISD::FP_TO_UINT: return "fp_to_uint";
5172 case ISD::BIT_CONVERT: return "bit_convert";
5174 // Control flow instructions
5175 case ISD::BR: return "br";
5176 case ISD::BRIND: return "brind";
5177 case ISD::BR_JT: return "br_jt";
5178 case ISD::BRCOND: return "brcond";
5179 case ISD::BR_CC: return "br_cc";
5180 case ISD::RET: return "ret";
5181 case ISD::CALLSEQ_START: return "callseq_start";
5182 case ISD::CALLSEQ_END: return "callseq_end";
5185 case ISD::LOAD: return "load";
5186 case ISD::STORE: return "store";
5187 case ISD::VAARG: return "vaarg";
5188 case ISD::VACOPY: return "vacopy";
5189 case ISD::VAEND: return "vaend";
5190 case ISD::VASTART: return "vastart";
5191 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5192 case ISD::EXTRACT_ELEMENT: return "extract_element";
5193 case ISD::BUILD_PAIR: return "build_pair";
5194 case ISD::STACKSAVE: return "stacksave";
5195 case ISD::STACKRESTORE: return "stackrestore";
5196 case ISD::TRAP: return "trap";
5199 case ISD::BSWAP: return "bswap";
5200 case ISD::CTPOP: return "ctpop";
5201 case ISD::CTTZ: return "cttz";
5202 case ISD::CTLZ: return "ctlz";
5205 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5206 case ISD::DEBUG_LOC: return "debug_loc";
5209 case ISD::TRAMPOLINE: return "trampoline";
5212 switch (cast<CondCodeSDNode>(this)->get()) {
5213 default: assert(0 && "Unknown setcc condition!");
5214 case ISD::SETOEQ: return "setoeq";
5215 case ISD::SETOGT: return "setogt";
5216 case ISD::SETOGE: return "setoge";
5217 case ISD::SETOLT: return "setolt";
5218 case ISD::SETOLE: return "setole";
5219 case ISD::SETONE: return "setone";
5221 case ISD::SETO: return "seto";
5222 case ISD::SETUO: return "setuo";
5223 case ISD::SETUEQ: return "setue";
5224 case ISD::SETUGT: return "setugt";
5225 case ISD::SETUGE: return "setuge";
5226 case ISD::SETULT: return "setult";
5227 case ISD::SETULE: return "setule";
5228 case ISD::SETUNE: return "setune";
5230 case ISD::SETEQ: return "seteq";
5231 case ISD::SETGT: return "setgt";
5232 case ISD::SETGE: return "setge";
5233 case ISD::SETLT: return "setlt";
5234 case ISD::SETLE: return "setle";
5235 case ISD::SETNE: return "setne";
5240 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5249 return "<post-inc>";
5251 return "<post-dec>";
5255 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5256 std::string S = "< ";
5270 if (getByValAlign())
5271 S += "byval-align:" + utostr(getByValAlign()) + " ";
5273 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5275 S += "byval-size:" + utostr(getByValSize()) + " ";
5279 void SDNode::dump() const { dump(0); }
5280 void SDNode::dump(const SelectionDAG *G) const {
5285 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5286 OS << (void*)this << ": ";
5288 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5290 if (getValueType(i) == MVT::Other)
5293 OS << getValueType(i).getMVTString();
5295 OS << " = " << getOperationName(G);
5298 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5300 OS << (void*)getOperand(i).getNode();
5301 if (unsigned RN = getOperand(i).getResNo())
5305 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5306 SDNode *Mask = getOperand(2).getNode();
5308 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5310 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5313 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5318 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5319 OS << '<' << CSDN->getAPIntValue() << '>';
5320 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5321 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5322 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5323 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5324 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5327 CSDN->getValueAPF().bitcastToAPInt().dump();
5330 } else if (const GlobalAddressSDNode *GADN =
5331 dyn_cast<GlobalAddressSDNode>(this)) {
5332 int64_t offset = GADN->getOffset();
5334 WriteAsOperand(OS, GADN->getGlobal());
5337 OS << " + " << offset;
5339 OS << " " << offset;
5340 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5341 OS << "<" << FIDN->getIndex() << ">";
5342 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5343 OS << "<" << JTDN->getIndex() << ">";
5344 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5345 int offset = CP->getOffset();
5346 if (CP->isMachineConstantPoolEntry())
5347 OS << "<" << *CP->getMachineCPVal() << ">";
5349 OS << "<" << *CP->getConstVal() << ">";
5351 OS << " + " << offset;
5353 OS << " " << offset;
5354 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5356 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5358 OS << LBB->getName() << " ";
5359 OS << (const void*)BBDN->getBasicBlock() << ">";
5360 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5361 if (G && R->getReg() &&
5362 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5363 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5365 OS << " #" << R->getReg();
5367 } else if (const ExternalSymbolSDNode *ES =
5368 dyn_cast<ExternalSymbolSDNode>(this)) {
5369 OS << "'" << ES->getSymbol() << "'";
5370 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5372 OS << "<" << M->getValue() << ">";
5375 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5376 if (M->MO.getValue())
5377 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5379 OS << "<null:" << M->MO.getOffset() << ">";
5380 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5381 OS << N->getArgFlags().getArgFlagsString();
5382 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5383 OS << ":" << N->getVT().getMVTString();
5385 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5386 const Value *SrcValue = LD->getSrcValue();
5387 int SrcOffset = LD->getSrcValueOffset();
5393 OS << ":" << SrcOffset << ">";
5396 switch (LD->getExtensionType()) {
5397 default: doExt = false; break;
5398 case ISD::EXTLOAD: OS << " <anyext "; break;
5399 case ISD::SEXTLOAD: OS << " <sext "; break;
5400 case ISD::ZEXTLOAD: OS << " <zext "; break;
5403 OS << LD->getMemoryVT().getMVTString() << ">";
5405 const char *AM = getIndexedModeName(LD->getAddressingMode());
5408 if (LD->isVolatile())
5409 OS << " <volatile>";
5410 OS << " alignment=" << LD->getAlignment();
5411 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5412 const Value *SrcValue = ST->getSrcValue();
5413 int SrcOffset = ST->getSrcValueOffset();
5419 OS << ":" << SrcOffset << ">";
5421 if (ST->isTruncatingStore())
5422 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5424 const char *AM = getIndexedModeName(ST->getAddressingMode());
5427 if (ST->isVolatile())
5428 OS << " <volatile>";
5429 OS << " alignment=" << ST->getAlignment();
5430 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5431 const Value *SrcValue = AT->getSrcValue();
5432 int SrcOffset = AT->getSrcValueOffset();
5438 OS << ":" << SrcOffset << ">";
5439 if (AT->isVolatile())
5440 OS << " <volatile>";
5441 OS << " alignment=" << AT->getAlignment();
5445 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5446 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5447 if (N->getOperand(i).getNode()->hasOneUse())
5448 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5450 cerr << "\n" << std::string(indent+2, ' ')
5451 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5454 cerr << "\n" << std::string(indent, ' ');
5458 void SelectionDAG::dump() const {
5459 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5461 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5463 const SDNode *N = I;
5464 if (!N->hasOneUse() && N != getRoot().getNode())
5465 DumpNodes(N, 2, this);
5468 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5473 const Type *ConstantPoolSDNode::getType() const {
5474 if (isMachineConstantPoolEntry())
5475 return Val.MachineCPVal->getType();
5476 return Val.ConstVal->getType();