1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "llvm/Constants.h"
17 #include "llvm/Analysis/ValueTracking.h"
18 #include "llvm/Function.h"
19 #include "llvm/GlobalAlias.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Intrinsics.h"
22 #include "llvm/DerivedTypes.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetIntrinsicInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/System/Mutex.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallPtrSet.h"
47 #include "llvm/ADT/SmallSet.h"
48 #include "llvm/ADT/SmallVector.h"
49 #include "llvm/ADT/StringExtras.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
62 switch (VT.getSimpleVT().SimpleTy) {
63 default: llvm_unreachable("Unknown FP format");
64 case MVT::f32: return &APFloat::IEEEsingle;
65 case MVT::f64: return &APFloat::IEEEdouble;
66 case MVT::f80: return &APFloat::x87DoubleExtended;
67 case MVT::f128: return &APFloat::IEEEquad;
68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
72 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
74 //===----------------------------------------------------------------------===//
75 // ConstantFPSDNode Class
76 //===----------------------------------------------------------------------===//
78 /// isExactlyValue - We don't rely on operator== working on double values, as
79 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
80 /// As such, this method can be used to do an exact bit-for-bit comparison of
81 /// two floating point values.
82 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
83 return getValueAPF().bitwiseIsEqual(V);
86 bool ConstantFPSDNode::isValueValidForType(EVT VT,
88 assert(VT.isFloatingPoint() && "Can only convert between FP types");
90 // PPC long double cannot be converted to any other type.
91 if (VT == MVT::ppcf128 ||
92 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BIT_CONVERT)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
127 SDValue NotZero = N->getOperand(i);
128 if (isa<ConstantSDNode>(NotZero)) {
129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
131 } else if (isa<ConstantFPSDNode>(NotZero)) {
132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
133 bitcastToAPInt().isAllOnesValue())
138 // Okay, we have at least one ~0 value, check to see if the rest match or are
140 for (++i; i != e; ++i)
141 if (N->getOperand(i) != NotZero &&
142 N->getOperand(i).getOpcode() != ISD::UNDEF)
148 /// isBuildVectorAllZeros - Return true if the specified node is a
149 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
151 // Look through a bit convert.
152 if (N->getOpcode() == ISD::BIT_CONVERT)
153 N = N->getOperand(0).getNode();
155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
157 unsigned i = 0, e = N->getNumOperands();
159 // Skip over all of the undef values.
160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163 // Do not accept an all-undef vector.
164 if (i == e) return false;
166 // Do not accept build_vectors that aren't all constants or which have non-0
168 SDValue Zero = N->getOperand(i);
169 if (isa<ConstantSDNode>(Zero)) {
170 if (!cast<ConstantSDNode>(Zero)->isNullValue())
172 } else if (isa<ConstantFPSDNode>(Zero)) {
173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
178 // Okay, we have at least one 0 value, check to see if the rest match or are
180 for (++i; i != e; ++i)
181 if (N->getOperand(i) != Zero &&
182 N->getOperand(i).getOpcode() != ISD::UNDEF)
187 /// isScalarToVector - Return true if the specified node is a
188 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 /// element is not an undef.
190 bool ISD::isScalarToVector(const SDNode *N) {
191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194 if (N->getOpcode() != ISD::BUILD_VECTOR)
196 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
198 unsigned NumElems = N->getNumOperands();
199 for (unsigned i = 1; i < NumElems; ++i) {
200 SDValue V = N->getOperand(i);
201 if (V.getOpcode() != ISD::UNDEF)
207 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
208 /// when given the operation for (X op Y).
209 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
210 // To perform this operation, we just need to swap the L and G bits of the
212 unsigned OldL = (Operation >> 2) & 1;
213 unsigned OldG = (Operation >> 1) & 1;
214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
215 (OldL << 1) | // New G bit
216 (OldG << 2)); // New L bit.
219 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
220 /// 'op' is a valid SetCC operation.
221 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
222 unsigned Operation = Op;
224 Operation ^= 7; // Flip L, G, E bits, but not U.
226 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: llvm_unreachable("Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return MF->getTarget();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, temporalness, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
476 bool isNonTemporal) {
477 assert((ConvType & 3) == ConvType &&
478 "ConvType may not require more than 2 bits!");
479 assert((AM & 7) == AM &&
480 "AM may not require more than 3 bits!");
484 (isNonTemporal << 6);
487 //===----------------------------------------------------------------------===//
488 // SelectionDAG Class
489 //===----------------------------------------------------------------------===//
491 /// doNotCSE - Return true if CSE should not be performed for this node.
492 static bool doNotCSE(SDNode *N) {
493 if (N->getValueType(0) == MVT::Flag)
494 return true; // Never CSE anything that produces a flag.
496 switch (N->getOpcode()) {
498 case ISD::HANDLENODE:
500 return true; // Never CSE these nodes.
503 // Check that remaining values produced are not flags.
504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
505 if (N->getValueType(i) == MVT::Flag)
506 return true; // Never CSE anything that produces a flag.
511 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
513 void SelectionDAG::RemoveDeadNodes() {
514 // Create a dummy node (which is not added to allnodes), that adds a reference
515 // to the root node, preventing it from being deleted.
516 HandleSDNode Dummy(getRoot());
518 SmallVector<SDNode*, 128> DeadNodes;
520 // Add all obviously-dead nodes to the DeadNodes worklist.
521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
523 DeadNodes.push_back(I);
525 RemoveDeadNodes(DeadNodes);
527 // If the root changed (e.g. it was a dead load, update the root).
528 setRoot(Dummy.getValue());
531 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
532 /// given list, and any nodes that become unreachable as a result.
533 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
534 DAGUpdateListener *UpdateListener) {
536 // Process the worklist, deleting the nodes and adding their uses to the
538 while (!DeadNodes.empty()) {
539 SDNode *N = DeadNodes.pop_back_val();
542 UpdateListener->NodeDeleted(N, 0);
544 // Take the node out of the appropriate CSE map.
545 RemoveNodeFromCSEMaps(N);
547 // Next, brutally remove the operand list. This is safe to do, as there are
548 // no cycles in the graph.
549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
551 SDNode *Operand = Use.getNode();
554 // Now that we removed this operand, see if there are no uses of it left.
555 if (Operand->use_empty())
556 DeadNodes.push_back(Operand);
563 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
564 SmallVector<SDNode*, 16> DeadNodes(1, N);
565 RemoveDeadNodes(DeadNodes, UpdateListener);
568 void SelectionDAG::DeleteNode(SDNode *N) {
569 // First take this out of the appropriate CSE map.
570 RemoveNodeFromCSEMaps(N);
572 // Finally, remove uses due to operands of this node, remove from the
573 // AllNodes list, and delete the node.
574 DeleteNodeNotInCSEMaps(N);
577 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
578 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
579 assert(N->use_empty() && "Cannot delete a node that is not dead!");
581 // Drop all of the operands and decrement used node's use counts.
587 void SelectionDAG::DeallocateNode(SDNode *N) {
588 if (N->OperandsNeedDelete)
589 delete[] N->OperandList;
591 // Set the opcode to DELETED_NODE to help catch bugs when node
592 // memory is reallocated.
593 N->NodeType = ISD::DELETED_NODE;
595 NodeAllocator.Deallocate(AllNodes.remove(N));
597 // Remove the ordering of this node.
601 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
602 /// correspond to it. This is useful when we're about to delete or repurpose
603 /// the node. We don't want future request for structurally identical nodes
604 /// to return N anymore.
605 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
607 switch (N->getOpcode()) {
608 case ISD::EntryToken:
609 llvm_unreachable("EntryToken should not be in CSEMaps!");
611 case ISD::HANDLENODE: return false; // noop.
613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
614 "Cond code doesn't exist!");
615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
618 case ISD::ExternalSymbol:
619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
621 case ISD::TargetExternalSymbol: {
622 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
623 Erased = TargetExternalSymbols.erase(
624 std::pair<std::string,unsigned char>(ESN->getSymbol(),
625 ESN->getTargetFlags()));
628 case ISD::VALUETYPE: {
629 EVT VT = cast<VTSDNode>(N)->getVT();
630 if (VT.isExtended()) {
631 Erased = ExtendedValueTypeNodes.erase(VT);
633 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
634 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
639 // Remove it from the CSE Map.
640 Erased = CSEMap.RemoveNode(N);
644 // Verify that the node was actually in one of the CSE maps, unless it has a
645 // flag result (which cannot be CSE'd) or is one of the special cases that are
646 // not subject to CSE.
647 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
648 !N->isMachineOpcode() && !doNotCSE(N)) {
651 llvm_unreachable("Node is not in map!");
657 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
658 /// maps and modified in place. Add it back to the CSE maps, unless an identical
659 /// node already exists, in which case transfer all its users to the existing
660 /// node. This transfer can potentially trigger recursive merging.
663 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
664 DAGUpdateListener *UpdateListener) {
665 // For node types that aren't CSE'd, just act as if no identical node
668 SDNode *Existing = CSEMap.GetOrInsertNode(N);
670 // If there was already an existing matching node, use ReplaceAllUsesWith
671 // to replace the dead one with the existing one. This can cause
672 // recursive merging of other unrelated nodes down the line.
673 ReplaceAllUsesWith(N, Existing, UpdateListener);
675 // N is now dead. Inform the listener if it exists and delete it.
677 UpdateListener->NodeDeleted(N, Existing);
678 DeleteNodeNotInCSEMaps(N);
683 // If the node doesn't already exist, we updated it. Inform a listener if
686 UpdateListener->NodeUpdated(N);
689 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
690 /// were replaced with those specified. If this node is never memoized,
691 /// return null, otherwise return a pointer to the slot it would take. If a
692 /// node already exists with these operands, the slot will be non-null.
693 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
698 SDValue Ops[] = { Op };
700 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
701 AddNodeIDCustom(ID, N);
702 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
706 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
707 /// were replaced with those specified. If this node is never memoized,
708 /// return null, otherwise return a pointer to the slot it would take. If a
709 /// node already exists with these operands, the slot will be non-null.
710 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
711 SDValue Op1, SDValue Op2,
716 SDValue Ops[] = { Op1, Op2 };
718 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
719 AddNodeIDCustom(ID, N);
720 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
742 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
743 void SelectionDAG::VerifyNode(SDNode *N) {
744 switch (N->getOpcode()) {
747 case ISD::BUILD_PAIR: {
748 EVT VT = N->getValueType(0);
749 assert(N->getNumValues() == 1 && "Too many results!");
750 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
751 "Wrong return type!");
752 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
753 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
754 "Mismatched operand types!");
755 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
756 "Wrong operand type!");
757 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
758 "Wrong return type size");
761 case ISD::BUILD_VECTOR: {
762 assert(N->getNumValues() == 1 && "Too many results!");
763 assert(N->getValueType(0).isVector() && "Wrong return type!");
764 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
765 "Wrong number of operands!");
766 EVT EltVT = N->getValueType(0).getVectorElementType();
767 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
768 assert((I->getValueType() == EltVT ||
769 (EltVT.isInteger() && I->getValueType().isInteger() &&
770 EltVT.bitsLE(I->getValueType()))) &&
771 "Wrong operand type!");
777 /// getEVTAlignment - Compute the default alignment value for the
780 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
781 const Type *Ty = VT == MVT::iPTR ?
782 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
783 VT.getTypeForEVT(*getContext());
785 return TLI.getTargetData()->getABITypeAlignment(Ty);
788 // EntryNode could meaningfully have debug info if we can find it...
789 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
790 : TLI(tli), FLI(fli), DW(0),
791 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
792 getVTList(MVT::Other)),
793 Root(getEntryNode()), Ordering(0) {
794 AllNodes.push_back(&EntryNode);
795 Ordering = new SDNodeOrdering();
798 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
803 Context = &mf.getFunction()->getContext();
806 SelectionDAG::~SelectionDAG() {
811 void SelectionDAG::allnodes_clear() {
812 assert(&*AllNodes.begin() == &EntryNode);
813 AllNodes.remove(AllNodes.begin());
814 while (!AllNodes.empty())
815 DeallocateNode(AllNodes.begin());
818 void SelectionDAG::clear() {
820 OperandAllocator.Reset();
823 ExtendedValueTypeNodes.clear();
824 ExternalSymbols.clear();
825 TargetExternalSymbols.clear();
826 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
827 static_cast<CondCodeSDNode*>(0));
828 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
829 static_cast<SDNode*>(0));
831 EntryNode.UseList = 0;
832 AllNodes.push_back(&EntryNode);
833 Root = getEntryNode();
835 Ordering = new SDNodeOrdering();
838 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
839 return VT.bitsGT(Op.getValueType()) ?
840 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
841 getNode(ISD::TRUNCATE, DL, VT, Op);
844 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
845 return VT.bitsGT(Op.getValueType()) ?
846 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
847 getNode(ISD::TRUNCATE, DL, VT, Op);
850 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
851 assert(!VT.isVector() &&
852 "getZeroExtendInReg should use the vector element type instead of "
854 if (Op.getValueType() == VT) return Op;
855 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
856 APInt Imm = APInt::getLowBitsSet(BitWidth,
858 return getNode(ISD::AND, DL, Op.getValueType(), Op,
859 getConstant(Imm, Op.getValueType()));
862 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
864 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
865 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
867 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
868 return getNode(ISD::XOR, DL, VT, Val, NegOne);
871 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
872 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
873 assert((EltVT.getSizeInBits() >= 64 ||
874 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
875 "getConstant with a uint64_t value that doesn't fit in the type!");
876 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
879 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
880 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
883 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
884 assert(VT.isInteger() && "Cannot create FP integer constant!");
886 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
887 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
888 "APInt size does not match type size!");
890 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
892 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
896 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
898 return SDValue(N, 0);
901 N = NodeAllocator.Allocate<ConstantSDNode>();
902 new (N) ConstantSDNode(isT, &Val, EltVT);
903 CSEMap.InsertNode(N, IP);
904 AllNodes.push_back(N);
907 SDValue Result(N, 0);
909 SmallVector<SDValue, 8> Ops;
910 Ops.assign(VT.getVectorNumElements(), Result);
911 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
912 VT, &Ops[0], Ops.size());
917 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
918 return getConstant(Val, TLI.getPointerTy(), isTarget);
922 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
926 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
930 VT.isVector() ? VT.getVectorElementType() : VT;
932 // Do the map lookup using the actual bit pattern for the floating point
933 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
934 // we don't have issues with SNANs.
935 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
937 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
941 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
943 return SDValue(N, 0);
946 N = NodeAllocator.Allocate<ConstantFPSDNode>();
947 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
948 CSEMap.InsertNode(N, IP);
949 AllNodes.push_back(N);
952 SDValue Result(N, 0);
954 SmallVector<SDValue, 8> Ops;
955 Ops.assign(VT.getVectorNumElements(), Result);
956 // FIXME DebugLoc info might be appropriate here
957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
958 VT, &Ops[0], Ops.size());
963 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
965 VT.isVector() ? VT.getVectorElementType() : VT;
967 return getConstantFP(APFloat((float)Val), VT, isTarget);
969 return getConstantFP(APFloat(Val), VT, isTarget);
972 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
973 EVT VT, int64_t Offset,
975 unsigned char TargetFlags) {
976 assert((TargetFlags == 0 || isTargetGA) &&
977 "Cannot set target flags on target-independent globals");
979 // Truncate (with sign-extension) the offset value to the pointer size.
980 EVT PTy = TLI.getPointerTy();
981 unsigned BitWidth = PTy.getSizeInBits();
983 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
985 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
987 // If GV is an alias then use the aliasee for determining thread-localness.
988 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
989 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
993 if (GVar && GVar->isThreadLocal())
994 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
996 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1001 ID.AddInteger(Offset);
1002 ID.AddInteger(TargetFlags);
1004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1005 return SDValue(E, 0);
1007 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1008 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1009 CSEMap.InsertNode(N, IP);
1010 AllNodes.push_back(N);
1011 return SDValue(N, 0);
1014 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1015 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1016 FoldingSetNodeID ID;
1017 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1021 return SDValue(E, 0);
1023 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1024 new (N) FrameIndexSDNode(FI, VT, isTarget);
1025 CSEMap.InsertNode(N, IP);
1026 AllNodes.push_back(N);
1027 return SDValue(N, 0);
1030 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1031 unsigned char TargetFlags) {
1032 assert((TargetFlags == 0 || isTarget) &&
1033 "Cannot set target flags on target-independent jump tables");
1034 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1035 FoldingSetNodeID ID;
1036 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1038 ID.AddInteger(TargetFlags);
1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1041 return SDValue(E, 0);
1043 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1044 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1045 CSEMap.InsertNode(N, IP);
1046 AllNodes.push_back(N);
1047 return SDValue(N, 0);
1050 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1051 unsigned Alignment, int Offset,
1053 unsigned char TargetFlags) {
1054 assert((TargetFlags == 0 || isTarget) &&
1055 "Cannot set target flags on target-independent globals");
1057 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1058 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1059 FoldingSetNodeID ID;
1060 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1061 ID.AddInteger(Alignment);
1062 ID.AddInteger(Offset);
1064 ID.AddInteger(TargetFlags);
1066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1067 return SDValue(E, 0);
1069 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1070 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1077 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1078 unsigned Alignment, int Offset,
1080 unsigned char TargetFlags) {
1081 assert((TargetFlags == 0 || isTarget) &&
1082 "Cannot set target flags on target-independent globals");
1084 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1085 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1086 FoldingSetNodeID ID;
1087 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1088 ID.AddInteger(Alignment);
1089 ID.AddInteger(Offset);
1090 C->AddSelectionDAGCSEId(ID);
1091 ID.AddInteger(TargetFlags);
1093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1094 return SDValue(E, 0);
1096 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1097 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1098 CSEMap.InsertNode(N, IP);
1099 AllNodes.push_back(N);
1100 return SDValue(N, 0);
1103 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1104 FoldingSetNodeID ID;
1105 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1109 return SDValue(E, 0);
1111 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1112 new (N) BasicBlockSDNode(MBB);
1113 CSEMap.InsertNode(N, IP);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getValueType(EVT VT) {
1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1120 ValueTypeNodes.size())
1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1123 SDNode *&N = VT.isExtended() ?
1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1126 if (N) return SDValue(N, 0);
1127 N = NodeAllocator.Allocate<VTSDNode>();
1128 new (N) VTSDNode(VT);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1134 SDNode *&N = ExternalSymbols[Sym];
1135 if (N) return SDValue(N, 0);
1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1137 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1138 AllNodes.push_back(N);
1139 return SDValue(N, 0);
1142 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1143 unsigned char TargetFlags) {
1145 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1147 if (N) return SDValue(N, 0);
1148 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1149 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1150 AllNodes.push_back(N);
1151 return SDValue(N, 0);
1154 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1155 if ((unsigned)Cond >= CondCodeNodes.size())
1156 CondCodeNodes.resize(Cond+1);
1158 if (CondCodeNodes[Cond] == 0) {
1159 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1160 new (N) CondCodeSDNode(Cond);
1161 CondCodeNodes[Cond] = N;
1162 AllNodes.push_back(N);
1165 return SDValue(CondCodeNodes[Cond], 0);
1168 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1169 // the shuffle mask M that point at N1 to point at N2, and indices that point
1170 // N2 to point at N1.
1171 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1173 int NElts = M.size();
1174 for (int i = 0; i != NElts; ++i) {
1182 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1183 SDValue N2, const int *Mask) {
1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1185 assert(VT.isVector() && N1.getValueType().isVector() &&
1186 "Vector Shuffle VTs must be a vectors");
1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1188 && "Vector Shuffle VTs must have same element type");
1190 // Canonicalize shuffle undef, undef -> undef
1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1192 return getUNDEF(VT);
1194 // Validate that all indices in Mask are within the range of the elements
1195 // input to the shuffle.
1196 unsigned NElts = VT.getVectorNumElements();
1197 SmallVector<int, 8> MaskVec;
1198 for (unsigned i = 0; i != NElts; ++i) {
1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1200 MaskVec.push_back(Mask[i]);
1203 // Canonicalize shuffle v, v -> v, undef
1206 for (unsigned i = 0; i != NElts; ++i)
1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1211 if (N1.getOpcode() == ISD::UNDEF)
1212 commuteShuffle(N1, N2, MaskVec);
1214 // Canonicalize all index into lhs, -> shuffle lhs, undef
1215 // Canonicalize all index into rhs, -> shuffle rhs, undef
1216 bool AllLHS = true, AllRHS = true;
1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1218 for (unsigned i = 0; i != NElts; ++i) {
1219 if (MaskVec[i] >= (int)NElts) {
1224 } else if (MaskVec[i] >= 0) {
1228 if (AllLHS && AllRHS)
1229 return getUNDEF(VT);
1230 if (AllLHS && !N2Undef)
1234 commuteShuffle(N1, N2, MaskVec);
1237 // If Identity shuffle, or all shuffle in to undef, return that node.
1238 bool AllUndef = true;
1239 bool Identity = true;
1240 for (unsigned i = 0; i != NElts; ++i) {
1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1242 if (MaskVec[i] >= 0) AllUndef = false;
1244 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1247 return getUNDEF(VT);
1249 FoldingSetNodeID ID;
1250 SDValue Ops[2] = { N1, N2 };
1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1252 for (unsigned i = 0; i != NElts; ++i)
1253 ID.AddInteger(MaskVec[i]);
1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1257 return SDValue(E, 0);
1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1260 // SDNode doesn't have access to it. This memory will be "leaked" when
1261 // the node is deallocated, but recovered when the NodeAllocator is released.
1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1265 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1266 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1267 CSEMap.InsertNode(N, IP);
1268 AllNodes.push_back(N);
1269 return SDValue(N, 0);
1272 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1273 SDValue Val, SDValue DTy,
1274 SDValue STy, SDValue Rnd, SDValue Sat,
1275 ISD::CvtCode Code) {
1276 // If the src and dest types are the same and the conversion is between
1277 // integer types of the same sign or two floats, no conversion is necessary.
1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1282 FoldingSetNodeID ID;
1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1287 return SDValue(E, 0);
1289 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1290 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1291 CSEMap.InsertNode(N, IP);
1292 AllNodes.push_back(N);
1293 return SDValue(N, 0);
1296 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1297 FoldingSetNodeID ID;
1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1299 ID.AddInteger(RegNo);
1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1302 return SDValue(E, 0);
1304 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1305 new (N) RegisterSDNode(RegNo, VT);
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1314 FoldingSetNodeID ID;
1315 SDValue Ops[] = { Root };
1316 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1317 ID.AddInteger(LabelID);
1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1323 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1324 CSEMap.InsertNode(N, IP);
1325 AllNodes.push_back(N);
1326 return SDValue(N, 0);
1329 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1331 unsigned char TargetFlags) {
1332 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1334 FoldingSetNodeID ID;
1335 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1337 ID.AddInteger(TargetFlags);
1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1340 return SDValue(E, 0);
1342 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1343 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getSrcValue(const Value *V) {
1350 assert((!V || V->getType()->isPointerTy()) &&
1351 "SrcValue is not a pointer?");
1353 FoldingSetNodeID ID;
1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1359 return SDValue(E, 0);
1361 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1362 new (N) SrcValueSDNode(V);
1363 CSEMap.InsertNode(N, IP);
1364 AllNodes.push_back(N);
1365 return SDValue(N, 0);
1368 /// getShiftAmountOperand - Return the specified value casted to
1369 /// the target's desired shift amount type.
1370 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1371 EVT OpTy = Op.getValueType();
1372 MVT ShTy = TLI.getShiftAmountTy();
1373 if (OpTy == ShTy || OpTy.isVector()) return Op;
1375 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1376 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1379 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1380 /// specified value type.
1381 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1382 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1383 unsigned ByteSize = VT.getStoreSize();
1384 const Type *Ty = VT.getTypeForEVT(*getContext());
1385 unsigned StackAlign =
1386 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1388 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1389 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1392 /// CreateStackTemporary - Create a stack temporary suitable for holding
1393 /// either of the specified value types.
1394 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1395 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1396 VT2.getStoreSizeInBits())/8;
1397 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1398 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1399 const TargetData *TD = TLI.getTargetData();
1400 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1401 TD->getPrefTypeAlignment(Ty2));
1403 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1404 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1405 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1408 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1409 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1410 // These setcc operations always fold.
1414 case ISD::SETFALSE2: return getConstant(0, VT);
1416 case ISD::SETTRUE2: return getConstant(1, VT);
1428 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1432 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1433 const APInt &C2 = N2C->getAPIntValue();
1434 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1435 const APInt &C1 = N1C->getAPIntValue();
1438 default: llvm_unreachable("Unknown integer setcc!");
1439 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1440 case ISD::SETNE: return getConstant(C1 != C2, VT);
1441 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1442 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1443 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1444 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1445 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1446 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1447 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1448 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1452 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1453 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1454 // No compile time operations on this type yet.
1455 if (N1C->getValueType(0) == MVT::ppcf128)
1458 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1461 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1462 return getUNDEF(VT);
1464 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1465 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1469 R==APFloat::cmpLessThan, VT);
1470 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1471 return getUNDEF(VT);
1473 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1474 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1475 return getUNDEF(VT);
1477 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1478 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1479 return getUNDEF(VT);
1481 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1482 R==APFloat::cmpEqual, VT);
1483 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1484 return getUNDEF(VT);
1486 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1487 R==APFloat::cmpEqual, VT);
1488 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1489 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1490 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1491 R==APFloat::cmpEqual, VT);
1492 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1493 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1494 R==APFloat::cmpLessThan, VT);
1495 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1496 R==APFloat::cmpUnordered, VT);
1497 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1498 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1501 // Ensure that the constant occurs on the RHS.
1502 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1506 // Could not fold it.
1510 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1511 /// use this predicate to simplify operations downstream.
1512 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1513 // This predicate is not safe for vector operations.
1514 if (Op.getValueType().isVector())
1517 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1518 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1521 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1522 /// this predicate to simplify operations downstream. Mask is known to be zero
1523 /// for bits that V cannot have.
1524 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1525 unsigned Depth) const {
1526 APInt KnownZero, KnownOne;
1527 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1528 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1529 return (KnownZero & Mask) == Mask;
1532 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1533 /// known to be either zero or one and return them in the KnownZero/KnownOne
1534 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1536 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1537 APInt &KnownZero, APInt &KnownOne,
1538 unsigned Depth) const {
1539 unsigned BitWidth = Mask.getBitWidth();
1540 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1541 "Mask size mismatches value type size!");
1543 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1544 if (Depth == 6 || Mask == 0)
1545 return; // Limit search depth.
1547 APInt KnownZero2, KnownOne2;
1549 switch (Op.getOpcode()) {
1551 // We know all of the bits for a constant!
1552 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1553 KnownZero = ~KnownOne & Mask;
1556 // If either the LHS or the RHS are Zero, the result is zero.
1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1559 KnownZero2, KnownOne2, Depth+1);
1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1563 // Output known-1 bits are only known if set in both the LHS & RHS.
1564 KnownOne &= KnownOne2;
1565 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1566 KnownZero |= KnownZero2;
1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1571 KnownZero2, KnownOne2, Depth+1);
1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1575 // Output known-0 bits are only known if clear in both the LHS & RHS.
1576 KnownZero &= KnownZero2;
1577 // Output known-1 are known to be set if set in either the LHS | RHS.
1578 KnownOne |= KnownOne2;
1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1582 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1583 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1584 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1586 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1587 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1588 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1589 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1590 KnownZero = KnownZeroOut;
1594 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1595 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1596 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1600 // If low bits are zero in either operand, output low known-0 bits.
1601 // Also compute a conserative estimate for high known-0 bits.
1602 // More trickiness is possible, but this is sufficient for the
1603 // interesting case of alignment computation.
1605 unsigned TrailZ = KnownZero.countTrailingOnes() +
1606 KnownZero2.countTrailingOnes();
1607 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1608 KnownZero2.countLeadingOnes(),
1609 BitWidth) - BitWidth;
1611 TrailZ = std::min(TrailZ, BitWidth);
1612 LeadZ = std::min(LeadZ, BitWidth);
1613 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1614 APInt::getHighBitsSet(BitWidth, LeadZ);
1619 // For the purposes of computing leading zeros we can conservatively
1620 // treat a udiv as a logical right shift by the power of 2 known to
1621 // be less than the denominator.
1622 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1623 ComputeMaskedBits(Op.getOperand(0),
1624 AllOnes, KnownZero2, KnownOne2, Depth+1);
1625 unsigned LeadZ = KnownZero2.countLeadingOnes();
1629 ComputeMaskedBits(Op.getOperand(1),
1630 AllOnes, KnownZero2, KnownOne2, Depth+1);
1631 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1632 if (RHSUnknownLeadingOnes != BitWidth)
1633 LeadZ = std::min(BitWidth,
1634 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1636 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1640 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1641 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1642 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1643 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1645 // Only known if known in both the LHS and RHS.
1646 KnownOne &= KnownOne2;
1647 KnownZero &= KnownZero2;
1649 case ISD::SELECT_CC:
1650 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1651 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1653 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1655 // Only known if known in both the LHS and RHS.
1656 KnownOne &= KnownOne2;
1657 KnownZero &= KnownZero2;
1665 if (Op.getResNo() != 1)
1667 // The boolean result conforms to getBooleanContents. Fall through.
1669 // If we know the result of a setcc has the top bits zero, use this info.
1670 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1672 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1675 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1676 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1677 unsigned ShAmt = SA->getZExtValue();
1679 // If the shift count is an invalid immediate, don't do anything.
1680 if (ShAmt >= BitWidth)
1683 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1684 KnownZero, KnownOne, Depth+1);
1685 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1686 KnownZero <<= ShAmt;
1688 // low bits known zero.
1689 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1693 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1694 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1695 unsigned ShAmt = SA->getZExtValue();
1697 // If the shift count is an invalid immediate, don't do anything.
1698 if (ShAmt >= BitWidth)
1701 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1702 KnownZero, KnownOne, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 KnownZero = KnownZero.lshr(ShAmt);
1705 KnownOne = KnownOne.lshr(ShAmt);
1707 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1708 KnownZero |= HighBits; // High bits known zero.
1712 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1713 unsigned ShAmt = SA->getZExtValue();
1715 // If the shift count is an invalid immediate, don't do anything.
1716 if (ShAmt >= BitWidth)
1719 APInt InDemandedMask = (Mask << ShAmt);
1720 // If any of the demanded bits are produced by the sign extension, we also
1721 // demand the input sign bit.
1722 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1723 if (HighBits.getBoolValue())
1724 InDemandedMask |= APInt::getSignBit(BitWidth);
1726 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1729 KnownZero = KnownZero.lshr(ShAmt);
1730 KnownOne = KnownOne.lshr(ShAmt);
1732 // Handle the sign bits.
1733 APInt SignBit = APInt::getSignBit(BitWidth);
1734 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1736 if (KnownZero.intersects(SignBit)) {
1737 KnownZero |= HighBits; // New bits are known zero.
1738 } else if (KnownOne.intersects(SignBit)) {
1739 KnownOne |= HighBits; // New bits are known one.
1743 case ISD::SIGN_EXTEND_INREG: {
1744 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1745 unsigned EBits = EVT.getScalarType().getSizeInBits();
1747 // Sign extension. Compute the demanded bits in the result that are not
1748 // present in the input.
1749 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1751 APInt InSignBit = APInt::getSignBit(EBits);
1752 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1754 // If the sign extended bits are demanded, we know that the sign
1756 InSignBit.zext(BitWidth);
1757 if (NewBits.getBoolValue())
1758 InputDemandedBits |= InSignBit;
1760 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1761 KnownZero, KnownOne, Depth+1);
1762 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1764 // If the sign bit of the input is known set or clear, then we know the
1765 // top bits of the result.
1766 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1767 KnownZero |= NewBits;
1768 KnownOne &= ~NewBits;
1769 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1770 KnownOne |= NewBits;
1771 KnownZero &= ~NewBits;
1772 } else { // Input sign bit unknown
1773 KnownZero &= ~NewBits;
1774 KnownOne &= ~NewBits;
1781 unsigned LowBits = Log2_32(BitWidth)+1;
1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1787 if (ISD::isZEXTLoad(Op.getNode())) {
1788 LoadSDNode *LD = cast<LoadSDNode>(Op);
1789 EVT VT = LD->getMemoryVT();
1790 unsigned MemBits = VT.getScalarType().getSizeInBits();
1791 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1795 case ISD::ZERO_EXTEND: {
1796 EVT InVT = Op.getOperand(0).getValueType();
1797 unsigned InBits = InVT.getScalarType().getSizeInBits();
1798 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1799 APInt InMask = Mask;
1800 InMask.trunc(InBits);
1801 KnownZero.trunc(InBits);
1802 KnownOne.trunc(InBits);
1803 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1804 KnownZero.zext(BitWidth);
1805 KnownOne.zext(BitWidth);
1806 KnownZero |= NewBits;
1809 case ISD::SIGN_EXTEND: {
1810 EVT InVT = Op.getOperand(0).getValueType();
1811 unsigned InBits = InVT.getScalarType().getSizeInBits();
1812 APInt InSignBit = APInt::getSignBit(InBits);
1813 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1814 APInt InMask = Mask;
1815 InMask.trunc(InBits);
1817 // If any of the sign extended bits are demanded, we know that the sign
1818 // bit is demanded. Temporarily set this bit in the mask for our callee.
1819 if (NewBits.getBoolValue())
1820 InMask |= InSignBit;
1822 KnownZero.trunc(InBits);
1823 KnownOne.trunc(InBits);
1824 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1826 // Note if the sign bit is known to be zero or one.
1827 bool SignBitKnownZero = KnownZero.isNegative();
1828 bool SignBitKnownOne = KnownOne.isNegative();
1829 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1830 "Sign bit can't be known to be both zero and one!");
1832 // If the sign bit wasn't actually demanded by our caller, we don't
1833 // want it set in the KnownZero and KnownOne result values. Reset the
1834 // mask and reapply it to the result values.
1836 InMask.trunc(InBits);
1837 KnownZero &= InMask;
1840 KnownZero.zext(BitWidth);
1841 KnownOne.zext(BitWidth);
1843 // If the sign bit is known zero or one, the top bits match.
1844 if (SignBitKnownZero)
1845 KnownZero |= NewBits;
1846 else if (SignBitKnownOne)
1847 KnownOne |= NewBits;
1850 case ISD::ANY_EXTEND: {
1851 EVT InVT = Op.getOperand(0).getValueType();
1852 unsigned InBits = InVT.getScalarType().getSizeInBits();
1853 APInt InMask = Mask;
1854 InMask.trunc(InBits);
1855 KnownZero.trunc(InBits);
1856 KnownOne.trunc(InBits);
1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1858 KnownZero.zext(BitWidth);
1859 KnownOne.zext(BitWidth);
1862 case ISD::TRUNCATE: {
1863 EVT InVT = Op.getOperand(0).getValueType();
1864 unsigned InBits = InVT.getScalarType().getSizeInBits();
1865 APInt InMask = Mask;
1866 InMask.zext(InBits);
1867 KnownZero.zext(InBits);
1868 KnownOne.zext(InBits);
1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1870 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1871 KnownZero.trunc(BitWidth);
1872 KnownOne.trunc(BitWidth);
1875 case ISD::AssertZext: {
1876 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1877 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1878 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1880 KnownZero |= (~InMask) & Mask;
1884 // All bits are zero except the low bit.
1885 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1889 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1890 // We know that the top bits of C-X are clear if X contains less bits
1891 // than C (i.e. no wrap-around can happen). For example, 20-X is
1892 // positive if we can prove that X is >= 0 and < 16.
1893 if (CLHS->getAPIntValue().isNonNegative()) {
1894 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1895 // NLZ can't be BitWidth with no sign bit
1896 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1897 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1900 // If all of the MaskV bits are known to be zero, then we know the
1901 // output top bits are zero, because we now know that the output is
1903 if ((KnownZero2 & MaskV) == MaskV) {
1904 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1905 // Top bits known zero.
1906 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1913 // Output known-0 bits are known if clear or set in both the low clear bits
1914 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1915 // low 3 bits clear.
1916 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1917 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1918 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1919 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1921 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1922 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1923 KnownZeroOut = std::min(KnownZeroOut,
1924 KnownZero2.countTrailingOnes());
1926 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1930 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1931 const APInt &RA = Rem->getAPIntValue().abs();
1932 if (RA.isPowerOf2()) {
1933 APInt LowBits = RA - 1;
1934 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1935 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1937 // The low bits of the first operand are unchanged by the srem.
1938 KnownZero = KnownZero2 & LowBits;
1939 KnownOne = KnownOne2 & LowBits;
1941 // If the first operand is non-negative or has all low bits zero, then
1942 // the upper bits are all zero.
1943 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1944 KnownZero |= ~LowBits;
1946 // If the first operand is negative and not all low bits are zero, then
1947 // the upper bits are all one.
1948 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1949 KnownOne |= ~LowBits;
1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1959 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1960 const APInt &RA = Rem->getAPIntValue();
1961 if (RA.isPowerOf2()) {
1962 APInt LowBits = (RA - 1);
1963 APInt Mask2 = LowBits & Mask;
1964 KnownZero |= ~LowBits & Mask;
1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1966 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1971 // Since the result is less than or equal to either operand, any leading
1972 // zero bits in either operand must also exist in the result.
1973 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1974 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1976 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1979 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1980 KnownZero2.countLeadingOnes());
1982 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1986 // Allow the target to implement this method for its nodes.
1987 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1988 case ISD::INTRINSIC_WO_CHAIN:
1989 case ISD::INTRINSIC_W_CHAIN:
1990 case ISD::INTRINSIC_VOID:
1991 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1998 /// ComputeNumSignBits - Return the number of times the sign bit of the
1999 /// register is replicated into the other bits. We know that at least 1 bit
2000 /// is always equal to the sign bit (itself), but other cases can give us
2001 /// information. For example, immediately after an "SRA X, 2", we know that
2002 /// the top 3 bits are all equal to each other, so we return 3.
2003 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2004 EVT VT = Op.getValueType();
2005 assert(VT.isInteger() && "Invalid VT!");
2006 unsigned VTBits = VT.getScalarType().getSizeInBits();
2008 unsigned FirstAnswer = 1;
2011 return 1; // Limit search depth.
2013 switch (Op.getOpcode()) {
2015 case ISD::AssertSext:
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2017 return VTBits-Tmp+1;
2018 case ISD::AssertZext:
2019 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2022 case ISD::Constant: {
2023 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2024 // If negative, return # leading ones.
2025 if (Val.isNegative())
2026 return Val.countLeadingOnes();
2028 // Return # leading zeros.
2029 return Val.countLeadingZeros();
2032 case ISD::SIGN_EXTEND:
2033 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2034 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2036 case ISD::SIGN_EXTEND_INREG:
2037 // Max of the input and what this extends.
2039 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2042 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2043 return std::max(Tmp, Tmp2);
2046 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2047 // SRA X, C -> adds C sign bits.
2048 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2049 Tmp += C->getZExtValue();
2050 if (Tmp > VTBits) Tmp = VTBits;
2054 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2055 // shl destroys sign bits.
2056 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2057 if (C->getZExtValue() >= VTBits || // Bad shift.
2058 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2059 return Tmp - C->getZExtValue();
2064 case ISD::XOR: // NOT is handled here.
2065 // Logical binary ops preserve the number of sign bits at the worst.
2066 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2068 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2069 FirstAnswer = std::min(Tmp, Tmp2);
2070 // We computed what we know about the sign bits as our first
2071 // answer. Now proceed to the generic code that uses
2072 // ComputeMaskedBits, and pick whichever answer is better.
2077 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2078 if (Tmp == 1) return 1; // Early out.
2079 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2080 return std::min(Tmp, Tmp2);
2088 if (Op.getResNo() != 1)
2090 // The boolean result conforms to getBooleanContents. Fall through.
2092 // If setcc returns 0/-1, all bits are sign bits.
2093 if (TLI.getBooleanContents() ==
2094 TargetLowering::ZeroOrNegativeOneBooleanContent)
2099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2100 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2102 // Handle rotate right by N like a rotate left by 32-N.
2103 if (Op.getOpcode() == ISD::ROTR)
2104 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2106 // If we aren't rotating out all of the known-in sign bits, return the
2107 // number that are left. This handles rotl(sext(x), 1) for example.
2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2109 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2113 // Add can have at most one carry bit. Thus we know that the output
2114 // is, at worst, one more bit than the inputs.
2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2116 if (Tmp == 1) return 1; // Early out.
2118 // Special case decrementing a value (ADD X, -1):
2119 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2120 if (CRHS->isAllOnesValue()) {
2121 APInt KnownZero, KnownOne;
2122 APInt Mask = APInt::getAllOnesValue(VTBits);
2123 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2125 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2127 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2130 // If we are subtracting one from a positive number, there is no carry
2131 // out of the result.
2132 if (KnownZero.isNegative())
2136 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2137 if (Tmp2 == 1) return 1;
2138 return std::min(Tmp, Tmp2)-1;
2142 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2143 if (Tmp2 == 1) return 1;
2146 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2147 if (CLHS->isNullValue()) {
2148 APInt KnownZero, KnownOne;
2149 APInt Mask = APInt::getAllOnesValue(VTBits);
2150 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2151 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2153 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2156 // If the input is known to be positive (the sign bit is known clear),
2157 // the output of the NEG has the same number of sign bits as the input.
2158 if (KnownZero.isNegative())
2161 // Otherwise, we treat this like a SUB.
2164 // Sub can have at most one carry bit. Thus we know that the output
2165 // is, at worst, one more bit than the inputs.
2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2167 if (Tmp == 1) return 1; // Early out.
2168 return std::min(Tmp, Tmp2)-1;
2171 // FIXME: it's tricky to do anything useful for this, but it is an important
2172 // case for targets like X86.
2176 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2177 if (Op.getOpcode() == ISD::LOAD) {
2178 LoadSDNode *LD = cast<LoadSDNode>(Op);
2179 unsigned ExtType = LD->getExtensionType();
2182 case ISD::SEXTLOAD: // '17' bits known
2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2184 return VTBits-Tmp+1;
2185 case ISD::ZEXTLOAD: // '16' bits known
2186 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2191 // Allow the target to implement this method for its nodes.
2192 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2193 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2194 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2195 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2196 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2197 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2200 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2201 // use this information.
2202 APInt KnownZero, KnownOne;
2203 APInt Mask = APInt::getAllOnesValue(VTBits);
2204 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2206 if (KnownZero.isNegative()) { // sign bit is 0
2208 } else if (KnownOne.isNegative()) { // sign bit is 1;
2215 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2216 // the number of identical bits in the top of the input value.
2218 Mask <<= Mask.getBitWidth()-VTBits;
2219 // Return # leading zeros. We use 'min' here in case Val was zero before
2220 // shifting. We don't want to return '64' as for an i32 "0".
2221 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2224 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2225 // If we're told that NaNs won't happen, assume they won't.
2226 if (FiniteOnlyFPMath())
2229 // If the value is a constant, we can obviously see if it is a NaN or not.
2230 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2231 return !C->getValueAPF().isNaN();
2233 // TODO: Recognize more cases here.
2238 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2239 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2240 if (!GA) return false;
2241 if (GA->getOffset() != 0) return false;
2242 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2243 if (!GV) return false;
2244 MachineModuleInfo *MMI = getMachineModuleInfo();
2245 return MMI && MMI->hasDebugInfo();
2249 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2250 /// element of the result of the vector shuffle.
2251 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2253 EVT VT = N->getValueType(0);
2254 DebugLoc dl = N->getDebugLoc();
2255 if (N->getMaskElt(i) < 0)
2256 return getUNDEF(VT.getVectorElementType());
2257 unsigned Index = N->getMaskElt(i);
2258 unsigned NumElems = VT.getVectorNumElements();
2259 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2262 if (V.getOpcode() == ISD::BIT_CONVERT) {
2263 V = V.getOperand(0);
2264 EVT VVT = V.getValueType();
2265 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2268 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2269 return (Index == 0) ? V.getOperand(0)
2270 : getUNDEF(VT.getVectorElementType());
2271 if (V.getOpcode() == ISD::BUILD_VECTOR)
2272 return V.getOperand(Index);
2273 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2274 return getShuffleScalarElt(SVN, Index);
2279 /// getNode - Gets or creates the specified node.
2281 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2282 FoldingSetNodeID ID;
2283 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2285 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2286 return SDValue(E, 0);
2288 SDNode *N = NodeAllocator.Allocate<SDNode>();
2289 new (N) SDNode(Opcode, DL, getVTList(VT));
2290 CSEMap.InsertNode(N, IP);
2292 AllNodes.push_back(N);
2296 return SDValue(N, 0);
2299 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2300 EVT VT, SDValue Operand) {
2301 // Constant fold unary operations with an integer constant operand.
2302 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2303 const APInt &Val = C->getAPIntValue();
2304 unsigned BitWidth = VT.getSizeInBits();
2307 case ISD::SIGN_EXTEND:
2308 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2309 case ISD::ANY_EXTEND:
2310 case ISD::ZERO_EXTEND:
2312 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2313 case ISD::UINT_TO_FP:
2314 case ISD::SINT_TO_FP: {
2315 const uint64_t zero[] = {0, 0};
2316 // No compile time operations on this type.
2317 if (VT==MVT::ppcf128)
2319 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2320 (void)apf.convertFromAPInt(Val,
2321 Opcode==ISD::SINT_TO_FP,
2322 APFloat::rmNearestTiesToEven);
2323 return getConstantFP(apf, VT);
2325 case ISD::BIT_CONVERT:
2326 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2327 return getConstantFP(Val.bitsToFloat(), VT);
2328 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2329 return getConstantFP(Val.bitsToDouble(), VT);
2332 return getConstant(Val.byteSwap(), VT);
2334 return getConstant(Val.countPopulation(), VT);
2336 return getConstant(Val.countLeadingZeros(), VT);
2338 return getConstant(Val.countTrailingZeros(), VT);
2342 // Constant fold unary operations with a floating point constant operand.
2343 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2344 APFloat V = C->getValueAPF(); // make copy
2345 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2349 return getConstantFP(V, VT);
2352 return getConstantFP(V, VT);
2354 case ISD::FP_EXTEND: {
2356 // This can return overflow, underflow, or inexact; we don't care.
2357 // FIXME need to be more flexible about rounding mode.
2358 (void)V.convert(*EVTToAPFloatSemantics(VT),
2359 APFloat::rmNearestTiesToEven, &ignored);
2360 return getConstantFP(V, VT);
2362 case ISD::FP_TO_SINT:
2363 case ISD::FP_TO_UINT: {
2366 assert(integerPartWidth >= 64);
2367 // FIXME need to be more flexible about rounding mode.
2368 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2369 Opcode==ISD::FP_TO_SINT,
2370 APFloat::rmTowardZero, &ignored);
2371 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2373 APInt api(VT.getSizeInBits(), 2, x);
2374 return getConstant(api, VT);
2376 case ISD::BIT_CONVERT:
2377 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2378 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2379 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2380 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2386 unsigned OpOpcode = Operand.getNode()->getOpcode();
2388 case ISD::TokenFactor:
2389 case ISD::MERGE_VALUES:
2390 case ISD::CONCAT_VECTORS:
2391 return Operand; // Factor, merge or concat of one node? No need.
2392 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2393 case ISD::FP_EXTEND:
2394 assert(VT.isFloatingPoint() &&
2395 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2396 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2397 assert((!VT.isVector() ||
2398 VT.getVectorNumElements() ==
2399 Operand.getValueType().getVectorNumElements()) &&
2400 "Vector element count mismatch!");
2401 if (Operand.getOpcode() == ISD::UNDEF)
2402 return getUNDEF(VT);
2404 case ISD::SIGN_EXTEND:
2405 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2406 "Invalid SIGN_EXTEND!");
2407 if (Operand.getValueType() == VT) return Operand; // noop extension
2408 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2409 "Invalid sext node, dst < src!");
2410 assert((!VT.isVector() ||
2411 VT.getVectorNumElements() ==
2412 Operand.getValueType().getVectorNumElements()) &&
2413 "Vector element count mismatch!");
2414 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2415 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2417 case ISD::ZERO_EXTEND:
2418 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2419 "Invalid ZERO_EXTEND!");
2420 if (Operand.getValueType() == VT) return Operand; // noop extension
2421 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2422 "Invalid zext node, dst < src!");
2423 assert((!VT.isVector() ||
2424 VT.getVectorNumElements() ==
2425 Operand.getValueType().getVectorNumElements()) &&
2426 "Vector element count mismatch!");
2427 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2428 return getNode(ISD::ZERO_EXTEND, DL, VT,
2429 Operand.getNode()->getOperand(0));
2431 case ISD::ANY_EXTEND:
2432 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2433 "Invalid ANY_EXTEND!");
2434 if (Operand.getValueType() == VT) return Operand; // noop extension
2435 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2436 "Invalid anyext node, dst < src!");
2437 assert((!VT.isVector() ||
2438 VT.getVectorNumElements() ==
2439 Operand.getValueType().getVectorNumElements()) &&
2440 "Vector element count mismatch!");
2441 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2442 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2443 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2446 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2447 "Invalid TRUNCATE!");
2448 if (Operand.getValueType() == VT) return Operand; // noop truncate
2449 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2450 "Invalid truncate node, src < dst!");
2451 assert((!VT.isVector() ||
2452 VT.getVectorNumElements() ==
2453 Operand.getValueType().getVectorNumElements()) &&
2454 "Vector element count mismatch!");
2455 if (OpOpcode == ISD::TRUNCATE)
2456 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2457 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2458 OpOpcode == ISD::ANY_EXTEND) {
2459 // If the source is smaller than the dest, we still need an extend.
2460 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2461 .bitsLT(VT.getScalarType()))
2462 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2463 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2464 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2466 return Operand.getNode()->getOperand(0);
2469 case ISD::BIT_CONVERT:
2470 // Basic sanity checking.
2471 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2472 && "Cannot BIT_CONVERT between types of different sizes!");
2473 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2474 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2475 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2476 if (OpOpcode == ISD::UNDEF)
2477 return getUNDEF(VT);
2479 case ISD::SCALAR_TO_VECTOR:
2480 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2481 (VT.getVectorElementType() == Operand.getValueType() ||
2482 (VT.getVectorElementType().isInteger() &&
2483 Operand.getValueType().isInteger() &&
2484 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2485 "Illegal SCALAR_TO_VECTOR node!");
2486 if (OpOpcode == ISD::UNDEF)
2487 return getUNDEF(VT);
2488 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2489 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2490 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2491 Operand.getConstantOperandVal(1) == 0 &&
2492 Operand.getOperand(0).getValueType() == VT)
2493 return Operand.getOperand(0);
2496 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2497 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2498 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2499 Operand.getNode()->getOperand(0));
2500 if (OpOpcode == ISD::FNEG) // --X -> X
2501 return Operand.getNode()->getOperand(0);
2504 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2505 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2510 SDVTList VTs = getVTList(VT);
2511 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2512 FoldingSetNodeID ID;
2513 SDValue Ops[1] = { Operand };
2514 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2516 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2517 return SDValue(E, 0);
2519 N = NodeAllocator.Allocate<UnarySDNode>();
2520 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2521 CSEMap.InsertNode(N, IP);
2523 N = NodeAllocator.Allocate<UnarySDNode>();
2524 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2527 AllNodes.push_back(N);
2531 return SDValue(N, 0);
2534 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2536 ConstantSDNode *Cst1,
2537 ConstantSDNode *Cst2) {
2538 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2541 case ISD::ADD: return getConstant(C1 + C2, VT);
2542 case ISD::SUB: return getConstant(C1 - C2, VT);
2543 case ISD::MUL: return getConstant(C1 * C2, VT);
2545 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2548 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2551 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2554 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2556 case ISD::AND: return getConstant(C1 & C2, VT);
2557 case ISD::OR: return getConstant(C1 | C2, VT);
2558 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2559 case ISD::SHL: return getConstant(C1 << C2, VT);
2560 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2561 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2562 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2563 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2570 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2571 SDValue N1, SDValue N2) {
2572 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2573 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2576 case ISD::TokenFactor:
2577 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2578 N2.getValueType() == MVT::Other && "Invalid token factor!");
2579 // Fold trivial token factors.
2580 if (N1.getOpcode() == ISD::EntryToken) return N2;
2581 if (N2.getOpcode() == ISD::EntryToken) return N1;
2582 if (N1 == N2) return N1;
2584 case ISD::CONCAT_VECTORS:
2585 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2586 // one big BUILD_VECTOR.
2587 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2588 N2.getOpcode() == ISD::BUILD_VECTOR) {
2589 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2590 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2591 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2595 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2596 N1.getValueType() == VT && "Binary operator types must match!");
2597 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2598 // worth handling here.
2599 if (N2C && N2C->isNullValue())
2601 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2608 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2609 N1.getValueType() == VT && "Binary operator types must match!");
2610 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2611 // it's worth handling here.
2612 if (N2C && N2C->isNullValue())
2622 assert(VT.isInteger() && "This operator does not apply to FP types!");
2630 if (Opcode == ISD::FADD) {
2632 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2633 if (CFP->getValueAPF().isZero())
2636 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2637 if (CFP->getValueAPF().isZero())
2639 } else if (Opcode == ISD::FSUB) {
2641 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2642 if (CFP->getValueAPF().isZero())
2646 assert(N1.getValueType() == N2.getValueType() &&
2647 N1.getValueType() == VT && "Binary operator types must match!");
2649 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2650 assert(N1.getValueType() == VT &&
2651 N1.getValueType().isFloatingPoint() &&
2652 N2.getValueType().isFloatingPoint() &&
2653 "Invalid FCOPYSIGN!");
2660 assert(VT == N1.getValueType() &&
2661 "Shift operators return type must be the same as their first arg");
2662 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2663 "Shifts only work on integers");
2665 // Always fold shifts of i1 values so the code generator doesn't need to
2666 // handle them. Since we know the size of the shift has to be less than the
2667 // size of the value, the shift/rotate count is guaranteed to be zero.
2670 if (N2C && N2C->isNullValue())
2673 case ISD::FP_ROUND_INREG: {
2674 EVT EVT = cast<VTSDNode>(N2)->getVT();
2675 assert(VT == N1.getValueType() && "Not an inreg round!");
2676 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2677 "Cannot FP_ROUND_INREG integer types");
2678 assert(EVT.isVector() == VT.isVector() &&
2679 "FP_ROUND_INREG type should be vector iff the operand "
2681 assert((!EVT.isVector() ||
2682 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2683 "Vector element counts must match in FP_ROUND_INREG");
2684 assert(EVT.bitsLE(VT) && "Not rounding down!");
2685 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2689 assert(VT.isFloatingPoint() &&
2690 N1.getValueType().isFloatingPoint() &&
2691 VT.bitsLE(N1.getValueType()) &&
2692 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2693 if (N1.getValueType() == VT) return N1; // noop conversion.
2695 case ISD::AssertSext:
2696 case ISD::AssertZext: {
2697 EVT EVT = cast<VTSDNode>(N2)->getVT();
2698 assert(VT == N1.getValueType() && "Not an inreg extend!");
2699 assert(VT.isInteger() && EVT.isInteger() &&
2700 "Cannot *_EXTEND_INREG FP types");
2701 assert(!EVT.isVector() &&
2702 "AssertSExt/AssertZExt type should be the vector element type "
2703 "rather than the vector type!");
2704 assert(EVT.bitsLE(VT) && "Not extending!");
2705 if (VT == EVT) return N1; // noop assertion.
2708 case ISD::SIGN_EXTEND_INREG: {
2709 EVT EVT = cast<VTSDNode>(N2)->getVT();
2710 assert(VT == N1.getValueType() && "Not an inreg extend!");
2711 assert(VT.isInteger() && EVT.isInteger() &&
2712 "Cannot *_EXTEND_INREG FP types");
2713 assert(EVT.isVector() == VT.isVector() &&
2714 "SIGN_EXTEND_INREG type should be vector iff the operand "
2716 assert((!EVT.isVector() ||
2717 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2718 "Vector element counts must match in SIGN_EXTEND_INREG");
2719 assert(EVT.bitsLE(VT) && "Not extending!");
2720 if (EVT == VT) return N1; // Not actually extending
2723 APInt Val = N1C->getAPIntValue();
2724 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2725 Val <<= Val.getBitWidth()-FromBits;
2726 Val = Val.ashr(Val.getBitWidth()-FromBits);
2727 return getConstant(Val, VT);
2731 case ISD::EXTRACT_VECTOR_ELT:
2732 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2733 if (N1.getOpcode() == ISD::UNDEF)
2734 return getUNDEF(VT);
2736 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2737 // expanding copies of large vectors from registers.
2739 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2740 N1.getNumOperands() > 0) {
2742 N1.getOperand(0).getValueType().getVectorNumElements();
2743 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2744 N1.getOperand(N2C->getZExtValue() / Factor),
2745 getConstant(N2C->getZExtValue() % Factor,
2746 N2.getValueType()));
2749 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2750 // expanding large vector constants.
2751 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2752 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2753 EVT VEltTy = N1.getValueType().getVectorElementType();
2754 if (Elt.getValueType() != VEltTy) {
2755 // If the vector element type is not legal, the BUILD_VECTOR operands
2756 // are promoted and implicitly truncated. Make that explicit here.
2757 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2760 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2761 // result is implicitly extended.
2762 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2767 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2768 // operations are lowered to scalars.
2769 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2770 // If the indices are the same, return the inserted element else
2771 // if the indices are known different, extract the element from
2772 // the original vector.
2773 if (N1.getOperand(2) == N2) {
2774 if (VT == N1.getOperand(1).getValueType())
2775 return N1.getOperand(1);
2777 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2778 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2779 isa<ConstantSDNode>(N2))
2780 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2783 case ISD::EXTRACT_ELEMENT:
2784 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2785 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2786 (N1.getValueType().isInteger() == VT.isInteger()) &&
2787 "Wrong types for EXTRACT_ELEMENT!");
2789 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2790 // 64-bit integers into 32-bit parts. Instead of building the extract of
2791 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2792 if (N1.getOpcode() == ISD::BUILD_PAIR)
2793 return N1.getOperand(N2C->getZExtValue());
2795 // EXTRACT_ELEMENT of a constant int is also very common.
2796 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2797 unsigned ElementSize = VT.getSizeInBits();
2798 unsigned Shift = ElementSize * N2C->getZExtValue();
2799 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2800 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2803 case ISD::EXTRACT_SUBVECTOR:
2804 if (N1.getValueType() == VT) // Trivial extraction.
2811 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2812 if (SV.getNode()) return SV;
2813 } else { // Cannonicalize constant to RHS if commutative
2814 if (isCommutativeBinOp(Opcode)) {
2815 std::swap(N1C, N2C);
2821 // Constant fold FP operations.
2822 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2823 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2825 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2826 // Cannonicalize constant to RHS if commutative
2827 std::swap(N1CFP, N2CFP);
2829 } else if (N2CFP && VT != MVT::ppcf128) {
2830 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2831 APFloat::opStatus s;
2834 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2835 if (s != APFloat::opInvalidOp)
2836 return getConstantFP(V1, VT);
2839 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2840 if (s!=APFloat::opInvalidOp)
2841 return getConstantFP(V1, VT);
2844 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2845 if (s!=APFloat::opInvalidOp)
2846 return getConstantFP(V1, VT);
2849 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2850 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2851 return getConstantFP(V1, VT);
2854 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2855 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2856 return getConstantFP(V1, VT);
2858 case ISD::FCOPYSIGN:
2860 return getConstantFP(V1, VT);
2866 // Canonicalize an UNDEF to the RHS, even over a constant.
2867 if (N1.getOpcode() == ISD::UNDEF) {
2868 if (isCommutativeBinOp(Opcode)) {
2872 case ISD::FP_ROUND_INREG:
2873 case ISD::SIGN_EXTEND_INREG:
2879 return N1; // fold op(undef, arg2) -> undef
2887 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2888 // For vectors, we can't easily build an all zero vector, just return
2895 // Fold a bunch of operators when the RHS is undef.
2896 if (N2.getOpcode() == ISD::UNDEF) {
2899 if (N1.getOpcode() == ISD::UNDEF)
2900 // Handle undef ^ undef -> 0 special case. This is a common
2902 return getConstant(0, VT);
2912 return N2; // fold op(arg1, undef) -> undef
2926 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2927 // For vectors, we can't easily build an all zero vector, just return
2932 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2933 // For vectors, we can't easily build an all one vector, just return
2941 // Memoize this node if possible.
2943 SDVTList VTs = getVTList(VT);
2944 if (VT != MVT::Flag) {
2945 SDValue Ops[] = { N1, N2 };
2946 FoldingSetNodeID ID;
2947 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2950 return SDValue(E, 0);
2952 N = NodeAllocator.Allocate<BinarySDNode>();
2953 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2954 CSEMap.InsertNode(N, IP);
2956 N = NodeAllocator.Allocate<BinarySDNode>();
2957 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2960 AllNodes.push_back(N);
2964 return SDValue(N, 0);
2967 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2968 SDValue N1, SDValue N2, SDValue N3) {
2969 // Perform various simplifications.
2970 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2971 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2973 case ISD::CONCAT_VECTORS:
2974 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2975 // one big BUILD_VECTOR.
2976 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2977 N2.getOpcode() == ISD::BUILD_VECTOR &&
2978 N3.getOpcode() == ISD::BUILD_VECTOR) {
2979 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2980 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2981 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2982 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2986 // Use FoldSetCC to simplify SETCC's.
2987 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2988 if (Simp.getNode()) return Simp;
2993 if (N1C->getZExtValue())
2994 return N2; // select true, X, Y -> X
2996 return N3; // select false, X, Y -> Y
2999 if (N2 == N3) return N2; // select C, X, X -> X
3003 if (N2C->getZExtValue()) // Unconditional branch
3004 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3006 return N1; // Never-taken branch
3009 case ISD::VECTOR_SHUFFLE:
3010 llvm_unreachable("should use getVectorShuffle constructor!");
3012 case ISD::BIT_CONVERT:
3013 // Fold bit_convert nodes from a type to themselves.
3014 if (N1.getValueType() == VT)
3019 // Memoize node if it doesn't produce a flag.
3021 SDVTList VTs = getVTList(VT);
3022 if (VT != MVT::Flag) {
3023 SDValue Ops[] = { N1, N2, N3 };
3024 FoldingSetNodeID ID;
3025 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3027 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3028 return SDValue(E, 0);
3030 N = NodeAllocator.Allocate<TernarySDNode>();
3031 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3032 CSEMap.InsertNode(N, IP);
3034 N = NodeAllocator.Allocate<TernarySDNode>();
3035 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3038 AllNodes.push_back(N);
3042 return SDValue(N, 0);
3045 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3046 SDValue N1, SDValue N2, SDValue N3,
3048 SDValue Ops[] = { N1, N2, N3, N4 };
3049 return getNode(Opcode, DL, VT, Ops, 4);
3052 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3053 SDValue N1, SDValue N2, SDValue N3,
3054 SDValue N4, SDValue N5) {
3055 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3056 return getNode(Opcode, DL, VT, Ops, 5);
3059 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3060 /// the incoming stack arguments to be loaded from the stack.
3061 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3062 SmallVector<SDValue, 8> ArgChains;
3064 // Include the original chain at the beginning of the list. When this is
3065 // used by target LowerCall hooks, this helps legalize find the
3066 // CALLSEQ_BEGIN node.
3067 ArgChains.push_back(Chain);
3069 // Add a chain value for each stack argument.
3070 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3071 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3072 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3073 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3074 if (FI->getIndex() < 0)
3075 ArgChains.push_back(SDValue(L, 1));
3077 // Build a tokenfactor for all the chains.
3078 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3079 &ArgChains[0], ArgChains.size());
3082 /// getMemsetValue - Vectorized representation of the memset value
3084 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3086 unsigned NumBits = VT.isVector() ?
3087 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3088 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3089 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3091 for (unsigned i = NumBits; i > 8; i >>= 1) {
3092 Val = (Val << Shift) | Val;
3096 return DAG.getConstant(Val, VT);
3097 return DAG.getConstantFP(APFloat(Val), VT);
3100 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3101 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3103 for (unsigned i = NumBits; i > 8; i >>= 1) {
3104 Value = DAG.getNode(ISD::OR, dl, VT,
3105 DAG.getNode(ISD::SHL, dl, VT, Value,
3106 DAG.getConstant(Shift,
3107 TLI.getShiftAmountTy())),
3115 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3116 /// used when a memcpy is turned into a memset when the source is a constant
3118 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3119 const TargetLowering &TLI,
3120 std::string &Str, unsigned Offset) {
3121 // Handle vector with all elements zero.
3124 return DAG.getConstant(0, VT);
3125 unsigned NumElts = VT.getVectorNumElements();
3126 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3127 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3129 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3132 assert(!VT.isVector() && "Can't handle vector type here!");
3133 unsigned NumBits = VT.getSizeInBits();
3134 unsigned MSB = NumBits / 8;
3136 if (TLI.isLittleEndian())
3137 Offset = Offset + MSB - 1;
3138 for (unsigned i = 0; i != MSB; ++i) {
3139 Val = (Val << 8) | (unsigned char)Str[Offset];
3140 Offset += TLI.isLittleEndian() ? -1 : 1;
3142 return DAG.getConstant(Val, VT);
3145 /// getMemBasePlusOffset - Returns base and offset node for the
3147 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3148 SelectionDAG &DAG) {
3149 EVT VT = Base.getValueType();
3150 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3151 VT, Base, DAG.getConstant(Offset, VT));
3154 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3156 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3157 unsigned SrcDelta = 0;
3158 GlobalAddressSDNode *G = NULL;
3159 if (Src.getOpcode() == ISD::GlobalAddress)
3160 G = cast<GlobalAddressSDNode>(Src);
3161 else if (Src.getOpcode() == ISD::ADD &&
3162 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3163 Src.getOperand(1).getOpcode() == ISD::Constant) {
3164 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3165 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3170 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3171 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3177 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3178 /// to replace the memset / memcpy is below the threshold. It also returns the
3179 /// types of the sequence of memory ops to perform memset / memcpy.
3181 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3182 SDValue Dst, SDValue Src,
3183 unsigned Limit, uint64_t Size, unsigned &Align,
3184 std::string &Str, bool &isSrcStr,
3186 const TargetLowering &TLI) {
3187 isSrcStr = isMemSrcFromString(Src, Str);
3188 bool isSrcConst = isa<ConstantSDNode>(Src);
3189 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3190 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3191 if (VT != MVT::iAny) {
3192 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3193 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3194 // If source is a string constant, this will require an unaligned load.
3195 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3196 if (Dst.getOpcode() != ISD::FrameIndex) {
3197 // Can't change destination alignment. It requires a unaligned store.
3201 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3202 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3203 if (MFI->isFixedObjectIndex(FI)) {
3204 // Can't change destination alignment. It requires a unaligned store.
3208 // Give the stack frame object a larger alignment if needed.
3209 if (MFI->getObjectAlignment(FI) < NewAlign)
3210 MFI->setObjectAlignment(FI, NewAlign);
3217 if (VT == MVT::iAny) {
3218 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3221 switch (Align & 7) {
3222 case 0: VT = MVT::i64; break;
3223 case 4: VT = MVT::i32; break;
3224 case 2: VT = MVT::i16; break;
3225 default: VT = MVT::i8; break;
3230 while (!TLI.isTypeLegal(LVT))
3231 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3232 assert(LVT.isInteger());
3238 unsigned NumMemOps = 0;
3240 unsigned VTSize = VT.getSizeInBits() / 8;
3241 while (VTSize > Size) {
3242 // For now, only use non-vector load / store's for the left-over pieces.
3243 if (VT.isVector()) {
3245 while (!TLI.isTypeLegal(VT))
3246 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3247 VTSize = VT.getSizeInBits() / 8;
3249 // This can result in a type that is not legal on the target, e.g.
3250 // 1 or 2 bytes on PPC.
3251 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3256 if (++NumMemOps > Limit)
3258 MemOps.push_back(VT);
3265 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3266 SDValue Chain, SDValue Dst,
3267 SDValue Src, uint64_t Size,
3268 unsigned Align, bool AlwaysInline,
3269 const Value *DstSV, uint64_t DstSVOff,
3270 const Value *SrcSV, uint64_t SrcSVOff){
3271 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3273 // Expand memcpy to a series of load and store ops if the size operand falls
3274 // below a certain threshold.
3275 std::vector<EVT> MemOps;
3276 uint64_t Limit = -1ULL;
3278 Limit = TLI.getMaxStoresPerMemcpy();
3279 unsigned DstAlign = Align; // Destination alignment can change.
3282 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3283 Str, CopyFromStr, DAG, TLI))
3287 bool isZeroStr = CopyFromStr && Str.empty();
3288 SmallVector<SDValue, 8> OutChains;
3289 unsigned NumMemOps = MemOps.size();
3290 uint64_t SrcOff = 0, DstOff = 0;
3291 for (unsigned i = 0; i != NumMemOps; ++i) {
3293 unsigned VTSize = VT.getSizeInBits() / 8;
3294 SDValue Value, Store;
3296 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3297 // It's unlikely a store of a vector immediate can be done in a single
3298 // instruction. It would require a load from a constantpool first.
3299 // We also handle store a vector with all zero's.
3300 // FIXME: Handle other cases where store of vector immediate is done in
3301 // a single instruction.
3302 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3303 Store = DAG.getStore(Chain, dl, Value,
3304 getMemBasePlusOffset(Dst, DstOff, DAG),
3305 DstSV, DstSVOff + DstOff, false, false, DstAlign);
3307 // The type might not be legal for the target. This should only happen
3308 // if the type is smaller than a legal type, as on PPC, so the right
3309 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3310 // to Load/Store if NVT==VT.
3311 // FIXME does the case above also need this?
3312 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3313 assert(NVT.bitsGE(VT));
3314 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3315 getMemBasePlusOffset(Src, SrcOff, DAG),
3316 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align);
3317 Store = DAG.getTruncStore(Chain, dl, Value,
3318 getMemBasePlusOffset(Dst, DstOff, DAG),
3319 DstSV, DstSVOff + DstOff, VT, false, false,
3322 OutChains.push_back(Store);
3327 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3328 &OutChains[0], OutChains.size());
3331 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3332 SDValue Chain, SDValue Dst,
3333 SDValue Src, uint64_t Size,
3334 unsigned Align, bool AlwaysInline,
3335 const Value *DstSV, uint64_t DstSVOff,
3336 const Value *SrcSV, uint64_t SrcSVOff){
3337 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3339 // Expand memmove to a series of load and store ops if the size operand falls
3340 // below a certain threshold.
3341 std::vector<EVT> MemOps;
3342 uint64_t Limit = -1ULL;
3344 Limit = TLI.getMaxStoresPerMemmove();
3345 unsigned DstAlign = Align; // Destination alignment can change.
3348 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3349 Str, CopyFromStr, DAG, TLI))
3352 uint64_t SrcOff = 0, DstOff = 0;
3354 SmallVector<SDValue, 8> LoadValues;
3355 SmallVector<SDValue, 8> LoadChains;
3356 SmallVector<SDValue, 8> OutChains;
3357 unsigned NumMemOps = MemOps.size();
3358 for (unsigned i = 0; i < NumMemOps; i++) {
3360 unsigned VTSize = VT.getSizeInBits() / 8;
3361 SDValue Value, Store;
3363 Value = DAG.getLoad(VT, dl, Chain,
3364 getMemBasePlusOffset(Src, SrcOff, DAG),
3365 SrcSV, SrcSVOff + SrcOff, false, false, Align);
3366 LoadValues.push_back(Value);
3367 LoadChains.push_back(Value.getValue(1));
3370 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3371 &LoadChains[0], LoadChains.size());
3373 for (unsigned i = 0; i < NumMemOps; i++) {
3375 unsigned VTSize = VT.getSizeInBits() / 8;
3376 SDValue Value, Store;
3378 Store = DAG.getStore(Chain, dl, LoadValues[i],
3379 getMemBasePlusOffset(Dst, DstOff, DAG),
3380 DstSV, DstSVOff + DstOff, false, false, DstAlign);
3381 OutChains.push_back(Store);
3385 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3386 &OutChains[0], OutChains.size());
3389 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3390 SDValue Chain, SDValue Dst,
3391 SDValue Src, uint64_t Size,
3393 const Value *DstSV, uint64_t DstSVOff) {
3394 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3396 // Expand memset to a series of load/store ops if the size operand
3397 // falls below a certain threshold.
3398 std::vector<EVT> MemOps;
3401 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3402 Size, Align, Str, CopyFromStr, DAG, TLI))
3405 SmallVector<SDValue, 8> OutChains;
3406 uint64_t DstOff = 0;
3408 unsigned NumMemOps = MemOps.size();
3409 for (unsigned i = 0; i < NumMemOps; i++) {
3411 unsigned VTSize = VT.getSizeInBits() / 8;
3412 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3413 SDValue Store = DAG.getStore(Chain, dl, Value,
3414 getMemBasePlusOffset(Dst, DstOff, DAG),
3415 DstSV, DstSVOff + DstOff, false, false, 0);
3416 OutChains.push_back(Store);
3420 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3421 &OutChains[0], OutChains.size());
3424 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3425 SDValue Src, SDValue Size,
3426 unsigned Align, bool AlwaysInline,
3427 const Value *DstSV, uint64_t DstSVOff,
3428 const Value *SrcSV, uint64_t SrcSVOff) {
3430 // Check to see if we should lower the memcpy to loads and stores first.
3431 // For cases within the target-specified limits, this is the best choice.
3432 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3434 // Memcpy with size zero? Just return the original chain.
3435 if (ConstantSize->isNullValue())
3439 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3440 ConstantSize->getZExtValue(),
3441 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3442 if (Result.getNode())
3446 // Then check to see if we should lower the memcpy with target-specific
3447 // code. If the target chooses to do this, this is the next best.
3449 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3451 DstSV, DstSVOff, SrcSV, SrcSVOff);
3452 if (Result.getNode())
3455 // If we really need inline code and the target declined to provide it,
3456 // use a (potentially long) sequence of loads and stores.
3458 assert(ConstantSize && "AlwaysInline requires a constant size!");
3459 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3460 ConstantSize->getZExtValue(), Align, true,
3461 DstSV, DstSVOff, SrcSV, SrcSVOff);
3464 // Emit a library call.
3465 TargetLowering::ArgListTy Args;
3466 TargetLowering::ArgListEntry Entry;
3467 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3468 Entry.Node = Dst; Args.push_back(Entry);
3469 Entry.Node = Src; Args.push_back(Entry);
3470 Entry.Node = Size; Args.push_back(Entry);
3471 // FIXME: pass in DebugLoc
3472 std::pair<SDValue,SDValue> CallResult =
3473 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3474 false, false, false, false, 0,
3475 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3476 /*isReturnValueUsed=*/false,
3477 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3478 TLI.getPointerTy()),
3479 Args, *this, dl, GetOrdering(Chain.getNode()));
3480 return CallResult.second;
3483 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3484 SDValue Src, SDValue Size,
3486 const Value *DstSV, uint64_t DstSVOff,
3487 const Value *SrcSV, uint64_t SrcSVOff) {
3489 // Check to see if we should lower the memmove to loads and stores first.
3490 // For cases within the target-specified limits, this is the best choice.
3491 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3493 // Memmove with size zero? Just return the original chain.
3494 if (ConstantSize->isNullValue())
3498 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3499 ConstantSize->getZExtValue(),
3500 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3501 if (Result.getNode())
3505 // Then check to see if we should lower the memmove with target-specific
3506 // code. If the target chooses to do this, this is the next best.
3508 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3509 DstSV, DstSVOff, SrcSV, SrcSVOff);
3510 if (Result.getNode())
3513 // Emit a library call.
3514 TargetLowering::ArgListTy Args;
3515 TargetLowering::ArgListEntry Entry;
3516 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3517 Entry.Node = Dst; Args.push_back(Entry);
3518 Entry.Node = Src; Args.push_back(Entry);
3519 Entry.Node = Size; Args.push_back(Entry);
3520 // FIXME: pass in DebugLoc
3521 std::pair<SDValue,SDValue> CallResult =
3522 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3523 false, false, false, false, 0,
3524 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3525 /*isReturnValueUsed=*/false,
3526 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3527 TLI.getPointerTy()),
3528 Args, *this, dl, GetOrdering(Chain.getNode()));
3529 return CallResult.second;
3532 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3533 SDValue Src, SDValue Size,
3535 const Value *DstSV, uint64_t DstSVOff) {
3537 // Check to see if we should lower the memset to stores first.
3538 // For cases within the target-specified limits, this is the best choice.
3539 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3541 // Memset with size zero? Just return the original chain.
3542 if (ConstantSize->isNullValue())
3546 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3547 Align, DstSV, DstSVOff);
3548 if (Result.getNode())
3552 // Then check to see if we should lower the memset with target-specific
3553 // code. If the target chooses to do this, this is the next best.
3555 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3557 if (Result.getNode())
3560 // Emit a library call.
3561 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3562 TargetLowering::ArgListTy Args;
3563 TargetLowering::ArgListEntry Entry;
3564 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3565 Args.push_back(Entry);
3566 // Extend or truncate the argument to be an i32 value for the call.
3567 if (Src.getValueType().bitsGT(MVT::i32))
3568 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3570 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3572 Entry.Ty = Type::getInt32Ty(*getContext());
3573 Entry.isSExt = true;
3574 Args.push_back(Entry);
3576 Entry.Ty = IntPtrTy;
3577 Entry.isSExt = false;
3578 Args.push_back(Entry);
3579 // FIXME: pass in DebugLoc
3580 std::pair<SDValue,SDValue> CallResult =
3581 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3582 false, false, false, false, 0,
3583 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3584 /*isReturnValueUsed=*/false,
3585 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3586 TLI.getPointerTy()),
3587 Args, *this, dl, GetOrdering(Chain.getNode()));
3588 return CallResult.second;
3591 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3593 SDValue Ptr, SDValue Cmp,
3594 SDValue Swp, const Value* PtrVal,
3595 unsigned Alignment) {
3596 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3597 Alignment = getEVTAlignment(MemVT);
3599 // Check if the memory reference references a frame index
3601 if (const FrameIndexSDNode *FI =
3602 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3603 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3605 MachineFunction &MF = getMachineFunction();
3606 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3608 // For now, atomics are considered to be volatile always.
3609 Flags |= MachineMemOperand::MOVolatile;
3611 MachineMemOperand *MMO =
3612 MF.getMachineMemOperand(PtrVal, Flags, 0,
3613 MemVT.getStoreSize(), Alignment);
3615 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3618 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3620 SDValue Ptr, SDValue Cmp,
3621 SDValue Swp, MachineMemOperand *MMO) {
3622 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3623 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3625 EVT VT = Cmp.getValueType();
3627 SDVTList VTs = getVTList(VT, MVT::Other);
3628 FoldingSetNodeID ID;
3629 ID.AddInteger(MemVT.getRawBits());
3630 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3631 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3633 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3634 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3635 return SDValue(E, 0);
3637 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3638 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3639 CSEMap.InsertNode(N, IP);
3640 AllNodes.push_back(N);
3641 return SDValue(N, 0);
3644 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3646 SDValue Ptr, SDValue Val,
3647 const Value* PtrVal,
3648 unsigned Alignment) {
3649 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3650 Alignment = getEVTAlignment(MemVT);
3652 // Check if the memory reference references a frame index
3654 if (const FrameIndexSDNode *FI =
3655 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3656 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3658 MachineFunction &MF = getMachineFunction();
3659 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3661 // For now, atomics are considered to be volatile always.
3662 Flags |= MachineMemOperand::MOVolatile;
3664 MachineMemOperand *MMO =
3665 MF.getMachineMemOperand(PtrVal, Flags, 0,
3666 MemVT.getStoreSize(), Alignment);
3668 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3671 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3673 SDValue Ptr, SDValue Val,
3674 MachineMemOperand *MMO) {
3675 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3676 Opcode == ISD::ATOMIC_LOAD_SUB ||
3677 Opcode == ISD::ATOMIC_LOAD_AND ||
3678 Opcode == ISD::ATOMIC_LOAD_OR ||
3679 Opcode == ISD::ATOMIC_LOAD_XOR ||
3680 Opcode == ISD::ATOMIC_LOAD_NAND ||
3681 Opcode == ISD::ATOMIC_LOAD_MIN ||
3682 Opcode == ISD::ATOMIC_LOAD_MAX ||
3683 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3684 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3685 Opcode == ISD::ATOMIC_SWAP) &&
3686 "Invalid Atomic Op");
3688 EVT VT = Val.getValueType();
3690 SDVTList VTs = getVTList(VT, MVT::Other);
3691 FoldingSetNodeID ID;
3692 ID.AddInteger(MemVT.getRawBits());
3693 SDValue Ops[] = {Chain, Ptr, Val};
3694 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3696 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3697 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3698 return SDValue(E, 0);
3700 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3701 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3702 CSEMap.InsertNode(N, IP);
3703 AllNodes.push_back(N);
3704 return SDValue(N, 0);
3707 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3708 /// Allowed to return something different (and simpler) if Simplify is true.
3709 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3714 SmallVector<EVT, 4> VTs;
3715 VTs.reserve(NumOps);
3716 for (unsigned i = 0; i < NumOps; ++i)
3717 VTs.push_back(Ops[i].getValueType());
3718 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3723 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3724 const EVT *VTs, unsigned NumVTs,
3725 const SDValue *Ops, unsigned NumOps,
3726 EVT MemVT, const Value *srcValue, int SVOff,
3727 unsigned Align, bool Vol,
3728 bool ReadMem, bool WriteMem) {
3729 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3730 MemVT, srcValue, SVOff, Align, Vol,
3735 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3736 const SDValue *Ops, unsigned NumOps,
3737 EVT MemVT, const Value *srcValue, int SVOff,
3738 unsigned Align, bool Vol,
3739 bool ReadMem, bool WriteMem) {
3740 if (Align == 0) // Ensure that codegen never sees alignment 0
3741 Align = getEVTAlignment(MemVT);
3743 MachineFunction &MF = getMachineFunction();
3746 Flags |= MachineMemOperand::MOStore;
3748 Flags |= MachineMemOperand::MOLoad;
3750 Flags |= MachineMemOperand::MOVolatile;
3751 MachineMemOperand *MMO =
3752 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3753 MemVT.getStoreSize(), Align);
3755 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3759 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3760 const SDValue *Ops, unsigned NumOps,
3761 EVT MemVT, MachineMemOperand *MMO) {
3762 assert((Opcode == ISD::INTRINSIC_VOID ||
3763 Opcode == ISD::INTRINSIC_W_CHAIN ||
3764 (Opcode <= INT_MAX &&
3765 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3766 "Opcode is not a memory-accessing opcode!");
3768 // Memoize the node unless it returns a flag.
3769 MemIntrinsicSDNode *N;
3770 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3771 FoldingSetNodeID ID;
3772 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3774 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3775 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3776 return SDValue(E, 0);
3779 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3780 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3781 CSEMap.InsertNode(N, IP);
3783 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3784 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3786 AllNodes.push_back(N);
3787 return SDValue(N, 0);
3791 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3792 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3793 SDValue Ptr, SDValue Offset,
3794 const Value *SV, int SVOffset, EVT MemVT,
3795 bool isVolatile, bool isNonTemporal,
3796 unsigned Alignment) {
3797 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3798 Alignment = getEVTAlignment(VT);
3800 // Check if the memory reference references a frame index
3802 if (const FrameIndexSDNode *FI =
3803 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3804 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3806 MachineFunction &MF = getMachineFunction();
3807 unsigned Flags = MachineMemOperand::MOLoad;
3809 Flags |= MachineMemOperand::MOVolatile;
3811 Flags |= MachineMemOperand::MONonTemporal;
3812 MachineMemOperand *MMO =
3813 MF.getMachineMemOperand(SV, Flags, SVOffset,
3814 MemVT.getStoreSize(), Alignment);
3815 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3819 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3820 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3821 SDValue Ptr, SDValue Offset, EVT MemVT,
3822 MachineMemOperand *MMO) {
3824 ExtType = ISD::NON_EXTLOAD;
3825 } else if (ExtType == ISD::NON_EXTLOAD) {
3826 assert(VT == MemVT && "Non-extending load from different memory type!");
3829 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3830 "Should only be an extending load, not truncating!");
3831 assert(VT.isInteger() == MemVT.isInteger() &&
3832 "Cannot convert from FP to Int or Int -> FP!");
3833 assert(VT.isVector() == MemVT.isVector() &&
3834 "Cannot use trunc store to convert to or from a vector!");
3835 assert((!VT.isVector() ||
3836 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3837 "Cannot use trunc store to change the number of vector elements!");
3840 bool Indexed = AM != ISD::UNINDEXED;
3841 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3842 "Unindexed load with an offset!");
3844 SDVTList VTs = Indexed ?
3845 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3846 SDValue Ops[] = { Chain, Ptr, Offset };
3847 FoldingSetNodeID ID;
3848 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3849 ID.AddInteger(MemVT.getRawBits());
3850 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3851 MMO->isNonTemporal()));
3853 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3854 cast<LoadSDNode>(E)->refineAlignment(MMO);
3855 return SDValue(E, 0);
3857 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3858 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3859 CSEMap.InsertNode(N, IP);
3860 AllNodes.push_back(N);
3861 return SDValue(N, 0);
3864 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3865 SDValue Chain, SDValue Ptr,
3866 const Value *SV, int SVOffset,
3867 bool isVolatile, bool isNonTemporal,
3868 unsigned Alignment) {
3869 SDValue Undef = getUNDEF(Ptr.getValueType());
3870 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3871 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3874 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3875 SDValue Chain, SDValue Ptr,
3877 int SVOffset, EVT MemVT,
3878 bool isVolatile, bool isNonTemporal,
3879 unsigned Alignment) {
3880 SDValue Undef = getUNDEF(Ptr.getValueType());
3881 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3882 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3886 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3887 SDValue Offset, ISD::MemIndexedMode AM) {
3888 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3889 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3890 "Load is already a indexed load!");
3891 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3892 LD->getChain(), Base, Offset, LD->getSrcValue(),
3893 LD->getSrcValueOffset(), LD->getMemoryVT(),
3894 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3897 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3898 SDValue Ptr, const Value *SV, int SVOffset,
3899 bool isVolatile, bool isNonTemporal,
3900 unsigned Alignment) {
3901 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3902 Alignment = getEVTAlignment(Val.getValueType());
3904 // Check if the memory reference references a frame index
3906 if (const FrameIndexSDNode *FI =
3907 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3908 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3910 MachineFunction &MF = getMachineFunction();
3911 unsigned Flags = MachineMemOperand::MOStore;
3913 Flags |= MachineMemOperand::MOVolatile;
3915 Flags |= MachineMemOperand::MONonTemporal;
3916 MachineMemOperand *MMO =
3917 MF.getMachineMemOperand(SV, Flags, SVOffset,
3918 Val.getValueType().getStoreSize(), Alignment);
3920 return getStore(Chain, dl, Val, Ptr, MMO);
3923 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3924 SDValue Ptr, MachineMemOperand *MMO) {
3925 EVT VT = Val.getValueType();
3926 SDVTList VTs = getVTList(MVT::Other);
3927 SDValue Undef = getUNDEF(Ptr.getValueType());
3928 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3929 FoldingSetNodeID ID;
3930 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3931 ID.AddInteger(VT.getRawBits());
3932 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
3933 MMO->isNonTemporal()));
3935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3936 cast<StoreSDNode>(E)->refineAlignment(MMO);
3937 return SDValue(E, 0);
3939 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3940 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3941 CSEMap.InsertNode(N, IP);
3942 AllNodes.push_back(N);
3943 return SDValue(N, 0);
3946 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3947 SDValue Ptr, const Value *SV,
3948 int SVOffset, EVT SVT,
3949 bool isVolatile, bool isNonTemporal,
3950 unsigned Alignment) {
3951 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3952 Alignment = getEVTAlignment(SVT);
3954 // Check if the memory reference references a frame index
3956 if (const FrameIndexSDNode *FI =
3957 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3958 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3960 MachineFunction &MF = getMachineFunction();
3961 unsigned Flags = MachineMemOperand::MOStore;
3963 Flags |= MachineMemOperand::MOVolatile;
3965 Flags |= MachineMemOperand::MONonTemporal;
3966 MachineMemOperand *MMO =
3967 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3969 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3972 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3973 SDValue Ptr, EVT SVT,
3974 MachineMemOperand *MMO) {
3975 EVT VT = Val.getValueType();
3978 return getStore(Chain, dl, Val, Ptr, MMO);
3980 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
3981 "Should only be a truncating store, not extending!");
3982 assert(VT.isInteger() == SVT.isInteger() &&
3983 "Can't do FP-INT conversion!");
3984 assert(VT.isVector() == SVT.isVector() &&
3985 "Cannot use trunc store to convert to or from a vector!");
3986 assert((!VT.isVector() ||
3987 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
3988 "Cannot use trunc store to change the number of vector elements!");
3990 SDVTList VTs = getVTList(MVT::Other);
3991 SDValue Undef = getUNDEF(Ptr.getValueType());
3992 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3993 FoldingSetNodeID ID;
3994 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3995 ID.AddInteger(SVT.getRawBits());
3996 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
3997 MMO->isNonTemporal()));
3999 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4000 cast<StoreSDNode>(E)->refineAlignment(MMO);
4001 return SDValue(E, 0);
4003 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4004 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
4005 CSEMap.InsertNode(N, IP);
4006 AllNodes.push_back(N);
4007 return SDValue(N, 0);
4011 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4012 SDValue Offset, ISD::MemIndexedMode AM) {
4013 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4014 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4015 "Store is already a indexed store!");
4016 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4017 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4018 FoldingSetNodeID ID;
4019 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4020 ID.AddInteger(ST->getMemoryVT().getRawBits());
4021 ID.AddInteger(ST->getRawSubclassData());
4023 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4024 return SDValue(E, 0);
4026 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4027 new (N) StoreSDNode(Ops, dl, VTs, AM,
4028 ST->isTruncatingStore(), ST->getMemoryVT(),
4029 ST->getMemOperand());
4030 CSEMap.InsertNode(N, IP);
4031 AllNodes.push_back(N);
4032 return SDValue(N, 0);
4035 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4036 SDValue Chain, SDValue Ptr,
4038 SDValue Ops[] = { Chain, Ptr, SV };
4039 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4042 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4043 const SDUse *Ops, unsigned NumOps) {
4045 case 0: return getNode(Opcode, DL, VT);
4046 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4047 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4048 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4052 // Copy from an SDUse array into an SDValue array for use with
4053 // the regular getNode logic.
4054 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4055 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4058 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4059 const SDValue *Ops, unsigned NumOps) {
4061 case 0: return getNode(Opcode, DL, VT);
4062 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4063 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4064 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4070 case ISD::SELECT_CC: {
4071 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4072 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4073 "LHS and RHS of condition must have same type!");
4074 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4075 "True and False arms of SelectCC must have same type!");
4076 assert(Ops[2].getValueType() == VT &&
4077 "select_cc node must be of same type as true and false value!");
4081 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4082 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4083 "LHS/RHS of comparison should match types!");
4090 SDVTList VTs = getVTList(VT);
4092 if (VT != MVT::Flag) {
4093 FoldingSetNodeID ID;
4094 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4097 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4098 return SDValue(E, 0);
4100 N = NodeAllocator.Allocate<SDNode>();
4101 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4102 CSEMap.InsertNode(N, IP);
4104 N = NodeAllocator.Allocate<SDNode>();
4105 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4108 AllNodes.push_back(N);
4112 return SDValue(N, 0);
4115 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4116 const std::vector<EVT> &ResultTys,
4117 const SDValue *Ops, unsigned NumOps) {
4118 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4122 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4123 const EVT *VTs, unsigned NumVTs,
4124 const SDValue *Ops, unsigned NumOps) {
4126 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4127 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4130 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4131 const SDValue *Ops, unsigned NumOps) {
4132 if (VTList.NumVTs == 1)
4133 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4137 // FIXME: figure out how to safely handle things like
4138 // int foo(int x) { return 1 << (x & 255); }
4139 // int bar() { return foo(256); }
4140 case ISD::SRA_PARTS:
4141 case ISD::SRL_PARTS:
4142 case ISD::SHL_PARTS:
4143 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4144 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4145 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4146 else if (N3.getOpcode() == ISD::AND)
4147 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4148 // If the and is only masking out bits that cannot effect the shift,
4149 // eliminate the and.
4150 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4151 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4152 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4158 // Memoize the node unless it returns a flag.
4160 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4161 FoldingSetNodeID ID;
4162 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4165 return SDValue(E, 0);
4168 N = NodeAllocator.Allocate<UnarySDNode>();
4169 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4170 } else if (NumOps == 2) {
4171 N = NodeAllocator.Allocate<BinarySDNode>();
4172 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4173 } else if (NumOps == 3) {
4174 N = NodeAllocator.Allocate<TernarySDNode>();
4175 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4177 N = NodeAllocator.Allocate<SDNode>();
4178 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4180 CSEMap.InsertNode(N, IP);
4183 N = NodeAllocator.Allocate<UnarySDNode>();
4184 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4185 } else if (NumOps == 2) {
4186 N = NodeAllocator.Allocate<BinarySDNode>();
4187 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4188 } else if (NumOps == 3) {
4189 N = NodeAllocator.Allocate<TernarySDNode>();
4190 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4192 N = NodeAllocator.Allocate<SDNode>();
4193 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4196 AllNodes.push_back(N);
4200 return SDValue(N, 0);
4203 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4204 return getNode(Opcode, DL, VTList, 0, 0);
4207 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4209 SDValue Ops[] = { N1 };
4210 return getNode(Opcode, DL, VTList, Ops, 1);
4213 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4214 SDValue N1, SDValue N2) {
4215 SDValue Ops[] = { N1, N2 };
4216 return getNode(Opcode, DL, VTList, Ops, 2);
4219 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4220 SDValue N1, SDValue N2, SDValue N3) {
4221 SDValue Ops[] = { N1, N2, N3 };
4222 return getNode(Opcode, DL, VTList, Ops, 3);
4225 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4226 SDValue N1, SDValue N2, SDValue N3,
4228 SDValue Ops[] = { N1, N2, N3, N4 };
4229 return getNode(Opcode, DL, VTList, Ops, 4);
4232 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4233 SDValue N1, SDValue N2, SDValue N3,
4234 SDValue N4, SDValue N5) {
4235 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4236 return getNode(Opcode, DL, VTList, Ops, 5);
4239 SDVTList SelectionDAG::getVTList(EVT VT) {
4240 return makeVTList(SDNode::getValueTypeList(VT), 1);
4243 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4244 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4245 E = VTList.rend(); I != E; ++I)
4246 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4249 EVT *Array = Allocator.Allocate<EVT>(2);
4252 SDVTList Result = makeVTList(Array, 2);
4253 VTList.push_back(Result);
4257 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4258 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4259 E = VTList.rend(); I != E; ++I)
4260 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4264 EVT *Array = Allocator.Allocate<EVT>(3);
4268 SDVTList Result = makeVTList(Array, 3);
4269 VTList.push_back(Result);
4273 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4274 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4275 E = VTList.rend(); I != E; ++I)
4276 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4277 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4280 EVT *Array = Allocator.Allocate<EVT>(4);
4285 SDVTList Result = makeVTList(Array, 4);
4286 VTList.push_back(Result);
4290 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4292 case 0: llvm_unreachable("Cannot have nodes without results!");
4293 case 1: return getVTList(VTs[0]);
4294 case 2: return getVTList(VTs[0], VTs[1]);
4295 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4296 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4300 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4301 E = VTList.rend(); I != E; ++I) {
4302 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4305 bool NoMatch = false;
4306 for (unsigned i = 2; i != NumVTs; ++i)
4307 if (VTs[i] != I->VTs[i]) {
4315 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4316 std::copy(VTs, VTs+NumVTs, Array);
4317 SDVTList Result = makeVTList(Array, NumVTs);
4318 VTList.push_back(Result);
4323 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4324 /// specified operands. If the resultant node already exists in the DAG,
4325 /// this does not modify the specified node, instead it returns the node that
4326 /// already exists. If the resultant node does not exist in the DAG, the
4327 /// input node is returned. As a degenerate case, if you specify the same
4328 /// input operands as the node already has, the input node is returned.
4329 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4330 SDNode *N = InN.getNode();
4331 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4333 // Check to see if there is no change.
4334 if (Op == N->getOperand(0)) return InN;
4336 // See if the modified node already exists.
4337 void *InsertPos = 0;
4338 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4339 return SDValue(Existing, InN.getResNo());
4341 // Nope it doesn't. Remove the node from its current place in the maps.
4343 if (!RemoveNodeFromCSEMaps(N))
4346 // Now we update the operands.
4347 N->OperandList[0].set(Op);
4349 // If this gets put into a CSE map, add it.
4350 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4354 SDValue SelectionDAG::
4355 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4356 SDNode *N = InN.getNode();
4357 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4359 // Check to see if there is no change.
4360 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4361 return InN; // No operands changed, just return the input node.
4363 // See if the modified node already exists.
4364 void *InsertPos = 0;
4365 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4366 return SDValue(Existing, InN.getResNo());
4368 // Nope it doesn't. Remove the node from its current place in the maps.
4370 if (!RemoveNodeFromCSEMaps(N))
4373 // Now we update the operands.
4374 if (N->OperandList[0] != Op1)
4375 N->OperandList[0].set(Op1);
4376 if (N->OperandList[1] != Op2)
4377 N->OperandList[1].set(Op2);
4379 // If this gets put into a CSE map, add it.
4380 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4384 SDValue SelectionDAG::
4385 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4386 SDValue Ops[] = { Op1, Op2, Op3 };
4387 return UpdateNodeOperands(N, Ops, 3);
4390 SDValue SelectionDAG::
4391 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4392 SDValue Op3, SDValue Op4) {
4393 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4394 return UpdateNodeOperands(N, Ops, 4);
4397 SDValue SelectionDAG::
4398 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4399 SDValue Op3, SDValue Op4, SDValue Op5) {
4400 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4401 return UpdateNodeOperands(N, Ops, 5);
4404 SDValue SelectionDAG::
4405 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4406 SDNode *N = InN.getNode();
4407 assert(N->getNumOperands() == NumOps &&
4408 "Update with wrong number of operands");
4410 // Check to see if there is no change.
4411 bool AnyChange = false;
4412 for (unsigned i = 0; i != NumOps; ++i) {
4413 if (Ops[i] != N->getOperand(i)) {
4419 // No operands changed, just return the input node.
4420 if (!AnyChange) return InN;
4422 // See if the modified node already exists.
4423 void *InsertPos = 0;
4424 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4425 return SDValue(Existing, InN.getResNo());
4427 // Nope it doesn't. Remove the node from its current place in the maps.
4429 if (!RemoveNodeFromCSEMaps(N))
4432 // Now we update the operands.
4433 for (unsigned i = 0; i != NumOps; ++i)
4434 if (N->OperandList[i] != Ops[i])
4435 N->OperandList[i].set(Ops[i]);
4437 // If this gets put into a CSE map, add it.
4438 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4442 /// DropOperands - Release the operands and set this node to have
4444 void SDNode::DropOperands() {
4445 // Unlike the code in MorphNodeTo that does this, we don't need to
4446 // watch for dead nodes here.
4447 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4453 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4456 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4458 SDVTList VTs = getVTList(VT);
4459 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4462 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4463 EVT VT, SDValue Op1) {
4464 SDVTList VTs = getVTList(VT);
4465 SDValue Ops[] = { Op1 };
4466 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4469 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4470 EVT VT, SDValue Op1,
4472 SDVTList VTs = getVTList(VT);
4473 SDValue Ops[] = { Op1, Op2 };
4474 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4477 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4478 EVT VT, SDValue Op1,
4479 SDValue Op2, SDValue Op3) {
4480 SDVTList VTs = getVTList(VT);
4481 SDValue Ops[] = { Op1, Op2, Op3 };
4482 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4485 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4486 EVT VT, const SDValue *Ops,
4488 SDVTList VTs = getVTList(VT);
4489 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4492 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4493 EVT VT1, EVT VT2, const SDValue *Ops,
4495 SDVTList VTs = getVTList(VT1, VT2);
4496 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4499 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4501 SDVTList VTs = getVTList(VT1, VT2);
4502 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4505 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4506 EVT VT1, EVT VT2, EVT VT3,
4507 const SDValue *Ops, unsigned NumOps) {
4508 SDVTList VTs = getVTList(VT1, VT2, VT3);
4509 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4512 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4513 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4514 const SDValue *Ops, unsigned NumOps) {
4515 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4516 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4519 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4522 SDVTList VTs = getVTList(VT1, VT2);
4523 SDValue Ops[] = { Op1 };
4524 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4527 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4529 SDValue Op1, SDValue Op2) {
4530 SDVTList VTs = getVTList(VT1, VT2);
4531 SDValue Ops[] = { Op1, Op2 };
4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4535 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4537 SDValue Op1, SDValue Op2,
4539 SDVTList VTs = getVTList(VT1, VT2);
4540 SDValue Ops[] = { Op1, Op2, Op3 };
4541 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4544 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4545 EVT VT1, EVT VT2, EVT VT3,
4546 SDValue Op1, SDValue Op2,
4548 SDVTList VTs = getVTList(VT1, VT2, VT3);
4549 SDValue Ops[] = { Op1, Op2, Op3 };
4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4553 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4554 SDVTList VTs, const SDValue *Ops,
4556 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4559 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4561 SDVTList VTs = getVTList(VT);
4562 return MorphNodeTo(N, Opc, VTs, 0, 0);
4565 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4566 EVT VT, SDValue Op1) {
4567 SDVTList VTs = getVTList(VT);
4568 SDValue Ops[] = { Op1 };
4569 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4572 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4573 EVT VT, SDValue Op1,
4575 SDVTList VTs = getVTList(VT);
4576 SDValue Ops[] = { Op1, Op2 };
4577 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4580 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4581 EVT VT, SDValue Op1,
4582 SDValue Op2, SDValue Op3) {
4583 SDVTList VTs = getVTList(VT);
4584 SDValue Ops[] = { Op1, Op2, Op3 };
4585 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4588 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4589 EVT VT, const SDValue *Ops,
4591 SDVTList VTs = getVTList(VT);
4592 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4595 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4596 EVT VT1, EVT VT2, const SDValue *Ops,
4598 SDVTList VTs = getVTList(VT1, VT2);
4599 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4602 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4604 SDVTList VTs = getVTList(VT1, VT2);
4605 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4608 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4609 EVT VT1, EVT VT2, EVT VT3,
4610 const SDValue *Ops, unsigned NumOps) {
4611 SDVTList VTs = getVTList(VT1, VT2, VT3);
4612 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4615 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4618 SDVTList VTs = getVTList(VT1, VT2);
4619 SDValue Ops[] = { Op1 };
4620 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4623 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4625 SDValue Op1, SDValue Op2) {
4626 SDVTList VTs = getVTList(VT1, VT2);
4627 SDValue Ops[] = { Op1, Op2 };
4628 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4631 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4633 SDValue Op1, SDValue Op2,
4635 SDVTList VTs = getVTList(VT1, VT2);
4636 SDValue Ops[] = { Op1, Op2, Op3 };
4637 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4640 /// MorphNodeTo - These *mutate* the specified node to have the specified
4641 /// return type, opcode, and operands.
4643 /// Note that MorphNodeTo returns the resultant node. If there is already a
4644 /// node of the specified opcode and operands, it returns that node instead of
4645 /// the current one. Note that the DebugLoc need not be the same.
4647 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4648 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4649 /// node, and because it doesn't require CSE recalculation for any of
4650 /// the node's users.
4652 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4653 SDVTList VTs, const SDValue *Ops,
4655 // If an identical node already exists, use it.
4657 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4658 FoldingSetNodeID ID;
4659 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4660 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4664 if (!RemoveNodeFromCSEMaps(N))
4667 // Start the morphing.
4669 N->ValueList = VTs.VTs;
4670 N->NumValues = VTs.NumVTs;
4672 // Clear the operands list, updating used nodes to remove this from their
4673 // use list. Keep track of any operands that become dead as a result.
4674 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4675 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4677 SDNode *Used = Use.getNode();
4679 if (Used->use_empty())
4680 DeadNodeSet.insert(Used);
4683 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4684 // Initialize the memory references information.
4685 MN->setMemRefs(0, 0);
4686 // If NumOps is larger than the # of operands we can have in a
4687 // MachineSDNode, reallocate the operand list.
4688 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4689 if (MN->OperandsNeedDelete)
4690 delete[] MN->OperandList;
4691 if (NumOps > array_lengthof(MN->LocalOperands))
4692 // We're creating a final node that will live unmorphed for the
4693 // remainder of the current SelectionDAG iteration, so we can allocate
4694 // the operands directly out of a pool with no recycling metadata.
4695 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4698 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4699 MN->OperandsNeedDelete = false;
4701 MN->InitOperands(MN->OperandList, Ops, NumOps);
4703 // If NumOps is larger than the # of operands we currently have, reallocate
4704 // the operand list.
4705 if (NumOps > N->NumOperands) {
4706 if (N->OperandsNeedDelete)
4707 delete[] N->OperandList;
4708 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4709 N->OperandsNeedDelete = true;
4711 N->InitOperands(N->OperandList, Ops, NumOps);
4714 // Delete any nodes that are still dead after adding the uses for the
4716 SmallVector<SDNode *, 16> DeadNodes;
4717 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4718 E = DeadNodeSet.end(); I != E; ++I)
4719 if ((*I)->use_empty())
4720 DeadNodes.push_back(*I);
4721 RemoveDeadNodes(DeadNodes);
4724 CSEMap.InsertNode(N, IP); // Memoize the new node.
4729 /// getMachineNode - These are used for target selectors to create a new node
4730 /// with specified return type(s), MachineInstr opcode, and operands.
4732 /// Note that getMachineNode returns the resultant node. If there is already a
4733 /// node of the specified opcode and operands, it returns that node instead of
4734 /// the current one.
4736 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4737 SDVTList VTs = getVTList(VT);
4738 return getMachineNode(Opcode, dl, VTs, 0, 0);
4742 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4743 SDVTList VTs = getVTList(VT);
4744 SDValue Ops[] = { Op1 };
4745 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4749 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4750 SDValue Op1, SDValue Op2) {
4751 SDVTList VTs = getVTList(VT);
4752 SDValue Ops[] = { Op1, Op2 };
4753 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4757 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4758 SDValue Op1, SDValue Op2, SDValue Op3) {
4759 SDVTList VTs = getVTList(VT);
4760 SDValue Ops[] = { Op1, Op2, Op3 };
4761 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4765 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4766 const SDValue *Ops, unsigned NumOps) {
4767 SDVTList VTs = getVTList(VT);
4768 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4772 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4773 SDVTList VTs = getVTList(VT1, VT2);
4774 return getMachineNode(Opcode, dl, VTs, 0, 0);
4778 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4779 EVT VT1, EVT VT2, SDValue Op1) {
4780 SDVTList VTs = getVTList(VT1, VT2);
4781 SDValue Ops[] = { Op1 };
4782 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4786 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4787 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4788 SDVTList VTs = getVTList(VT1, VT2);
4789 SDValue Ops[] = { Op1, Op2 };
4790 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4794 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4795 EVT VT1, EVT VT2, SDValue Op1,
4796 SDValue Op2, SDValue Op3) {
4797 SDVTList VTs = getVTList(VT1, VT2);
4798 SDValue Ops[] = { Op1, Op2, Op3 };
4799 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4803 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4805 const SDValue *Ops, unsigned NumOps) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4811 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4812 EVT VT1, EVT VT2, EVT VT3,
4813 SDValue Op1, SDValue Op2) {
4814 SDVTList VTs = getVTList(VT1, VT2, VT3);
4815 SDValue Ops[] = { Op1, Op2 };
4816 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4820 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4821 EVT VT1, EVT VT2, EVT VT3,
4822 SDValue Op1, SDValue Op2, SDValue Op3) {
4823 SDVTList VTs = getVTList(VT1, VT2, VT3);
4824 SDValue Ops[] = { Op1, Op2, Op3 };
4825 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4830 EVT VT1, EVT VT2, EVT VT3,
4831 const SDValue *Ops, unsigned NumOps) {
4832 SDVTList VTs = getVTList(VT1, VT2, VT3);
4833 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4837 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4838 EVT VT2, EVT VT3, EVT VT4,
4839 const SDValue *Ops, unsigned NumOps) {
4840 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4841 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4845 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4846 const std::vector<EVT> &ResultTys,
4847 const SDValue *Ops, unsigned NumOps) {
4848 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4849 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4853 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4854 const SDValue *Ops, unsigned NumOps) {
4855 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4860 FoldingSetNodeID ID;
4861 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4864 return cast<MachineSDNode>(E);
4867 // Allocate a new MachineSDNode.
4868 N = NodeAllocator.Allocate<MachineSDNode>();
4869 new (N) MachineSDNode(~Opcode, DL, VTs);
4871 // Initialize the operands list.
4872 if (NumOps > array_lengthof(N->LocalOperands))
4873 // We're creating a final node that will live unmorphed for the
4874 // remainder of the current SelectionDAG iteration, so we can allocate
4875 // the operands directly out of a pool with no recycling metadata.
4876 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4879 N->InitOperands(N->LocalOperands, Ops, NumOps);
4880 N->OperandsNeedDelete = false;
4883 CSEMap.InsertNode(N, IP);
4885 AllNodes.push_back(N);
4892 /// getTargetExtractSubreg - A convenience function for creating
4893 /// TargetOpcode::EXTRACT_SUBREG nodes.
4895 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4897 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4898 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4899 VT, Operand, SRIdxVal);
4900 return SDValue(Subreg, 0);
4903 /// getTargetInsertSubreg - A convenience function for creating
4904 /// TargetOpcode::INSERT_SUBREG nodes.
4906 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4907 SDValue Operand, SDValue Subreg) {
4908 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4909 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4910 VT, Operand, Subreg, SRIdxVal);
4911 return SDValue(Result, 0);
4914 /// getNodeIfExists - Get the specified node if it's already available, or
4915 /// else return NULL.
4916 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4917 const SDValue *Ops, unsigned NumOps) {
4918 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4919 FoldingSetNodeID ID;
4920 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4922 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4928 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4929 /// This can cause recursive merging of nodes in the DAG.
4931 /// This version assumes From has a single result value.
4933 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4934 DAGUpdateListener *UpdateListener) {
4935 SDNode *From = FromN.getNode();
4936 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4937 "Cannot replace with this method!");
4938 assert(From != To.getNode() && "Cannot replace uses of with self");
4940 // Iterate over all the existing uses of From. New uses will be added
4941 // to the beginning of the use list, which we avoid visiting.
4942 // This specifically avoids visiting uses of From that arise while the
4943 // replacement is happening, because any such uses would be the result
4944 // of CSE: If an existing node looks like From after one of its operands
4945 // is replaced by To, we don't want to replace of all its users with To
4946 // too. See PR3018 for more info.
4947 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4951 // This node is about to morph, remove its old self from the CSE maps.
4952 RemoveNodeFromCSEMaps(User);
4954 // A user can appear in a use list multiple times, and when this
4955 // happens the uses are usually next to each other in the list.
4956 // To help reduce the number of CSE recomputations, process all
4957 // the uses of this user that we can find this way.
4959 SDUse &Use = UI.getUse();
4962 } while (UI != UE && *UI == User);
4964 // Now that we have modified User, add it back to the CSE maps. If it
4965 // already exists there, recursively merge the results together.
4966 AddModifiedNodeToCSEMaps(User, UpdateListener);
4970 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4971 /// This can cause recursive merging of nodes in the DAG.
4973 /// This version assumes that for each value of From, there is a
4974 /// corresponding value in To in the same position with the same type.
4976 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4977 DAGUpdateListener *UpdateListener) {
4979 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4980 assert((!From->hasAnyUseOfValue(i) ||
4981 From->getValueType(i) == To->getValueType(i)) &&
4982 "Cannot use this version of ReplaceAllUsesWith!");
4985 // Handle the trivial case.
4989 // Iterate over just the existing users of From. See the comments in
4990 // the ReplaceAllUsesWith above.
4991 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4995 // This node is about to morph, remove its old self from the CSE maps.
4996 RemoveNodeFromCSEMaps(User);
4998 // A user can appear in a use list multiple times, and when this
4999 // happens the uses are usually next to each other in the list.
5000 // To help reduce the number of CSE recomputations, process all
5001 // the uses of this user that we can find this way.
5003 SDUse &Use = UI.getUse();
5006 } while (UI != UE && *UI == User);
5008 // Now that we have modified User, add it back to the CSE maps. If it
5009 // already exists there, recursively merge the results together.
5010 AddModifiedNodeToCSEMaps(User, UpdateListener);
5014 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5015 /// This can cause recursive merging of nodes in the DAG.
5017 /// This version can replace From with any result values. To must match the
5018 /// number and types of values returned by From.
5019 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5021 DAGUpdateListener *UpdateListener) {
5022 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5023 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5025 // Iterate over just the existing users of From. See the comments in
5026 // the ReplaceAllUsesWith above.
5027 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5031 // This node is about to morph, remove its old self from the CSE maps.
5032 RemoveNodeFromCSEMaps(User);
5034 // A user can appear in a use list multiple times, and when this
5035 // happens the uses are usually next to each other in the list.
5036 // To help reduce the number of CSE recomputations, process all
5037 // the uses of this user that we can find this way.
5039 SDUse &Use = UI.getUse();
5040 const SDValue &ToOp = To[Use.getResNo()];
5043 } while (UI != UE && *UI == User);
5045 // Now that we have modified User, add it back to the CSE maps. If it
5046 // already exists there, recursively merge the results together.
5047 AddModifiedNodeToCSEMaps(User, UpdateListener);
5051 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5052 /// uses of other values produced by From.getNode() alone. The Deleted
5053 /// vector is handled the same way as for ReplaceAllUsesWith.
5054 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5055 DAGUpdateListener *UpdateListener){
5056 // Handle the really simple, really trivial case efficiently.
5057 if (From == To) return;
5059 // Handle the simple, trivial, case efficiently.
5060 if (From.getNode()->getNumValues() == 1) {
5061 ReplaceAllUsesWith(From, To, UpdateListener);
5065 // Iterate over just the existing users of From. See the comments in
5066 // the ReplaceAllUsesWith above.
5067 SDNode::use_iterator UI = From.getNode()->use_begin(),
5068 UE = From.getNode()->use_end();
5071 bool UserRemovedFromCSEMaps = false;
5073 // A user can appear in a use list multiple times, and when this
5074 // happens the uses are usually next to each other in the list.
5075 // To help reduce the number of CSE recomputations, process all
5076 // the uses of this user that we can find this way.
5078 SDUse &Use = UI.getUse();
5080 // Skip uses of different values from the same node.
5081 if (Use.getResNo() != From.getResNo()) {
5086 // If this node hasn't been modified yet, it's still in the CSE maps,
5087 // so remove its old self from the CSE maps.
5088 if (!UserRemovedFromCSEMaps) {
5089 RemoveNodeFromCSEMaps(User);
5090 UserRemovedFromCSEMaps = true;
5095 } while (UI != UE && *UI == User);
5097 // We are iterating over all uses of the From node, so if a use
5098 // doesn't use the specific value, no changes are made.
5099 if (!UserRemovedFromCSEMaps)
5102 // Now that we have modified User, add it back to the CSE maps. If it
5103 // already exists there, recursively merge the results together.
5104 AddModifiedNodeToCSEMaps(User, UpdateListener);
5109 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5110 /// to record information about a use.
5117 /// operator< - Sort Memos by User.
5118 bool operator<(const UseMemo &L, const UseMemo &R) {
5119 return (intptr_t)L.User < (intptr_t)R.User;
5123 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5124 /// uses of other values produced by From.getNode() alone. The same value
5125 /// may appear in both the From and To list. The Deleted vector is
5126 /// handled the same way as for ReplaceAllUsesWith.
5127 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5130 DAGUpdateListener *UpdateListener){
5131 // Handle the simple, trivial case efficiently.
5133 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5135 // Read up all the uses and make records of them. This helps
5136 // processing new uses that are introduced during the
5137 // replacement process.
5138 SmallVector<UseMemo, 4> Uses;
5139 for (unsigned i = 0; i != Num; ++i) {
5140 unsigned FromResNo = From[i].getResNo();
5141 SDNode *FromNode = From[i].getNode();
5142 for (SDNode::use_iterator UI = FromNode->use_begin(),
5143 E = FromNode->use_end(); UI != E; ++UI) {
5144 SDUse &Use = UI.getUse();
5145 if (Use.getResNo() == FromResNo) {
5146 UseMemo Memo = { *UI, i, &Use };
5147 Uses.push_back(Memo);
5152 // Sort the uses, so that all the uses from a given User are together.
5153 std::sort(Uses.begin(), Uses.end());
5155 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5156 UseIndex != UseIndexEnd; ) {
5157 // We know that this user uses some value of From. If it is the right
5158 // value, update it.
5159 SDNode *User = Uses[UseIndex].User;
5161 // This node is about to morph, remove its old self from the CSE maps.
5162 RemoveNodeFromCSEMaps(User);
5164 // The Uses array is sorted, so all the uses for a given User
5165 // are next to each other in the list.
5166 // To help reduce the number of CSE recomputations, process all
5167 // the uses of this user that we can find this way.
5169 unsigned i = Uses[UseIndex].Index;
5170 SDUse &Use = *Uses[UseIndex].Use;
5174 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5176 // Now that we have modified User, add it back to the CSE maps. If it
5177 // already exists there, recursively merge the results together.
5178 AddModifiedNodeToCSEMaps(User, UpdateListener);
5182 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5183 /// based on their topological order. It returns the maximum id and a vector
5184 /// of the SDNodes* in assigned order by reference.
5185 unsigned SelectionDAG::AssignTopologicalOrder() {
5187 unsigned DAGSize = 0;
5189 // SortedPos tracks the progress of the algorithm. Nodes before it are
5190 // sorted, nodes after it are unsorted. When the algorithm completes
5191 // it is at the end of the list.
5192 allnodes_iterator SortedPos = allnodes_begin();
5194 // Visit all the nodes. Move nodes with no operands to the front of
5195 // the list immediately. Annotate nodes that do have operands with their
5196 // operand count. Before we do this, the Node Id fields of the nodes
5197 // may contain arbitrary values. After, the Node Id fields for nodes
5198 // before SortedPos will contain the topological sort index, and the
5199 // Node Id fields for nodes At SortedPos and after will contain the
5200 // count of outstanding operands.
5201 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5204 unsigned Degree = N->getNumOperands();
5206 // A node with no uses, add it to the result array immediately.
5207 N->setNodeId(DAGSize++);
5208 allnodes_iterator Q = N;
5210 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5211 assert(SortedPos != AllNodes.end() && "Overran node list");
5214 // Temporarily use the Node Id as scratch space for the degree count.
5215 N->setNodeId(Degree);
5219 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5220 // such that by the time the end is reached all nodes will be sorted.
5221 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5224 // N is in sorted position, so all its uses have one less operand
5225 // that needs to be sorted.
5226 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5229 unsigned Degree = P->getNodeId();
5230 assert(Degree != 0 && "Invalid node degree");
5233 // All of P's operands are sorted, so P may sorted now.
5234 P->setNodeId(DAGSize++);
5236 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5237 assert(SortedPos != AllNodes.end() && "Overran node list");
5240 // Update P's outstanding operand count.
5241 P->setNodeId(Degree);
5244 if (I == SortedPos) {
5247 dbgs() << "Overran sorted position:\n";
5250 llvm_unreachable(0);
5254 assert(SortedPos == AllNodes.end() &&
5255 "Topological sort incomplete!");
5256 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5257 "First node in topological sort is not the entry token!");
5258 assert(AllNodes.front().getNodeId() == 0 &&
5259 "First node in topological sort has non-zero id!");
5260 assert(AllNodes.front().getNumOperands() == 0 &&
5261 "First node in topological sort has operands!");
5262 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5263 "Last node in topologic sort has unexpected id!");
5264 assert(AllNodes.back().use_empty() &&
5265 "Last node in topologic sort has users!");
5266 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5270 /// AssignOrdering - Assign an order to the SDNode.
5271 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5272 assert(SD && "Trying to assign an order to a null node!");
5273 Ordering->add(SD, Order);
5276 /// GetOrdering - Get the order for the SDNode.
5277 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5278 assert(SD && "Trying to get the order of a null node!");
5279 return Ordering->getOrder(SD);
5283 //===----------------------------------------------------------------------===//
5285 //===----------------------------------------------------------------------===//
5287 HandleSDNode::~HandleSDNode() {
5291 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5292 EVT VT, int64_t o, unsigned char TF)
5293 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5294 Offset(o), TargetFlags(TF) {
5295 TheGlobal = const_cast<GlobalValue*>(GA);
5298 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5299 MachineMemOperand *mmo)
5300 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5301 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5302 MMO->isNonTemporal());
5303 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5304 assert(isNonTemporal() == MMO->isNonTemporal() &&
5305 "Non-temporal encoding error!");
5306 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5309 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5310 const SDValue *Ops, unsigned NumOps, EVT memvt,
5311 MachineMemOperand *mmo)
5312 : SDNode(Opc, dl, VTs, Ops, NumOps),
5313 MemoryVT(memvt), MMO(mmo) {
5314 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5315 MMO->isNonTemporal());
5316 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5317 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5320 /// Profile - Gather unique data for the node.
5322 void SDNode::Profile(FoldingSetNodeID &ID) const {
5323 AddNodeIDNode(ID, this);
5328 std::vector<EVT> VTs;
5331 VTs.reserve(MVT::LAST_VALUETYPE);
5332 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5333 VTs.push_back(MVT((MVT::SimpleValueType)i));
5338 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5339 static ManagedStatic<EVTArray> SimpleVTArray;
5340 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5342 /// getValueTypeList - Return a pointer to the specified value type.
5344 const EVT *SDNode::getValueTypeList(EVT VT) {
5345 if (VT.isExtended()) {
5346 sys::SmartScopedLock<true> Lock(*VTMutex);
5347 return &(*EVTs->insert(VT).first);
5349 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5353 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5354 /// indicated value. This method ignores uses of other values defined by this
5356 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5357 assert(Value < getNumValues() && "Bad value!");
5359 // TODO: Only iterate over uses of a given value of the node
5360 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5361 if (UI.getUse().getResNo() == Value) {
5368 // Found exactly the right number of uses?
5373 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5374 /// value. This method ignores uses of other values defined by this operation.
5375 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5376 assert(Value < getNumValues() && "Bad value!");
5378 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5379 if (UI.getUse().getResNo() == Value)
5386 /// isOnlyUserOf - Return true if this node is the only use of N.
5388 bool SDNode::isOnlyUserOf(SDNode *N) const {
5390 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5401 /// isOperand - Return true if this node is an operand of N.
5403 bool SDValue::isOperandOf(SDNode *N) const {
5404 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5405 if (*this == N->getOperand(i))
5410 bool SDNode::isOperandOf(SDNode *N) const {
5411 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5412 if (this == N->OperandList[i].getNode())
5417 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5418 /// be a chain) reaches the specified operand without crossing any
5419 /// side-effecting instructions. In practice, this looks through token
5420 /// factors and non-volatile loads. In order to remain efficient, this only
5421 /// looks a couple of nodes in, it does not do an exhaustive search.
5422 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5423 unsigned Depth) const {
5424 if (*this == Dest) return true;
5426 // Don't search too deeply, we just want to be able to see through
5427 // TokenFactor's etc.
5428 if (Depth == 0) return false;
5430 // If this is a token factor, all inputs to the TF happen in parallel. If any
5431 // of the operands of the TF reach dest, then we can do the xform.
5432 if (getOpcode() == ISD::TokenFactor) {
5433 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5434 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5439 // Loads don't have side effects, look through them.
5440 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5441 if (!Ld->isVolatile())
5442 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5447 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5448 /// is either an operand of N or it can be reached by traversing up the operands.
5449 /// NOTE: this is an expensive method. Use it carefully.
5450 bool SDNode::isPredecessorOf(SDNode *N) const {
5451 SmallPtrSet<SDNode *, 32> Visited;
5452 SmallVector<SDNode *, 16> Worklist;
5453 Worklist.push_back(N);
5456 N = Worklist.pop_back_val();
5457 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5458 SDNode *Op = N->getOperand(i).getNode();
5461 if (Visited.insert(Op))
5462 Worklist.push_back(Op);
5464 } while (!Worklist.empty());
5469 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5470 assert(Num < NumOperands && "Invalid child # of SDNode!");
5471 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5474 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5475 switch (getOpcode()) {
5477 if (getOpcode() < ISD::BUILTIN_OP_END)
5478 return "<<Unknown DAG Node>>";
5479 if (isMachineOpcode()) {
5481 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5482 if (getMachineOpcode() < TII->getNumOpcodes())
5483 return TII->get(getMachineOpcode()).getName();
5484 return "<<Unknown Machine Node>>";
5487 const TargetLowering &TLI = G->getTargetLoweringInfo();
5488 const char *Name = TLI.getTargetNodeName(getOpcode());
5489 if (Name) return Name;
5490 return "<<Unknown Target Node>>";
5492 return "<<Unknown Node>>";
5495 case ISD::DELETED_NODE:
5496 return "<<Deleted Node!>>";
5498 case ISD::PREFETCH: return "Prefetch";
5499 case ISD::MEMBARRIER: return "MemBarrier";
5500 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5501 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5502 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5503 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5504 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5505 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5506 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5507 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5508 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5509 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5510 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5511 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5512 case ISD::PCMARKER: return "PCMarker";
5513 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5514 case ISD::SRCVALUE: return "SrcValue";
5515 case ISD::EntryToken: return "EntryToken";
5516 case ISD::TokenFactor: return "TokenFactor";
5517 case ISD::AssertSext: return "AssertSext";
5518 case ISD::AssertZext: return "AssertZext";
5520 case ISD::BasicBlock: return "BasicBlock";
5521 case ISD::VALUETYPE: return "ValueType";
5522 case ISD::Register: return "Register";
5524 case ISD::Constant: return "Constant";
5525 case ISD::ConstantFP: return "ConstantFP";
5526 case ISD::GlobalAddress: return "GlobalAddress";
5527 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5528 case ISD::FrameIndex: return "FrameIndex";
5529 case ISD::JumpTable: return "JumpTable";
5530 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5531 case ISD::RETURNADDR: return "RETURNADDR";
5532 case ISD::FRAMEADDR: return "FRAMEADDR";
5533 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5534 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5535 case ISD::LSDAADDR: return "LSDAADDR";
5536 case ISD::EHSELECTION: return "EHSELECTION";
5537 case ISD::EH_RETURN: return "EH_RETURN";
5538 case ISD::ConstantPool: return "ConstantPool";
5539 case ISD::ExternalSymbol: return "ExternalSymbol";
5540 case ISD::BlockAddress: return "BlockAddress";
5541 case ISD::INTRINSIC_WO_CHAIN:
5542 case ISD::INTRINSIC_VOID:
5543 case ISD::INTRINSIC_W_CHAIN: {
5544 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5545 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5546 if (IID < Intrinsic::num_intrinsics)
5547 return Intrinsic::getName((Intrinsic::ID)IID);
5548 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5549 return TII->getName(IID);
5550 llvm_unreachable("Invalid intrinsic ID");
5553 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5554 case ISD::TargetConstant: return "TargetConstant";
5555 case ISD::TargetConstantFP:return "TargetConstantFP";
5556 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5557 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5558 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5559 case ISD::TargetJumpTable: return "TargetJumpTable";
5560 case ISD::TargetConstantPool: return "TargetConstantPool";
5561 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5562 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5564 case ISD::CopyToReg: return "CopyToReg";
5565 case ISD::CopyFromReg: return "CopyFromReg";
5566 case ISD::UNDEF: return "undef";
5567 case ISD::MERGE_VALUES: return "merge_values";
5568 case ISD::INLINEASM: return "inlineasm";
5569 case ISD::EH_LABEL: return "eh_label";
5570 case ISD::HANDLENODE: return "handlenode";
5573 case ISD::FABS: return "fabs";
5574 case ISD::FNEG: return "fneg";
5575 case ISD::FSQRT: return "fsqrt";
5576 case ISD::FSIN: return "fsin";
5577 case ISD::FCOS: return "fcos";
5578 case ISD::FPOWI: return "fpowi";
5579 case ISD::FPOW: return "fpow";
5580 case ISD::FTRUNC: return "ftrunc";
5581 case ISD::FFLOOR: return "ffloor";
5582 case ISD::FCEIL: return "fceil";
5583 case ISD::FRINT: return "frint";
5584 case ISD::FNEARBYINT: return "fnearbyint";
5587 case ISD::ADD: return "add";
5588 case ISD::SUB: return "sub";
5589 case ISD::MUL: return "mul";
5590 case ISD::MULHU: return "mulhu";
5591 case ISD::MULHS: return "mulhs";
5592 case ISD::SDIV: return "sdiv";
5593 case ISD::UDIV: return "udiv";
5594 case ISD::SREM: return "srem";
5595 case ISD::UREM: return "urem";
5596 case ISD::SMUL_LOHI: return "smul_lohi";
5597 case ISD::UMUL_LOHI: return "umul_lohi";
5598 case ISD::SDIVREM: return "sdivrem";
5599 case ISD::UDIVREM: return "udivrem";
5600 case ISD::AND: return "and";
5601 case ISD::OR: return "or";
5602 case ISD::XOR: return "xor";
5603 case ISD::SHL: return "shl";
5604 case ISD::SRA: return "sra";
5605 case ISD::SRL: return "srl";
5606 case ISD::ROTL: return "rotl";
5607 case ISD::ROTR: return "rotr";
5608 case ISD::FADD: return "fadd";
5609 case ISD::FSUB: return "fsub";
5610 case ISD::FMUL: return "fmul";
5611 case ISD::FDIV: return "fdiv";
5612 case ISD::FREM: return "frem";
5613 case ISD::FCOPYSIGN: return "fcopysign";
5614 case ISD::FGETSIGN: return "fgetsign";
5616 case ISD::SETCC: return "setcc";
5617 case ISD::VSETCC: return "vsetcc";
5618 case ISD::SELECT: return "select";
5619 case ISD::SELECT_CC: return "select_cc";
5620 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5621 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5622 case ISD::CONCAT_VECTORS: return "concat_vectors";
5623 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5624 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5625 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5626 case ISD::CARRY_FALSE: return "carry_false";
5627 case ISD::ADDC: return "addc";
5628 case ISD::ADDE: return "adde";
5629 case ISD::SADDO: return "saddo";
5630 case ISD::UADDO: return "uaddo";
5631 case ISD::SSUBO: return "ssubo";
5632 case ISD::USUBO: return "usubo";
5633 case ISD::SMULO: return "smulo";
5634 case ISD::UMULO: return "umulo";
5635 case ISD::SUBC: return "subc";
5636 case ISD::SUBE: return "sube";
5637 case ISD::SHL_PARTS: return "shl_parts";
5638 case ISD::SRA_PARTS: return "sra_parts";
5639 case ISD::SRL_PARTS: return "srl_parts";
5641 // Conversion operators.
5642 case ISD::SIGN_EXTEND: return "sign_extend";
5643 case ISD::ZERO_EXTEND: return "zero_extend";
5644 case ISD::ANY_EXTEND: return "any_extend";
5645 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5646 case ISD::TRUNCATE: return "truncate";
5647 case ISD::FP_ROUND: return "fp_round";
5648 case ISD::FLT_ROUNDS_: return "flt_rounds";
5649 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5650 case ISD::FP_EXTEND: return "fp_extend";
5652 case ISD::SINT_TO_FP: return "sint_to_fp";
5653 case ISD::UINT_TO_FP: return "uint_to_fp";
5654 case ISD::FP_TO_SINT: return "fp_to_sint";
5655 case ISD::FP_TO_UINT: return "fp_to_uint";
5656 case ISD::BIT_CONVERT: return "bit_convert";
5658 case ISD::CONVERT_RNDSAT: {
5659 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5660 default: llvm_unreachable("Unknown cvt code!");
5661 case ISD::CVT_FF: return "cvt_ff";
5662 case ISD::CVT_FS: return "cvt_fs";
5663 case ISD::CVT_FU: return "cvt_fu";
5664 case ISD::CVT_SF: return "cvt_sf";
5665 case ISD::CVT_UF: return "cvt_uf";
5666 case ISD::CVT_SS: return "cvt_ss";
5667 case ISD::CVT_SU: return "cvt_su";
5668 case ISD::CVT_US: return "cvt_us";
5669 case ISD::CVT_UU: return "cvt_uu";
5673 // Control flow instructions
5674 case ISD::BR: return "br";
5675 case ISD::BRIND: return "brind";
5676 case ISD::BR_JT: return "br_jt";
5677 case ISD::BRCOND: return "brcond";
5678 case ISD::BR_CC: return "br_cc";
5679 case ISD::CALLSEQ_START: return "callseq_start";
5680 case ISD::CALLSEQ_END: return "callseq_end";
5683 case ISD::LOAD: return "load";
5684 case ISD::STORE: return "store";
5685 case ISD::VAARG: return "vaarg";
5686 case ISD::VACOPY: return "vacopy";
5687 case ISD::VAEND: return "vaend";
5688 case ISD::VASTART: return "vastart";
5689 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5690 case ISD::EXTRACT_ELEMENT: return "extract_element";
5691 case ISD::BUILD_PAIR: return "build_pair";
5692 case ISD::STACKSAVE: return "stacksave";
5693 case ISD::STACKRESTORE: return "stackrestore";
5694 case ISD::TRAP: return "trap";
5697 case ISD::BSWAP: return "bswap";
5698 case ISD::CTPOP: return "ctpop";
5699 case ISD::CTTZ: return "cttz";
5700 case ISD::CTLZ: return "ctlz";
5703 case ISD::TRAMPOLINE: return "trampoline";
5706 switch (cast<CondCodeSDNode>(this)->get()) {
5707 default: llvm_unreachable("Unknown setcc condition!");
5708 case ISD::SETOEQ: return "setoeq";
5709 case ISD::SETOGT: return "setogt";
5710 case ISD::SETOGE: return "setoge";
5711 case ISD::SETOLT: return "setolt";
5712 case ISD::SETOLE: return "setole";
5713 case ISD::SETONE: return "setone";
5715 case ISD::SETO: return "seto";
5716 case ISD::SETUO: return "setuo";
5717 case ISD::SETUEQ: return "setue";
5718 case ISD::SETUGT: return "setugt";
5719 case ISD::SETUGE: return "setuge";
5720 case ISD::SETULT: return "setult";
5721 case ISD::SETULE: return "setule";
5722 case ISD::SETUNE: return "setune";
5724 case ISD::SETEQ: return "seteq";
5725 case ISD::SETGT: return "setgt";
5726 case ISD::SETGE: return "setge";
5727 case ISD::SETLT: return "setlt";
5728 case ISD::SETLE: return "setle";
5729 case ISD::SETNE: return "setne";
5734 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5743 return "<post-inc>";
5745 return "<post-dec>";
5749 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5750 std::string S = "< ";
5764 if (getByValAlign())
5765 S += "byval-align:" + utostr(getByValAlign()) + " ";
5767 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5769 S += "byval-size:" + utostr(getByValSize()) + " ";
5773 void SDNode::dump() const { dump(0); }
5774 void SDNode::dump(const SelectionDAG *G) const {
5778 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5779 OS << (void*)this << ": ";
5781 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5783 if (getValueType(i) == MVT::Other)
5786 OS << getValueType(i).getEVTString();
5788 OS << " = " << getOperationName(G);
5791 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5792 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5793 if (!MN->memoperands_empty()) {
5796 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5797 e = MN->memoperands_end(); i != e; ++i) {
5804 } else if (const ShuffleVectorSDNode *SVN =
5805 dyn_cast<ShuffleVectorSDNode>(this)) {
5807 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5808 int Idx = SVN->getMaskElt(i);
5816 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5817 OS << '<' << CSDN->getAPIntValue() << '>';
5818 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5819 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5820 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5821 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5822 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5825 CSDN->getValueAPF().bitcastToAPInt().dump();
5828 } else if (const GlobalAddressSDNode *GADN =
5829 dyn_cast<GlobalAddressSDNode>(this)) {
5830 int64_t offset = GADN->getOffset();
5832 WriteAsOperand(OS, GADN->getGlobal());
5835 OS << " + " << offset;
5837 OS << " " << offset;
5838 if (unsigned int TF = GADN->getTargetFlags())
5839 OS << " [TF=" << TF << ']';
5840 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5841 OS << "<" << FIDN->getIndex() << ">";
5842 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5843 OS << "<" << JTDN->getIndex() << ">";
5844 if (unsigned int TF = JTDN->getTargetFlags())
5845 OS << " [TF=" << TF << ']';
5846 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5847 int offset = CP->getOffset();
5848 if (CP->isMachineConstantPoolEntry())
5849 OS << "<" << *CP->getMachineCPVal() << ">";
5851 OS << "<" << *CP->getConstVal() << ">";
5853 OS << " + " << offset;
5855 OS << " " << offset;
5856 if (unsigned int TF = CP->getTargetFlags())
5857 OS << " [TF=" << TF << ']';
5858 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5860 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5862 OS << LBB->getName() << " ";
5863 OS << (const void*)BBDN->getBasicBlock() << ">";
5864 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5865 if (G && R->getReg() &&
5866 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5867 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5869 OS << " %reg" << R->getReg();
5871 } else if (const ExternalSymbolSDNode *ES =
5872 dyn_cast<ExternalSymbolSDNode>(this)) {
5873 OS << "'" << ES->getSymbol() << "'";
5874 if (unsigned int TF = ES->getTargetFlags())
5875 OS << " [TF=" << TF << ']';
5876 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5878 OS << "<" << M->getValue() << ">";
5881 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5882 OS << ":" << N->getVT().getEVTString();
5884 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5885 OS << "<" << *LD->getMemOperand();
5888 switch (LD->getExtensionType()) {
5889 default: doExt = false; break;
5890 case ISD::EXTLOAD: OS << ", anyext"; break;
5891 case ISD::SEXTLOAD: OS << ", sext"; break;
5892 case ISD::ZEXTLOAD: OS << ", zext"; break;
5895 OS << " from " << LD->getMemoryVT().getEVTString();
5897 const char *AM = getIndexedModeName(LD->getAddressingMode());
5902 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5903 OS << "<" << *ST->getMemOperand();
5905 if (ST->isTruncatingStore())
5906 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5908 const char *AM = getIndexedModeName(ST->getAddressingMode());
5913 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5914 OS << "<" << *M->getMemOperand() << ">";
5915 } else if (const BlockAddressSDNode *BA =
5916 dyn_cast<BlockAddressSDNode>(this)) {
5918 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5920 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5922 if (unsigned int TF = BA->getTargetFlags())
5923 OS << " [TF=" << TF << ']';
5927 if (unsigned Order = G->GetOrdering(this))
5928 OS << " [ORD=" << Order << ']';
5931 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5933 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5934 if (i) OS << ", "; else OS << " ";
5935 OS << (void*)getOperand(i).getNode();
5936 if (unsigned RN = getOperand(i).getResNo())
5939 print_details(OS, G);
5942 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5943 const SelectionDAG *G, unsigned depth,
5956 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5958 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
5962 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
5963 unsigned depth) const {
5964 printrWithDepthHelper(OS, this, G, depth, 0);
5967 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
5968 // Don't print impossibly deep things.
5969 printrWithDepth(OS, G, 100);
5972 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
5973 printrWithDepth(dbgs(), G, depth);
5976 void SDNode::dumprFull(const SelectionDAG *G) const {
5977 // Don't print impossibly deep things.
5978 dumprWithDepth(G, 100);
5981 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5982 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5983 if (N->getOperand(i).getNode()->hasOneUse())
5984 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5986 dbgs() << "\n" << std::string(indent+2, ' ')
5987 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5991 dbgs().indent(indent);
5995 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5996 assert(N->getNumValues() == 1 &&
5997 "Can't unroll a vector with multiple results!");
5999 EVT VT = N->getValueType(0);
6000 unsigned NE = VT.getVectorNumElements();
6001 EVT EltVT = VT.getVectorElementType();
6002 DebugLoc dl = N->getDebugLoc();
6004 SmallVector<SDValue, 8> Scalars;
6005 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6007 // If ResNE is 0, fully unroll the vector op.
6010 else if (NE > ResNE)
6014 for (i= 0; i != NE; ++i) {
6015 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6016 SDValue Operand = N->getOperand(j);
6017 EVT OperandVT = Operand.getValueType();
6018 if (OperandVT.isVector()) {
6019 // A vector operand; extract a single element.
6020 EVT OperandEltVT = OperandVT.getVectorElementType();
6021 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6024 getConstant(i, MVT::i32));
6026 // A scalar operand; just use it as is.
6027 Operands[j] = Operand;
6031 switch (N->getOpcode()) {
6033 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6034 &Operands[0], Operands.size()));
6041 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6042 getShiftAmountOperand(Operands[1])));
6044 case ISD::SIGN_EXTEND_INREG:
6045 case ISD::FP_ROUND_INREG: {
6046 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6047 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6049 getValueType(ExtVT)));
6054 for (; i < ResNE; ++i)
6055 Scalars.push_back(getUNDEF(EltVT));
6057 return getNode(ISD::BUILD_VECTOR, dl,
6058 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6059 &Scalars[0], Scalars.size());
6063 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6064 /// location that is 'Dist' units away from the location that the 'Base' load
6065 /// is loading from.
6066 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6067 unsigned Bytes, int Dist) const {
6068 if (LD->getChain() != Base->getChain())
6070 EVT VT = LD->getValueType(0);
6071 if (VT.getSizeInBits() / 8 != Bytes)
6074 SDValue Loc = LD->getOperand(1);
6075 SDValue BaseLoc = Base->getOperand(1);
6076 if (Loc.getOpcode() == ISD::FrameIndex) {
6077 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6079 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6080 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6081 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6082 int FS = MFI->getObjectSize(FI);
6083 int BFS = MFI->getObjectSize(BFI);
6084 if (FS != BFS || FS != (int)Bytes) return false;
6085 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6087 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6088 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6089 if (V && (V->getSExtValue() == Dist*Bytes))
6093 GlobalValue *GV1 = NULL;
6094 GlobalValue *GV2 = NULL;
6095 int64_t Offset1 = 0;
6096 int64_t Offset2 = 0;
6097 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6098 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6099 if (isGA1 && isGA2 && GV1 == GV2)
6100 return Offset1 == (Offset2 + Dist*Bytes);
6105 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6106 /// it cannot be inferred.
6107 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6108 // If this is a GlobalAddress + cst, return the alignment.
6110 int64_t GVOffset = 0;
6111 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
6112 return MinAlign(GV->getAlignment(), GVOffset);
6114 // If this is a direct reference to a stack slot, use information about the
6115 // stack slot's alignment.
6116 int FrameIdx = 1 << 31;
6117 int64_t FrameOffset = 0;
6118 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6119 FrameIdx = FI->getIndex();
6120 } else if (Ptr.getOpcode() == ISD::ADD &&
6121 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6122 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6123 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6124 FrameOffset = Ptr.getConstantOperandVal(1);
6127 if (FrameIdx != (1 << 31)) {
6128 // FIXME: Handle FI+CST.
6129 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6130 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6132 if (MFI.isFixedObjectIndex(FrameIdx)) {
6133 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6135 // The alignment of the frame index can be determined from its offset from
6136 // the incoming frame position. If the frame object is at offset 32 and
6137 // the stack is guaranteed to be 16-byte aligned, then we know that the
6138 // object is 16-byte aligned.
6139 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6140 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6142 // Finally, the frame object itself may have a known alignment. Factor
6143 // the alignment + offset into a new alignment. For example, if we know
6144 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6145 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6146 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6147 return std::max(Align, FIInfoAlign);
6155 void SelectionDAG::dump() const {
6156 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6158 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6160 const SDNode *N = I;
6161 if (!N->hasOneUse() && N != getRoot().getNode())
6162 DumpNodes(N, 2, this);
6165 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6170 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6172 print_details(OS, G);
6175 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6176 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6177 const SelectionDAG *G, VisitedSDNodeSet &once) {
6178 if (!once.insert(N)) // If we've been here before, return now.
6181 // Dump the current SDNode, but don't end the line yet.
6182 OS << std::string(indent, ' ');
6185 // Having printed this SDNode, walk the children:
6186 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6187 const SDNode *child = N->getOperand(i).getNode();
6192 if (child->getNumOperands() == 0) {
6193 // This child has no grandchildren; print it inline right here.
6194 child->printr(OS, G);
6196 } else { // Just the address. FIXME: also print the child's opcode.
6198 if (unsigned RN = N->getOperand(i).getResNo())
6205 // Dump children that have grandchildren on their own line(s).
6206 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6207 const SDNode *child = N->getOperand(i).getNode();
6208 DumpNodesr(OS, child, indent+2, G, once);
6212 void SDNode::dumpr() const {
6213 VisitedSDNodeSet once;
6214 DumpNodesr(dbgs(), this, 0, 0, once);
6217 void SDNode::dumpr(const SelectionDAG *G) const {
6218 VisitedSDNodeSet once;
6219 DumpNodesr(dbgs(), this, 0, G, once);
6223 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6224 unsigned GlobalAddressSDNode::getAddressSpace() const {
6225 return getGlobal()->getType()->getAddressSpace();
6229 const Type *ConstantPoolSDNode::getType() const {
6230 if (isMachineConstantPoolEntry())
6231 return Val.MachineCPVal->getType();
6232 return Val.ConstVal->getType();
6235 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6237 unsigned &SplatBitSize,
6239 unsigned MinSplatBits,
6241 EVT VT = getValueType(0);
6242 assert(VT.isVector() && "Expected a vector type");
6243 unsigned sz = VT.getSizeInBits();
6244 if (MinSplatBits > sz)
6247 SplatValue = APInt(sz, 0);
6248 SplatUndef = APInt(sz, 0);
6250 // Get the bits. Bits with undefined values (when the corresponding element
6251 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6252 // in SplatValue. If any of the values are not constant, give up and return
6254 unsigned int nOps = getNumOperands();
6255 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6256 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6258 for (unsigned j = 0; j < nOps; ++j) {
6259 unsigned i = isBigEndian ? nOps-1-j : j;
6260 SDValue OpVal = getOperand(i);
6261 unsigned BitPos = j * EltBitSize;
6263 if (OpVal.getOpcode() == ISD::UNDEF)
6264 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6265 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6266 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6267 zextOrTrunc(sz) << BitPos);
6268 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6269 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6274 // The build_vector is all constants or undefs. Find the smallest element
6275 // size that splats the vector.
6277 HasAnyUndefs = (SplatUndef != 0);
6280 unsigned HalfSize = sz / 2;
6281 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6282 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6283 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6284 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6286 // If the two halves do not match (ignoring undef bits), stop here.
6287 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6288 MinSplatBits > HalfSize)
6291 SplatValue = HighValue | LowValue;
6292 SplatUndef = HighUndef & LowUndef;
6301 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6302 // Find the first non-undef value in the shuffle mask.
6304 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6307 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6309 // Make sure all remaining elements are either undef or the same as the first
6311 for (int Idx = Mask[i]; i != e; ++i)
6312 if (Mask[i] >= 0 && Mask[i] != Idx)
6317 static void checkForCyclesHelper(const SDNode *N,
6318 std::set<const SDNode *> &visited) {
6319 if (visited.find(N) != visited.end()) {
6320 dbgs() << "Offending node:\n";
6322 assert(0 && "Detected cycle in SelectionDAG");
6325 std::set<const SDNode*>::iterator i;
6328 tie(i, inserted) = visited.insert(N);
6329 assert(inserted && "Missed cycle");
6331 for(unsigned i = 0; i < N->getNumOperands(); ++i) {
6332 checkForCyclesHelper(N->getOperand(i).getNode(), visited);
6337 void llvm::checkForCycles(const llvm::SDNode *N) {
6339 assert(N && "Checking nonexistant SDNode");
6340 std::set<const SDNode *> visited;
6341 checkForCyclesHelper(N, visited);
6345 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6346 checkForCycles(DAG->getRoot().getNode());