1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/Constants.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/Support/MathExtras.h"
20 #include "llvm/Target/MRegisterInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
30 // Temporary boolean for testing the dag combiner
32 extern bool CombinerEnabled;
35 static bool isCommutativeBinOp(unsigned Opcode) {
41 case ISD::XOR: return true;
42 default: return false; // FIXME: Need commutative info for user ops!
46 static bool isAssociativeBinOp(unsigned Opcode) {
52 case ISD::XOR: return true;
53 default: return false; // FIXME: Need associative info for user ops!
57 // isInvertibleForFree - Return true if there is no cost to emitting the logical
58 // inverse of this node.
59 static bool isInvertibleForFree(SDOperand N) {
60 if (isa<ConstantSDNode>(N.Val)) return true;
61 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(double V) const {
75 return DoubleToBits(V) == DoubleToBits(Value);
78 //===----------------------------------------------------------------------===//
80 //===----------------------------------------------------------------------===//
82 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
83 /// when given the operation for (X op Y).
84 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
85 // To perform this operation, we just need to swap the L and G bits of the
87 unsigned OldL = (Operation >> 2) & 1;
88 unsigned OldG = (Operation >> 1) & 1;
89 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
90 (OldL << 1) | // New G bit
91 (OldG << 2)); // New L bit.
94 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
95 /// 'op' is a valid SetCC operation.
96 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
97 unsigned Operation = Op;
99 Operation ^= 7; // Flip L, G, E bits, but not U.
101 Operation ^= 15; // Flip all of the condition bits.
102 if (Operation > ISD::SETTRUE2)
103 Operation &= ~8; // Don't let N and U bits get set.
104 return ISD::CondCode(Operation);
108 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
109 /// signed operation and 2 if the result is an unsigned comparison. Return zero
110 /// if the operation does not depend on the sign of the input (setne and seteq).
111 static int isSignedOp(ISD::CondCode Opcode) {
113 default: assert(0 && "Illegal integer setcc operation!");
115 case ISD::SETNE: return 0;
119 case ISD::SETGE: return 1;
123 case ISD::SETUGE: return 2;
127 /// getSetCCOrOperation - Return the result of a logical OR between different
128 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
129 /// returns SETCC_INVALID if it is not possible to represent the resultant
131 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
133 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
134 // Cannot fold a signed integer setcc with an unsigned integer setcc.
135 return ISD::SETCC_INVALID;
137 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
139 // If the N and U bits get set then the resultant comparison DOES suddenly
140 // care about orderedness, and is true when ordered.
141 if (Op > ISD::SETTRUE2)
142 Op &= ~16; // Clear the N bit.
143 return ISD::CondCode(Op);
146 /// getSetCCAndOperation - Return the result of a logical AND between different
147 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
148 /// function returns zero if it is not possible to represent the resultant
150 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
152 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
153 // Cannot fold a signed setcc with an unsigned setcc.
154 return ISD::SETCC_INVALID;
156 // Combine all of the condition bits.
157 return ISD::CondCode(Op1 & Op2);
160 const TargetMachine &SelectionDAG::getTarget() const {
161 return TLI.getTargetMachine();
164 //===----------------------------------------------------------------------===//
165 // SelectionDAG Class
166 //===----------------------------------------------------------------------===//
168 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
169 /// SelectionDAG, including nodes (like loads) that have uses of their token
170 /// chain but no other uses and no side effect. If a node is passed in as an
171 /// argument, it is used as the seed for node deletion.
172 void SelectionDAG::RemoveDeadNodes(SDNode *N) {
173 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
175 // Create a dummy node (which is not added to allnodes), that adds a reference
176 // to the root node, preventing it from being deleted.
177 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot());
179 // If we have a hint to start from, use it.
180 if (N) DeleteNodeIfDead(N, &AllNodeSet);
183 unsigned NumNodes = AllNodeSet.size();
184 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
186 // Try to delete this node.
187 DeleteNodeIfDead(*I, &AllNodeSet);
189 // If we actually deleted any nodes, do not use invalid iterators in
191 if (AllNodeSet.size() != NumNodes)
196 if (AllNodes.size() != NumNodes)
197 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
199 // If the root changed (e.g. it was a dead load, update the root).
200 setRoot(DummyNode->getOperand(0));
202 // Now that we are done with the dummy node, delete it.
203 DummyNode->getOperand(0).Val->removeUser(DummyNode);
208 void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
212 // Okay, we really are going to delete this node. First take this out of the
213 // appropriate CSE map.
214 RemoveNodeFromCSEMaps(N);
216 // Next, brutally remove the operand list. This is safe to do, as there are
217 // no cycles in the graph.
218 while (!N->Operands.empty()) {
219 SDNode *O = N->Operands.back().Val;
220 N->Operands.pop_back();
223 // Now that we removed this operand, see if there are no uses of it left.
224 DeleteNodeIfDead(O, NodeSet);
227 // Remove the node from the nodes set and delete it.
228 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
231 // Now that the node is gone, check to see if any of the operands of this node
236 void SelectionDAG::DeleteNode(SDNode *N) {
237 assert(N->use_empty() && "Cannot delete a node that is not dead!");
239 // First take this out of the appropriate CSE map.
240 RemoveNodeFromCSEMaps(N);
242 // Finally, remove uses due to operands of this node, remove from the
243 // AllNodes list, and delete the node.
244 DeleteNodeNotInCSEMaps(N);
247 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
249 // Remove it from the AllNodes list.
250 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) {
251 assert(I != AllNodes.end() && "Node not in AllNodes list??");
253 // Erase from the vector, which is not ordered.
254 std::swap(*I, AllNodes.back());
260 // Drop all of the operands and decrement used nodes use counts.
261 while (!N->Operands.empty()) {
262 SDNode *O = N->Operands.back().Val;
263 N->Operands.pop_back();
270 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
271 /// correspond to it. This is useful when we're about to delete or repurpose
272 /// the node. We don't want future request for structurally identical nodes
273 /// to return N anymore.
274 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
276 switch (N->getOpcode()) {
278 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
279 N->getValueType(0)));
281 case ISD::TargetConstant:
282 Erased = TargetConstants.erase(std::make_pair(
283 cast<ConstantSDNode>(N)->getValue(),
284 N->getValueType(0)));
286 case ISD::ConstantFP: {
287 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue());
288 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0)));
292 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
293 "Cond code doesn't exist!");
294 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
295 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
297 case ISD::GlobalAddress:
298 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
300 case ISD::TargetGlobalAddress:
301 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
303 case ISD::FrameIndex:
304 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
306 case ISD::TargetFrameIndex:
307 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
309 case ISD::ConstantPool:
310 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
312 case ISD::TargetConstantPool:
313 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
315 case ISD::BasicBlock:
316 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
318 case ISD::ExternalSymbol:
319 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
322 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0;
323 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0;
326 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(),
327 N->getValueType(0)));
329 case ISD::SRCVALUE: {
330 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N);
331 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset()));
335 Erased = Loads.erase(std::make_pair(N->getOperand(1),
336 std::make_pair(N->getOperand(0),
337 N->getValueType(0))));
340 if (N->getNumValues() == 1) {
341 if (N->getNumOperands() == 0) {
342 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(),
343 N->getValueType(0)));
344 } else if (N->getNumOperands() == 1) {
346 UnaryOps.erase(std::make_pair(N->getOpcode(),
347 std::make_pair(N->getOperand(0),
348 N->getValueType(0))));
349 } else if (N->getNumOperands() == 2) {
351 BinaryOps.erase(std::make_pair(N->getOpcode(),
352 std::make_pair(N->getOperand(0),
355 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
357 OneResultNodes.erase(std::make_pair(N->getOpcode(),
358 std::make_pair(N->getValueType(0),
362 // Remove the node from the ArbitraryNodes map.
363 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
364 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
366 ArbitraryNodes.erase(std::make_pair(N->getOpcode(),
367 std::make_pair(RV, Ops)));
372 // Verify that the node was actually in one of the CSE maps, unless it has a
373 // flag result (which cannot be CSE'd) or is one of the special cases that are
374 // not subject to CSE.
375 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
376 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START &&
377 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) {
380 assert(0 && "Node is not in map!");
385 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
386 /// has been taken out and modified in some way. If the specified node already
387 /// exists in the CSE maps, do not modify the maps, but return the existing node
388 /// instead. If it doesn't exist, add it and return null.
390 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
391 assert(N->getNumOperands() && "This is a leaf node!");
392 if (N->getOpcode() == ISD::LOAD) {
393 SDNode *&L = Loads[std::make_pair(N->getOperand(1),
394 std::make_pair(N->getOperand(0),
395 N->getValueType(0)))];
398 } else if (N->getNumOperands() == 1) {
399 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(),
400 std::make_pair(N->getOperand(0),
401 N->getValueType(0)))];
404 } else if (N->getNumOperands() == 2) {
405 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(),
406 std::make_pair(N->getOperand(0),
410 } else if (N->getNumValues() == 1) {
411 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
412 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(),
413 std::make_pair(N->getValueType(0), Ops))];
417 // Remove the node from the ArbitraryNodes map.
418 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
419 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
420 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(),
421 std::make_pair(RV, Ops))];
431 SelectionDAG::~SelectionDAG() {
432 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
436 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
437 if (Op.getValueType() == VT) return Op;
438 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT));
439 return getNode(ISD::AND, Op.getValueType(), Op,
440 getConstant(Imm, Op.getValueType()));
443 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
444 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
445 // Mask out any bits that are not valid for this constant.
447 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
449 SDNode *&N = Constants[std::make_pair(Val, VT)];
450 if (N) return SDOperand(N, 0);
451 N = new ConstantSDNode(false, Val, VT);
452 AllNodes.push_back(N);
453 return SDOperand(N, 0);
456 SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) {
457 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
458 // Mask out any bits that are not valid for this constant.
460 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
462 SDNode *&N = TargetConstants[std::make_pair(Val, VT)];
463 if (N) return SDOperand(N, 0);
464 N = new ConstantSDNode(true, Val, VT);
465 AllNodes.push_back(N);
466 return SDOperand(N, 0);
469 SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
470 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
472 Val = (float)Val; // Mask out extra precision.
474 // Do the map lookup using the actual bit pattern for the floating point
475 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
476 // we don't have issues with SNANs.
477 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)];
478 if (N) return SDOperand(N, 0);
479 N = new ConstantFPSDNode(Val, VT);
480 AllNodes.push_back(N);
481 return SDOperand(N, 0);
486 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
488 SDNode *&N = GlobalValues[GV];
489 if (N) return SDOperand(N, 0);
490 N = new GlobalAddressSDNode(false, GV, VT);
491 AllNodes.push_back(N);
492 return SDOperand(N, 0);
495 SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV,
497 SDNode *&N = TargetGlobalValues[GV];
498 if (N) return SDOperand(N, 0);
499 N = new GlobalAddressSDNode(true, GV, VT);
500 AllNodes.push_back(N);
501 return SDOperand(N, 0);
504 SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
505 SDNode *&N = FrameIndices[FI];
506 if (N) return SDOperand(N, 0);
507 N = new FrameIndexSDNode(FI, VT, false);
508 AllNodes.push_back(N);
509 return SDOperand(N, 0);
512 SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) {
513 SDNode *&N = TargetFrameIndices[FI];
514 if (N) return SDOperand(N, 0);
515 N = new FrameIndexSDNode(FI, VT, true);
516 AllNodes.push_back(N);
517 return SDOperand(N, 0);
520 SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) {
521 SDNode *&N = ConstantPoolIndices[C];
522 if (N) return SDOperand(N, 0);
523 N = new ConstantPoolSDNode(C, VT, false);
524 AllNodes.push_back(N);
525 return SDOperand(N, 0);
528 SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) {
529 SDNode *&N = TargetConstantPoolIndices[C];
530 if (N) return SDOperand(N, 0);
531 N = new ConstantPoolSDNode(C, VT, true);
532 AllNodes.push_back(N);
533 return SDOperand(N, 0);
536 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
537 SDNode *&N = BBNodes[MBB];
538 if (N) return SDOperand(N, 0);
539 N = new BasicBlockSDNode(MBB);
540 AllNodes.push_back(N);
541 return SDOperand(N, 0);
544 SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
545 if ((unsigned)VT >= ValueTypeNodes.size())
546 ValueTypeNodes.resize(VT+1);
547 if (ValueTypeNodes[VT] == 0) {
548 ValueTypeNodes[VT] = new VTSDNode(VT);
549 AllNodes.push_back(ValueTypeNodes[VT]);
552 return SDOperand(ValueTypeNodes[VT], 0);
555 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
556 SDNode *&N = ExternalSymbols[Sym];
557 if (N) return SDOperand(N, 0);
558 N = new ExternalSymbolSDNode(Sym, VT);
559 AllNodes.push_back(N);
560 return SDOperand(N, 0);
563 SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
564 if ((unsigned)Cond >= CondCodeNodes.size())
565 CondCodeNodes.resize(Cond+1);
567 if (CondCodeNodes[Cond] == 0) {
568 CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
569 AllNodes.push_back(CondCodeNodes[Cond]);
571 return SDOperand(CondCodeNodes[Cond], 0);
574 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
575 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)];
577 Reg = new RegisterSDNode(RegNo, VT);
578 AllNodes.push_back(Reg);
580 return SDOperand(Reg, 0);
583 SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
584 SDOperand N2, ISD::CondCode Cond) {
585 // These setcc operations always fold.
589 case ISD::SETFALSE2: return getConstant(0, VT);
591 case ISD::SETTRUE2: return getConstant(1, VT);
594 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
595 uint64_t C2 = N2C->getValue();
596 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
597 uint64_t C1 = N1C->getValue();
599 // Sign extend the operands if required
600 if (ISD::isSignedIntSetCC(Cond)) {
601 C1 = N1C->getSignExtended();
602 C2 = N2C->getSignExtended();
606 default: assert(0 && "Unknown integer setcc!");
607 case ISD::SETEQ: return getConstant(C1 == C2, VT);
608 case ISD::SETNE: return getConstant(C1 != C2, VT);
609 case ISD::SETULT: return getConstant(C1 < C2, VT);
610 case ISD::SETUGT: return getConstant(C1 > C2, VT);
611 case ISD::SETULE: return getConstant(C1 <= C2, VT);
612 case ISD::SETUGE: return getConstant(C1 >= C2, VT);
613 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
614 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
615 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
616 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
619 // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
620 if (N1.getOpcode() == ISD::ZERO_EXTEND) {
621 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
623 // If the comparison constant has bits in the upper part, the
624 // zero-extended value could never match.
625 if (C2 & (~0ULL << InSize)) {
626 unsigned VSize = MVT::getSizeInBits(N1.getValueType());
630 case ISD::SETEQ: return getConstant(0, VT);
633 case ISD::SETNE: return getConstant(1, VT);
636 // True if the sign bit of C2 is set.
637 return getConstant((C2 & (1ULL << VSize)) != 0, VT);
640 // True if the sign bit of C2 isn't set.
641 return getConstant((C2 & (1ULL << VSize)) == 0, VT);
647 // Otherwise, we can perform the comparison with the low bits.
655 return getSetCC(VT, N1.getOperand(0),
656 getConstant(C2, N1.getOperand(0).getValueType()),
659 break; // todo, be more careful with signed comparisons
661 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
662 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
663 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT();
664 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
665 MVT::ValueType ExtDstTy = N1.getValueType();
666 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
668 // If the extended part has any inconsistent bits, it cannot ever
669 // compare equal. In other words, they have to be all ones or all
672 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
673 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits)
674 return getConstant(Cond == ISD::SETNE, VT);
676 // Otherwise, make this a use of a zext.
677 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy),
678 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy),
682 uint64_t MinVal, MaxVal;
683 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
684 if (ISD::isSignedIntSetCC(Cond)) {
685 MinVal = 1ULL << (OperandBitSize-1);
686 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
687 MaxVal = ~0ULL >> (65-OperandBitSize);
692 MaxVal = ~0ULL >> (64-OperandBitSize);
695 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
696 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
697 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
698 --C2; // X >= C1 --> X > (C1-1)
699 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
700 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
703 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
704 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
705 ++C2; // X <= C1 --> X < (C1+1)
706 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
707 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
710 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
711 return getConstant(0, VT); // X < MIN --> false
713 // Canonicalize setgt X, Min --> setne X, Min
714 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
715 return getSetCC(VT, N1, N2, ISD::SETNE);
717 // If we have setult X, 1, turn it into seteq X, 0
718 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
719 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()),
721 // If we have setugt X, Max-1, turn it into seteq X, Max
722 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
723 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()),
726 // If we have "setcc X, C1", check to see if we can shrink the immediate
729 // SETUGT X, SINTMAX -> SETLT X, 0
730 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
731 C2 == (~0ULL >> (65-OperandBitSize)))
732 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT);
734 // FIXME: Implement the rest of these.
737 // Fold bit comparisons when we can.
738 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
739 VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
740 if (ConstantSDNode *AndRHS =
741 dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
742 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
743 // Perform the xform if the AND RHS is a single bit.
744 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
745 return getNode(ISD::SRL, VT, N1,
746 getConstant(Log2_64(AndRHS->getValue()),
747 TLI.getShiftAmountTy()));
749 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
750 // (X & 8) == 8 --> (X & 8) >> 3
751 // Perform the xform if C2 is a single bit.
752 if ((C2 & (C2-1)) == 0) {
753 return getNode(ISD::SRL, VT, N1,
754 getConstant(Log2_64(C2),TLI.getShiftAmountTy()));
759 } else if (isa<ConstantSDNode>(N1.Val)) {
760 // Ensure that the constant occurs on the RHS.
761 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
764 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
765 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
766 double C1 = N1C->getValue(), C2 = N2C->getValue();
769 default: break; // FIXME: Implement the rest of these!
770 case ISD::SETEQ: return getConstant(C1 == C2, VT);
771 case ISD::SETNE: return getConstant(C1 != C2, VT);
772 case ISD::SETLT: return getConstant(C1 < C2, VT);
773 case ISD::SETGT: return getConstant(C1 > C2, VT);
774 case ISD::SETLE: return getConstant(C1 <= C2, VT);
775 case ISD::SETGE: return getConstant(C1 >= C2, VT);
778 // Ensure that the constant occurs on the RHS.
779 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
783 // We can always fold X == Y for integer setcc's.
784 if (MVT::isInteger(N1.getValueType()))
785 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
786 unsigned UOF = ISD::getUnorderedFlavor(Cond);
787 if (UOF == 2) // FP operators that are undefined on NaNs.
788 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
789 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
790 return getConstant(UOF, VT);
791 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
792 // if it is not already.
793 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO;
795 return getSetCC(VT, N1, N2, NewCond);
798 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
799 MVT::isInteger(N1.getValueType())) {
800 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
801 N1.getOpcode() == ISD::XOR) {
802 // Simplify (X+Y) == (X+Z) --> Y == Z
803 if (N1.getOpcode() == N2.getOpcode()) {
804 if (N1.getOperand(0) == N2.getOperand(0))
805 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
806 if (N1.getOperand(1) == N2.getOperand(1))
807 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond);
808 if (isCommutativeBinOp(N1.getOpcode())) {
809 // If X op Y == Y op X, try other combinations.
810 if (N1.getOperand(0) == N2.getOperand(1))
811 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond);
812 if (N1.getOperand(1) == N2.getOperand(0))
813 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
817 // FIXME: move this stuff to the DAG Combiner when it exists!
819 // Simplify (X+Z) == X --> Z == 0
820 if (N1.getOperand(0) == N2)
821 return getSetCC(VT, N1.getOperand(1),
822 getConstant(0, N1.getValueType()), Cond);
823 if (N1.getOperand(1) == N2) {
824 if (isCommutativeBinOp(N1.getOpcode()))
825 return getSetCC(VT, N1.getOperand(0),
826 getConstant(0, N1.getValueType()), Cond);
828 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
829 // (Z-X) == X --> Z == X<<1
830 return getSetCC(VT, N1.getOperand(0),
831 getNode(ISD::SHL, N2.getValueType(),
832 N2, getConstant(1, TLI.getShiftAmountTy())),
838 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
839 N2.getOpcode() == ISD::XOR) {
840 // Simplify X == (X+Z) --> Z == 0
841 if (N2.getOperand(0) == N1) {
842 return getSetCC(VT, N2.getOperand(1),
843 getConstant(0, N2.getValueType()), Cond);
844 } else if (N2.getOperand(1) == N1) {
845 if (isCommutativeBinOp(N2.getOpcode())) {
846 return getSetCC(VT, N2.getOperand(0),
847 getConstant(0, N2.getValueType()), Cond);
849 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
850 // X == (Z-X) --> X<<1 == Z
851 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1,
852 getConstant(1, TLI.getShiftAmountTy())),
853 N2.getOperand(0), Cond);
859 // Fold away ALL boolean setcc's.
860 if (N1.getValueType() == MVT::i1) {
862 default: assert(0 && "Unknown integer setcc!");
863 case ISD::SETEQ: // X == Y -> (X^Y)^1
864 N1 = getNode(ISD::XOR, MVT::i1,
865 getNode(ISD::XOR, MVT::i1, N1, N2),
866 getConstant(1, MVT::i1));
868 case ISD::SETNE: // X != Y --> (X^Y)
869 N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
871 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
872 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
873 N1 = getNode(ISD::AND, MVT::i1, N2,
874 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
876 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
877 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
878 N1 = getNode(ISD::AND, MVT::i1, N1,
879 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
881 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
882 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
883 N1 = getNode(ISD::OR, MVT::i1, N2,
884 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
886 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
887 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
888 N1 = getNode(ISD::OR, MVT::i1, N1,
889 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
893 N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
897 // Could not fold it.
901 SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
902 SDOperand N3, SDOperand N4,
904 MVT::ValueType VT = N3.getValueType();
905 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
906 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
907 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
908 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val);
910 // Check to see if we can simplify the select into an fabs node
911 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) {
912 // Allow either -0.0 or 0.0
913 if (CFP->getValue() == 0.0) {
914 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
915 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
916 N1 == N3 && N4.getOpcode() == ISD::FNEG &&
917 N1 == N4.getOperand(0))
918 return getNode(ISD::FABS, VT, N1);
920 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
921 if ((CC == ISD::SETLT || CC == ISD::SETLE) &&
922 N1 == N4 && N3.getOpcode() == ISD::FNEG &&
923 N3.getOperand(0) == N4)
924 return getNode(ISD::FABS, VT, N4);
928 // check to see if we're select_cc'ing a select_cc.
929 // this allows us to turn:
930 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false ->
931 // select_cc cc, lhs, rhs, true, false
932 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) ||
933 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) &&
934 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
935 SDOperand SCC = N1C ? N2 : N1;
936 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2));
937 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3));
938 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) {
939 if (CC == ISD::SETEQ) std::swap(N3, N4);
940 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0),
941 SCC.getOperand(1), N3, N4, SCC.getOperand(4));
945 // Check to see if we can perform the "gzip trick", transforming
946 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
947 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
948 MVT::isInteger(N1.getValueType()) &&
949 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) {
950 MVT::ValueType XType = N1.getValueType();
951 MVT::ValueType AType = N3.getValueType();
952 if (XType >= AType) {
953 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
954 // single-bit constant. FIXME: remove once the dag combiner
956 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) {
957 unsigned ShCtV = Log2_64(N3C->getValue());
958 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
959 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
960 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt);
962 Shift = getNode(ISD::TRUNCATE, AType, Shift);
963 return getNode(ISD::AND, AType, Shift, N3);
965 SDOperand Shift = getNode(ISD::SRA, XType, N1,
966 getConstant(MVT::getSizeInBits(XType)-1,
967 TLI.getShiftAmountTy()));
969 Shift = getNode(ISD::TRUNCATE, AType, Shift);
970 return getNode(ISD::AND, AType, Shift, N3);
974 // Check to see if this is the equivalent of setcc
975 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) {
976 MVT::ValueType XType = N1.getValueType();
977 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy()))
978 return getSetCC(TLI.getSetCCResultTy(), N1, N2, CC);
980 // seteq X, 0 -> srl (ctlz X, log2(size(X)))
981 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ &&
982 TLI.isOperationLegal(ISD::CTLZ, XType)) {
983 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
984 return getNode(ISD::SRL, XType, Ctlz,
985 getConstant(Log2_32(MVT::getSizeInBits(XType)),
986 TLI.getShiftAmountTy()));
988 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1)
989 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) {
990 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1);
991 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType));
992 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1),
993 getConstant(MVT::getSizeInBits(XType)-1,
994 TLI.getShiftAmountTy()));
996 // setgt X, -1 -> xor (srl (X, size(X)-1), 1)
997 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) {
998 SDOperand Sign = getNode(ISD::SRL, XType, N1,
999 getConstant(MVT::getSizeInBits(XType)-1,
1000 TLI.getShiftAmountTy()));
1001 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType));
1005 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
1006 // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
1007 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&
1008 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) {
1009 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) {
1010 MVT::ValueType XType = N1.getValueType();
1011 if (SubC->isNullValue() && MVT::isInteger(XType)) {
1012 SDOperand Shift = getNode(ISD::SRA, XType, N1,
1013 getConstant(MVT::getSizeInBits(XType)-1,
1014 TLI.getShiftAmountTy()));
1015 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift),
1021 // Could not fold it.
1025 /// getNode - Gets or creates the specified node.
1027 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
1028 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)];
1030 N = new SDNode(Opcode, VT);
1031 AllNodes.push_back(N);
1033 return SDOperand(N, 0);
1036 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1037 SDOperand Operand) {
1038 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1039 uint64_t Val = C->getValue();
1042 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
1043 case ISD::ANY_EXTEND:
1044 case ISD::ZERO_EXTEND: return getConstant(Val, VT);
1045 case ISD::TRUNCATE: return getConstant(Val, VT);
1046 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT);
1047 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT);
1051 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
1054 return getConstantFP(-C->getValue(), VT);
1056 case ISD::FP_EXTEND:
1057 return getConstantFP(C->getValue(), VT);
1058 case ISD::FP_TO_SINT:
1059 return getConstant((int64_t)C->getValue(), VT);
1060 case ISD::FP_TO_UINT:
1061 return getConstant((uint64_t)C->getValue(), VT);
1064 unsigned OpOpcode = Operand.Val->getOpcode();
1066 case ISD::TokenFactor:
1067 return Operand; // Factor of one node? No factor.
1068 case ISD::SIGN_EXTEND:
1069 if (Operand.getValueType() == VT) return Operand; // noop extension
1070 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
1071 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1073 case ISD::ZERO_EXTEND:
1074 if (Operand.getValueType() == VT) return Operand; // noop extension
1075 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
1076 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
1078 case ISD::ANY_EXTEND:
1079 if (Operand.getValueType() == VT) return Operand; // noop extension
1080 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
1081 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
1082 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1085 if (Operand.getValueType() == VT) return Operand; // noop truncate
1086 if (OpOpcode == ISD::TRUNCATE)
1087 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1088 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
1089 OpOpcode == ISD::ANY_EXTEND) {
1090 // If the source is smaller than the dest, we still need an extend.
1091 if (Operand.Val->getOperand(0).getValueType() < VT)
1092 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1093 else if (Operand.Val->getOperand(0).getValueType() > VT)
1094 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1096 return Operand.Val->getOperand(0);
1100 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X)
1101 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1),
1102 Operand.Val->getOperand(0));
1103 if (OpOpcode == ISD::FNEG) // --X -> X
1104 return Operand.Val->getOperand(0);
1107 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
1108 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
1113 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
1114 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
1115 if (E) return SDOperand(E, 0);
1116 E = N = new SDNode(Opcode, Operand);
1118 N = new SDNode(Opcode, Operand);
1120 N->setValueTypes(VT);
1121 AllNodes.push_back(N);
1122 return SDOperand(N, 0);
1125 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1126 /// this predicate to simplify operations downstream. V and Mask are known to
1127 /// be the same type.
1128 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
1129 const TargetLowering &TLI) {
1131 if (Mask == 0) return true;
1133 // If we know the result of a setcc has the top bits zero, use this info.
1134 switch (Op.getOpcode()) {
1136 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
1139 return ((Mask & 1) == 0) &&
1140 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
1143 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
1144 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1145 case ISD::ZERO_EXTEND:
1146 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
1147 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
1148 case ISD::AssertZext:
1149 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
1150 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1152 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
1153 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1154 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
1159 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
1160 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
1162 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
1163 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
1164 case ISD::SELECT_CC:
1165 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
1166 MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
1168 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
1169 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1170 uint64_t NewVal = Mask << ShAmt->getValue();
1171 SrcBits = MVT::getSizeInBits(Op.getValueType());
1172 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
1173 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1177 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
1178 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1179 uint64_t NewVal = Mask >> ShAmt->getValue();
1180 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1186 // Bit counting instructions can not set the high bits of the result
1187 // register. The max number of bits sets depends on the input.
1188 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
1190 // TODO we could handle some SRA cases here.
1199 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1200 SDOperand N1, SDOperand N2) {
1203 case ISD::TokenFactor:
1204 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
1205 N2.getValueType() == MVT::Other && "Invalid token factor!");
1214 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
1221 assert(N1.getValueType() == N2.getValueType() &&
1222 N1.getValueType() == VT && "Binary operator types must match!");
1228 assert(VT == N1.getValueType() &&
1229 "Shift operators return type must be the same as their first arg");
1230 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
1231 VT != MVT::i1 && "Shifts only work on integers");
1233 case ISD::FP_ROUND_INREG: {
1234 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1235 assert(VT == N1.getValueType() && "Not an inreg round!");
1236 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1237 "Cannot FP_ROUND_INREG integer types");
1238 assert(EVT <= VT && "Not rounding down!");
1241 case ISD::AssertSext:
1242 case ISD::AssertZext:
1243 case ISD::SIGN_EXTEND_INREG: {
1244 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1245 assert(VT == N1.getValueType() && "Not an inreg extend!");
1246 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1247 "Cannot *_EXTEND_INREG FP types");
1248 assert(EVT <= VT && "Not extending!");
1255 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1256 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1259 if (!CombinerEnabled) {
1260 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
1262 case ISD::ADD: return getConstant(C1 + C2, VT);
1263 case ISD::SUB: return getConstant(C1 - C2, VT);
1264 case ISD::MUL: return getConstant(C1 * C2, VT);
1266 if (C2) return getConstant(C1 / C2, VT);
1269 if (C2) return getConstant(C1 % C2, VT);
1272 if (C2) return getConstant(N1C->getSignExtended() /
1273 N2C->getSignExtended(), VT);
1276 if (C2) return getConstant(N1C->getSignExtended() %
1277 N2C->getSignExtended(), VT);
1279 case ISD::AND : return getConstant(C1 & C2, VT);
1280 case ISD::OR : return getConstant(C1 | C2, VT);
1281 case ISD::XOR : return getConstant(C1 ^ C2, VT);
1282 case ISD::SHL : return getConstant(C1 << C2, VT);
1283 case ISD::SRL : return getConstant(C1 >> C2, VT);
1284 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
1288 } else { // Cannonicalize constant to RHS if commutative
1289 if (isCommutativeBinOp(Opcode)) {
1290 std::swap(N1C, N2C);
1295 if (!CombinerEnabled) {
1298 case ISD::SHL: // shl 0, X -> 0
1299 if (N1C->isNullValue()) return N1;
1301 case ISD::SRL: // srl 0, X -> 0
1302 if (N1C->isNullValue()) return N1;
1304 case ISD::SRA: // sra -1, X -> -1
1305 if (N1C->isAllOnesValue()) return N1;
1307 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT
1308 // Extending a constant? Just return the extended constant.
1309 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1);
1310 return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1316 uint64_t C2 = N2C->getValue();
1320 if (!C2) return N1; // add X, 0 -> X
1323 if (!C2) return N1; // sub X, 0 -> X
1324 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT));
1326 if (!C2) return N2; // mul X, 0 -> 0
1327 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
1328 return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
1330 // FIXME: Move this to the DAG combiner when it exists.
1331 if ((C2 & C2-1) == 0) {
1332 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1333 return getNode(ISD::SHL, VT, N1, ShAmt);
1339 if (!C2) return N2; // mul X, 0 -> 0
1341 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0
1342 return getConstant(0, VT);
1344 // Many others could be handled here, including -1, powers of 2, etc.
1348 // FIXME: Move this to the DAG combiner when it exists.
1349 if ((C2 & C2-1) == 0 && C2) {
1350 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1351 return getNode(ISD::SRL, VT, N1, ShAmt);
1358 // If the shift amount is bigger than the size of the data, then all the
1359 // bits are shifted out. Simplify to undef.
1360 if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
1361 return getNode(ISD::UNDEF, N1.getValueType());
1363 if (C2 == 0) return N1;
1365 if (Opcode == ISD::SRA) {
1366 // If the sign bit is known to be zero, switch this to a SRL.
1367 if (MaskedValueIsZero(N1,
1368 1ULL << (MVT::getSizeInBits(N1.getValueType())-1),
1370 return getNode(ISD::SRL, N1.getValueType(), N1, N2);
1372 // If the part left over is known to be zero, the whole thing is zero.
1373 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType()));
1374 if (Opcode == ISD::SRL) {
1375 if (MaskedValueIsZero(N1, TypeMask << C2, TLI))
1376 return getConstant(0, N1.getValueType());
1377 } else if (Opcode == ISD::SHL) {
1378 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI))
1379 return getConstant(0, N1.getValueType());
1383 if (Opcode == ISD::SHL && N1.getNumOperands() == 2)
1384 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1385 unsigned OpSAC = OpSA->getValue();
1386 if (N1.getOpcode() == ISD::SHL) {
1387 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType()))
1388 return getConstant(0, N1.getValueType());
1389 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0),
1390 getConstant(C2+OpSAC, N2.getValueType()));
1391 } else if (N1.getOpcode() == ISD::SRL) {
1392 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1)
1393 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0),
1394 getConstant(~0ULL << OpSAC, VT));
1396 return getNode(ISD::SHL, VT, Mask,
1397 getConstant(C2-OpSAC, N2.getValueType()));
1399 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2)
1400 return getNode(ISD::SRL, VT, Mask,
1401 getConstant(OpSAC-C2, N2.getValueType()));
1403 } else if (N1.getOpcode() == ISD::SRA) {
1404 // if C1 == C2, just mask out low bits.
1406 return getNode(ISD::AND, VT, N1.getOperand(0),
1407 getConstant(~0ULL << C2, VT));
1413 if (!C2) return N2; // X and 0 -> 0
1414 if (N2C->isAllOnesValue())
1415 return N1; // X and -1 -> X
1417 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0
1418 return getConstant(0, VT);
1421 uint64_t NotC2 = ~C2;
1423 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
1425 if (MaskedValueIsZero(N1, NotC2, TLI))
1426 return N1; // if (X & ~C2) -> 0, the and is redundant
1429 // FIXME: Should add a corresponding version of this for
1430 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
1431 // we don't have yet.
1432 // FIXME: NOW WE DO, add this.
1434 // and (sign_extend_inreg x:16:32), 1 -> and x, 1
1435 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
1436 // If we are masking out the part of our input that was extended, just
1437 // mask the input to the extension directly.
1438 unsigned ExtendBits =
1439 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT());
1440 if ((C2 & (~0ULL << ExtendBits)) == 0)
1441 return getNode(ISD::AND, VT, N1.getOperand(0), N2);
1442 } else if (N1.getOpcode() == ISD::OR) {
1443 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
1444 if ((ORI->getValue() & C2) == C2) {
1445 // If the 'or' is setting all of the bits that we are masking for,
1446 // we know the result of the AND will be the AND mask itself.
1452 if (!C2)return N1; // X or 0 -> X
1453 if (N2C->isAllOnesValue())
1454 return N2; // X or -1 -> -1
1457 if (!C2) return N1; // X xor 0 -> X
1458 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) {
1459 SDNode *SetCC = N1.Val;
1460 // !(X op Y) -> (X !op Y)
1461 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
1462 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
1463 return getSetCC(SetCC->getValueType(0),
1464 SetCC->getOperand(0), SetCC->getOperand(1),
1465 ISD::getSetCCInverse(CC, isInteger));
1466 } else if (N2C->isAllOnesValue()) {
1467 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
1468 SDNode *Op = N1.Val;
1469 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
1470 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1471 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1472 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1473 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS
1474 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS
1475 if (Op->getOpcode() == ISD::AND)
1476 return getNode(ISD::OR, VT, LHS, RHS);
1477 return getNode(ISD::AND, VT, LHS, RHS);
1480 // X xor -1 -> not(x) ?
1485 // Reassociate ((X op C1) op C2) if possible.
1486 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1487 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1488 return getNode(Opcode, VT, N1.Val->getOperand(0),
1489 getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1492 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1493 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1496 if (!CombinerEnabled) {
1497 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1499 case ISD::ADD: return getConstantFP(C1 + C2, VT);
1500 case ISD::SUB: return getConstantFP(C1 - C2, VT);
1501 case ISD::MUL: return getConstantFP(C1 * C2, VT);
1503 if (C2) return getConstantFP(C1 / C2, VT);
1506 if (C2) return getConstantFP(fmod(C1, C2), VT);
1511 } else { // Cannonicalize constant to RHS if commutative
1512 if (isCommutativeBinOp(Opcode)) {
1513 std::swap(N1CFP, N2CFP);
1518 if (Opcode == ISD::FP_ROUND_INREG)
1519 return getNode(ISD::FP_EXTEND, VT,
1520 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1));
1523 // Finally, fold operations that do not require constants.
1525 case ISD::TokenFactor:
1526 if (!CombinerEnabled) {
1527 if (N1.getOpcode() == ISD::EntryToken)
1529 if (N2.getOpcode() == ISD::EntryToken)
1536 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){
1537 SDNode *LHS = N1.Val, *RHS = N2.Val;
1538 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1539 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1540 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get();
1541 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get();
1543 if (LR == RR && isa<ConstantSDNode>(LR) &&
1544 Op2 == Op1 && MVT::isInteger(LL.getValueType())) {
1545 // (X != 0) | (Y != 0) -> (X|Y != 0)
1546 // (X == 0) & (Y == 0) -> (X|Y == 0)
1547 // (X < 0) | (Y < 0) -> (X|Y < 0)
1548 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1549 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1550 (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1551 (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1552 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR,
1555 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1556 // (X == -1) & (Y == -1) -> (X&Y == -1)
1557 // (X != -1) | (Y != -1) -> (X&Y != -1)
1558 // (X > -1) | (Y > -1) -> (X&Y > -1)
1559 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1560 (Opcode == ISD::OR && Op2 == ISD::SETNE) ||
1561 (Opcode == ISD::OR && Op2 == ISD::SETGT))
1562 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL),
1564 // (X > -1) & (Y > -1) -> (X|Y > -1)
1565 if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1566 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL),
1571 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1572 if (LL == RR && LR == RL) {
1573 Op2 = ISD::getSetCCSwappedOperands(Op2);
1574 goto MatchedBackwards;
1577 if (LL == RL && LR == RR) {
1579 ISD::CondCode Result;
1580 bool isInteger = MVT::isInteger(LL.getValueType());
1581 if (Opcode == ISD::OR)
1582 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger);
1584 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger);
1586 if (Result != ISD::SETCC_INVALID)
1587 return getSetCC(LHS->getValueType(0), LL, LR, Result);
1591 // and/or zext(a), zext(b) -> zext(and/or a, b)
1592 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1593 N2.getOpcode() == ISD::ZERO_EXTEND &&
1594 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1595 return getNode(ISD::ZERO_EXTEND, VT,
1596 getNode(Opcode, N1.getOperand(0).getValueType(),
1597 N1.getOperand(0), N2.getOperand(0)));
1600 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
1603 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B
1604 return getNode(ISD::SUB, VT, N1, N2.getOperand(0));
1605 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A
1606 return getNode(ISD::SUB, VT, N2, N1.getOperand(0));
1607 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1608 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1609 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1610 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1611 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1612 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1613 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) &&
1614 !MVT::isFloatingPoint(N2.getValueType()))
1615 return N2.Val->getOperand(0); // A+(B-A) -> B
1618 if (N1.getOpcode() == ISD::ADD) {
1619 if (N1.Val->getOperand(0) == N2 &&
1620 !MVT::isFloatingPoint(N2.getValueType()))
1621 return N1.Val->getOperand(1); // (A+B)-A == B
1622 if (N1.Val->getOperand(1) == N2 &&
1623 !MVT::isFloatingPoint(N2.getValueType()))
1624 return N1.Val->getOperand(0); // (A+B)-B == A
1626 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B
1627 return getNode(ISD::ADD, VT, N1, N2.getOperand(0));
1629 case ISD::FP_ROUND_INREG:
1630 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
1632 case ISD::SIGN_EXTEND_INREG: {
1633 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1634 if (EVT == VT) return N1; // Not actually extending
1636 // If we are sign extending an extension, use the original source.
1637 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG ||
1638 N1.getOpcode() == ISD::AssertSext)
1639 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT)
1642 // If we are sign extending a sextload, return just the load.
1643 if (N1.getOpcode() == ISD::SEXTLOAD)
1644 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT)
1647 // If we are extending the result of a setcc, and we already know the
1648 // contents of the top bits, eliminate the extension.
1649 if (N1.getOpcode() == ISD::SETCC &&
1650 TLI.getSetCCResultContents() ==
1651 TargetLowering::ZeroOrNegativeOneSetCCResult)
1654 // If we are sign extending the result of an (and X, C) operation, and we
1655 // know the extended bits are zeros already, don't do the extend.
1656 if (N1.getOpcode() == ISD::AND)
1657 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1658 uint64_t Mask = N1C->getValue();
1659 unsigned NumBits = MVT::getSizeInBits(EVT);
1660 if ((Mask & (~0ULL << (NumBits-1))) == 0)
1666 // FIXME: figure out how to safely handle things like
1667 // int foo(int x) { return 1 << (x & 255); }
1668 // int bar() { return foo(256); }
1673 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1674 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1)
1675 return getNode(Opcode, VT, N1, N2.getOperand(0));
1676 else if (N2.getOpcode() == ISD::AND)
1677 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1678 // If the and is only masking out bits that cannot effect the shift,
1679 // eliminate the and.
1680 unsigned NumBits = MVT::getSizeInBits(VT);
1681 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1682 return getNode(Opcode, VT, N1, N2.getOperand(0));
1688 // Memoize this node if possible.
1690 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END &&
1692 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1693 if (BON) return SDOperand(BON, 0);
1695 BON = N = new SDNode(Opcode, N1, N2);
1697 N = new SDNode(Opcode, N1, N2);
1700 N->setValueTypes(VT);
1701 AllNodes.push_back(N);
1702 return SDOperand(N, 0);
1705 // setAdjCallChain - This method changes the token chain of an
1706 // CALLSEQ_START/END node to be the specified operand.
1707 void SDNode::setAdjCallChain(SDOperand N) {
1708 assert(N.getValueType() == MVT::Other);
1709 assert((getOpcode() == ISD::CALLSEQ_START ||
1710 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!");
1712 Operands[0].Val->removeUser(this);
1714 N.Val->Uses.push_back(this);
1719 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1720 SDOperand Chain, SDOperand Ptr,
1722 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1723 if (N) return SDOperand(N, 0);
1724 N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1726 // Loads have a token chain.
1727 N->setValueTypes(VT, MVT::Other);
1728 AllNodes.push_back(N);
1729 return SDOperand(N, 0);
1733 SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT,
1734 SDOperand Chain, SDOperand Ptr, SDOperand SV,
1735 MVT::ValueType EVT) {
1736 std::vector<SDOperand> Ops;
1738 Ops.push_back(Chain);
1741 Ops.push_back(getValueType(EVT));
1742 std::vector<MVT::ValueType> VTs;
1744 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain.
1745 return getNode(Opcode, VTs, Ops);
1748 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1749 SDOperand N1, SDOperand N2, SDOperand N3) {
1750 // Perform various simplifications.
1751 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1752 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1753 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1756 // Use SimplifySetCC to simplify SETCC's.
1757 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
1758 if (Simp.Val) return Simp;
1763 if (N1C->getValue())
1764 return N2; // select true, X, Y -> X
1766 return N3; // select false, X, Y -> Y
1768 if (N2 == N3) return N2; // select C, X, X -> X
1770 if (VT == MVT::i1) { // Boolean SELECT
1772 if (N2C->getValue()) // select C, 1, X -> C | X
1773 return getNode(ISD::OR, VT, N1, N3);
1774 else // select C, 0, X -> ~C & X
1775 return getNode(ISD::AND, VT,
1776 getNode(ISD::XOR, N1.getValueType(), N1,
1777 getConstant(1, N1.getValueType())), N3);
1779 if (N3C->getValue()) // select C, X, 1 -> ~C | X
1780 return getNode(ISD::OR, VT,
1781 getNode(ISD::XOR, N1.getValueType(), N1,
1782 getConstant(1, N1.getValueType())), N2);
1783 else // select C, X, 0 -> C & X
1784 return getNode(ISD::AND, VT, N1, N2);
1787 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y
1788 return getNode(ISD::OR, VT, N1, N3);
1789 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y
1790 return getNode(ISD::AND, VT, N1, N2);
1792 if (N1.getOpcode() == ISD::SETCC) {
1793 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2,
1794 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get());
1795 if (Simp.Val) return Simp;
1800 if (N2C->getValue()) // Unconditional branch
1801 return getNode(ISD::BR, MVT::Other, N1, N3);
1803 return N1; // Never-taken branch
1807 std::vector<SDOperand> Ops;
1813 // Memoize node if it doesn't produce a flag.
1815 if (VT != MVT::Flag) {
1816 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))];
1817 if (E) return SDOperand(E, 0);
1818 E = N = new SDNode(Opcode, N1, N2, N3);
1820 N = new SDNode(Opcode, N1, N2, N3);
1822 N->setValueTypes(VT);
1823 AllNodes.push_back(N);
1824 return SDOperand(N, 0);
1827 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1828 SDOperand N1, SDOperand N2, SDOperand N3,
1830 std::vector<SDOperand> Ops;
1836 return getNode(Opcode, VT, Ops);
1839 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1840 SDOperand N1, SDOperand N2, SDOperand N3,
1841 SDOperand N4, SDOperand N5) {
1842 std::vector<SDOperand> Ops;
1849 return getNode(Opcode, VT, Ops);
1853 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
1854 assert((!V || isa<PointerType>(V->getType())) &&
1855 "SrcValue is not a pointer?");
1856 SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
1857 if (N) return SDOperand(N, 0);
1859 N = new SrcValueSDNode(V, Offset);
1860 AllNodes.push_back(N);
1861 return SDOperand(N, 0);
1864 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1865 std::vector<SDOperand> &Ops) {
1866 switch (Ops.size()) {
1867 case 0: return getNode(Opcode, VT);
1868 case 1: return getNode(Opcode, VT, Ops[0]);
1869 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
1870 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
1874 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val);
1877 case ISD::BRCONDTWOWAY:
1879 if (N1C->getValue()) // Unconditional branch to true dest.
1880 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]);
1881 else // Unconditional branch to false dest.
1882 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]);
1884 case ISD::BRTWOWAY_CC:
1885 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!");
1886 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1887 "LHS and RHS of comparison must have same type!");
1889 case ISD::TRUNCSTORE: {
1890 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1891 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
1892 #if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1893 // If this is a truncating store of a constant, convert to the desired type
1894 // and store it instead.
1895 if (isa<Constant>(Ops[0])) {
1896 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1897 if (isa<Constant>(Op))
1900 // Also for ConstantFP?
1902 if (Ops[0].getValueType() == EVT) // Normal store?
1903 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]);
1904 assert(Ops[1].getValueType() > EVT && "Not a truncation?");
1905 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) &&
1906 "Can't do FP-INT conversion!");
1909 case ISD::SELECT_CC: {
1910 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1911 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
1912 "LHS and RHS of condition must have same type!");
1913 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1914 "True and False arms of SelectCC must have same type!");
1915 assert(Ops[2].getValueType() == VT &&
1916 "select_cc node must be of same type as true and false value!");
1917 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3],
1918 cast<CondCodeSDNode>(Ops[4])->get());
1919 if (Simp.Val) return Simp;
1923 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1924 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1925 "LHS/RHS of comparison should match types!");
1926 // Use SimplifySetCC to simplify SETCC's.
1927 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3],
1928 cast<CondCodeSDNode>(Ops[1])->get());
1930 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) {
1931 if (C->getValue() & 1) // Unconditional branch
1932 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]);
1934 return Ops[0]; // Unconditional Fall through
1935 } else if (Simp.Val->getOpcode() == ISD::SETCC) {
1936 Ops[2] = Simp.getOperand(0);
1937 Ops[3] = Simp.getOperand(1);
1938 Ops[1] = Simp.getOperand(2);
1947 if (VT != MVT::Flag) {
1949 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))];
1950 if (E) return SDOperand(E, 0);
1951 E = N = new SDNode(Opcode, Ops);
1953 N = new SDNode(Opcode, Ops);
1955 N->setValueTypes(VT);
1956 AllNodes.push_back(N);
1957 return SDOperand(N, 0);
1960 SDOperand SelectionDAG::getNode(unsigned Opcode,
1961 std::vector<MVT::ValueType> &ResultTys,
1962 std::vector<SDOperand> &Ops) {
1963 if (ResultTys.size() == 1)
1964 return getNode(Opcode, ResultTys[0], Ops);
1969 case ISD::ZEXTLOAD: {
1970 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT();
1971 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
1972 // If they are asking for an extending load from/to the same thing, return a
1974 if (ResultTys[0] == EVT)
1975 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]);
1976 assert(EVT < ResultTys[0] &&
1977 "Should only be an extending load, not truncating!");
1978 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) &&
1979 "Cannot sign/zero extend a FP load!");
1980 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) &&
1981 "Cannot convert from FP to Int or Int -> FP!");
1985 // FIXME: figure out how to safely handle things like
1986 // int foo(int x) { return 1 << (x & 255); }
1987 // int bar() { return foo(256); }
1989 case ISD::SRA_PARTS:
1990 case ISD::SRL_PARTS:
1991 case ISD::SHL_PARTS:
1992 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1993 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
1994 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1995 else if (N3.getOpcode() == ISD::AND)
1996 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
1997 // If the and is only masking out bits that cannot effect the shift,
1998 // eliminate the and.
1999 unsigned NumBits = MVT::getSizeInBits(VT)*2;
2000 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
2001 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
2007 // Memoize the node unless it returns a flag.
2009 if (ResultTys.back() != MVT::Flag) {
2011 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))];
2012 if (E) return SDOperand(E, 0);
2013 E = N = new SDNode(Opcode, Ops);
2015 N = new SDNode(Opcode, Ops);
2017 N->setValueTypes(ResultTys);
2018 AllNodes.push_back(N);
2019 return SDOperand(N, 0);
2023 /// SelectNodeTo - These are used for target selectors to *mutate* the
2024 /// specified node to have the specified return type, Target opcode, and
2025 /// operands. Note that target opcodes are stored as
2026 /// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
2027 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2028 MVT::ValueType VT) {
2029 RemoveNodeFromCSEMaps(N);
2030 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2031 N->setValueTypes(VT);
2033 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2034 MVT::ValueType VT, SDOperand Op1) {
2035 RemoveNodeFromCSEMaps(N);
2036 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2037 N->setValueTypes(VT);
2038 N->setOperands(Op1);
2040 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2041 MVT::ValueType VT, SDOperand Op1,
2043 RemoveNodeFromCSEMaps(N);
2044 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2045 N->setValueTypes(VT);
2046 N->setOperands(Op1, Op2);
2048 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2049 MVT::ValueType VT1, MVT::ValueType VT2,
2050 SDOperand Op1, SDOperand Op2) {
2051 RemoveNodeFromCSEMaps(N);
2052 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2053 N->setValueTypes(VT1, VT2);
2054 N->setOperands(Op1, Op2);
2056 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2057 MVT::ValueType VT, SDOperand Op1,
2058 SDOperand Op2, SDOperand Op3) {
2059 RemoveNodeFromCSEMaps(N);
2060 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2061 N->setValueTypes(VT);
2062 N->setOperands(Op1, Op2, Op3);
2064 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2065 MVT::ValueType VT1, MVT::ValueType VT2,
2066 SDOperand Op1, SDOperand Op2, SDOperand Op3) {
2067 RemoveNodeFromCSEMaps(N);
2068 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2069 N->setValueTypes(VT1, VT2);
2070 N->setOperands(Op1, Op2, Op3);
2073 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2074 MVT::ValueType VT, SDOperand Op1,
2075 SDOperand Op2, SDOperand Op3, SDOperand Op4) {
2076 RemoveNodeFromCSEMaps(N);
2077 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2078 N->setValueTypes(VT);
2079 N->setOperands(Op1, Op2, Op3, Op4);
2081 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2082 MVT::ValueType VT, SDOperand Op1,
2083 SDOperand Op2, SDOperand Op3, SDOperand Op4,
2085 RemoveNodeFromCSEMaps(N);
2086 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2087 N->setValueTypes(VT);
2088 N->setOperands(Op1, Op2, Op3, Op4, Op5);
2091 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2092 /// This can cause recursive merging of nodes in the DAG.
2094 /// This version assumes From/To have a single result value.
2096 void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN,
2097 std::vector<SDNode*> *Deleted) {
2098 SDNode *From = FromN.Val, *To = ToN.Val;
2099 assert(From->getNumValues() == 1 && To->getNumValues() == 1 &&
2100 "Cannot replace with this method!");
2101 assert(From != To && "Cannot replace uses of with self");
2103 while (!From->use_empty()) {
2104 // Process users until they are all gone.
2105 SDNode *U = *From->use_begin();
2107 // This node is about to morph, remove its old self from the CSE maps.
2108 RemoveNodeFromCSEMaps(U);
2110 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2111 if (U->getOperand(i).Val == From) {
2112 From->removeUser(U);
2113 U->Operands[i].Val = To;
2117 // Now that we have modified U, add it back to the CSE maps. If it already
2118 // exists there, recursively merge the results together.
2119 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2120 ReplaceAllUsesWith(U, Existing, Deleted);
2122 if (Deleted) Deleted->push_back(U);
2123 DeleteNodeNotInCSEMaps(U);
2128 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2129 /// This can cause recursive merging of nodes in the DAG.
2131 /// This version assumes From/To have matching types and numbers of result
2134 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
2135 std::vector<SDNode*> *Deleted) {
2136 assert(From != To && "Cannot replace uses of with self");
2137 assert(From->getNumValues() == To->getNumValues() &&
2138 "Cannot use this version of ReplaceAllUsesWith!");
2139 if (From->getNumValues() == 1) { // If possible, use the faster version.
2140 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted);
2144 while (!From->use_empty()) {
2145 // Process users until they are all gone.
2146 SDNode *U = *From->use_begin();
2148 // This node is about to morph, remove its old self from the CSE maps.
2149 RemoveNodeFromCSEMaps(U);
2151 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2152 if (U->getOperand(i).Val == From) {
2153 From->removeUser(U);
2154 U->Operands[i].Val = To;
2158 // Now that we have modified U, add it back to the CSE maps. If it already
2159 // exists there, recursively merge the results together.
2160 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2161 ReplaceAllUsesWith(U, Existing, Deleted);
2163 if (Deleted) Deleted->push_back(U);
2164 DeleteNodeNotInCSEMaps(U);
2169 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2170 /// This can cause recursive merging of nodes in the DAG.
2172 /// This version can replace From with any result values. To must match the
2173 /// number and types of values returned by From.
2174 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
2175 const std::vector<SDOperand> &To,
2176 std::vector<SDNode*> *Deleted) {
2177 assert(From->getNumValues() == To.size() &&
2178 "Incorrect number of values to replace with!");
2179 if (To.size() == 1 && To[0].Val->getNumValues() == 1) {
2180 // Degenerate case handled above.
2181 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted);
2185 while (!From->use_empty()) {
2186 // Process users until they are all gone.
2187 SDNode *U = *From->use_begin();
2189 // This node is about to morph, remove its old self from the CSE maps.
2190 RemoveNodeFromCSEMaps(U);
2192 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2193 if (U->getOperand(i).Val == From) {
2194 const SDOperand &ToOp = To[U->getOperand(i).ResNo];
2195 From->removeUser(U);
2196 U->Operands[i] = ToOp;
2197 ToOp.Val->addUser(U);
2200 // Now that we have modified U, add it back to the CSE maps. If it already
2201 // exists there, recursively merge the results together.
2202 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2203 ReplaceAllUsesWith(U, Existing, Deleted);
2205 if (Deleted) Deleted->push_back(U);
2206 DeleteNodeNotInCSEMaps(U);
2212 //===----------------------------------------------------------------------===//
2214 //===----------------------------------------------------------------------===//
2216 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
2217 /// indicated value. This method ignores uses of other values defined by this
2219 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
2220 assert(Value < getNumValues() && "Bad value!");
2222 // If there is only one value, this is easy.
2223 if (getNumValues() == 1)
2224 return use_size() == NUses;
2225 if (Uses.size() < NUses) return false;
2227 SDOperand TheValue(this, Value);
2229 std::set<SDNode*> UsersHandled;
2231 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
2234 if (User->getNumOperands() == 1 ||
2235 UsersHandled.insert(User).second) // First time we've seen this?
2236 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
2237 if (User->getOperand(i) == TheValue) {
2239 return false; // too many uses
2244 // Found exactly the right number of uses?
2249 const char *SDNode::getOperationName(const SelectionDAG *G) const {
2250 switch (getOpcode()) {
2252 if (getOpcode() < ISD::BUILTIN_OP_END)
2253 return "<<Unknown DAG Node>>";
2256 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
2257 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END);
2258 return "<<Unknown Target Node>>";
2261 case ISD::PCMARKER: return "PCMarker";
2262 case ISD::SRCVALUE: return "SrcValue";
2263 case ISD::VALUETYPE: return "ValueType";
2264 case ISD::EntryToken: return "EntryToken";
2265 case ISD::TokenFactor: return "TokenFactor";
2266 case ISD::AssertSext: return "AssertSext";
2267 case ISD::AssertZext: return "AssertZext";
2268 case ISD::Constant: return "Constant";
2269 case ISD::TargetConstant: return "TargetConstant";
2270 case ISD::ConstantFP: return "ConstantFP";
2271 case ISD::GlobalAddress: return "GlobalAddress";
2272 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
2273 case ISD::FrameIndex: return "FrameIndex";
2274 case ISD::TargetFrameIndex: return "TargetFrameIndex";
2275 case ISD::BasicBlock: return "BasicBlock";
2276 case ISD::Register: return "Register";
2277 case ISD::ExternalSymbol: return "ExternalSymbol";
2278 case ISD::ConstantPool: return "ConstantPool";
2279 case ISD::TargetConstantPool: return "TargetConstantPool";
2280 case ISD::CopyToReg: return "CopyToReg";
2281 case ISD::CopyFromReg: return "CopyFromReg";
2282 case ISD::ImplicitDef: return "ImplicitDef";
2283 case ISD::UNDEF: return "undef";
2286 case ISD::FABS: return "fabs";
2287 case ISD::FNEG: return "fneg";
2288 case ISD::FSQRT: return "fsqrt";
2289 case ISD::FSIN: return "fsin";
2290 case ISD::FCOS: return "fcos";
2293 case ISD::ADD: return "add";
2294 case ISD::SUB: return "sub";
2295 case ISD::MUL: return "mul";
2296 case ISD::MULHU: return "mulhu";
2297 case ISD::MULHS: return "mulhs";
2298 case ISD::SDIV: return "sdiv";
2299 case ISD::UDIV: return "udiv";
2300 case ISD::SREM: return "srem";
2301 case ISD::UREM: return "urem";
2302 case ISD::AND: return "and";
2303 case ISD::OR: return "or";
2304 case ISD::XOR: return "xor";
2305 case ISD::SHL: return "shl";
2306 case ISD::SRA: return "sra";
2307 case ISD::SRL: return "srl";
2309 case ISD::SETCC: return "setcc";
2310 case ISD::SELECT: return "select";
2311 case ISD::SELECT_CC: return "select_cc";
2312 case ISD::ADD_PARTS: return "add_parts";
2313 case ISD::SUB_PARTS: return "sub_parts";
2314 case ISD::SHL_PARTS: return "shl_parts";
2315 case ISD::SRA_PARTS: return "sra_parts";
2316 case ISD::SRL_PARTS: return "srl_parts";
2318 // Conversion operators.
2319 case ISD::SIGN_EXTEND: return "sign_extend";
2320 case ISD::ZERO_EXTEND: return "zero_extend";
2321 case ISD::ANY_EXTEND: return "any_extend";
2322 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
2323 case ISD::TRUNCATE: return "truncate";
2324 case ISD::FP_ROUND: return "fp_round";
2325 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
2326 case ISD::FP_EXTEND: return "fp_extend";
2328 case ISD::SINT_TO_FP: return "sint_to_fp";
2329 case ISD::UINT_TO_FP: return "uint_to_fp";
2330 case ISD::FP_TO_SINT: return "fp_to_sint";
2331 case ISD::FP_TO_UINT: return "fp_to_uint";
2333 // Control flow instructions
2334 case ISD::BR: return "br";
2335 case ISD::BRCOND: return "brcond";
2336 case ISD::BRCONDTWOWAY: return "brcondtwoway";
2337 case ISD::BR_CC: return "br_cc";
2338 case ISD::BRTWOWAY_CC: return "brtwoway_cc";
2339 case ISD::RET: return "ret";
2340 case ISD::CALL: return "call";
2341 case ISD::TAILCALL:return "tailcall";
2342 case ISD::CALLSEQ_START: return "callseq_start";
2343 case ISD::CALLSEQ_END: return "callseq_end";
2346 case ISD::LOAD: return "load";
2347 case ISD::STORE: return "store";
2348 case ISD::EXTLOAD: return "extload";
2349 case ISD::SEXTLOAD: return "sextload";
2350 case ISD::ZEXTLOAD: return "zextload";
2351 case ISD::TRUNCSTORE: return "truncstore";
2353 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
2354 case ISD::EXTRACT_ELEMENT: return "extract_element";
2355 case ISD::BUILD_PAIR: return "build_pair";
2356 case ISD::MEMSET: return "memset";
2357 case ISD::MEMCPY: return "memcpy";
2358 case ISD::MEMMOVE: return "memmove";
2361 case ISD::CTPOP: return "ctpop";
2362 case ISD::CTTZ: return "cttz";
2363 case ISD::CTLZ: return "ctlz";
2366 case ISD::READPORT: return "readport";
2367 case ISD::WRITEPORT: return "writeport";
2368 case ISD::READIO: return "readio";
2369 case ISD::WRITEIO: return "writeio";
2372 switch (cast<CondCodeSDNode>(this)->get()) {
2373 default: assert(0 && "Unknown setcc condition!");
2374 case ISD::SETOEQ: return "setoeq";
2375 case ISD::SETOGT: return "setogt";
2376 case ISD::SETOGE: return "setoge";
2377 case ISD::SETOLT: return "setolt";
2378 case ISD::SETOLE: return "setole";
2379 case ISD::SETONE: return "setone";
2381 case ISD::SETO: return "seto";
2382 case ISD::SETUO: return "setuo";
2383 case ISD::SETUEQ: return "setue";
2384 case ISD::SETUGT: return "setugt";
2385 case ISD::SETUGE: return "setuge";
2386 case ISD::SETULT: return "setult";
2387 case ISD::SETULE: return "setule";
2388 case ISD::SETUNE: return "setune";
2390 case ISD::SETEQ: return "seteq";
2391 case ISD::SETGT: return "setgt";
2392 case ISD::SETGE: return "setge";
2393 case ISD::SETLT: return "setlt";
2394 case ISD::SETLE: return "setle";
2395 case ISD::SETNE: return "setne";
2400 void SDNode::dump() const { dump(0); }
2401 void SDNode::dump(const SelectionDAG *G) const {
2402 std::cerr << (void*)this << ": ";
2404 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
2405 if (i) std::cerr << ",";
2406 if (getValueType(i) == MVT::Other)
2409 std::cerr << MVT::getValueTypeString(getValueType(i));
2411 std::cerr << " = " << getOperationName(G);
2414 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
2415 if (i) std::cerr << ", ";
2416 std::cerr << (void*)getOperand(i).Val;
2417 if (unsigned RN = getOperand(i).ResNo)
2418 std::cerr << ":" << RN;
2421 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
2422 std::cerr << "<" << CSDN->getValue() << ">";
2423 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
2424 std::cerr << "<" << CSDN->getValue() << ">";
2425 } else if (const GlobalAddressSDNode *GADN =
2426 dyn_cast<GlobalAddressSDNode>(this)) {
2428 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
2429 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
2430 std::cerr << "<" << FIDN->getIndex() << ">";
2431 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
2432 std::cerr << "<" << *CP->get() << ">";
2433 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
2435 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
2437 std::cerr << LBB->getName() << " ";
2438 std::cerr << (const void*)BBDN->getBasicBlock() << ">";
2439 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
2440 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) {
2441 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
2443 std::cerr << " #" << R->getReg();
2445 } else if (const ExternalSymbolSDNode *ES =
2446 dyn_cast<ExternalSymbolSDNode>(this)) {
2447 std::cerr << "'" << ES->getSymbol() << "'";
2448 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
2450 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
2452 std::cerr << "<null:" << M->getOffset() << ">";
2453 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
2454 std::cerr << ":" << getValueTypeString(N->getVT());
2458 static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) {
2459 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
2460 if (N->getOperand(i).Val->hasOneUse())
2461 DumpNodes(N->getOperand(i).Val, indent+2, G);
2463 std::cerr << "\n" << std::string(indent+2, ' ')
2464 << (void*)N->getOperand(i).Val << ": <multiple use>";
2467 std::cerr << "\n" << std::string(indent, ' ');
2471 void SelectionDAG::dump() const {
2472 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
2473 std::vector<SDNode*> Nodes(AllNodes);
2474 std::sort(Nodes.begin(), Nodes.end());
2476 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
2477 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
2478 DumpNodes(Nodes[i], 2, this);
2481 DumpNodes(getRoot().Val, 2, this);
2483 std::cerr << "\n\n";