1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Support/MathExtras.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetLowering.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/ADT/SetVector.h"
34 #include "llvm/ADT/SmallPtrSet.h"
35 #include "llvm/ADT/SmallSet.h"
36 #include "llvm/ADT/SmallVector.h"
37 #include "llvm/ADT/StringExtras.h"
42 /// makeVTList - Return an instance of the SDVTList struct initialized with the
43 /// specified members.
44 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
45 SDVTList Res = {VTs, NumVTs};
49 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
50 switch (VT.getSimpleVT()) {
51 default: assert(0 && "Unknown FP format");
52 case MVT::f32: return &APFloat::IEEEsingle;
53 case MVT::f64: return &APFloat::IEEEdouble;
54 case MVT::f80: return &APFloat::x87DoubleExtended;
55 case MVT::f128: return &APFloat::IEEEquad;
56 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
60 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
62 //===----------------------------------------------------------------------===//
63 // ConstantFPSDNode Class
64 //===----------------------------------------------------------------------===//
66 /// isExactlyValue - We don't rely on operator== working on double values, as
67 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
68 /// As such, this method can be used to do an exact bit-for-bit comparison of
69 /// two floating point values.
70 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
71 return Value.bitwiseIsEqual(V);
74 bool ConstantFPSDNode::isValueValidForType(MVT VT,
76 assert(VT.isFloatingPoint() && "Can only convert between FP types");
78 // PPC long double cannot be converted to any other type.
79 if (VT == MVT::ppcf128 ||
80 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
85 return Val2.convert(*MVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven) == APFloat::opOK;
89 //===----------------------------------------------------------------------===//
91 //===----------------------------------------------------------------------===//
93 /// isBuildVectorAllOnes - Return true if the specified node is a
94 /// BUILD_VECTOR where all of the elements are ~0 or undef.
95 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
96 // Look through a bit convert.
97 if (N->getOpcode() == ISD::BIT_CONVERT)
98 N = N->getOperand(0).Val;
100 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
102 unsigned i = 0, e = N->getNumOperands();
104 // Skip over all of the undef values.
105 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
108 // Do not accept an all-undef vector.
109 if (i == e) return false;
111 // Do not accept build_vectors that aren't all constants or which have non-~0
113 SDValue NotZero = N->getOperand(i);
114 if (isa<ConstantSDNode>(NotZero)) {
115 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
117 } else if (isa<ConstantFPSDNode>(NotZero)) {
118 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
119 convertToAPInt().isAllOnesValue())
124 // Okay, we have at least one ~0 value, check to see if the rest match or are
126 for (++i; i != e; ++i)
127 if (N->getOperand(i) != NotZero &&
128 N->getOperand(i).getOpcode() != ISD::UNDEF)
134 /// isBuildVectorAllZeros - Return true if the specified node is a
135 /// BUILD_VECTOR where all of the elements are 0 or undef.
136 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
137 // Look through a bit convert.
138 if (N->getOpcode() == ISD::BIT_CONVERT)
139 N = N->getOperand(0).Val;
141 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
143 unsigned i = 0, e = N->getNumOperands();
145 // Skip over all of the undef values.
146 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
149 // Do not accept an all-undef vector.
150 if (i == e) return false;
152 // Do not accept build_vectors that aren't all constants or which have non-~0
154 SDValue Zero = N->getOperand(i);
155 if (isa<ConstantSDNode>(Zero)) {
156 if (!cast<ConstantSDNode>(Zero)->isNullValue())
158 } else if (isa<ConstantFPSDNode>(Zero)) {
159 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
164 // Okay, we have at least one ~0 value, check to see if the rest match or are
166 for (++i; i != e; ++i)
167 if (N->getOperand(i) != Zero &&
168 N->getOperand(i).getOpcode() != ISD::UNDEF)
173 /// isScalarToVector - Return true if the specified node is a
174 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
175 /// element is not an undef.
176 bool ISD::isScalarToVector(const SDNode *N) {
177 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
180 if (N->getOpcode() != ISD::BUILD_VECTOR)
182 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
184 unsigned NumElems = N->getNumOperands();
185 for (unsigned i = 1; i < NumElems; ++i) {
186 SDValue V = N->getOperand(i);
187 if (V.getOpcode() != ISD::UNDEF)
194 /// isDebugLabel - Return true if the specified node represents a debug
195 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
196 bool ISD::isDebugLabel(const SDNode *N) {
198 if (N->getOpcode() == ISD::DBG_LABEL)
200 if (N->isMachineOpcode() &&
201 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
206 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
207 /// when given the operation for (X op Y).
208 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
209 // To perform this operation, we just need to swap the L and G bits of the
211 unsigned OldL = (Operation >> 2) & 1;
212 unsigned OldG = (Operation >> 1) & 1;
213 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
214 (OldL << 1) | // New G bit
215 (OldG << 2)); // New L bit.
218 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
219 /// 'op' is a valid SetCC operation.
220 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
221 unsigned Operation = Op;
223 Operation ^= 7; // Flip L, G, E bits, but not U.
225 Operation ^= 15; // Flip all of the condition bits.
226 if (Operation > ISD::SETTRUE2)
227 Operation &= ~8; // Don't let N and U bits get set.
228 return ISD::CondCode(Operation);
232 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
233 /// signed operation and 2 if the result is an unsigned comparison. Return zero
234 /// if the operation does not depend on the sign of the input (setne and seteq).
235 static int isSignedOp(ISD::CondCode Opcode) {
237 default: assert(0 && "Illegal integer setcc operation!");
239 case ISD::SETNE: return 0;
243 case ISD::SETGE: return 1;
247 case ISD::SETUGE: return 2;
251 /// getSetCCOrOperation - Return the result of a logical OR between different
252 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
253 /// returns SETCC_INVALID if it is not possible to represent the resultant
255 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
257 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
258 // Cannot fold a signed integer setcc with an unsigned integer setcc.
259 return ISD::SETCC_INVALID;
261 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
263 // If the N and U bits get set then the resultant comparison DOES suddenly
264 // care about orderedness, and is true when ordered.
265 if (Op > ISD::SETTRUE2)
266 Op &= ~16; // Clear the U bit if the N bit is set.
268 // Canonicalize illegal integer setcc's.
269 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
272 return ISD::CondCode(Op);
275 /// getSetCCAndOperation - Return the result of a logical AND between different
276 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
277 /// function returns zero if it is not possible to represent the resultant
279 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
281 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
282 // Cannot fold a signed setcc with an unsigned setcc.
283 return ISD::SETCC_INVALID;
285 // Combine all of the condition bits.
286 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
288 // Canonicalize illegal integer setcc's.
292 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
293 case ISD::SETOEQ: // SETEQ & SETU[LG]E
294 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
295 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
296 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
303 const TargetMachine &SelectionDAG::getTarget() const {
304 return TLI.getTargetMachine();
307 //===----------------------------------------------------------------------===//
308 // SDNode Profile Support
309 //===----------------------------------------------------------------------===//
311 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
313 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
317 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
318 /// solely with their pointer.
319 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
320 ID.AddPointer(VTList.VTs);
323 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
325 static void AddNodeIDOperands(FoldingSetNodeID &ID,
326 const SDValue *Ops, unsigned NumOps) {
327 for (; NumOps; --NumOps, ++Ops) {
328 ID.AddPointer(Ops->Val);
329 ID.AddInteger(Ops->ResNo);
333 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
335 static void AddNodeIDOperands(FoldingSetNodeID &ID,
336 const SDUse *Ops, unsigned NumOps) {
337 for (; NumOps; --NumOps, ++Ops) {
338 ID.AddPointer(Ops->getVal());
339 ID.AddInteger(Ops->getSDValue().ResNo);
343 static void AddNodeIDNode(FoldingSetNodeID &ID,
344 unsigned short OpC, SDVTList VTList,
345 const SDValue *OpList, unsigned N) {
346 AddNodeIDOpcode(ID, OpC);
347 AddNodeIDValueTypes(ID, VTList);
348 AddNodeIDOperands(ID, OpList, N);
352 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
354 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
355 AddNodeIDOpcode(ID, N->getOpcode());
356 // Add the return value info.
357 AddNodeIDValueTypes(ID, N->getVTList());
358 // Add the operand info.
359 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
361 // Handle SDNode leafs with special info.
362 switch (N->getOpcode()) {
363 default: break; // Normal nodes don't need extra info.
365 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
367 case ISD::TargetConstant:
369 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue());
371 case ISD::TargetConstantFP:
372 case ISD::ConstantFP: {
373 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF());
376 case ISD::TargetGlobalAddress:
377 case ISD::GlobalAddress:
378 case ISD::TargetGlobalTLSAddress:
379 case ISD::GlobalTLSAddress: {
380 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
381 ID.AddPointer(GA->getGlobal());
382 ID.AddInteger(GA->getOffset());
385 case ISD::BasicBlock:
386 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
389 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
391 case ISD::DBG_STOPPOINT: {
392 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
393 ID.AddInteger(DSP->getLine());
394 ID.AddInteger(DSP->getColumn());
395 ID.AddPointer(DSP->getCompileUnit());
399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
401 case ISD::MEMOPERAND: {
402 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
406 case ISD::FrameIndex:
407 case ISD::TargetFrameIndex:
408 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
411 case ISD::TargetJumpTable:
412 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
414 case ISD::ConstantPool:
415 case ISD::TargetConstantPool: {
416 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
417 ID.AddInteger(CP->getAlignment());
418 ID.AddInteger(CP->getOffset());
419 if (CP->isMachineConstantPoolEntry())
420 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
422 ID.AddPointer(CP->getConstVal());
426 const LoadSDNode *LD = cast<LoadSDNode>(N);
427 ID.AddInteger(LD->getAddressingMode());
428 ID.AddInteger(LD->getExtensionType());
429 ID.AddInteger(LD->getMemoryVT().getRawBits());
430 ID.AddInteger(LD->getRawFlags());
434 const StoreSDNode *ST = cast<StoreSDNode>(N);
435 ID.AddInteger(ST->getAddressingMode());
436 ID.AddInteger(ST->isTruncatingStore());
437 ID.AddInteger(ST->getMemoryVT().getRawBits());
438 ID.AddInteger(ST->getRawFlags());
441 case ISD::ATOMIC_CMP_SWAP:
442 case ISD::ATOMIC_LOAD_ADD:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_SUB:
445 case ISD::ATOMIC_LOAD_AND:
446 case ISD::ATOMIC_LOAD_OR:
447 case ISD::ATOMIC_LOAD_XOR:
448 case ISD::ATOMIC_LOAD_NAND:
449 case ISD::ATOMIC_LOAD_MIN:
450 case ISD::ATOMIC_LOAD_MAX:
451 case ISD::ATOMIC_LOAD_UMIN:
452 case ISD::ATOMIC_LOAD_UMAX: {
453 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
454 ID.AddInteger(AT->getRawFlags());
457 } // end switch (N->getOpcode())
460 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
461 /// the CSE map that carries both alignment and volatility information.
463 static unsigned encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
464 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
467 //===----------------------------------------------------------------------===//
468 // SelectionDAG Class
469 //===----------------------------------------------------------------------===//
471 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
473 void SelectionDAG::RemoveDeadNodes() {
474 // Create a dummy node (which is not added to allnodes), that adds a reference
475 // to the root node, preventing it from being deleted.
476 HandleSDNode Dummy(getRoot());
478 SmallVector<SDNode*, 128> DeadNodes;
480 // Add all obviously-dead nodes to the DeadNodes worklist.
481 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
483 DeadNodes.push_back(I);
485 RemoveDeadNodes(DeadNodes);
487 // If the root changed (e.g. it was a dead load, update the root).
488 setRoot(Dummy.getValue());
491 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
492 /// given list, and any nodes that become unreachable as a result.
493 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
494 DAGUpdateListener *UpdateListener) {
496 // Process the worklist, deleting the nodes and adding their uses to the
498 while (!DeadNodes.empty()) {
499 SDNode *N = DeadNodes.back();
500 DeadNodes.pop_back();
503 UpdateListener->NodeDeleted(N, 0);
505 // Take the node out of the appropriate CSE map.
506 RemoveNodeFromCSEMaps(N);
508 // Next, brutally remove the operand list. This is safe to do, as there are
509 // no cycles in the graph.
510 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
511 SDNode *Operand = I->getVal();
512 Operand->removeUser(std::distance(N->op_begin(), I), N);
514 // Now that we removed this operand, see if there are no uses of it left.
515 if (Operand->use_empty())
516 DeadNodes.push_back(Operand);
518 if (N->OperandsNeedDelete) {
519 delete[] N->OperandList;
524 // Finally, remove N itself.
529 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
530 SmallVector<SDNode*, 16> DeadNodes(1, N);
531 RemoveDeadNodes(DeadNodes, UpdateListener);
534 void SelectionDAG::DeleteNode(SDNode *N) {
535 assert(N->use_empty() && "Cannot delete a node that is not dead!");
537 // First take this out of the appropriate CSE map.
538 RemoveNodeFromCSEMaps(N);
540 // Finally, remove uses due to operands of this node, remove from the
541 // AllNodes list, and delete the node.
542 DeleteNodeNotInCSEMaps(N);
545 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
547 // Drop all of the operands and decrement used nodes use counts.
548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
549 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
550 if (N->OperandsNeedDelete) {
551 delete[] N->OperandList;
559 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
560 /// correspond to it. This is useful when we're about to delete or repurpose
561 /// the node. We don't want future request for structurally identical nodes
562 /// to return N anymore.
563 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
565 switch (N->getOpcode()) {
566 case ISD::HANDLENODE: return; // noop.
568 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
569 "Cond code doesn't exist!");
570 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
571 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
573 case ISD::ExternalSymbol:
574 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
576 case ISD::TargetExternalSymbol:
578 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
580 case ISD::VALUETYPE: {
581 MVT VT = cast<VTSDNode>(N)->getVT();
582 if (VT.isExtended()) {
583 Erased = ExtendedValueTypeNodes.erase(VT);
585 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
586 ValueTypeNodes[VT.getSimpleVT()] = 0;
591 // Remove it from the CSE Map.
592 Erased = CSEMap.RemoveNode(N);
596 // Verify that the node was actually in one of the CSE maps, unless it has a
597 // flag result (which cannot be CSE'd) or is one of the special cases that are
598 // not subject to CSE.
599 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
600 !N->isTargetOpcode() &&
601 N->getOpcode() != ISD::DBG_LABEL &&
602 N->getOpcode() != ISD::DBG_STOPPOINT &&
603 N->getOpcode() != ISD::EH_LABEL &&
604 N->getOpcode() != ISD::DECLARE) {
607 assert(0 && "Node is not in map!");
612 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
613 /// has been taken out and modified in some way. If the specified node already
614 /// exists in the CSE maps, do not modify the maps, but return the existing node
615 /// instead. If it doesn't exist, add it and return null.
617 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
618 assert(N->getNumOperands() && "This is a leaf node!");
620 if (N->getValueType(0) == MVT::Flag)
621 return 0; // Never CSE anything that produces a flag.
623 switch (N->getOpcode()) {
625 case ISD::HANDLENODE:
627 case ISD::DBG_STOPPOINT:
630 return 0; // Never add these nodes.
633 // Check that remaining values produced are not flags.
634 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
635 if (N->getValueType(i) == MVT::Flag)
636 return 0; // Never CSE anything that produces a flag.
638 SDNode *New = CSEMap.GetOrInsertNode(N);
639 if (New != N) return New; // Node already existed.
643 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
644 /// were replaced with those specified. If this node is never memoized,
645 /// return null, otherwise return a pointer to the slot it would take. If a
646 /// node already exists with these operands, the slot will be non-null.
647 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
649 if (N->getValueType(0) == MVT::Flag)
650 return 0; // Never CSE anything that produces a flag.
652 switch (N->getOpcode()) {
654 case ISD::HANDLENODE:
656 case ISD::DBG_STOPPOINT:
658 return 0; // Never add these nodes.
661 // Check that remaining values produced are not flags.
662 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
663 if (N->getValueType(i) == MVT::Flag)
664 return 0; // Never CSE anything that produces a flag.
666 SDValue Ops[] = { Op };
668 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
669 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
672 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
673 /// were replaced with those specified. If this node is never memoized,
674 /// return null, otherwise return a pointer to the slot it would take. If a
675 /// node already exists with these operands, the slot will be non-null.
676 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
677 SDValue Op1, SDValue Op2,
679 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
681 // Check that remaining values produced are not flags.
682 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
683 if (N->getValueType(i) == MVT::Flag)
684 return 0; // Never CSE anything that produces a flag.
686 SDValue Ops[] = { Op1, Op2 };
688 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
689 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
693 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
694 /// were replaced with those specified. If this node is never memoized,
695 /// return null, otherwise return a pointer to the slot it would take. If a
696 /// node already exists with these operands, the slot will be non-null.
697 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
698 const SDValue *Ops,unsigned NumOps,
700 if (N->getValueType(0) == MVT::Flag)
701 return 0; // Never CSE anything that produces a flag.
703 switch (N->getOpcode()) {
705 case ISD::HANDLENODE:
707 case ISD::DBG_STOPPOINT:
710 return 0; // Never add these nodes.
713 // Check that remaining values produced are not flags.
714 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
715 if (N->getValueType(i) == MVT::Flag)
716 return 0; // Never CSE anything that produces a flag.
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
721 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
722 ID.AddInteger(LD->getAddressingMode());
723 ID.AddInteger(LD->getExtensionType());
724 ID.AddInteger(LD->getMemoryVT().getRawBits());
725 ID.AddInteger(LD->getRawFlags());
726 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
727 ID.AddInteger(ST->getAddressingMode());
728 ID.AddInteger(ST->isTruncatingStore());
729 ID.AddInteger(ST->getMemoryVT().getRawBits());
730 ID.AddInteger(ST->getRawFlags());
733 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
736 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
737 void SelectionDAG::VerifyNode(SDNode *N) {
738 switch (N->getOpcode()) {
741 case ISD::BUILD_VECTOR: {
742 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!");
743 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!");
744 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
745 "Wrong number of BUILD_VECTOR operands!");
746 MVT EltVT = N->getValueType(0).getVectorElementType();
747 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
748 assert(I->getSDValue().getValueType() == EltVT &&
749 "Wrong BUILD_VECTOR operand type!");
755 /// getMVTAlignment - Compute the default alignment value for the
758 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
759 const Type *Ty = VT == MVT::iPTR ?
760 PointerType::get(Type::Int8Ty, 0) :
763 return TLI.getTargetData()->getABITypeAlignment(Ty);
766 SelectionDAG::SelectionDAG(TargetLowering &tli, MachineFunction &mf,
767 FunctionLoweringInfo &fli, MachineModuleInfo *mmi,
768 NodeAllocatorType &nodeallocator)
769 : TLI(tli), MF(mf), FLI(fli), MMI(mmi), NodeAllocator(nodeallocator) {
770 EntryNode = Root = getNode(ISD::EntryToken, MVT::Other);
773 SelectionDAG::~SelectionDAG() {
774 while (!AllNodes.empty()) {
775 SDNode *N = AllNodes.remove(AllNodes.begin());
776 N->SetNextInBucket(0);
777 if (N->OperandsNeedDelete) {
778 delete [] N->OperandList;
785 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
786 if (Op.getValueType() == VT) return Op;
787 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
789 return getNode(ISD::AND, Op.getValueType(), Op,
790 getConstant(Imm, Op.getValueType()));
793 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
794 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
795 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
798 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
799 assert(VT.isInteger() && "Cannot create FP integer constant!");
801 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
802 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
803 "APInt size does not match type size!");
805 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
807 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
811 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
813 return SDValue(N, 0);
815 N = NodeAllocator.Allocate<ConstantSDNode>();
816 new (N) ConstantSDNode(isT, Val, EltVT);
817 CSEMap.InsertNode(N, IP);
818 AllNodes.push_back(N);
821 SDValue Result(N, 0);
823 SmallVector<SDValue, 8> Ops;
824 Ops.assign(VT.getVectorNumElements(), Result);
825 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
830 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
831 return getConstant(Val, TLI.getPointerTy(), isTarget);
835 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
836 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
839 VT.isVector() ? VT.getVectorElementType() : VT;
841 // Do the map lookup using the actual bit pattern for the floating point
842 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
843 // we don't have issues with SNANs.
844 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
846 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
850 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
852 return SDValue(N, 0);
854 N = NodeAllocator.Allocate<ConstantFPSDNode>();
855 new (N) ConstantFPSDNode(isTarget, V, EltVT);
856 CSEMap.InsertNode(N, IP);
857 AllNodes.push_back(N);
860 SDValue Result(N, 0);
862 SmallVector<SDValue, 8> Ops;
863 Ops.assign(VT.getVectorNumElements(), Result);
864 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
869 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
871 VT.isVector() ? VT.getVectorElementType() : VT;
873 return getConstantFP(APFloat((float)Val), VT, isTarget);
875 return getConstantFP(APFloat(Val), VT, isTarget);
878 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
883 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
885 // If GV is an alias then use the aliasee for determining thread-localness.
886 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
887 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
890 if (GVar && GVar->isThreadLocal())
891 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
893 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
896 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
898 ID.AddInteger(Offset);
900 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
901 return SDValue(E, 0);
902 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
903 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
904 CSEMap.InsertNode(N, IP);
905 AllNodes.push_back(N);
906 return SDValue(N, 0);
909 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
910 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
912 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
915 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
916 return SDValue(E, 0);
917 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
918 new (N) FrameIndexSDNode(FI, VT, isTarget);
919 CSEMap.InsertNode(N, IP);
920 AllNodes.push_back(N);
921 return SDValue(N, 0);
924 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
925 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
927 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
930 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
931 return SDValue(E, 0);
932 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
933 new (N) JumpTableSDNode(JTI, VT, isTarget);
934 CSEMap.InsertNode(N, IP);
935 AllNodes.push_back(N);
936 return SDValue(N, 0);
939 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
940 unsigned Alignment, int Offset,
942 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
944 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
945 ID.AddInteger(Alignment);
946 ID.AddInteger(Offset);
949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
950 return SDValue(E, 0);
951 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
952 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
953 CSEMap.InsertNode(N, IP);
954 AllNodes.push_back(N);
955 return SDValue(N, 0);
959 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
960 unsigned Alignment, int Offset,
962 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
964 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
965 ID.AddInteger(Alignment);
966 ID.AddInteger(Offset);
967 C->AddSelectionDAGCSEId(ID);
969 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
970 return SDValue(E, 0);
971 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
972 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
973 CSEMap.InsertNode(N, IP);
974 AllNodes.push_back(N);
975 return SDValue(N, 0);
979 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
981 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
985 return SDValue(E, 0);
986 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
987 new (N) BasicBlockSDNode(MBB);
988 CSEMap.InsertNode(N, IP);
989 AllNodes.push_back(N);
990 return SDValue(N, 0);
993 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
995 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
996 ID.AddInteger(Flags.getRawBits());
998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
999 return SDValue(E, 0);
1000 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1001 new (N) ARG_FLAGSSDNode(Flags);
1002 CSEMap.InsertNode(N, IP);
1003 AllNodes.push_back(N);
1004 return SDValue(N, 0);
1007 SDValue SelectionDAG::getValueType(MVT VT) {
1008 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1009 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1011 SDNode *&N = VT.isExtended() ?
1012 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1014 if (N) return SDValue(N, 0);
1015 N = NodeAllocator.Allocate<VTSDNode>();
1016 new (N) VTSDNode(VT);
1017 AllNodes.push_back(N);
1018 return SDValue(N, 0);
1021 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1022 SDNode *&N = ExternalSymbols[Sym];
1023 if (N) return SDValue(N, 0);
1024 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1025 new (N) ExternalSymbolSDNode(false, Sym, VT);
1026 AllNodes.push_back(N);
1027 return SDValue(N, 0);
1030 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1031 SDNode *&N = TargetExternalSymbols[Sym];
1032 if (N) return SDValue(N, 0);
1033 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1034 new (N) ExternalSymbolSDNode(true, Sym, VT);
1035 AllNodes.push_back(N);
1036 return SDValue(N, 0);
1039 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1040 if ((unsigned)Cond >= CondCodeNodes.size())
1041 CondCodeNodes.resize(Cond+1);
1043 if (CondCodeNodes[Cond] == 0) {
1044 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1045 new (N) CondCodeSDNode(Cond);
1046 CondCodeNodes[Cond] = N;
1047 AllNodes.push_back(N);
1049 return SDValue(CondCodeNodes[Cond], 0);
1052 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1053 FoldingSetNodeID ID;
1054 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1055 ID.AddInteger(RegNo);
1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1058 return SDValue(E, 0);
1059 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1060 new (N) RegisterSDNode(RegNo, VT);
1061 CSEMap.InsertNode(N, IP);
1062 AllNodes.push_back(N);
1063 return SDValue(N, 0);
1066 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1067 unsigned Line, unsigned Col,
1068 const CompileUnitDesc *CU) {
1069 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1070 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1071 AllNodes.push_back(N);
1072 return SDValue(N, 0);
1075 SDValue SelectionDAG::getLabel(unsigned Opcode,
1078 FoldingSetNodeID ID;
1079 SDValue Ops[] = { Root };
1080 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1081 ID.AddInteger(LabelID);
1083 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1084 return SDValue(E, 0);
1085 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1086 new (N) LabelSDNode(Opcode, Root, LabelID);
1087 CSEMap.InsertNode(N, IP);
1088 AllNodes.push_back(N);
1089 return SDValue(N, 0);
1092 SDValue SelectionDAG::getSrcValue(const Value *V) {
1093 assert((!V || isa<PointerType>(V->getType())) &&
1094 "SrcValue is not a pointer?");
1096 FoldingSetNodeID ID;
1097 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1102 return SDValue(E, 0);
1104 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1105 new (N) SrcValueSDNode(V);
1106 CSEMap.InsertNode(N, IP);
1107 AllNodes.push_back(N);
1108 return SDValue(N, 0);
1111 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1112 const Value *v = MO.getValue();
1113 assert((!v || isa<PointerType>(v->getType())) &&
1114 "SrcValue is not a pointer?");
1116 FoldingSetNodeID ID;
1117 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1122 return SDValue(E, 0);
1124 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1125 new (N) MemOperandSDNode(MO);
1126 CSEMap.InsertNode(N, IP);
1127 AllNodes.push_back(N);
1128 return SDValue(N, 0);
1131 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1132 /// specified value type.
1133 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1134 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1135 unsigned ByteSize = VT.getSizeInBits()/8;
1136 const Type *Ty = VT.getTypeForMVT();
1137 unsigned StackAlign =
1138 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1140 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1141 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1144 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1145 SDValue N2, ISD::CondCode Cond) {
1146 // These setcc operations always fold.
1150 case ISD::SETFALSE2: return getConstant(0, VT);
1152 case ISD::SETTRUE2: return getConstant(1, VT);
1164 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1168 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
1169 const APInt &C2 = N2C->getAPIntValue();
1170 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
1171 const APInt &C1 = N1C->getAPIntValue();
1174 default: assert(0 && "Unknown integer setcc!");
1175 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1176 case ISD::SETNE: return getConstant(C1 != C2, VT);
1177 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1178 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1179 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1180 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1181 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1182 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1183 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1184 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1188 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) {
1189 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
1190 // No compile time operations on this type yet.
1191 if (N1C->getValueType(0) == MVT::ppcf128)
1194 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1197 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1198 return getNode(ISD::UNDEF, VT);
1200 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1201 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1202 return getNode(ISD::UNDEF, VT);
1204 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1205 R==APFloat::cmpLessThan, VT);
1206 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1207 return getNode(ISD::UNDEF, VT);
1209 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1210 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1211 return getNode(ISD::UNDEF, VT);
1213 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1214 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1215 return getNode(ISD::UNDEF, VT);
1217 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1218 R==APFloat::cmpEqual, VT);
1219 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1220 return getNode(ISD::UNDEF, VT);
1222 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1223 R==APFloat::cmpEqual, VT);
1224 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1225 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1226 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1227 R==APFloat::cmpEqual, VT);
1228 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1229 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1230 R==APFloat::cmpLessThan, VT);
1231 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1232 R==APFloat::cmpUnordered, VT);
1233 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1234 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1237 // Ensure that the constant occurs on the RHS.
1238 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1242 // Could not fold it.
1246 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1247 /// use this predicate to simplify operations downstream.
1248 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1249 unsigned BitWidth = Op.getValueSizeInBits();
1250 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1253 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1254 /// this predicate to simplify operations downstream. Mask is known to be zero
1255 /// for bits that V cannot have.
1256 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1257 unsigned Depth) const {
1258 APInt KnownZero, KnownOne;
1259 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1260 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1261 return (KnownZero & Mask) == Mask;
1264 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1265 /// known to be either zero or one and return them in the KnownZero/KnownOne
1266 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1268 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1269 APInt &KnownZero, APInt &KnownOne,
1270 unsigned Depth) const {
1271 unsigned BitWidth = Mask.getBitWidth();
1272 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1273 "Mask size mismatches value type size!");
1275 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1276 if (Depth == 6 || Mask == 0)
1277 return; // Limit search depth.
1279 APInt KnownZero2, KnownOne2;
1281 switch (Op.getOpcode()) {
1283 // We know all of the bits for a constant!
1284 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1285 KnownZero = ~KnownOne & Mask;
1288 // If either the LHS or the RHS are Zero, the result is zero.
1289 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1290 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1291 KnownZero2, KnownOne2, Depth+1);
1292 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1293 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1295 // Output known-1 bits are only known if set in both the LHS & RHS.
1296 KnownOne &= KnownOne2;
1297 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1298 KnownZero |= KnownZero2;
1301 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1302 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1303 KnownZero2, KnownOne2, Depth+1);
1304 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1305 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1307 // Output known-0 bits are only known if clear in both the LHS & RHS.
1308 KnownZero &= KnownZero2;
1309 // Output known-1 are known to be set if set in either the LHS | RHS.
1310 KnownOne |= KnownOne2;
1313 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1314 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1315 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1316 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1318 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1319 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1320 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1321 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1322 KnownZero = KnownZeroOut;
1326 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1327 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1328 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1329 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1330 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1332 // If low bits are zero in either operand, output low known-0 bits.
1333 // Also compute a conserative estimate for high known-0 bits.
1334 // More trickiness is possible, but this is sufficient for the
1335 // interesting case of alignment computation.
1337 unsigned TrailZ = KnownZero.countTrailingOnes() +
1338 KnownZero2.countTrailingOnes();
1339 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1340 KnownZero2.countLeadingOnes(),
1341 BitWidth) - BitWidth;
1343 TrailZ = std::min(TrailZ, BitWidth);
1344 LeadZ = std::min(LeadZ, BitWidth);
1345 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1346 APInt::getHighBitsSet(BitWidth, LeadZ);
1351 // For the purposes of computing leading zeros we can conservatively
1352 // treat a udiv as a logical right shift by the power of 2 known to
1353 // be less than the denominator.
1354 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1355 ComputeMaskedBits(Op.getOperand(0),
1356 AllOnes, KnownZero2, KnownOne2, Depth+1);
1357 unsigned LeadZ = KnownZero2.countLeadingOnes();
1361 ComputeMaskedBits(Op.getOperand(1),
1362 AllOnes, KnownZero2, KnownOne2, Depth+1);
1363 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1364 if (RHSUnknownLeadingOnes != BitWidth)
1365 LeadZ = std::min(BitWidth,
1366 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1368 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1372 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1373 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1374 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1375 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1377 // Only known if known in both the LHS and RHS.
1378 KnownOne &= KnownOne2;
1379 KnownZero &= KnownZero2;
1381 case ISD::SELECT_CC:
1382 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1383 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1384 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1385 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1387 // Only known if known in both the LHS and RHS.
1388 KnownOne &= KnownOne2;
1389 KnownZero &= KnownZero2;
1392 // If we know the result of a setcc has the top bits zero, use this info.
1393 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1395 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1398 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1399 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1400 unsigned ShAmt = SA->getValue();
1402 // If the shift count is an invalid immediate, don't do anything.
1403 if (ShAmt >= BitWidth)
1406 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1407 KnownZero, KnownOne, Depth+1);
1408 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1409 KnownZero <<= ShAmt;
1411 // low bits known zero.
1412 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1416 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1417 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1418 unsigned ShAmt = SA->getValue();
1420 // If the shift count is an invalid immediate, don't do anything.
1421 if (ShAmt >= BitWidth)
1424 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1425 KnownZero, KnownOne, Depth+1);
1426 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1427 KnownZero = KnownZero.lshr(ShAmt);
1428 KnownOne = KnownOne.lshr(ShAmt);
1430 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1431 KnownZero |= HighBits; // High bits known zero.
1435 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1436 unsigned ShAmt = SA->getValue();
1438 // If the shift count is an invalid immediate, don't do anything.
1439 if (ShAmt >= BitWidth)
1442 APInt InDemandedMask = (Mask << ShAmt);
1443 // If any of the demanded bits are produced by the sign extension, we also
1444 // demand the input sign bit.
1445 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1446 if (HighBits.getBoolValue())
1447 InDemandedMask |= APInt::getSignBit(BitWidth);
1449 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1451 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1452 KnownZero = KnownZero.lshr(ShAmt);
1453 KnownOne = KnownOne.lshr(ShAmt);
1455 // Handle the sign bits.
1456 APInt SignBit = APInt::getSignBit(BitWidth);
1457 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1459 if (KnownZero.intersects(SignBit)) {
1460 KnownZero |= HighBits; // New bits are known zero.
1461 } else if (KnownOne.intersects(SignBit)) {
1462 KnownOne |= HighBits; // New bits are known one.
1466 case ISD::SIGN_EXTEND_INREG: {
1467 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1468 unsigned EBits = EVT.getSizeInBits();
1470 // Sign extension. Compute the demanded bits in the result that are not
1471 // present in the input.
1472 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1474 APInt InSignBit = APInt::getSignBit(EBits);
1475 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1477 // If the sign extended bits are demanded, we know that the sign
1479 InSignBit.zext(BitWidth);
1480 if (NewBits.getBoolValue())
1481 InputDemandedBits |= InSignBit;
1483 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1484 KnownZero, KnownOne, Depth+1);
1485 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1487 // If the sign bit of the input is known set or clear, then we know the
1488 // top bits of the result.
1489 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1490 KnownZero |= NewBits;
1491 KnownOne &= ~NewBits;
1492 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1493 KnownOne |= NewBits;
1494 KnownZero &= ~NewBits;
1495 } else { // Input sign bit unknown
1496 KnownZero &= ~NewBits;
1497 KnownOne &= ~NewBits;
1504 unsigned LowBits = Log2_32(BitWidth)+1;
1505 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1510 if (ISD::isZEXTLoad(Op.Val)) {
1511 LoadSDNode *LD = cast<LoadSDNode>(Op);
1512 MVT VT = LD->getMemoryVT();
1513 unsigned MemBits = VT.getSizeInBits();
1514 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1518 case ISD::ZERO_EXTEND: {
1519 MVT InVT = Op.getOperand(0).getValueType();
1520 unsigned InBits = InVT.getSizeInBits();
1521 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1522 APInt InMask = Mask;
1523 InMask.trunc(InBits);
1524 KnownZero.trunc(InBits);
1525 KnownOne.trunc(InBits);
1526 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1527 KnownZero.zext(BitWidth);
1528 KnownOne.zext(BitWidth);
1529 KnownZero |= NewBits;
1532 case ISD::SIGN_EXTEND: {
1533 MVT InVT = Op.getOperand(0).getValueType();
1534 unsigned InBits = InVT.getSizeInBits();
1535 APInt InSignBit = APInt::getSignBit(InBits);
1536 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1537 APInt InMask = Mask;
1538 InMask.trunc(InBits);
1540 // If any of the sign extended bits are demanded, we know that the sign
1541 // bit is demanded. Temporarily set this bit in the mask for our callee.
1542 if (NewBits.getBoolValue())
1543 InMask |= InSignBit;
1545 KnownZero.trunc(InBits);
1546 KnownOne.trunc(InBits);
1547 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1549 // Note if the sign bit is known to be zero or one.
1550 bool SignBitKnownZero = KnownZero.isNegative();
1551 bool SignBitKnownOne = KnownOne.isNegative();
1552 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1553 "Sign bit can't be known to be both zero and one!");
1555 // If the sign bit wasn't actually demanded by our caller, we don't
1556 // want it set in the KnownZero and KnownOne result values. Reset the
1557 // mask and reapply it to the result values.
1559 InMask.trunc(InBits);
1560 KnownZero &= InMask;
1563 KnownZero.zext(BitWidth);
1564 KnownOne.zext(BitWidth);
1566 // If the sign bit is known zero or one, the top bits match.
1567 if (SignBitKnownZero)
1568 KnownZero |= NewBits;
1569 else if (SignBitKnownOne)
1570 KnownOne |= NewBits;
1573 case ISD::ANY_EXTEND: {
1574 MVT InVT = Op.getOperand(0).getValueType();
1575 unsigned InBits = InVT.getSizeInBits();
1576 APInt InMask = Mask;
1577 InMask.trunc(InBits);
1578 KnownZero.trunc(InBits);
1579 KnownOne.trunc(InBits);
1580 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1581 KnownZero.zext(BitWidth);
1582 KnownOne.zext(BitWidth);
1585 case ISD::TRUNCATE: {
1586 MVT InVT = Op.getOperand(0).getValueType();
1587 unsigned InBits = InVT.getSizeInBits();
1588 APInt InMask = Mask;
1589 InMask.zext(InBits);
1590 KnownZero.zext(InBits);
1591 KnownOne.zext(InBits);
1592 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1593 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1594 KnownZero.trunc(BitWidth);
1595 KnownOne.trunc(BitWidth);
1598 case ISD::AssertZext: {
1599 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1600 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1601 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1603 KnownZero |= (~InMask) & Mask;
1607 // All bits are zero except the low bit.
1608 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1612 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1613 // We know that the top bits of C-X are clear if X contains less bits
1614 // than C (i.e. no wrap-around can happen). For example, 20-X is
1615 // positive if we can prove that X is >= 0 and < 16.
1616 if (CLHS->getAPIntValue().isNonNegative()) {
1617 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1618 // NLZ can't be BitWidth with no sign bit
1619 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1620 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1623 // If all of the MaskV bits are known to be zero, then we know the
1624 // output top bits are zero, because we now know that the output is
1626 if ((KnownZero2 & MaskV) == MaskV) {
1627 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1628 // Top bits known zero.
1629 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1636 // Output known-0 bits are known if clear or set in both the low clear bits
1637 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1638 // low 3 bits clear.
1639 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1640 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1641 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1644 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1645 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1646 KnownZeroOut = std::min(KnownZeroOut,
1647 KnownZero2.countTrailingOnes());
1649 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1653 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1654 const APInt &RA = Rem->getAPIntValue();
1655 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1656 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1657 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1658 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1660 // If the sign bit of the first operand is zero, the sign bit of
1661 // the result is zero. If the first operand has no one bits below
1662 // the second operand's single 1 bit, its sign will be zero.
1663 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1664 KnownZero2 |= ~LowBits;
1666 KnownZero |= KnownZero2 & Mask;
1668 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1673 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1674 const APInt &RA = Rem->getAPIntValue();
1675 if (RA.isPowerOf2()) {
1676 APInt LowBits = (RA - 1);
1677 APInt Mask2 = LowBits & Mask;
1678 KnownZero |= ~LowBits & Mask;
1679 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1680 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1685 // Since the result is less than or equal to either operand, any leading
1686 // zero bits in either operand must also exist in the result.
1687 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1688 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1690 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1693 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1694 KnownZero2.countLeadingOnes());
1696 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1700 // Allow the target to implement this method for its nodes.
1701 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1702 case ISD::INTRINSIC_WO_CHAIN:
1703 case ISD::INTRINSIC_W_CHAIN:
1704 case ISD::INTRINSIC_VOID:
1705 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1711 /// ComputeNumSignBits - Return the number of times the sign bit of the
1712 /// register is replicated into the other bits. We know that at least 1 bit
1713 /// is always equal to the sign bit (itself), but other cases can give us
1714 /// information. For example, immediately after an "SRA X, 2", we know that
1715 /// the top 3 bits are all equal to each other, so we return 3.
1716 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1717 MVT VT = Op.getValueType();
1718 assert(VT.isInteger() && "Invalid VT!");
1719 unsigned VTBits = VT.getSizeInBits();
1721 unsigned FirstAnswer = 1;
1724 return 1; // Limit search depth.
1726 switch (Op.getOpcode()) {
1728 case ISD::AssertSext:
1729 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1730 return VTBits-Tmp+1;
1731 case ISD::AssertZext:
1732 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1735 case ISD::Constant: {
1736 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1737 // If negative, return # leading ones.
1738 if (Val.isNegative())
1739 return Val.countLeadingOnes();
1741 // Return # leading zeros.
1742 return Val.countLeadingZeros();
1745 case ISD::SIGN_EXTEND:
1746 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1747 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1749 case ISD::SIGN_EXTEND_INREG:
1750 // Max of the input and what this extends.
1751 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1754 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1755 return std::max(Tmp, Tmp2);
1758 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1759 // SRA X, C -> adds C sign bits.
1760 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1761 Tmp += C->getValue();
1762 if (Tmp > VTBits) Tmp = VTBits;
1766 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1767 // shl destroys sign bits.
1768 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1769 if (C->getValue() >= VTBits || // Bad shift.
1770 C->getValue() >= Tmp) break; // Shifted all sign bits out.
1771 return Tmp - C->getValue();
1776 case ISD::XOR: // NOT is handled here.
1777 // Logical binary ops preserve the number of sign bits at the worst.
1778 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1780 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1781 FirstAnswer = std::min(Tmp, Tmp2);
1782 // We computed what we know about the sign bits as our first
1783 // answer. Now proceed to the generic code that uses
1784 // ComputeMaskedBits, and pick whichever answer is better.
1789 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1790 if (Tmp == 1) return 1; // Early out.
1791 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1792 return std::min(Tmp, Tmp2);
1795 // If setcc returns 0/-1, all bits are sign bits.
1796 if (TLI.getSetCCResultContents() ==
1797 TargetLowering::ZeroOrNegativeOneSetCCResult)
1802 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1803 unsigned RotAmt = C->getValue() & (VTBits-1);
1805 // Handle rotate right by N like a rotate left by 32-N.
1806 if (Op.getOpcode() == ISD::ROTR)
1807 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1809 // If we aren't rotating out all of the known-in sign bits, return the
1810 // number that are left. This handles rotl(sext(x), 1) for example.
1811 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1812 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1816 // Add can have at most one carry bit. Thus we know that the output
1817 // is, at worst, one more bit than the inputs.
1818 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1819 if (Tmp == 1) return 1; // Early out.
1821 // Special case decrementing a value (ADD X, -1):
1822 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1823 if (CRHS->isAllOnesValue()) {
1824 APInt KnownZero, KnownOne;
1825 APInt Mask = APInt::getAllOnesValue(VTBits);
1826 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1828 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1830 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1833 // If we are subtracting one from a positive number, there is no carry
1834 // out of the result.
1835 if (KnownZero.isNegative())
1839 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1840 if (Tmp2 == 1) return 1;
1841 return std::min(Tmp, Tmp2)-1;
1845 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1846 if (Tmp2 == 1) return 1;
1849 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1850 if (CLHS->isNullValue()) {
1851 APInt KnownZero, KnownOne;
1852 APInt Mask = APInt::getAllOnesValue(VTBits);
1853 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1854 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1856 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1859 // If the input is known to be positive (the sign bit is known clear),
1860 // the output of the NEG has the same number of sign bits as the input.
1861 if (KnownZero.isNegative())
1864 // Otherwise, we treat this like a SUB.
1867 // Sub can have at most one carry bit. Thus we know that the output
1868 // is, at worst, one more bit than the inputs.
1869 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1870 if (Tmp == 1) return 1; // Early out.
1871 return std::min(Tmp, Tmp2)-1;
1874 // FIXME: it's tricky to do anything useful for this, but it is an important
1875 // case for targets like X86.
1879 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1880 if (Op.getOpcode() == ISD::LOAD) {
1881 LoadSDNode *LD = cast<LoadSDNode>(Op);
1882 unsigned ExtType = LD->getExtensionType();
1885 case ISD::SEXTLOAD: // '17' bits known
1886 Tmp = LD->getMemoryVT().getSizeInBits();
1887 return VTBits-Tmp+1;
1888 case ISD::ZEXTLOAD: // '16' bits known
1889 Tmp = LD->getMemoryVT().getSizeInBits();
1894 // Allow the target to implement this method for its nodes.
1895 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1896 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1897 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1898 Op.getOpcode() == ISD::INTRINSIC_VOID) {
1899 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
1900 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
1903 // Finally, if we can prove that the top bits of the result are 0's or 1's,
1904 // use this information.
1905 APInt KnownZero, KnownOne;
1906 APInt Mask = APInt::getAllOnesValue(VTBits);
1907 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1909 if (KnownZero.isNegative()) { // sign bit is 0
1911 } else if (KnownOne.isNegative()) { // sign bit is 1;
1918 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
1919 // the number of identical bits in the top of the input value.
1921 Mask <<= Mask.getBitWidth()-VTBits;
1922 // Return # leading zeros. We use 'min' here in case Val was zero before
1923 // shifting. We don't want to return '64' as for an i32 "0".
1924 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
1928 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
1929 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
1930 if (!GA) return false;
1931 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
1932 if (!GV) return false;
1933 MachineModuleInfo *MMI = getMachineModuleInfo();
1934 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
1938 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
1939 /// element of the result of the vector shuffle.
1940 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
1941 MVT VT = N->getValueType(0);
1942 SDValue PermMask = N->getOperand(2);
1943 SDValue Idx = PermMask.getOperand(i);
1944 if (Idx.getOpcode() == ISD::UNDEF)
1945 return getNode(ISD::UNDEF, VT.getVectorElementType());
1946 unsigned Index = cast<ConstantSDNode>(Idx)->getValue();
1947 unsigned NumElems = PermMask.getNumOperands();
1948 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
1951 if (V.getOpcode() == ISD::BIT_CONVERT) {
1952 V = V.getOperand(0);
1953 if (V.getValueType().getVectorNumElements() != NumElems)
1956 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
1957 return (Index == 0) ? V.getOperand(0)
1958 : getNode(ISD::UNDEF, VT.getVectorElementType());
1959 if (V.getOpcode() == ISD::BUILD_VECTOR)
1960 return V.getOperand(Index);
1961 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
1962 return getShuffleScalarElt(V.Val, Index);
1967 /// getNode - Gets or creates the specified node.
1969 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
1970 FoldingSetNodeID ID;
1971 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
1973 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1974 return SDValue(E, 0);
1975 SDNode *N = NodeAllocator.Allocate<SDNode>();
1976 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
1977 CSEMap.InsertNode(N, IP);
1979 AllNodes.push_back(N);
1983 return SDValue(N, 0);
1986 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
1987 // Constant fold unary operations with an integer constant operand.
1988 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1989 const APInt &Val = C->getAPIntValue();
1990 unsigned BitWidth = VT.getSizeInBits();
1993 case ISD::SIGN_EXTEND:
1994 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
1995 case ISD::ANY_EXTEND:
1996 case ISD::ZERO_EXTEND:
1998 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
1999 case ISD::UINT_TO_FP:
2000 case ISD::SINT_TO_FP: {
2001 const uint64_t zero[] = {0, 0};
2002 // No compile time operations on this type.
2003 if (VT==MVT::ppcf128)
2005 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2006 (void)apf.convertFromAPInt(Val,
2007 Opcode==ISD::SINT_TO_FP,
2008 APFloat::rmNearestTiesToEven);
2009 return getConstantFP(apf, VT);
2011 case ISD::BIT_CONVERT:
2012 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2013 return getConstantFP(Val.bitsToFloat(), VT);
2014 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2015 return getConstantFP(Val.bitsToDouble(), VT);
2018 return getConstant(Val.byteSwap(), VT);
2020 return getConstant(Val.countPopulation(), VT);
2022 return getConstant(Val.countLeadingZeros(), VT);
2024 return getConstant(Val.countTrailingZeros(), VT);
2028 // Constant fold unary operations with a floating point constant operand.
2029 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) {
2030 APFloat V = C->getValueAPF(); // make copy
2031 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2035 return getConstantFP(V, VT);
2038 return getConstantFP(V, VT);
2040 case ISD::FP_EXTEND:
2041 // This can return overflow, underflow, or inexact; we don't care.
2042 // FIXME need to be more flexible about rounding mode.
2043 (void)V.convert(*MVTToAPFloatSemantics(VT),
2044 APFloat::rmNearestTiesToEven);
2045 return getConstantFP(V, VT);
2046 case ISD::FP_TO_SINT:
2047 case ISD::FP_TO_UINT: {
2049 assert(integerPartWidth >= 64);
2050 // FIXME need to be more flexible about rounding mode.
2051 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2052 Opcode==ISD::FP_TO_SINT,
2053 APFloat::rmTowardZero);
2054 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2056 return getConstant(x, VT);
2058 case ISD::BIT_CONVERT:
2059 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2060 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT);
2061 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2062 return getConstant(V.convertToAPInt().getZExtValue(), VT);
2068 unsigned OpOpcode = Operand.Val->getOpcode();
2070 case ISD::TokenFactor:
2071 case ISD::CONCAT_VECTORS:
2072 return Operand; // Factor or concat of one node? No need.
2073 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2074 case ISD::FP_EXTEND:
2075 assert(VT.isFloatingPoint() &&
2076 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2077 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2078 if (Operand.getOpcode() == ISD::UNDEF)
2079 return getNode(ISD::UNDEF, VT);
2081 case ISD::SIGN_EXTEND:
2082 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2083 "Invalid SIGN_EXTEND!");
2084 if (Operand.getValueType() == VT) return Operand; // noop extension
2085 assert(Operand.getValueType().bitsLT(VT)
2086 && "Invalid sext node, dst < src!");
2087 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2088 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2090 case ISD::ZERO_EXTEND:
2091 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2092 "Invalid ZERO_EXTEND!");
2093 if (Operand.getValueType() == VT) return Operand; // noop extension
2094 assert(Operand.getValueType().bitsLT(VT)
2095 && "Invalid zext node, dst < src!");
2096 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2097 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
2099 case ISD::ANY_EXTEND:
2100 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2101 "Invalid ANY_EXTEND!");
2102 if (Operand.getValueType() == VT) return Operand; // noop extension
2103 assert(Operand.getValueType().bitsLT(VT)
2104 && "Invalid anyext node, dst < src!");
2105 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2106 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2107 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2110 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2111 "Invalid TRUNCATE!");
2112 if (Operand.getValueType() == VT) return Operand; // noop truncate
2113 assert(Operand.getValueType().bitsGT(VT)
2114 && "Invalid truncate node, src < dst!");
2115 if (OpOpcode == ISD::TRUNCATE)
2116 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2117 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2118 OpOpcode == ISD::ANY_EXTEND) {
2119 // If the source is smaller than the dest, we still need an extend.
2120 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT))
2121 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2122 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT))
2123 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2125 return Operand.Val->getOperand(0);
2128 case ISD::BIT_CONVERT:
2129 // Basic sanity checking.
2130 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2131 && "Cannot BIT_CONVERT between types of different sizes!");
2132 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2133 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2134 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2135 if (OpOpcode == ISD::UNDEF)
2136 return getNode(ISD::UNDEF, VT);
2138 case ISD::SCALAR_TO_VECTOR:
2139 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2140 VT.getVectorElementType() == Operand.getValueType() &&
2141 "Illegal SCALAR_TO_VECTOR node!");
2142 if (OpOpcode == ISD::UNDEF)
2143 return getNode(ISD::UNDEF, VT);
2144 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2145 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2146 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2147 Operand.getConstantOperandVal(1) == 0 &&
2148 Operand.getOperand(0).getValueType() == VT)
2149 return Operand.getOperand(0);
2152 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2153 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1),
2154 Operand.Val->getOperand(0));
2155 if (OpOpcode == ISD::FNEG) // --X -> X
2156 return Operand.Val->getOperand(0);
2159 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2160 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
2165 SDVTList VTs = getVTList(VT);
2166 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2167 FoldingSetNodeID ID;
2168 SDValue Ops[1] = { Operand };
2169 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2172 return SDValue(E, 0);
2173 N = NodeAllocator.Allocate<UnarySDNode>();
2174 new (N) UnarySDNode(Opcode, VTs, Operand);
2175 CSEMap.InsertNode(N, IP);
2177 N = NodeAllocator.Allocate<UnarySDNode>();
2178 new (N) UnarySDNode(Opcode, VTs, Operand);
2181 AllNodes.push_back(N);
2185 return SDValue(N, 0);
2188 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2189 SDValue N1, SDValue N2) {
2190 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2191 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2194 case ISD::TokenFactor:
2195 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2196 N2.getValueType() == MVT::Other && "Invalid token factor!");
2197 // Fold trivial token factors.
2198 if (N1.getOpcode() == ISD::EntryToken) return N2;
2199 if (N2.getOpcode() == ISD::EntryToken) return N1;
2201 case ISD::CONCAT_VECTORS:
2202 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2203 // one big BUILD_VECTOR.
2204 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2205 N2.getOpcode() == ISD::BUILD_VECTOR) {
2206 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end());
2207 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end());
2208 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2212 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2213 N1.getValueType() == VT && "Binary operator types must match!");
2214 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2215 // worth handling here.
2216 if (N2C && N2C->isNullValue())
2218 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2225 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2226 N1.getValueType() == VT && "Binary operator types must match!");
2227 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2228 // it's worth handling here.
2229 if (N2C && N2C->isNullValue())
2236 assert(VT.isInteger() && "This operator does not apply to FP types!");
2246 assert(N1.getValueType() == N2.getValueType() &&
2247 N1.getValueType() == VT && "Binary operator types must match!");
2249 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2250 assert(N1.getValueType() == VT &&
2251 N1.getValueType().isFloatingPoint() &&
2252 N2.getValueType().isFloatingPoint() &&
2253 "Invalid FCOPYSIGN!");
2260 assert(VT == N1.getValueType() &&
2261 "Shift operators return type must be the same as their first arg");
2262 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2263 "Shifts only work on integers");
2265 // Always fold shifts of i1 values so the code generator doesn't need to
2266 // handle them. Since we know the size of the shift has to be less than the
2267 // size of the value, the shift/rotate count is guaranteed to be zero.
2271 case ISD::FP_ROUND_INREG: {
2272 MVT EVT = cast<VTSDNode>(N2)->getVT();
2273 assert(VT == N1.getValueType() && "Not an inreg round!");
2274 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2275 "Cannot FP_ROUND_INREG integer types");
2276 assert(EVT.bitsLE(VT) && "Not rounding down!");
2277 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2281 assert(VT.isFloatingPoint() &&
2282 N1.getValueType().isFloatingPoint() &&
2283 VT.bitsLE(N1.getValueType()) &&
2284 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2285 if (N1.getValueType() == VT) return N1; // noop conversion.
2287 case ISD::AssertSext:
2288 case ISD::AssertZext: {
2289 MVT EVT = cast<VTSDNode>(N2)->getVT();
2290 assert(VT == N1.getValueType() && "Not an inreg extend!");
2291 assert(VT.isInteger() && EVT.isInteger() &&
2292 "Cannot *_EXTEND_INREG FP types");
2293 assert(EVT.bitsLE(VT) && "Not extending!");
2294 if (VT == EVT) return N1; // noop assertion.
2297 case ISD::SIGN_EXTEND_INREG: {
2298 MVT EVT = cast<VTSDNode>(N2)->getVT();
2299 assert(VT == N1.getValueType() && "Not an inreg extend!");
2300 assert(VT.isInteger() && EVT.isInteger() &&
2301 "Cannot *_EXTEND_INREG FP types");
2302 assert(EVT.bitsLE(VT) && "Not extending!");
2303 if (EVT == VT) return N1; // Not actually extending
2306 APInt Val = N1C->getAPIntValue();
2307 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2308 Val <<= Val.getBitWidth()-FromBits;
2309 Val = Val.ashr(Val.getBitWidth()-FromBits);
2310 return getConstant(Val, VT);
2314 case ISD::EXTRACT_VECTOR_ELT:
2315 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2316 if (N1.getOpcode() == ISD::UNDEF)
2317 return getNode(ISD::UNDEF, VT);
2319 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2320 // expanding copies of large vectors from registers.
2322 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2323 N1.getNumOperands() > 0) {
2325 N1.getOperand(0).getValueType().getVectorNumElements();
2326 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2327 N1.getOperand(N2C->getValue() / Factor),
2328 getConstant(N2C->getValue() % Factor, N2.getValueType()));
2331 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2332 // expanding large vector constants.
2333 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2334 return N1.getOperand(N2C->getValue());
2336 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2337 // operations are lowered to scalars.
2338 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2339 if (N1.getOperand(2) == N2)
2340 return N1.getOperand(1);
2342 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2345 case ISD::EXTRACT_ELEMENT:
2346 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
2347 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2348 (N1.getValueType().isInteger() == VT.isInteger()) &&
2349 "Wrong types for EXTRACT_ELEMENT!");
2351 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2352 // 64-bit integers into 32-bit parts. Instead of building the extract of
2353 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2354 if (N1.getOpcode() == ISD::BUILD_PAIR)
2355 return N1.getOperand(N2C->getValue());
2357 // EXTRACT_ELEMENT of a constant int is also very common.
2358 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2359 unsigned ElementSize = VT.getSizeInBits();
2360 unsigned Shift = ElementSize * N2C->getValue();
2361 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2362 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2365 case ISD::EXTRACT_SUBVECTOR:
2366 if (N1.getValueType() == VT) // Trivial extraction.
2373 const APInt &C1 = N1C->getAPIntValue(), &C2 = N2C->getAPIntValue();
2375 case ISD::ADD: return getConstant(C1 + C2, VT);
2376 case ISD::SUB: return getConstant(C1 - C2, VT);
2377 case ISD::MUL: return getConstant(C1 * C2, VT);
2379 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2382 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2385 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2388 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2390 case ISD::AND : return getConstant(C1 & C2, VT);
2391 case ISD::OR : return getConstant(C1 | C2, VT);
2392 case ISD::XOR : return getConstant(C1 ^ C2, VT);
2393 case ISD::SHL : return getConstant(C1 << C2, VT);
2394 case ISD::SRL : return getConstant(C1.lshr(C2), VT);
2395 case ISD::SRA : return getConstant(C1.ashr(C2), VT);
2396 case ISD::ROTL : return getConstant(C1.rotl(C2), VT);
2397 case ISD::ROTR : return getConstant(C1.rotr(C2), VT);
2400 } else { // Cannonicalize constant to RHS if commutative
2401 if (isCommutativeBinOp(Opcode)) {
2402 std::swap(N1C, N2C);
2408 // Constant fold FP operations.
2409 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
2410 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
2412 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2413 // Cannonicalize constant to RHS if commutative
2414 std::swap(N1CFP, N2CFP);
2416 } else if (N2CFP && VT != MVT::ppcf128) {
2417 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2418 APFloat::opStatus s;
2421 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2422 if (s != APFloat::opInvalidOp)
2423 return getConstantFP(V1, VT);
2426 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2427 if (s!=APFloat::opInvalidOp)
2428 return getConstantFP(V1, VT);
2431 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2432 if (s!=APFloat::opInvalidOp)
2433 return getConstantFP(V1, VT);
2436 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2437 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2438 return getConstantFP(V1, VT);
2441 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2442 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2443 return getConstantFP(V1, VT);
2445 case ISD::FCOPYSIGN:
2447 return getConstantFP(V1, VT);
2453 // Canonicalize an UNDEF to the RHS, even over a constant.
2454 if (N1.getOpcode() == ISD::UNDEF) {
2455 if (isCommutativeBinOp(Opcode)) {
2459 case ISD::FP_ROUND_INREG:
2460 case ISD::SIGN_EXTEND_INREG:
2466 return N1; // fold op(undef, arg2) -> undef
2474 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2475 // For vectors, we can't easily build an all zero vector, just return
2482 // Fold a bunch of operators when the RHS is undef.
2483 if (N2.getOpcode() == ISD::UNDEF) {
2486 if (N1.getOpcode() == ISD::UNDEF)
2487 // Handle undef ^ undef -> 0 special case. This is a common
2489 return getConstant(0, VT);
2504 return N2; // fold op(arg1, undef) -> undef
2510 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2511 // For vectors, we can't easily build an all zero vector, just return
2516 return getConstant(VT.getIntegerVTBitMask(), VT);
2517 // For vectors, we can't easily build an all one vector, just return
2525 // Memoize this node if possible.
2527 SDVTList VTs = getVTList(VT);
2528 if (VT != MVT::Flag) {
2529 SDValue Ops[] = { N1, N2 };
2530 FoldingSetNodeID ID;
2531 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2533 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2534 return SDValue(E, 0);
2535 N = NodeAllocator.Allocate<BinarySDNode>();
2536 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2537 CSEMap.InsertNode(N, IP);
2539 N = NodeAllocator.Allocate<BinarySDNode>();
2540 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2543 AllNodes.push_back(N);
2547 return SDValue(N, 0);
2550 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2551 SDValue N1, SDValue N2, SDValue N3) {
2552 // Perform various simplifications.
2553 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2554 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2556 case ISD::CONCAT_VECTORS:
2557 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2558 // one big BUILD_VECTOR.
2559 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2560 N2.getOpcode() == ISD::BUILD_VECTOR &&
2561 N3.getOpcode() == ISD::BUILD_VECTOR) {
2562 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end());
2563 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end());
2564 Elts.insert(Elts.end(), N3.Val->op_begin(), N3.Val->op_end());
2565 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2569 // Use FoldSetCC to simplify SETCC's.
2570 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2571 if (Simp.Val) return Simp;
2576 if (N1C->getValue())
2577 return N2; // select true, X, Y -> X
2579 return N3; // select false, X, Y -> Y
2582 if (N2 == N3) return N2; // select C, X, X -> X
2586 if (N2C->getValue()) // Unconditional branch
2587 return getNode(ISD::BR, MVT::Other, N1, N3);
2589 return N1; // Never-taken branch
2592 case ISD::VECTOR_SHUFFLE:
2593 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2594 VT.isVector() && N3.getValueType().isVector() &&
2595 N3.getOpcode() == ISD::BUILD_VECTOR &&
2596 VT.getVectorNumElements() == N3.getNumOperands() &&
2597 "Illegal VECTOR_SHUFFLE node!");
2599 case ISD::BIT_CONVERT:
2600 // Fold bit_convert nodes from a type to themselves.
2601 if (N1.getValueType() == VT)
2606 // Memoize node if it doesn't produce a flag.
2608 SDVTList VTs = getVTList(VT);
2609 if (VT != MVT::Flag) {
2610 SDValue Ops[] = { N1, N2, N3 };
2611 FoldingSetNodeID ID;
2612 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2615 return SDValue(E, 0);
2616 N = NodeAllocator.Allocate<TernarySDNode>();
2617 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2618 CSEMap.InsertNode(N, IP);
2620 N = NodeAllocator.Allocate<TernarySDNode>();
2621 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2623 AllNodes.push_back(N);
2627 return SDValue(N, 0);
2630 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2631 SDValue N1, SDValue N2, SDValue N3,
2633 SDValue Ops[] = { N1, N2, N3, N4 };
2634 return getNode(Opcode, VT, Ops, 4);
2637 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2638 SDValue N1, SDValue N2, SDValue N3,
2639 SDValue N4, SDValue N5) {
2640 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2641 return getNode(Opcode, VT, Ops, 5);
2644 /// getMemsetValue - Vectorized representation of the memset value
2646 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2647 unsigned NumBits = VT.isVector() ?
2648 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2649 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2650 APInt Val = APInt(NumBits, C->getValue() & 255);
2652 for (unsigned i = NumBits; i > 8; i >>= 1) {
2653 Val = (Val << Shift) | Val;
2657 return DAG.getConstant(Val, VT);
2658 return DAG.getConstantFP(APFloat(Val), VT);
2661 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2663 for (unsigned i = NumBits; i > 8; i >>= 1) {
2664 Value = DAG.getNode(ISD::OR, VT,
2665 DAG.getNode(ISD::SHL, VT, Value,
2666 DAG.getConstant(Shift, MVT::i8)), Value);
2673 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2674 /// used when a memcpy is turned into a memset when the source is a constant
2676 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2677 const TargetLowering &TLI,
2678 std::string &Str, unsigned Offset) {
2679 // Handle vector with all elements zero.
2682 return DAG.getConstant(0, VT);
2683 unsigned NumElts = VT.getVectorNumElements();
2684 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2685 return DAG.getNode(ISD::BIT_CONVERT, VT,
2686 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2689 assert(!VT.isVector() && "Can't handle vector type here!");
2690 unsigned NumBits = VT.getSizeInBits();
2691 unsigned MSB = NumBits / 8;
2693 if (TLI.isLittleEndian())
2694 Offset = Offset + MSB - 1;
2695 for (unsigned i = 0; i != MSB; ++i) {
2696 Val = (Val << 8) | (unsigned char)Str[Offset];
2697 Offset += TLI.isLittleEndian() ? -1 : 1;
2699 return DAG.getConstant(Val, VT);
2702 /// getMemBasePlusOffset - Returns base and offset node for the
2704 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2705 SelectionDAG &DAG) {
2706 MVT VT = Base.getValueType();
2707 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2710 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2712 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2713 unsigned SrcDelta = 0;
2714 GlobalAddressSDNode *G = NULL;
2715 if (Src.getOpcode() == ISD::GlobalAddress)
2716 G = cast<GlobalAddressSDNode>(Src);
2717 else if (Src.getOpcode() == ISD::ADD &&
2718 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2719 Src.getOperand(1).getOpcode() == ISD::Constant) {
2720 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2721 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue();
2726 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2727 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2733 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2734 /// to replace the memset / memcpy is below the threshold. It also returns the
2735 /// types of the sequence of memory ops to perform memset / memcpy.
2737 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2738 SDValue Dst, SDValue Src,
2739 unsigned Limit, uint64_t Size, unsigned &Align,
2740 std::string &Str, bool &isSrcStr,
2742 const TargetLowering &TLI) {
2743 isSrcStr = isMemSrcFromString(Src, Str);
2744 bool isSrcConst = isa<ConstantSDNode>(Src);
2745 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2746 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2747 if (VT != MVT::iAny) {
2748 unsigned NewAlign = (unsigned)
2749 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2750 // If source is a string constant, this will require an unaligned load.
2751 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2752 if (Dst.getOpcode() != ISD::FrameIndex) {
2753 // Can't change destination alignment. It requires a unaligned store.
2757 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2758 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2759 if (MFI->isFixedObjectIndex(FI)) {
2760 // Can't change destination alignment. It requires a unaligned store.
2764 // Give the stack frame object a larger alignment if needed.
2765 if (MFI->getObjectAlignment(FI) < NewAlign)
2766 MFI->setObjectAlignment(FI, NewAlign);
2773 if (VT == MVT::iAny) {
2777 switch (Align & 7) {
2778 case 0: VT = MVT::i64; break;
2779 case 4: VT = MVT::i32; break;
2780 case 2: VT = MVT::i16; break;
2781 default: VT = MVT::i8; break;
2786 while (!TLI.isTypeLegal(LVT))
2787 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2788 assert(LVT.isInteger());
2794 unsigned NumMemOps = 0;
2796 unsigned VTSize = VT.getSizeInBits() / 8;
2797 while (VTSize > Size) {
2798 // For now, only use non-vector load / store's for the left-over pieces.
2799 if (VT.isVector()) {
2801 while (!TLI.isTypeLegal(VT))
2802 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2803 VTSize = VT.getSizeInBits() / 8;
2805 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2810 if (++NumMemOps > Limit)
2812 MemOps.push_back(VT);
2819 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2820 SDValue Chain, SDValue Dst,
2821 SDValue Src, uint64_t Size,
2822 unsigned Align, bool AlwaysInline,
2823 const Value *DstSV, uint64_t DstSVOff,
2824 const Value *SrcSV, uint64_t SrcSVOff){
2825 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2827 // Expand memcpy to a series of load and store ops if the size operand falls
2828 // below a certain threshold.
2829 std::vector<MVT> MemOps;
2830 uint64_t Limit = -1;
2832 Limit = TLI.getMaxStoresPerMemcpy();
2833 unsigned DstAlign = Align; // Destination alignment can change.
2836 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2837 Str, CopyFromStr, DAG, TLI))
2841 bool isZeroStr = CopyFromStr && Str.empty();
2842 SmallVector<SDValue, 8> OutChains;
2843 unsigned NumMemOps = MemOps.size();
2844 uint64_t SrcOff = 0, DstOff = 0;
2845 for (unsigned i = 0; i < NumMemOps; i++) {
2847 unsigned VTSize = VT.getSizeInBits() / 8;
2848 SDValue Value, Store;
2850 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2851 // It's unlikely a store of a vector immediate can be done in a single
2852 // instruction. It would require a load from a constantpool first.
2853 // We also handle store a vector with all zero's.
2854 // FIXME: Handle other cases where store of vector immediate is done in
2855 // a single instruction.
2856 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2857 Store = DAG.getStore(Chain, Value,
2858 getMemBasePlusOffset(Dst, DstOff, DAG),
2859 DstSV, DstSVOff + DstOff, false, DstAlign);
2861 Value = DAG.getLoad(VT, Chain,
2862 getMemBasePlusOffset(Src, SrcOff, DAG),
2863 SrcSV, SrcSVOff + SrcOff, false, Align);
2864 Store = DAG.getStore(Chain, Value,
2865 getMemBasePlusOffset(Dst, DstOff, DAG),
2866 DstSV, DstSVOff + DstOff, false, DstAlign);
2868 OutChains.push_back(Store);
2873 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2874 &OutChains[0], OutChains.size());
2877 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
2878 SDValue Chain, SDValue Dst,
2879 SDValue Src, uint64_t Size,
2880 unsigned Align, bool AlwaysInline,
2881 const Value *DstSV, uint64_t DstSVOff,
2882 const Value *SrcSV, uint64_t SrcSVOff){
2883 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2885 // Expand memmove to a series of load and store ops if the size operand falls
2886 // below a certain threshold.
2887 std::vector<MVT> MemOps;
2888 uint64_t Limit = -1;
2890 Limit = TLI.getMaxStoresPerMemmove();
2891 unsigned DstAlign = Align; // Destination alignment can change.
2894 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2895 Str, CopyFromStr, DAG, TLI))
2898 uint64_t SrcOff = 0, DstOff = 0;
2900 SmallVector<SDValue, 8> LoadValues;
2901 SmallVector<SDValue, 8> LoadChains;
2902 SmallVector<SDValue, 8> OutChains;
2903 unsigned NumMemOps = MemOps.size();
2904 for (unsigned i = 0; i < NumMemOps; i++) {
2906 unsigned VTSize = VT.getSizeInBits() / 8;
2907 SDValue Value, Store;
2909 Value = DAG.getLoad(VT, Chain,
2910 getMemBasePlusOffset(Src, SrcOff, DAG),
2911 SrcSV, SrcSVOff + SrcOff, false, Align);
2912 LoadValues.push_back(Value);
2913 LoadChains.push_back(Value.getValue(1));
2916 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
2917 &LoadChains[0], LoadChains.size());
2919 for (unsigned i = 0; i < NumMemOps; i++) {
2921 unsigned VTSize = VT.getSizeInBits() / 8;
2922 SDValue Value, Store;
2924 Store = DAG.getStore(Chain, LoadValues[i],
2925 getMemBasePlusOffset(Dst, DstOff, DAG),
2926 DstSV, DstSVOff + DstOff, false, DstAlign);
2927 OutChains.push_back(Store);
2931 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2932 &OutChains[0], OutChains.size());
2935 static SDValue getMemsetStores(SelectionDAG &DAG,
2936 SDValue Chain, SDValue Dst,
2937 SDValue Src, uint64_t Size,
2939 const Value *DstSV, uint64_t DstSVOff) {
2940 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2942 // Expand memset to a series of load/store ops if the size operand
2943 // falls below a certain threshold.
2944 std::vector<MVT> MemOps;
2947 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
2948 Size, Align, Str, CopyFromStr, DAG, TLI))
2951 SmallVector<SDValue, 8> OutChains;
2952 uint64_t DstOff = 0;
2954 unsigned NumMemOps = MemOps.size();
2955 for (unsigned i = 0; i < NumMemOps; i++) {
2957 unsigned VTSize = VT.getSizeInBits() / 8;
2958 SDValue Value = getMemsetValue(Src, VT, DAG);
2959 SDValue Store = DAG.getStore(Chain, Value,
2960 getMemBasePlusOffset(Dst, DstOff, DAG),
2961 DstSV, DstSVOff + DstOff);
2962 OutChains.push_back(Store);
2966 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2967 &OutChains[0], OutChains.size());
2970 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
2971 SDValue Src, SDValue Size,
2972 unsigned Align, bool AlwaysInline,
2973 const Value *DstSV, uint64_t DstSVOff,
2974 const Value *SrcSV, uint64_t SrcSVOff) {
2976 // Check to see if we should lower the memcpy to loads and stores first.
2977 // For cases within the target-specified limits, this is the best choice.
2978 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2980 // Memcpy with size zero? Just return the original chain.
2981 if (ConstantSize->isNullValue())
2985 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
2986 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
2991 // Then check to see if we should lower the memcpy with target-specific
2992 // code. If the target chooses to do this, this is the next best.
2994 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
2996 DstSV, DstSVOff, SrcSV, SrcSVOff);
3000 // If we really need inline code and the target declined to provide it,
3001 // use a (potentially long) sequence of loads and stores.
3003 assert(ConstantSize && "AlwaysInline requires a constant size!");
3004 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3005 ConstantSize->getValue(), Align, true,
3006 DstSV, DstSVOff, SrcSV, SrcSVOff);
3009 // Emit a library call.
3010 TargetLowering::ArgListTy Args;
3011 TargetLowering::ArgListEntry Entry;
3012 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3013 Entry.Node = Dst; Args.push_back(Entry);
3014 Entry.Node = Src; Args.push_back(Entry);
3015 Entry.Node = Size; Args.push_back(Entry);
3016 std::pair<SDValue,SDValue> CallResult =
3017 TLI.LowerCallTo(Chain, Type::VoidTy,
3018 false, false, false, CallingConv::C, false,
3019 getExternalSymbol("memcpy", TLI.getPointerTy()),
3021 return CallResult.second;
3024 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3025 SDValue Src, SDValue Size,
3027 const Value *DstSV, uint64_t DstSVOff,
3028 const Value *SrcSV, uint64_t SrcSVOff) {
3030 // Check to see if we should lower the memmove to loads and stores first.
3031 // For cases within the target-specified limits, this is the best choice.
3032 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3034 // Memmove with size zero? Just return the original chain.
3035 if (ConstantSize->isNullValue())
3039 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
3040 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3045 // Then check to see if we should lower the memmove with target-specific
3046 // code. If the target chooses to do this, this is the next best.
3048 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3049 DstSV, DstSVOff, SrcSV, SrcSVOff);
3053 // Emit a library call.
3054 TargetLowering::ArgListTy Args;
3055 TargetLowering::ArgListEntry Entry;
3056 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3057 Entry.Node = Dst; Args.push_back(Entry);
3058 Entry.Node = Src; Args.push_back(Entry);
3059 Entry.Node = Size; Args.push_back(Entry);
3060 std::pair<SDValue,SDValue> CallResult =
3061 TLI.LowerCallTo(Chain, Type::VoidTy,
3062 false, false, false, CallingConv::C, false,
3063 getExternalSymbol("memmove", TLI.getPointerTy()),
3065 return CallResult.second;
3068 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3069 SDValue Src, SDValue Size,
3071 const Value *DstSV, uint64_t DstSVOff) {
3073 // Check to see if we should lower the memset to stores first.
3074 // For cases within the target-specified limits, this is the best choice.
3075 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3077 // Memset with size zero? Just return the original chain.
3078 if (ConstantSize->isNullValue())
3082 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align,
3088 // Then check to see if we should lower the memset with target-specific
3089 // code. If the target chooses to do this, this is the next best.
3091 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3096 // Emit a library call.
3097 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3098 TargetLowering::ArgListTy Args;
3099 TargetLowering::ArgListEntry Entry;
3100 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3101 Args.push_back(Entry);
3102 // Extend or truncate the argument to be an i32 value for the call.
3103 if (Src.getValueType().bitsGT(MVT::i32))
3104 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3106 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3107 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3108 Args.push_back(Entry);
3109 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3110 Args.push_back(Entry);
3111 std::pair<SDValue,SDValue> CallResult =
3112 TLI.LowerCallTo(Chain, Type::VoidTy,
3113 false, false, false, CallingConv::C, false,
3114 getExternalSymbol("memset", TLI.getPointerTy()),
3116 return CallResult.second;
3119 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3120 SDValue Ptr, SDValue Cmp,
3121 SDValue Swp, const Value* PtrVal,
3122 unsigned Alignment) {
3123 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3124 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3126 MVT VT = Cmp.getValueType();
3128 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3129 Alignment = getMVTAlignment(VT);
3131 SDVTList VTs = getVTList(VT, MVT::Other);
3132 FoldingSetNodeID ID;
3133 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3134 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3136 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3137 return SDValue(E, 0);
3138 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3139 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3140 CSEMap.InsertNode(N, IP);
3141 AllNodes.push_back(N);
3142 return SDValue(N, 0);
3145 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3146 SDValue Ptr, SDValue Val,
3147 const Value* PtrVal,
3148 unsigned Alignment) {
3149 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB
3150 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND
3151 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR
3152 || Opcode == ISD::ATOMIC_LOAD_NAND
3153 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX
3154 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX)
3155 && "Invalid Atomic Op");
3157 MVT VT = Val.getValueType();
3159 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3160 Alignment = getMVTAlignment(VT);
3162 SDVTList VTs = getVTList(VT, MVT::Other);
3163 FoldingSetNodeID ID;
3164 SDValue Ops[] = {Chain, Ptr, Val};
3165 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3167 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3168 return SDValue(E, 0);
3169 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3170 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3171 CSEMap.InsertNode(N, IP);
3172 AllNodes.push_back(N);
3173 return SDValue(N, 0);
3176 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3177 /// Allowed to return something different (and simpler) if Simplify is true.
3178 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3180 if (Simplify && NumOps == 1)
3183 SmallVector<MVT, 4> VTs;
3184 VTs.reserve(NumOps);
3185 for (unsigned i = 0; i < NumOps; ++i)
3186 VTs.push_back(Ops[i].getValueType());
3187 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3191 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3192 MVT VT, SDValue Chain,
3193 SDValue Ptr, SDValue Offset,
3194 const Value *SV, int SVOffset, MVT EVT,
3195 bool isVolatile, unsigned Alignment) {
3196 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3197 Alignment = getMVTAlignment(VT);
3200 ExtType = ISD::NON_EXTLOAD;
3201 } else if (ExtType == ISD::NON_EXTLOAD) {
3202 assert(VT == EVT && "Non-extending load from different memory type!");
3206 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3207 "Invalid vector extload!");
3209 assert(EVT.bitsLT(VT) &&
3210 "Should only be an extending load, not truncating!");
3211 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3212 "Cannot sign/zero extend a FP/Vector load!");
3213 assert(VT.isInteger() == EVT.isInteger() &&
3214 "Cannot convert from FP to Int or Int -> FP!");
3217 bool Indexed = AM != ISD::UNINDEXED;
3218 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3219 "Unindexed load with an offset!");
3221 SDVTList VTs = Indexed ?
3222 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3223 SDValue Ops[] = { Chain, Ptr, Offset };
3224 FoldingSetNodeID ID;
3225 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3227 ID.AddInteger(ExtType);
3228 ID.AddInteger(EVT.getRawBits());
3229 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3232 return SDValue(E, 0);
3233 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3234 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3235 Alignment, isVolatile);
3236 CSEMap.InsertNode(N, IP);
3237 AllNodes.push_back(N);
3238 return SDValue(N, 0);
3241 SDValue SelectionDAG::getLoad(MVT VT,
3242 SDValue Chain, SDValue Ptr,
3243 const Value *SV, int SVOffset,
3244 bool isVolatile, unsigned Alignment) {
3245 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3246 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3247 SV, SVOffset, VT, isVolatile, Alignment);
3250 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3251 SDValue Chain, SDValue Ptr,
3253 int SVOffset, MVT EVT,
3254 bool isVolatile, unsigned Alignment) {
3255 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3256 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3257 SV, SVOffset, EVT, isVolatile, Alignment);
3261 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3262 SDValue Offset, ISD::MemIndexedMode AM) {
3263 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3264 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3265 "Load is already a indexed load!");
3266 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3267 LD->getChain(), Base, Offset, LD->getSrcValue(),
3268 LD->getSrcValueOffset(), LD->getMemoryVT(),
3269 LD->isVolatile(), LD->getAlignment());
3272 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3273 SDValue Ptr, const Value *SV, int SVOffset,
3274 bool isVolatile, unsigned Alignment) {
3275 MVT VT = Val.getValueType();
3277 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3278 Alignment = getMVTAlignment(VT);
3280 SDVTList VTs = getVTList(MVT::Other);
3281 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3282 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3283 FoldingSetNodeID ID;
3284 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3285 ID.AddInteger(ISD::UNINDEXED);
3286 ID.AddInteger(false);
3287 ID.AddInteger(VT.getRawBits());
3288 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3291 return SDValue(E, 0);
3292 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3293 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3294 VT, SV, SVOffset, Alignment, isVolatile);
3295 CSEMap.InsertNode(N, IP);
3296 AllNodes.push_back(N);
3297 return SDValue(N, 0);
3300 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3301 SDValue Ptr, const Value *SV,
3302 int SVOffset, MVT SVT,
3303 bool isVolatile, unsigned Alignment) {
3304 MVT VT = Val.getValueType();
3307 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3309 assert(VT.bitsGT(SVT) && "Not a truncation?");
3310 assert(VT.isInteger() == SVT.isInteger() &&
3311 "Can't do FP-INT conversion!");
3313 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3314 Alignment = getMVTAlignment(VT);
3316 SDVTList VTs = getVTList(MVT::Other);
3317 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3318 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3319 FoldingSetNodeID ID;
3320 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3321 ID.AddInteger(ISD::UNINDEXED);
3323 ID.AddInteger(SVT.getRawBits());
3324 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3326 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3327 return SDValue(E, 0);
3328 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3329 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3330 SVT, SV, SVOffset, Alignment, isVolatile);
3331 CSEMap.InsertNode(N, IP);
3332 AllNodes.push_back(N);
3333 return SDValue(N, 0);
3337 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3338 SDValue Offset, ISD::MemIndexedMode AM) {
3339 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3340 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3341 "Store is already a indexed store!");
3342 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3343 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3344 FoldingSetNodeID ID;
3345 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3347 ID.AddInteger(ST->isTruncatingStore());
3348 ID.AddInteger(ST->getMemoryVT().getRawBits());
3349 ID.AddInteger(ST->getRawFlags());
3351 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3352 return SDValue(E, 0);
3353 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3354 new (N) StoreSDNode(Ops, VTs, AM,
3355 ST->isTruncatingStore(), ST->getMemoryVT(),
3356 ST->getSrcValue(), ST->getSrcValueOffset(),
3357 ST->getAlignment(), ST->isVolatile());
3358 CSEMap.InsertNode(N, IP);
3359 AllNodes.push_back(N);
3360 return SDValue(N, 0);
3363 SDValue SelectionDAG::getVAArg(MVT VT,
3364 SDValue Chain, SDValue Ptr,
3366 SDValue Ops[] = { Chain, Ptr, SV };
3367 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3370 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3371 const SDUse *Ops, unsigned NumOps) {
3373 case 0: return getNode(Opcode, VT);
3374 case 1: return getNode(Opcode, VT, Ops[0]);
3375 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3376 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3380 // Copy from an SDUse array into an SDValue array for use with
3381 // the regular getNode logic.
3382 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3383 return getNode(Opcode, VT, &NewOps[0], NumOps);
3386 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3387 const SDValue *Ops, unsigned NumOps) {
3389 case 0: return getNode(Opcode, VT);
3390 case 1: return getNode(Opcode, VT, Ops[0]);
3391 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3392 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3398 case ISD::SELECT_CC: {
3399 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3400 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3401 "LHS and RHS of condition must have same type!");
3402 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3403 "True and False arms of SelectCC must have same type!");
3404 assert(Ops[2].getValueType() == VT &&
3405 "select_cc node must be of same type as true and false value!");
3409 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3410 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3411 "LHS/RHS of comparison should match types!");
3418 SDVTList VTs = getVTList(VT);
3419 if (VT != MVT::Flag) {
3420 FoldingSetNodeID ID;
3421 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3423 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3424 return SDValue(E, 0);
3425 N = NodeAllocator.Allocate<SDNode>();
3426 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3427 CSEMap.InsertNode(N, IP);
3429 N = NodeAllocator.Allocate<SDNode>();
3430 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3432 AllNodes.push_back(N);
3436 return SDValue(N, 0);
3439 SDValue SelectionDAG::getNode(unsigned Opcode,
3440 const std::vector<MVT> &ResultTys,
3441 const SDValue *Ops, unsigned NumOps) {
3442 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3446 SDValue SelectionDAG::getNode(unsigned Opcode,
3447 const MVT *VTs, unsigned NumVTs,
3448 const SDValue *Ops, unsigned NumOps) {
3450 return getNode(Opcode, VTs[0], Ops, NumOps);
3451 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3454 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3455 const SDValue *Ops, unsigned NumOps) {
3456 if (VTList.NumVTs == 1)
3457 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3460 // FIXME: figure out how to safely handle things like
3461 // int foo(int x) { return 1 << (x & 255); }
3462 // int bar() { return foo(256); }
3464 case ISD::SRA_PARTS:
3465 case ISD::SRL_PARTS:
3466 case ISD::SHL_PARTS:
3467 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3468 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3469 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3470 else if (N3.getOpcode() == ISD::AND)
3471 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3472 // If the and is only masking out bits that cannot effect the shift,
3473 // eliminate the and.
3474 unsigned NumBits = VT.getSizeInBits()*2;
3475 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3476 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3482 // Memoize the node unless it returns a flag.
3484 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3485 FoldingSetNodeID ID;
3486 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3488 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3489 return SDValue(E, 0);
3491 N = NodeAllocator.Allocate<UnarySDNode>();
3492 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3493 } else if (NumOps == 2) {
3494 N = NodeAllocator.Allocate<BinarySDNode>();
3495 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3496 } else if (NumOps == 3) {
3497 N = NodeAllocator.Allocate<TernarySDNode>();
3498 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3500 N = NodeAllocator.Allocate<SDNode>();
3501 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3503 CSEMap.InsertNode(N, IP);
3506 N = NodeAllocator.Allocate<UnarySDNode>();
3507 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3508 } else if (NumOps == 2) {
3509 N = NodeAllocator.Allocate<BinarySDNode>();
3510 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3511 } else if (NumOps == 3) {
3512 N = NodeAllocator.Allocate<TernarySDNode>();
3513 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3515 N = NodeAllocator.Allocate<SDNode>();
3516 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3519 AllNodes.push_back(N);
3523 return SDValue(N, 0);
3526 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3527 return getNode(Opcode, VTList, 0, 0);
3530 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3532 SDValue Ops[] = { N1 };
3533 return getNode(Opcode, VTList, Ops, 1);
3536 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3537 SDValue N1, SDValue N2) {
3538 SDValue Ops[] = { N1, N2 };
3539 return getNode(Opcode, VTList, Ops, 2);
3542 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3543 SDValue N1, SDValue N2, SDValue N3) {
3544 SDValue Ops[] = { N1, N2, N3 };
3545 return getNode(Opcode, VTList, Ops, 3);
3548 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3549 SDValue N1, SDValue N2, SDValue N3,
3551 SDValue Ops[] = { N1, N2, N3, N4 };
3552 return getNode(Opcode, VTList, Ops, 4);
3555 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3556 SDValue N1, SDValue N2, SDValue N3,
3557 SDValue N4, SDValue N5) {
3558 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3559 return getNode(Opcode, VTList, Ops, 5);
3562 SDVTList SelectionDAG::getVTList(MVT VT) {
3563 return makeVTList(SDNode::getValueTypeList(VT), 1);
3566 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3567 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3568 E = VTList.rend(); I != E; ++I)
3569 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3572 MVT *Array = Allocator.Allocate<MVT>(2);
3575 SDVTList Result = makeVTList(Array, 2);
3576 VTList.push_back(Result);
3580 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3581 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3582 E = VTList.rend(); I != E; ++I)
3583 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3587 MVT *Array = Allocator.Allocate<MVT>(3);
3591 SDVTList Result = makeVTList(Array, 3);
3592 VTList.push_back(Result);
3596 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3598 case 0: assert(0 && "Cannot have nodes without results!");
3599 case 1: return getVTList(VTs[0]);
3600 case 2: return getVTList(VTs[0], VTs[1]);
3601 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3605 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3606 E = VTList.rend(); I != E; ++I) {
3607 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3610 bool NoMatch = false;
3611 for (unsigned i = 2; i != NumVTs; ++i)
3612 if (VTs[i] != I->VTs[i]) {
3620 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3621 std::copy(VTs, VTs+NumVTs, Array);
3622 SDVTList Result = makeVTList(Array, NumVTs);
3623 VTList.push_back(Result);
3628 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3629 /// specified operands. If the resultant node already exists in the DAG,
3630 /// this does not modify the specified node, instead it returns the node that
3631 /// already exists. If the resultant node does not exist in the DAG, the
3632 /// input node is returned. As a degenerate case, if you specify the same
3633 /// input operands as the node already has, the input node is returned.
3634 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3635 SDNode *N = InN.Val;
3636 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3638 // Check to see if there is no change.
3639 if (Op == N->getOperand(0)) return InN;
3641 // See if the modified node already exists.
3642 void *InsertPos = 0;
3643 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3644 return SDValue(Existing, InN.ResNo);
3646 // Nope it doesn't. Remove the node from its current place in the maps.
3648 RemoveNodeFromCSEMaps(N);
3650 // Now we update the operands.
3651 N->OperandList[0].getVal()->removeUser(0, N);
3652 N->OperandList[0] = Op;
3653 N->OperandList[0].setUser(N);
3654 Op.Val->addUser(0, N);
3656 // If this gets put into a CSE map, add it.
3657 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3661 SDValue SelectionDAG::
3662 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3663 SDNode *N = InN.Val;
3664 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3666 // Check to see if there is no change.
3667 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3668 return InN; // No operands changed, just return the input node.
3670 // See if the modified node already exists.
3671 void *InsertPos = 0;
3672 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3673 return SDValue(Existing, InN.ResNo);
3675 // Nope it doesn't. Remove the node from its current place in the maps.
3677 RemoveNodeFromCSEMaps(N);
3679 // Now we update the operands.
3680 if (N->OperandList[0] != Op1) {
3681 N->OperandList[0].getVal()->removeUser(0, N);
3682 N->OperandList[0] = Op1;
3683 N->OperandList[0].setUser(N);
3684 Op1.Val->addUser(0, N);
3686 if (N->OperandList[1] != Op2) {
3687 N->OperandList[1].getVal()->removeUser(1, N);
3688 N->OperandList[1] = Op2;
3689 N->OperandList[1].setUser(N);
3690 Op2.Val->addUser(1, N);
3693 // If this gets put into a CSE map, add it.
3694 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3698 SDValue SelectionDAG::
3699 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3700 SDValue Ops[] = { Op1, Op2, Op3 };
3701 return UpdateNodeOperands(N, Ops, 3);
3704 SDValue SelectionDAG::
3705 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3706 SDValue Op3, SDValue Op4) {
3707 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3708 return UpdateNodeOperands(N, Ops, 4);
3711 SDValue SelectionDAG::
3712 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3713 SDValue Op3, SDValue Op4, SDValue Op5) {
3714 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3715 return UpdateNodeOperands(N, Ops, 5);
3718 SDValue SelectionDAG::
3719 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3720 SDNode *N = InN.Val;
3721 assert(N->getNumOperands() == NumOps &&
3722 "Update with wrong number of operands");
3724 // Check to see if there is no change.
3725 bool AnyChange = false;
3726 for (unsigned i = 0; i != NumOps; ++i) {
3727 if (Ops[i] != N->getOperand(i)) {
3733 // No operands changed, just return the input node.
3734 if (!AnyChange) return InN;
3736 // See if the modified node already exists.
3737 void *InsertPos = 0;
3738 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3739 return SDValue(Existing, InN.ResNo);
3741 // Nope it doesn't. Remove the node from its current place in the maps.
3743 RemoveNodeFromCSEMaps(N);
3745 // Now we update the operands.
3746 for (unsigned i = 0; i != NumOps; ++i) {
3747 if (N->OperandList[i] != Ops[i]) {
3748 N->OperandList[i].getVal()->removeUser(i, N);
3749 N->OperandList[i] = Ops[i];
3750 N->OperandList[i].setUser(N);
3751 Ops[i].Val->addUser(i, N);
3755 // If this gets put into a CSE map, add it.
3756 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3760 /// DropOperands - Release the operands and set this node to have
3762 void SDNode::DropOperands() {
3763 // Unlike the code in MorphNodeTo that does this, we don't need to
3764 // watch for dead nodes here.
3765 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3766 I->getVal()->removeUser(std::distance(op_begin(), I), this);
3771 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
3774 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3776 SDVTList VTs = getVTList(VT);
3777 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
3780 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3781 MVT VT, SDValue Op1) {
3782 SDVTList VTs = getVTList(VT);
3783 SDValue Ops[] = { Op1 };
3784 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
3787 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3788 MVT VT, SDValue Op1,
3790 SDVTList VTs = getVTList(VT);
3791 SDValue Ops[] = { Op1, Op2 };
3792 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
3795 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3796 MVT VT, SDValue Op1,
3797 SDValue Op2, SDValue Op3) {
3798 SDVTList VTs = getVTList(VT);
3799 SDValue Ops[] = { Op1, Op2, Op3 };
3800 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
3803 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3804 MVT VT, const SDValue *Ops,
3806 SDVTList VTs = getVTList(VT);
3807 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3810 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3811 MVT VT1, MVT VT2, const SDValue *Ops,
3813 SDVTList VTs = getVTList(VT1, VT2);
3814 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3817 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3819 SDVTList VTs = getVTList(VT1, VT2);
3820 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
3823 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3824 MVT VT1, MVT VT2, MVT VT3,
3825 const SDValue *Ops, unsigned NumOps) {
3826 SDVTList VTs = getVTList(VT1, VT2, VT3);
3827 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3830 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3833 SDVTList VTs = getVTList(VT1, VT2);
3834 SDValue Ops[] = { Op1 };
3835 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
3838 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3840 SDValue Op1, SDValue Op2) {
3841 SDVTList VTs = getVTList(VT1, VT2);
3842 SDValue Ops[] = { Op1, Op2 };
3843 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
3846 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3848 SDValue Op1, SDValue Op2,
3850 SDVTList VTs = getVTList(VT1, VT2);
3851 SDValue Ops[] = { Op1, Op2, Op3 };
3852 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
3855 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3856 SDVTList VTs, const SDValue *Ops,
3858 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
3861 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3863 SDVTList VTs = getVTList(VT);
3864 return MorphNodeTo(N, Opc, VTs, 0, 0);
3867 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3868 MVT VT, SDValue Op1) {
3869 SDVTList VTs = getVTList(VT);
3870 SDValue Ops[] = { Op1 };
3871 return MorphNodeTo(N, Opc, VTs, Ops, 1);
3874 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3875 MVT VT, SDValue Op1,
3877 SDVTList VTs = getVTList(VT);
3878 SDValue Ops[] = { Op1, Op2 };
3879 return MorphNodeTo(N, Opc, VTs, Ops, 2);
3882 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3883 MVT VT, SDValue Op1,
3884 SDValue Op2, SDValue Op3) {
3885 SDVTList VTs = getVTList(VT);
3886 SDValue Ops[] = { Op1, Op2, Op3 };
3887 return MorphNodeTo(N, Opc, VTs, Ops, 3);
3890 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3891 MVT VT, const SDValue *Ops,
3893 SDVTList VTs = getVTList(VT);
3894 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
3897 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3898 MVT VT1, MVT VT2, const SDValue *Ops,
3900 SDVTList VTs = getVTList(VT1, VT2);
3901 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
3904 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3906 SDVTList VTs = getVTList(VT1, VT2);
3907 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
3910 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3911 MVT VT1, MVT VT2, MVT VT3,
3912 const SDValue *Ops, unsigned NumOps) {
3913 SDVTList VTs = getVTList(VT1, VT2, VT3);
3914 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
3917 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3920 SDVTList VTs = getVTList(VT1, VT2);
3921 SDValue Ops[] = { Op1 };
3922 return MorphNodeTo(N, Opc, VTs, Ops, 1);
3925 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3927 SDValue Op1, SDValue Op2) {
3928 SDVTList VTs = getVTList(VT1, VT2);
3929 SDValue Ops[] = { Op1, Op2 };
3930 return MorphNodeTo(N, Opc, VTs, Ops, 2);
3933 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3935 SDValue Op1, SDValue Op2,
3937 SDVTList VTs = getVTList(VT1, VT2);
3938 SDValue Ops[] = { Op1, Op2, Op3 };
3939 return MorphNodeTo(N, Opc, VTs, Ops, 3);
3942 /// MorphNodeTo - These *mutate* the specified node to have the specified
3943 /// return type, opcode, and operands.
3945 /// Note that MorphNodeTo returns the resultant node. If there is already a
3946 /// node of the specified opcode and operands, it returns that node instead of
3947 /// the current one.
3949 /// Using MorphNodeTo is faster than creating a new node and swapping it in
3950 /// with ReplaceAllUsesWith both because it often avoids allocating a new
3951 /// node, and because it doesn't require CSE recalulation for any of
3952 /// the node's users.
3954 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
3955 SDVTList VTs, const SDValue *Ops,
3957 // If an identical node already exists, use it.
3959 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
3960 FoldingSetNodeID ID;
3961 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
3962 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3966 RemoveNodeFromCSEMaps(N);
3968 // Start the morphing.
3970 N->ValueList = VTs.VTs;
3971 N->NumValues = VTs.NumVTs;
3973 // Clear the operands list, updating used nodes to remove this from their
3974 // use list. Keep track of any operands that become dead as a result.
3975 SmallPtrSet<SDNode*, 16> DeadNodeSet;
3976 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
3978 SDNode *Used = I->getVal();
3979 Used->removeUser(std::distance(B, I), N);
3980 if (Used->use_empty())
3981 DeadNodeSet.insert(Used);
3984 // If NumOps is larger than the # of operands we currently have, reallocate
3985 // the operand list.
3986 if (NumOps > N->NumOperands) {
3987 if (N->OperandsNeedDelete)
3988 delete[] N->OperandList;
3989 if (N->isMachineOpcode()) {
3990 // We're creating a final node that will live unmorphed for the
3991 // remainder of this SelectionDAG's duration, so we can allocate the
3992 // operands directly out of the pool with no recycling metadata.
3993 N->OperandList = Allocator.Allocate<SDUse>(NumOps);
3994 N->OperandsNeedDelete = false;
3996 N->OperandList = new SDUse[NumOps];
3997 N->OperandsNeedDelete = true;
4001 // Assign the new operands.
4002 N->NumOperands = NumOps;
4003 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4004 N->OperandList[i] = Ops[i];
4005 N->OperandList[i].setUser(N);
4006 SDNode *ToUse = N->OperandList[i].getVal();
4007 ToUse->addUser(i, N);
4010 // Delete any nodes that are still dead after adding the uses for the
4012 SmallVector<SDNode *, 16> DeadNodes;
4013 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4014 E = DeadNodeSet.end(); I != E; ++I)
4015 if ((*I)->use_empty())
4016 DeadNodes.push_back(*I);
4017 RemoveDeadNodes(DeadNodes);
4020 CSEMap.InsertNode(N, IP); // Memoize the new node.
4025 /// getTargetNode - These are used for target selectors to create a new node
4026 /// with specified return type(s), target opcode, and operands.
4028 /// Note that getTargetNode returns the resultant node. If there is already a
4029 /// node of the specified opcode and operands, it returns that node instead of
4030 /// the current one.
4031 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4032 return getNode(~Opcode, VT).Val;
4034 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4035 return getNode(~Opcode, VT, Op1).Val;
4037 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4038 SDValue Op1, SDValue Op2) {
4039 return getNode(~Opcode, VT, Op1, Op2).Val;
4041 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4042 SDValue Op1, SDValue Op2,
4044 return getNode(~Opcode, VT, Op1, Op2, Op3).Val;
4046 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4047 const SDValue *Ops, unsigned NumOps) {
4048 return getNode(~Opcode, VT, Ops, NumOps).Val;
4050 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4051 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4053 return getNode(~Opcode, VTs, 2, &Op, 0).Val;
4055 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4056 MVT VT2, SDValue Op1) {
4057 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4058 return getNode(~Opcode, VTs, 2, &Op1, 1).Val;
4060 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4061 MVT VT2, SDValue Op1,
4063 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4064 SDValue Ops[] = { Op1, Op2 };
4065 return getNode(~Opcode, VTs, 2, Ops, 2).Val;
4067 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4068 MVT VT2, SDValue Op1,
4069 SDValue Op2, SDValue Op3) {
4070 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4071 SDValue Ops[] = { Op1, Op2, Op3 };
4072 return getNode(~Opcode, VTs, 2, Ops, 3).Val;
4074 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4075 const SDValue *Ops, unsigned NumOps) {
4076 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4077 return getNode(~Opcode, VTs, 2, Ops, NumOps).Val;
4079 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4080 SDValue Op1, SDValue Op2) {
4081 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4082 SDValue Ops[] = { Op1, Op2 };
4083 return getNode(~Opcode, VTs, 3, Ops, 2).Val;
4085 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4086 SDValue Op1, SDValue Op2,
4088 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4089 SDValue Ops[] = { Op1, Op2, Op3 };
4090 return getNode(~Opcode, VTs, 3, Ops, 3).Val;
4092 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4093 const SDValue *Ops, unsigned NumOps) {
4094 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4095 return getNode(~Opcode, VTs, 3, Ops, NumOps).Val;
4097 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4098 MVT VT2, MVT VT3, MVT VT4,
4099 const SDValue *Ops, unsigned NumOps) {
4100 std::vector<MVT> VTList;
4101 VTList.push_back(VT1);
4102 VTList.push_back(VT2);
4103 VTList.push_back(VT3);
4104 VTList.push_back(VT4);
4105 const MVT *VTs = getNodeValueTypes(VTList);
4106 return getNode(~Opcode, VTs, 4, Ops, NumOps).Val;
4108 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4109 const std::vector<MVT> &ResultTys,
4110 const SDValue *Ops, unsigned NumOps) {
4111 const MVT *VTs = getNodeValueTypes(ResultTys);
4112 return getNode(~Opcode, VTs, ResultTys.size(),
4116 /// getNodeIfExists - Get the specified node if it's already available, or
4117 /// else return NULL.
4118 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4119 const SDValue *Ops, unsigned NumOps) {
4120 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4121 FoldingSetNodeID ID;
4122 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4131 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4132 /// This can cause recursive merging of nodes in the DAG.
4134 /// This version assumes From has a single result value.
4136 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4137 DAGUpdateListener *UpdateListener) {
4138 SDNode *From = FromN.Val;
4139 assert(From->getNumValues() == 1 && FromN.ResNo == 0 &&
4140 "Cannot replace with this method!");
4141 assert(From != To.Val && "Cannot replace uses of with self");
4143 while (!From->use_empty()) {
4144 SDNode::use_iterator UI = From->use_begin();
4147 // This node is about to morph, remove its old self from the CSE maps.
4148 RemoveNodeFromCSEMaps(U);
4150 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4151 I != E; ++I, ++operandNum)
4152 if (I->getVal() == From) {
4153 From->removeUser(operandNum, U);
4156 To.Val->addUser(operandNum, U);
4159 // Now that we have modified U, add it back to the CSE maps. If it already
4160 // exists there, recursively merge the results together.
4161 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4162 ReplaceAllUsesWith(U, Existing, UpdateListener);
4163 // U is now dead. Inform the listener if it exists and delete it.
4165 UpdateListener->NodeDeleted(U, Existing);
4166 DeleteNodeNotInCSEMaps(U);
4168 // If the node doesn't already exist, we updated it. Inform a listener if
4171 UpdateListener->NodeUpdated(U);
4176 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4177 /// This can cause recursive merging of nodes in the DAG.
4179 /// This version assumes From/To have matching types and numbers of result
4182 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4183 DAGUpdateListener *UpdateListener) {
4184 assert(From->getVTList().VTs == To->getVTList().VTs &&
4185 From->getNumValues() == To->getNumValues() &&
4186 "Cannot use this version of ReplaceAllUsesWith!");
4188 // Handle the trivial case.
4192 while (!From->use_empty()) {
4193 SDNode::use_iterator UI = From->use_begin();
4196 // This node is about to morph, remove its old self from the CSE maps.
4197 RemoveNodeFromCSEMaps(U);
4199 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4200 I != E; ++I, ++operandNum)
4201 if (I->getVal() == From) {
4202 From->removeUser(operandNum, U);
4204 To->addUser(operandNum, U);
4207 // Now that we have modified U, add it back to the CSE maps. If it already
4208 // exists there, recursively merge the results together.
4209 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4210 ReplaceAllUsesWith(U, Existing, UpdateListener);
4211 // U is now dead. Inform the listener if it exists and delete it.
4213 UpdateListener->NodeDeleted(U, Existing);
4214 DeleteNodeNotInCSEMaps(U);
4216 // If the node doesn't already exist, we updated it. Inform a listener if
4219 UpdateListener->NodeUpdated(U);
4224 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4225 /// This can cause recursive merging of nodes in the DAG.
4227 /// This version can replace From with any result values. To must match the
4228 /// number and types of values returned by From.
4229 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4231 DAGUpdateListener *UpdateListener) {
4232 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4233 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4235 while (!From->use_empty()) {
4236 SDNode::use_iterator UI = From->use_begin();
4239 // This node is about to morph, remove its old self from the CSE maps.
4240 RemoveNodeFromCSEMaps(U);
4242 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4243 I != E; ++I, ++operandNum)
4244 if (I->getVal() == From) {
4245 const SDValue &ToOp = To[I->getSDValue().ResNo];
4246 From->removeUser(operandNum, U);
4249 ToOp.Val->addUser(operandNum, U);
4252 // Now that we have modified U, add it back to the CSE maps. If it already
4253 // exists there, recursively merge the results together.
4254 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4255 ReplaceAllUsesWith(U, Existing, UpdateListener);
4256 // U is now dead. Inform the listener if it exists and delete it.
4258 UpdateListener->NodeDeleted(U, Existing);
4259 DeleteNodeNotInCSEMaps(U);
4261 // If the node doesn't already exist, we updated it. Inform a listener if
4264 UpdateListener->NodeUpdated(U);
4269 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4270 /// uses of other values produced by From.Val alone. The Deleted vector is
4271 /// handled the same way as for ReplaceAllUsesWith.
4272 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4273 DAGUpdateListener *UpdateListener){
4274 // Handle the really simple, really trivial case efficiently.
4275 if (From == To) return;
4277 // Handle the simple, trivial, case efficiently.
4278 if (From.Val->getNumValues() == 1) {
4279 ReplaceAllUsesWith(From, To, UpdateListener);
4283 // Get all of the users of From.Val. We want these in a nice,
4284 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4285 SmallSetVector<SDNode*, 16> Users(From.Val->use_begin(), From.Val->use_end());
4287 while (!Users.empty()) {
4288 // We know that this user uses some value of From. If it is the right
4289 // value, update it.
4290 SDNode *User = Users.back();
4293 // Scan for an operand that matches From.
4294 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4295 for (; Op != E; ++Op)
4296 if (*Op == From) break;
4298 // If there are no matches, the user must use some other result of From.
4299 if (Op == E) continue;
4301 // Okay, we know this user needs to be updated. Remove its old self
4302 // from the CSE maps.
4303 RemoveNodeFromCSEMaps(User);
4305 // Update all operands that match "From" in case there are multiple uses.
4306 for (; Op != E; ++Op) {
4308 From.Val->removeUser(Op-User->op_begin(), User);
4311 To.Val->addUser(Op-User->op_begin(), User);
4315 // Now that we have modified User, add it back to the CSE maps. If it
4316 // already exists there, recursively merge the results together.
4317 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4319 if (UpdateListener) UpdateListener->NodeUpdated(User);
4320 continue; // Continue on to next user.
4323 // If there was already an existing matching node, use ReplaceAllUsesWith
4324 // to replace the dead one with the existing one. This can cause
4325 // recursive merging of other unrelated nodes down the line.
4326 ReplaceAllUsesWith(User, Existing, UpdateListener);
4328 // User is now dead. Notify a listener if present.
4329 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4330 DeleteNodeNotInCSEMaps(User);
4334 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4335 /// uses of other values produced by From.Val alone. The same value may
4336 /// appear in both the From and To list. The Deleted vector is
4337 /// handled the same way as for ReplaceAllUsesWith.
4338 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4341 DAGUpdateListener *UpdateListener){
4342 // Handle the simple, trivial case efficiently.
4344 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4346 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4347 for (unsigned i = 0; i != Num; ++i)
4348 for (SDNode::use_iterator UI = From[i].Val->use_begin(),
4349 E = From[i].Val->use_end(); UI != E; ++UI)
4350 Users.push_back(std::make_pair(*UI, i));
4352 while (!Users.empty()) {
4353 // We know that this user uses some value of From. If it is the right
4354 // value, update it.
4355 SDNode *User = Users.back().first;
4356 unsigned i = Users.back().second;
4359 // Scan for an operand that matches From.
4360 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4361 for (; Op != E; ++Op)
4362 if (*Op == From[i]) break;
4364 // If there are no matches, the user must use some other result of From.
4365 if (Op == E) continue;
4367 // Okay, we know this user needs to be updated. Remove its old self
4368 // from the CSE maps.
4369 RemoveNodeFromCSEMaps(User);
4371 // Update all operands that match "From" in case there are multiple uses.
4372 for (; Op != E; ++Op) {
4373 if (*Op == From[i]) {
4374 From[i].Val->removeUser(Op-User->op_begin(), User);
4377 To[i].Val->addUser(Op-User->op_begin(), User);
4381 // Now that we have modified User, add it back to the CSE maps. If it
4382 // already exists there, recursively merge the results together.
4383 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4385 if (UpdateListener) UpdateListener->NodeUpdated(User);
4386 continue; // Continue on to next user.
4389 // If there was already an existing matching node, use ReplaceAllUsesWith
4390 // to replace the dead one with the existing one. This can cause
4391 // recursive merging of other unrelated nodes down the line.
4392 ReplaceAllUsesWith(User, Existing, UpdateListener);
4394 // User is now dead. Notify a listener if present.
4395 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4396 DeleteNodeNotInCSEMaps(User);
4400 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4401 /// based on their topological order. It returns the maximum id and a vector
4402 /// of the SDNodes* in assigned order by reference.
4403 unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) {
4404 unsigned DAGSize = AllNodes.size();
4405 std::vector<unsigned> InDegree(DAGSize);
4406 std::vector<SDNode*> Sources;
4408 // Use a two pass approach to avoid using a std::map which is slow.
4410 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){
4413 unsigned Degree = N->use_size();
4414 InDegree[N->getNodeId()] = Degree;
4416 Sources.push_back(N);
4420 TopOrder.reserve(DAGSize);
4421 while (!Sources.empty()) {
4422 SDNode *N = Sources.back();
4424 TopOrder.push_back(N);
4425 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
4426 SDNode *P = I->getVal();
4427 unsigned Degree = --InDegree[P->getNodeId()];
4429 Sources.push_back(P);
4433 // Second pass, assign the actual topological order as node ids.
4435 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end();
4437 (*TI)->setNodeId(Id++);
4444 //===----------------------------------------------------------------------===//
4446 //===----------------------------------------------------------------------===//
4448 // Out-of-line virtual method to give class a home.
4449 void SDNode::ANCHOR() {}
4450 void UnarySDNode::ANCHOR() {}
4451 void BinarySDNode::ANCHOR() {}
4452 void TernarySDNode::ANCHOR() {}
4453 void HandleSDNode::ANCHOR() {}
4454 void ConstantSDNode::ANCHOR() {}
4455 void ConstantFPSDNode::ANCHOR() {}
4456 void GlobalAddressSDNode::ANCHOR() {}
4457 void FrameIndexSDNode::ANCHOR() {}
4458 void JumpTableSDNode::ANCHOR() {}
4459 void ConstantPoolSDNode::ANCHOR() {}
4460 void BasicBlockSDNode::ANCHOR() {}
4461 void SrcValueSDNode::ANCHOR() {}
4462 void MemOperandSDNode::ANCHOR() {}
4463 void RegisterSDNode::ANCHOR() {}
4464 void DbgStopPointSDNode::ANCHOR() {}
4465 void LabelSDNode::ANCHOR() {}
4466 void ExternalSymbolSDNode::ANCHOR() {}
4467 void CondCodeSDNode::ANCHOR() {}
4468 void ARG_FLAGSSDNode::ANCHOR() {}
4469 void VTSDNode::ANCHOR() {}
4470 void MemSDNode::ANCHOR() {}
4471 void LoadSDNode::ANCHOR() {}
4472 void StoreSDNode::ANCHOR() {}
4473 void AtomicSDNode::ANCHOR() {}
4475 HandleSDNode::~HandleSDNode() {
4479 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4481 : SDNode(isa<GlobalVariable>(GA) &&
4482 cast<GlobalVariable>(GA)->isThreadLocal() ?
4484 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4486 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4487 getSDVTList(VT)), Offset(o) {
4488 TheGlobal = const_cast<GlobalValue*>(GA);
4491 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4492 const Value *srcValue, int SVO,
4493 unsigned alignment, bool vol)
4494 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4495 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4497 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4498 assert(getAlignment() == alignment && "Alignment representation error!");
4499 assert(isVolatile() == vol && "Volatile representation error!");
4502 /// getMemOperand - Return a MachineMemOperand object describing the memory
4503 /// reference performed by this memory reference.
4504 MachineMemOperand MemSDNode::getMemOperand() const {
4506 if (isa<LoadSDNode>(this))
4507 Flags = MachineMemOperand::MOLoad;
4508 else if (isa<StoreSDNode>(this))
4509 Flags = MachineMemOperand::MOStore;
4511 assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!");
4512 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4515 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4516 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4518 // Check if the memory reference references a frame index
4519 const FrameIndexSDNode *FI =
4520 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
4521 if (!getSrcValue() && FI)
4522 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4523 Flags, 0, Size, getAlignment());
4525 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4526 Size, getAlignment());
4529 /// Profile - Gather unique data for the node.
4531 void SDNode::Profile(FoldingSetNodeID &ID) const {
4532 AddNodeIDNode(ID, this);
4535 /// getValueTypeList - Return a pointer to the specified value type.
4537 const MVT *SDNode::getValueTypeList(MVT VT) {
4538 if (VT.isExtended()) {
4539 static std::set<MVT, MVT::compareRawBits> EVTs;
4540 return &(*EVTs.insert(VT).first);
4542 static MVT VTs[MVT::LAST_VALUETYPE];
4543 VTs[VT.getSimpleVT()] = VT;
4544 return &VTs[VT.getSimpleVT()];
4548 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4549 /// indicated value. This method ignores uses of other values defined by this
4551 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4552 assert(Value < getNumValues() && "Bad value!");
4554 // TODO: Only iterate over uses of a given value of the node
4555 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4556 if (UI.getUse().getSDValue().ResNo == Value) {
4563 // Found exactly the right number of uses?
4568 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4569 /// value. This method ignores uses of other values defined by this operation.
4570 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4571 assert(Value < getNumValues() && "Bad value!");
4573 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4574 if (UI.getUse().getSDValue().ResNo == Value)
4581 /// isOnlyUserOf - Return true if this node is the only use of N.
4583 bool SDNode::isOnlyUserOf(SDNode *N) const {
4585 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4596 /// isOperand - Return true if this node is an operand of N.
4598 bool SDValue::isOperandOf(SDNode *N) const {
4599 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4600 if (*this == N->getOperand(i))
4605 bool SDNode::isOperandOf(SDNode *N) const {
4606 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4607 if (this == N->OperandList[i].getVal())
4612 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4613 /// be a chain) reaches the specified operand without crossing any
4614 /// side-effecting instructions. In practice, this looks through token
4615 /// factors and non-volatile loads. In order to remain efficient, this only
4616 /// looks a couple of nodes in, it does not do an exhaustive search.
4617 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4618 unsigned Depth) const {
4619 if (*this == Dest) return true;
4621 // Don't search too deeply, we just want to be able to see through
4622 // TokenFactor's etc.
4623 if (Depth == 0) return false;
4625 // If this is a token factor, all inputs to the TF happen in parallel. If any
4626 // of the operands of the TF reach dest, then we can do the xform.
4627 if (getOpcode() == ISD::TokenFactor) {
4628 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4629 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4634 // Loads don't have side effects, look through them.
4635 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4636 if (!Ld->isVolatile())
4637 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4643 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4644 SmallPtrSet<SDNode *, 32> &Visited) {
4645 if (found || !Visited.insert(N))
4648 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4649 SDNode *Op = N->getOperand(i).Val;
4654 findPredecessor(Op, P, found, Visited);
4658 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4659 /// is either an operand of N or it can be reached by recursively traversing
4660 /// up the operands.
4661 /// NOTE: this is an expensive method. Use it carefully.
4662 bool SDNode::isPredecessorOf(SDNode *N) const {
4663 SmallPtrSet<SDNode *, 32> Visited;
4665 findPredecessor(N, this, found, Visited);
4669 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4670 assert(Num < NumOperands && "Invalid child # of SDNode!");
4671 return cast<ConstantSDNode>(OperandList[Num])->getValue();
4674 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4675 switch (getOpcode()) {
4677 if (getOpcode() < ISD::BUILTIN_OP_END)
4678 return "<<Unknown DAG Node>>";
4679 if (isMachineOpcode()) {
4681 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4682 if (getMachineOpcode() < TII->getNumOpcodes())
4683 return TII->get(getMachineOpcode()).getName();
4684 return "<<Unknown Machine Node>>";
4687 TargetLowering &TLI = G->getTargetLoweringInfo();
4688 const char *Name = TLI.getTargetNodeName(getOpcode());
4689 if (Name) return Name;
4690 return "<<Unknown Target Node>>";
4692 return "<<Unknown Node>>";
4695 case ISD::DELETED_NODE:
4696 return "<<Deleted Node!>>";
4698 case ISD::PREFETCH: return "Prefetch";
4699 case ISD::MEMBARRIER: return "MemBarrier";
4700 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
4701 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
4702 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
4703 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
4704 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
4705 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
4706 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
4707 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
4708 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
4709 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
4710 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
4711 case ISD::ATOMIC_SWAP: return "AtomicSWAP";
4712 case ISD::PCMARKER: return "PCMarker";
4713 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
4714 case ISD::SRCVALUE: return "SrcValue";
4715 case ISD::MEMOPERAND: return "MemOperand";
4716 case ISD::EntryToken: return "EntryToken";
4717 case ISD::TokenFactor: return "TokenFactor";
4718 case ISD::AssertSext: return "AssertSext";
4719 case ISD::AssertZext: return "AssertZext";
4721 case ISD::BasicBlock: return "BasicBlock";
4722 case ISD::ARG_FLAGS: return "ArgFlags";
4723 case ISD::VALUETYPE: return "ValueType";
4724 case ISD::Register: return "Register";
4726 case ISD::Constant: return "Constant";
4727 case ISD::ConstantFP: return "ConstantFP";
4728 case ISD::GlobalAddress: return "GlobalAddress";
4729 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
4730 case ISD::FrameIndex: return "FrameIndex";
4731 case ISD::JumpTable: return "JumpTable";
4732 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
4733 case ISD::RETURNADDR: return "RETURNADDR";
4734 case ISD::FRAMEADDR: return "FRAMEADDR";
4735 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
4736 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
4737 case ISD::EHSELECTION: return "EHSELECTION";
4738 case ISD::EH_RETURN: return "EH_RETURN";
4739 case ISD::ConstantPool: return "ConstantPool";
4740 case ISD::ExternalSymbol: return "ExternalSymbol";
4741 case ISD::INTRINSIC_WO_CHAIN: {
4742 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue();
4743 return Intrinsic::getName((Intrinsic::ID)IID);
4745 case ISD::INTRINSIC_VOID:
4746 case ISD::INTRINSIC_W_CHAIN: {
4747 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue();
4748 return Intrinsic::getName((Intrinsic::ID)IID);
4751 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
4752 case ISD::TargetConstant: return "TargetConstant";
4753 case ISD::TargetConstantFP:return "TargetConstantFP";
4754 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
4755 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
4756 case ISD::TargetFrameIndex: return "TargetFrameIndex";
4757 case ISD::TargetJumpTable: return "TargetJumpTable";
4758 case ISD::TargetConstantPool: return "TargetConstantPool";
4759 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
4761 case ISD::CopyToReg: return "CopyToReg";
4762 case ISD::CopyFromReg: return "CopyFromReg";
4763 case ISD::UNDEF: return "undef";
4764 case ISD::MERGE_VALUES: return "merge_values";
4765 case ISD::INLINEASM: return "inlineasm";
4766 case ISD::DBG_LABEL: return "dbg_label";
4767 case ISD::EH_LABEL: return "eh_label";
4768 case ISD::DECLARE: return "declare";
4769 case ISD::HANDLENODE: return "handlenode";
4770 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
4771 case ISD::CALL: return "call";
4774 case ISD::FABS: return "fabs";
4775 case ISD::FNEG: return "fneg";
4776 case ISD::FSQRT: return "fsqrt";
4777 case ISD::FSIN: return "fsin";
4778 case ISD::FCOS: return "fcos";
4779 case ISD::FPOWI: return "fpowi";
4780 case ISD::FPOW: return "fpow";
4781 case ISD::FTRUNC: return "ftrunc";
4782 case ISD::FFLOOR: return "ffloor";
4783 case ISD::FCEIL: return "fceil";
4784 case ISD::FRINT: return "frint";
4785 case ISD::FNEARBYINT: return "fnearbyint";
4788 case ISD::ADD: return "add";
4789 case ISD::SUB: return "sub";
4790 case ISD::MUL: return "mul";
4791 case ISD::MULHU: return "mulhu";
4792 case ISD::MULHS: return "mulhs";
4793 case ISD::SDIV: return "sdiv";
4794 case ISD::UDIV: return "udiv";
4795 case ISD::SREM: return "srem";
4796 case ISD::UREM: return "urem";
4797 case ISD::SMUL_LOHI: return "smul_lohi";
4798 case ISD::UMUL_LOHI: return "umul_lohi";
4799 case ISD::SDIVREM: return "sdivrem";
4800 case ISD::UDIVREM: return "divrem";
4801 case ISD::AND: return "and";
4802 case ISD::OR: return "or";
4803 case ISD::XOR: return "xor";
4804 case ISD::SHL: return "shl";
4805 case ISD::SRA: return "sra";
4806 case ISD::SRL: return "srl";
4807 case ISD::ROTL: return "rotl";
4808 case ISD::ROTR: return "rotr";
4809 case ISD::FADD: return "fadd";
4810 case ISD::FSUB: return "fsub";
4811 case ISD::FMUL: return "fmul";
4812 case ISD::FDIV: return "fdiv";
4813 case ISD::FREM: return "frem";
4814 case ISD::FCOPYSIGN: return "fcopysign";
4815 case ISD::FGETSIGN: return "fgetsign";
4817 case ISD::SETCC: return "setcc";
4818 case ISD::VSETCC: return "vsetcc";
4819 case ISD::SELECT: return "select";
4820 case ISD::SELECT_CC: return "select_cc";
4821 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
4822 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
4823 case ISD::CONCAT_VECTORS: return "concat_vectors";
4824 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
4825 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
4826 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
4827 case ISD::CARRY_FALSE: return "carry_false";
4828 case ISD::ADDC: return "addc";
4829 case ISD::ADDE: return "adde";
4830 case ISD::SUBC: return "subc";
4831 case ISD::SUBE: return "sube";
4832 case ISD::SHL_PARTS: return "shl_parts";
4833 case ISD::SRA_PARTS: return "sra_parts";
4834 case ISD::SRL_PARTS: return "srl_parts";
4836 case ISD::EXTRACT_SUBREG: return "extract_subreg";
4837 case ISD::INSERT_SUBREG: return "insert_subreg";
4839 // Conversion operators.
4840 case ISD::SIGN_EXTEND: return "sign_extend";
4841 case ISD::ZERO_EXTEND: return "zero_extend";
4842 case ISD::ANY_EXTEND: return "any_extend";
4843 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
4844 case ISD::TRUNCATE: return "truncate";
4845 case ISD::FP_ROUND: return "fp_round";
4846 case ISD::FLT_ROUNDS_: return "flt_rounds";
4847 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
4848 case ISD::FP_EXTEND: return "fp_extend";
4850 case ISD::SINT_TO_FP: return "sint_to_fp";
4851 case ISD::UINT_TO_FP: return "uint_to_fp";
4852 case ISD::FP_TO_SINT: return "fp_to_sint";
4853 case ISD::FP_TO_UINT: return "fp_to_uint";
4854 case ISD::BIT_CONVERT: return "bit_convert";
4856 // Control flow instructions
4857 case ISD::BR: return "br";
4858 case ISD::BRIND: return "brind";
4859 case ISD::BR_JT: return "br_jt";
4860 case ISD::BRCOND: return "brcond";
4861 case ISD::BR_CC: return "br_cc";
4862 case ISD::RET: return "ret";
4863 case ISD::CALLSEQ_START: return "callseq_start";
4864 case ISD::CALLSEQ_END: return "callseq_end";
4867 case ISD::LOAD: return "load";
4868 case ISD::STORE: return "store";
4869 case ISD::VAARG: return "vaarg";
4870 case ISD::VACOPY: return "vacopy";
4871 case ISD::VAEND: return "vaend";
4872 case ISD::VASTART: return "vastart";
4873 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
4874 case ISD::EXTRACT_ELEMENT: return "extract_element";
4875 case ISD::BUILD_PAIR: return "build_pair";
4876 case ISD::STACKSAVE: return "stacksave";
4877 case ISD::STACKRESTORE: return "stackrestore";
4878 case ISD::TRAP: return "trap";
4881 case ISD::BSWAP: return "bswap";
4882 case ISD::CTPOP: return "ctpop";
4883 case ISD::CTTZ: return "cttz";
4884 case ISD::CTLZ: return "ctlz";
4887 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
4888 case ISD::DEBUG_LOC: return "debug_loc";
4891 case ISD::TRAMPOLINE: return "trampoline";
4894 switch (cast<CondCodeSDNode>(this)->get()) {
4895 default: assert(0 && "Unknown setcc condition!");
4896 case ISD::SETOEQ: return "setoeq";
4897 case ISD::SETOGT: return "setogt";
4898 case ISD::SETOGE: return "setoge";
4899 case ISD::SETOLT: return "setolt";
4900 case ISD::SETOLE: return "setole";
4901 case ISD::SETONE: return "setone";
4903 case ISD::SETO: return "seto";
4904 case ISD::SETUO: return "setuo";
4905 case ISD::SETUEQ: return "setue";
4906 case ISD::SETUGT: return "setugt";
4907 case ISD::SETUGE: return "setuge";
4908 case ISD::SETULT: return "setult";
4909 case ISD::SETULE: return "setule";
4910 case ISD::SETUNE: return "setune";
4912 case ISD::SETEQ: return "seteq";
4913 case ISD::SETGT: return "setgt";
4914 case ISD::SETGE: return "setge";
4915 case ISD::SETLT: return "setlt";
4916 case ISD::SETLE: return "setle";
4917 case ISD::SETNE: return "setne";
4922 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
4931 return "<post-inc>";
4933 return "<post-dec>";
4937 std::string ISD::ArgFlagsTy::getArgFlagsString() {
4938 std::string S = "< ";
4952 if (getByValAlign())
4953 S += "byval-align:" + utostr(getByValAlign()) + " ";
4955 S += "orig-align:" + utostr(getOrigAlign()) + " ";
4957 S += "byval-size:" + utostr(getByValSize()) + " ";
4961 void SDNode::dump() const { dump(0); }
4962 void SDNode::dump(const SelectionDAG *G) const {
4963 cerr << (void*)this << ": ";
4965 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
4967 if (getValueType(i) == MVT::Other)
4970 cerr << getValueType(i).getMVTString();
4972 cerr << " = " << getOperationName(G);
4975 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
4976 if (i) cerr << ", ";
4977 cerr << (void*)getOperand(i).Val;
4978 if (unsigned RN = getOperand(i).ResNo)
4982 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
4983 SDNode *Mask = getOperand(2).Val;
4985 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
4987 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
4990 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue();
4995 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
4996 cerr << '<' << CSDN->getAPIntValue() << '>';
4997 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
4998 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
4999 cerr << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5000 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5001 cerr << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5003 cerr << "<APFloat(";
5004 CSDN->getValueAPF().convertToAPInt().dump();
5007 } else if (const GlobalAddressSDNode *GADN =
5008 dyn_cast<GlobalAddressSDNode>(this)) {
5009 int offset = GADN->getOffset();
5011 WriteAsOperand(*cerr.stream(), GADN->getGlobal());
5014 cerr << " + " << offset;
5016 cerr << " " << offset;
5017 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5018 cerr << "<" << FIDN->getIndex() << ">";
5019 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5020 cerr << "<" << JTDN->getIndex() << ">";
5021 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5022 int offset = CP->getOffset();
5023 if (CP->isMachineConstantPoolEntry())
5024 cerr << "<" << *CP->getMachineCPVal() << ">";
5026 cerr << "<" << *CP->getConstVal() << ">";
5028 cerr << " + " << offset;
5030 cerr << " " << offset;
5031 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5033 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5035 cerr << LBB->getName() << " ";
5036 cerr << (const void*)BBDN->getBasicBlock() << ">";
5037 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5038 if (G && R->getReg() &&
5039 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5040 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5042 cerr << " #" << R->getReg();
5044 } else if (const ExternalSymbolSDNode *ES =
5045 dyn_cast<ExternalSymbolSDNode>(this)) {
5046 cerr << "'" << ES->getSymbol() << "'";
5047 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5049 cerr << "<" << M->getValue() << ">";
5052 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5053 if (M->MO.getValue())
5054 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5056 cerr << "<null:" << M->MO.getOffset() << ">";
5057 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5058 cerr << N->getArgFlags().getArgFlagsString();
5059 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5060 cerr << ":" << N->getVT().getMVTString();
5062 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5063 const Value *SrcValue = LD->getSrcValue();
5064 int SrcOffset = LD->getSrcValueOffset();
5070 cerr << ":" << SrcOffset << ">";
5073 switch (LD->getExtensionType()) {
5074 default: doExt = false; break;
5076 cerr << " <anyext ";
5086 cerr << LD->getMemoryVT().getMVTString() << ">";
5088 const char *AM = getIndexedModeName(LD->getAddressingMode());
5091 if (LD->isVolatile())
5092 cerr << " <volatile>";
5093 cerr << " alignment=" << LD->getAlignment();
5094 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5095 const Value *SrcValue = ST->getSrcValue();
5096 int SrcOffset = ST->getSrcValueOffset();
5102 cerr << ":" << SrcOffset << ">";
5104 if (ST->isTruncatingStore())
5106 << ST->getMemoryVT().getMVTString() << ">";
5108 const char *AM = getIndexedModeName(ST->getAddressingMode());
5111 if (ST->isVolatile())
5112 cerr << " <volatile>";
5113 cerr << " alignment=" << ST->getAlignment();
5114 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5115 const Value *SrcValue = AT->getSrcValue();
5116 int SrcOffset = AT->getSrcValueOffset();
5122 cerr << ":" << SrcOffset << ">";
5123 if (AT->isVolatile())
5124 cerr << " <volatile>";
5125 cerr << " alignment=" << AT->getAlignment();
5129 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5130 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5131 if (N->getOperand(i).Val->hasOneUse())
5132 DumpNodes(N->getOperand(i).Val, indent+2, G);
5134 cerr << "\n" << std::string(indent+2, ' ')
5135 << (void*)N->getOperand(i).Val << ": <multiple use>";
5138 cerr << "\n" << std::string(indent, ' ');
5142 void SelectionDAG::dump() const {
5143 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5145 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5147 const SDNode *N = I;
5148 if (!N->hasOneUse() && N != getRoot().Val)
5149 DumpNodes(N, 2, this);
5152 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this);
5157 const Type *ConstantPoolSDNode::getType() const {
5158 if (isMachineConstantPoolEntry())
5159 return Val.MachineCPVal->getType();
5160 return Val.ConstVal->getType();