1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "llvm/Constants.h"
17 #include "llvm/Analysis/ValueTracking.h"
18 #include "llvm/Function.h"
19 #include "llvm/GlobalAlias.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Intrinsics.h"
22 #include "llvm/DerivedTypes.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetIntrinsicInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/System/Mutex.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallPtrSet.h"
47 #include "llvm/ADT/SmallSet.h"
48 #include "llvm/ADT/SmallVector.h"
49 #include "llvm/ADT/StringExtras.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
62 switch (VT.getSimpleVT().SimpleTy) {
63 default: llvm_unreachable("Unknown FP format");
64 case MVT::f32: return &APFloat::IEEEsingle;
65 case MVT::f64: return &APFloat::IEEEdouble;
66 case MVT::f80: return &APFloat::x87DoubleExtended;
67 case MVT::f128: return &APFloat::IEEEquad;
68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
72 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
74 //===----------------------------------------------------------------------===//
75 // ConstantFPSDNode Class
76 //===----------------------------------------------------------------------===//
78 /// isExactlyValue - We don't rely on operator== working on double values, as
79 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
80 /// As such, this method can be used to do an exact bit-for-bit comparison of
81 /// two floating point values.
82 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
83 return getValueAPF().bitwiseIsEqual(V);
86 bool ConstantFPSDNode::isValueValidForType(EVT VT,
88 assert(VT.isFloatingPoint() && "Can only convert between FP types");
90 // PPC long double cannot be converted to any other type.
91 if (VT == MVT::ppcf128 ||
92 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BIT_CONVERT)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
127 SDValue NotZero = N->getOperand(i);
128 if (isa<ConstantSDNode>(NotZero)) {
129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
131 } else if (isa<ConstantFPSDNode>(NotZero)) {
132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
133 bitcastToAPInt().isAllOnesValue())
138 // Okay, we have at least one ~0 value, check to see if the rest match or are
140 for (++i; i != e; ++i)
141 if (N->getOperand(i) != NotZero &&
142 N->getOperand(i).getOpcode() != ISD::UNDEF)
148 /// isBuildVectorAllZeros - Return true if the specified node is a
149 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
151 // Look through a bit convert.
152 if (N->getOpcode() == ISD::BIT_CONVERT)
153 N = N->getOperand(0).getNode();
155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
157 unsigned i = 0, e = N->getNumOperands();
159 // Skip over all of the undef values.
160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163 // Do not accept an all-undef vector.
164 if (i == e) return false;
166 // Do not accept build_vectors that aren't all constants or which have non-0
168 SDValue Zero = N->getOperand(i);
169 if (isa<ConstantSDNode>(Zero)) {
170 if (!cast<ConstantSDNode>(Zero)->isNullValue())
172 } else if (isa<ConstantFPSDNode>(Zero)) {
173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
178 // Okay, we have at least one 0 value, check to see if the rest match or are
180 for (++i; i != e; ++i)
181 if (N->getOperand(i) != Zero &&
182 N->getOperand(i).getOpcode() != ISD::UNDEF)
187 /// isScalarToVector - Return true if the specified node is a
188 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 /// element is not an undef.
190 bool ISD::isScalarToVector(const SDNode *N) {
191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194 if (N->getOpcode() != ISD::BUILD_VECTOR)
196 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
198 unsigned NumElems = N->getNumOperands();
199 for (unsigned i = 1; i < NumElems; ++i) {
200 SDValue V = N->getOperand(i);
201 if (V.getOpcode() != ISD::UNDEF)
207 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
208 /// when given the operation for (X op Y).
209 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
210 // To perform this operation, we just need to swap the L and G bits of the
212 unsigned OldL = (Operation >> 2) & 1;
213 unsigned OldG = (Operation >> 1) & 1;
214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
215 (OldL << 1) | // New G bit
216 (OldG << 2)); // New L bit.
219 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
220 /// 'op' is a valid SetCC operation.
221 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
222 unsigned Operation = Op;
224 Operation ^= 7; // Flip L, G, E bits, but not U.
226 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: llvm_unreachable("Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return MF->getTarget();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, temporalness, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
476 bool isNonTemporal) {
477 assert((ConvType & 3) == ConvType &&
478 "ConvType may not require more than 2 bits!");
479 assert((AM & 7) == AM &&
480 "AM may not require more than 3 bits!");
484 (isNonTemporal << 6);
487 //===----------------------------------------------------------------------===//
488 // SelectionDAG Class
489 //===----------------------------------------------------------------------===//
491 /// doNotCSE - Return true if CSE should not be performed for this node.
492 static bool doNotCSE(SDNode *N) {
493 if (N->getValueType(0) == MVT::Flag)
494 return true; // Never CSE anything that produces a flag.
496 switch (N->getOpcode()) {
498 case ISD::HANDLENODE:
500 return true; // Never CSE these nodes.
503 // Check that remaining values produced are not flags.
504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
505 if (N->getValueType(i) == MVT::Flag)
506 return true; // Never CSE anything that produces a flag.
511 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
513 void SelectionDAG::RemoveDeadNodes() {
514 // Create a dummy node (which is not added to allnodes), that adds a reference
515 // to the root node, preventing it from being deleted.
516 HandleSDNode Dummy(getRoot());
518 SmallVector<SDNode*, 128> DeadNodes;
520 // Add all obviously-dead nodes to the DeadNodes worklist.
521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
523 DeadNodes.push_back(I);
525 RemoveDeadNodes(DeadNodes);
527 // If the root changed (e.g. it was a dead load, update the root).
528 setRoot(Dummy.getValue());
531 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
532 /// given list, and any nodes that become unreachable as a result.
533 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
534 DAGUpdateListener *UpdateListener) {
536 // Process the worklist, deleting the nodes and adding their uses to the
538 while (!DeadNodes.empty()) {
539 SDNode *N = DeadNodes.pop_back_val();
542 UpdateListener->NodeDeleted(N, 0);
544 // Take the node out of the appropriate CSE map.
545 RemoveNodeFromCSEMaps(N);
547 // Next, brutally remove the operand list. This is safe to do, as there are
548 // no cycles in the graph.
549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
551 SDNode *Operand = Use.getNode();
554 // Now that we removed this operand, see if there are no uses of it left.
555 if (Operand->use_empty())
556 DeadNodes.push_back(Operand);
563 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
564 SmallVector<SDNode*, 16> DeadNodes(1, N);
565 RemoveDeadNodes(DeadNodes, UpdateListener);
568 void SelectionDAG::DeleteNode(SDNode *N) {
569 // First take this out of the appropriate CSE map.
570 RemoveNodeFromCSEMaps(N);
572 // Finally, remove uses due to operands of this node, remove from the
573 // AllNodes list, and delete the node.
574 DeleteNodeNotInCSEMaps(N);
577 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
578 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
579 assert(N->use_empty() && "Cannot delete a node that is not dead!");
581 // Drop all of the operands and decrement used node's use counts.
587 void SelectionDAG::DeallocateNode(SDNode *N) {
588 if (N->OperandsNeedDelete)
589 delete[] N->OperandList;
591 // Set the opcode to DELETED_NODE to help catch bugs when node
592 // memory is reallocated.
593 N->NodeType = ISD::DELETED_NODE;
595 NodeAllocator.Deallocate(AllNodes.remove(N));
597 // Remove the ordering of this node.
601 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
602 /// correspond to it. This is useful when we're about to delete or repurpose
603 /// the node. We don't want future request for structurally identical nodes
604 /// to return N anymore.
605 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
607 switch (N->getOpcode()) {
608 case ISD::EntryToken:
609 llvm_unreachable("EntryToken should not be in CSEMaps!");
611 case ISD::HANDLENODE: return false; // noop.
613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
614 "Cond code doesn't exist!");
615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
618 case ISD::ExternalSymbol:
619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
621 case ISD::TargetExternalSymbol: {
622 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
623 Erased = TargetExternalSymbols.erase(
624 std::pair<std::string,unsigned char>(ESN->getSymbol(),
625 ESN->getTargetFlags()));
628 case ISD::VALUETYPE: {
629 EVT VT = cast<VTSDNode>(N)->getVT();
630 if (VT.isExtended()) {
631 Erased = ExtendedValueTypeNodes.erase(VT);
633 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
634 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
639 // Remove it from the CSE Map.
640 Erased = CSEMap.RemoveNode(N);
644 // Verify that the node was actually in one of the CSE maps, unless it has a
645 // flag result (which cannot be CSE'd) or is one of the special cases that are
646 // not subject to CSE.
647 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
648 !N->isMachineOpcode() && !doNotCSE(N)) {
651 llvm_unreachable("Node is not in map!");
657 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
658 /// maps and modified in place. Add it back to the CSE maps, unless an identical
659 /// node already exists, in which case transfer all its users to the existing
660 /// node. This transfer can potentially trigger recursive merging.
663 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
664 DAGUpdateListener *UpdateListener) {
665 // For node types that aren't CSE'd, just act as if no identical node
668 SDNode *Existing = CSEMap.GetOrInsertNode(N);
670 // If there was already an existing matching node, use ReplaceAllUsesWith
671 // to replace the dead one with the existing one. This can cause
672 // recursive merging of other unrelated nodes down the line.
673 ReplaceAllUsesWith(N, Existing, UpdateListener);
675 // N is now dead. Inform the listener if it exists and delete it.
677 UpdateListener->NodeDeleted(N, Existing);
678 DeleteNodeNotInCSEMaps(N);
683 // If the node doesn't already exist, we updated it. Inform a listener if
686 UpdateListener->NodeUpdated(N);
689 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
690 /// were replaced with those specified. If this node is never memoized,
691 /// return null, otherwise return a pointer to the slot it would take. If a
692 /// node already exists with these operands, the slot will be non-null.
693 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
698 SDValue Ops[] = { Op };
700 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
701 AddNodeIDCustom(ID, N);
702 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
706 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
707 /// were replaced with those specified. If this node is never memoized,
708 /// return null, otherwise return a pointer to the slot it would take. If a
709 /// node already exists with these operands, the slot will be non-null.
710 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
711 SDValue Op1, SDValue Op2,
716 SDValue Ops[] = { Op1, Op2 };
718 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
719 AddNodeIDCustom(ID, N);
720 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
742 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
743 void SelectionDAG::VerifyNode(SDNode *N) {
744 switch (N->getOpcode()) {
747 case ISD::BUILD_PAIR: {
748 EVT VT = N->getValueType(0);
749 assert(N->getNumValues() == 1 && "Too many results!");
750 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
751 "Wrong return type!");
752 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
753 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
754 "Mismatched operand types!");
755 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
756 "Wrong operand type!");
757 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
758 "Wrong return type size");
761 case ISD::BUILD_VECTOR: {
762 assert(N->getNumValues() == 1 && "Too many results!");
763 assert(N->getValueType(0).isVector() && "Wrong return type!");
764 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
765 "Wrong number of operands!");
766 EVT EltVT = N->getValueType(0).getVectorElementType();
767 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
768 assert((I->getValueType() == EltVT ||
769 (EltVT.isInteger() && I->getValueType().isInteger() &&
770 EltVT.bitsLE(I->getValueType()))) &&
771 "Wrong operand type!");
777 /// getEVTAlignment - Compute the default alignment value for the
780 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
781 const Type *Ty = VT == MVT::iPTR ?
782 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
783 VT.getTypeForEVT(*getContext());
785 return TLI.getTargetData()->getABITypeAlignment(Ty);
788 // EntryNode could meaningfully have debug info if we can find it...
789 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
790 : TLI(tli), FLI(fli), DW(0),
791 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
792 getVTList(MVT::Other)),
793 Root(getEntryNode()), Ordering(0) {
794 AllNodes.push_back(&EntryNode);
795 Ordering = new SDNodeOrdering();
798 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
803 Context = &mf.getFunction()->getContext();
806 SelectionDAG::~SelectionDAG() {
811 void SelectionDAG::allnodes_clear() {
812 assert(&*AllNodes.begin() == &EntryNode);
813 AllNodes.remove(AllNodes.begin());
814 while (!AllNodes.empty())
815 DeallocateNode(AllNodes.begin());
818 void SelectionDAG::clear() {
820 OperandAllocator.Reset();
823 ExtendedValueTypeNodes.clear();
824 ExternalSymbols.clear();
825 TargetExternalSymbols.clear();
826 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
827 static_cast<CondCodeSDNode*>(0));
828 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
829 static_cast<SDNode*>(0));
831 EntryNode.UseList = 0;
832 AllNodes.push_back(&EntryNode);
833 Root = getEntryNode();
835 Ordering = new SDNodeOrdering();
838 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
839 return VT.bitsGT(Op.getValueType()) ?
840 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
841 getNode(ISD::TRUNCATE, DL, VT, Op);
844 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
845 return VT.bitsGT(Op.getValueType()) ?
846 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
847 getNode(ISD::TRUNCATE, DL, VT, Op);
850 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
851 assert(!VT.isVector() &&
852 "getZeroExtendInReg should use the vector element type instead of "
854 if (Op.getValueType() == VT) return Op;
855 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
856 APInt Imm = APInt::getLowBitsSet(BitWidth,
858 return getNode(ISD::AND, DL, Op.getValueType(), Op,
859 getConstant(Imm, Op.getValueType()));
862 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
864 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
865 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
867 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
868 return getNode(ISD::XOR, DL, VT, Val, NegOne);
871 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
872 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
873 assert((EltVT.getSizeInBits() >= 64 ||
874 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
875 "getConstant with a uint64_t value that doesn't fit in the type!");
876 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
879 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
880 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
883 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
884 assert(VT.isInteger() && "Cannot create FP integer constant!");
886 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
887 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
888 "APInt size does not match type size!");
890 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
892 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
896 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
898 return SDValue(N, 0);
901 N = NodeAllocator.Allocate<ConstantSDNode>();
902 new (N) ConstantSDNode(isT, &Val, EltVT);
903 CSEMap.InsertNode(N, IP);
904 AllNodes.push_back(N);
907 SDValue Result(N, 0);
909 SmallVector<SDValue, 8> Ops;
910 Ops.assign(VT.getVectorNumElements(), Result);
911 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
912 VT, &Ops[0], Ops.size());
917 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
918 return getConstant(Val, TLI.getPointerTy(), isTarget);
922 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
926 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
930 VT.isVector() ? VT.getVectorElementType() : VT;
932 // Do the map lookup using the actual bit pattern for the floating point
933 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
934 // we don't have issues with SNANs.
935 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
937 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
941 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
943 return SDValue(N, 0);
946 N = NodeAllocator.Allocate<ConstantFPSDNode>();
947 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
948 CSEMap.InsertNode(N, IP);
949 AllNodes.push_back(N);
952 SDValue Result(N, 0);
954 SmallVector<SDValue, 8> Ops;
955 Ops.assign(VT.getVectorNumElements(), Result);
956 // FIXME DebugLoc info might be appropriate here
957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
958 VT, &Ops[0], Ops.size());
963 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
965 VT.isVector() ? VT.getVectorElementType() : VT;
967 return getConstantFP(APFloat((float)Val), VT, isTarget);
969 return getConstantFP(APFloat(Val), VT, isTarget);
972 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
973 EVT VT, int64_t Offset,
975 unsigned char TargetFlags) {
976 assert((TargetFlags == 0 || isTargetGA) &&
977 "Cannot set target flags on target-independent globals");
979 // Truncate (with sign-extension) the offset value to the pointer size.
980 EVT PTy = TLI.getPointerTy();
981 unsigned BitWidth = PTy.getSizeInBits();
983 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
985 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
987 // If GV is an alias then use the aliasee for determining thread-localness.
988 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
989 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
993 if (GVar && GVar->isThreadLocal())
994 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
996 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1001 ID.AddInteger(Offset);
1002 ID.AddInteger(TargetFlags);
1004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1005 return SDValue(E, 0);
1007 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1008 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1009 CSEMap.InsertNode(N, IP);
1010 AllNodes.push_back(N);
1011 return SDValue(N, 0);
1014 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1015 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1016 FoldingSetNodeID ID;
1017 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1021 return SDValue(E, 0);
1023 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1024 new (N) FrameIndexSDNode(FI, VT, isTarget);
1025 CSEMap.InsertNode(N, IP);
1026 AllNodes.push_back(N);
1027 return SDValue(N, 0);
1030 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1031 unsigned char TargetFlags) {
1032 assert((TargetFlags == 0 || isTarget) &&
1033 "Cannot set target flags on target-independent jump tables");
1034 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1035 FoldingSetNodeID ID;
1036 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1038 ID.AddInteger(TargetFlags);
1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1041 return SDValue(E, 0);
1043 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1044 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1045 CSEMap.InsertNode(N, IP);
1046 AllNodes.push_back(N);
1047 return SDValue(N, 0);
1050 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1051 unsigned Alignment, int Offset,
1053 unsigned char TargetFlags) {
1054 assert((TargetFlags == 0 || isTarget) &&
1055 "Cannot set target flags on target-independent globals");
1057 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1058 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1059 FoldingSetNodeID ID;
1060 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1061 ID.AddInteger(Alignment);
1062 ID.AddInteger(Offset);
1064 ID.AddInteger(TargetFlags);
1066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1067 return SDValue(E, 0);
1069 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1070 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1077 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1078 unsigned Alignment, int Offset,
1080 unsigned char TargetFlags) {
1081 assert((TargetFlags == 0 || isTarget) &&
1082 "Cannot set target flags on target-independent globals");
1084 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1085 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1086 FoldingSetNodeID ID;
1087 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1088 ID.AddInteger(Alignment);
1089 ID.AddInteger(Offset);
1090 C->AddSelectionDAGCSEId(ID);
1091 ID.AddInteger(TargetFlags);
1093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1094 return SDValue(E, 0);
1096 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1097 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1098 CSEMap.InsertNode(N, IP);
1099 AllNodes.push_back(N);
1100 return SDValue(N, 0);
1103 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1104 FoldingSetNodeID ID;
1105 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1109 return SDValue(E, 0);
1111 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1112 new (N) BasicBlockSDNode(MBB);
1113 CSEMap.InsertNode(N, IP);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getValueType(EVT VT) {
1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1120 ValueTypeNodes.size())
1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1123 SDNode *&N = VT.isExtended() ?
1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1126 if (N) return SDValue(N, 0);
1127 N = NodeAllocator.Allocate<VTSDNode>();
1128 new (N) VTSDNode(VT);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1134 SDNode *&N = ExternalSymbols[Sym];
1135 if (N) return SDValue(N, 0);
1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1137 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1138 AllNodes.push_back(N);
1139 return SDValue(N, 0);
1142 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1143 unsigned char TargetFlags) {
1145 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1147 if (N) return SDValue(N, 0);
1148 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1149 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1150 AllNodes.push_back(N);
1151 return SDValue(N, 0);
1154 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1155 if ((unsigned)Cond >= CondCodeNodes.size())
1156 CondCodeNodes.resize(Cond+1);
1158 if (CondCodeNodes[Cond] == 0) {
1159 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1160 new (N) CondCodeSDNode(Cond);
1161 CondCodeNodes[Cond] = N;
1162 AllNodes.push_back(N);
1165 return SDValue(CondCodeNodes[Cond], 0);
1168 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1169 // the shuffle mask M that point at N1 to point at N2, and indices that point
1170 // N2 to point at N1.
1171 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1173 int NElts = M.size();
1174 for (int i = 0; i != NElts; ++i) {
1182 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1183 SDValue N2, const int *Mask) {
1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1185 assert(VT.isVector() && N1.getValueType().isVector() &&
1186 "Vector Shuffle VTs must be a vectors");
1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1188 && "Vector Shuffle VTs must have same element type");
1190 // Canonicalize shuffle undef, undef -> undef
1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1192 return getUNDEF(VT);
1194 // Validate that all indices in Mask are within the range of the elements
1195 // input to the shuffle.
1196 unsigned NElts = VT.getVectorNumElements();
1197 SmallVector<int, 8> MaskVec;
1198 for (unsigned i = 0; i != NElts; ++i) {
1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1200 MaskVec.push_back(Mask[i]);
1203 // Canonicalize shuffle v, v -> v, undef
1206 for (unsigned i = 0; i != NElts; ++i)
1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1211 if (N1.getOpcode() == ISD::UNDEF)
1212 commuteShuffle(N1, N2, MaskVec);
1214 // Canonicalize all index into lhs, -> shuffle lhs, undef
1215 // Canonicalize all index into rhs, -> shuffle rhs, undef
1216 bool AllLHS = true, AllRHS = true;
1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1218 for (unsigned i = 0; i != NElts; ++i) {
1219 if (MaskVec[i] >= (int)NElts) {
1224 } else if (MaskVec[i] >= 0) {
1228 if (AllLHS && AllRHS)
1229 return getUNDEF(VT);
1230 if (AllLHS && !N2Undef)
1234 commuteShuffle(N1, N2, MaskVec);
1237 // If Identity shuffle, or all shuffle in to undef, return that node.
1238 bool AllUndef = true;
1239 bool Identity = true;
1240 for (unsigned i = 0; i != NElts; ++i) {
1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1242 if (MaskVec[i] >= 0) AllUndef = false;
1244 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1247 return getUNDEF(VT);
1249 FoldingSetNodeID ID;
1250 SDValue Ops[2] = { N1, N2 };
1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1252 for (unsigned i = 0; i != NElts; ++i)
1253 ID.AddInteger(MaskVec[i]);
1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1257 return SDValue(E, 0);
1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1260 // SDNode doesn't have access to it. This memory will be "leaked" when
1261 // the node is deallocated, but recovered when the NodeAllocator is released.
1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1265 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1266 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1267 CSEMap.InsertNode(N, IP);
1268 AllNodes.push_back(N);
1269 return SDValue(N, 0);
1272 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1273 SDValue Val, SDValue DTy,
1274 SDValue STy, SDValue Rnd, SDValue Sat,
1275 ISD::CvtCode Code) {
1276 // If the src and dest types are the same and the conversion is between
1277 // integer types of the same sign or two floats, no conversion is necessary.
1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1282 FoldingSetNodeID ID;
1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1287 return SDValue(E, 0);
1289 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1290 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1291 CSEMap.InsertNode(N, IP);
1292 AllNodes.push_back(N);
1293 return SDValue(N, 0);
1296 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1297 FoldingSetNodeID ID;
1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1299 ID.AddInteger(RegNo);
1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1302 return SDValue(E, 0);
1304 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1305 new (N) RegisterSDNode(RegNo, VT);
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1314 FoldingSetNodeID ID;
1315 SDValue Ops[] = { Root };
1316 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1317 ID.AddInteger(LabelID);
1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1323 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1324 CSEMap.InsertNode(N, IP);
1325 AllNodes.push_back(N);
1326 return SDValue(N, 0);
1329 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1331 unsigned char TargetFlags) {
1332 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1334 FoldingSetNodeID ID;
1335 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1337 ID.AddInteger(TargetFlags);
1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1340 return SDValue(E, 0);
1342 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1343 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getSrcValue(const Value *V) {
1350 assert((!V || V->getType()->isPointerTy()) &&
1351 "SrcValue is not a pointer?");
1353 FoldingSetNodeID ID;
1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1359 return SDValue(E, 0);
1361 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1362 new (N) SrcValueSDNode(V);
1363 CSEMap.InsertNode(N, IP);
1364 AllNodes.push_back(N);
1365 return SDValue(N, 0);
1368 /// getShiftAmountOperand - Return the specified value casted to
1369 /// the target's desired shift amount type.
1370 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1371 EVT OpTy = Op.getValueType();
1372 MVT ShTy = TLI.getShiftAmountTy();
1373 if (OpTy == ShTy || OpTy.isVector()) return Op;
1375 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1376 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1379 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1380 /// specified value type.
1381 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1382 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1383 unsigned ByteSize = VT.getStoreSize();
1384 const Type *Ty = VT.getTypeForEVT(*getContext());
1385 unsigned StackAlign =
1386 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1388 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1389 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1392 /// CreateStackTemporary - Create a stack temporary suitable for holding
1393 /// either of the specified value types.
1394 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1395 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1396 VT2.getStoreSizeInBits())/8;
1397 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1398 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1399 const TargetData *TD = TLI.getTargetData();
1400 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1401 TD->getPrefTypeAlignment(Ty2));
1403 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1404 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1405 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1408 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1409 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1410 // These setcc operations always fold.
1414 case ISD::SETFALSE2: return getConstant(0, VT);
1416 case ISD::SETTRUE2: return getConstant(1, VT);
1428 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1432 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1433 const APInt &C2 = N2C->getAPIntValue();
1434 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1435 const APInt &C1 = N1C->getAPIntValue();
1438 default: llvm_unreachable("Unknown integer setcc!");
1439 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1440 case ISD::SETNE: return getConstant(C1 != C2, VT);
1441 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1442 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1443 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1444 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1445 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1446 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1447 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1448 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1452 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1453 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1454 // No compile time operations on this type yet.
1455 if (N1C->getValueType(0) == MVT::ppcf128)
1458 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1461 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1462 return getUNDEF(VT);
1464 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1465 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1469 R==APFloat::cmpLessThan, VT);
1470 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1471 return getUNDEF(VT);
1473 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1474 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1475 return getUNDEF(VT);
1477 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1478 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1479 return getUNDEF(VT);
1481 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1482 R==APFloat::cmpEqual, VT);
1483 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1484 return getUNDEF(VT);
1486 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1487 R==APFloat::cmpEqual, VT);
1488 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1489 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1490 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1491 R==APFloat::cmpEqual, VT);
1492 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1493 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1494 R==APFloat::cmpLessThan, VT);
1495 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1496 R==APFloat::cmpUnordered, VT);
1497 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1498 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1501 // Ensure that the constant occurs on the RHS.
1502 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1506 // Could not fold it.
1510 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1511 /// use this predicate to simplify operations downstream.
1512 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1513 // This predicate is not safe for vector operations.
1514 if (Op.getValueType().isVector())
1517 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1518 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1521 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1522 /// this predicate to simplify operations downstream. Mask is known to be zero
1523 /// for bits that V cannot have.
1524 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1525 unsigned Depth) const {
1526 APInt KnownZero, KnownOne;
1527 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1528 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1529 return (KnownZero & Mask) == Mask;
1532 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1533 /// known to be either zero or one and return them in the KnownZero/KnownOne
1534 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1536 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1537 APInt &KnownZero, APInt &KnownOne,
1538 unsigned Depth) const {
1539 unsigned BitWidth = Mask.getBitWidth();
1540 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1541 "Mask size mismatches value type size!");
1543 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1544 if (Depth == 6 || Mask == 0)
1545 return; // Limit search depth.
1547 APInt KnownZero2, KnownOne2;
1549 switch (Op.getOpcode()) {
1551 // We know all of the bits for a constant!
1552 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1553 KnownZero = ~KnownOne & Mask;
1556 // If either the LHS or the RHS are Zero, the result is zero.
1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1559 KnownZero2, KnownOne2, Depth+1);
1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1563 // Output known-1 bits are only known if set in both the LHS & RHS.
1564 KnownOne &= KnownOne2;
1565 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1566 KnownZero |= KnownZero2;
1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1571 KnownZero2, KnownOne2, Depth+1);
1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1575 // Output known-0 bits are only known if clear in both the LHS & RHS.
1576 KnownZero &= KnownZero2;
1577 // Output known-1 are known to be set if set in either the LHS | RHS.
1578 KnownOne |= KnownOne2;
1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1582 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1583 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1584 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1586 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1587 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1588 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1589 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1590 KnownZero = KnownZeroOut;
1594 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1595 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1596 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1600 // If low bits are zero in either operand, output low known-0 bits.
1601 // Also compute a conserative estimate for high known-0 bits.
1602 // More trickiness is possible, but this is sufficient for the
1603 // interesting case of alignment computation.
1605 unsigned TrailZ = KnownZero.countTrailingOnes() +
1606 KnownZero2.countTrailingOnes();
1607 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1608 KnownZero2.countLeadingOnes(),
1609 BitWidth) - BitWidth;
1611 TrailZ = std::min(TrailZ, BitWidth);
1612 LeadZ = std::min(LeadZ, BitWidth);
1613 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1614 APInt::getHighBitsSet(BitWidth, LeadZ);
1619 // For the purposes of computing leading zeros we can conservatively
1620 // treat a udiv as a logical right shift by the power of 2 known to
1621 // be less than the denominator.
1622 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1623 ComputeMaskedBits(Op.getOperand(0),
1624 AllOnes, KnownZero2, KnownOne2, Depth+1);
1625 unsigned LeadZ = KnownZero2.countLeadingOnes();
1629 ComputeMaskedBits(Op.getOperand(1),
1630 AllOnes, KnownZero2, KnownOne2, Depth+1);
1631 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1632 if (RHSUnknownLeadingOnes != BitWidth)
1633 LeadZ = std::min(BitWidth,
1634 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1636 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1640 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1641 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1642 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1643 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1645 // Only known if known in both the LHS and RHS.
1646 KnownOne &= KnownOne2;
1647 KnownZero &= KnownZero2;
1649 case ISD::SELECT_CC:
1650 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1651 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1653 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1655 // Only known if known in both the LHS and RHS.
1656 KnownOne &= KnownOne2;
1657 KnownZero &= KnownZero2;
1665 if (Op.getResNo() != 1)
1667 // The boolean result conforms to getBooleanContents. Fall through.
1669 // If we know the result of a setcc has the top bits zero, use this info.
1670 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1672 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1675 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1676 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1677 unsigned ShAmt = SA->getZExtValue();
1679 // If the shift count is an invalid immediate, don't do anything.
1680 if (ShAmt >= BitWidth)
1683 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1684 KnownZero, KnownOne, Depth+1);
1685 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1686 KnownZero <<= ShAmt;
1688 // low bits known zero.
1689 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1693 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1694 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1695 unsigned ShAmt = SA->getZExtValue();
1697 // If the shift count is an invalid immediate, don't do anything.
1698 if (ShAmt >= BitWidth)
1701 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1702 KnownZero, KnownOne, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 KnownZero = KnownZero.lshr(ShAmt);
1705 KnownOne = KnownOne.lshr(ShAmt);
1707 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1708 KnownZero |= HighBits; // High bits known zero.
1712 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1713 unsigned ShAmt = SA->getZExtValue();
1715 // If the shift count is an invalid immediate, don't do anything.
1716 if (ShAmt >= BitWidth)
1719 APInt InDemandedMask = (Mask << ShAmt);
1720 // If any of the demanded bits are produced by the sign extension, we also
1721 // demand the input sign bit.
1722 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1723 if (HighBits.getBoolValue())
1724 InDemandedMask |= APInt::getSignBit(BitWidth);
1726 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1729 KnownZero = KnownZero.lshr(ShAmt);
1730 KnownOne = KnownOne.lshr(ShAmt);
1732 // Handle the sign bits.
1733 APInt SignBit = APInt::getSignBit(BitWidth);
1734 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1736 if (KnownZero.intersects(SignBit)) {
1737 KnownZero |= HighBits; // New bits are known zero.
1738 } else if (KnownOne.intersects(SignBit)) {
1739 KnownOne |= HighBits; // New bits are known one.
1743 case ISD::SIGN_EXTEND_INREG: {
1744 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1745 unsigned EBits = EVT.getScalarType().getSizeInBits();
1747 // Sign extension. Compute the demanded bits in the result that are not
1748 // present in the input.
1749 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1751 APInt InSignBit = APInt::getSignBit(EBits);
1752 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1754 // If the sign extended bits are demanded, we know that the sign
1756 InSignBit.zext(BitWidth);
1757 if (NewBits.getBoolValue())
1758 InputDemandedBits |= InSignBit;
1760 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1761 KnownZero, KnownOne, Depth+1);
1762 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1764 // If the sign bit of the input is known set or clear, then we know the
1765 // top bits of the result.
1766 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1767 KnownZero |= NewBits;
1768 KnownOne &= ~NewBits;
1769 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1770 KnownOne |= NewBits;
1771 KnownZero &= ~NewBits;
1772 } else { // Input sign bit unknown
1773 KnownZero &= ~NewBits;
1774 KnownOne &= ~NewBits;
1781 unsigned LowBits = Log2_32(BitWidth)+1;
1782 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1787 if (ISD::isZEXTLoad(Op.getNode())) {
1788 LoadSDNode *LD = cast<LoadSDNode>(Op);
1789 EVT VT = LD->getMemoryVT();
1790 unsigned MemBits = VT.getScalarType().getSizeInBits();
1791 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1795 case ISD::ZERO_EXTEND: {
1796 EVT InVT = Op.getOperand(0).getValueType();
1797 unsigned InBits = InVT.getScalarType().getSizeInBits();
1798 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1799 APInt InMask = Mask;
1800 InMask.trunc(InBits);
1801 KnownZero.trunc(InBits);
1802 KnownOne.trunc(InBits);
1803 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1804 KnownZero.zext(BitWidth);
1805 KnownOne.zext(BitWidth);
1806 KnownZero |= NewBits;
1809 case ISD::SIGN_EXTEND: {
1810 EVT InVT = Op.getOperand(0).getValueType();
1811 unsigned InBits = InVT.getScalarType().getSizeInBits();
1812 APInt InSignBit = APInt::getSignBit(InBits);
1813 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1814 APInt InMask = Mask;
1815 InMask.trunc(InBits);
1817 // If any of the sign extended bits are demanded, we know that the sign
1818 // bit is demanded. Temporarily set this bit in the mask for our callee.
1819 if (NewBits.getBoolValue())
1820 InMask |= InSignBit;
1822 KnownZero.trunc(InBits);
1823 KnownOne.trunc(InBits);
1824 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1826 // Note if the sign bit is known to be zero or one.
1827 bool SignBitKnownZero = KnownZero.isNegative();
1828 bool SignBitKnownOne = KnownOne.isNegative();
1829 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1830 "Sign bit can't be known to be both zero and one!");
1832 // If the sign bit wasn't actually demanded by our caller, we don't
1833 // want it set in the KnownZero and KnownOne result values. Reset the
1834 // mask and reapply it to the result values.
1836 InMask.trunc(InBits);
1837 KnownZero &= InMask;
1840 KnownZero.zext(BitWidth);
1841 KnownOne.zext(BitWidth);
1843 // If the sign bit is known zero or one, the top bits match.
1844 if (SignBitKnownZero)
1845 KnownZero |= NewBits;
1846 else if (SignBitKnownOne)
1847 KnownOne |= NewBits;
1850 case ISD::ANY_EXTEND: {
1851 EVT InVT = Op.getOperand(0).getValueType();
1852 unsigned InBits = InVT.getScalarType().getSizeInBits();
1853 APInt InMask = Mask;
1854 InMask.trunc(InBits);
1855 KnownZero.trunc(InBits);
1856 KnownOne.trunc(InBits);
1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1858 KnownZero.zext(BitWidth);
1859 KnownOne.zext(BitWidth);
1862 case ISD::TRUNCATE: {
1863 EVT InVT = Op.getOperand(0).getValueType();
1864 unsigned InBits = InVT.getScalarType().getSizeInBits();
1865 APInt InMask = Mask;
1866 InMask.zext(InBits);
1867 KnownZero.zext(InBits);
1868 KnownOne.zext(InBits);
1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1870 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1871 KnownZero.trunc(BitWidth);
1872 KnownOne.trunc(BitWidth);
1875 case ISD::AssertZext: {
1876 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1877 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1878 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1880 KnownZero |= (~InMask) & Mask;
1884 // All bits are zero except the low bit.
1885 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1889 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1890 // We know that the top bits of C-X are clear if X contains less bits
1891 // than C (i.e. no wrap-around can happen). For example, 20-X is
1892 // positive if we can prove that X is >= 0 and < 16.
1893 if (CLHS->getAPIntValue().isNonNegative()) {
1894 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1895 // NLZ can't be BitWidth with no sign bit
1896 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1897 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1900 // If all of the MaskV bits are known to be zero, then we know the
1901 // output top bits are zero, because we now know that the output is
1903 if ((KnownZero2 & MaskV) == MaskV) {
1904 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1905 // Top bits known zero.
1906 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1913 // Output known-0 bits are known if clear or set in both the low clear bits
1914 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1915 // low 3 bits clear.
1916 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1917 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1918 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1919 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1921 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1922 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1923 KnownZeroOut = std::min(KnownZeroOut,
1924 KnownZero2.countTrailingOnes());
1926 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1930 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1931 const APInt &RA = Rem->getAPIntValue().abs();
1932 if (RA.isPowerOf2()) {
1933 APInt LowBits = RA - 1;
1934 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1935 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1937 // The low bits of the first operand are unchanged by the srem.
1938 KnownZero = KnownZero2 & LowBits;
1939 KnownOne = KnownOne2 & LowBits;
1941 // If the first operand is non-negative or has all low bits zero, then
1942 // the upper bits are all zero.
1943 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1944 KnownZero |= ~LowBits;
1946 // If the first operand is negative and not all low bits are zero, then
1947 // the upper bits are all one.
1948 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1949 KnownOne |= ~LowBits;
1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1959 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1960 const APInt &RA = Rem->getAPIntValue();
1961 if (RA.isPowerOf2()) {
1962 APInt LowBits = (RA - 1);
1963 APInt Mask2 = LowBits & Mask;
1964 KnownZero |= ~LowBits & Mask;
1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1966 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1971 // Since the result is less than or equal to either operand, any leading
1972 // zero bits in either operand must also exist in the result.
1973 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1974 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1976 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1979 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1980 KnownZero2.countLeadingOnes());
1982 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1986 // Allow the target to implement this method for its nodes.
1987 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1988 case ISD::INTRINSIC_WO_CHAIN:
1989 case ISD::INTRINSIC_W_CHAIN:
1990 case ISD::INTRINSIC_VOID:
1991 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1998 /// ComputeNumSignBits - Return the number of times the sign bit of the
1999 /// register is replicated into the other bits. We know that at least 1 bit
2000 /// is always equal to the sign bit (itself), but other cases can give us
2001 /// information. For example, immediately after an "SRA X, 2", we know that
2002 /// the top 3 bits are all equal to each other, so we return 3.
2003 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2004 EVT VT = Op.getValueType();
2005 assert(VT.isInteger() && "Invalid VT!");
2006 unsigned VTBits = VT.getScalarType().getSizeInBits();
2008 unsigned FirstAnswer = 1;
2011 return 1; // Limit search depth.
2013 switch (Op.getOpcode()) {
2015 case ISD::AssertSext:
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2017 return VTBits-Tmp+1;
2018 case ISD::AssertZext:
2019 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2022 case ISD::Constant: {
2023 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2024 // If negative, return # leading ones.
2025 if (Val.isNegative())
2026 return Val.countLeadingOnes();
2028 // Return # leading zeros.
2029 return Val.countLeadingZeros();
2032 case ISD::SIGN_EXTEND:
2033 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2034 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2036 case ISD::SIGN_EXTEND_INREG:
2037 // Max of the input and what this extends.
2039 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2042 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2043 return std::max(Tmp, Tmp2);
2046 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2047 // SRA X, C -> adds C sign bits.
2048 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2049 Tmp += C->getZExtValue();
2050 if (Tmp > VTBits) Tmp = VTBits;
2054 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2055 // shl destroys sign bits.
2056 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2057 if (C->getZExtValue() >= VTBits || // Bad shift.
2058 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2059 return Tmp - C->getZExtValue();
2064 case ISD::XOR: // NOT is handled here.
2065 // Logical binary ops preserve the number of sign bits at the worst.
2066 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2068 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2069 FirstAnswer = std::min(Tmp, Tmp2);
2070 // We computed what we know about the sign bits as our first
2071 // answer. Now proceed to the generic code that uses
2072 // ComputeMaskedBits, and pick whichever answer is better.
2077 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2078 if (Tmp == 1) return 1; // Early out.
2079 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2080 return std::min(Tmp, Tmp2);
2088 if (Op.getResNo() != 1)
2090 // The boolean result conforms to getBooleanContents. Fall through.
2092 // If setcc returns 0/-1, all bits are sign bits.
2093 if (TLI.getBooleanContents() ==
2094 TargetLowering::ZeroOrNegativeOneBooleanContent)
2099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2100 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2102 // Handle rotate right by N like a rotate left by 32-N.
2103 if (Op.getOpcode() == ISD::ROTR)
2104 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2106 // If we aren't rotating out all of the known-in sign bits, return the
2107 // number that are left. This handles rotl(sext(x), 1) for example.
2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2109 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2113 // Add can have at most one carry bit. Thus we know that the output
2114 // is, at worst, one more bit than the inputs.
2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2116 if (Tmp == 1) return 1; // Early out.
2118 // Special case decrementing a value (ADD X, -1):
2119 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2120 if (CRHS->isAllOnesValue()) {
2121 APInt KnownZero, KnownOne;
2122 APInt Mask = APInt::getAllOnesValue(VTBits);
2123 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2125 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2127 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2130 // If we are subtracting one from a positive number, there is no carry
2131 // out of the result.
2132 if (KnownZero.isNegative())
2136 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2137 if (Tmp2 == 1) return 1;
2138 return std::min(Tmp, Tmp2)-1;
2142 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2143 if (Tmp2 == 1) return 1;
2146 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2147 if (CLHS->isNullValue()) {
2148 APInt KnownZero, KnownOne;
2149 APInt Mask = APInt::getAllOnesValue(VTBits);
2150 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2151 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2153 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2156 // If the input is known to be positive (the sign bit is known clear),
2157 // the output of the NEG has the same number of sign bits as the input.
2158 if (KnownZero.isNegative())
2161 // Otherwise, we treat this like a SUB.
2164 // Sub can have at most one carry bit. Thus we know that the output
2165 // is, at worst, one more bit than the inputs.
2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2167 if (Tmp == 1) return 1; // Early out.
2168 return std::min(Tmp, Tmp2)-1;
2171 // FIXME: it's tricky to do anything useful for this, but it is an important
2172 // case for targets like X86.
2176 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2177 if (Op.getOpcode() == ISD::LOAD) {
2178 LoadSDNode *LD = cast<LoadSDNode>(Op);
2179 unsigned ExtType = LD->getExtensionType();
2182 case ISD::SEXTLOAD: // '17' bits known
2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2184 return VTBits-Tmp+1;
2185 case ISD::ZEXTLOAD: // '16' bits known
2186 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2191 // Allow the target to implement this method for its nodes.
2192 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2193 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2194 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2195 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2196 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2197 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2200 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2201 // use this information.
2202 APInt KnownZero, KnownOne;
2203 APInt Mask = APInt::getAllOnesValue(VTBits);
2204 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2206 if (KnownZero.isNegative()) { // sign bit is 0
2208 } else if (KnownOne.isNegative()) { // sign bit is 1;
2215 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2216 // the number of identical bits in the top of the input value.
2218 Mask <<= Mask.getBitWidth()-VTBits;
2219 // Return # leading zeros. We use 'min' here in case Val was zero before
2220 // shifting. We don't want to return '64' as for an i32 "0".
2221 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2224 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2225 // If we're told that NaNs won't happen, assume they won't.
2226 if (FiniteOnlyFPMath())
2229 // If the value is a constant, we can obviously see if it is a NaN or not.
2230 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2231 return !C->getValueAPF().isNaN();
2233 // TODO: Recognize more cases here.
2238 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2239 // If the value is a constant, we can obviously see if it is a zero or not.
2240 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2241 return !C->isZero();
2243 // TODO: Recognize more cases here.
2248 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2249 // Check the obvious case.
2250 if (A == B) return true;
2252 // For for negative and positive zero.
2253 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2254 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2255 if (CA->isZero() && CB->isZero()) return true;
2257 // Otherwise they may not be equal.
2261 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2262 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2263 if (!GA) return false;
2264 if (GA->getOffset() != 0) return false;
2265 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2266 if (!GV) return false;
2267 MachineModuleInfo *MMI = getMachineModuleInfo();
2268 return MMI && MMI->hasDebugInfo();
2272 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2273 /// element of the result of the vector shuffle.
2274 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2276 EVT VT = N->getValueType(0);
2277 DebugLoc dl = N->getDebugLoc();
2278 if (N->getMaskElt(i) < 0)
2279 return getUNDEF(VT.getVectorElementType());
2280 unsigned Index = N->getMaskElt(i);
2281 unsigned NumElems = VT.getVectorNumElements();
2282 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2285 if (V.getOpcode() == ISD::BIT_CONVERT) {
2286 V = V.getOperand(0);
2287 EVT VVT = V.getValueType();
2288 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2291 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2292 return (Index == 0) ? V.getOperand(0)
2293 : getUNDEF(VT.getVectorElementType());
2294 if (V.getOpcode() == ISD::BUILD_VECTOR)
2295 return V.getOperand(Index);
2296 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2297 return getShuffleScalarElt(SVN, Index);
2302 /// getNode - Gets or creates the specified node.
2304 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2305 FoldingSetNodeID ID;
2306 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2309 return SDValue(E, 0);
2311 SDNode *N = NodeAllocator.Allocate<SDNode>();
2312 new (N) SDNode(Opcode, DL, getVTList(VT));
2313 CSEMap.InsertNode(N, IP);
2315 AllNodes.push_back(N);
2319 return SDValue(N, 0);
2322 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2323 EVT VT, SDValue Operand) {
2324 // Constant fold unary operations with an integer constant operand.
2325 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2326 const APInt &Val = C->getAPIntValue();
2327 unsigned BitWidth = VT.getSizeInBits();
2330 case ISD::SIGN_EXTEND:
2331 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2332 case ISD::ANY_EXTEND:
2333 case ISD::ZERO_EXTEND:
2335 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2336 case ISD::UINT_TO_FP:
2337 case ISD::SINT_TO_FP: {
2338 const uint64_t zero[] = {0, 0};
2339 // No compile time operations on this type.
2340 if (VT==MVT::ppcf128)
2342 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2343 (void)apf.convertFromAPInt(Val,
2344 Opcode==ISD::SINT_TO_FP,
2345 APFloat::rmNearestTiesToEven);
2346 return getConstantFP(apf, VT);
2348 case ISD::BIT_CONVERT:
2349 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2350 return getConstantFP(Val.bitsToFloat(), VT);
2351 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2352 return getConstantFP(Val.bitsToDouble(), VT);
2355 return getConstant(Val.byteSwap(), VT);
2357 return getConstant(Val.countPopulation(), VT);
2359 return getConstant(Val.countLeadingZeros(), VT);
2361 return getConstant(Val.countTrailingZeros(), VT);
2365 // Constant fold unary operations with a floating point constant operand.
2366 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2367 APFloat V = C->getValueAPF(); // make copy
2368 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2372 return getConstantFP(V, VT);
2375 return getConstantFP(V, VT);
2377 case ISD::FP_EXTEND: {
2379 // This can return overflow, underflow, or inexact; we don't care.
2380 // FIXME need to be more flexible about rounding mode.
2381 (void)V.convert(*EVTToAPFloatSemantics(VT),
2382 APFloat::rmNearestTiesToEven, &ignored);
2383 return getConstantFP(V, VT);
2385 case ISD::FP_TO_SINT:
2386 case ISD::FP_TO_UINT: {
2389 assert(integerPartWidth >= 64);
2390 // FIXME need to be more flexible about rounding mode.
2391 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2392 Opcode==ISD::FP_TO_SINT,
2393 APFloat::rmTowardZero, &ignored);
2394 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2396 APInt api(VT.getSizeInBits(), 2, x);
2397 return getConstant(api, VT);
2399 case ISD::BIT_CONVERT:
2400 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2401 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2402 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2403 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2409 unsigned OpOpcode = Operand.getNode()->getOpcode();
2411 case ISD::TokenFactor:
2412 case ISD::MERGE_VALUES:
2413 case ISD::CONCAT_VECTORS:
2414 return Operand; // Factor, merge or concat of one node? No need.
2415 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2416 case ISD::FP_EXTEND:
2417 assert(VT.isFloatingPoint() &&
2418 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2419 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2420 assert((!VT.isVector() ||
2421 VT.getVectorNumElements() ==
2422 Operand.getValueType().getVectorNumElements()) &&
2423 "Vector element count mismatch!");
2424 if (Operand.getOpcode() == ISD::UNDEF)
2425 return getUNDEF(VT);
2427 case ISD::SIGN_EXTEND:
2428 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2429 "Invalid SIGN_EXTEND!");
2430 if (Operand.getValueType() == VT) return Operand; // noop extension
2431 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2432 "Invalid sext node, dst < src!");
2433 assert((!VT.isVector() ||
2434 VT.getVectorNumElements() ==
2435 Operand.getValueType().getVectorNumElements()) &&
2436 "Vector element count mismatch!");
2437 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2438 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2440 case ISD::ZERO_EXTEND:
2441 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2442 "Invalid ZERO_EXTEND!");
2443 if (Operand.getValueType() == VT) return Operand; // noop extension
2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2445 "Invalid zext node, dst < src!");
2446 assert((!VT.isVector() ||
2447 VT.getVectorNumElements() ==
2448 Operand.getValueType().getVectorNumElements()) &&
2449 "Vector element count mismatch!");
2450 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2451 return getNode(ISD::ZERO_EXTEND, DL, VT,
2452 Operand.getNode()->getOperand(0));
2454 case ISD::ANY_EXTEND:
2455 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2456 "Invalid ANY_EXTEND!");
2457 if (Operand.getValueType() == VT) return Operand; // noop extension
2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2459 "Invalid anyext node, dst < src!");
2460 assert((!VT.isVector() ||
2461 VT.getVectorNumElements() ==
2462 Operand.getValueType().getVectorNumElements()) &&
2463 "Vector element count mismatch!");
2464 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2465 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2466 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2469 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2470 "Invalid TRUNCATE!");
2471 if (Operand.getValueType() == VT) return Operand; // noop truncate
2472 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2473 "Invalid truncate node, src < dst!");
2474 assert((!VT.isVector() ||
2475 VT.getVectorNumElements() ==
2476 Operand.getValueType().getVectorNumElements()) &&
2477 "Vector element count mismatch!");
2478 if (OpOpcode == ISD::TRUNCATE)
2479 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2480 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2481 OpOpcode == ISD::ANY_EXTEND) {
2482 // If the source is smaller than the dest, we still need an extend.
2483 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2484 .bitsLT(VT.getScalarType()))
2485 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2486 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2487 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2489 return Operand.getNode()->getOperand(0);
2492 case ISD::BIT_CONVERT:
2493 // Basic sanity checking.
2494 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2495 && "Cannot BIT_CONVERT between types of different sizes!");
2496 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2497 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2498 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2499 if (OpOpcode == ISD::UNDEF)
2500 return getUNDEF(VT);
2502 case ISD::SCALAR_TO_VECTOR:
2503 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2504 (VT.getVectorElementType() == Operand.getValueType() ||
2505 (VT.getVectorElementType().isInteger() &&
2506 Operand.getValueType().isInteger() &&
2507 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2508 "Illegal SCALAR_TO_VECTOR node!");
2509 if (OpOpcode == ISD::UNDEF)
2510 return getUNDEF(VT);
2511 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2512 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2513 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2514 Operand.getConstantOperandVal(1) == 0 &&
2515 Operand.getOperand(0).getValueType() == VT)
2516 return Operand.getOperand(0);
2519 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2520 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2521 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2522 Operand.getNode()->getOperand(0));
2523 if (OpOpcode == ISD::FNEG) // --X -> X
2524 return Operand.getNode()->getOperand(0);
2527 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2528 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2533 SDVTList VTs = getVTList(VT);
2534 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2535 FoldingSetNodeID ID;
2536 SDValue Ops[1] = { Operand };
2537 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2539 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2540 return SDValue(E, 0);
2542 N = NodeAllocator.Allocate<UnarySDNode>();
2543 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2544 CSEMap.InsertNode(N, IP);
2546 N = NodeAllocator.Allocate<UnarySDNode>();
2547 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2550 AllNodes.push_back(N);
2554 return SDValue(N, 0);
2557 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2559 ConstantSDNode *Cst1,
2560 ConstantSDNode *Cst2) {
2561 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2564 case ISD::ADD: return getConstant(C1 + C2, VT);
2565 case ISD::SUB: return getConstant(C1 - C2, VT);
2566 case ISD::MUL: return getConstant(C1 * C2, VT);
2568 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2571 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2574 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2577 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2579 case ISD::AND: return getConstant(C1 & C2, VT);
2580 case ISD::OR: return getConstant(C1 | C2, VT);
2581 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2582 case ISD::SHL: return getConstant(C1 << C2, VT);
2583 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2584 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2585 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2586 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2593 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2594 SDValue N1, SDValue N2) {
2595 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2596 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2599 case ISD::TokenFactor:
2600 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2601 N2.getValueType() == MVT::Other && "Invalid token factor!");
2602 // Fold trivial token factors.
2603 if (N1.getOpcode() == ISD::EntryToken) return N2;
2604 if (N2.getOpcode() == ISD::EntryToken) return N1;
2605 if (N1 == N2) return N1;
2607 case ISD::CONCAT_VECTORS:
2608 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2609 // one big BUILD_VECTOR.
2610 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2611 N2.getOpcode() == ISD::BUILD_VECTOR) {
2612 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2613 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2614 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2618 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2619 N1.getValueType() == VT && "Binary operator types must match!");
2620 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2621 // worth handling here.
2622 if (N2C && N2C->isNullValue())
2624 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2631 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2632 N1.getValueType() == VT && "Binary operator types must match!");
2633 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2634 // it's worth handling here.
2635 if (N2C && N2C->isNullValue())
2645 assert(VT.isInteger() && "This operator does not apply to FP types!");
2653 if (Opcode == ISD::FADD) {
2655 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2656 if (CFP->getValueAPF().isZero())
2659 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2660 if (CFP->getValueAPF().isZero())
2662 } else if (Opcode == ISD::FSUB) {
2664 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2665 if (CFP->getValueAPF().isZero())
2669 assert(N1.getValueType() == N2.getValueType() &&
2670 N1.getValueType() == VT && "Binary operator types must match!");
2672 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2673 assert(N1.getValueType() == VT &&
2674 N1.getValueType().isFloatingPoint() &&
2675 N2.getValueType().isFloatingPoint() &&
2676 "Invalid FCOPYSIGN!");
2683 assert(VT == N1.getValueType() &&
2684 "Shift operators return type must be the same as their first arg");
2685 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2686 "Shifts only work on integers");
2688 // Always fold shifts of i1 values so the code generator doesn't need to
2689 // handle them. Since we know the size of the shift has to be less than the
2690 // size of the value, the shift/rotate count is guaranteed to be zero.
2693 if (N2C && N2C->isNullValue())
2696 case ISD::FP_ROUND_INREG: {
2697 EVT EVT = cast<VTSDNode>(N2)->getVT();
2698 assert(VT == N1.getValueType() && "Not an inreg round!");
2699 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2700 "Cannot FP_ROUND_INREG integer types");
2701 assert(EVT.isVector() == VT.isVector() &&
2702 "FP_ROUND_INREG type should be vector iff the operand "
2704 assert((!EVT.isVector() ||
2705 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2706 "Vector element counts must match in FP_ROUND_INREG");
2707 assert(EVT.bitsLE(VT) && "Not rounding down!");
2708 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2712 assert(VT.isFloatingPoint() &&
2713 N1.getValueType().isFloatingPoint() &&
2714 VT.bitsLE(N1.getValueType()) &&
2715 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2716 if (N1.getValueType() == VT) return N1; // noop conversion.
2718 case ISD::AssertSext:
2719 case ISD::AssertZext: {
2720 EVT EVT = cast<VTSDNode>(N2)->getVT();
2721 assert(VT == N1.getValueType() && "Not an inreg extend!");
2722 assert(VT.isInteger() && EVT.isInteger() &&
2723 "Cannot *_EXTEND_INREG FP types");
2724 assert(!EVT.isVector() &&
2725 "AssertSExt/AssertZExt type should be the vector element type "
2726 "rather than the vector type!");
2727 assert(EVT.bitsLE(VT) && "Not extending!");
2728 if (VT == EVT) return N1; // noop assertion.
2731 case ISD::SIGN_EXTEND_INREG: {
2732 EVT EVT = cast<VTSDNode>(N2)->getVT();
2733 assert(VT == N1.getValueType() && "Not an inreg extend!");
2734 assert(VT.isInteger() && EVT.isInteger() &&
2735 "Cannot *_EXTEND_INREG FP types");
2736 assert(EVT.isVector() == VT.isVector() &&
2737 "SIGN_EXTEND_INREG type should be vector iff the operand "
2739 assert((!EVT.isVector() ||
2740 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2741 "Vector element counts must match in SIGN_EXTEND_INREG");
2742 assert(EVT.bitsLE(VT) && "Not extending!");
2743 if (EVT == VT) return N1; // Not actually extending
2746 APInt Val = N1C->getAPIntValue();
2747 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2748 Val <<= Val.getBitWidth()-FromBits;
2749 Val = Val.ashr(Val.getBitWidth()-FromBits);
2750 return getConstant(Val, VT);
2754 case ISD::EXTRACT_VECTOR_ELT:
2755 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2756 if (N1.getOpcode() == ISD::UNDEF)
2757 return getUNDEF(VT);
2759 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2760 // expanding copies of large vectors from registers.
2762 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2763 N1.getNumOperands() > 0) {
2765 N1.getOperand(0).getValueType().getVectorNumElements();
2766 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2767 N1.getOperand(N2C->getZExtValue() / Factor),
2768 getConstant(N2C->getZExtValue() % Factor,
2769 N2.getValueType()));
2772 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2773 // expanding large vector constants.
2774 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2775 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2776 EVT VEltTy = N1.getValueType().getVectorElementType();
2777 if (Elt.getValueType() != VEltTy) {
2778 // If the vector element type is not legal, the BUILD_VECTOR operands
2779 // are promoted and implicitly truncated. Make that explicit here.
2780 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2783 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2784 // result is implicitly extended.
2785 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2790 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2791 // operations are lowered to scalars.
2792 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2793 // If the indices are the same, return the inserted element else
2794 // if the indices are known different, extract the element from
2795 // the original vector.
2796 if (N1.getOperand(2) == N2) {
2797 if (VT == N1.getOperand(1).getValueType())
2798 return N1.getOperand(1);
2800 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2801 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2802 isa<ConstantSDNode>(N2))
2803 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2806 case ISD::EXTRACT_ELEMENT:
2807 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2808 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2809 (N1.getValueType().isInteger() == VT.isInteger()) &&
2810 "Wrong types for EXTRACT_ELEMENT!");
2812 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2813 // 64-bit integers into 32-bit parts. Instead of building the extract of
2814 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2815 if (N1.getOpcode() == ISD::BUILD_PAIR)
2816 return N1.getOperand(N2C->getZExtValue());
2818 // EXTRACT_ELEMENT of a constant int is also very common.
2819 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2820 unsigned ElementSize = VT.getSizeInBits();
2821 unsigned Shift = ElementSize * N2C->getZExtValue();
2822 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2823 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2826 case ISD::EXTRACT_SUBVECTOR:
2827 if (N1.getValueType() == VT) // Trivial extraction.
2834 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2835 if (SV.getNode()) return SV;
2836 } else { // Cannonicalize constant to RHS if commutative
2837 if (isCommutativeBinOp(Opcode)) {
2838 std::swap(N1C, N2C);
2844 // Constant fold FP operations.
2845 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2846 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2848 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2849 // Cannonicalize constant to RHS if commutative
2850 std::swap(N1CFP, N2CFP);
2852 } else if (N2CFP && VT != MVT::ppcf128) {
2853 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2854 APFloat::opStatus s;
2857 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2858 if (s != APFloat::opInvalidOp)
2859 return getConstantFP(V1, VT);
2862 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2863 if (s!=APFloat::opInvalidOp)
2864 return getConstantFP(V1, VT);
2867 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2868 if (s!=APFloat::opInvalidOp)
2869 return getConstantFP(V1, VT);
2872 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2873 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2874 return getConstantFP(V1, VT);
2877 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2878 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2879 return getConstantFP(V1, VT);
2881 case ISD::FCOPYSIGN:
2883 return getConstantFP(V1, VT);
2889 // Canonicalize an UNDEF to the RHS, even over a constant.
2890 if (N1.getOpcode() == ISD::UNDEF) {
2891 if (isCommutativeBinOp(Opcode)) {
2895 case ISD::FP_ROUND_INREG:
2896 case ISD::SIGN_EXTEND_INREG:
2902 return N1; // fold op(undef, arg2) -> undef
2910 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2911 // For vectors, we can't easily build an all zero vector, just return
2918 // Fold a bunch of operators when the RHS is undef.
2919 if (N2.getOpcode() == ISD::UNDEF) {
2922 if (N1.getOpcode() == ISD::UNDEF)
2923 // Handle undef ^ undef -> 0 special case. This is a common
2925 return getConstant(0, VT);
2935 return N2; // fold op(arg1, undef) -> undef
2949 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2950 // For vectors, we can't easily build an all zero vector, just return
2955 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2956 // For vectors, we can't easily build an all one vector, just return
2964 // Memoize this node if possible.
2966 SDVTList VTs = getVTList(VT);
2967 if (VT != MVT::Flag) {
2968 SDValue Ops[] = { N1, N2 };
2969 FoldingSetNodeID ID;
2970 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2973 return SDValue(E, 0);
2975 N = NodeAllocator.Allocate<BinarySDNode>();
2976 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2977 CSEMap.InsertNode(N, IP);
2979 N = NodeAllocator.Allocate<BinarySDNode>();
2980 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2983 AllNodes.push_back(N);
2987 return SDValue(N, 0);
2990 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2991 SDValue N1, SDValue N2, SDValue N3) {
2992 // Perform various simplifications.
2993 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2994 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2996 case ISD::CONCAT_VECTORS:
2997 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2998 // one big BUILD_VECTOR.
2999 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3000 N2.getOpcode() == ISD::BUILD_VECTOR &&
3001 N3.getOpcode() == ISD::BUILD_VECTOR) {
3002 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
3003 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
3004 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
3005 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3009 // Use FoldSetCC to simplify SETCC's.
3010 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3011 if (Simp.getNode()) return Simp;
3016 if (N1C->getZExtValue())
3017 return N2; // select true, X, Y -> X
3019 return N3; // select false, X, Y -> Y
3022 if (N2 == N3) return N2; // select C, X, X -> X
3026 if (N2C->getZExtValue()) // Unconditional branch
3027 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3029 return N1; // Never-taken branch
3032 case ISD::VECTOR_SHUFFLE:
3033 llvm_unreachable("should use getVectorShuffle constructor!");
3035 case ISD::BIT_CONVERT:
3036 // Fold bit_convert nodes from a type to themselves.
3037 if (N1.getValueType() == VT)
3042 // Memoize node if it doesn't produce a flag.
3044 SDVTList VTs = getVTList(VT);
3045 if (VT != MVT::Flag) {
3046 SDValue Ops[] = { N1, N2, N3 };
3047 FoldingSetNodeID ID;
3048 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3051 return SDValue(E, 0);
3053 N = NodeAllocator.Allocate<TernarySDNode>();
3054 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3055 CSEMap.InsertNode(N, IP);
3057 N = NodeAllocator.Allocate<TernarySDNode>();
3058 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3061 AllNodes.push_back(N);
3065 return SDValue(N, 0);
3068 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3069 SDValue N1, SDValue N2, SDValue N3,
3071 SDValue Ops[] = { N1, N2, N3, N4 };
3072 return getNode(Opcode, DL, VT, Ops, 4);
3075 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3076 SDValue N1, SDValue N2, SDValue N3,
3077 SDValue N4, SDValue N5) {
3078 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3079 return getNode(Opcode, DL, VT, Ops, 5);
3082 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3083 /// the incoming stack arguments to be loaded from the stack.
3084 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3085 SmallVector<SDValue, 8> ArgChains;
3087 // Include the original chain at the beginning of the list. When this is
3088 // used by target LowerCall hooks, this helps legalize find the
3089 // CALLSEQ_BEGIN node.
3090 ArgChains.push_back(Chain);
3092 // Add a chain value for each stack argument.
3093 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3094 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3095 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3096 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3097 if (FI->getIndex() < 0)
3098 ArgChains.push_back(SDValue(L, 1));
3100 // Build a tokenfactor for all the chains.
3101 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3102 &ArgChains[0], ArgChains.size());
3105 /// getMemsetValue - Vectorized representation of the memset value
3107 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3109 unsigned NumBits = VT.isVector() ?
3110 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3111 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3112 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3114 for (unsigned i = NumBits; i > 8; i >>= 1) {
3115 Val = (Val << Shift) | Val;
3119 return DAG.getConstant(Val, VT);
3120 return DAG.getConstantFP(APFloat(Val), VT);
3123 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3124 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3126 for (unsigned i = NumBits; i > 8; i >>= 1) {
3127 Value = DAG.getNode(ISD::OR, dl, VT,
3128 DAG.getNode(ISD::SHL, dl, VT, Value,
3129 DAG.getConstant(Shift,
3130 TLI.getShiftAmountTy())),
3138 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3139 /// used when a memcpy is turned into a memset when the source is a constant
3141 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3142 const TargetLowering &TLI,
3143 std::string &Str, unsigned Offset) {
3144 // Handle vector with all elements zero.
3147 return DAG.getConstant(0, VT);
3148 unsigned NumElts = VT.getVectorNumElements();
3149 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3150 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3152 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3155 assert(!VT.isVector() && "Can't handle vector type here!");
3156 unsigned NumBits = VT.getSizeInBits();
3157 unsigned MSB = NumBits / 8;
3159 if (TLI.isLittleEndian())
3160 Offset = Offset + MSB - 1;
3161 for (unsigned i = 0; i != MSB; ++i) {
3162 Val = (Val << 8) | (unsigned char)Str[Offset];
3163 Offset += TLI.isLittleEndian() ? -1 : 1;
3165 return DAG.getConstant(Val, VT);
3168 /// getMemBasePlusOffset - Returns base and offset node for the
3170 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3171 SelectionDAG &DAG) {
3172 EVT VT = Base.getValueType();
3173 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3174 VT, Base, DAG.getConstant(Offset, VT));
3177 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3179 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3180 unsigned SrcDelta = 0;
3181 GlobalAddressSDNode *G = NULL;
3182 if (Src.getOpcode() == ISD::GlobalAddress)
3183 G = cast<GlobalAddressSDNode>(Src);
3184 else if (Src.getOpcode() == ISD::ADD &&
3185 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3186 Src.getOperand(1).getOpcode() == ISD::Constant) {
3187 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3188 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3193 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3194 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3200 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3201 /// to replace the memset / memcpy is below the threshold. It also returns the
3202 /// types of the sequence of memory ops to perform memset / memcpy.
3204 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3205 SDValue Dst, SDValue Src,
3206 unsigned Limit, uint64_t Size, unsigned &Align,
3207 std::string &Str, bool &isSrcStr,
3209 const TargetLowering &TLI) {
3210 isSrcStr = isMemSrcFromString(Src, Str);
3211 bool isSrcConst = isa<ConstantSDNode>(Src);
3212 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3213 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3214 if (VT != MVT::iAny) {
3215 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3216 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3217 // If source is a string constant, this will require an unaligned load.
3218 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3219 if (Dst.getOpcode() != ISD::FrameIndex) {
3220 // Can't change destination alignment. It requires a unaligned store.
3224 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3225 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3226 if (MFI->isFixedObjectIndex(FI)) {
3227 // Can't change destination alignment. It requires a unaligned store.
3231 // Give the stack frame object a larger alignment if needed.
3232 if (MFI->getObjectAlignment(FI) < NewAlign)
3233 MFI->setObjectAlignment(FI, NewAlign);
3240 if (VT == MVT::iAny) {
3241 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3244 switch (Align & 7) {
3245 case 0: VT = MVT::i64; break;
3246 case 4: VT = MVT::i32; break;
3247 case 2: VT = MVT::i16; break;
3248 default: VT = MVT::i8; break;
3253 while (!TLI.isTypeLegal(LVT))
3254 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3255 assert(LVT.isInteger());
3261 unsigned NumMemOps = 0;
3263 unsigned VTSize = VT.getSizeInBits() / 8;
3264 while (VTSize > Size) {
3265 // For now, only use non-vector load / store's for the left-over pieces.
3266 if (VT.isVector()) {
3268 while (!TLI.isTypeLegal(VT))
3269 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3270 VTSize = VT.getSizeInBits() / 8;
3272 // This can result in a type that is not legal on the target, e.g.
3273 // 1 or 2 bytes on PPC.
3274 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3279 if (++NumMemOps > Limit)
3281 MemOps.push_back(VT);
3288 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3289 SDValue Chain, SDValue Dst,
3290 SDValue Src, uint64_t Size,
3291 unsigned Align, bool AlwaysInline,
3292 const Value *DstSV, uint64_t DstSVOff,
3293 const Value *SrcSV, uint64_t SrcSVOff){
3294 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3296 // Expand memcpy to a series of load and store ops if the size operand falls
3297 // below a certain threshold.
3298 std::vector<EVT> MemOps;
3299 uint64_t Limit = -1ULL;
3301 Limit = TLI.getMaxStoresPerMemcpy();
3302 unsigned DstAlign = Align; // Destination alignment can change.
3305 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3306 Str, CopyFromStr, DAG, TLI))
3310 bool isZeroStr = CopyFromStr && Str.empty();
3311 SmallVector<SDValue, 8> OutChains;
3312 unsigned NumMemOps = MemOps.size();
3313 uint64_t SrcOff = 0, DstOff = 0;
3314 for (unsigned i = 0; i != NumMemOps; ++i) {
3316 unsigned VTSize = VT.getSizeInBits() / 8;
3317 SDValue Value, Store;
3319 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3320 // It's unlikely a store of a vector immediate can be done in a single
3321 // instruction. It would require a load from a constantpool first.
3322 // We also handle store a vector with all zero's.
3323 // FIXME: Handle other cases where store of vector immediate is done in
3324 // a single instruction.
3325 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3326 Store = DAG.getStore(Chain, dl, Value,
3327 getMemBasePlusOffset(Dst, DstOff, DAG),
3328 DstSV, DstSVOff + DstOff, false, false, DstAlign);
3330 // The type might not be legal for the target. This should only happen
3331 // if the type is smaller than a legal type, as on PPC, so the right
3332 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3333 // to Load/Store if NVT==VT.
3334 // FIXME does the case above also need this?
3335 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3336 assert(NVT.bitsGE(VT));
3337 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3338 getMemBasePlusOffset(Src, SrcOff, DAG),
3339 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align);
3340 Store = DAG.getTruncStore(Chain, dl, Value,
3341 getMemBasePlusOffset(Dst, DstOff, DAG),
3342 DstSV, DstSVOff + DstOff, VT, false, false,
3345 OutChains.push_back(Store);
3350 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3351 &OutChains[0], OutChains.size());
3354 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3355 SDValue Chain, SDValue Dst,
3356 SDValue Src, uint64_t Size,
3357 unsigned Align, bool AlwaysInline,
3358 const Value *DstSV, uint64_t DstSVOff,
3359 const Value *SrcSV, uint64_t SrcSVOff){
3360 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3362 // Expand memmove to a series of load and store ops if the size operand falls
3363 // below a certain threshold.
3364 std::vector<EVT> MemOps;
3365 uint64_t Limit = -1ULL;
3367 Limit = TLI.getMaxStoresPerMemmove();
3368 unsigned DstAlign = Align; // Destination alignment can change.
3371 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3372 Str, CopyFromStr, DAG, TLI))
3375 uint64_t SrcOff = 0, DstOff = 0;
3377 SmallVector<SDValue, 8> LoadValues;
3378 SmallVector<SDValue, 8> LoadChains;
3379 SmallVector<SDValue, 8> OutChains;
3380 unsigned NumMemOps = MemOps.size();
3381 for (unsigned i = 0; i < NumMemOps; i++) {
3383 unsigned VTSize = VT.getSizeInBits() / 8;
3384 SDValue Value, Store;
3386 Value = DAG.getLoad(VT, dl, Chain,
3387 getMemBasePlusOffset(Src, SrcOff, DAG),
3388 SrcSV, SrcSVOff + SrcOff, false, false, Align);
3389 LoadValues.push_back(Value);
3390 LoadChains.push_back(Value.getValue(1));
3393 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3394 &LoadChains[0], LoadChains.size());
3396 for (unsigned i = 0; i < NumMemOps; i++) {
3398 unsigned VTSize = VT.getSizeInBits() / 8;
3399 SDValue Value, Store;
3401 Store = DAG.getStore(Chain, dl, LoadValues[i],
3402 getMemBasePlusOffset(Dst, DstOff, DAG),
3403 DstSV, DstSVOff + DstOff, false, false, DstAlign);
3404 OutChains.push_back(Store);
3408 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3409 &OutChains[0], OutChains.size());
3412 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3413 SDValue Chain, SDValue Dst,
3414 SDValue Src, uint64_t Size,
3416 const Value *DstSV, uint64_t DstSVOff) {
3417 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3419 // Expand memset to a series of load/store ops if the size operand
3420 // falls below a certain threshold.
3421 std::vector<EVT> MemOps;
3424 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3425 Size, Align, Str, CopyFromStr, DAG, TLI))
3428 SmallVector<SDValue, 8> OutChains;
3429 uint64_t DstOff = 0;
3431 unsigned NumMemOps = MemOps.size();
3432 for (unsigned i = 0; i < NumMemOps; i++) {
3434 unsigned VTSize = VT.getSizeInBits() / 8;
3435 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3436 SDValue Store = DAG.getStore(Chain, dl, Value,
3437 getMemBasePlusOffset(Dst, DstOff, DAG),
3438 DstSV, DstSVOff + DstOff, false, false, 0);
3439 OutChains.push_back(Store);
3443 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3444 &OutChains[0], OutChains.size());
3447 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3448 SDValue Src, SDValue Size,
3449 unsigned Align, bool AlwaysInline,
3450 const Value *DstSV, uint64_t DstSVOff,
3451 const Value *SrcSV, uint64_t SrcSVOff) {
3453 // Check to see if we should lower the memcpy to loads and stores first.
3454 // For cases within the target-specified limits, this is the best choice.
3455 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3457 // Memcpy with size zero? Just return the original chain.
3458 if (ConstantSize->isNullValue())
3462 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3463 ConstantSize->getZExtValue(),
3464 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3465 if (Result.getNode())
3469 // Then check to see if we should lower the memcpy with target-specific
3470 // code. If the target chooses to do this, this is the next best.
3472 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3474 DstSV, DstSVOff, SrcSV, SrcSVOff);
3475 if (Result.getNode())
3478 // If we really need inline code and the target declined to provide it,
3479 // use a (potentially long) sequence of loads and stores.
3481 assert(ConstantSize && "AlwaysInline requires a constant size!");
3482 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3483 ConstantSize->getZExtValue(), Align, true,
3484 DstSV, DstSVOff, SrcSV, SrcSVOff);
3487 // Emit a library call.
3488 TargetLowering::ArgListTy Args;
3489 TargetLowering::ArgListEntry Entry;
3490 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3491 Entry.Node = Dst; Args.push_back(Entry);
3492 Entry.Node = Src; Args.push_back(Entry);
3493 Entry.Node = Size; Args.push_back(Entry);
3494 // FIXME: pass in DebugLoc
3495 std::pair<SDValue,SDValue> CallResult =
3496 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3497 false, false, false, false, 0,
3498 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3499 /*isReturnValueUsed=*/false,
3500 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3501 TLI.getPointerTy()),
3502 Args, *this, dl, GetOrdering(Chain.getNode()));
3503 return CallResult.second;
3506 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3507 SDValue Src, SDValue Size,
3509 const Value *DstSV, uint64_t DstSVOff,
3510 const Value *SrcSV, uint64_t SrcSVOff) {
3512 // Check to see if we should lower the memmove to loads and stores first.
3513 // For cases within the target-specified limits, this is the best choice.
3514 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3516 // Memmove with size zero? Just return the original chain.
3517 if (ConstantSize->isNullValue())
3521 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3522 ConstantSize->getZExtValue(),
3523 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3524 if (Result.getNode())
3528 // Then check to see if we should lower the memmove with target-specific
3529 // code. If the target chooses to do this, this is the next best.
3531 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3532 DstSV, DstSVOff, SrcSV, SrcSVOff);
3533 if (Result.getNode())
3536 // Emit a library call.
3537 TargetLowering::ArgListTy Args;
3538 TargetLowering::ArgListEntry Entry;
3539 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3540 Entry.Node = Dst; Args.push_back(Entry);
3541 Entry.Node = Src; Args.push_back(Entry);
3542 Entry.Node = Size; Args.push_back(Entry);
3543 // FIXME: pass in DebugLoc
3544 std::pair<SDValue,SDValue> CallResult =
3545 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3546 false, false, false, false, 0,
3547 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3548 /*isReturnValueUsed=*/false,
3549 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3550 TLI.getPointerTy()),
3551 Args, *this, dl, GetOrdering(Chain.getNode()));
3552 return CallResult.second;
3555 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3556 SDValue Src, SDValue Size,
3558 const Value *DstSV, uint64_t DstSVOff) {
3560 // Check to see if we should lower the memset to stores first.
3561 // For cases within the target-specified limits, this is the best choice.
3562 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3564 // Memset with size zero? Just return the original chain.
3565 if (ConstantSize->isNullValue())
3569 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3570 Align, DstSV, DstSVOff);
3571 if (Result.getNode())
3575 // Then check to see if we should lower the memset with target-specific
3576 // code. If the target chooses to do this, this is the next best.
3578 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3580 if (Result.getNode())
3583 // Emit a library call.
3584 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3585 TargetLowering::ArgListTy Args;
3586 TargetLowering::ArgListEntry Entry;
3587 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3588 Args.push_back(Entry);
3589 // Extend or truncate the argument to be an i32 value for the call.
3590 if (Src.getValueType().bitsGT(MVT::i32))
3591 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3593 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3595 Entry.Ty = Type::getInt32Ty(*getContext());
3596 Entry.isSExt = true;
3597 Args.push_back(Entry);
3599 Entry.Ty = IntPtrTy;
3600 Entry.isSExt = false;
3601 Args.push_back(Entry);
3602 // FIXME: pass in DebugLoc
3603 std::pair<SDValue,SDValue> CallResult =
3604 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3605 false, false, false, false, 0,
3606 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3607 /*isReturnValueUsed=*/false,
3608 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3609 TLI.getPointerTy()),
3610 Args, *this, dl, GetOrdering(Chain.getNode()));
3611 return CallResult.second;
3614 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3616 SDValue Ptr, SDValue Cmp,
3617 SDValue Swp, const Value* PtrVal,
3618 unsigned Alignment) {
3619 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3620 Alignment = getEVTAlignment(MemVT);
3622 // Check if the memory reference references a frame index
3624 if (const FrameIndexSDNode *FI =
3625 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3626 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3628 MachineFunction &MF = getMachineFunction();
3629 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3631 // For now, atomics are considered to be volatile always.
3632 Flags |= MachineMemOperand::MOVolatile;
3634 MachineMemOperand *MMO =
3635 MF.getMachineMemOperand(PtrVal, Flags, 0,
3636 MemVT.getStoreSize(), Alignment);
3638 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3641 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3643 SDValue Ptr, SDValue Cmp,
3644 SDValue Swp, MachineMemOperand *MMO) {
3645 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3646 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3648 EVT VT = Cmp.getValueType();
3650 SDVTList VTs = getVTList(VT, MVT::Other);
3651 FoldingSetNodeID ID;
3652 ID.AddInteger(MemVT.getRawBits());
3653 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3654 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3656 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3657 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3658 return SDValue(E, 0);
3660 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3661 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3662 CSEMap.InsertNode(N, IP);
3663 AllNodes.push_back(N);
3664 return SDValue(N, 0);
3667 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3669 SDValue Ptr, SDValue Val,
3670 const Value* PtrVal,
3671 unsigned Alignment) {
3672 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3673 Alignment = getEVTAlignment(MemVT);
3675 // Check if the memory reference references a frame index
3677 if (const FrameIndexSDNode *FI =
3678 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3679 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3681 MachineFunction &MF = getMachineFunction();
3682 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3684 // For now, atomics are considered to be volatile always.
3685 Flags |= MachineMemOperand::MOVolatile;
3687 MachineMemOperand *MMO =
3688 MF.getMachineMemOperand(PtrVal, Flags, 0,
3689 MemVT.getStoreSize(), Alignment);
3691 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3694 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3696 SDValue Ptr, SDValue Val,
3697 MachineMemOperand *MMO) {
3698 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3699 Opcode == ISD::ATOMIC_LOAD_SUB ||
3700 Opcode == ISD::ATOMIC_LOAD_AND ||
3701 Opcode == ISD::ATOMIC_LOAD_OR ||
3702 Opcode == ISD::ATOMIC_LOAD_XOR ||
3703 Opcode == ISD::ATOMIC_LOAD_NAND ||
3704 Opcode == ISD::ATOMIC_LOAD_MIN ||
3705 Opcode == ISD::ATOMIC_LOAD_MAX ||
3706 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3707 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3708 Opcode == ISD::ATOMIC_SWAP) &&
3709 "Invalid Atomic Op");
3711 EVT VT = Val.getValueType();
3713 SDVTList VTs = getVTList(VT, MVT::Other);
3714 FoldingSetNodeID ID;
3715 ID.AddInteger(MemVT.getRawBits());
3716 SDValue Ops[] = {Chain, Ptr, Val};
3717 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3719 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3720 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3721 return SDValue(E, 0);
3723 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3724 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3725 CSEMap.InsertNode(N, IP);
3726 AllNodes.push_back(N);
3727 return SDValue(N, 0);
3730 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3731 /// Allowed to return something different (and simpler) if Simplify is true.
3732 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3737 SmallVector<EVT, 4> VTs;
3738 VTs.reserve(NumOps);
3739 for (unsigned i = 0; i < NumOps; ++i)
3740 VTs.push_back(Ops[i].getValueType());
3741 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3746 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3747 const EVT *VTs, unsigned NumVTs,
3748 const SDValue *Ops, unsigned NumOps,
3749 EVT MemVT, const Value *srcValue, int SVOff,
3750 unsigned Align, bool Vol,
3751 bool ReadMem, bool WriteMem) {
3752 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3753 MemVT, srcValue, SVOff, Align, Vol,
3758 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3759 const SDValue *Ops, unsigned NumOps,
3760 EVT MemVT, const Value *srcValue, int SVOff,
3761 unsigned Align, bool Vol,
3762 bool ReadMem, bool WriteMem) {
3763 if (Align == 0) // Ensure that codegen never sees alignment 0
3764 Align = getEVTAlignment(MemVT);
3766 MachineFunction &MF = getMachineFunction();
3769 Flags |= MachineMemOperand::MOStore;
3771 Flags |= MachineMemOperand::MOLoad;
3773 Flags |= MachineMemOperand::MOVolatile;
3774 MachineMemOperand *MMO =
3775 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3776 MemVT.getStoreSize(), Align);
3778 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3782 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3783 const SDValue *Ops, unsigned NumOps,
3784 EVT MemVT, MachineMemOperand *MMO) {
3785 assert((Opcode == ISD::INTRINSIC_VOID ||
3786 Opcode == ISD::INTRINSIC_W_CHAIN ||
3787 (Opcode <= INT_MAX &&
3788 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3789 "Opcode is not a memory-accessing opcode!");
3791 // Memoize the node unless it returns a flag.
3792 MemIntrinsicSDNode *N;
3793 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3794 FoldingSetNodeID ID;
3795 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3797 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3798 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3799 return SDValue(E, 0);
3802 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3803 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3804 CSEMap.InsertNode(N, IP);
3806 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3807 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3809 AllNodes.push_back(N);
3810 return SDValue(N, 0);
3814 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3815 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3816 SDValue Ptr, SDValue Offset,
3817 const Value *SV, int SVOffset, EVT MemVT,
3818 bool isVolatile, bool isNonTemporal,
3819 unsigned Alignment) {
3820 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3821 Alignment = getEVTAlignment(VT);
3823 // Check if the memory reference references a frame index
3825 if (const FrameIndexSDNode *FI =
3826 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3827 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3829 MachineFunction &MF = getMachineFunction();
3830 unsigned Flags = MachineMemOperand::MOLoad;
3832 Flags |= MachineMemOperand::MOVolatile;
3834 Flags |= MachineMemOperand::MONonTemporal;
3835 MachineMemOperand *MMO =
3836 MF.getMachineMemOperand(SV, Flags, SVOffset,
3837 MemVT.getStoreSize(), Alignment);
3838 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3842 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3843 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3844 SDValue Ptr, SDValue Offset, EVT MemVT,
3845 MachineMemOperand *MMO) {
3847 ExtType = ISD::NON_EXTLOAD;
3848 } else if (ExtType == ISD::NON_EXTLOAD) {
3849 assert(VT == MemVT && "Non-extending load from different memory type!");
3852 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3853 "Should only be an extending load, not truncating!");
3854 assert(VT.isInteger() == MemVT.isInteger() &&
3855 "Cannot convert from FP to Int or Int -> FP!");
3856 assert(VT.isVector() == MemVT.isVector() &&
3857 "Cannot use trunc store to convert to or from a vector!");
3858 assert((!VT.isVector() ||
3859 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3860 "Cannot use trunc store to change the number of vector elements!");
3863 bool Indexed = AM != ISD::UNINDEXED;
3864 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3865 "Unindexed load with an offset!");
3867 SDVTList VTs = Indexed ?
3868 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3869 SDValue Ops[] = { Chain, Ptr, Offset };
3870 FoldingSetNodeID ID;
3871 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3872 ID.AddInteger(MemVT.getRawBits());
3873 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3874 MMO->isNonTemporal()));
3876 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3877 cast<LoadSDNode>(E)->refineAlignment(MMO);
3878 return SDValue(E, 0);
3880 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3881 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3882 CSEMap.InsertNode(N, IP);
3883 AllNodes.push_back(N);
3884 return SDValue(N, 0);
3887 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3888 SDValue Chain, SDValue Ptr,
3889 const Value *SV, int SVOffset,
3890 bool isVolatile, bool isNonTemporal,
3891 unsigned Alignment) {
3892 SDValue Undef = getUNDEF(Ptr.getValueType());
3893 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3894 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3897 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3898 SDValue Chain, SDValue Ptr,
3900 int SVOffset, EVT MemVT,
3901 bool isVolatile, bool isNonTemporal,
3902 unsigned Alignment) {
3903 SDValue Undef = getUNDEF(Ptr.getValueType());
3904 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3905 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3909 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3910 SDValue Offset, ISD::MemIndexedMode AM) {
3911 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3912 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3913 "Load is already a indexed load!");
3914 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3915 LD->getChain(), Base, Offset, LD->getSrcValue(),
3916 LD->getSrcValueOffset(), LD->getMemoryVT(),
3917 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3920 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3921 SDValue Ptr, const Value *SV, int SVOffset,
3922 bool isVolatile, bool isNonTemporal,
3923 unsigned Alignment) {
3924 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3925 Alignment = getEVTAlignment(Val.getValueType());
3927 // Check if the memory reference references a frame index
3929 if (const FrameIndexSDNode *FI =
3930 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3931 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3933 MachineFunction &MF = getMachineFunction();
3934 unsigned Flags = MachineMemOperand::MOStore;
3936 Flags |= MachineMemOperand::MOVolatile;
3938 Flags |= MachineMemOperand::MONonTemporal;
3939 MachineMemOperand *MMO =
3940 MF.getMachineMemOperand(SV, Flags, SVOffset,
3941 Val.getValueType().getStoreSize(), Alignment);
3943 return getStore(Chain, dl, Val, Ptr, MMO);
3946 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3947 SDValue Ptr, MachineMemOperand *MMO) {
3948 EVT VT = Val.getValueType();
3949 SDVTList VTs = getVTList(MVT::Other);
3950 SDValue Undef = getUNDEF(Ptr.getValueType());
3951 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3952 FoldingSetNodeID ID;
3953 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3954 ID.AddInteger(VT.getRawBits());
3955 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
3956 MMO->isNonTemporal()));
3958 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3959 cast<StoreSDNode>(E)->refineAlignment(MMO);
3960 return SDValue(E, 0);
3962 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3963 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3964 CSEMap.InsertNode(N, IP);
3965 AllNodes.push_back(N);
3966 return SDValue(N, 0);
3969 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3970 SDValue Ptr, const Value *SV,
3971 int SVOffset, EVT SVT,
3972 bool isVolatile, bool isNonTemporal,
3973 unsigned Alignment) {
3974 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3975 Alignment = getEVTAlignment(SVT);
3977 // Check if the memory reference references a frame index
3979 if (const FrameIndexSDNode *FI =
3980 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3981 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3983 MachineFunction &MF = getMachineFunction();
3984 unsigned Flags = MachineMemOperand::MOStore;
3986 Flags |= MachineMemOperand::MOVolatile;
3988 Flags |= MachineMemOperand::MONonTemporal;
3989 MachineMemOperand *MMO =
3990 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3992 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3995 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3996 SDValue Ptr, EVT SVT,
3997 MachineMemOperand *MMO) {
3998 EVT VT = Val.getValueType();
4001 return getStore(Chain, dl, Val, Ptr, MMO);
4003 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4004 "Should only be a truncating store, not extending!");
4005 assert(VT.isInteger() == SVT.isInteger() &&
4006 "Can't do FP-INT conversion!");
4007 assert(VT.isVector() == SVT.isVector() &&
4008 "Cannot use trunc store to convert to or from a vector!");
4009 assert((!VT.isVector() ||
4010 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4011 "Cannot use trunc store to change the number of vector elements!");
4013 SDVTList VTs = getVTList(MVT::Other);
4014 SDValue Undef = getUNDEF(Ptr.getValueType());
4015 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4016 FoldingSetNodeID ID;
4017 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4018 ID.AddInteger(SVT.getRawBits());
4019 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4020 MMO->isNonTemporal()));
4022 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4023 cast<StoreSDNode>(E)->refineAlignment(MMO);
4024 return SDValue(E, 0);
4026 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4027 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
4028 CSEMap.InsertNode(N, IP);
4029 AllNodes.push_back(N);
4030 return SDValue(N, 0);
4034 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4035 SDValue Offset, ISD::MemIndexedMode AM) {
4036 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4037 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4038 "Store is already a indexed store!");
4039 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4040 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4041 FoldingSetNodeID ID;
4042 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4043 ID.AddInteger(ST->getMemoryVT().getRawBits());
4044 ID.AddInteger(ST->getRawSubclassData());
4046 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4047 return SDValue(E, 0);
4049 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4050 new (N) StoreSDNode(Ops, dl, VTs, AM,
4051 ST->isTruncatingStore(), ST->getMemoryVT(),
4052 ST->getMemOperand());
4053 CSEMap.InsertNode(N, IP);
4054 AllNodes.push_back(N);
4055 return SDValue(N, 0);
4058 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4059 SDValue Chain, SDValue Ptr,
4061 SDValue Ops[] = { Chain, Ptr, SV };
4062 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4065 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4066 const SDUse *Ops, unsigned NumOps) {
4068 case 0: return getNode(Opcode, DL, VT);
4069 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4070 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4071 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4075 // Copy from an SDUse array into an SDValue array for use with
4076 // the regular getNode logic.
4077 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4078 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4081 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4082 const SDValue *Ops, unsigned NumOps) {
4084 case 0: return getNode(Opcode, DL, VT);
4085 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4086 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4087 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4093 case ISD::SELECT_CC: {
4094 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4095 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4096 "LHS and RHS of condition must have same type!");
4097 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4098 "True and False arms of SelectCC must have same type!");
4099 assert(Ops[2].getValueType() == VT &&
4100 "select_cc node must be of same type as true and false value!");
4104 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4105 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4106 "LHS/RHS of comparison should match types!");
4113 SDVTList VTs = getVTList(VT);
4115 if (VT != MVT::Flag) {
4116 FoldingSetNodeID ID;
4117 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4121 return SDValue(E, 0);
4123 N = NodeAllocator.Allocate<SDNode>();
4124 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4125 CSEMap.InsertNode(N, IP);
4127 N = NodeAllocator.Allocate<SDNode>();
4128 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4131 AllNodes.push_back(N);
4135 return SDValue(N, 0);
4138 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4139 const std::vector<EVT> &ResultTys,
4140 const SDValue *Ops, unsigned NumOps) {
4141 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4145 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4146 const EVT *VTs, unsigned NumVTs,
4147 const SDValue *Ops, unsigned NumOps) {
4149 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4150 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4153 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4154 const SDValue *Ops, unsigned NumOps) {
4155 if (VTList.NumVTs == 1)
4156 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4160 // FIXME: figure out how to safely handle things like
4161 // int foo(int x) { return 1 << (x & 255); }
4162 // int bar() { return foo(256); }
4163 case ISD::SRA_PARTS:
4164 case ISD::SRL_PARTS:
4165 case ISD::SHL_PARTS:
4166 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4167 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4168 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4169 else if (N3.getOpcode() == ISD::AND)
4170 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4171 // If the and is only masking out bits that cannot effect the shift,
4172 // eliminate the and.
4173 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4174 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4175 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4181 // Memoize the node unless it returns a flag.
4183 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4184 FoldingSetNodeID ID;
4185 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4188 return SDValue(E, 0);
4191 N = NodeAllocator.Allocate<UnarySDNode>();
4192 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4193 } else if (NumOps == 2) {
4194 N = NodeAllocator.Allocate<BinarySDNode>();
4195 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4196 } else if (NumOps == 3) {
4197 N = NodeAllocator.Allocate<TernarySDNode>();
4198 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4200 N = NodeAllocator.Allocate<SDNode>();
4201 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4203 CSEMap.InsertNode(N, IP);
4206 N = NodeAllocator.Allocate<UnarySDNode>();
4207 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4208 } else if (NumOps == 2) {
4209 N = NodeAllocator.Allocate<BinarySDNode>();
4210 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4211 } else if (NumOps == 3) {
4212 N = NodeAllocator.Allocate<TernarySDNode>();
4213 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4215 N = NodeAllocator.Allocate<SDNode>();
4216 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4219 AllNodes.push_back(N);
4223 return SDValue(N, 0);
4226 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4227 return getNode(Opcode, DL, VTList, 0, 0);
4230 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4232 SDValue Ops[] = { N1 };
4233 return getNode(Opcode, DL, VTList, Ops, 1);
4236 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4237 SDValue N1, SDValue N2) {
4238 SDValue Ops[] = { N1, N2 };
4239 return getNode(Opcode, DL, VTList, Ops, 2);
4242 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4243 SDValue N1, SDValue N2, SDValue N3) {
4244 SDValue Ops[] = { N1, N2, N3 };
4245 return getNode(Opcode, DL, VTList, Ops, 3);
4248 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4249 SDValue N1, SDValue N2, SDValue N3,
4251 SDValue Ops[] = { N1, N2, N3, N4 };
4252 return getNode(Opcode, DL, VTList, Ops, 4);
4255 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4256 SDValue N1, SDValue N2, SDValue N3,
4257 SDValue N4, SDValue N5) {
4258 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4259 return getNode(Opcode, DL, VTList, Ops, 5);
4262 SDVTList SelectionDAG::getVTList(EVT VT) {
4263 return makeVTList(SDNode::getValueTypeList(VT), 1);
4266 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4267 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4268 E = VTList.rend(); I != E; ++I)
4269 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4272 EVT *Array = Allocator.Allocate<EVT>(2);
4275 SDVTList Result = makeVTList(Array, 2);
4276 VTList.push_back(Result);
4280 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4281 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4282 E = VTList.rend(); I != E; ++I)
4283 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4287 EVT *Array = Allocator.Allocate<EVT>(3);
4291 SDVTList Result = makeVTList(Array, 3);
4292 VTList.push_back(Result);
4296 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4297 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4298 E = VTList.rend(); I != E; ++I)
4299 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4300 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4303 EVT *Array = Allocator.Allocate<EVT>(4);
4308 SDVTList Result = makeVTList(Array, 4);
4309 VTList.push_back(Result);
4313 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4315 case 0: llvm_unreachable("Cannot have nodes without results!");
4316 case 1: return getVTList(VTs[0]);
4317 case 2: return getVTList(VTs[0], VTs[1]);
4318 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4319 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4323 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4324 E = VTList.rend(); I != E; ++I) {
4325 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4328 bool NoMatch = false;
4329 for (unsigned i = 2; i != NumVTs; ++i)
4330 if (VTs[i] != I->VTs[i]) {
4338 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4339 std::copy(VTs, VTs+NumVTs, Array);
4340 SDVTList Result = makeVTList(Array, NumVTs);
4341 VTList.push_back(Result);
4346 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4347 /// specified operands. If the resultant node already exists in the DAG,
4348 /// this does not modify the specified node, instead it returns the node that
4349 /// already exists. If the resultant node does not exist in the DAG, the
4350 /// input node is returned. As a degenerate case, if you specify the same
4351 /// input operands as the node already has, the input node is returned.
4352 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4353 SDNode *N = InN.getNode();
4354 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4356 // Check to see if there is no change.
4357 if (Op == N->getOperand(0)) return InN;
4359 // See if the modified node already exists.
4360 void *InsertPos = 0;
4361 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4362 return SDValue(Existing, InN.getResNo());
4364 // Nope it doesn't. Remove the node from its current place in the maps.
4366 if (!RemoveNodeFromCSEMaps(N))
4369 // Now we update the operands.
4370 N->OperandList[0].set(Op);
4372 // If this gets put into a CSE map, add it.
4373 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4377 SDValue SelectionDAG::
4378 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4379 SDNode *N = InN.getNode();
4380 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4382 // Check to see if there is no change.
4383 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4384 return InN; // No operands changed, just return the input node.
4386 // See if the modified node already exists.
4387 void *InsertPos = 0;
4388 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4389 return SDValue(Existing, InN.getResNo());
4391 // Nope it doesn't. Remove the node from its current place in the maps.
4393 if (!RemoveNodeFromCSEMaps(N))
4396 // Now we update the operands.
4397 if (N->OperandList[0] != Op1)
4398 N->OperandList[0].set(Op1);
4399 if (N->OperandList[1] != Op2)
4400 N->OperandList[1].set(Op2);
4402 // If this gets put into a CSE map, add it.
4403 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4407 SDValue SelectionDAG::
4408 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4409 SDValue Ops[] = { Op1, Op2, Op3 };
4410 return UpdateNodeOperands(N, Ops, 3);
4413 SDValue SelectionDAG::
4414 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4415 SDValue Op3, SDValue Op4) {
4416 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4417 return UpdateNodeOperands(N, Ops, 4);
4420 SDValue SelectionDAG::
4421 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4422 SDValue Op3, SDValue Op4, SDValue Op5) {
4423 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4424 return UpdateNodeOperands(N, Ops, 5);
4427 SDValue SelectionDAG::
4428 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4429 SDNode *N = InN.getNode();
4430 assert(N->getNumOperands() == NumOps &&
4431 "Update with wrong number of operands");
4433 // Check to see if there is no change.
4434 bool AnyChange = false;
4435 for (unsigned i = 0; i != NumOps; ++i) {
4436 if (Ops[i] != N->getOperand(i)) {
4442 // No operands changed, just return the input node.
4443 if (!AnyChange) return InN;
4445 // See if the modified node already exists.
4446 void *InsertPos = 0;
4447 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4448 return SDValue(Existing, InN.getResNo());
4450 // Nope it doesn't. Remove the node from its current place in the maps.
4452 if (!RemoveNodeFromCSEMaps(N))
4455 // Now we update the operands.
4456 for (unsigned i = 0; i != NumOps; ++i)
4457 if (N->OperandList[i] != Ops[i])
4458 N->OperandList[i].set(Ops[i]);
4460 // If this gets put into a CSE map, add it.
4461 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4465 /// DropOperands - Release the operands and set this node to have
4467 void SDNode::DropOperands() {
4468 // Unlike the code in MorphNodeTo that does this, we don't need to
4469 // watch for dead nodes here.
4470 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4476 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4479 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4481 SDVTList VTs = getVTList(VT);
4482 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4485 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4486 EVT VT, SDValue Op1) {
4487 SDVTList VTs = getVTList(VT);
4488 SDValue Ops[] = { Op1 };
4489 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4492 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4493 EVT VT, SDValue Op1,
4495 SDVTList VTs = getVTList(VT);
4496 SDValue Ops[] = { Op1, Op2 };
4497 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4500 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4501 EVT VT, SDValue Op1,
4502 SDValue Op2, SDValue Op3) {
4503 SDVTList VTs = getVTList(VT);
4504 SDValue Ops[] = { Op1, Op2, Op3 };
4505 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4508 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4509 EVT VT, const SDValue *Ops,
4511 SDVTList VTs = getVTList(VT);
4512 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4515 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4516 EVT VT1, EVT VT2, const SDValue *Ops,
4518 SDVTList VTs = getVTList(VT1, VT2);
4519 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4522 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4524 SDVTList VTs = getVTList(VT1, VT2);
4525 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4528 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4529 EVT VT1, EVT VT2, EVT VT3,
4530 const SDValue *Ops, unsigned NumOps) {
4531 SDVTList VTs = getVTList(VT1, VT2, VT3);
4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4535 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4536 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4537 const SDValue *Ops, unsigned NumOps) {
4538 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4539 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4542 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4545 SDVTList VTs = getVTList(VT1, VT2);
4546 SDValue Ops[] = { Op1 };
4547 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4550 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4552 SDValue Op1, SDValue Op2) {
4553 SDVTList VTs = getVTList(VT1, VT2);
4554 SDValue Ops[] = { Op1, Op2 };
4555 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4558 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4560 SDValue Op1, SDValue Op2,
4562 SDVTList VTs = getVTList(VT1, VT2);
4563 SDValue Ops[] = { Op1, Op2, Op3 };
4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4567 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4568 EVT VT1, EVT VT2, EVT VT3,
4569 SDValue Op1, SDValue Op2,
4571 SDVTList VTs = getVTList(VT1, VT2, VT3);
4572 SDValue Ops[] = { Op1, Op2, Op3 };
4573 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4576 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4577 SDVTList VTs, const SDValue *Ops,
4579 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4580 // Reset the NodeID to -1.
4585 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4587 SDVTList VTs = getVTList(VT);
4588 return MorphNodeTo(N, Opc, VTs, 0, 0);
4591 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4592 EVT VT, SDValue Op1) {
4593 SDVTList VTs = getVTList(VT);
4594 SDValue Ops[] = { Op1 };
4595 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4598 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4599 EVT VT, SDValue Op1,
4601 SDVTList VTs = getVTList(VT);
4602 SDValue Ops[] = { Op1, Op2 };
4603 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4606 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4607 EVT VT, SDValue Op1,
4608 SDValue Op2, SDValue Op3) {
4609 SDVTList VTs = getVTList(VT);
4610 SDValue Ops[] = { Op1, Op2, Op3 };
4611 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4614 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4615 EVT VT, const SDValue *Ops,
4617 SDVTList VTs = getVTList(VT);
4618 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4621 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4622 EVT VT1, EVT VT2, const SDValue *Ops,
4624 SDVTList VTs = getVTList(VT1, VT2);
4625 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4628 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4630 SDVTList VTs = getVTList(VT1, VT2);
4631 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4634 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4635 EVT VT1, EVT VT2, EVT VT3,
4636 const SDValue *Ops, unsigned NumOps) {
4637 SDVTList VTs = getVTList(VT1, VT2, VT3);
4638 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4641 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4644 SDVTList VTs = getVTList(VT1, VT2);
4645 SDValue Ops[] = { Op1 };
4646 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4649 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4651 SDValue Op1, SDValue Op2) {
4652 SDVTList VTs = getVTList(VT1, VT2);
4653 SDValue Ops[] = { Op1, Op2 };
4654 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4657 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4659 SDValue Op1, SDValue Op2,
4661 SDVTList VTs = getVTList(VT1, VT2);
4662 SDValue Ops[] = { Op1, Op2, Op3 };
4663 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4666 /// MorphNodeTo - These *mutate* the specified node to have the specified
4667 /// return type, opcode, and operands.
4669 /// Note that MorphNodeTo returns the resultant node. If there is already a
4670 /// node of the specified opcode and operands, it returns that node instead of
4671 /// the current one. Note that the DebugLoc need not be the same.
4673 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4674 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4675 /// node, and because it doesn't require CSE recalculation for any of
4676 /// the node's users.
4678 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4679 SDVTList VTs, const SDValue *Ops,
4681 // If an identical node already exists, use it.
4683 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4684 FoldingSetNodeID ID;
4685 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4686 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4690 if (!RemoveNodeFromCSEMaps(N))
4693 // Start the morphing.
4695 N->ValueList = VTs.VTs;
4696 N->NumValues = VTs.NumVTs;
4698 // Clear the operands list, updating used nodes to remove this from their
4699 // use list. Keep track of any operands that become dead as a result.
4700 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4701 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4703 SDNode *Used = Use.getNode();
4705 if (Used->use_empty())
4706 DeadNodeSet.insert(Used);
4709 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4710 // Initialize the memory references information.
4711 MN->setMemRefs(0, 0);
4712 // If NumOps is larger than the # of operands we can have in a
4713 // MachineSDNode, reallocate the operand list.
4714 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4715 if (MN->OperandsNeedDelete)
4716 delete[] MN->OperandList;
4717 if (NumOps > array_lengthof(MN->LocalOperands))
4718 // We're creating a final node that will live unmorphed for the
4719 // remainder of the current SelectionDAG iteration, so we can allocate
4720 // the operands directly out of a pool with no recycling metadata.
4721 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4724 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4725 MN->OperandsNeedDelete = false;
4727 MN->InitOperands(MN->OperandList, Ops, NumOps);
4729 // If NumOps is larger than the # of operands we currently have, reallocate
4730 // the operand list.
4731 if (NumOps > N->NumOperands) {
4732 if (N->OperandsNeedDelete)
4733 delete[] N->OperandList;
4734 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4735 N->OperandsNeedDelete = true;
4737 N->InitOperands(N->OperandList, Ops, NumOps);
4740 // Delete any nodes that are still dead after adding the uses for the
4742 SmallVector<SDNode *, 16> DeadNodes;
4743 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4744 E = DeadNodeSet.end(); I != E; ++I)
4745 if ((*I)->use_empty())
4746 DeadNodes.push_back(*I);
4747 RemoveDeadNodes(DeadNodes);
4750 CSEMap.InsertNode(N, IP); // Memoize the new node.
4755 /// getMachineNode - These are used for target selectors to create a new node
4756 /// with specified return type(s), MachineInstr opcode, and operands.
4758 /// Note that getMachineNode returns the resultant node. If there is already a
4759 /// node of the specified opcode and operands, it returns that node instead of
4760 /// the current one.
4762 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4763 SDVTList VTs = getVTList(VT);
4764 return getMachineNode(Opcode, dl, VTs, 0, 0);
4768 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4769 SDVTList VTs = getVTList(VT);
4770 SDValue Ops[] = { Op1 };
4771 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4775 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4776 SDValue Op1, SDValue Op2) {
4777 SDVTList VTs = getVTList(VT);
4778 SDValue Ops[] = { Op1, Op2 };
4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4783 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4784 SDValue Op1, SDValue Op2, SDValue Op3) {
4785 SDVTList VTs = getVTList(VT);
4786 SDValue Ops[] = { Op1, Op2, Op3 };
4787 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4791 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4792 const SDValue *Ops, unsigned NumOps) {
4793 SDVTList VTs = getVTList(VT);
4794 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4798 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4799 SDVTList VTs = getVTList(VT1, VT2);
4800 return getMachineNode(Opcode, dl, VTs, 0, 0);
4804 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4805 EVT VT1, EVT VT2, SDValue Op1) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 SDValue Ops[] = { Op1 };
4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4812 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4813 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4814 SDVTList VTs = getVTList(VT1, VT2);
4815 SDValue Ops[] = { Op1, Op2 };
4816 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4820 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4821 EVT VT1, EVT VT2, SDValue Op1,
4822 SDValue Op2, SDValue Op3) {
4823 SDVTList VTs = getVTList(VT1, VT2);
4824 SDValue Ops[] = { Op1, Op2, Op3 };
4825 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4831 const SDValue *Ops, unsigned NumOps) {
4832 SDVTList VTs = getVTList(VT1, VT2);
4833 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4837 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4838 EVT VT1, EVT VT2, EVT VT3,
4839 SDValue Op1, SDValue Op2) {
4840 SDVTList VTs = getVTList(VT1, VT2, VT3);
4841 SDValue Ops[] = { Op1, Op2 };
4842 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4846 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4847 EVT VT1, EVT VT2, EVT VT3,
4848 SDValue Op1, SDValue Op2, SDValue Op3) {
4849 SDVTList VTs = getVTList(VT1, VT2, VT3);
4850 SDValue Ops[] = { Op1, Op2, Op3 };
4851 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4855 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4856 EVT VT1, EVT VT2, EVT VT3,
4857 const SDValue *Ops, unsigned NumOps) {
4858 SDVTList VTs = getVTList(VT1, VT2, VT3);
4859 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4863 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4864 EVT VT2, EVT VT3, EVT VT4,
4865 const SDValue *Ops, unsigned NumOps) {
4866 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4867 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4871 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4872 const std::vector<EVT> &ResultTys,
4873 const SDValue *Ops, unsigned NumOps) {
4874 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4875 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4879 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4880 const SDValue *Ops, unsigned NumOps) {
4881 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4886 FoldingSetNodeID ID;
4887 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4889 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4890 return cast<MachineSDNode>(E);
4893 // Allocate a new MachineSDNode.
4894 N = NodeAllocator.Allocate<MachineSDNode>();
4895 new (N) MachineSDNode(~Opcode, DL, VTs);
4897 // Initialize the operands list.
4898 if (NumOps > array_lengthof(N->LocalOperands))
4899 // We're creating a final node that will live unmorphed for the
4900 // remainder of the current SelectionDAG iteration, so we can allocate
4901 // the operands directly out of a pool with no recycling metadata.
4902 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4905 N->InitOperands(N->LocalOperands, Ops, NumOps);
4906 N->OperandsNeedDelete = false;
4909 CSEMap.InsertNode(N, IP);
4911 AllNodes.push_back(N);
4918 /// getTargetExtractSubreg - A convenience function for creating
4919 /// TargetOpcode::EXTRACT_SUBREG nodes.
4921 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4923 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4924 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4925 VT, Operand, SRIdxVal);
4926 return SDValue(Subreg, 0);
4929 /// getTargetInsertSubreg - A convenience function for creating
4930 /// TargetOpcode::INSERT_SUBREG nodes.
4932 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4933 SDValue Operand, SDValue Subreg) {
4934 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4935 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4936 VT, Operand, Subreg, SRIdxVal);
4937 return SDValue(Result, 0);
4940 /// getNodeIfExists - Get the specified node if it's already available, or
4941 /// else return NULL.
4942 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4943 const SDValue *Ops, unsigned NumOps) {
4944 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4945 FoldingSetNodeID ID;
4946 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4954 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4955 /// This can cause recursive merging of nodes in the DAG.
4957 /// This version assumes From has a single result value.
4959 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4960 DAGUpdateListener *UpdateListener) {
4961 SDNode *From = FromN.getNode();
4962 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4963 "Cannot replace with this method!");
4964 assert(From != To.getNode() && "Cannot replace uses of with self");
4966 // Iterate over all the existing uses of From. New uses will be added
4967 // to the beginning of the use list, which we avoid visiting.
4968 // This specifically avoids visiting uses of From that arise while the
4969 // replacement is happening, because any such uses would be the result
4970 // of CSE: If an existing node looks like From after one of its operands
4971 // is replaced by To, we don't want to replace of all its users with To
4972 // too. See PR3018 for more info.
4973 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4977 // This node is about to morph, remove its old self from the CSE maps.
4978 RemoveNodeFromCSEMaps(User);
4980 // A user can appear in a use list multiple times, and when this
4981 // happens the uses are usually next to each other in the list.
4982 // To help reduce the number of CSE recomputations, process all
4983 // the uses of this user that we can find this way.
4985 SDUse &Use = UI.getUse();
4988 } while (UI != UE && *UI == User);
4990 // Now that we have modified User, add it back to the CSE maps. If it
4991 // already exists there, recursively merge the results together.
4992 AddModifiedNodeToCSEMaps(User, UpdateListener);
4996 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4997 /// This can cause recursive merging of nodes in the DAG.
4999 /// This version assumes that for each value of From, there is a
5000 /// corresponding value in To in the same position with the same type.
5002 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5003 DAGUpdateListener *UpdateListener) {
5005 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5006 assert((!From->hasAnyUseOfValue(i) ||
5007 From->getValueType(i) == To->getValueType(i)) &&
5008 "Cannot use this version of ReplaceAllUsesWith!");
5011 // Handle the trivial case.
5015 // Iterate over just the existing users of From. See the comments in
5016 // the ReplaceAllUsesWith above.
5017 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5021 // This node is about to morph, remove its old self from the CSE maps.
5022 RemoveNodeFromCSEMaps(User);
5024 // A user can appear in a use list multiple times, and when this
5025 // happens the uses are usually next to each other in the list.
5026 // To help reduce the number of CSE recomputations, process all
5027 // the uses of this user that we can find this way.
5029 SDUse &Use = UI.getUse();
5032 } while (UI != UE && *UI == User);
5034 // Now that we have modified User, add it back to the CSE maps. If it
5035 // already exists there, recursively merge the results together.
5036 AddModifiedNodeToCSEMaps(User, UpdateListener);
5040 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5041 /// This can cause recursive merging of nodes in the DAG.
5043 /// This version can replace From with any result values. To must match the
5044 /// number and types of values returned by From.
5045 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5047 DAGUpdateListener *UpdateListener) {
5048 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5049 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5051 // Iterate over just the existing users of From. See the comments in
5052 // the ReplaceAllUsesWith above.
5053 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5057 // This node is about to morph, remove its old self from the CSE maps.
5058 RemoveNodeFromCSEMaps(User);
5060 // A user can appear in a use list multiple times, and when this
5061 // happens the uses are usually next to each other in the list.
5062 // To help reduce the number of CSE recomputations, process all
5063 // the uses of this user that we can find this way.
5065 SDUse &Use = UI.getUse();
5066 const SDValue &ToOp = To[Use.getResNo()];
5069 } while (UI != UE && *UI == User);
5071 // Now that we have modified User, add it back to the CSE maps. If it
5072 // already exists there, recursively merge the results together.
5073 AddModifiedNodeToCSEMaps(User, UpdateListener);
5077 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5078 /// uses of other values produced by From.getNode() alone. The Deleted
5079 /// vector is handled the same way as for ReplaceAllUsesWith.
5080 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5081 DAGUpdateListener *UpdateListener){
5082 // Handle the really simple, really trivial case efficiently.
5083 if (From == To) return;
5085 // Handle the simple, trivial, case efficiently.
5086 if (From.getNode()->getNumValues() == 1) {
5087 ReplaceAllUsesWith(From, To, UpdateListener);
5091 // Iterate over just the existing users of From. See the comments in
5092 // the ReplaceAllUsesWith above.
5093 SDNode::use_iterator UI = From.getNode()->use_begin(),
5094 UE = From.getNode()->use_end();
5097 bool UserRemovedFromCSEMaps = false;
5099 // A user can appear in a use list multiple times, and when this
5100 // happens the uses are usually next to each other in the list.
5101 // To help reduce the number of CSE recomputations, process all
5102 // the uses of this user that we can find this way.
5104 SDUse &Use = UI.getUse();
5106 // Skip uses of different values from the same node.
5107 if (Use.getResNo() != From.getResNo()) {
5112 // If this node hasn't been modified yet, it's still in the CSE maps,
5113 // so remove its old self from the CSE maps.
5114 if (!UserRemovedFromCSEMaps) {
5115 RemoveNodeFromCSEMaps(User);
5116 UserRemovedFromCSEMaps = true;
5121 } while (UI != UE && *UI == User);
5123 // We are iterating over all uses of the From node, so if a use
5124 // doesn't use the specific value, no changes are made.
5125 if (!UserRemovedFromCSEMaps)
5128 // Now that we have modified User, add it back to the CSE maps. If it
5129 // already exists there, recursively merge the results together.
5130 AddModifiedNodeToCSEMaps(User, UpdateListener);
5135 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5136 /// to record information about a use.
5143 /// operator< - Sort Memos by User.
5144 bool operator<(const UseMemo &L, const UseMemo &R) {
5145 return (intptr_t)L.User < (intptr_t)R.User;
5149 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5150 /// uses of other values produced by From.getNode() alone. The same value
5151 /// may appear in both the From and To list. The Deleted vector is
5152 /// handled the same way as for ReplaceAllUsesWith.
5153 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5156 DAGUpdateListener *UpdateListener){
5157 // Handle the simple, trivial case efficiently.
5159 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5161 // Read up all the uses and make records of them. This helps
5162 // processing new uses that are introduced during the
5163 // replacement process.
5164 SmallVector<UseMemo, 4> Uses;
5165 for (unsigned i = 0; i != Num; ++i) {
5166 unsigned FromResNo = From[i].getResNo();
5167 SDNode *FromNode = From[i].getNode();
5168 for (SDNode::use_iterator UI = FromNode->use_begin(),
5169 E = FromNode->use_end(); UI != E; ++UI) {
5170 SDUse &Use = UI.getUse();
5171 if (Use.getResNo() == FromResNo) {
5172 UseMemo Memo = { *UI, i, &Use };
5173 Uses.push_back(Memo);
5178 // Sort the uses, so that all the uses from a given User are together.
5179 std::sort(Uses.begin(), Uses.end());
5181 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5182 UseIndex != UseIndexEnd; ) {
5183 // We know that this user uses some value of From. If it is the right
5184 // value, update it.
5185 SDNode *User = Uses[UseIndex].User;
5187 // This node is about to morph, remove its old self from the CSE maps.
5188 RemoveNodeFromCSEMaps(User);
5190 // The Uses array is sorted, so all the uses for a given User
5191 // are next to each other in the list.
5192 // To help reduce the number of CSE recomputations, process all
5193 // the uses of this user that we can find this way.
5195 unsigned i = Uses[UseIndex].Index;
5196 SDUse &Use = *Uses[UseIndex].Use;
5200 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5202 // Now that we have modified User, add it back to the CSE maps. If it
5203 // already exists there, recursively merge the results together.
5204 AddModifiedNodeToCSEMaps(User, UpdateListener);
5208 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5209 /// based on their topological order. It returns the maximum id and a vector
5210 /// of the SDNodes* in assigned order by reference.
5211 unsigned SelectionDAG::AssignTopologicalOrder() {
5213 unsigned DAGSize = 0;
5215 // SortedPos tracks the progress of the algorithm. Nodes before it are
5216 // sorted, nodes after it are unsorted. When the algorithm completes
5217 // it is at the end of the list.
5218 allnodes_iterator SortedPos = allnodes_begin();
5220 // Visit all the nodes. Move nodes with no operands to the front of
5221 // the list immediately. Annotate nodes that do have operands with their
5222 // operand count. Before we do this, the Node Id fields of the nodes
5223 // may contain arbitrary values. After, the Node Id fields for nodes
5224 // before SortedPos will contain the topological sort index, and the
5225 // Node Id fields for nodes At SortedPos and after will contain the
5226 // count of outstanding operands.
5227 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5230 unsigned Degree = N->getNumOperands();
5232 // A node with no uses, add it to the result array immediately.
5233 N->setNodeId(DAGSize++);
5234 allnodes_iterator Q = N;
5236 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5237 assert(SortedPos != AllNodes.end() && "Overran node list");
5240 // Temporarily use the Node Id as scratch space for the degree count.
5241 N->setNodeId(Degree);
5245 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5246 // such that by the time the end is reached all nodes will be sorted.
5247 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5250 // N is in sorted position, so all its uses have one less operand
5251 // that needs to be sorted.
5252 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5255 unsigned Degree = P->getNodeId();
5256 assert(Degree != 0 && "Invalid node degree");
5259 // All of P's operands are sorted, so P may sorted now.
5260 P->setNodeId(DAGSize++);
5262 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5263 assert(SortedPos != AllNodes.end() && "Overran node list");
5266 // Update P's outstanding operand count.
5267 P->setNodeId(Degree);
5270 if (I == SortedPos) {
5273 dbgs() << "Overran sorted position:\n";
5276 llvm_unreachable(0);
5280 assert(SortedPos == AllNodes.end() &&
5281 "Topological sort incomplete!");
5282 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5283 "First node in topological sort is not the entry token!");
5284 assert(AllNodes.front().getNodeId() == 0 &&
5285 "First node in topological sort has non-zero id!");
5286 assert(AllNodes.front().getNumOperands() == 0 &&
5287 "First node in topological sort has operands!");
5288 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5289 "Last node in topologic sort has unexpected id!");
5290 assert(AllNodes.back().use_empty() &&
5291 "Last node in topologic sort has users!");
5292 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5296 /// AssignOrdering - Assign an order to the SDNode.
5297 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5298 assert(SD && "Trying to assign an order to a null node!");
5299 Ordering->add(SD, Order);
5302 /// GetOrdering - Get the order for the SDNode.
5303 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5304 assert(SD && "Trying to get the order of a null node!");
5305 return Ordering->getOrder(SD);
5309 //===----------------------------------------------------------------------===//
5311 //===----------------------------------------------------------------------===//
5313 HandleSDNode::~HandleSDNode() {
5317 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5318 EVT VT, int64_t o, unsigned char TF)
5319 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5320 Offset(o), TargetFlags(TF) {
5321 TheGlobal = const_cast<GlobalValue*>(GA);
5324 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5325 MachineMemOperand *mmo)
5326 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5327 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5328 MMO->isNonTemporal());
5329 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5330 assert(isNonTemporal() == MMO->isNonTemporal() &&
5331 "Non-temporal encoding error!");
5332 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5335 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5336 const SDValue *Ops, unsigned NumOps, EVT memvt,
5337 MachineMemOperand *mmo)
5338 : SDNode(Opc, dl, VTs, Ops, NumOps),
5339 MemoryVT(memvt), MMO(mmo) {
5340 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5341 MMO->isNonTemporal());
5342 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5343 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5346 /// Profile - Gather unique data for the node.
5348 void SDNode::Profile(FoldingSetNodeID &ID) const {
5349 AddNodeIDNode(ID, this);
5354 std::vector<EVT> VTs;
5357 VTs.reserve(MVT::LAST_VALUETYPE);
5358 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5359 VTs.push_back(MVT((MVT::SimpleValueType)i));
5364 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5365 static ManagedStatic<EVTArray> SimpleVTArray;
5366 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5368 /// getValueTypeList - Return a pointer to the specified value type.
5370 const EVT *SDNode::getValueTypeList(EVT VT) {
5371 if (VT.isExtended()) {
5372 sys::SmartScopedLock<true> Lock(*VTMutex);
5373 return &(*EVTs->insert(VT).first);
5375 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5379 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5380 /// indicated value. This method ignores uses of other values defined by this
5382 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5383 assert(Value < getNumValues() && "Bad value!");
5385 // TODO: Only iterate over uses of a given value of the node
5386 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5387 if (UI.getUse().getResNo() == Value) {
5394 // Found exactly the right number of uses?
5399 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5400 /// value. This method ignores uses of other values defined by this operation.
5401 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5402 assert(Value < getNumValues() && "Bad value!");
5404 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5405 if (UI.getUse().getResNo() == Value)
5412 /// isOnlyUserOf - Return true if this node is the only use of N.
5414 bool SDNode::isOnlyUserOf(SDNode *N) const {
5416 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5427 /// isOperand - Return true if this node is an operand of N.
5429 bool SDValue::isOperandOf(SDNode *N) const {
5430 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5431 if (*this == N->getOperand(i))
5436 bool SDNode::isOperandOf(SDNode *N) const {
5437 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5438 if (this == N->OperandList[i].getNode())
5443 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5444 /// be a chain) reaches the specified operand without crossing any
5445 /// side-effecting instructions. In practice, this looks through token
5446 /// factors and non-volatile loads. In order to remain efficient, this only
5447 /// looks a couple of nodes in, it does not do an exhaustive search.
5448 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5449 unsigned Depth) const {
5450 if (*this == Dest) return true;
5452 // Don't search too deeply, we just want to be able to see through
5453 // TokenFactor's etc.
5454 if (Depth == 0) return false;
5456 // If this is a token factor, all inputs to the TF happen in parallel. If any
5457 // of the operands of the TF reach dest, then we can do the xform.
5458 if (getOpcode() == ISD::TokenFactor) {
5459 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5460 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5465 // Loads don't have side effects, look through them.
5466 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5467 if (!Ld->isVolatile())
5468 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5473 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5474 /// is either an operand of N or it can be reached by traversing up the operands.
5475 /// NOTE: this is an expensive method. Use it carefully.
5476 bool SDNode::isPredecessorOf(SDNode *N) const {
5477 SmallPtrSet<SDNode *, 32> Visited;
5478 SmallVector<SDNode *, 16> Worklist;
5479 Worklist.push_back(N);
5482 N = Worklist.pop_back_val();
5483 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5484 SDNode *Op = N->getOperand(i).getNode();
5487 if (Visited.insert(Op))
5488 Worklist.push_back(Op);
5490 } while (!Worklist.empty());
5495 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5496 assert(Num < NumOperands && "Invalid child # of SDNode!");
5497 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5500 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5501 switch (getOpcode()) {
5503 if (getOpcode() < ISD::BUILTIN_OP_END)
5504 return "<<Unknown DAG Node>>";
5505 if (isMachineOpcode()) {
5507 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5508 if (getMachineOpcode() < TII->getNumOpcodes())
5509 return TII->get(getMachineOpcode()).getName();
5510 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5513 const TargetLowering &TLI = G->getTargetLoweringInfo();
5514 const char *Name = TLI.getTargetNodeName(getOpcode());
5515 if (Name) return Name;
5516 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5518 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5521 case ISD::DELETED_NODE:
5522 return "<<Deleted Node!>>";
5524 case ISD::PREFETCH: return "Prefetch";
5525 case ISD::MEMBARRIER: return "MemBarrier";
5526 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5527 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5528 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5529 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5530 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5531 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5532 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5533 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5534 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5535 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5536 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5537 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5538 case ISD::PCMARKER: return "PCMarker";
5539 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5540 case ISD::SRCVALUE: return "SrcValue";
5541 case ISD::EntryToken: return "EntryToken";
5542 case ISD::TokenFactor: return "TokenFactor";
5543 case ISD::AssertSext: return "AssertSext";
5544 case ISD::AssertZext: return "AssertZext";
5546 case ISD::BasicBlock: return "BasicBlock";
5547 case ISD::VALUETYPE: return "ValueType";
5548 case ISD::Register: return "Register";
5550 case ISD::Constant: return "Constant";
5551 case ISD::ConstantFP: return "ConstantFP";
5552 case ISD::GlobalAddress: return "GlobalAddress";
5553 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5554 case ISD::FrameIndex: return "FrameIndex";
5555 case ISD::JumpTable: return "JumpTable";
5556 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5557 case ISD::RETURNADDR: return "RETURNADDR";
5558 case ISD::FRAMEADDR: return "FRAMEADDR";
5559 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5560 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5561 case ISD::LSDAADDR: return "LSDAADDR";
5562 case ISD::EHSELECTION: return "EHSELECTION";
5563 case ISD::EH_RETURN: return "EH_RETURN";
5564 case ISD::ConstantPool: return "ConstantPool";
5565 case ISD::ExternalSymbol: return "ExternalSymbol";
5566 case ISD::BlockAddress: return "BlockAddress";
5567 case ISD::INTRINSIC_WO_CHAIN:
5568 case ISD::INTRINSIC_VOID:
5569 case ISD::INTRINSIC_W_CHAIN: {
5570 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5571 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5572 if (IID < Intrinsic::num_intrinsics)
5573 return Intrinsic::getName((Intrinsic::ID)IID);
5574 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5575 return TII->getName(IID);
5576 llvm_unreachable("Invalid intrinsic ID");
5579 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5580 case ISD::TargetConstant: return "TargetConstant";
5581 case ISD::TargetConstantFP:return "TargetConstantFP";
5582 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5583 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5584 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5585 case ISD::TargetJumpTable: return "TargetJumpTable";
5586 case ISD::TargetConstantPool: return "TargetConstantPool";
5587 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5588 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5590 case ISD::CopyToReg: return "CopyToReg";
5591 case ISD::CopyFromReg: return "CopyFromReg";
5592 case ISD::UNDEF: return "undef";
5593 case ISD::MERGE_VALUES: return "merge_values";
5594 case ISD::INLINEASM: return "inlineasm";
5595 case ISD::EH_LABEL: return "eh_label";
5596 case ISD::HANDLENODE: return "handlenode";
5599 case ISD::FABS: return "fabs";
5600 case ISD::FNEG: return "fneg";
5601 case ISD::FSQRT: return "fsqrt";
5602 case ISD::FSIN: return "fsin";
5603 case ISD::FCOS: return "fcos";
5604 case ISD::FPOWI: return "fpowi";
5605 case ISD::FPOW: return "fpow";
5606 case ISD::FTRUNC: return "ftrunc";
5607 case ISD::FFLOOR: return "ffloor";
5608 case ISD::FCEIL: return "fceil";
5609 case ISD::FRINT: return "frint";
5610 case ISD::FNEARBYINT: return "fnearbyint";
5613 case ISD::ADD: return "add";
5614 case ISD::SUB: return "sub";
5615 case ISD::MUL: return "mul";
5616 case ISD::MULHU: return "mulhu";
5617 case ISD::MULHS: return "mulhs";
5618 case ISD::SDIV: return "sdiv";
5619 case ISD::UDIV: return "udiv";
5620 case ISD::SREM: return "srem";
5621 case ISD::UREM: return "urem";
5622 case ISD::SMUL_LOHI: return "smul_lohi";
5623 case ISD::UMUL_LOHI: return "umul_lohi";
5624 case ISD::SDIVREM: return "sdivrem";
5625 case ISD::UDIVREM: return "udivrem";
5626 case ISD::AND: return "and";
5627 case ISD::OR: return "or";
5628 case ISD::XOR: return "xor";
5629 case ISD::SHL: return "shl";
5630 case ISD::SRA: return "sra";
5631 case ISD::SRL: return "srl";
5632 case ISD::ROTL: return "rotl";
5633 case ISD::ROTR: return "rotr";
5634 case ISD::FADD: return "fadd";
5635 case ISD::FSUB: return "fsub";
5636 case ISD::FMUL: return "fmul";
5637 case ISD::FDIV: return "fdiv";
5638 case ISD::FREM: return "frem";
5639 case ISD::FCOPYSIGN: return "fcopysign";
5640 case ISD::FGETSIGN: return "fgetsign";
5642 case ISD::SETCC: return "setcc";
5643 case ISD::VSETCC: return "vsetcc";
5644 case ISD::SELECT: return "select";
5645 case ISD::SELECT_CC: return "select_cc";
5646 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5647 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5648 case ISD::CONCAT_VECTORS: return "concat_vectors";
5649 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5650 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5651 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5652 case ISD::CARRY_FALSE: return "carry_false";
5653 case ISD::ADDC: return "addc";
5654 case ISD::ADDE: return "adde";
5655 case ISD::SADDO: return "saddo";
5656 case ISD::UADDO: return "uaddo";
5657 case ISD::SSUBO: return "ssubo";
5658 case ISD::USUBO: return "usubo";
5659 case ISD::SMULO: return "smulo";
5660 case ISD::UMULO: return "umulo";
5661 case ISD::SUBC: return "subc";
5662 case ISD::SUBE: return "sube";
5663 case ISD::SHL_PARTS: return "shl_parts";
5664 case ISD::SRA_PARTS: return "sra_parts";
5665 case ISD::SRL_PARTS: return "srl_parts";
5667 // Conversion operators.
5668 case ISD::SIGN_EXTEND: return "sign_extend";
5669 case ISD::ZERO_EXTEND: return "zero_extend";
5670 case ISD::ANY_EXTEND: return "any_extend";
5671 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5672 case ISD::TRUNCATE: return "truncate";
5673 case ISD::FP_ROUND: return "fp_round";
5674 case ISD::FLT_ROUNDS_: return "flt_rounds";
5675 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5676 case ISD::FP_EXTEND: return "fp_extend";
5678 case ISD::SINT_TO_FP: return "sint_to_fp";
5679 case ISD::UINT_TO_FP: return "uint_to_fp";
5680 case ISD::FP_TO_SINT: return "fp_to_sint";
5681 case ISD::FP_TO_UINT: return "fp_to_uint";
5682 case ISD::BIT_CONVERT: return "bit_convert";
5684 case ISD::CONVERT_RNDSAT: {
5685 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5686 default: llvm_unreachable("Unknown cvt code!");
5687 case ISD::CVT_FF: return "cvt_ff";
5688 case ISD::CVT_FS: return "cvt_fs";
5689 case ISD::CVT_FU: return "cvt_fu";
5690 case ISD::CVT_SF: return "cvt_sf";
5691 case ISD::CVT_UF: return "cvt_uf";
5692 case ISD::CVT_SS: return "cvt_ss";
5693 case ISD::CVT_SU: return "cvt_su";
5694 case ISD::CVT_US: return "cvt_us";
5695 case ISD::CVT_UU: return "cvt_uu";
5699 // Control flow instructions
5700 case ISD::BR: return "br";
5701 case ISD::BRIND: return "brind";
5702 case ISD::BR_JT: return "br_jt";
5703 case ISD::BRCOND: return "brcond";
5704 case ISD::BR_CC: return "br_cc";
5705 case ISD::CALLSEQ_START: return "callseq_start";
5706 case ISD::CALLSEQ_END: return "callseq_end";
5709 case ISD::LOAD: return "load";
5710 case ISD::STORE: return "store";
5711 case ISD::VAARG: return "vaarg";
5712 case ISD::VACOPY: return "vacopy";
5713 case ISD::VAEND: return "vaend";
5714 case ISD::VASTART: return "vastart";
5715 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5716 case ISD::EXTRACT_ELEMENT: return "extract_element";
5717 case ISD::BUILD_PAIR: return "build_pair";
5718 case ISD::STACKSAVE: return "stacksave";
5719 case ISD::STACKRESTORE: return "stackrestore";
5720 case ISD::TRAP: return "trap";
5723 case ISD::BSWAP: return "bswap";
5724 case ISD::CTPOP: return "ctpop";
5725 case ISD::CTTZ: return "cttz";
5726 case ISD::CTLZ: return "ctlz";
5729 case ISD::TRAMPOLINE: return "trampoline";
5732 switch (cast<CondCodeSDNode>(this)->get()) {
5733 default: llvm_unreachable("Unknown setcc condition!");
5734 case ISD::SETOEQ: return "setoeq";
5735 case ISD::SETOGT: return "setogt";
5736 case ISD::SETOGE: return "setoge";
5737 case ISD::SETOLT: return "setolt";
5738 case ISD::SETOLE: return "setole";
5739 case ISD::SETONE: return "setone";
5741 case ISD::SETO: return "seto";
5742 case ISD::SETUO: return "setuo";
5743 case ISD::SETUEQ: return "setue";
5744 case ISD::SETUGT: return "setugt";
5745 case ISD::SETUGE: return "setuge";
5746 case ISD::SETULT: return "setult";
5747 case ISD::SETULE: return "setule";
5748 case ISD::SETUNE: return "setune";
5750 case ISD::SETEQ: return "seteq";
5751 case ISD::SETGT: return "setgt";
5752 case ISD::SETGE: return "setge";
5753 case ISD::SETLT: return "setlt";
5754 case ISD::SETLE: return "setle";
5755 case ISD::SETNE: return "setne";
5760 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5769 return "<post-inc>";
5771 return "<post-dec>";
5775 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5776 std::string S = "< ";
5790 if (getByValAlign())
5791 S += "byval-align:" + utostr(getByValAlign()) + " ";
5793 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5795 S += "byval-size:" + utostr(getByValSize()) + " ";
5799 void SDNode::dump() const { dump(0); }
5800 void SDNode::dump(const SelectionDAG *G) const {
5804 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5805 OS << (void*)this << ": ";
5807 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5809 if (getValueType(i) == MVT::Other)
5812 OS << getValueType(i).getEVTString();
5814 OS << " = " << getOperationName(G);
5817 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5818 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5819 if (!MN->memoperands_empty()) {
5822 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5823 e = MN->memoperands_end(); i != e; ++i) {
5830 } else if (const ShuffleVectorSDNode *SVN =
5831 dyn_cast<ShuffleVectorSDNode>(this)) {
5833 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5834 int Idx = SVN->getMaskElt(i);
5842 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5843 OS << '<' << CSDN->getAPIntValue() << '>';
5844 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5845 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5846 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5847 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5848 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5851 CSDN->getValueAPF().bitcastToAPInt().dump();
5854 } else if (const GlobalAddressSDNode *GADN =
5855 dyn_cast<GlobalAddressSDNode>(this)) {
5856 int64_t offset = GADN->getOffset();
5858 WriteAsOperand(OS, GADN->getGlobal());
5861 OS << " + " << offset;
5863 OS << " " << offset;
5864 if (unsigned int TF = GADN->getTargetFlags())
5865 OS << " [TF=" << TF << ']';
5866 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5867 OS << "<" << FIDN->getIndex() << ">";
5868 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5869 OS << "<" << JTDN->getIndex() << ">";
5870 if (unsigned int TF = JTDN->getTargetFlags())
5871 OS << " [TF=" << TF << ']';
5872 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5873 int offset = CP->getOffset();
5874 if (CP->isMachineConstantPoolEntry())
5875 OS << "<" << *CP->getMachineCPVal() << ">";
5877 OS << "<" << *CP->getConstVal() << ">";
5879 OS << " + " << offset;
5881 OS << " " << offset;
5882 if (unsigned int TF = CP->getTargetFlags())
5883 OS << " [TF=" << TF << ']';
5884 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5886 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5888 OS << LBB->getName() << " ";
5889 OS << (const void*)BBDN->getBasicBlock() << ">";
5890 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5891 if (G && R->getReg() &&
5892 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5893 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5895 OS << " %reg" << R->getReg();
5897 } else if (const ExternalSymbolSDNode *ES =
5898 dyn_cast<ExternalSymbolSDNode>(this)) {
5899 OS << "'" << ES->getSymbol() << "'";
5900 if (unsigned int TF = ES->getTargetFlags())
5901 OS << " [TF=" << TF << ']';
5902 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5904 OS << "<" << M->getValue() << ">";
5907 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5908 OS << ":" << N->getVT().getEVTString();
5910 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5911 OS << "<" << *LD->getMemOperand();
5914 switch (LD->getExtensionType()) {
5915 default: doExt = false; break;
5916 case ISD::EXTLOAD: OS << ", anyext"; break;
5917 case ISD::SEXTLOAD: OS << ", sext"; break;
5918 case ISD::ZEXTLOAD: OS << ", zext"; break;
5921 OS << " from " << LD->getMemoryVT().getEVTString();
5923 const char *AM = getIndexedModeName(LD->getAddressingMode());
5928 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5929 OS << "<" << *ST->getMemOperand();
5931 if (ST->isTruncatingStore())
5932 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5934 const char *AM = getIndexedModeName(ST->getAddressingMode());
5939 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5940 OS << "<" << *M->getMemOperand() << ">";
5941 } else if (const BlockAddressSDNode *BA =
5942 dyn_cast<BlockAddressSDNode>(this)) {
5944 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5946 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5948 if (unsigned int TF = BA->getTargetFlags())
5949 OS << " [TF=" << TF << ']';
5953 if (unsigned Order = G->GetOrdering(this))
5954 OS << " [ORD=" << Order << ']';
5956 if (getNodeId() != -1)
5957 OS << " [ID=" << getNodeId() << ']';
5960 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5962 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5963 if (i) OS << ", "; else OS << " ";
5964 OS << (void*)getOperand(i).getNode();
5965 if (unsigned RN = getOperand(i).getResNo())
5968 print_details(OS, G);
5971 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5972 const SelectionDAG *G, unsigned depth,
5985 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5987 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
5991 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
5992 unsigned depth) const {
5993 printrWithDepthHelper(OS, this, G, depth, 0);
5996 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
5997 // Don't print impossibly deep things.
5998 printrWithDepth(OS, G, 100);
6001 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6002 printrWithDepth(dbgs(), G, depth);
6005 void SDNode::dumprFull(const SelectionDAG *G) const {
6006 // Don't print impossibly deep things.
6007 dumprWithDepth(G, 100);
6010 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6011 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6012 if (N->getOperand(i).getNode()->hasOneUse())
6013 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6015 dbgs() << "\n" << std::string(indent+2, ' ')
6016 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6020 dbgs().indent(indent);
6024 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6025 assert(N->getNumValues() == 1 &&
6026 "Can't unroll a vector with multiple results!");
6028 EVT VT = N->getValueType(0);
6029 unsigned NE = VT.getVectorNumElements();
6030 EVT EltVT = VT.getVectorElementType();
6031 DebugLoc dl = N->getDebugLoc();
6033 SmallVector<SDValue, 8> Scalars;
6034 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6036 // If ResNE is 0, fully unroll the vector op.
6039 else if (NE > ResNE)
6043 for (i= 0; i != NE; ++i) {
6044 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6045 SDValue Operand = N->getOperand(j);
6046 EVT OperandVT = Operand.getValueType();
6047 if (OperandVT.isVector()) {
6048 // A vector operand; extract a single element.
6049 EVT OperandEltVT = OperandVT.getVectorElementType();
6050 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6053 getConstant(i, MVT::i32));
6055 // A scalar operand; just use it as is.
6056 Operands[j] = Operand;
6060 switch (N->getOpcode()) {
6062 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6063 &Operands[0], Operands.size()));
6070 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6071 getShiftAmountOperand(Operands[1])));
6073 case ISD::SIGN_EXTEND_INREG:
6074 case ISD::FP_ROUND_INREG: {
6075 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6076 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6078 getValueType(ExtVT)));
6083 for (; i < ResNE; ++i)
6084 Scalars.push_back(getUNDEF(EltVT));
6086 return getNode(ISD::BUILD_VECTOR, dl,
6087 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6088 &Scalars[0], Scalars.size());
6092 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6093 /// location that is 'Dist' units away from the location that the 'Base' load
6094 /// is loading from.
6095 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6096 unsigned Bytes, int Dist) const {
6097 if (LD->getChain() != Base->getChain())
6099 EVT VT = LD->getValueType(0);
6100 if (VT.getSizeInBits() / 8 != Bytes)
6103 SDValue Loc = LD->getOperand(1);
6104 SDValue BaseLoc = Base->getOperand(1);
6105 if (Loc.getOpcode() == ISD::FrameIndex) {
6106 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6108 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6109 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6110 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6111 int FS = MFI->getObjectSize(FI);
6112 int BFS = MFI->getObjectSize(BFI);
6113 if (FS != BFS || FS != (int)Bytes) return false;
6114 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6116 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6117 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6118 if (V && (V->getSExtValue() == Dist*Bytes))
6122 GlobalValue *GV1 = NULL;
6123 GlobalValue *GV2 = NULL;
6124 int64_t Offset1 = 0;
6125 int64_t Offset2 = 0;
6126 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6127 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6128 if (isGA1 && isGA2 && GV1 == GV2)
6129 return Offset1 == (Offset2 + Dist*Bytes);
6134 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6135 /// it cannot be inferred.
6136 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6137 // If this is a GlobalAddress + cst, return the alignment.
6139 int64_t GVOffset = 0;
6140 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
6141 return MinAlign(GV->getAlignment(), GVOffset);
6143 // If this is a direct reference to a stack slot, use information about the
6144 // stack slot's alignment.
6145 int FrameIdx = 1 << 31;
6146 int64_t FrameOffset = 0;
6147 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6148 FrameIdx = FI->getIndex();
6149 } else if (Ptr.getOpcode() == ISD::ADD &&
6150 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6151 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6152 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6153 FrameOffset = Ptr.getConstantOperandVal(1);
6156 if (FrameIdx != (1 << 31)) {
6157 // FIXME: Handle FI+CST.
6158 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6159 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6161 if (MFI.isFixedObjectIndex(FrameIdx)) {
6162 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6164 // The alignment of the frame index can be determined from its offset from
6165 // the incoming frame position. If the frame object is at offset 32 and
6166 // the stack is guaranteed to be 16-byte aligned, then we know that the
6167 // object is 16-byte aligned.
6168 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6169 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6171 // Finally, the frame object itself may have a known alignment. Factor
6172 // the alignment + offset into a new alignment. For example, if we know
6173 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6174 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6175 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6176 return std::max(Align, FIInfoAlign);
6184 void SelectionDAG::dump() const {
6185 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6187 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6189 const SDNode *N = I;
6190 if (!N->hasOneUse() && N != getRoot().getNode())
6191 DumpNodes(N, 2, this);
6194 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6199 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6201 print_details(OS, G);
6204 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6205 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6206 const SelectionDAG *G, VisitedSDNodeSet &once) {
6207 if (!once.insert(N)) // If we've been here before, return now.
6210 // Dump the current SDNode, but don't end the line yet.
6211 OS << std::string(indent, ' ');
6214 // Having printed this SDNode, walk the children:
6215 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6216 const SDNode *child = N->getOperand(i).getNode();
6221 if (child->getNumOperands() == 0) {
6222 // This child has no grandchildren; print it inline right here.
6223 child->printr(OS, G);
6225 } else { // Just the address. FIXME: also print the child's opcode.
6227 if (unsigned RN = N->getOperand(i).getResNo())
6234 // Dump children that have grandchildren on their own line(s).
6235 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6236 const SDNode *child = N->getOperand(i).getNode();
6237 DumpNodesr(OS, child, indent+2, G, once);
6241 void SDNode::dumpr() const {
6242 VisitedSDNodeSet once;
6243 DumpNodesr(dbgs(), this, 0, 0, once);
6246 void SDNode::dumpr(const SelectionDAG *G) const {
6247 VisitedSDNodeSet once;
6248 DumpNodesr(dbgs(), this, 0, G, once);
6252 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6253 unsigned GlobalAddressSDNode::getAddressSpace() const {
6254 return getGlobal()->getType()->getAddressSpace();
6258 const Type *ConstantPoolSDNode::getType() const {
6259 if (isMachineConstantPoolEntry())
6260 return Val.MachineCPVal->getType();
6261 return Val.ConstVal->getType();
6264 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6266 unsigned &SplatBitSize,
6268 unsigned MinSplatBits,
6270 EVT VT = getValueType(0);
6271 assert(VT.isVector() && "Expected a vector type");
6272 unsigned sz = VT.getSizeInBits();
6273 if (MinSplatBits > sz)
6276 SplatValue = APInt(sz, 0);
6277 SplatUndef = APInt(sz, 0);
6279 // Get the bits. Bits with undefined values (when the corresponding element
6280 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6281 // in SplatValue. If any of the values are not constant, give up and return
6283 unsigned int nOps = getNumOperands();
6284 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6285 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6287 for (unsigned j = 0; j < nOps; ++j) {
6288 unsigned i = isBigEndian ? nOps-1-j : j;
6289 SDValue OpVal = getOperand(i);
6290 unsigned BitPos = j * EltBitSize;
6292 if (OpVal.getOpcode() == ISD::UNDEF)
6293 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6294 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6295 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6296 zextOrTrunc(sz) << BitPos);
6297 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6298 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6303 // The build_vector is all constants or undefs. Find the smallest element
6304 // size that splats the vector.
6306 HasAnyUndefs = (SplatUndef != 0);
6309 unsigned HalfSize = sz / 2;
6310 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6311 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6312 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6313 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6315 // If the two halves do not match (ignoring undef bits), stop here.
6316 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6317 MinSplatBits > HalfSize)
6320 SplatValue = HighValue | LowValue;
6321 SplatUndef = HighUndef & LowUndef;
6330 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6331 // Find the first non-undef value in the shuffle mask.
6333 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6336 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6338 // Make sure all remaining elements are either undef or the same as the first
6340 for (int Idx = Mask[i]; i != e; ++i)
6341 if (Mask[i] >= 0 && Mask[i] != Idx)
6346 static void checkForCyclesHelper(const SDNode *N,
6347 std::set<const SDNode *> &visited,
6348 std::set<const SDNode *> &checked) {
6349 if (checked.find(N) != checked.end())
6352 if (visited.find(N) != visited.end()) {
6353 dbgs() << "Offending node:\n";
6355 assert(0 && "Detected cycle in SelectionDAG");
6358 std::set<const SDNode*>::iterator i;
6361 tie(i, inserted) = visited.insert(N);
6362 assert(inserted && "Missed cycle");
6364 for(unsigned i = 0; i < N->getNumOperands(); ++i) {
6365 checkForCyclesHelper(N->getOperand(i).getNode(), visited, checked);
6371 void llvm::checkForCycles(const llvm::SDNode *N) {
6373 assert(N && "Checking nonexistant SDNode");
6374 std::set<const SDNode *> visited;
6375 std::set<const SDNode *> checked;
6376 checkForCyclesHelper(N, visited, checked);
6380 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6381 checkForCycles(DAG->getRoot().getNode());