1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/Analysis/ValueTracking.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/DebugInfo.h"
30 #include "llvm/IR/CallingConv.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DataLayout.h"
33 #include "llvm/IR/DerivedTypes.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/GlobalAlias.h"
36 #include "llvm/IR/GlobalVariable.h"
37 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/Mutex.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Target/TargetInstrInfo.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetLowering.h"
48 #include "llvm/Target/TargetMachine.h"
49 #include "llvm/Target/TargetOptions.h"
50 #include "llvm/Target/TargetRegisterInfo.h"
51 #include "llvm/Target/TargetSelectionDAGInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 if (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 if (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 unsigned i = 0, e = N->getNumOperands();
155 // Skip over all of the undef values.
156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
159 // Do not accept an all-undef vector.
160 if (i == e) return false;
162 // Do not accept build_vectors that aren't all constants or which have non-0
164 SDValue Zero = N->getOperand(i);
165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
166 if (!CN->isNullValue())
168 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
169 if (!CFPN->getValueAPF().isPosZero())
174 // Okay, we have at least one 0 value, check to see if the rest match or are
176 for (++i; i != e; ++i)
177 if (N->getOperand(i) != Zero &&
178 N->getOperand(i).getOpcode() != ISD::UNDEF)
183 /// isScalarToVector - Return true if the specified node is a
184 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
185 /// element is not an undef.
186 bool ISD::isScalarToVector(const SDNode *N) {
187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
190 if (N->getOpcode() != ISD::BUILD_VECTOR)
192 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
194 unsigned NumElems = N->getNumOperands();
197 for (unsigned i = 1; i < NumElems; ++i) {
198 SDValue V = N->getOperand(i);
199 if (V.getOpcode() != ISD::UNDEF)
205 /// allOperandsUndef - Return true if the node has at least one operand
206 /// and all operands of the specified node are ISD::UNDEF.
207 bool ISD::allOperandsUndef(const SDNode *N) {
208 // Return false if the node has no operands.
209 // This is "logically inconsistent" with the definition of "all" but
210 // is probably the desired behavior.
211 if (N->getNumOperands() == 0)
214 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
215 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
221 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
222 /// when given the operation for (X op Y).
223 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
224 // To perform this operation, we just need to swap the L and G bits of the
226 unsigned OldL = (Operation >> 2) & 1;
227 unsigned OldG = (Operation >> 1) & 1;
228 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
229 (OldL << 1) | // New G bit
230 (OldG << 2)); // New L bit.
233 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
234 /// 'op' is a valid SetCC operation.
235 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
236 unsigned Operation = Op;
238 Operation ^= 7; // Flip L, G, E bits, but not U.
240 Operation ^= 15; // Flip all of the condition bits.
242 if (Operation > ISD::SETTRUE2)
243 Operation &= ~8; // Don't let N and U bits get set.
245 return ISD::CondCode(Operation);
249 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
250 /// signed operation and 2 if the result is an unsigned comparison. Return zero
251 /// if the operation does not depend on the sign of the input (setne and seteq).
252 static int isSignedOp(ISD::CondCode Opcode) {
254 default: llvm_unreachable("Illegal integer setcc operation!");
256 case ISD::SETNE: return 0;
260 case ISD::SETGE: return 1;
264 case ISD::SETUGE: return 2;
268 /// getSetCCOrOperation - Return the result of a logical OR between different
269 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
270 /// returns SETCC_INVALID if it is not possible to represent the resultant
272 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
274 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
275 // Cannot fold a signed integer setcc with an unsigned integer setcc.
276 return ISD::SETCC_INVALID;
278 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
280 // If the N and U bits get set then the resultant comparison DOES suddenly
281 // care about orderedness, and is true when ordered.
282 if (Op > ISD::SETTRUE2)
283 Op &= ~16; // Clear the U bit if the N bit is set.
285 // Canonicalize illegal integer setcc's.
286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
289 return ISD::CondCode(Op);
292 /// getSetCCAndOperation - Return the result of a logical AND between different
293 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
294 /// function returns zero if it is not possible to represent the resultant
296 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
299 // Cannot fold a signed setcc with an unsigned setcc.
300 return ISD::SETCC_INVALID;
302 // Combine all of the condition bits.
303 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
305 // Canonicalize illegal integer setcc's.
309 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
310 case ISD::SETOEQ: // SETEQ & SETU[LG]E
311 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
312 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
313 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
320 //===----------------------------------------------------------------------===//
321 // SDNode Profile Support
322 //===----------------------------------------------------------------------===//
324 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
326 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
330 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
331 /// solely with their pointer.
332 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
333 ID.AddPointer(VTList.VTs);
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDValue *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDUse *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 static void AddNodeIDNode(FoldingSetNodeID &ID,
357 unsigned short OpC, SDVTList VTList,
358 const SDValue *OpList, unsigned N) {
359 AddNodeIDOpcode(ID, OpC);
360 AddNodeIDValueTypes(ID, VTList);
361 AddNodeIDOperands(ID, OpList, N);
364 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
366 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
367 switch (N->getOpcode()) {
368 case ISD::TargetExternalSymbol:
369 case ISD::ExternalSymbol:
370 llvm_unreachable("Should only be used on nodes with operands");
371 default: break; // Normal nodes don't need extra info.
372 case ISD::TargetConstant:
374 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
376 case ISD::TargetConstantFP:
377 case ISD::ConstantFP: {
378 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
381 case ISD::TargetGlobalAddress:
382 case ISD::GlobalAddress:
383 case ISD::TargetGlobalTLSAddress:
384 case ISD::GlobalTLSAddress: {
385 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
386 ID.AddPointer(GA->getGlobal());
387 ID.AddInteger(GA->getOffset());
388 ID.AddInteger(GA->getTargetFlags());
389 ID.AddInteger(GA->getAddressSpace());
392 case ISD::BasicBlock:
393 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
396 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
398 case ISD::RegisterMask:
399 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
422 ID.AddInteger(CP->getTargetFlags());
425 case ISD::TargetIndex: {
426 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
427 ID.AddInteger(TI->getIndex());
428 ID.AddInteger(TI->getOffset());
429 ID.AddInteger(TI->getTargetFlags());
433 const LoadSDNode *LD = cast<LoadSDNode>(N);
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawSubclassData());
436 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
440 const StoreSDNode *ST = cast<StoreSDNode>(N);
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawSubclassData());
443 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX:
458 case ISD::ATOMIC_LOAD:
459 case ISD::ATOMIC_STORE: {
460 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
461 ID.AddInteger(AT->getMemoryVT().getRawBits());
462 ID.AddInteger(AT->getRawSubclassData());
463 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
466 case ISD::PREFETCH: {
467 const MemSDNode *PF = cast<MemSDNode>(N);
468 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
471 case ISD::VECTOR_SHUFFLE: {
472 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
475 ID.AddInteger(SVN->getMaskElt(i));
478 case ISD::TargetBlockAddress:
479 case ISD::BlockAddress: {
480 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
481 ID.AddPointer(BA->getBlockAddress());
482 ID.AddInteger(BA->getOffset());
483 ID.AddInteger(BA->getTargetFlags());
486 } // end switch (N->getOpcode())
488 // Target specific memory nodes could also have address spaces to check.
489 if (N->isTargetMemoryOpcode())
490 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
493 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
495 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
496 AddNodeIDOpcode(ID, N->getOpcode());
497 // Add the return value info.
498 AddNodeIDValueTypes(ID, N->getVTList());
499 // Add the operand info.
500 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
502 // Handle SDNode leafs with special info.
503 AddNodeIDCustom(ID, N);
506 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
507 /// the CSE map that carries volatility, temporalness, indexing mode, and
508 /// extension/truncation information.
510 static inline unsigned
511 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
512 bool isNonTemporal, bool isInvariant) {
513 assert((ConvType & 3) == ConvType &&
514 "ConvType may not require more than 2 bits!");
515 assert((AM & 7) == AM &&
516 "AM may not require more than 3 bits!");
520 (isNonTemporal << 6) |
524 //===----------------------------------------------------------------------===//
525 // SelectionDAG Class
526 //===----------------------------------------------------------------------===//
528 /// doNotCSE - Return true if CSE should not be performed for this node.
529 static bool doNotCSE(SDNode *N) {
530 if (N->getValueType(0) == MVT::Glue)
531 return true; // Never CSE anything that produces a flag.
533 switch (N->getOpcode()) {
535 case ISD::HANDLENODE:
537 return true; // Never CSE these nodes.
540 // Check that remaining values produced are not flags.
541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
542 if (N->getValueType(i) == MVT::Glue)
543 return true; // Never CSE anything that produces a flag.
548 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
550 void SelectionDAG::RemoveDeadNodes() {
551 // Create a dummy node (which is not added to allnodes), that adds a reference
552 // to the root node, preventing it from being deleted.
553 HandleSDNode Dummy(getRoot());
555 SmallVector<SDNode*, 128> DeadNodes;
557 // Add all obviously-dead nodes to the DeadNodes worklist.
558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
560 DeadNodes.push_back(I);
562 RemoveDeadNodes(DeadNodes);
564 // If the root changed (e.g. it was a dead load, update the root).
565 setRoot(Dummy.getValue());
568 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
569 /// given list, and any nodes that become unreachable as a result.
570 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
572 // Process the worklist, deleting the nodes and adding their uses to the
574 while (!DeadNodes.empty()) {
575 SDNode *N = DeadNodes.pop_back_val();
577 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
578 DUL->NodeDeleted(N, 0);
580 // Take the node out of the appropriate CSE map.
581 RemoveNodeFromCSEMaps(N);
583 // Next, brutally remove the operand list. This is safe to do, as there are
584 // no cycles in the graph.
585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
587 SDNode *Operand = Use.getNode();
590 // Now that we removed this operand, see if there are no uses of it left.
591 if (Operand->use_empty())
592 DeadNodes.push_back(Operand);
599 void SelectionDAG::RemoveDeadNode(SDNode *N){
600 SmallVector<SDNode*, 16> DeadNodes(1, N);
602 // Create a dummy node that adds a reference to the root node, preventing
603 // it from being deleted. (This matters if the root is an operand of the
605 HandleSDNode Dummy(getRoot());
607 RemoveDeadNodes(DeadNodes);
610 void SelectionDAG::DeleteNode(SDNode *N) {
611 // First take this out of the appropriate CSE map.
612 RemoveNodeFromCSEMaps(N);
614 // Finally, remove uses due to operands of this node, remove from the
615 // AllNodes list, and delete the node.
616 DeleteNodeNotInCSEMaps(N);
619 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
620 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
621 assert(N->use_empty() && "Cannot delete a node that is not dead!");
623 // Drop all of the operands and decrement used node's use counts.
629 void SelectionDAG::DeallocateNode(SDNode *N) {
630 if (N->OperandsNeedDelete)
631 delete[] N->OperandList;
633 // Set the opcode to DELETED_NODE to help catch bugs when node
634 // memory is reallocated.
635 N->NodeType = ISD::DELETED_NODE;
637 NodeAllocator.Deallocate(AllNodes.remove(N));
639 // Remove the ordering of this node.
642 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
643 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
644 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
645 DbgVals[i]->setIsInvalidated();
648 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
649 /// correspond to it. This is useful when we're about to delete or repurpose
650 /// the node. We don't want future request for structurally identical nodes
651 /// to return N anymore.
652 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
654 switch (N->getOpcode()) {
655 case ISD::HANDLENODE: return false; // noop.
657 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
658 "Cond code doesn't exist!");
659 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
660 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
662 case ISD::ExternalSymbol:
663 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
665 case ISD::TargetExternalSymbol: {
666 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
667 Erased = TargetExternalSymbols.erase(
668 std::pair<std::string,unsigned char>(ESN->getSymbol(),
669 ESN->getTargetFlags()));
672 case ISD::VALUETYPE: {
673 EVT VT = cast<VTSDNode>(N)->getVT();
674 if (VT.isExtended()) {
675 Erased = ExtendedValueTypeNodes.erase(VT);
677 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
678 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
683 // Remove it from the CSE Map.
684 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
685 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
686 Erased = CSEMap.RemoveNode(N);
690 // Verify that the node was actually in one of the CSE maps, unless it has a
691 // flag result (which cannot be CSE'd) or is one of the special cases that are
692 // not subject to CSE.
693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
694 !N->isMachineOpcode() && !doNotCSE(N)) {
697 llvm_unreachable("Node is not in map!");
703 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
704 /// maps and modified in place. Add it back to the CSE maps, unless an identical
705 /// node already exists, in which case transfer all its users to the existing
706 /// node. This transfer can potentially trigger recursive merging.
709 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
710 // For node types that aren't CSE'd, just act as if no identical node
713 SDNode *Existing = CSEMap.GetOrInsertNode(N);
715 // If there was already an existing matching node, use ReplaceAllUsesWith
716 // to replace the dead one with the existing one. This can cause
717 // recursive merging of other unrelated nodes down the line.
718 ReplaceAllUsesWith(N, Existing);
720 // N is now dead. Inform the listeners and delete it.
721 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
722 DUL->NodeDeleted(N, Existing);
723 DeleteNodeNotInCSEMaps(N);
728 // If the node doesn't already exist, we updated it. Inform listeners.
729 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
733 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
734 /// were replaced with those specified. If this node is never memoized,
735 /// return null, otherwise return a pointer to the slot it would take. If a
736 /// node already exists with these operands, the slot will be non-null.
737 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
742 SDValue Ops[] = { Op };
744 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
745 AddNodeIDCustom(ID, N);
746 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
750 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
751 /// were replaced with those specified. If this node is never memoized,
752 /// return null, otherwise return a pointer to the slot it would take. If a
753 /// node already exists with these operands, the slot will be non-null.
754 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
755 SDValue Op1, SDValue Op2,
760 SDValue Ops[] = { Op1, Op2 };
762 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
763 AddNodeIDCustom(ID, N);
764 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
769 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
770 /// were replaced with those specified. If this node is never memoized,
771 /// return null, otherwise return a pointer to the slot it would take. If a
772 /// node already exists with these operands, the slot will be non-null.
773 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
774 const SDValue *Ops,unsigned NumOps,
780 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
781 AddNodeIDCustom(ID, N);
782 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
787 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
788 static void VerifyNodeCommon(SDNode *N) {
789 switch (N->getOpcode()) {
792 case ISD::BUILD_PAIR: {
793 EVT VT = N->getValueType(0);
794 assert(N->getNumValues() == 1 && "Too many results!");
795 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
796 "Wrong return type!");
797 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
799 "Mismatched operand types!");
800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
801 "Wrong operand type!");
802 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
803 "Wrong return type size");
806 case ISD::BUILD_VECTOR: {
807 assert(N->getNumValues() == 1 && "Too many results!");
808 assert(N->getValueType(0).isVector() && "Wrong return type!");
809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
810 "Wrong number of operands!");
811 EVT EltVT = N->getValueType(0).getVectorElementType();
812 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
813 assert((I->getValueType() == EltVT ||
814 (EltVT.isInteger() && I->getValueType().isInteger() &&
815 EltVT.bitsLE(I->getValueType()))) &&
816 "Wrong operand type!");
817 assert(I->getValueType() == N->getOperand(0).getValueType() &&
818 "Operands must all have the same type");
825 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
826 static void VerifySDNode(SDNode *N) {
827 // The SDNode allocators cannot be used to allocate nodes with fields that are
828 // not present in an SDNode!
829 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
830 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
831 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
832 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
833 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
834 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
835 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
836 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
837 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
838 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
839 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
840 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
841 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
842 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
843 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
844 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
845 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
846 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
847 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
852 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
854 static void VerifyMachineNode(SDNode *N) {
855 // The MachineNode allocators cannot be used to allocate nodes with fields
856 // that are not present in a MachineNode!
857 // Currently there are no such nodes.
863 /// getEVTAlignment - Compute the default alignment value for the
866 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
867 Type *Ty = VT == MVT::iPTR ?
868 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
869 VT.getTypeForEVT(*getContext());
871 return TLI.getDataLayout()->getABITypeAlignment(Ty);
874 // EntryNode could meaningfully have debug info if we can find it...
875 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
876 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
877 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(),
878 getVTList(MVT::Other)),
879 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
880 AllNodes.push_back(&EntryNode);
881 Ordering = new SDNodeOrdering();
882 DbgInfo = new SDDbgInfo();
885 void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) {
888 Context = &mf.getFunction()->getContext();
891 SelectionDAG::~SelectionDAG() {
892 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
898 void SelectionDAG::allnodes_clear() {
899 assert(&*AllNodes.begin() == &EntryNode);
900 AllNodes.remove(AllNodes.begin());
901 while (!AllNodes.empty())
902 DeallocateNode(AllNodes.begin());
905 void SelectionDAG::clear() {
907 OperandAllocator.Reset();
910 ExtendedValueTypeNodes.clear();
911 ExternalSymbols.clear();
912 TargetExternalSymbols.clear();
913 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
914 static_cast<CondCodeSDNode*>(0));
915 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
916 static_cast<SDNode*>(0));
918 EntryNode.UseList = 0;
919 AllNodes.push_back(&EntryNode);
920 Root = getEntryNode();
925 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
926 return VT.bitsGT(Op.getValueType()) ?
927 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
928 getNode(ISD::TRUNCATE, DL, VT, Op);
931 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
932 return VT.bitsGT(Op.getValueType()) ?
933 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
934 getNode(ISD::TRUNCATE, DL, VT, Op);
937 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
938 return VT.bitsGT(Op.getValueType()) ?
939 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
940 getNode(ISD::TRUNCATE, DL, VT, Op);
943 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
944 assert(!VT.isVector() &&
945 "getZeroExtendInReg should use the vector element type instead of "
947 if (Op.getValueType() == VT) return Op;
948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
949 APInt Imm = APInt::getLowBitsSet(BitWidth,
951 return getNode(ISD::AND, DL, Op.getValueType(), Op,
952 getConstant(Imm, Op.getValueType()));
955 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
957 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
958 EVT EltVT = VT.getScalarType();
960 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
961 return getNode(ISD::XOR, DL, VT, Val, NegOne);
964 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
965 EVT EltVT = VT.getScalarType();
966 assert((EltVT.getSizeInBits() >= 64 ||
967 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
968 "getConstant with a uint64_t value that doesn't fit in the type!");
969 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
972 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
973 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
976 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
977 assert(VT.isInteger() && "Cannot create FP integer constant!");
979 EVT EltVT = VT.getScalarType();
980 const ConstantInt *Elt = &Val;
982 // In some cases the vector type is legal but the element type is illegal and
983 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
984 // inserted value (the type does not need to match the vector element type).
985 // Any extra bits introduced will be truncated away.
986 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
987 TargetLowering::TypePromoteInteger) {
988 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
989 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
990 Elt = ConstantInt::get(*getContext(), NewVal);
993 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
994 "APInt size does not match type size!");
995 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
997 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1001 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1003 return SDValue(N, 0);
1006 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1007 CSEMap.InsertNode(N, IP);
1008 AllNodes.push_back(N);
1011 SDValue Result(N, 0);
1012 if (VT.isVector()) {
1013 SmallVector<SDValue, 8> Ops;
1014 Ops.assign(VT.getVectorNumElements(), Result);
1015 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1020 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1021 return getConstant(Val, TLI.getPointerTy(), isTarget);
1025 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1026 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1029 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1030 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1032 EVT EltVT = VT.getScalarType();
1034 // Do the map lookup using the actual bit pattern for the floating point
1035 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1036 // we don't have issues with SNANs.
1037 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1038 FoldingSetNodeID ID;
1039 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1043 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1045 return SDValue(N, 0);
1048 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1049 CSEMap.InsertNode(N, IP);
1050 AllNodes.push_back(N);
1053 SDValue Result(N, 0);
1054 if (VT.isVector()) {
1055 SmallVector<SDValue, 8> Ops;
1056 Ops.assign(VT.getVectorNumElements(), Result);
1057 // FIXME DebugLoc info might be appropriate here
1058 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1063 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1064 EVT EltVT = VT.getScalarType();
1065 if (EltVT==MVT::f32)
1066 return getConstantFP(APFloat((float)Val), VT, isTarget);
1067 else if (EltVT==MVT::f64)
1068 return getConstantFP(APFloat(Val), VT, isTarget);
1069 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1072 APFloat apf = APFloat(Val);
1073 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1075 return getConstantFP(apf, VT, isTarget);
1077 llvm_unreachable("Unsupported type in getConstantFP");
1080 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1081 EVT VT, int64_t Offset,
1083 unsigned char TargetFlags) {
1084 assert((TargetFlags == 0 || isTargetGA) &&
1085 "Cannot set target flags on target-independent globals");
1087 // Truncate (with sign-extension) the offset value to the pointer size.
1088 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1090 Offset = SignExtend64(Offset, BitWidth);
1092 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1094 // If GV is an alias then use the aliasee for determining thread-localness.
1095 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1096 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1100 if (GVar && GVar->isThreadLocal())
1101 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1103 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1108 ID.AddInteger(Offset);
1109 ID.AddInteger(TargetFlags);
1110 ID.AddInteger(GV->getType()->getAddressSpace());
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1116 Offset, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1123 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1124 FoldingSetNodeID ID;
1125 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1129 return SDValue(E, 0);
1131 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1132 CSEMap.InsertNode(N, IP);
1133 AllNodes.push_back(N);
1134 return SDValue(N, 0);
1137 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1138 unsigned char TargetFlags) {
1139 assert((TargetFlags == 0 || isTarget) &&
1140 "Cannot set target flags on target-independent jump tables");
1141 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1142 FoldingSetNodeID ID;
1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1145 ID.AddInteger(TargetFlags);
1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1148 return SDValue(E, 0);
1150 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1152 CSEMap.InsertNode(N, IP);
1153 AllNodes.push_back(N);
1154 return SDValue(N, 0);
1157 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1158 unsigned Alignment, int Offset,
1160 unsigned char TargetFlags) {
1161 assert((TargetFlags == 0 || isTarget) &&
1162 "Cannot set target flags on target-independent globals");
1164 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1165 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1166 FoldingSetNodeID ID;
1167 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1168 ID.AddInteger(Alignment);
1169 ID.AddInteger(Offset);
1171 ID.AddInteger(TargetFlags);
1173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1174 return SDValue(E, 0);
1176 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1177 Alignment, TargetFlags);
1178 CSEMap.InsertNode(N, IP);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1184 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1185 unsigned Alignment, int Offset,
1187 unsigned char TargetFlags) {
1188 assert((TargetFlags == 0 || isTarget) &&
1189 "Cannot set target flags on target-independent globals");
1191 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1192 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1193 FoldingSetNodeID ID;
1194 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1195 ID.AddInteger(Alignment);
1196 ID.AddInteger(Offset);
1197 C->addSelectionDAGCSEId(ID);
1198 ID.AddInteger(TargetFlags);
1200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1201 return SDValue(E, 0);
1203 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1204 Alignment, TargetFlags);
1205 CSEMap.InsertNode(N, IP);
1206 AllNodes.push_back(N);
1207 return SDValue(N, 0);
1210 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1211 unsigned char TargetFlags) {
1212 FoldingSetNodeID ID;
1213 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1214 ID.AddInteger(Index);
1215 ID.AddInteger(Offset);
1216 ID.AddInteger(TargetFlags);
1218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1219 return SDValue(E, 0);
1221 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1223 CSEMap.InsertNode(N, IP);
1224 AllNodes.push_back(N);
1225 return SDValue(N, 0);
1228 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1229 FoldingSetNodeID ID;
1230 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1233 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1234 return SDValue(E, 0);
1236 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1237 CSEMap.InsertNode(N, IP);
1238 AllNodes.push_back(N);
1239 return SDValue(N, 0);
1242 SDValue SelectionDAG::getValueType(EVT VT) {
1243 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1244 ValueTypeNodes.size())
1245 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1247 SDNode *&N = VT.isExtended() ?
1248 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1250 if (N) return SDValue(N, 0);
1251 N = new (NodeAllocator) VTSDNode(VT);
1252 AllNodes.push_back(N);
1253 return SDValue(N, 0);
1256 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1257 SDNode *&N = ExternalSymbols[Sym];
1258 if (N) return SDValue(N, 0);
1259 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1260 AllNodes.push_back(N);
1261 return SDValue(N, 0);
1264 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1265 unsigned char TargetFlags) {
1267 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1269 if (N) return SDValue(N, 0);
1270 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1271 AllNodes.push_back(N);
1272 return SDValue(N, 0);
1275 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1276 if ((unsigned)Cond >= CondCodeNodes.size())
1277 CondCodeNodes.resize(Cond+1);
1279 if (CondCodeNodes[Cond] == 0) {
1280 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1281 CondCodeNodes[Cond] = N;
1282 AllNodes.push_back(N);
1285 return SDValue(CondCodeNodes[Cond], 0);
1288 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1289 // the shuffle mask M that point at N1 to point at N2, and indices that point
1290 // N2 to point at N1.
1291 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1293 int NElts = M.size();
1294 for (int i = 0; i != NElts; ++i) {
1302 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1303 SDValue N2, const int *Mask) {
1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1305 assert(VT.isVector() && N1.getValueType().isVector() &&
1306 "Vector Shuffle VTs must be a vectors");
1307 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1308 && "Vector Shuffle VTs must have same element type");
1310 // Canonicalize shuffle undef, undef -> undef
1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1312 return getUNDEF(VT);
1314 // Validate that all indices in Mask are within the range of the elements
1315 // input to the shuffle.
1316 unsigned NElts = VT.getVectorNumElements();
1317 SmallVector<int, 8> MaskVec;
1318 for (unsigned i = 0; i != NElts; ++i) {
1319 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1320 MaskVec.push_back(Mask[i]);
1323 // Canonicalize shuffle v, v -> v, undef
1326 for (unsigned i = 0; i != NElts; ++i)
1327 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1330 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1331 if (N1.getOpcode() == ISD::UNDEF)
1332 commuteShuffle(N1, N2, MaskVec);
1334 // Canonicalize all index into lhs, -> shuffle lhs, undef
1335 // Canonicalize all index into rhs, -> shuffle rhs, undef
1336 bool AllLHS = true, AllRHS = true;
1337 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1338 for (unsigned i = 0; i != NElts; ++i) {
1339 if (MaskVec[i] >= (int)NElts) {
1344 } else if (MaskVec[i] >= 0) {
1348 if (AllLHS && AllRHS)
1349 return getUNDEF(VT);
1350 if (AllLHS && !N2Undef)
1354 commuteShuffle(N1, N2, MaskVec);
1357 // If Identity shuffle, or all shuffle in to undef, return that node.
1358 bool AllUndef = true;
1359 bool Identity = true;
1360 for (unsigned i = 0; i != NElts; ++i) {
1361 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1362 if (MaskVec[i] >= 0) AllUndef = false;
1364 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1367 return getUNDEF(VT);
1369 FoldingSetNodeID ID;
1370 SDValue Ops[2] = { N1, N2 };
1371 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1372 for (unsigned i = 0; i != NElts; ++i)
1373 ID.AddInteger(MaskVec[i]);
1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1377 return SDValue(E, 0);
1379 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1380 // SDNode doesn't have access to it. This memory will be "leaked" when
1381 // the node is deallocated, but recovered when the NodeAllocator is released.
1382 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1383 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1385 ShuffleVectorSDNode *N =
1386 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1387 CSEMap.InsertNode(N, IP);
1388 AllNodes.push_back(N);
1389 return SDValue(N, 0);
1392 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1393 SDValue Val, SDValue DTy,
1394 SDValue STy, SDValue Rnd, SDValue Sat,
1395 ISD::CvtCode Code) {
1396 // If the src and dest types are the same and the conversion is between
1397 // integer types of the same sign or two floats, no conversion is necessary.
1399 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1402 FoldingSetNodeID ID;
1403 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1404 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1407 return SDValue(E, 0);
1409 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1416 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1417 FoldingSetNodeID ID;
1418 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1419 ID.AddInteger(RegNo);
1421 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1422 return SDValue(E, 0);
1424 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1425 CSEMap.InsertNode(N, IP);
1426 AllNodes.push_back(N);
1427 return SDValue(N, 0);
1430 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1431 FoldingSetNodeID ID;
1432 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1433 ID.AddPointer(RegMask);
1435 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1436 return SDValue(E, 0);
1438 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1439 CSEMap.InsertNode(N, IP);
1440 AllNodes.push_back(N);
1441 return SDValue(N, 0);
1444 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1445 FoldingSetNodeID ID;
1446 SDValue Ops[] = { Root };
1447 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1448 ID.AddPointer(Label);
1450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1451 return SDValue(E, 0);
1453 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1454 CSEMap.InsertNode(N, IP);
1455 AllNodes.push_back(N);
1456 return SDValue(N, 0);
1460 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1463 unsigned char TargetFlags) {
1464 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1466 FoldingSetNodeID ID;
1467 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1469 ID.AddInteger(Offset);
1470 ID.AddInteger(TargetFlags);
1472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1473 return SDValue(E, 0);
1475 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1477 CSEMap.InsertNode(N, IP);
1478 AllNodes.push_back(N);
1479 return SDValue(N, 0);
1482 SDValue SelectionDAG::getSrcValue(const Value *V) {
1483 assert((!V || V->getType()->isPointerTy()) &&
1484 "SrcValue is not a pointer?");
1486 FoldingSetNodeID ID;
1487 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1492 return SDValue(E, 0);
1494 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1495 CSEMap.InsertNode(N, IP);
1496 AllNodes.push_back(N);
1497 return SDValue(N, 0);
1500 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1501 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1502 FoldingSetNodeID ID;
1503 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1508 return SDValue(E, 0);
1510 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1511 CSEMap.InsertNode(N, IP);
1512 AllNodes.push_back(N);
1513 return SDValue(N, 0);
1517 /// getShiftAmountOperand - Return the specified value casted to
1518 /// the target's desired shift amount type.
1519 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1520 EVT OpTy = Op.getValueType();
1521 EVT ShTy = TLI.getShiftAmountTy(LHSTy);
1522 if (OpTy == ShTy || OpTy.isVector()) return Op;
1524 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1525 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1528 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1529 /// specified value type.
1530 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1531 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1532 unsigned ByteSize = VT.getStoreSize();
1533 Type *Ty = VT.getTypeForEVT(*getContext());
1534 unsigned StackAlign =
1535 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1537 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1538 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1541 /// CreateStackTemporary - Create a stack temporary suitable for holding
1542 /// either of the specified value types.
1543 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1544 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1545 VT2.getStoreSizeInBits())/8;
1546 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1547 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1548 const DataLayout *TD = TLI.getDataLayout();
1549 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1550 TD->getPrefTypeAlignment(Ty2));
1552 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1553 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1554 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1557 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1558 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1559 // These setcc operations always fold.
1563 case ISD::SETFALSE2: return getConstant(0, VT);
1565 case ISD::SETTRUE2: return getConstant(1, VT);
1577 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1581 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1582 const APInt &C2 = N2C->getAPIntValue();
1583 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1584 const APInt &C1 = N1C->getAPIntValue();
1587 default: llvm_unreachable("Unknown integer setcc!");
1588 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1589 case ISD::SETNE: return getConstant(C1 != C2, VT);
1590 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1591 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1592 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1593 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1594 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1595 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1596 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1597 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1601 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1602 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1603 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1606 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1607 return getUNDEF(VT);
1609 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1610 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1611 return getUNDEF(VT);
1613 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1614 R==APFloat::cmpLessThan, VT);
1615 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1616 return getUNDEF(VT);
1618 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1619 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1620 return getUNDEF(VT);
1622 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1623 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1624 return getUNDEF(VT);
1626 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1627 R==APFloat::cmpEqual, VT);
1628 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1629 return getUNDEF(VT);
1631 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1632 R==APFloat::cmpEqual, VT);
1633 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1634 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1635 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1636 R==APFloat::cmpEqual, VT);
1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1638 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1639 R==APFloat::cmpLessThan, VT);
1640 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1641 R==APFloat::cmpUnordered, VT);
1642 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1643 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1646 // Ensure that the constant occurs on the RHS.
1647 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1651 // Could not fold it.
1655 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1656 /// use this predicate to simplify operations downstream.
1657 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1658 // This predicate is not safe for vector operations.
1659 if (Op.getValueType().isVector())
1662 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1663 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1666 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1667 /// this predicate to simplify operations downstream. Mask is known to be zero
1668 /// for bits that V cannot have.
1669 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1670 unsigned Depth) const {
1671 APInt KnownZero, KnownOne;
1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1674 return (KnownZero & Mask) == Mask;
1677 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1678 /// known to be either zero or one and return them in the KnownZero/KnownOne
1679 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1681 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1682 APInt &KnownOne, unsigned Depth) const {
1683 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1687 return; // Limit search depth.
1689 APInt KnownZero2, KnownOne2;
1691 switch (Op.getOpcode()) {
1693 // We know all of the bits for a constant!
1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1695 KnownZero = ~KnownOne;
1698 // If either the LHS or the RHS are Zero, the result is zero.
1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1700 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1702 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1704 // Output known-1 bits are only known if set in both the LHS & RHS.
1705 KnownOne &= KnownOne2;
1706 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1707 KnownZero |= KnownZero2;
1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1715 // Output known-0 bits are only known if clear in both the LHS & RHS.
1716 KnownZero &= KnownZero2;
1717 // Output known-1 are known to be set if set in either the LHS | RHS.
1718 KnownOne |= KnownOne2;
1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1726 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1727 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1728 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1729 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1730 KnownZero = KnownZeroOut;
1734 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1735 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1739 // If low bits are zero in either operand, output low known-0 bits.
1740 // Also compute a conserative estimate for high known-0 bits.
1741 // More trickiness is possible, but this is sufficient for the
1742 // interesting case of alignment computation.
1743 KnownOne.clearAllBits();
1744 unsigned TrailZ = KnownZero.countTrailingOnes() +
1745 KnownZero2.countTrailingOnes();
1746 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1747 KnownZero2.countLeadingOnes(),
1748 BitWidth) - BitWidth;
1750 TrailZ = std::min(TrailZ, BitWidth);
1751 LeadZ = std::min(LeadZ, BitWidth);
1752 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1753 APInt::getHighBitsSet(BitWidth, LeadZ);
1757 // For the purposes of computing leading zeros we can conservatively
1758 // treat a udiv as a logical right shift by the power of 2 known to
1759 // be less than the denominator.
1760 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1761 unsigned LeadZ = KnownZero2.countLeadingOnes();
1763 KnownOne2.clearAllBits();
1764 KnownZero2.clearAllBits();
1765 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1766 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1767 if (RHSUnknownLeadingOnes != BitWidth)
1768 LeadZ = std::min(BitWidth,
1769 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1771 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1775 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1780 // Only known if known in both the LHS and RHS.
1781 KnownOne &= KnownOne2;
1782 KnownZero &= KnownZero2;
1784 case ISD::SELECT_CC:
1785 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1786 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1787 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1790 // Only known if known in both the LHS and RHS.
1791 KnownOne &= KnownOne2;
1792 KnownZero &= KnownZero2;
1800 if (Op.getResNo() != 1)
1802 // The boolean result conforms to getBooleanContents. Fall through.
1804 // If we know the result of a setcc has the top bits zero, use this info.
1805 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1806 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1810 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1811 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1812 unsigned ShAmt = SA->getZExtValue();
1814 // If the shift count is an invalid immediate, don't do anything.
1815 if (ShAmt >= BitWidth)
1818 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1819 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1820 KnownZero <<= ShAmt;
1822 // low bits known zero.
1823 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1827 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1828 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1829 unsigned ShAmt = SA->getZExtValue();
1831 // If the shift count is an invalid immediate, don't do anything.
1832 if (ShAmt >= BitWidth)
1835 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1837 KnownZero = KnownZero.lshr(ShAmt);
1838 KnownOne = KnownOne.lshr(ShAmt);
1840 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1841 KnownZero |= HighBits; // High bits known zero.
1845 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1846 unsigned ShAmt = SA->getZExtValue();
1848 // If the shift count is an invalid immediate, don't do anything.
1849 if (ShAmt >= BitWidth)
1852 // If any of the demanded bits are produced by the sign extension, we also
1853 // demand the input sign bit.
1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1856 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 KnownZero = KnownZero.lshr(ShAmt);
1859 KnownOne = KnownOne.lshr(ShAmt);
1861 // Handle the sign bits.
1862 APInt SignBit = APInt::getSignBit(BitWidth);
1863 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1865 if (KnownZero.intersects(SignBit)) {
1866 KnownZero |= HighBits; // New bits are known zero.
1867 } else if (KnownOne.intersects(SignBit)) {
1868 KnownOne |= HighBits; // New bits are known one.
1872 case ISD::SIGN_EXTEND_INREG: {
1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 unsigned EBits = EVT.getScalarType().getSizeInBits();
1876 // Sign extension. Compute the demanded bits in the result that are not
1877 // present in the input.
1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1880 APInt InSignBit = APInt::getSignBit(EBits);
1881 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1883 // If the sign extended bits are demanded, we know that the sign
1885 InSignBit = InSignBit.zext(BitWidth);
1886 if (NewBits.getBoolValue())
1887 InputDemandedBits |= InSignBit;
1889 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1890 KnownOne &= InputDemandedBits;
1891 KnownZero &= InputDemandedBits;
1892 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1894 // If the sign bit of the input is known set or clear, then we know the
1895 // top bits of the result.
1896 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1897 KnownZero |= NewBits;
1898 KnownOne &= ~NewBits;
1899 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1900 KnownOne |= NewBits;
1901 KnownZero &= ~NewBits;
1902 } else { // Input sign bit unknown
1903 KnownZero &= ~NewBits;
1904 KnownOne &= ~NewBits;
1909 case ISD::CTTZ_ZERO_UNDEF:
1911 case ISD::CTLZ_ZERO_UNDEF:
1913 unsigned LowBits = Log2_32(BitWidth)+1;
1914 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1915 KnownOne.clearAllBits();
1919 LoadSDNode *LD = cast<LoadSDNode>(Op);
1920 // If this is a ZEXTLoad and we are looking at the loaded value.
1921 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
1922 EVT VT = LD->getMemoryVT();
1923 unsigned MemBits = VT.getScalarType().getSizeInBits();
1924 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1925 } else if (const MDNode *Ranges = LD->getRanges()) {
1926 computeMaskedBitsLoad(*Ranges, KnownZero);
1930 case ISD::ZERO_EXTEND: {
1931 EVT InVT = Op.getOperand(0).getValueType();
1932 unsigned InBits = InVT.getScalarType().getSizeInBits();
1933 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1934 KnownZero = KnownZero.trunc(InBits);
1935 KnownOne = KnownOne.trunc(InBits);
1936 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1937 KnownZero = KnownZero.zext(BitWidth);
1938 KnownOne = KnownOne.zext(BitWidth);
1939 KnownZero |= NewBits;
1942 case ISD::SIGN_EXTEND: {
1943 EVT InVT = Op.getOperand(0).getValueType();
1944 unsigned InBits = InVT.getScalarType().getSizeInBits();
1945 APInt InSignBit = APInt::getSignBit(InBits);
1946 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1948 KnownZero = KnownZero.trunc(InBits);
1949 KnownOne = KnownOne.trunc(InBits);
1950 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1952 // Note if the sign bit is known to be zero or one.
1953 bool SignBitKnownZero = KnownZero.isNegative();
1954 bool SignBitKnownOne = KnownOne.isNegative();
1955 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1956 "Sign bit can't be known to be both zero and one!");
1958 KnownZero = KnownZero.zext(BitWidth);
1959 KnownOne = KnownOne.zext(BitWidth);
1961 // If the sign bit is known zero or one, the top bits match.
1962 if (SignBitKnownZero)
1963 KnownZero |= NewBits;
1964 else if (SignBitKnownOne)
1965 KnownOne |= NewBits;
1968 case ISD::ANY_EXTEND: {
1969 EVT InVT = Op.getOperand(0).getValueType();
1970 unsigned InBits = InVT.getScalarType().getSizeInBits();
1971 KnownZero = KnownZero.trunc(InBits);
1972 KnownOne = KnownOne.trunc(InBits);
1973 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1974 KnownZero = KnownZero.zext(BitWidth);
1975 KnownOne = KnownOne.zext(BitWidth);
1978 case ISD::TRUNCATE: {
1979 EVT InVT = Op.getOperand(0).getValueType();
1980 unsigned InBits = InVT.getScalarType().getSizeInBits();
1981 KnownZero = KnownZero.zext(InBits);
1982 KnownOne = KnownOne.zext(InBits);
1983 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1984 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1985 KnownZero = KnownZero.trunc(BitWidth);
1986 KnownOne = KnownOne.trunc(BitWidth);
1989 case ISD::AssertZext: {
1990 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1991 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1992 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1993 KnownZero |= (~InMask);
1994 KnownOne &= (~KnownZero);
1998 // All bits are zero except the low bit.
1999 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2003 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2004 // We know that the top bits of C-X are clear if X contains less bits
2005 // than C (i.e. no wrap-around can happen). For example, 20-X is
2006 // positive if we can prove that X is >= 0 and < 16.
2007 if (CLHS->getAPIntValue().isNonNegative()) {
2008 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2009 // NLZ can't be BitWidth with no sign bit
2010 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2011 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2013 // If all of the MaskV bits are known to be zero, then we know the
2014 // output top bits are zero, because we now know that the output is
2016 if ((KnownZero2 & MaskV) == MaskV) {
2017 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2018 // Top bits known zero.
2019 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2027 // Output known-0 bits are known if clear or set in both the low clear bits
2028 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2029 // low 3 bits clear.
2030 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2031 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2032 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2034 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2035 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2036 KnownZeroOut = std::min(KnownZeroOut,
2037 KnownZero2.countTrailingOnes());
2039 if (Op.getOpcode() == ISD::ADD) {
2040 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2044 // With ADDE, a carry bit may be added in, so we can only use this
2045 // information if we know (at least) that the low two bits are clear. We
2046 // then return to the caller that the low bit is unknown but that other bits
2048 if (KnownZeroOut >= 2) // ADDE
2049 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2053 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2054 const APInt &RA = Rem->getAPIntValue().abs();
2055 if (RA.isPowerOf2()) {
2056 APInt LowBits = RA - 1;
2057 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2058 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2060 // The low bits of the first operand are unchanged by the srem.
2061 KnownZero = KnownZero2 & LowBits;
2062 KnownOne = KnownOne2 & LowBits;
2064 // If the first operand is non-negative or has all low bits zero, then
2065 // the upper bits are all zero.
2066 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2067 KnownZero |= ~LowBits;
2069 // If the first operand is negative and not all low bits are zero, then
2070 // the upper bits are all one.
2071 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2072 KnownOne |= ~LowBits;
2073 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2078 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2079 const APInt &RA = Rem->getAPIntValue();
2080 if (RA.isPowerOf2()) {
2081 APInt LowBits = (RA - 1);
2082 KnownZero |= ~LowBits;
2083 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2084 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2089 // Since the result is less than or equal to either operand, any leading
2090 // zero bits in either operand must also exist in the result.
2091 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2092 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2094 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2095 KnownZero2.countLeadingOnes());
2096 KnownOne.clearAllBits();
2097 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2100 case ISD::FrameIndex:
2101 case ISD::TargetFrameIndex:
2102 if (unsigned Align = InferPtrAlignment(Op)) {
2103 // The low bits are known zero if the pointer is aligned.
2104 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2110 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2113 case ISD::INTRINSIC_WO_CHAIN:
2114 case ISD::INTRINSIC_W_CHAIN:
2115 case ISD::INTRINSIC_VOID:
2116 // Allow the target to implement this method for its nodes.
2117 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2122 /// ComputeNumSignBits - Return the number of times the sign bit of the
2123 /// register is replicated into the other bits. We know that at least 1 bit
2124 /// is always equal to the sign bit (itself), but other cases can give us
2125 /// information. For example, immediately after an "SRA X, 2", we know that
2126 /// the top 3 bits are all equal to each other, so we return 3.
2127 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2128 EVT VT = Op.getValueType();
2129 assert(VT.isInteger() && "Invalid VT!");
2130 unsigned VTBits = VT.getScalarType().getSizeInBits();
2132 unsigned FirstAnswer = 1;
2135 return 1; // Limit search depth.
2137 switch (Op.getOpcode()) {
2139 case ISD::AssertSext:
2140 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2141 return VTBits-Tmp+1;
2142 case ISD::AssertZext:
2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2146 case ISD::Constant: {
2147 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2148 return Val.getNumSignBits();
2151 case ISD::SIGN_EXTEND:
2152 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2153 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2155 case ISD::SIGN_EXTEND_INREG:
2156 // Max of the input and what this extends.
2158 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2161 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2162 return std::max(Tmp, Tmp2);
2165 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2166 // SRA X, C -> adds C sign bits.
2167 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2168 Tmp += C->getZExtValue();
2169 if (Tmp > VTBits) Tmp = VTBits;
2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2174 // shl destroys sign bits.
2175 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2176 if (C->getZExtValue() >= VTBits || // Bad shift.
2177 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2178 return Tmp - C->getZExtValue();
2183 case ISD::XOR: // NOT is handled here.
2184 // Logical binary ops preserve the number of sign bits at the worst.
2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2187 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2188 FirstAnswer = std::min(Tmp, Tmp2);
2189 // We computed what we know about the sign bits as our first
2190 // answer. Now proceed to the generic code that uses
2191 // ComputeMaskedBits, and pick whichever answer is better.
2196 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2197 if (Tmp == 1) return 1; // Early out.
2198 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2199 return std::min(Tmp, Tmp2);
2207 if (Op.getResNo() != 1)
2209 // The boolean result conforms to getBooleanContents. Fall through.
2211 // If setcc returns 0/-1, all bits are sign bits.
2212 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2213 TargetLowering::ZeroOrNegativeOneBooleanContent)
2218 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2219 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2221 // Handle rotate right by N like a rotate left by 32-N.
2222 if (Op.getOpcode() == ISD::ROTR)
2223 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2225 // If we aren't rotating out all of the known-in sign bits, return the
2226 // number that are left. This handles rotl(sext(x), 1) for example.
2227 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2228 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2232 // Add can have at most one carry bit. Thus we know that the output
2233 // is, at worst, one more bit than the inputs.
2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2235 if (Tmp == 1) return 1; // Early out.
2237 // Special case decrementing a value (ADD X, -1):
2238 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2239 if (CRHS->isAllOnesValue()) {
2240 APInt KnownZero, KnownOne;
2241 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2243 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2245 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2248 // If we are subtracting one from a positive number, there is no carry
2249 // out of the result.
2250 if (KnownZero.isNegative())
2254 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2255 if (Tmp2 == 1) return 1;
2256 return std::min(Tmp, Tmp2)-1;
2259 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2260 if (Tmp2 == 1) return 1;
2263 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2264 if (CLHS->isNullValue()) {
2265 APInt KnownZero, KnownOne;
2266 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2267 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2269 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2272 // If the input is known to be positive (the sign bit is known clear),
2273 // the output of the NEG has the same number of sign bits as the input.
2274 if (KnownZero.isNegative())
2277 // Otherwise, we treat this like a SUB.
2280 // Sub can have at most one carry bit. Thus we know that the output
2281 // is, at worst, one more bit than the inputs.
2282 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2283 if (Tmp == 1) return 1; // Early out.
2284 return std::min(Tmp, Tmp2)-1;
2286 // FIXME: it's tricky to do anything useful for this, but it is an important
2287 // case for targets like X86.
2291 // If we are looking at the loaded value of the SDNode.
2292 if (Op.getResNo() == 0) {
2293 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2294 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2295 unsigned ExtType = LD->getExtensionType();
2298 case ISD::SEXTLOAD: // '17' bits known
2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2300 return VTBits-Tmp+1;
2301 case ISD::ZEXTLOAD: // '16' bits known
2302 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2308 // Allow the target to implement this method for its nodes.
2309 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2310 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2311 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2312 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2313 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2314 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2317 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2318 // use this information.
2319 APInt KnownZero, KnownOne;
2320 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2323 if (KnownZero.isNegative()) { // sign bit is 0
2325 } else if (KnownOne.isNegative()) { // sign bit is 1;
2332 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2333 // the number of identical bits in the top of the input value.
2335 Mask <<= Mask.getBitWidth()-VTBits;
2336 // Return # leading zeros. We use 'min' here in case Val was zero before
2337 // shifting. We don't want to return '64' as for an i32 "0".
2338 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2341 /// isBaseWithConstantOffset - Return true if the specified operand is an
2342 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2343 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2344 /// semantics as an ADD. This handles the equivalence:
2345 /// X|Cst == X+Cst iff X&Cst = 0.
2346 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2347 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2348 !isa<ConstantSDNode>(Op.getOperand(1)))
2351 if (Op.getOpcode() == ISD::OR &&
2352 !MaskedValueIsZero(Op.getOperand(0),
2353 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2360 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2361 // If we're told that NaNs won't happen, assume they won't.
2362 if (getTarget().Options.NoNaNsFPMath)
2365 // If the value is a constant, we can obviously see if it is a NaN or not.
2366 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2367 return !C->getValueAPF().isNaN();
2369 // TODO: Recognize more cases here.
2374 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2375 // If the value is a constant, we can obviously see if it is a zero or not.
2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2377 return !C->isZero();
2379 // TODO: Recognize more cases here.
2380 switch (Op.getOpcode()) {
2383 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2384 return !C->isNullValue();
2391 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2392 // Check the obvious case.
2393 if (A == B) return true;
2395 // For for negative and positive zero.
2396 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2397 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2398 if (CA->isZero() && CB->isZero()) return true;
2400 // Otherwise they may not be equal.
2404 /// getNode - Gets or creates the specified node.
2406 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2407 FoldingSetNodeID ID;
2408 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2411 return SDValue(E, 0);
2413 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2414 CSEMap.InsertNode(N, IP);
2416 AllNodes.push_back(N);
2420 return SDValue(N, 0);
2423 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2424 EVT VT, SDValue Operand) {
2425 // Constant fold unary operations with an integer constant operand.
2426 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2427 const APInt &Val = C->getAPIntValue();
2430 case ISD::SIGN_EXTEND:
2431 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2432 case ISD::ANY_EXTEND:
2433 case ISD::ZERO_EXTEND:
2435 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2436 case ISD::UINT_TO_FP:
2437 case ISD::SINT_TO_FP: {
2438 APFloat apf(EVTToAPFloatSemantics(VT),
2439 APInt::getNullValue(VT.getSizeInBits()));
2440 (void)apf.convertFromAPInt(Val,
2441 Opcode==ISD::SINT_TO_FP,
2442 APFloat::rmNearestTiesToEven);
2443 return getConstantFP(apf, VT);
2446 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2447 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2448 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2449 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2452 return getConstant(Val.byteSwap(), VT);
2454 return getConstant(Val.countPopulation(), VT);
2456 case ISD::CTLZ_ZERO_UNDEF:
2457 return getConstant(Val.countLeadingZeros(), VT);
2459 case ISD::CTTZ_ZERO_UNDEF:
2460 return getConstant(Val.countTrailingZeros(), VT);
2464 // Constant fold unary operations with a floating point constant operand.
2465 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2466 APFloat V = C->getValueAPF(); // make copy
2470 return getConstantFP(V, VT);
2473 return getConstantFP(V, VT);
2475 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2476 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2477 return getConstantFP(V, VT);
2481 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2482 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2483 return getConstantFP(V, VT);
2487 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2488 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2489 return getConstantFP(V, VT);
2492 case ISD::FP_EXTEND: {
2494 // This can return overflow, underflow, or inexact; we don't care.
2495 // FIXME need to be more flexible about rounding mode.
2496 (void)V.convert(EVTToAPFloatSemantics(VT),
2497 APFloat::rmNearestTiesToEven, &ignored);
2498 return getConstantFP(V, VT);
2500 case ISD::FP_TO_SINT:
2501 case ISD::FP_TO_UINT: {
2504 assert(integerPartWidth >= 64);
2505 // FIXME need to be more flexible about rounding mode.
2506 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2507 Opcode==ISD::FP_TO_SINT,
2508 APFloat::rmTowardZero, &ignored);
2509 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2511 APInt api(VT.getSizeInBits(), x);
2512 return getConstant(api, VT);
2515 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2516 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2517 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2518 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2523 unsigned OpOpcode = Operand.getNode()->getOpcode();
2525 case ISD::TokenFactor:
2526 case ISD::MERGE_VALUES:
2527 case ISD::CONCAT_VECTORS:
2528 return Operand; // Factor, merge or concat of one node? No need.
2529 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2530 case ISD::FP_EXTEND:
2531 assert(VT.isFloatingPoint() &&
2532 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2533 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2534 assert((!VT.isVector() ||
2535 VT.getVectorNumElements() ==
2536 Operand.getValueType().getVectorNumElements()) &&
2537 "Vector element count mismatch!");
2538 if (Operand.getOpcode() == ISD::UNDEF)
2539 return getUNDEF(VT);
2541 case ISD::SIGN_EXTEND:
2542 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2543 "Invalid SIGN_EXTEND!");
2544 if (Operand.getValueType() == VT) return Operand; // noop extension
2545 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2546 "Invalid sext node, dst < src!");
2547 assert((!VT.isVector() ||
2548 VT.getVectorNumElements() ==
2549 Operand.getValueType().getVectorNumElements()) &&
2550 "Vector element count mismatch!");
2551 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2552 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2553 else if (OpOpcode == ISD::UNDEF)
2554 // sext(undef) = 0, because the top bits will all be the same.
2555 return getConstant(0, VT);
2557 case ISD::ZERO_EXTEND:
2558 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2559 "Invalid ZERO_EXTEND!");
2560 if (Operand.getValueType() == VT) return Operand; // noop extension
2561 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2562 "Invalid zext node, dst < src!");
2563 assert((!VT.isVector() ||
2564 VT.getVectorNumElements() ==
2565 Operand.getValueType().getVectorNumElements()) &&
2566 "Vector element count mismatch!");
2567 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2568 return getNode(ISD::ZERO_EXTEND, DL, VT,
2569 Operand.getNode()->getOperand(0));
2570 else if (OpOpcode == ISD::UNDEF)
2571 // zext(undef) = 0, because the top bits will be zero.
2572 return getConstant(0, VT);
2574 case ISD::ANY_EXTEND:
2575 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2576 "Invalid ANY_EXTEND!");
2577 if (Operand.getValueType() == VT) return Operand; // noop extension
2578 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2579 "Invalid anyext node, dst < src!");
2580 assert((!VT.isVector() ||
2581 VT.getVectorNumElements() ==
2582 Operand.getValueType().getVectorNumElements()) &&
2583 "Vector element count mismatch!");
2585 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2586 OpOpcode == ISD::ANY_EXTEND)
2587 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2588 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2589 else if (OpOpcode == ISD::UNDEF)
2590 return getUNDEF(VT);
2592 // (ext (trunx x)) -> x
2593 if (OpOpcode == ISD::TRUNCATE) {
2594 SDValue OpOp = Operand.getNode()->getOperand(0);
2595 if (OpOp.getValueType() == VT)
2600 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2601 "Invalid TRUNCATE!");
2602 if (Operand.getValueType() == VT) return Operand; // noop truncate
2603 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2604 "Invalid truncate node, src < dst!");
2605 assert((!VT.isVector() ||
2606 VT.getVectorNumElements() ==
2607 Operand.getValueType().getVectorNumElements()) &&
2608 "Vector element count mismatch!");
2609 if (OpOpcode == ISD::TRUNCATE)
2610 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2611 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2612 OpOpcode == ISD::ANY_EXTEND) {
2613 // If the source is smaller than the dest, we still need an extend.
2614 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2615 .bitsLT(VT.getScalarType()))
2616 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2617 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2618 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2619 return Operand.getNode()->getOperand(0);
2621 if (OpOpcode == ISD::UNDEF)
2622 return getUNDEF(VT);
2625 // Basic sanity checking.
2626 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2627 && "Cannot BITCAST between types of different sizes!");
2628 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2629 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2630 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2631 if (OpOpcode == ISD::UNDEF)
2632 return getUNDEF(VT);
2634 case ISD::SCALAR_TO_VECTOR:
2635 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2636 (VT.getVectorElementType() == Operand.getValueType() ||
2637 (VT.getVectorElementType().isInteger() &&
2638 Operand.getValueType().isInteger() &&
2639 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2640 "Illegal SCALAR_TO_VECTOR node!");
2641 if (OpOpcode == ISD::UNDEF)
2642 return getUNDEF(VT);
2643 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2644 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2645 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2646 Operand.getConstantOperandVal(1) == 0 &&
2647 Operand.getOperand(0).getValueType() == VT)
2648 return Operand.getOperand(0);
2651 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2652 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2653 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2654 Operand.getNode()->getOperand(0));
2655 if (OpOpcode == ISD::FNEG) // --X -> X
2656 return Operand.getNode()->getOperand(0);
2659 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2660 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2665 SDVTList VTs = getVTList(VT);
2666 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2667 FoldingSetNodeID ID;
2668 SDValue Ops[1] = { Operand };
2669 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2671 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2672 return SDValue(E, 0);
2674 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2675 CSEMap.InsertNode(N, IP);
2677 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2680 AllNodes.push_back(N);
2684 return SDValue(N, 0);
2687 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2688 SDNode *Cst1, SDNode *Cst2) {
2689 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2690 SmallVector<SDValue, 4> Outputs;
2691 EVT SVT = VT.getScalarType();
2693 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2694 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2695 if (Scalar1 && Scalar2) {
2696 // Scalar instruction.
2697 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2699 // For vectors extract each constant element into Inputs so we can constant
2700 // fold them individually.
2701 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2702 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2706 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2708 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2709 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2710 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2711 if (!V1 || !V2) // Not a constant, bail.
2714 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2715 // FIXME: This is valid and could be handled by truncating the APInts.
2716 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2719 Inputs.push_back(std::make_pair(V1, V2));
2723 // We have a number of constant values, constant fold them element by element.
2724 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
2725 const APInt &C1 = Inputs[I].first->getAPIntValue();
2726 const APInt &C2 = Inputs[I].second->getAPIntValue();
2730 Outputs.push_back(getConstant(C1 + C2, SVT));
2733 Outputs.push_back(getConstant(C1 - C2, SVT));
2736 Outputs.push_back(getConstant(C1 * C2, SVT));
2739 if (!C2.getBoolValue())
2741 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
2744 if (!C2.getBoolValue())
2746 Outputs.push_back(getConstant(C1.urem(C2), SVT));
2749 if (!C2.getBoolValue())
2751 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
2754 if (!C2.getBoolValue())
2756 Outputs.push_back(getConstant(C1.srem(C2), SVT));
2759 Outputs.push_back(getConstant(C1 & C2, SVT));
2762 Outputs.push_back(getConstant(C1 | C2, SVT));
2765 Outputs.push_back(getConstant(C1 ^ C2, SVT));
2768 Outputs.push_back(getConstant(C1 << C2, SVT));
2771 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
2774 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
2777 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
2780 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
2787 // Handle the scalar case first.
2788 if (Outputs.size() == 1)
2789 return Outputs.back();
2791 // Otherwise build a big vector out of the scalar elements we generated.
2792 return getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, Outputs.data(),
2796 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1,
2798 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2799 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2802 case ISD::TokenFactor:
2803 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2804 N2.getValueType() == MVT::Other && "Invalid token factor!");
2805 // Fold trivial token factors.
2806 if (N1.getOpcode() == ISD::EntryToken) return N2;
2807 if (N2.getOpcode() == ISD::EntryToken) return N1;
2808 if (N1 == N2) return N1;
2810 case ISD::CONCAT_VECTORS:
2811 // Concat of UNDEFs is UNDEF.
2812 if (N1.getOpcode() == ISD::UNDEF &&
2813 N2.getOpcode() == ISD::UNDEF)
2814 return getUNDEF(VT);
2816 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2817 // one big BUILD_VECTOR.
2818 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2819 N2.getOpcode() == ISD::BUILD_VECTOR) {
2820 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2821 N1.getNode()->op_end());
2822 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2823 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2827 assert(VT.isInteger() && "This operator does not apply to FP types!");
2828 assert(N1.getValueType() == N2.getValueType() &&
2829 N1.getValueType() == VT && "Binary operator types must match!");
2830 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2831 // worth handling here.
2832 if (N2C && N2C->isNullValue())
2834 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2841 assert(VT.isInteger() && "This operator does not apply to FP types!");
2842 assert(N1.getValueType() == N2.getValueType() &&
2843 N1.getValueType() == VT && "Binary operator types must match!");
2844 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2845 // it's worth handling here.
2846 if (N2C && N2C->isNullValue())
2856 assert(VT.isInteger() && "This operator does not apply to FP types!");
2857 assert(N1.getValueType() == N2.getValueType() &&
2858 N1.getValueType() == VT && "Binary operator types must match!");
2865 if (getTarget().Options.UnsafeFPMath) {
2866 if (Opcode == ISD::FADD) {
2868 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2869 if (CFP->getValueAPF().isZero())
2872 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2873 if (CFP->getValueAPF().isZero())
2875 } else if (Opcode == ISD::FSUB) {
2877 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2878 if (CFP->getValueAPF().isZero())
2880 } else if (Opcode == ISD::FMUL) {
2881 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2884 // If the first operand isn't the constant, try the second
2886 CFP = dyn_cast<ConstantFPSDNode>(N2);
2893 return SDValue(CFP,0);
2895 if (CFP->isExactlyValue(1.0))
2900 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2901 assert(N1.getValueType() == N2.getValueType() &&
2902 N1.getValueType() == VT && "Binary operator types must match!");
2904 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2905 assert(N1.getValueType() == VT &&
2906 N1.getValueType().isFloatingPoint() &&
2907 N2.getValueType().isFloatingPoint() &&
2908 "Invalid FCOPYSIGN!");
2915 assert(VT == N1.getValueType() &&
2916 "Shift operators return type must be the same as their first arg");
2917 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2918 "Shifts only work on integers");
2919 assert((!VT.isVector() || VT == N2.getValueType()) &&
2920 "Vector shift amounts must be in the same as their first arg");
2921 // Verify that the shift amount VT is bit enough to hold valid shift
2922 // amounts. This catches things like trying to shift an i1024 value by an
2923 // i8, which is easy to fall into in generic code that uses
2924 // TLI.getShiftAmount().
2925 assert(N2.getValueType().getSizeInBits() >=
2926 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2927 "Invalid use of small shift amount with oversized value!");
2929 // Always fold shifts of i1 values so the code generator doesn't need to
2930 // handle them. Since we know the size of the shift has to be less than the
2931 // size of the value, the shift/rotate count is guaranteed to be zero.
2934 if (N2C && N2C->isNullValue())
2937 case ISD::FP_ROUND_INREG: {
2938 EVT EVT = cast<VTSDNode>(N2)->getVT();
2939 assert(VT == N1.getValueType() && "Not an inreg round!");
2940 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2941 "Cannot FP_ROUND_INREG integer types");
2942 assert(EVT.isVector() == VT.isVector() &&
2943 "FP_ROUND_INREG type should be vector iff the operand "
2945 assert((!EVT.isVector() ||
2946 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2947 "Vector element counts must match in FP_ROUND_INREG");
2948 assert(EVT.bitsLE(VT) && "Not rounding down!");
2950 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2954 assert(VT.isFloatingPoint() &&
2955 N1.getValueType().isFloatingPoint() &&
2956 VT.bitsLE(N1.getValueType()) &&
2957 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2958 if (N1.getValueType() == VT) return N1; // noop conversion.
2960 case ISD::AssertSext:
2961 case ISD::AssertZext: {
2962 EVT EVT = cast<VTSDNode>(N2)->getVT();
2963 assert(VT == N1.getValueType() && "Not an inreg extend!");
2964 assert(VT.isInteger() && EVT.isInteger() &&
2965 "Cannot *_EXTEND_INREG FP types");
2966 assert(!EVT.isVector() &&
2967 "AssertSExt/AssertZExt type should be the vector element type "
2968 "rather than the vector type!");
2969 assert(EVT.bitsLE(VT) && "Not extending!");
2970 if (VT == EVT) return N1; // noop assertion.
2973 case ISD::SIGN_EXTEND_INREG: {
2974 EVT EVT = cast<VTSDNode>(N2)->getVT();
2975 assert(VT == N1.getValueType() && "Not an inreg extend!");
2976 assert(VT.isInteger() && EVT.isInteger() &&
2977 "Cannot *_EXTEND_INREG FP types");
2978 assert(EVT.isVector() == VT.isVector() &&
2979 "SIGN_EXTEND_INREG type should be vector iff the operand "
2981 assert((!EVT.isVector() ||
2982 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2983 "Vector element counts must match in SIGN_EXTEND_INREG");
2984 assert(EVT.bitsLE(VT) && "Not extending!");
2985 if (EVT == VT) return N1; // Not actually extending
2988 APInt Val = N1C->getAPIntValue();
2989 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2990 Val <<= Val.getBitWidth()-FromBits;
2991 Val = Val.ashr(Val.getBitWidth()-FromBits);
2992 return getConstant(Val, VT);
2996 case ISD::EXTRACT_VECTOR_ELT:
2997 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2998 if (N1.getOpcode() == ISD::UNDEF)
2999 return getUNDEF(VT);
3001 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3002 // expanding copies of large vectors from registers.
3004 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3005 N1.getNumOperands() > 0) {
3007 N1.getOperand(0).getValueType().getVectorNumElements();
3008 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3009 N1.getOperand(N2C->getZExtValue() / Factor),
3010 getConstant(N2C->getZExtValue() % Factor,
3011 N2.getValueType()));
3014 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3015 // expanding large vector constants.
3016 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3017 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3019 if (VT != Elt.getValueType())
3020 // If the vector element type is not legal, the BUILD_VECTOR operands
3021 // are promoted and implicitly truncated, and the result implicitly
3022 // extended. Make that explicit here.
3023 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3028 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3029 // operations are lowered to scalars.
3030 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3031 // If the indices are the same, return the inserted element else
3032 // if the indices are known different, extract the element from
3033 // the original vector.
3034 SDValue N1Op2 = N1.getOperand(2);
3035 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3037 if (N1Op2C && N2C) {
3038 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3039 if (VT == N1.getOperand(1).getValueType())
3040 return N1.getOperand(1);
3042 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3045 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3049 case ISD::EXTRACT_ELEMENT:
3050 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3051 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3052 (N1.getValueType().isInteger() == VT.isInteger()) &&
3053 N1.getValueType() != VT &&
3054 "Wrong types for EXTRACT_ELEMENT!");
3056 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3057 // 64-bit integers into 32-bit parts. Instead of building the extract of
3058 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3059 if (N1.getOpcode() == ISD::BUILD_PAIR)
3060 return N1.getOperand(N2C->getZExtValue());
3062 // EXTRACT_ELEMENT of a constant int is also very common.
3063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3064 unsigned ElementSize = VT.getSizeInBits();
3065 unsigned Shift = ElementSize * N2C->getZExtValue();
3066 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3067 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3070 case ISD::EXTRACT_SUBVECTOR: {
3072 if (VT.isSimple() && N1.getValueType().isSimple()) {
3073 assert(VT.isVector() && N1.getValueType().isVector() &&
3074 "Extract subvector VTs must be a vectors!");
3075 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3076 "Extract subvector VTs must have the same element type!");
3077 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3078 "Extract subvector must be from larger vector to smaller vector!");
3080 if (isa<ConstantSDNode>(Index.getNode())) {
3081 assert((VT.getVectorNumElements() +
3082 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3083 <= N1.getValueType().getVectorNumElements())
3084 && "Extract subvector overflow!");
3087 // Trivial extraction.
3088 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3095 // Perform trivial constant folding.
3096 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3097 if (SV.getNode()) return SV;
3099 // Canonicalize constant to RHS if commutative.
3100 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3101 std::swap(N1C, N2C);
3105 // Constant fold FP operations.
3106 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3107 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3109 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3110 // Canonicalize constant to RHS if commutative.
3111 std::swap(N1CFP, N2CFP);
3114 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3115 APFloat::opStatus s;
3118 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3119 if (s != APFloat::opInvalidOp)
3120 return getConstantFP(V1, VT);
3123 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3124 if (s!=APFloat::opInvalidOp)
3125 return getConstantFP(V1, VT);
3128 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3129 if (s!=APFloat::opInvalidOp)
3130 return getConstantFP(V1, VT);
3133 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3134 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3135 return getConstantFP(V1, VT);
3138 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3139 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3140 return getConstantFP(V1, VT);
3142 case ISD::FCOPYSIGN:
3144 return getConstantFP(V1, VT);
3149 if (Opcode == ISD::FP_ROUND) {
3150 APFloat V = N1CFP->getValueAPF(); // make copy
3152 // This can return overflow, underflow, or inexact; we don't care.
3153 // FIXME need to be more flexible about rounding mode.
3154 (void)V.convert(EVTToAPFloatSemantics(VT),
3155 APFloat::rmNearestTiesToEven, &ignored);
3156 return getConstantFP(V, VT);
3160 // Canonicalize an UNDEF to the RHS, even over a constant.
3161 if (N1.getOpcode() == ISD::UNDEF) {
3162 if (isCommutativeBinOp(Opcode)) {
3166 case ISD::FP_ROUND_INREG:
3167 case ISD::SIGN_EXTEND_INREG:
3173 return N1; // fold op(undef, arg2) -> undef
3181 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3182 // For vectors, we can't easily build an all zero vector, just return
3189 // Fold a bunch of operators when the RHS is undef.
3190 if (N2.getOpcode() == ISD::UNDEF) {
3193 if (N1.getOpcode() == ISD::UNDEF)
3194 // Handle undef ^ undef -> 0 special case. This is a common
3196 return getConstant(0, VT);
3206 return N2; // fold op(arg1, undef) -> undef
3212 if (getTarget().Options.UnsafeFPMath)
3220 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3221 // For vectors, we can't easily build an all zero vector, just return
3226 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3227 // For vectors, we can't easily build an all one vector, just return
3235 // Memoize this node if possible.
3237 SDVTList VTs = getVTList(VT);
3238 if (VT != MVT::Glue) {
3239 SDValue Ops[] = { N1, N2 };
3240 FoldingSetNodeID ID;
3241 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3243 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3244 return SDValue(E, 0);
3246 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3247 CSEMap.InsertNode(N, IP);
3249 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3252 AllNodes.push_back(N);
3256 return SDValue(N, 0);
3259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3260 SDValue N1, SDValue N2, SDValue N3) {
3261 // Perform various simplifications.
3262 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3264 case ISD::CONCAT_VECTORS:
3265 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3266 // one big BUILD_VECTOR.
3267 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3268 N2.getOpcode() == ISD::BUILD_VECTOR &&
3269 N3.getOpcode() == ISD::BUILD_VECTOR) {
3270 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3271 N1.getNode()->op_end());
3272 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3273 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3274 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3278 // Use FoldSetCC to simplify SETCC's.
3279 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3280 if (Simp.getNode()) return Simp;
3285 if (N1C->getZExtValue())
3286 return N2; // select true, X, Y -> X
3287 return N3; // select false, X, Y -> Y
3290 if (N2 == N3) return N2; // select C, X, X -> X
3292 case ISD::VECTOR_SHUFFLE:
3293 llvm_unreachable("should use getVectorShuffle constructor!");
3294 case ISD::INSERT_SUBVECTOR: {
3296 if (VT.isSimple() && N1.getValueType().isSimple()
3297 && N2.getValueType().isSimple()) {
3298 assert(VT.isVector() && N1.getValueType().isVector() &&
3299 N2.getValueType().isVector() &&
3300 "Insert subvector VTs must be a vectors");
3301 assert(VT == N1.getValueType() &&
3302 "Dest and insert subvector source types must match!");
3303 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3304 "Insert subvector must be from smaller vector to larger vector!");
3305 if (isa<ConstantSDNode>(Index.getNode())) {
3306 assert((N2.getValueType().getVectorNumElements() +
3307 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3308 <= VT.getVectorNumElements())
3309 && "Insert subvector overflow!");
3312 // Trivial insertion.
3313 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3319 // Fold bit_convert nodes from a type to themselves.
3320 if (N1.getValueType() == VT)
3325 // Memoize node if it doesn't produce a flag.
3327 SDVTList VTs = getVTList(VT);
3328 if (VT != MVT::Glue) {
3329 SDValue Ops[] = { N1, N2, N3 };
3330 FoldingSetNodeID ID;
3331 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3334 return SDValue(E, 0);
3336 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3337 CSEMap.InsertNode(N, IP);
3339 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3342 AllNodes.push_back(N);
3346 return SDValue(N, 0);
3349 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3350 SDValue N1, SDValue N2, SDValue N3,
3352 SDValue Ops[] = { N1, N2, N3, N4 };
3353 return getNode(Opcode, DL, VT, Ops, 4);
3356 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3357 SDValue N1, SDValue N2, SDValue N3,
3358 SDValue N4, SDValue N5) {
3359 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3360 return getNode(Opcode, DL, VT, Ops, 5);
3363 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3364 /// the incoming stack arguments to be loaded from the stack.
3365 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3366 SmallVector<SDValue, 8> ArgChains;
3368 // Include the original chain at the beginning of the list. When this is
3369 // used by target LowerCall hooks, this helps legalize find the
3370 // CALLSEQ_BEGIN node.
3371 ArgChains.push_back(Chain);
3373 // Add a chain value for each stack argument.
3374 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3375 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3376 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3377 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3378 if (FI->getIndex() < 0)
3379 ArgChains.push_back(SDValue(L, 1));
3381 // Build a tokenfactor for all the chains.
3382 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3383 &ArgChains[0], ArgChains.size());
3386 /// getMemsetValue - Vectorized representation of the memset value
3388 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3390 assert(Value.getOpcode() != ISD::UNDEF);
3392 unsigned NumBits = VT.getScalarType().getSizeInBits();
3393 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3394 assert(C->getAPIntValue().getBitWidth() == 8);
3395 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3397 return DAG.getConstant(Val, VT);
3398 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3401 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3403 // Use a multiplication with 0x010101... to extend the input to the
3405 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3406 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3412 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3413 /// used when a memcpy is turned into a memset when the source is a constant
3415 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3416 const TargetLowering &TLI, StringRef Str) {
3417 // Handle vector with all elements zero.
3420 return DAG.getConstant(0, VT);
3421 else if (VT == MVT::f32 || VT == MVT::f64)
3422 return DAG.getConstantFP(0.0, VT);
3423 else if (VT.isVector()) {
3424 unsigned NumElts = VT.getVectorNumElements();
3425 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3426 return DAG.getNode(ISD::BITCAST, dl, VT,
3427 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3430 llvm_unreachable("Expected type!");
3433 assert(!VT.isVector() && "Can't handle vector type here!");
3434 unsigned NumVTBits = VT.getSizeInBits();
3435 unsigned NumVTBytes = NumVTBits / 8;
3436 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3438 APInt Val(NumVTBits, 0);
3439 if (TLI.isLittleEndian()) {
3440 for (unsigned i = 0; i != NumBytes; ++i)
3441 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3443 for (unsigned i = 0; i != NumBytes; ++i)
3444 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3447 // If the "cost" of materializing the integer immediate is 1 or free, then
3448 // it is cost effective to turn the load into the immediate.
3449 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
3450 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3451 return DAG.getConstant(Val, VT);
3452 return SDValue(0, 0);
3455 /// getMemBasePlusOffset - Returns base and offset node for the
3457 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3458 SelectionDAG &DAG) {
3459 EVT VT = Base.getValueType();
3460 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3461 VT, Base, DAG.getConstant(Offset, VT));
3464 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3466 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3467 unsigned SrcDelta = 0;
3468 GlobalAddressSDNode *G = NULL;
3469 if (Src.getOpcode() == ISD::GlobalAddress)
3470 G = cast<GlobalAddressSDNode>(Src);
3471 else if (Src.getOpcode() == ISD::ADD &&
3472 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3473 Src.getOperand(1).getOpcode() == ISD::Constant) {
3474 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3475 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3480 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3483 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3484 /// to replace the memset / memcpy. Return true if the number of memory ops
3485 /// is below the threshold. It returns the types of the sequence of
3486 /// memory ops to perform memset / memcpy by reference.
3487 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3488 unsigned Limit, uint64_t Size,
3489 unsigned DstAlign, unsigned SrcAlign,
3495 const TargetLowering &TLI) {
3496 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3497 "Expecting memcpy / memset source to meet alignment requirement!");
3498 // If 'SrcAlign' is zero, that means the memory operation does not need to
3499 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3500 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3501 // is the specified alignment of the memory operation. If it is zero, that
3502 // means it's possible to change the alignment of the destination.
3503 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3504 // not need to be loaded.
3505 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3506 IsMemset, ZeroMemset, MemcpyStrSrc,
3507 DAG.getMachineFunction());
3509 if (VT == MVT::Other) {
3510 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3511 TLI.allowsUnalignedMemoryAccesses(VT)) {
3512 VT = TLI.getPointerTy();
3514 switch (DstAlign & 7) {
3515 case 0: VT = MVT::i64; break;
3516 case 4: VT = MVT::i32; break;
3517 case 2: VT = MVT::i16; break;
3518 default: VT = MVT::i8; break;
3523 while (!TLI.isTypeLegal(LVT))
3524 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3525 assert(LVT.isInteger());
3531 unsigned NumMemOps = 0;
3533 unsigned VTSize = VT.getSizeInBits() / 8;
3534 while (VTSize > Size) {
3535 // For now, only use non-vector load / store's for the left-over pieces.
3540 if (VT.isVector() || VT.isFloatingPoint()) {
3541 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3542 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3543 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3545 else if (NewVT == MVT::i64 &&
3546 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3547 TLI.isSafeMemOpType(MVT::f64)) {
3548 // i64 is usually not legal on 32-bit targets, but f64 may be.
3556 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3557 if (NewVT == MVT::i8)
3559 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3561 NewVTSize = NewVT.getSizeInBits() / 8;
3563 // If the new VT cannot cover all of the remaining bits, then consider
3564 // issuing a (or a pair of) unaligned and overlapping load / store.
3565 // FIXME: Only does this for 64-bit or more since we don't have proper
3566 // cost model for unaligned load / store.
3568 if (NumMemOps && AllowOverlap &&
3569 VTSize >= 8 && NewVTSize < Size &&
3570 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3578 if (++NumMemOps > Limit)
3581 MemOps.push_back(VT);
3588 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3589 SDValue Chain, SDValue Dst,
3590 SDValue Src, uint64_t Size,
3591 unsigned Align, bool isVol,
3593 MachinePointerInfo DstPtrInfo,
3594 MachinePointerInfo SrcPtrInfo) {
3595 // Turn a memcpy of undef to nop.
3596 if (Src.getOpcode() == ISD::UNDEF)
3599 // Expand memcpy to a series of load and store ops if the size operand falls
3600 // below a certain threshold.
3601 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3602 // rather than maybe a humongous number of loads and stores.
3603 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3604 std::vector<EVT> MemOps;
3605 bool DstAlignCanChange = false;
3606 MachineFunction &MF = DAG.getMachineFunction();
3607 MachineFrameInfo *MFI = MF.getFrameInfo();
3609 MF.getFunction()->getAttributes().
3610 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3611 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3612 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3613 DstAlignCanChange = true;
3614 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3615 if (Align > SrcAlign)
3618 bool CopyFromStr = isMemSrcFromString(Src, Str);
3619 bool isZeroStr = CopyFromStr && Str.empty();
3620 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3622 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3623 (DstAlignCanChange ? 0 : Align),
3624 (isZeroStr ? 0 : SrcAlign),
3625 false, false, CopyFromStr, true, DAG, TLI))
3628 if (DstAlignCanChange) {
3629 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3630 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3632 // Don't promote to an alignment that would require dynamic stack
3634 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3635 if (!TRI->needsStackRealignment(MF))
3636 while (NewAlign > Align &&
3637 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3640 if (NewAlign > Align) {
3641 // Give the stack frame object a larger alignment if needed.
3642 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3643 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3648 SmallVector<SDValue, 8> OutChains;
3649 unsigned NumMemOps = MemOps.size();
3650 uint64_t SrcOff = 0, DstOff = 0;
3651 for (unsigned i = 0; i != NumMemOps; ++i) {
3653 unsigned VTSize = VT.getSizeInBits() / 8;
3654 SDValue Value, Store;
3656 if (VTSize > Size) {
3657 // Issuing an unaligned load / store pair that overlaps with the previous
3658 // pair. Adjust the offset accordingly.
3659 assert(i == NumMemOps-1 && i != 0);
3660 SrcOff -= VTSize - Size;
3661 DstOff -= VTSize - Size;
3665 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3666 // It's unlikely a store of a vector immediate can be done in a single
3667 // instruction. It would require a load from a constantpool first.
3668 // We only handle zero vectors here.
3669 // FIXME: Handle other cases where store of vector immediate is done in
3670 // a single instruction.
3671 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3672 if (Value.getNode())
3673 Store = DAG.getStore(Chain, dl, Value,
3674 getMemBasePlusOffset(Dst, DstOff, DAG),
3675 DstPtrInfo.getWithOffset(DstOff), isVol,
3679 if (!Store.getNode()) {
3680 // The type might not be legal for the target. This should only happen
3681 // if the type is smaller than a legal type, as on PPC, so the right
3682 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3683 // to Load/Store if NVT==VT.
3684 // FIXME does the case above also need this?
3685 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3686 assert(NVT.bitsGE(VT));
3687 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3688 getMemBasePlusOffset(Src, SrcOff, DAG),
3689 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3690 MinAlign(SrcAlign, SrcOff));
3691 Store = DAG.getTruncStore(Chain, dl, Value,
3692 getMemBasePlusOffset(Dst, DstOff, DAG),
3693 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3696 OutChains.push_back(Store);
3702 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3703 &OutChains[0], OutChains.size());
3706 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3707 SDValue Chain, SDValue Dst,
3708 SDValue Src, uint64_t Size,
3709 unsigned Align, bool isVol,
3711 MachinePointerInfo DstPtrInfo,
3712 MachinePointerInfo SrcPtrInfo) {
3713 // Turn a memmove of undef to nop.
3714 if (Src.getOpcode() == ISD::UNDEF)
3717 // Expand memmove to a series of load and store ops if the size operand falls
3718 // below a certain threshold.
3719 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3720 std::vector<EVT> MemOps;
3721 bool DstAlignCanChange = false;
3722 MachineFunction &MF = DAG.getMachineFunction();
3723 MachineFrameInfo *MFI = MF.getFrameInfo();
3724 bool OptSize = MF.getFunction()->getAttributes().
3725 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3726 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3727 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3728 DstAlignCanChange = true;
3729 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3730 if (Align > SrcAlign)
3732 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3734 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3735 (DstAlignCanChange ? 0 : Align), SrcAlign,
3736 false, false, false, false, DAG, TLI))
3739 if (DstAlignCanChange) {
3740 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3741 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3742 if (NewAlign > Align) {
3743 // Give the stack frame object a larger alignment if needed.
3744 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3745 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3750 uint64_t SrcOff = 0, DstOff = 0;
3751 SmallVector<SDValue, 8> LoadValues;
3752 SmallVector<SDValue, 8> LoadChains;
3753 SmallVector<SDValue, 8> OutChains;
3754 unsigned NumMemOps = MemOps.size();
3755 for (unsigned i = 0; i < NumMemOps; i++) {
3757 unsigned VTSize = VT.getSizeInBits() / 8;
3758 SDValue Value, Store;
3760 Value = DAG.getLoad(VT, dl, Chain,
3761 getMemBasePlusOffset(Src, SrcOff, DAG),
3762 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3763 false, false, SrcAlign);
3764 LoadValues.push_back(Value);
3765 LoadChains.push_back(Value.getValue(1));
3768 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3769 &LoadChains[0], LoadChains.size());
3771 for (unsigned i = 0; i < NumMemOps; i++) {
3773 unsigned VTSize = VT.getSizeInBits() / 8;
3774 SDValue Value, Store;
3776 Store = DAG.getStore(Chain, dl, LoadValues[i],
3777 getMemBasePlusOffset(Dst, DstOff, DAG),
3778 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3779 OutChains.push_back(Store);
3783 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3784 &OutChains[0], OutChains.size());
3787 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3788 SDValue Chain, SDValue Dst,
3789 SDValue Src, uint64_t Size,
3790 unsigned Align, bool isVol,
3791 MachinePointerInfo DstPtrInfo) {
3792 // Turn a memset of undef to nop.
3793 if (Src.getOpcode() == ISD::UNDEF)
3796 // Expand memset to a series of load/store ops if the size operand
3797 // falls below a certain threshold.
3798 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3799 std::vector<EVT> MemOps;
3800 bool DstAlignCanChange = false;
3801 MachineFunction &MF = DAG.getMachineFunction();
3802 MachineFrameInfo *MFI = MF.getFrameInfo();
3803 bool OptSize = MF.getFunction()->getAttributes().
3804 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3805 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3806 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3807 DstAlignCanChange = true;
3809 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3810 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3811 Size, (DstAlignCanChange ? 0 : Align), 0,
3812 true, IsZeroVal, false, true, DAG, TLI))
3815 if (DstAlignCanChange) {
3816 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3817 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3818 if (NewAlign > Align) {
3819 // Give the stack frame object a larger alignment if needed.
3820 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3821 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3826 SmallVector<SDValue, 8> OutChains;
3827 uint64_t DstOff = 0;
3828 unsigned NumMemOps = MemOps.size();
3830 // Find the largest store and generate the bit pattern for it.
3831 EVT LargestVT = MemOps[0];
3832 for (unsigned i = 1; i < NumMemOps; i++)
3833 if (MemOps[i].bitsGT(LargestVT))
3834 LargestVT = MemOps[i];
3835 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3837 for (unsigned i = 0; i < NumMemOps; i++) {
3839 unsigned VTSize = VT.getSizeInBits() / 8;
3840 if (VTSize > Size) {
3841 // Issuing an unaligned load / store pair that overlaps with the previous
3842 // pair. Adjust the offset accordingly.
3843 assert(i == NumMemOps-1 && i != 0);
3844 DstOff -= VTSize - Size;
3847 // If this store is smaller than the largest store see whether we can get
3848 // the smaller value for free with a truncate.
3849 SDValue Value = MemSetValue;
3850 if (VT.bitsLT(LargestVT)) {
3851 if (!LargestVT.isVector() && !VT.isVector() &&
3852 TLI.isTruncateFree(LargestVT, VT))
3853 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3855 Value = getMemsetValue(Src, VT, DAG, dl);
3857 assert(Value.getValueType() == VT && "Value with wrong type.");
3858 SDValue Store = DAG.getStore(Chain, dl, Value,
3859 getMemBasePlusOffset(Dst, DstOff, DAG),
3860 DstPtrInfo.getWithOffset(DstOff),
3861 isVol, false, Align);
3862 OutChains.push_back(Store);
3863 DstOff += VT.getSizeInBits() / 8;
3867 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3868 &OutChains[0], OutChains.size());
3871 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3872 SDValue Src, SDValue Size,
3873 unsigned Align, bool isVol, bool AlwaysInline,
3874 MachinePointerInfo DstPtrInfo,
3875 MachinePointerInfo SrcPtrInfo) {
3876 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3878 // Check to see if we should lower the memcpy to loads and stores first.
3879 // For cases within the target-specified limits, this is the best choice.
3880 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3882 // Memcpy with size zero? Just return the original chain.
3883 if (ConstantSize->isNullValue())
3886 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3887 ConstantSize->getZExtValue(),Align,
3888 isVol, false, DstPtrInfo, SrcPtrInfo);
3889 if (Result.getNode())
3893 // Then check to see if we should lower the memcpy with target-specific
3894 // code. If the target chooses to do this, this is the next best.
3896 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3897 isVol, AlwaysInline,
3898 DstPtrInfo, SrcPtrInfo);
3899 if (Result.getNode())
3902 // If we really need inline code and the target declined to provide it,
3903 // use a (potentially long) sequence of loads and stores.
3905 assert(ConstantSize && "AlwaysInline requires a constant size!");
3906 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3907 ConstantSize->getZExtValue(), Align, isVol,
3908 true, DstPtrInfo, SrcPtrInfo);
3911 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3912 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3913 // respect volatile, so they may do things like read or write memory
3914 // beyond the given memory regions. But fixing this isn't easy, and most
3915 // people don't care.
3917 // Emit a library call.
3918 TargetLowering::ArgListTy Args;
3919 TargetLowering::ArgListEntry Entry;
3920 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3921 Entry.Node = Dst; Args.push_back(Entry);
3922 Entry.Node = Src; Args.push_back(Entry);
3923 Entry.Node = Size; Args.push_back(Entry);
3924 // FIXME: pass in DebugLoc
3926 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3927 false, false, false, false, 0,
3928 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3929 /*isTailCall=*/false,
3930 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3931 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3932 TLI.getPointerTy()),
3934 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3936 return CallResult.second;
3939 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3940 SDValue Src, SDValue Size,
3941 unsigned Align, bool isVol,
3942 MachinePointerInfo DstPtrInfo,
3943 MachinePointerInfo SrcPtrInfo) {
3944 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3946 // Check to see if we should lower the memmove to loads and stores first.
3947 // For cases within the target-specified limits, this is the best choice.
3948 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3950 // Memmove with size zero? Just return the original chain.
3951 if (ConstantSize->isNullValue())
3955 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3956 ConstantSize->getZExtValue(), Align, isVol,
3957 false, DstPtrInfo, SrcPtrInfo);
3958 if (Result.getNode())
3962 // Then check to see if we should lower the memmove with target-specific
3963 // code. If the target chooses to do this, this is the next best.
3965 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3966 DstPtrInfo, SrcPtrInfo);
3967 if (Result.getNode())
3970 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3971 // not be safe. See memcpy above for more details.
3973 // Emit a library call.
3974 TargetLowering::ArgListTy Args;
3975 TargetLowering::ArgListEntry Entry;
3976 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3977 Entry.Node = Dst; Args.push_back(Entry);
3978 Entry.Node = Src; Args.push_back(Entry);
3979 Entry.Node = Size; Args.push_back(Entry);
3980 // FIXME: pass in DebugLoc
3982 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3983 false, false, false, false, 0,
3984 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3985 /*isTailCall=*/false,
3986 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3987 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3988 TLI.getPointerTy()),
3990 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3992 return CallResult.second;
3995 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3996 SDValue Src, SDValue Size,
3997 unsigned Align, bool isVol,
3998 MachinePointerInfo DstPtrInfo) {
3999 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4001 // Check to see if we should lower the memset to stores first.
4002 // For cases within the target-specified limits, this is the best choice.
4003 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4005 // Memset with size zero? Just return the original chain.
4006 if (ConstantSize->isNullValue())
4010 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4011 Align, isVol, DstPtrInfo);
4013 if (Result.getNode())
4017 // Then check to see if we should lower the memset with target-specific
4018 // code. If the target chooses to do this, this is the next best.
4020 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4022 if (Result.getNode())
4025 // Emit a library call.
4026 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
4027 TargetLowering::ArgListTy Args;
4028 TargetLowering::ArgListEntry Entry;
4029 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4030 Args.push_back(Entry);
4031 // Extend or truncate the argument to be an i32 value for the call.
4032 if (Src.getValueType().bitsGT(MVT::i32))
4033 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
4035 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
4037 Entry.Ty = Type::getInt32Ty(*getContext());
4038 Entry.isSExt = true;
4039 Args.push_back(Entry);
4041 Entry.Ty = IntPtrTy;
4042 Entry.isSExt = false;
4043 Args.push_back(Entry);
4044 // FIXME: pass in DebugLoc
4046 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
4047 false, false, false, false, 0,
4048 TLI.getLibcallCallingConv(RTLIB::MEMSET),
4049 /*isTailCall=*/false,
4050 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
4051 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
4052 TLI.getPointerTy()),
4054 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
4056 return CallResult.second;
4059 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4060 SDValue Chain, SDValue Ptr, SDValue Cmp,
4061 SDValue Swp, MachinePointerInfo PtrInfo,
4063 AtomicOrdering Ordering,
4064 SynchronizationScope SynchScope) {
4065 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4066 Alignment = getEVTAlignment(MemVT);
4068 MachineFunction &MF = getMachineFunction();
4070 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
4071 // For now, atomics are considered to be volatile always.
4072 // FIXME: Volatile isn't really correct; we should keep track of atomic
4073 // orderings in the memoperand.
4074 unsigned Flags = MachineMemOperand::MOVolatile;
4075 if (Opcode != ISD::ATOMIC_STORE)
4076 Flags |= MachineMemOperand::MOLoad;
4077 if (Opcode != ISD::ATOMIC_LOAD)
4078 Flags |= MachineMemOperand::MOStore;
4080 MachineMemOperand *MMO =
4081 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4083 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4084 Ordering, SynchScope);
4087 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4089 SDValue Ptr, SDValue Cmp,
4090 SDValue Swp, MachineMemOperand *MMO,
4091 AtomicOrdering Ordering,
4092 SynchronizationScope SynchScope) {
4093 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4094 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4096 EVT VT = Cmp.getValueType();
4098 SDVTList VTs = getVTList(VT, MVT::Other);
4099 FoldingSetNodeID ID;
4100 ID.AddInteger(MemVT.getRawBits());
4101 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4102 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4103 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4106 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4107 return SDValue(E, 0);
4109 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4110 Ptr, Cmp, Swp, MMO, Ordering,
4112 CSEMap.InsertNode(N, IP);
4113 AllNodes.push_back(N);
4114 return SDValue(N, 0);
4117 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4119 SDValue Ptr, SDValue Val,
4120 const Value* PtrVal,
4122 AtomicOrdering Ordering,
4123 SynchronizationScope SynchScope) {
4124 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4125 Alignment = getEVTAlignment(MemVT);
4127 MachineFunction &MF = getMachineFunction();
4128 // An atomic store does not load. An atomic load does not store.
4129 // (An atomicrmw obviously both loads and stores.)
4130 // For now, atomics are considered to be volatile always, and they are
4132 // FIXME: Volatile isn't really correct; we should keep track of atomic
4133 // orderings in the memoperand.
4134 unsigned Flags = MachineMemOperand::MOVolatile;
4135 if (Opcode != ISD::ATOMIC_STORE)
4136 Flags |= MachineMemOperand::MOLoad;
4137 if (Opcode != ISD::ATOMIC_LOAD)
4138 Flags |= MachineMemOperand::MOStore;
4140 MachineMemOperand *MMO =
4141 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4142 MemVT.getStoreSize(), Alignment);
4144 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4145 Ordering, SynchScope);
4148 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4150 SDValue Ptr, SDValue Val,
4151 MachineMemOperand *MMO,
4152 AtomicOrdering Ordering,
4153 SynchronizationScope SynchScope) {
4154 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4155 Opcode == ISD::ATOMIC_LOAD_SUB ||
4156 Opcode == ISD::ATOMIC_LOAD_AND ||
4157 Opcode == ISD::ATOMIC_LOAD_OR ||
4158 Opcode == ISD::ATOMIC_LOAD_XOR ||
4159 Opcode == ISD::ATOMIC_LOAD_NAND ||
4160 Opcode == ISD::ATOMIC_LOAD_MIN ||
4161 Opcode == ISD::ATOMIC_LOAD_MAX ||
4162 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4163 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4164 Opcode == ISD::ATOMIC_SWAP ||
4165 Opcode == ISD::ATOMIC_STORE) &&
4166 "Invalid Atomic Op");
4168 EVT VT = Val.getValueType();
4170 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4171 getVTList(VT, MVT::Other);
4172 FoldingSetNodeID ID;
4173 ID.AddInteger(MemVT.getRawBits());
4174 SDValue Ops[] = {Chain, Ptr, Val};
4175 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4176 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4178 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4179 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4180 return SDValue(E, 0);
4182 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4184 Ordering, SynchScope);
4185 CSEMap.InsertNode(N, IP);
4186 AllNodes.push_back(N);
4187 return SDValue(N, 0);
4190 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4191 EVT VT, SDValue Chain,
4193 const Value* PtrVal,
4195 AtomicOrdering Ordering,
4196 SynchronizationScope SynchScope) {
4197 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4198 Alignment = getEVTAlignment(MemVT);
4200 MachineFunction &MF = getMachineFunction();
4201 // An atomic store does not load. An atomic load does not store.
4202 // (An atomicrmw obviously both loads and stores.)
4203 // For now, atomics are considered to be volatile always, and they are
4205 // FIXME: Volatile isn't really correct; we should keep track of atomic
4206 // orderings in the memoperand.
4207 unsigned Flags = MachineMemOperand::MOVolatile;
4208 if (Opcode != ISD::ATOMIC_STORE)
4209 Flags |= MachineMemOperand::MOLoad;
4210 if (Opcode != ISD::ATOMIC_LOAD)
4211 Flags |= MachineMemOperand::MOStore;
4213 MachineMemOperand *MMO =
4214 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4215 MemVT.getStoreSize(), Alignment);
4217 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4218 Ordering, SynchScope);
4221 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4222 EVT VT, SDValue Chain,
4224 MachineMemOperand *MMO,
4225 AtomicOrdering Ordering,
4226 SynchronizationScope SynchScope) {
4227 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4229 SDVTList VTs = getVTList(VT, MVT::Other);
4230 FoldingSetNodeID ID;
4231 ID.AddInteger(MemVT.getRawBits());
4232 SDValue Ops[] = {Chain, Ptr};
4233 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4234 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4236 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4237 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4238 return SDValue(E, 0);
4240 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4241 Ptr, MMO, Ordering, SynchScope);
4242 CSEMap.InsertNode(N, IP);
4243 AllNodes.push_back(N);
4244 return SDValue(N, 0);
4247 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4248 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4253 SmallVector<EVT, 4> VTs;
4254 VTs.reserve(NumOps);
4255 for (unsigned i = 0; i < NumOps; ++i)
4256 VTs.push_back(Ops[i].getValueType());
4257 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4262 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4263 const EVT *VTs, unsigned NumVTs,
4264 const SDValue *Ops, unsigned NumOps,
4265 EVT MemVT, MachinePointerInfo PtrInfo,
4266 unsigned Align, bool Vol,
4267 bool ReadMem, bool WriteMem) {
4268 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4269 MemVT, PtrInfo, Align, Vol,
4274 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4275 const SDValue *Ops, unsigned NumOps,
4276 EVT MemVT, MachinePointerInfo PtrInfo,
4277 unsigned Align, bool Vol,
4278 bool ReadMem, bool WriteMem) {
4279 if (Align == 0) // Ensure that codegen never sees alignment 0
4280 Align = getEVTAlignment(MemVT);
4282 MachineFunction &MF = getMachineFunction();
4285 Flags |= MachineMemOperand::MOStore;
4287 Flags |= MachineMemOperand::MOLoad;
4289 Flags |= MachineMemOperand::MOVolatile;
4290 MachineMemOperand *MMO =
4291 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4293 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4297 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4298 const SDValue *Ops, unsigned NumOps,
4299 EVT MemVT, MachineMemOperand *MMO) {
4300 assert((Opcode == ISD::INTRINSIC_VOID ||
4301 Opcode == ISD::INTRINSIC_W_CHAIN ||
4302 Opcode == ISD::PREFETCH ||
4303 Opcode == ISD::LIFETIME_START ||
4304 Opcode == ISD::LIFETIME_END ||
4305 (Opcode <= INT_MAX &&
4306 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4307 "Opcode is not a memory-accessing opcode!");
4309 // Memoize the node unless it returns a flag.
4310 MemIntrinsicSDNode *N;
4311 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4312 FoldingSetNodeID ID;
4313 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4314 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4317 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4318 return SDValue(E, 0);
4321 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4323 CSEMap.InsertNode(N, IP);
4325 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4328 AllNodes.push_back(N);
4329 return SDValue(N, 0);
4332 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4333 /// MachinePointerInfo record from it. This is particularly useful because the
4334 /// code generator has many cases where it doesn't bother passing in a
4335 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4336 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4337 // If this is FI+Offset, we can model it.
4338 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4339 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4341 // If this is (FI+Offset1)+Offset2, we can model it.
4342 if (Ptr.getOpcode() != ISD::ADD ||
4343 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4344 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4345 return MachinePointerInfo();
4347 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4348 return MachinePointerInfo::getFixedStack(FI, Offset+
4349 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4352 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4353 /// MachinePointerInfo record from it. This is particularly useful because the
4354 /// code generator has many cases where it doesn't bother passing in a
4355 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4356 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4357 // If the 'Offset' value isn't a constant, we can't handle this.
4358 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4359 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4360 if (OffsetOp.getOpcode() == ISD::UNDEF)
4361 return InferPointerInfo(Ptr);
4362 return MachinePointerInfo();
4367 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4368 EVT VT, DebugLoc dl, SDValue Chain,
4369 SDValue Ptr, SDValue Offset,
4370 MachinePointerInfo PtrInfo, EVT MemVT,
4371 bool isVolatile, bool isNonTemporal, bool isInvariant,
4372 unsigned Alignment, const MDNode *TBAAInfo,
4373 const MDNode *Ranges) {
4374 assert(Chain.getValueType() == MVT::Other &&
4375 "Invalid chain type");
4376 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4377 Alignment = getEVTAlignment(VT);
4379 unsigned Flags = MachineMemOperand::MOLoad;
4381 Flags |= MachineMemOperand::MOVolatile;
4383 Flags |= MachineMemOperand::MONonTemporal;
4385 Flags |= MachineMemOperand::MOInvariant;
4387 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4390 PtrInfo = InferPointerInfo(Ptr, Offset);
4392 MachineFunction &MF = getMachineFunction();
4393 MachineMemOperand *MMO =
4394 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4396 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4400 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4401 EVT VT, DebugLoc dl, SDValue Chain,
4402 SDValue Ptr, SDValue Offset, EVT MemVT,
4403 MachineMemOperand *MMO) {
4405 ExtType = ISD::NON_EXTLOAD;
4406 } else if (ExtType == ISD::NON_EXTLOAD) {
4407 assert(VT == MemVT && "Non-extending load from different memory type!");
4410 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4411 "Should only be an extending load, not truncating!");
4412 assert(VT.isInteger() == MemVT.isInteger() &&
4413 "Cannot convert from FP to Int or Int -> FP!");
4414 assert(VT.isVector() == MemVT.isVector() &&
4415 "Cannot use trunc store to convert to or from a vector!");
4416 assert((!VT.isVector() ||
4417 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4418 "Cannot use trunc store to change the number of vector elements!");
4421 bool Indexed = AM != ISD::UNINDEXED;
4422 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4423 "Unindexed load with an offset!");
4425 SDVTList VTs = Indexed ?
4426 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4427 SDValue Ops[] = { Chain, Ptr, Offset };
4428 FoldingSetNodeID ID;
4429 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4430 ID.AddInteger(MemVT.getRawBits());
4431 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4432 MMO->isNonTemporal(),
4433 MMO->isInvariant()));
4434 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4436 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4437 cast<LoadSDNode>(E)->refineAlignment(MMO);
4438 return SDValue(E, 0);
4440 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4442 CSEMap.InsertNode(N, IP);
4443 AllNodes.push_back(N);
4444 return SDValue(N, 0);
4447 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4448 SDValue Chain, SDValue Ptr,
4449 MachinePointerInfo PtrInfo,
4450 bool isVolatile, bool isNonTemporal,
4451 bool isInvariant, unsigned Alignment,
4452 const MDNode *TBAAInfo,
4453 const MDNode *Ranges) {
4454 SDValue Undef = getUNDEF(Ptr.getValueType());
4455 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4456 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4460 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4461 SDValue Chain, SDValue Ptr,
4462 MachinePointerInfo PtrInfo, EVT MemVT,
4463 bool isVolatile, bool isNonTemporal,
4464 unsigned Alignment, const MDNode *TBAAInfo) {
4465 SDValue Undef = getUNDEF(Ptr.getValueType());
4466 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4467 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4473 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4474 SDValue Offset, ISD::MemIndexedMode AM) {
4475 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4476 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4477 "Load is already a indexed load!");
4478 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4479 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4480 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4481 false, LD->getAlignment());
4484 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4485 SDValue Ptr, MachinePointerInfo PtrInfo,
4486 bool isVolatile, bool isNonTemporal,
4487 unsigned Alignment, const MDNode *TBAAInfo) {
4488 assert(Chain.getValueType() == MVT::Other &&
4489 "Invalid chain type");
4490 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4491 Alignment = getEVTAlignment(Val.getValueType());
4493 unsigned Flags = MachineMemOperand::MOStore;
4495 Flags |= MachineMemOperand::MOVolatile;
4497 Flags |= MachineMemOperand::MONonTemporal;
4500 PtrInfo = InferPointerInfo(Ptr);
4502 MachineFunction &MF = getMachineFunction();
4503 MachineMemOperand *MMO =
4504 MF.getMachineMemOperand(PtrInfo, Flags,
4505 Val.getValueType().getStoreSize(), Alignment,
4508 return getStore(Chain, dl, Val, Ptr, MMO);
4511 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4512 SDValue Ptr, MachineMemOperand *MMO) {
4513 assert(Chain.getValueType() == MVT::Other &&
4514 "Invalid chain type");
4515 EVT VT = Val.getValueType();
4516 SDVTList VTs = getVTList(MVT::Other);
4517 SDValue Undef = getUNDEF(Ptr.getValueType());
4518 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4519 FoldingSetNodeID ID;
4520 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4521 ID.AddInteger(VT.getRawBits());
4522 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4523 MMO->isNonTemporal(), MMO->isInvariant()));
4524 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4527 cast<StoreSDNode>(E)->refineAlignment(MMO);
4528 return SDValue(E, 0);
4530 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4532 CSEMap.InsertNode(N, IP);
4533 AllNodes.push_back(N);
4534 return SDValue(N, 0);
4537 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4538 SDValue Ptr, MachinePointerInfo PtrInfo,
4539 EVT SVT,bool isVolatile, bool isNonTemporal,
4541 const MDNode *TBAAInfo) {
4542 assert(Chain.getValueType() == MVT::Other &&
4543 "Invalid chain type");
4544 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4545 Alignment = getEVTAlignment(SVT);
4547 unsigned Flags = MachineMemOperand::MOStore;
4549 Flags |= MachineMemOperand::MOVolatile;
4551 Flags |= MachineMemOperand::MONonTemporal;
4554 PtrInfo = InferPointerInfo(Ptr);
4556 MachineFunction &MF = getMachineFunction();
4557 MachineMemOperand *MMO =
4558 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4561 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4564 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4565 SDValue Ptr, EVT SVT,
4566 MachineMemOperand *MMO) {
4567 EVT VT = Val.getValueType();
4569 assert(Chain.getValueType() == MVT::Other &&
4570 "Invalid chain type");
4572 return getStore(Chain, dl, Val, Ptr, MMO);
4574 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4575 "Should only be a truncating store, not extending!");
4576 assert(VT.isInteger() == SVT.isInteger() &&
4577 "Can't do FP-INT conversion!");
4578 assert(VT.isVector() == SVT.isVector() &&
4579 "Cannot use trunc store to convert to or from a vector!");
4580 assert((!VT.isVector() ||
4581 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4582 "Cannot use trunc store to change the number of vector elements!");
4584 SDVTList VTs = getVTList(MVT::Other);
4585 SDValue Undef = getUNDEF(Ptr.getValueType());
4586 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4587 FoldingSetNodeID ID;
4588 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4589 ID.AddInteger(SVT.getRawBits());
4590 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4591 MMO->isNonTemporal(), MMO->isInvariant()));
4592 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4594 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4595 cast<StoreSDNode>(E)->refineAlignment(MMO);
4596 return SDValue(E, 0);
4598 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4600 CSEMap.InsertNode(N, IP);
4601 AllNodes.push_back(N);
4602 return SDValue(N, 0);
4606 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4607 SDValue Offset, ISD::MemIndexedMode AM) {
4608 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4609 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4610 "Store is already a indexed store!");
4611 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4612 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4613 FoldingSetNodeID ID;
4614 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4615 ID.AddInteger(ST->getMemoryVT().getRawBits());
4616 ID.AddInteger(ST->getRawSubclassData());
4617 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4619 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4620 return SDValue(E, 0);
4622 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4623 ST->isTruncatingStore(),
4625 ST->getMemOperand());
4626 CSEMap.InsertNode(N, IP);
4627 AllNodes.push_back(N);
4628 return SDValue(N, 0);
4631 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4632 SDValue Chain, SDValue Ptr,
4635 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4636 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4639 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4640 const SDUse *Ops, unsigned NumOps) {
4642 case 0: return getNode(Opcode, DL, VT);
4643 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4644 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4645 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4649 // Copy from an SDUse array into an SDValue array for use with
4650 // the regular getNode logic.
4651 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4652 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4655 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4656 const SDValue *Ops, unsigned NumOps) {
4658 case 0: return getNode(Opcode, DL, VT);
4659 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4660 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4661 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4667 case ISD::SELECT_CC: {
4668 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4669 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4670 "LHS and RHS of condition must have same type!");
4671 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4672 "True and False arms of SelectCC must have same type!");
4673 assert(Ops[2].getValueType() == VT &&
4674 "select_cc node must be of same type as true and false value!");
4678 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4679 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4680 "LHS/RHS of comparison should match types!");
4687 SDVTList VTs = getVTList(VT);
4689 if (VT != MVT::Glue) {
4690 FoldingSetNodeID ID;
4691 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4694 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4695 return SDValue(E, 0);
4697 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4698 CSEMap.InsertNode(N, IP);
4700 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4703 AllNodes.push_back(N);
4707 return SDValue(N, 0);
4710 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4711 ArrayRef<EVT> ResultTys,
4712 const SDValue *Ops, unsigned NumOps) {
4713 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4717 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4718 const EVT *VTs, unsigned NumVTs,
4719 const SDValue *Ops, unsigned NumOps) {
4721 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4722 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4725 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4726 const SDValue *Ops, unsigned NumOps) {
4727 if (VTList.NumVTs == 1)
4728 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4732 // FIXME: figure out how to safely handle things like
4733 // int foo(int x) { return 1 << (x & 255); }
4734 // int bar() { return foo(256); }
4735 case ISD::SRA_PARTS:
4736 case ISD::SRL_PARTS:
4737 case ISD::SHL_PARTS:
4738 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4739 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4740 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4741 else if (N3.getOpcode() == ISD::AND)
4742 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4743 // If the and is only masking out bits that cannot effect the shift,
4744 // eliminate the and.
4745 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4746 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4747 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4753 // Memoize the node unless it returns a flag.
4755 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4756 FoldingSetNodeID ID;
4757 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4759 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4760 return SDValue(E, 0);
4763 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4764 } else if (NumOps == 2) {
4765 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4766 } else if (NumOps == 3) {
4767 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4770 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4772 CSEMap.InsertNode(N, IP);
4775 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4776 } else if (NumOps == 2) {
4777 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4778 } else if (NumOps == 3) {
4779 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4782 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4785 AllNodes.push_back(N);
4789 return SDValue(N, 0);
4792 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4793 return getNode(Opcode, DL, VTList, 0, 0);
4796 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4798 SDValue Ops[] = { N1 };
4799 return getNode(Opcode, DL, VTList, Ops, 1);
4802 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4803 SDValue N1, SDValue N2) {
4804 SDValue Ops[] = { N1, N2 };
4805 return getNode(Opcode, DL, VTList, Ops, 2);
4808 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4809 SDValue N1, SDValue N2, SDValue N3) {
4810 SDValue Ops[] = { N1, N2, N3 };
4811 return getNode(Opcode, DL, VTList, Ops, 3);
4814 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4815 SDValue N1, SDValue N2, SDValue N3,
4817 SDValue Ops[] = { N1, N2, N3, N4 };
4818 return getNode(Opcode, DL, VTList, Ops, 4);
4821 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4822 SDValue N1, SDValue N2, SDValue N3,
4823 SDValue N4, SDValue N5) {
4824 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4825 return getNode(Opcode, DL, VTList, Ops, 5);
4828 SDVTList SelectionDAG::getVTList(EVT VT) {
4829 return makeVTList(SDNode::getValueTypeList(VT), 1);
4832 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4833 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4834 E = VTList.rend(); I != E; ++I)
4835 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4838 EVT *Array = Allocator.Allocate<EVT>(2);
4841 SDVTList Result = makeVTList(Array, 2);
4842 VTList.push_back(Result);
4846 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4847 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4848 E = VTList.rend(); I != E; ++I)
4849 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4853 EVT *Array = Allocator.Allocate<EVT>(3);
4857 SDVTList Result = makeVTList(Array, 3);
4858 VTList.push_back(Result);
4862 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4863 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4864 E = VTList.rend(); I != E; ++I)
4865 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4866 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4869 EVT *Array = Allocator.Allocate<EVT>(4);
4874 SDVTList Result = makeVTList(Array, 4);
4875 VTList.push_back(Result);
4879 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4881 case 0: llvm_unreachable("Cannot have nodes without results!");
4882 case 1: return getVTList(VTs[0]);
4883 case 2: return getVTList(VTs[0], VTs[1]);
4884 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4885 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4889 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4890 E = VTList.rend(); I != E; ++I) {
4891 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4894 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4898 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4899 std::copy(VTs, VTs+NumVTs, Array);
4900 SDVTList Result = makeVTList(Array, NumVTs);
4901 VTList.push_back(Result);
4906 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4907 /// specified operands. If the resultant node already exists in the DAG,
4908 /// this does not modify the specified node, instead it returns the node that
4909 /// already exists. If the resultant node does not exist in the DAG, the
4910 /// input node is returned. As a degenerate case, if you specify the same
4911 /// input operands as the node already has, the input node is returned.
4912 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4913 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4915 // Check to see if there is no change.
4916 if (Op == N->getOperand(0)) return N;
4918 // See if the modified node already exists.
4919 void *InsertPos = 0;
4920 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4923 // Nope it doesn't. Remove the node from its current place in the maps.
4925 if (!RemoveNodeFromCSEMaps(N))
4928 // Now we update the operands.
4929 N->OperandList[0].set(Op);
4931 // If this gets put into a CSE map, add it.
4932 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4936 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4937 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4939 // Check to see if there is no change.
4940 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4941 return N; // No operands changed, just return the input node.
4943 // See if the modified node already exists.
4944 void *InsertPos = 0;
4945 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4948 // Nope it doesn't. Remove the node from its current place in the maps.
4950 if (!RemoveNodeFromCSEMaps(N))
4953 // Now we update the operands.
4954 if (N->OperandList[0] != Op1)
4955 N->OperandList[0].set(Op1);
4956 if (N->OperandList[1] != Op2)
4957 N->OperandList[1].set(Op2);
4959 // If this gets put into a CSE map, add it.
4960 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4964 SDNode *SelectionDAG::
4965 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4966 SDValue Ops[] = { Op1, Op2, Op3 };
4967 return UpdateNodeOperands(N, Ops, 3);
4970 SDNode *SelectionDAG::
4971 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4972 SDValue Op3, SDValue Op4) {
4973 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4974 return UpdateNodeOperands(N, Ops, 4);
4977 SDNode *SelectionDAG::
4978 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4979 SDValue Op3, SDValue Op4, SDValue Op5) {
4980 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4981 return UpdateNodeOperands(N, Ops, 5);
4984 SDNode *SelectionDAG::
4985 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4986 assert(N->getNumOperands() == NumOps &&
4987 "Update with wrong number of operands");
4989 // Check to see if there is no change.
4990 bool AnyChange = false;
4991 for (unsigned i = 0; i != NumOps; ++i) {
4992 if (Ops[i] != N->getOperand(i)) {
4998 // No operands changed, just return the input node.
4999 if (!AnyChange) return N;
5001 // See if the modified node already exists.
5002 void *InsertPos = 0;
5003 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
5006 // Nope it doesn't. Remove the node from its current place in the maps.
5008 if (!RemoveNodeFromCSEMaps(N))
5011 // Now we update the operands.
5012 for (unsigned i = 0; i != NumOps; ++i)
5013 if (N->OperandList[i] != Ops[i])
5014 N->OperandList[i].set(Ops[i]);
5016 // If this gets put into a CSE map, add it.
5017 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5021 /// DropOperands - Release the operands and set this node to have
5023 void SDNode::DropOperands() {
5024 // Unlike the code in MorphNodeTo that does this, we don't need to
5025 // watch for dead nodes here.
5026 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5032 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5035 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5037 SDVTList VTs = getVTList(VT);
5038 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
5041 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5042 EVT VT, SDValue Op1) {
5043 SDVTList VTs = getVTList(VT);
5044 SDValue Ops[] = { Op1 };
5045 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5048 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5049 EVT VT, SDValue Op1,
5051 SDVTList VTs = getVTList(VT);
5052 SDValue Ops[] = { Op1, Op2 };
5053 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5056 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5057 EVT VT, SDValue Op1,
5058 SDValue Op2, SDValue Op3) {
5059 SDVTList VTs = getVTList(VT);
5060 SDValue Ops[] = { Op1, Op2, Op3 };
5061 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5064 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5065 EVT VT, const SDValue *Ops,
5067 SDVTList VTs = getVTList(VT);
5068 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5071 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5072 EVT VT1, EVT VT2, const SDValue *Ops,
5074 SDVTList VTs = getVTList(VT1, VT2);
5075 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5078 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5080 SDVTList VTs = getVTList(VT1, VT2);
5081 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5084 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5085 EVT VT1, EVT VT2, EVT VT3,
5086 const SDValue *Ops, unsigned NumOps) {
5087 SDVTList VTs = getVTList(VT1, VT2, VT3);
5088 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5091 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5092 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5093 const SDValue *Ops, unsigned NumOps) {
5094 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5095 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5098 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5101 SDVTList VTs = getVTList(VT1, VT2);
5102 SDValue Ops[] = { Op1 };
5103 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5106 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5108 SDValue Op1, SDValue Op2) {
5109 SDVTList VTs = getVTList(VT1, VT2);
5110 SDValue Ops[] = { Op1, Op2 };
5111 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5114 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5116 SDValue Op1, SDValue Op2,
5118 SDVTList VTs = getVTList(VT1, VT2);
5119 SDValue Ops[] = { Op1, Op2, Op3 };
5120 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5123 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5124 EVT VT1, EVT VT2, EVT VT3,
5125 SDValue Op1, SDValue Op2,
5127 SDVTList VTs = getVTList(VT1, VT2, VT3);
5128 SDValue Ops[] = { Op1, Op2, Op3 };
5129 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5132 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5133 SDVTList VTs, const SDValue *Ops,
5135 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5136 // Reset the NodeID to -1.
5141 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5142 /// the line number information on the merged node since it is not possible to
5143 /// preserve the information that operation is associated with multiple lines.
5144 /// This will make the debugger working better at -O0, were there is a higher
5145 /// probability having other instructions associated with that line.
5147 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5148 DebugLoc NLoc = N->getDebugLoc();
5149 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5150 N->setDebugLoc(DebugLoc());
5155 /// MorphNodeTo - This *mutates* the specified node to have the specified
5156 /// return type, opcode, and operands.
5158 /// Note that MorphNodeTo returns the resultant node. If there is already a
5159 /// node of the specified opcode and operands, it returns that node instead of
5160 /// the current one. Note that the DebugLoc need not be the same.
5162 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5163 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5164 /// node, and because it doesn't require CSE recalculation for any of
5165 /// the node's users.
5167 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5168 SDVTList VTs, const SDValue *Ops,
5170 // If an identical node already exists, use it.
5172 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5173 FoldingSetNodeID ID;
5174 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5175 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5176 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5179 if (!RemoveNodeFromCSEMaps(N))
5182 // Start the morphing.
5184 N->ValueList = VTs.VTs;
5185 N->NumValues = VTs.NumVTs;
5187 // Clear the operands list, updating used nodes to remove this from their
5188 // use list. Keep track of any operands that become dead as a result.
5189 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5190 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5192 SDNode *Used = Use.getNode();
5194 if (Used->use_empty())
5195 DeadNodeSet.insert(Used);
5198 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5199 // Initialize the memory references information.
5200 MN->setMemRefs(0, 0);
5201 // If NumOps is larger than the # of operands we can have in a
5202 // MachineSDNode, reallocate the operand list.
5203 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5204 if (MN->OperandsNeedDelete)
5205 delete[] MN->OperandList;
5206 if (NumOps > array_lengthof(MN->LocalOperands))
5207 // We're creating a final node that will live unmorphed for the
5208 // remainder of the current SelectionDAG iteration, so we can allocate
5209 // the operands directly out of a pool with no recycling metadata.
5210 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5213 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5214 MN->OperandsNeedDelete = false;
5216 MN->InitOperands(MN->OperandList, Ops, NumOps);
5218 // If NumOps is larger than the # of operands we currently have, reallocate
5219 // the operand list.
5220 if (NumOps > N->NumOperands) {
5221 if (N->OperandsNeedDelete)
5222 delete[] N->OperandList;
5223 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5224 N->OperandsNeedDelete = true;
5226 N->InitOperands(N->OperandList, Ops, NumOps);
5229 // Delete any nodes that are still dead after adding the uses for the
5231 if (!DeadNodeSet.empty()) {
5232 SmallVector<SDNode *, 16> DeadNodes;
5233 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5234 E = DeadNodeSet.end(); I != E; ++I)
5235 if ((*I)->use_empty())
5236 DeadNodes.push_back(*I);
5237 RemoveDeadNodes(DeadNodes);
5241 CSEMap.InsertNode(N, IP); // Memoize the new node.
5246 /// getMachineNode - These are used for target selectors to create a new node
5247 /// with specified return type(s), MachineInstr opcode, and operands.
5249 /// Note that getMachineNode returns the resultant node. If there is already a
5250 /// node of the specified opcode and operands, it returns that node instead of
5251 /// the current one.
5253 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5254 SDVTList VTs = getVTList(VT);
5255 return getMachineNode(Opcode, dl, VTs, 0, 0);
5259 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5260 SDVTList VTs = getVTList(VT);
5261 SDValue Ops[] = { Op1 };
5262 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5266 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5267 SDValue Op1, SDValue Op2) {
5268 SDVTList VTs = getVTList(VT);
5269 SDValue Ops[] = { Op1, Op2 };
5270 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5274 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5275 SDValue Op1, SDValue Op2, SDValue Op3) {
5276 SDVTList VTs = getVTList(VT);
5277 SDValue Ops[] = { Op1, Op2, Op3 };
5278 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5282 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5283 const SDValue *Ops, unsigned NumOps) {
5284 SDVTList VTs = getVTList(VT);
5285 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5289 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5290 SDVTList VTs = getVTList(VT1, VT2);
5291 return getMachineNode(Opcode, dl, VTs, 0, 0);
5295 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5296 EVT VT1, EVT VT2, SDValue Op1) {
5297 SDVTList VTs = getVTList(VT1, VT2);
5298 SDValue Ops[] = { Op1 };
5299 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5303 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5304 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5305 SDVTList VTs = getVTList(VT1, VT2);
5306 SDValue Ops[] = { Op1, Op2 };
5307 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5311 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5312 EVT VT1, EVT VT2, SDValue Op1,
5313 SDValue Op2, SDValue Op3) {
5314 SDVTList VTs = getVTList(VT1, VT2);
5315 SDValue Ops[] = { Op1, Op2, Op3 };
5316 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5320 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5322 const SDValue *Ops, unsigned NumOps) {
5323 SDVTList VTs = getVTList(VT1, VT2);
5324 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5328 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5329 EVT VT1, EVT VT2, EVT VT3,
5330 SDValue Op1, SDValue Op2) {
5331 SDVTList VTs = getVTList(VT1, VT2, VT3);
5332 SDValue Ops[] = { Op1, Op2 };
5333 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5337 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5338 EVT VT1, EVT VT2, EVT VT3,
5339 SDValue Op1, SDValue Op2, SDValue Op3) {
5340 SDVTList VTs = getVTList(VT1, VT2, VT3);
5341 SDValue Ops[] = { Op1, Op2, Op3 };
5342 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5346 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5347 EVT VT1, EVT VT2, EVT VT3,
5348 const SDValue *Ops, unsigned NumOps) {
5349 SDVTList VTs = getVTList(VT1, VT2, VT3);
5350 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5354 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5355 EVT VT2, EVT VT3, EVT VT4,
5356 const SDValue *Ops, unsigned NumOps) {
5357 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5358 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5362 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5363 ArrayRef<EVT> ResultTys,
5364 const SDValue *Ops, unsigned NumOps) {
5365 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5366 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5370 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5371 const SDValue *Ops, unsigned NumOps) {
5372 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5377 FoldingSetNodeID ID;
5378 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5380 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5381 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5385 // Allocate a new MachineSDNode.
5386 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5388 // Initialize the operands list.
5389 if (NumOps > array_lengthof(N->LocalOperands))
5390 // We're creating a final node that will live unmorphed for the
5391 // remainder of the current SelectionDAG iteration, so we can allocate
5392 // the operands directly out of a pool with no recycling metadata.
5393 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5396 N->InitOperands(N->LocalOperands, Ops, NumOps);
5397 N->OperandsNeedDelete = false;
5400 CSEMap.InsertNode(N, IP);
5402 AllNodes.push_back(N);
5404 VerifyMachineNode(N);
5409 /// getTargetExtractSubreg - A convenience function for creating
5410 /// TargetOpcode::EXTRACT_SUBREG nodes.
5412 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5414 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5415 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5416 VT, Operand, SRIdxVal);
5417 return SDValue(Subreg, 0);
5420 /// getTargetInsertSubreg - A convenience function for creating
5421 /// TargetOpcode::INSERT_SUBREG nodes.
5423 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5424 SDValue Operand, SDValue Subreg) {
5425 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5426 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5427 VT, Operand, Subreg, SRIdxVal);
5428 return SDValue(Result, 0);
5431 /// getNodeIfExists - Get the specified node if it's already available, or
5432 /// else return NULL.
5433 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5434 const SDValue *Ops, unsigned NumOps) {
5435 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5436 FoldingSetNodeID ID;
5437 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5439 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5445 /// getDbgValue - Creates a SDDbgValue node.
5448 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5449 DebugLoc DL, unsigned O) {
5450 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5454 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5455 DebugLoc DL, unsigned O) {
5456 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5460 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5461 DebugLoc DL, unsigned O) {
5462 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5467 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5468 /// pointed to by a use iterator is deleted, increment the use iterator
5469 /// so that it doesn't dangle.
5471 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5472 SDNode::use_iterator &UI;
5473 SDNode::use_iterator &UE;
5475 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5476 // Increment the iterator as needed.
5477 while (UI != UE && N == *UI)
5482 RAUWUpdateListener(SelectionDAG &d,
5483 SDNode::use_iterator &ui,
5484 SDNode::use_iterator &ue)
5485 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5490 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5491 /// This can cause recursive merging of nodes in the DAG.
5493 /// This version assumes From has a single result value.
5495 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5496 SDNode *From = FromN.getNode();
5497 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5498 "Cannot replace with this method!");
5499 assert(From != To.getNode() && "Cannot replace uses of with self");
5501 // Iterate over all the existing uses of From. New uses will be added
5502 // to the beginning of the use list, which we avoid visiting.
5503 // This specifically avoids visiting uses of From that arise while the
5504 // replacement is happening, because any such uses would be the result
5505 // of CSE: If an existing node looks like From after one of its operands
5506 // is replaced by To, we don't want to replace of all its users with To
5507 // too. See PR3018 for more info.
5508 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5509 RAUWUpdateListener Listener(*this, UI, UE);
5513 // This node is about to morph, remove its old self from the CSE maps.
5514 RemoveNodeFromCSEMaps(User);
5516 // A user can appear in a use list multiple times, and when this
5517 // happens the uses are usually next to each other in the list.
5518 // To help reduce the number of CSE recomputations, process all
5519 // the uses of this user that we can find this way.
5521 SDUse &Use = UI.getUse();
5524 } while (UI != UE && *UI == User);
5526 // Now that we have modified User, add it back to the CSE maps. If it
5527 // already exists there, recursively merge the results together.
5528 AddModifiedNodeToCSEMaps(User);
5531 // If we just RAUW'd the root, take note.
5532 if (FromN == getRoot())
5536 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5537 /// This can cause recursive merging of nodes in the DAG.
5539 /// This version assumes that for each value of From, there is a
5540 /// corresponding value in To in the same position with the same type.
5542 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5544 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5545 assert((!From->hasAnyUseOfValue(i) ||
5546 From->getValueType(i) == To->getValueType(i)) &&
5547 "Cannot use this version of ReplaceAllUsesWith!");
5550 // Handle the trivial case.
5554 // Iterate over just the existing users of From. See the comments in
5555 // the ReplaceAllUsesWith above.
5556 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5557 RAUWUpdateListener Listener(*this, UI, UE);
5561 // This node is about to morph, remove its old self from the CSE maps.
5562 RemoveNodeFromCSEMaps(User);
5564 // A user can appear in a use list multiple times, and when this
5565 // happens the uses are usually next to each other in the list.
5566 // To help reduce the number of CSE recomputations, process all
5567 // the uses of this user that we can find this way.
5569 SDUse &Use = UI.getUse();
5572 } while (UI != UE && *UI == User);
5574 // Now that we have modified User, add it back to the CSE maps. If it
5575 // already exists there, recursively merge the results together.
5576 AddModifiedNodeToCSEMaps(User);
5579 // If we just RAUW'd the root, take note.
5580 if (From == getRoot().getNode())
5581 setRoot(SDValue(To, getRoot().getResNo()));
5584 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5585 /// This can cause recursive merging of nodes in the DAG.
5587 /// This version can replace From with any result values. To must match the
5588 /// number and types of values returned by From.
5589 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5590 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5591 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5593 // Iterate over just the existing users of From. See the comments in
5594 // the ReplaceAllUsesWith above.
5595 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5596 RAUWUpdateListener Listener(*this, UI, UE);
5600 // This node is about to morph, remove its old self from the CSE maps.
5601 RemoveNodeFromCSEMaps(User);
5603 // A user can appear in a use list multiple times, and when this
5604 // happens the uses are usually next to each other in the list.
5605 // To help reduce the number of CSE recomputations, process all
5606 // the uses of this user that we can find this way.
5608 SDUse &Use = UI.getUse();
5609 const SDValue &ToOp = To[Use.getResNo()];
5612 } while (UI != UE && *UI == User);
5614 // Now that we have modified User, add it back to the CSE maps. If it
5615 // already exists there, recursively merge the results together.
5616 AddModifiedNodeToCSEMaps(User);
5619 // If we just RAUW'd the root, take note.
5620 if (From == getRoot().getNode())
5621 setRoot(SDValue(To[getRoot().getResNo()]));
5624 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5625 /// uses of other values produced by From.getNode() alone. The Deleted
5626 /// vector is handled the same way as for ReplaceAllUsesWith.
5627 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5628 // Handle the really simple, really trivial case efficiently.
5629 if (From == To) return;
5631 // Handle the simple, trivial, case efficiently.
5632 if (From.getNode()->getNumValues() == 1) {
5633 ReplaceAllUsesWith(From, To);
5637 // Iterate over just the existing users of From. See the comments in
5638 // the ReplaceAllUsesWith above.
5639 SDNode::use_iterator UI = From.getNode()->use_begin(),
5640 UE = From.getNode()->use_end();
5641 RAUWUpdateListener Listener(*this, UI, UE);
5644 bool UserRemovedFromCSEMaps = false;
5646 // A user can appear in a use list multiple times, and when this
5647 // happens the uses are usually next to each other in the list.
5648 // To help reduce the number of CSE recomputations, process all
5649 // the uses of this user that we can find this way.
5651 SDUse &Use = UI.getUse();
5653 // Skip uses of different values from the same node.
5654 if (Use.getResNo() != From.getResNo()) {
5659 // If this node hasn't been modified yet, it's still in the CSE maps,
5660 // so remove its old self from the CSE maps.
5661 if (!UserRemovedFromCSEMaps) {
5662 RemoveNodeFromCSEMaps(User);
5663 UserRemovedFromCSEMaps = true;
5668 } while (UI != UE && *UI == User);
5670 // We are iterating over all uses of the From node, so if a use
5671 // doesn't use the specific value, no changes are made.
5672 if (!UserRemovedFromCSEMaps)
5675 // Now that we have modified User, add it back to the CSE maps. If it
5676 // already exists there, recursively merge the results together.
5677 AddModifiedNodeToCSEMaps(User);
5680 // If we just RAUW'd the root, take note.
5681 if (From == getRoot())
5686 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5687 /// to record information about a use.
5694 /// operator< - Sort Memos by User.
5695 bool operator<(const UseMemo &L, const UseMemo &R) {
5696 return (intptr_t)L.User < (intptr_t)R.User;
5700 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5701 /// uses of other values produced by From.getNode() alone. The same value
5702 /// may appear in both the From and To list. The Deleted vector is
5703 /// handled the same way as for ReplaceAllUsesWith.
5704 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5707 // Handle the simple, trivial case efficiently.
5709 return ReplaceAllUsesOfValueWith(*From, *To);
5711 // Read up all the uses and make records of them. This helps
5712 // processing new uses that are introduced during the
5713 // replacement process.
5714 SmallVector<UseMemo, 4> Uses;
5715 for (unsigned i = 0; i != Num; ++i) {
5716 unsigned FromResNo = From[i].getResNo();
5717 SDNode *FromNode = From[i].getNode();
5718 for (SDNode::use_iterator UI = FromNode->use_begin(),
5719 E = FromNode->use_end(); UI != E; ++UI) {
5720 SDUse &Use = UI.getUse();
5721 if (Use.getResNo() == FromResNo) {
5722 UseMemo Memo = { *UI, i, &Use };
5723 Uses.push_back(Memo);
5728 // Sort the uses, so that all the uses from a given User are together.
5729 std::sort(Uses.begin(), Uses.end());
5731 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5732 UseIndex != UseIndexEnd; ) {
5733 // We know that this user uses some value of From. If it is the right
5734 // value, update it.
5735 SDNode *User = Uses[UseIndex].User;
5737 // This node is about to morph, remove its old self from the CSE maps.
5738 RemoveNodeFromCSEMaps(User);
5740 // The Uses array is sorted, so all the uses for a given User
5741 // are next to each other in the list.
5742 // To help reduce the number of CSE recomputations, process all
5743 // the uses of this user that we can find this way.
5745 unsigned i = Uses[UseIndex].Index;
5746 SDUse &Use = *Uses[UseIndex].Use;
5750 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5752 // Now that we have modified User, add it back to the CSE maps. If it
5753 // already exists there, recursively merge the results together.
5754 AddModifiedNodeToCSEMaps(User);
5758 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5759 /// based on their topological order. It returns the maximum id and a vector
5760 /// of the SDNodes* in assigned order by reference.
5761 unsigned SelectionDAG::AssignTopologicalOrder() {
5763 unsigned DAGSize = 0;
5765 // SortedPos tracks the progress of the algorithm. Nodes before it are
5766 // sorted, nodes after it are unsorted. When the algorithm completes
5767 // it is at the end of the list.
5768 allnodes_iterator SortedPos = allnodes_begin();
5770 // Visit all the nodes. Move nodes with no operands to the front of
5771 // the list immediately. Annotate nodes that do have operands with their
5772 // operand count. Before we do this, the Node Id fields of the nodes
5773 // may contain arbitrary values. After, the Node Id fields for nodes
5774 // before SortedPos will contain the topological sort index, and the
5775 // Node Id fields for nodes At SortedPos and after will contain the
5776 // count of outstanding operands.
5777 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5780 unsigned Degree = N->getNumOperands();
5782 // A node with no uses, add it to the result array immediately.
5783 N->setNodeId(DAGSize++);
5784 allnodes_iterator Q = N;
5786 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5787 assert(SortedPos != AllNodes.end() && "Overran node list");
5790 // Temporarily use the Node Id as scratch space for the degree count.
5791 N->setNodeId(Degree);
5795 // Visit all the nodes. As we iterate, move nodes into sorted order,
5796 // such that by the time the end is reached all nodes will be sorted.
5797 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5800 // N is in sorted position, so all its uses have one less operand
5801 // that needs to be sorted.
5802 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5805 unsigned Degree = P->getNodeId();
5806 assert(Degree != 0 && "Invalid node degree");
5809 // All of P's operands are sorted, so P may sorted now.
5810 P->setNodeId(DAGSize++);
5812 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5813 assert(SortedPos != AllNodes.end() && "Overran node list");
5816 // Update P's outstanding operand count.
5817 P->setNodeId(Degree);
5820 if (I == SortedPos) {
5823 dbgs() << "Overran sorted position:\n";
5826 llvm_unreachable(0);
5830 assert(SortedPos == AllNodes.end() &&
5831 "Topological sort incomplete!");
5832 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5833 "First node in topological sort is not the entry token!");
5834 assert(AllNodes.front().getNodeId() == 0 &&
5835 "First node in topological sort has non-zero id!");
5836 assert(AllNodes.front().getNumOperands() == 0 &&
5837 "First node in topological sort has operands!");
5838 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5839 "Last node in topologic sort has unexpected id!");
5840 assert(AllNodes.back().use_empty() &&
5841 "Last node in topologic sort has users!");
5842 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5846 /// AssignOrdering - Assign an order to the SDNode.
5847 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5848 assert(SD && "Trying to assign an order to a null node!");
5849 Ordering->add(SD, Order);
5852 /// GetOrdering - Get the order for the SDNode.
5853 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5854 assert(SD && "Trying to get the order of a null node!");
5855 return Ordering->getOrder(SD);
5858 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5859 /// value is produced by SD.
5860 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5861 DbgInfo->add(DB, SD, isParameter);
5863 SD->setHasDebugValue(true);
5866 /// TransferDbgValues - Transfer SDDbgValues.
5867 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5868 if (From == To || !From.getNode()->getHasDebugValue())
5870 SDNode *FromNode = From.getNode();
5871 SDNode *ToNode = To.getNode();
5872 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5873 SmallVector<SDDbgValue *, 2> ClonedDVs;
5874 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5876 SDDbgValue *Dbg = *I;
5877 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5878 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5879 Dbg->getOffset(), Dbg->getDebugLoc(),
5881 ClonedDVs.push_back(Clone);
5884 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5885 E = ClonedDVs.end(); I != E; ++I)
5886 AddDbgValue(*I, ToNode, false);
5889 //===----------------------------------------------------------------------===//
5891 //===----------------------------------------------------------------------===//
5893 HandleSDNode::~HandleSDNode() {
5897 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5898 const GlobalValue *GA,
5899 EVT VT, int64_t o, unsigned char TF)
5900 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5904 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5905 MachineMemOperand *mmo)
5906 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5907 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5908 MMO->isNonTemporal(), MMO->isInvariant());
5909 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5910 assert(isNonTemporal() == MMO->isNonTemporal() &&
5911 "Non-temporal encoding error!");
5912 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5915 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5916 const SDValue *Ops, unsigned NumOps, EVT memvt,
5917 MachineMemOperand *mmo)
5918 : SDNode(Opc, dl, VTs, Ops, NumOps),
5919 MemoryVT(memvt), MMO(mmo) {
5920 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5921 MMO->isNonTemporal(), MMO->isInvariant());
5922 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5923 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5926 /// Profile - Gather unique data for the node.
5928 void SDNode::Profile(FoldingSetNodeID &ID) const {
5929 AddNodeIDNode(ID, this);
5934 std::vector<EVT> VTs;
5937 VTs.reserve(MVT::LAST_VALUETYPE);
5938 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5939 VTs.push_back(MVT((MVT::SimpleValueType)i));
5944 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5945 static ManagedStatic<EVTArray> SimpleVTArray;
5946 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5948 /// getValueTypeList - Return a pointer to the specified value type.
5950 const EVT *SDNode::getValueTypeList(EVT VT) {
5951 if (VT.isExtended()) {
5952 sys::SmartScopedLock<true> Lock(*VTMutex);
5953 return &(*EVTs->insert(VT).first);
5955 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5956 "Value type out of range!");
5957 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5961 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5962 /// indicated value. This method ignores uses of other values defined by this
5964 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5965 assert(Value < getNumValues() && "Bad value!");
5967 // TODO: Only iterate over uses of a given value of the node
5968 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5969 if (UI.getUse().getResNo() == Value) {
5976 // Found exactly the right number of uses?
5981 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5982 /// value. This method ignores uses of other values defined by this operation.
5983 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5984 assert(Value < getNumValues() && "Bad value!");
5986 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5987 if (UI.getUse().getResNo() == Value)
5994 /// isOnlyUserOf - Return true if this node is the only use of N.
5996 bool SDNode::isOnlyUserOf(SDNode *N) const {
5998 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6009 /// isOperand - Return true if this node is an operand of N.
6011 bool SDValue::isOperandOf(SDNode *N) const {
6012 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6013 if (*this == N->getOperand(i))
6018 bool SDNode::isOperandOf(SDNode *N) const {
6019 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6020 if (this == N->OperandList[i].getNode())
6025 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6026 /// be a chain) reaches the specified operand without crossing any
6027 /// side-effecting instructions on any chain path. In practice, this looks
6028 /// through token factors and non-volatile loads. In order to remain efficient,
6029 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6030 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6031 unsigned Depth) const {
6032 if (*this == Dest) return true;
6034 // Don't search too deeply, we just want to be able to see through
6035 // TokenFactor's etc.
6036 if (Depth == 0) return false;
6038 // If this is a token factor, all inputs to the TF happen in parallel. If any
6039 // of the operands of the TF does not reach dest, then we cannot do the xform.
6040 if (getOpcode() == ISD::TokenFactor) {
6041 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6042 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6047 // Loads don't have side effects, look through them.
6048 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6049 if (!Ld->isVolatile())
6050 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6055 /// hasPredecessor - Return true if N is a predecessor of this node.
6056 /// N is either an operand of this node, or can be reached by recursively
6057 /// traversing up the operands.
6058 /// NOTE: This is an expensive method. Use it carefully.
6059 bool SDNode::hasPredecessor(const SDNode *N) const {
6060 SmallPtrSet<const SDNode *, 32> Visited;
6061 SmallVector<const SDNode *, 16> Worklist;
6062 return hasPredecessorHelper(N, Visited, Worklist);
6065 bool SDNode::hasPredecessorHelper(const SDNode *N,
6066 SmallPtrSet<const SDNode *, 32> &Visited,
6067 SmallVector<const SDNode *, 16> &Worklist) const {
6068 if (Visited.empty()) {
6069 Worklist.push_back(this);
6071 // Take a look in the visited set. If we've already encountered this node
6072 // we needn't search further.
6073 if (Visited.count(N))
6077 // Haven't visited N yet. Continue the search.
6078 while (!Worklist.empty()) {
6079 const SDNode *M = Worklist.pop_back_val();
6080 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6081 SDNode *Op = M->getOperand(i).getNode();
6082 if (Visited.insert(Op))
6083 Worklist.push_back(Op);
6092 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6093 assert(Num < NumOperands && "Invalid child # of SDNode!");
6094 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6097 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6098 assert(N->getNumValues() == 1 &&
6099 "Can't unroll a vector with multiple results!");
6101 EVT VT = N->getValueType(0);
6102 unsigned NE = VT.getVectorNumElements();
6103 EVT EltVT = VT.getVectorElementType();
6104 DebugLoc dl = N->getDebugLoc();
6106 SmallVector<SDValue, 8> Scalars;
6107 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6109 // If ResNE is 0, fully unroll the vector op.
6112 else if (NE > ResNE)
6116 for (i= 0; i != NE; ++i) {
6117 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6118 SDValue Operand = N->getOperand(j);
6119 EVT OperandVT = Operand.getValueType();
6120 if (OperandVT.isVector()) {
6121 // A vector operand; extract a single element.
6122 EVT OperandEltVT = OperandVT.getVectorElementType();
6123 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6126 getConstant(i, TLI.getPointerTy()));
6128 // A scalar operand; just use it as is.
6129 Operands[j] = Operand;
6133 switch (N->getOpcode()) {
6135 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6136 &Operands[0], Operands.size()));
6139 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6140 &Operands[0], Operands.size()));
6147 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6148 getShiftAmountOperand(Operands[0].getValueType(),
6151 case ISD::SIGN_EXTEND_INREG:
6152 case ISD::FP_ROUND_INREG: {
6153 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6154 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6156 getValueType(ExtVT)));
6161 for (; i < ResNE; ++i)
6162 Scalars.push_back(getUNDEF(EltVT));
6164 return getNode(ISD::BUILD_VECTOR, dl,
6165 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6166 &Scalars[0], Scalars.size());
6170 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6171 /// location that is 'Dist' units away from the location that the 'Base' load
6172 /// is loading from.
6173 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6174 unsigned Bytes, int Dist) const {
6175 if (LD->getChain() != Base->getChain())
6177 EVT VT = LD->getValueType(0);
6178 if (VT.getSizeInBits() / 8 != Bytes)
6181 SDValue Loc = LD->getOperand(1);
6182 SDValue BaseLoc = Base->getOperand(1);
6183 if (Loc.getOpcode() == ISD::FrameIndex) {
6184 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6186 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6187 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6188 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6189 int FS = MFI->getObjectSize(FI);
6190 int BFS = MFI->getObjectSize(BFI);
6191 if (FS != BFS || FS != (int)Bytes) return false;
6192 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6196 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6197 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6200 const GlobalValue *GV1 = NULL;
6201 const GlobalValue *GV2 = NULL;
6202 int64_t Offset1 = 0;
6203 int64_t Offset2 = 0;
6204 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6205 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6206 if (isGA1 && isGA2 && GV1 == GV2)
6207 return Offset1 == (Offset2 + Dist*Bytes);
6212 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6213 /// it cannot be inferred.
6214 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6215 // If this is a GlobalAddress + cst, return the alignment.
6216 const GlobalValue *GV;
6217 int64_t GVOffset = 0;
6218 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6219 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6220 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6221 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6222 TLI.getDataLayout());
6223 unsigned AlignBits = KnownZero.countTrailingOnes();
6224 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6226 return MinAlign(Align, GVOffset);
6229 // If this is a direct reference to a stack slot, use information about the
6230 // stack slot's alignment.
6231 int FrameIdx = 1 << 31;
6232 int64_t FrameOffset = 0;
6233 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6234 FrameIdx = FI->getIndex();
6235 } else if (isBaseWithConstantOffset(Ptr) &&
6236 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6238 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6239 FrameOffset = Ptr.getConstantOperandVal(1);
6242 if (FrameIdx != (1 << 31)) {
6243 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6244 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6252 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6253 unsigned GlobalAddressSDNode::getAddressSpace() const {
6254 return getGlobal()->getType()->getAddressSpace();
6258 Type *ConstantPoolSDNode::getType() const {
6259 if (isMachineConstantPoolEntry())
6260 return Val.MachineCPVal->getType();
6261 return Val.ConstVal->getType();
6264 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6266 unsigned &SplatBitSize,
6268 unsigned MinSplatBits,
6270 EVT VT = getValueType(0);
6271 assert(VT.isVector() && "Expected a vector type");
6272 unsigned sz = VT.getSizeInBits();
6273 if (MinSplatBits > sz)
6276 SplatValue = APInt(sz, 0);
6277 SplatUndef = APInt(sz, 0);
6279 // Get the bits. Bits with undefined values (when the corresponding element
6280 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6281 // in SplatValue. If any of the values are not constant, give up and return
6283 unsigned int nOps = getNumOperands();
6284 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6285 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6287 for (unsigned j = 0; j < nOps; ++j) {
6288 unsigned i = isBigEndian ? nOps-1-j : j;
6289 SDValue OpVal = getOperand(i);
6290 unsigned BitPos = j * EltBitSize;
6292 if (OpVal.getOpcode() == ISD::UNDEF)
6293 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6294 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6295 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6296 zextOrTrunc(sz) << BitPos;
6297 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6298 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6303 // The build_vector is all constants or undefs. Find the smallest element
6304 // size that splats the vector.
6306 HasAnyUndefs = (SplatUndef != 0);
6309 unsigned HalfSize = sz / 2;
6310 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6311 APInt LowValue = SplatValue.trunc(HalfSize);
6312 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6313 APInt LowUndef = SplatUndef.trunc(HalfSize);
6315 // If the two halves do not match (ignoring undef bits), stop here.
6316 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6317 MinSplatBits > HalfSize)
6320 SplatValue = HighValue | LowValue;
6321 SplatUndef = HighUndef & LowUndef;
6330 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6331 // Find the first non-undef value in the shuffle mask.
6333 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6336 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6338 // Make sure all remaining elements are either undef or the same as the first
6340 for (int Idx = Mask[i]; i != e; ++i)
6341 if (Mask[i] >= 0 && Mask[i] != Idx)
6347 static void checkForCyclesHelper(const SDNode *N,
6348 SmallPtrSet<const SDNode*, 32> &Visited,
6349 SmallPtrSet<const SDNode*, 32> &Checked) {
6350 // If this node has already been checked, don't check it again.
6351 if (Checked.count(N))
6354 // If a node has already been visited on this depth-first walk, reject it as
6356 if (!Visited.insert(N)) {
6357 dbgs() << "Offending node:\n";
6359 errs() << "Detected cycle in SelectionDAG\n";
6363 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6364 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6371 void llvm::checkForCycles(const llvm::SDNode *N) {
6373 assert(N && "Checking nonexistant SDNode");
6374 SmallPtrSet<const SDNode*, 32> visited;
6375 SmallPtrSet<const SDNode*, 32> checked;
6376 checkForCyclesHelper(N, visited, checked);
6380 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6381 checkForCycles(DAG->getRoot().getNode());