1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getMemoryVT().getRawBits());
433 ID.AddInteger(LD->getRawSubclassData());
437 const StoreSDNode *ST = cast<StoreSDNode>(N);
438 ID.AddInteger(ST->getMemoryVT().getRawBits());
439 ID.AddInteger(ST->getRawSubclassData());
442 case ISD::ATOMIC_CMP_SWAP:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_ADD:
445 case ISD::ATOMIC_LOAD_SUB:
446 case ISD::ATOMIC_LOAD_AND:
447 case ISD::ATOMIC_LOAD_OR:
448 case ISD::ATOMIC_LOAD_XOR:
449 case ISD::ATOMIC_LOAD_NAND:
450 case ISD::ATOMIC_LOAD_MIN:
451 case ISD::ATOMIC_LOAD_MAX:
452 case ISD::ATOMIC_LOAD_UMIN:
453 case ISD::ATOMIC_LOAD_UMAX: {
454 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
455 ID.AddInteger(AT->getMemoryVT().getRawBits());
456 ID.AddInteger(AT->getRawSubclassData());
459 } // end switch (N->getOpcode())
462 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
464 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
465 AddNodeIDOpcode(ID, N->getOpcode());
466 // Add the return value info.
467 AddNodeIDValueTypes(ID, N->getVTList());
468 // Add the operand info.
469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
471 // Handle SDNode leafs with special info.
472 AddNodeIDCustom(ID, N);
475 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
476 /// the CSE map that carries alignment, volatility, indexing mode, and
477 /// extension/truncation information.
479 static inline unsigned
480 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
481 bool isVolatile, unsigned Alignment) {
482 assert((ConvType & 3) == ConvType &&
483 "ConvType may not require more than 2 bits!");
484 assert((AM & 7) == AM &&
485 "AM may not require more than 3 bits!");
489 ((Log2_32(Alignment) + 1) << 6);
492 //===----------------------------------------------------------------------===//
493 // SelectionDAG Class
494 //===----------------------------------------------------------------------===//
496 /// doNotCSE - Return true if CSE should not be performed for this node.
497 static bool doNotCSE(SDNode *N) {
498 if (N->getValueType(0) == MVT::Flag)
499 return true; // Never CSE anything that produces a flag.
501 switch (N->getOpcode()) {
503 case ISD::HANDLENODE:
505 case ISD::DBG_STOPPOINT:
508 return true; // Never CSE these nodes.
511 // Check that remaining values produced are not flags.
512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
513 if (N->getValueType(i) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
519 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
521 void SelectionDAG::RemoveDeadNodes() {
522 // Create a dummy node (which is not added to allnodes), that adds a reference
523 // to the root node, preventing it from being deleted.
524 HandleSDNode Dummy(getRoot());
526 SmallVector<SDNode*, 128> DeadNodes;
528 // Add all obviously-dead nodes to the DeadNodes worklist.
529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
531 DeadNodes.push_back(I);
533 RemoveDeadNodes(DeadNodes);
535 // If the root changed (e.g. it was a dead load, update the root).
536 setRoot(Dummy.getValue());
539 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
540 /// given list, and any nodes that become unreachable as a result.
541 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
542 DAGUpdateListener *UpdateListener) {
544 // Process the worklist, deleting the nodes and adding their uses to the
546 while (!DeadNodes.empty()) {
547 SDNode *N = DeadNodes.pop_back_val();
550 UpdateListener->NodeDeleted(N, 0);
552 // Take the node out of the appropriate CSE map.
553 RemoveNodeFromCSEMaps(N);
555 // Next, brutally remove the operand list. This is safe to do, as there are
556 // no cycles in the graph.
557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
559 SDNode *Operand = Use.getNode();
562 // Now that we removed this operand, see if there are no uses of it left.
563 if (Operand->use_empty())
564 DeadNodes.push_back(Operand);
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 // First take this out of the appropriate CSE map.
578 RemoveNodeFromCSEMaps(N);
580 // Finally, remove uses due to operands of this node, remove from the
581 // AllNodes list, and delete the node.
582 DeleteNodeNotInCSEMaps(N);
585 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
586 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
587 assert(N->use_empty() && "Cannot delete a node that is not dead!");
589 // Drop all of the operands and decrement used node's use counts.
595 void SelectionDAG::DeallocateNode(SDNode *N) {
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
599 // Set the opcode to DELETED_NODE to help catch bugs when node
600 // memory is reallocated.
601 N->NodeType = ISD::DELETED_NODE;
603 NodeAllocator.Deallocate(AllNodes.remove(N));
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::EntryToken:
614 assert(0 && "EntryToken should not be in CSEMaps!");
616 case ISD::HANDLENODE: return false; // noop.
618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
619 "Cond code doesn't exist!");
620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
623 case ISD::ExternalSymbol:
624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
626 case ISD::TargetExternalSymbol:
628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
630 case ISD::VALUETYPE: {
631 MVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
636 ValueTypeNodes[VT.getSimpleVT()] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 assert(0 && "Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
707 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
708 /// were replaced with those specified. If this node is never memoized,
709 /// return null, otherwise return a pointer to the slot it would take. If a
710 /// node already exists with these operands, the slot will be non-null.
711 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
712 SDValue Op1, SDValue Op2,
717 SDValue Ops[] = { Op1, Op2 };
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
720 AddNodeIDCustom(ID, N);
721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
741 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
742 void SelectionDAG::VerifyNode(SDNode *N) {
743 switch (N->getOpcode()) {
746 case ISD::BUILD_PAIR: {
747 MVT VT = N->getValueType(0);
748 assert(N->getNumValues() == 1 && "Too many results!");
749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
750 "Wrong return type!");
751 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
753 "Mismatched operand types!");
754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
755 "Wrong operand type!");
756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
757 "Wrong return type size");
760 case ISD::BUILD_VECTOR: {
761 assert(N->getNumValues() == 1 && "Too many results!");
762 assert(N->getValueType(0).isVector() && "Wrong return type!");
763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
764 "Wrong number of operands!");
765 // FIXME: Change vector_shuffle to a variadic node with mask elements being
766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
767 // operand, and it is not always possible to legalize it. Turning off the
768 // following checks at least makes it possible to legalize most of the time.
769 // MVT EltVT = N->getValueType(0).getVectorElementType();
770 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
771 // assert(I->getValueType() == EltVT &&
772 // "Wrong operand type!");
778 /// getMVTAlignment - Compute the default alignment value for the
781 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
782 const Type *Ty = VT == MVT::iPTR ?
783 PointerType::get(Type::Int8Ty, 0) :
786 return TLI.getTargetData()->getABITypeAlignment(Ty);
789 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
790 : TLI(tli), FLI(fli),
791 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
792 Root(getEntryNode()) {
793 AllNodes.push_back(&EntryNode);
796 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
803 SelectionDAG::~SelectionDAG() {
807 void SelectionDAG::allnodes_clear() {
808 assert(&*AllNodes.begin() == &EntryNode);
809 AllNodes.remove(AllNodes.begin());
810 while (!AllNodes.empty())
811 DeallocateNode(AllNodes.begin());
814 void SelectionDAG::clear() {
816 OperandAllocator.Reset();
819 ExtendedValueTypeNodes.clear();
820 ExternalSymbols.clear();
821 TargetExternalSymbols.clear();
822 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
823 static_cast<CondCodeSDNode*>(0));
824 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
825 static_cast<SDNode*>(0));
827 EntryNode.UseList = 0;
828 AllNodes.push_back(&EntryNode);
829 Root = getEntryNode();
832 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
833 if (Op.getValueType() == VT) return Op;
834 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
836 return getNode(ISD::AND, Op.getValueType(), Op,
837 getConstant(Imm, Op.getValueType()));
840 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
841 if (Op.getValueType() == VT) return Op;
842 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
844 return getNode(ISD::AND, DL, Op.getValueType(), Op,
845 getConstant(Imm, Op.getValueType()));
848 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
850 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
853 MVT EltVT = VT.getVectorElementType();
855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
856 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
857 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT,
858 &NegOnes[0], NegOnes.size());
860 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
862 return getNode(ISD::XOR, DL, VT, Val, NegOne);
865 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
866 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
867 assert((EltVT.getSizeInBits() >= 64 ||
868 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
869 "getConstant with a uint64_t value that doesn't fit in the type!");
870 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
873 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
874 return getConstant(*ConstantInt::get(Val), VT, isT);
877 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
878 assert(VT.isInteger() && "Cannot create FP integer constant!");
880 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
881 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
882 "APInt size does not match type size!");
884 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
886 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
890 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
892 return SDValue(N, 0);
894 N = NodeAllocator.Allocate<ConstantSDNode>();
895 new (N) ConstantSDNode(isT, &Val, EltVT);
896 CSEMap.InsertNode(N, IP);
897 AllNodes.push_back(N);
900 SDValue Result(N, 0);
902 SmallVector<SDValue, 8> Ops;
903 Ops.assign(VT.getVectorNumElements(), Result);
904 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
909 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
910 return getConstant(Val, TLI.getPointerTy(), isTarget);
914 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
915 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
918 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
919 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
922 VT.isVector() ? VT.getVectorElementType() : VT;
924 // Do the map lookup using the actual bit pattern for the floating point
925 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
926 // we don't have issues with SNANs.
927 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
929 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
933 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
935 return SDValue(N, 0);
937 N = NodeAllocator.Allocate<ConstantFPSDNode>();
938 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
939 CSEMap.InsertNode(N, IP);
940 AllNodes.push_back(N);
943 SDValue Result(N, 0);
945 SmallVector<SDValue, 8> Ops;
946 Ops.assign(VT.getVectorNumElements(), Result);
947 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
952 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
954 VT.isVector() ? VT.getVectorElementType() : VT;
956 return getConstantFP(APFloat((float)Val), VT, isTarget);
958 return getConstantFP(APFloat(Val), VT, isTarget);
961 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
962 MVT VT, int64_t Offset,
966 // Truncate (with sign-extension) the offset value to the pointer size.
967 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
973 // If GV is an alias then use the aliasee for determining thread-localness.
974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
978 if (GVar && GVar->isThreadLocal())
979 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
981 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
986 ID.AddInteger(Offset);
988 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
989 return SDValue(E, 0);
990 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
991 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
992 CSEMap.InsertNode(N, IP);
993 AllNodes.push_back(N);
994 return SDValue(N, 0);
997 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
998 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1000 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1004 return SDValue(E, 0);
1005 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1006 new (N) FrameIndexSDNode(FI, VT, isTarget);
1007 CSEMap.InsertNode(N, IP);
1008 AllNodes.push_back(N);
1009 return SDValue(N, 0);
1012 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1013 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1014 FoldingSetNodeID ID;
1015 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1019 return SDValue(E, 0);
1020 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1021 new (N) JumpTableSDNode(JTI, VT, isTarget);
1022 CSEMap.InsertNode(N, IP);
1023 AllNodes.push_back(N);
1024 return SDValue(N, 0);
1027 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1028 unsigned Alignment, int Offset,
1032 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1033 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1034 FoldingSetNodeID ID;
1035 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1036 ID.AddInteger(Alignment);
1037 ID.AddInteger(Offset);
1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1041 return SDValue(E, 0);
1042 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1043 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1044 CSEMap.InsertNode(N, IP);
1045 AllNodes.push_back(N);
1046 return SDValue(N, 0);
1050 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1051 unsigned Alignment, int Offset,
1055 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1056 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1057 FoldingSetNodeID ID;
1058 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1059 ID.AddInteger(Alignment);
1060 ID.AddInteger(Offset);
1061 C->AddSelectionDAGCSEId(ID);
1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1064 return SDValue(E, 0);
1065 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1066 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1067 CSEMap.InsertNode(N, IP);
1068 AllNodes.push_back(N);
1069 return SDValue(N, 0);
1073 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1074 FoldingSetNodeID ID;
1075 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1079 return SDValue(E, 0);
1080 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1081 new (N) BasicBlockSDNode(MBB);
1082 CSEMap.InsertNode(N, IP);
1083 AllNodes.push_back(N);
1084 return SDValue(N, 0);
1087 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1088 FoldingSetNodeID ID;
1089 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1093 return SDValue(E, 0);
1094 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1095 new (N) BasicBlockSDNode(MBB, dl);
1096 CSEMap.InsertNode(N, IP);
1097 AllNodes.push_back(N);
1098 return SDValue(N, 0);
1101 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1102 FoldingSetNodeID ID;
1103 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1104 ID.AddInteger(Flags.getRawBits());
1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1107 return SDValue(E, 0);
1108 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1109 new (N) ARG_FLAGSSDNode(Flags);
1110 CSEMap.InsertNode(N, IP);
1111 AllNodes.push_back(N);
1112 return SDValue(N, 0);
1115 SDValue SelectionDAG::getValueType(MVT VT) {
1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1117 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1119 SDNode *&N = VT.isExtended() ?
1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1122 if (N) return SDValue(N, 0);
1123 N = NodeAllocator.Allocate<VTSDNode>();
1124 new (N) VTSDNode(VT);
1125 AllNodes.push_back(N);
1126 return SDValue(N, 0);
1129 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1130 SDNode *&N = ExternalSymbols[Sym];
1131 if (N) return SDValue(N, 0);
1132 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1133 new (N) ExternalSymbolSDNode(false, Sym, VT);
1134 AllNodes.push_back(N);
1135 return SDValue(N, 0);
1138 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1139 SDNode *&N = ExternalSymbols[Sym];
1140 if (N) return SDValue(N, 0);
1141 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1142 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1143 AllNodes.push_back(N);
1144 return SDValue(N, 0);
1147 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1148 SDNode *&N = TargetExternalSymbols[Sym];
1149 if (N) return SDValue(N, 0);
1150 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1151 new (N) ExternalSymbolSDNode(true, Sym, VT);
1152 AllNodes.push_back(N);
1153 return SDValue(N, 0);
1156 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1158 SDNode *&N = TargetExternalSymbols[Sym];
1159 if (N) return SDValue(N, 0);
1160 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1161 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1162 AllNodes.push_back(N);
1163 return SDValue(N, 0);
1166 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1167 if ((unsigned)Cond >= CondCodeNodes.size())
1168 CondCodeNodes.resize(Cond+1);
1170 if (CondCodeNodes[Cond] == 0) {
1171 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1172 new (N) CondCodeSDNode(Cond);
1173 CondCodeNodes[Cond] = N;
1174 AllNodes.push_back(N);
1176 return SDValue(CondCodeNodes[Cond], 0);
1179 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1180 SDValue STy, SDValue Rnd, SDValue Sat,
1181 ISD::CvtCode Code) {
1182 // If the src and dest types are the same, no conversion is necessary.
1186 FoldingSetNodeID ID;
1188 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1189 return SDValue(E, 0);
1190 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1191 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1192 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1193 CSEMap.InsertNode(N, IP);
1194 AllNodes.push_back(N);
1195 return SDValue(N, 0);
1198 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1199 FoldingSetNodeID ID;
1200 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1201 ID.AddInteger(RegNo);
1203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1204 return SDValue(E, 0);
1205 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1206 new (N) RegisterSDNode(RegNo, VT);
1207 CSEMap.InsertNode(N, IP);
1208 AllNodes.push_back(N);
1209 return SDValue(N, 0);
1212 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1213 unsigned Line, unsigned Col,
1215 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1216 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1217 AllNodes.push_back(N);
1218 return SDValue(N, 0);
1221 SDValue SelectionDAG::getLabel(unsigned Opcode,
1224 FoldingSetNodeID ID;
1225 SDValue Ops[] = { Root };
1226 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1227 ID.AddInteger(LabelID);
1229 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1230 return SDValue(E, 0);
1231 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1232 new (N) LabelSDNode(Opcode, Root, LabelID);
1233 CSEMap.InsertNode(N, IP);
1234 AllNodes.push_back(N);
1235 return SDValue(N, 0);
1238 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1241 FoldingSetNodeID ID;
1242 SDValue Ops[] = { Root };
1243 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1244 ID.AddInteger(LabelID);
1246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1247 return SDValue(E, 0);
1248 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1249 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1250 CSEMap.InsertNode(N, IP);
1251 AllNodes.push_back(N);
1252 return SDValue(N, 0);
1255 SDValue SelectionDAG::getSrcValue(const Value *V) {
1256 assert((!V || isa<PointerType>(V->getType())) &&
1257 "SrcValue is not a pointer?");
1259 FoldingSetNodeID ID;
1260 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1265 return SDValue(E, 0);
1267 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1268 new (N) SrcValueSDNode(V);
1269 CSEMap.InsertNode(N, IP);
1270 AllNodes.push_back(N);
1271 return SDValue(N, 0);
1274 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1276 const Value *v = MO.getValue();
1277 assert((!v || isa<PointerType>(v->getType())) &&
1278 "SrcValue is not a pointer?");
1281 FoldingSetNodeID ID;
1282 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1287 return SDValue(E, 0);
1289 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1290 new (N) MemOperandSDNode(MO);
1291 CSEMap.InsertNode(N, IP);
1292 AllNodes.push_back(N);
1293 return SDValue(N, 0);
1296 /// getShiftAmountOperand - Return the specified value casted to
1297 /// the target's desired shift amount type.
1298 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1299 MVT OpTy = Op.getValueType();
1300 MVT ShTy = TLI.getShiftAmountTy();
1301 if (OpTy == ShTy || OpTy.isVector()) return Op;
1303 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1304 return getNode(Opcode, ShTy, Op);
1307 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1308 /// specified value type.
1309 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1310 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1311 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1312 const Type *Ty = VT.getTypeForMVT();
1313 unsigned StackAlign =
1314 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1316 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1317 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1320 /// CreateStackTemporary - Create a stack temporary suitable for holding
1321 /// either of the specified value types.
1322 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1323 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1324 VT2.getStoreSizeInBits())/8;
1325 const Type *Ty1 = VT1.getTypeForMVT();
1326 const Type *Ty2 = VT2.getTypeForMVT();
1327 const TargetData *TD = TLI.getTargetData();
1328 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1329 TD->getPrefTypeAlignment(Ty2));
1331 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1332 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1333 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1336 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1337 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1338 // These setcc operations always fold.
1342 case ISD::SETFALSE2: return getConstant(0, VT);
1344 case ISD::SETTRUE2: return getConstant(1, VT);
1356 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1360 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1361 const APInt &C2 = N2C->getAPIntValue();
1362 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1363 const APInt &C1 = N1C->getAPIntValue();
1366 default: assert(0 && "Unknown integer setcc!");
1367 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1368 case ISD::SETNE: return getConstant(C1 != C2, VT);
1369 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1370 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1371 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1372 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1373 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1374 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1375 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1376 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1380 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1381 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1382 // No compile time operations on this type yet.
1383 if (N1C->getValueType(0) == MVT::ppcf128)
1386 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1389 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1390 return getNode(ISD::UNDEF, dl, VT);
1392 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1393 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1394 return getNode(ISD::UNDEF, dl, VT);
1396 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1397 R==APFloat::cmpLessThan, VT);
1398 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1399 return getNode(ISD::UNDEF, dl, VT);
1401 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1402 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1403 return getNode(ISD::UNDEF, dl, VT);
1405 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1406 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1407 return getNode(ISD::UNDEF, dl, VT);
1409 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1410 R==APFloat::cmpEqual, VT);
1411 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1412 return getNode(ISD::UNDEF, dl, VT);
1414 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1415 R==APFloat::cmpEqual, VT);
1416 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1417 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1418 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1419 R==APFloat::cmpEqual, VT);
1420 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1421 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1422 R==APFloat::cmpLessThan, VT);
1423 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1424 R==APFloat::cmpUnordered, VT);
1425 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1426 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1429 // Ensure that the constant occurs on the RHS.
1430 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1434 // Could not fold it.
1438 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1439 /// use this predicate to simplify operations downstream.
1440 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1441 unsigned BitWidth = Op.getValueSizeInBits();
1442 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1445 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1446 /// this predicate to simplify operations downstream. Mask is known to be zero
1447 /// for bits that V cannot have.
1448 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1449 unsigned Depth) const {
1450 APInt KnownZero, KnownOne;
1451 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1452 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1453 return (KnownZero & Mask) == Mask;
1456 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1457 /// known to be either zero or one and return them in the KnownZero/KnownOne
1458 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1460 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1461 APInt &KnownZero, APInt &KnownOne,
1462 unsigned Depth) const {
1463 unsigned BitWidth = Mask.getBitWidth();
1464 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1465 "Mask size mismatches value type size!");
1467 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1468 if (Depth == 6 || Mask == 0)
1469 return; // Limit search depth.
1471 APInt KnownZero2, KnownOne2;
1473 switch (Op.getOpcode()) {
1475 // We know all of the bits for a constant!
1476 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1477 KnownZero = ~KnownOne & Mask;
1480 // If either the LHS or the RHS are Zero, the result is zero.
1481 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1482 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1483 KnownZero2, KnownOne2, Depth+1);
1484 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1485 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1487 // Output known-1 bits are only known if set in both the LHS & RHS.
1488 KnownOne &= KnownOne2;
1489 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1490 KnownZero |= KnownZero2;
1493 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1494 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1495 KnownZero2, KnownOne2, Depth+1);
1496 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1497 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1499 // Output known-0 bits are only known if clear in both the LHS & RHS.
1500 KnownZero &= KnownZero2;
1501 // Output known-1 are known to be set if set in either the LHS | RHS.
1502 KnownOne |= KnownOne2;
1505 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1506 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1507 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1508 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1510 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1511 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1512 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1513 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1514 KnownZero = KnownZeroOut;
1518 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1519 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1520 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1521 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1522 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1524 // If low bits are zero in either operand, output low known-0 bits.
1525 // Also compute a conserative estimate for high known-0 bits.
1526 // More trickiness is possible, but this is sufficient for the
1527 // interesting case of alignment computation.
1529 unsigned TrailZ = KnownZero.countTrailingOnes() +
1530 KnownZero2.countTrailingOnes();
1531 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1532 KnownZero2.countLeadingOnes(),
1533 BitWidth) - BitWidth;
1535 TrailZ = std::min(TrailZ, BitWidth);
1536 LeadZ = std::min(LeadZ, BitWidth);
1537 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1538 APInt::getHighBitsSet(BitWidth, LeadZ);
1543 // For the purposes of computing leading zeros we can conservatively
1544 // treat a udiv as a logical right shift by the power of 2 known to
1545 // be less than the denominator.
1546 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1547 ComputeMaskedBits(Op.getOperand(0),
1548 AllOnes, KnownZero2, KnownOne2, Depth+1);
1549 unsigned LeadZ = KnownZero2.countLeadingOnes();
1553 ComputeMaskedBits(Op.getOperand(1),
1554 AllOnes, KnownZero2, KnownOne2, Depth+1);
1555 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1556 if (RHSUnknownLeadingOnes != BitWidth)
1557 LeadZ = std::min(BitWidth,
1558 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1560 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1564 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1565 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1566 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1567 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1569 // Only known if known in both the LHS and RHS.
1570 KnownOne &= KnownOne2;
1571 KnownZero &= KnownZero2;
1573 case ISD::SELECT_CC:
1574 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1575 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1579 // Only known if known in both the LHS and RHS.
1580 KnownOne &= KnownOne2;
1581 KnownZero &= KnownZero2;
1589 if (Op.getResNo() != 1)
1591 // The boolean result conforms to getBooleanContents. Fall through.
1593 // If we know the result of a setcc has the top bits zero, use this info.
1594 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1596 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1599 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1600 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1601 unsigned ShAmt = SA->getZExtValue();
1603 // If the shift count is an invalid immediate, don't do anything.
1604 if (ShAmt >= BitWidth)
1607 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1608 KnownZero, KnownOne, Depth+1);
1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1610 KnownZero <<= ShAmt;
1612 // low bits known zero.
1613 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1617 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1618 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1619 unsigned ShAmt = SA->getZExtValue();
1621 // If the shift count is an invalid immediate, don't do anything.
1622 if (ShAmt >= BitWidth)
1625 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1626 KnownZero, KnownOne, Depth+1);
1627 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1628 KnownZero = KnownZero.lshr(ShAmt);
1629 KnownOne = KnownOne.lshr(ShAmt);
1631 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1632 KnownZero |= HighBits; // High bits known zero.
1636 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1637 unsigned ShAmt = SA->getZExtValue();
1639 // If the shift count is an invalid immediate, don't do anything.
1640 if (ShAmt >= BitWidth)
1643 APInt InDemandedMask = (Mask << ShAmt);
1644 // If any of the demanded bits are produced by the sign extension, we also
1645 // demand the input sign bit.
1646 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1647 if (HighBits.getBoolValue())
1648 InDemandedMask |= APInt::getSignBit(BitWidth);
1650 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1653 KnownZero = KnownZero.lshr(ShAmt);
1654 KnownOne = KnownOne.lshr(ShAmt);
1656 // Handle the sign bits.
1657 APInt SignBit = APInt::getSignBit(BitWidth);
1658 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1660 if (KnownZero.intersects(SignBit)) {
1661 KnownZero |= HighBits; // New bits are known zero.
1662 } else if (KnownOne.intersects(SignBit)) {
1663 KnownOne |= HighBits; // New bits are known one.
1667 case ISD::SIGN_EXTEND_INREG: {
1668 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1669 unsigned EBits = EVT.getSizeInBits();
1671 // Sign extension. Compute the demanded bits in the result that are not
1672 // present in the input.
1673 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1675 APInt InSignBit = APInt::getSignBit(EBits);
1676 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1678 // If the sign extended bits are demanded, we know that the sign
1680 InSignBit.zext(BitWidth);
1681 if (NewBits.getBoolValue())
1682 InputDemandedBits |= InSignBit;
1684 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1685 KnownZero, KnownOne, Depth+1);
1686 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1688 // If the sign bit of the input is known set or clear, then we know the
1689 // top bits of the result.
1690 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1691 KnownZero |= NewBits;
1692 KnownOne &= ~NewBits;
1693 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1694 KnownOne |= NewBits;
1695 KnownZero &= ~NewBits;
1696 } else { // Input sign bit unknown
1697 KnownZero &= ~NewBits;
1698 KnownOne &= ~NewBits;
1705 unsigned LowBits = Log2_32(BitWidth)+1;
1706 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1711 if (ISD::isZEXTLoad(Op.getNode())) {
1712 LoadSDNode *LD = cast<LoadSDNode>(Op);
1713 MVT VT = LD->getMemoryVT();
1714 unsigned MemBits = VT.getSizeInBits();
1715 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1719 case ISD::ZERO_EXTEND: {
1720 MVT InVT = Op.getOperand(0).getValueType();
1721 unsigned InBits = InVT.getSizeInBits();
1722 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1723 APInt InMask = Mask;
1724 InMask.trunc(InBits);
1725 KnownZero.trunc(InBits);
1726 KnownOne.trunc(InBits);
1727 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1728 KnownZero.zext(BitWidth);
1729 KnownOne.zext(BitWidth);
1730 KnownZero |= NewBits;
1733 case ISD::SIGN_EXTEND: {
1734 MVT InVT = Op.getOperand(0).getValueType();
1735 unsigned InBits = InVT.getSizeInBits();
1736 APInt InSignBit = APInt::getSignBit(InBits);
1737 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1738 APInt InMask = Mask;
1739 InMask.trunc(InBits);
1741 // If any of the sign extended bits are demanded, we know that the sign
1742 // bit is demanded. Temporarily set this bit in the mask for our callee.
1743 if (NewBits.getBoolValue())
1744 InMask |= InSignBit;
1746 KnownZero.trunc(InBits);
1747 KnownOne.trunc(InBits);
1748 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1750 // Note if the sign bit is known to be zero or one.
1751 bool SignBitKnownZero = KnownZero.isNegative();
1752 bool SignBitKnownOne = KnownOne.isNegative();
1753 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1754 "Sign bit can't be known to be both zero and one!");
1756 // If the sign bit wasn't actually demanded by our caller, we don't
1757 // want it set in the KnownZero and KnownOne result values. Reset the
1758 // mask and reapply it to the result values.
1760 InMask.trunc(InBits);
1761 KnownZero &= InMask;
1764 KnownZero.zext(BitWidth);
1765 KnownOne.zext(BitWidth);
1767 // If the sign bit is known zero or one, the top bits match.
1768 if (SignBitKnownZero)
1769 KnownZero |= NewBits;
1770 else if (SignBitKnownOne)
1771 KnownOne |= NewBits;
1774 case ISD::ANY_EXTEND: {
1775 MVT InVT = Op.getOperand(0).getValueType();
1776 unsigned InBits = InVT.getSizeInBits();
1777 APInt InMask = Mask;
1778 InMask.trunc(InBits);
1779 KnownZero.trunc(InBits);
1780 KnownOne.trunc(InBits);
1781 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1782 KnownZero.zext(BitWidth);
1783 KnownOne.zext(BitWidth);
1786 case ISD::TRUNCATE: {
1787 MVT InVT = Op.getOperand(0).getValueType();
1788 unsigned InBits = InVT.getSizeInBits();
1789 APInt InMask = Mask;
1790 InMask.zext(InBits);
1791 KnownZero.zext(InBits);
1792 KnownOne.zext(InBits);
1793 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1795 KnownZero.trunc(BitWidth);
1796 KnownOne.trunc(BitWidth);
1799 case ISD::AssertZext: {
1800 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1801 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1802 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1804 KnownZero |= (~InMask) & Mask;
1808 // All bits are zero except the low bit.
1809 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1813 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1814 // We know that the top bits of C-X are clear if X contains less bits
1815 // than C (i.e. no wrap-around can happen). For example, 20-X is
1816 // positive if we can prove that X is >= 0 and < 16.
1817 if (CLHS->getAPIntValue().isNonNegative()) {
1818 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1819 // NLZ can't be BitWidth with no sign bit
1820 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1821 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1824 // If all of the MaskV bits are known to be zero, then we know the
1825 // output top bits are zero, because we now know that the output is
1827 if ((KnownZero2 & MaskV) == MaskV) {
1828 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1829 // Top bits known zero.
1830 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1837 // Output known-0 bits are known if clear or set in both the low clear bits
1838 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1839 // low 3 bits clear.
1840 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1841 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1842 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1843 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1845 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1846 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1847 KnownZeroOut = std::min(KnownZeroOut,
1848 KnownZero2.countTrailingOnes());
1850 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1854 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1855 const APInt &RA = Rem->getAPIntValue();
1856 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1857 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1858 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1859 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1861 // If the sign bit of the first operand is zero, the sign bit of
1862 // the result is zero. If the first operand has no one bits below
1863 // the second operand's single 1 bit, its sign will be zero.
1864 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1865 KnownZero2 |= ~LowBits;
1867 KnownZero |= KnownZero2 & Mask;
1869 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1874 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1875 const APInt &RA = Rem->getAPIntValue();
1876 if (RA.isPowerOf2()) {
1877 APInt LowBits = (RA - 1);
1878 APInt Mask2 = LowBits & Mask;
1879 KnownZero |= ~LowBits & Mask;
1880 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1881 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1886 // Since the result is less than or equal to either operand, any leading
1887 // zero bits in either operand must also exist in the result.
1888 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1889 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1891 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1894 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1895 KnownZero2.countLeadingOnes());
1897 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1901 // Allow the target to implement this method for its nodes.
1902 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1903 case ISD::INTRINSIC_WO_CHAIN:
1904 case ISD::INTRINSIC_W_CHAIN:
1905 case ISD::INTRINSIC_VOID:
1906 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1912 /// ComputeNumSignBits - Return the number of times the sign bit of the
1913 /// register is replicated into the other bits. We know that at least 1 bit
1914 /// is always equal to the sign bit (itself), but other cases can give us
1915 /// information. For example, immediately after an "SRA X, 2", we know that
1916 /// the top 3 bits are all equal to each other, so we return 3.
1917 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1918 MVT VT = Op.getValueType();
1919 assert(VT.isInteger() && "Invalid VT!");
1920 unsigned VTBits = VT.getSizeInBits();
1922 unsigned FirstAnswer = 1;
1925 return 1; // Limit search depth.
1927 switch (Op.getOpcode()) {
1929 case ISD::AssertSext:
1930 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1931 return VTBits-Tmp+1;
1932 case ISD::AssertZext:
1933 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1936 case ISD::Constant: {
1937 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1938 // If negative, return # leading ones.
1939 if (Val.isNegative())
1940 return Val.countLeadingOnes();
1942 // Return # leading zeros.
1943 return Val.countLeadingZeros();
1946 case ISD::SIGN_EXTEND:
1947 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1948 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1950 case ISD::SIGN_EXTEND_INREG:
1951 // Max of the input and what this extends.
1952 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1955 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1956 return std::max(Tmp, Tmp2);
1959 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1960 // SRA X, C -> adds C sign bits.
1961 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1962 Tmp += C->getZExtValue();
1963 if (Tmp > VTBits) Tmp = VTBits;
1967 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1968 // shl destroys sign bits.
1969 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1970 if (C->getZExtValue() >= VTBits || // Bad shift.
1971 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1972 return Tmp - C->getZExtValue();
1977 case ISD::XOR: // NOT is handled here.
1978 // Logical binary ops preserve the number of sign bits at the worst.
1979 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1981 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1982 FirstAnswer = std::min(Tmp, Tmp2);
1983 // We computed what we know about the sign bits as our first
1984 // answer. Now proceed to the generic code that uses
1985 // ComputeMaskedBits, and pick whichever answer is better.
1990 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1991 if (Tmp == 1) return 1; // Early out.
1992 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1993 return std::min(Tmp, Tmp2);
2001 if (Op.getResNo() != 1)
2003 // The boolean result conforms to getBooleanContents. Fall through.
2005 // If setcc returns 0/-1, all bits are sign bits.
2006 if (TLI.getBooleanContents() ==
2007 TargetLowering::ZeroOrNegativeOneBooleanContent)
2012 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2013 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2015 // Handle rotate right by N like a rotate left by 32-N.
2016 if (Op.getOpcode() == ISD::ROTR)
2017 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2019 // If we aren't rotating out all of the known-in sign bits, return the
2020 // number that are left. This handles rotl(sext(x), 1) for example.
2021 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2022 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2026 // Add can have at most one carry bit. Thus we know that the output
2027 // is, at worst, one more bit than the inputs.
2028 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2029 if (Tmp == 1) return 1; // Early out.
2031 // Special case decrementing a value (ADD X, -1):
2032 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2033 if (CRHS->isAllOnesValue()) {
2034 APInt KnownZero, KnownOne;
2035 APInt Mask = APInt::getAllOnesValue(VTBits);
2036 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2038 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2040 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2043 // If we are subtracting one from a positive number, there is no carry
2044 // out of the result.
2045 if (KnownZero.isNegative())
2049 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2050 if (Tmp2 == 1) return 1;
2051 return std::min(Tmp, Tmp2)-1;
2055 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2056 if (Tmp2 == 1) return 1;
2059 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2060 if (CLHS->isNullValue()) {
2061 APInt KnownZero, KnownOne;
2062 APInt Mask = APInt::getAllOnesValue(VTBits);
2063 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2064 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2066 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2069 // If the input is known to be positive (the sign bit is known clear),
2070 // the output of the NEG has the same number of sign bits as the input.
2071 if (KnownZero.isNegative())
2074 // Otherwise, we treat this like a SUB.
2077 // Sub can have at most one carry bit. Thus we know that the output
2078 // is, at worst, one more bit than the inputs.
2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2080 if (Tmp == 1) return 1; // Early out.
2081 return std::min(Tmp, Tmp2)-1;
2084 // FIXME: it's tricky to do anything useful for this, but it is an important
2085 // case for targets like X86.
2089 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2090 if (Op.getOpcode() == ISD::LOAD) {
2091 LoadSDNode *LD = cast<LoadSDNode>(Op);
2092 unsigned ExtType = LD->getExtensionType();
2095 case ISD::SEXTLOAD: // '17' bits known
2096 Tmp = LD->getMemoryVT().getSizeInBits();
2097 return VTBits-Tmp+1;
2098 case ISD::ZEXTLOAD: // '16' bits known
2099 Tmp = LD->getMemoryVT().getSizeInBits();
2104 // Allow the target to implement this method for its nodes.
2105 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2106 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2107 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2108 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2109 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2110 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2113 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2114 // use this information.
2115 APInt KnownZero, KnownOne;
2116 APInt Mask = APInt::getAllOnesValue(VTBits);
2117 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2119 if (KnownZero.isNegative()) { // sign bit is 0
2121 } else if (KnownOne.isNegative()) { // sign bit is 1;
2128 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2129 // the number of identical bits in the top of the input value.
2131 Mask <<= Mask.getBitWidth()-VTBits;
2132 // Return # leading zeros. We use 'min' here in case Val was zero before
2133 // shifting. We don't want to return '64' as for an i32 "0".
2134 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2138 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2139 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2140 if (!GA) return false;
2141 if (GA->getOffset() != 0) return false;
2142 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2143 if (!GV) return false;
2144 MachineModuleInfo *MMI = getMachineModuleInfo();
2145 return MMI && MMI->hasDebugInfo();
2149 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2150 /// element of the result of the vector shuffle.
2151 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2152 MVT VT = N->getValueType(0);
2153 SDValue PermMask = N->getOperand(2);
2154 SDValue Idx = PermMask.getOperand(i);
2155 if (Idx.getOpcode() == ISD::UNDEF)
2156 return getNode(ISD::UNDEF, VT.getVectorElementType());
2157 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2158 unsigned NumElems = PermMask.getNumOperands();
2159 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2162 if (V.getOpcode() == ISD::BIT_CONVERT) {
2163 V = V.getOperand(0);
2164 MVT VVT = V.getValueType();
2165 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2168 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2169 return (Index == 0) ? V.getOperand(0)
2170 : getNode(ISD::UNDEF, VT.getVectorElementType());
2171 if (V.getOpcode() == ISD::BUILD_VECTOR)
2172 return V.getOperand(Index);
2173 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2174 return getShuffleScalarElt(V.getNode(), Index);
2179 /// getNode - Gets or creates the specified node.
2181 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2182 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2185 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2186 FoldingSetNodeID ID;
2187 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2189 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2190 return SDValue(E, 0);
2191 SDNode *N = NodeAllocator.Allocate<SDNode>();
2192 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2193 CSEMap.InsertNode(N, IP);
2195 AllNodes.push_back(N);
2199 return SDValue(N, 0);
2202 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2203 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2206 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2207 MVT VT, SDValue Operand) {
2208 // Constant fold unary operations with an integer constant operand.
2209 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2210 const APInt &Val = C->getAPIntValue();
2211 unsigned BitWidth = VT.getSizeInBits();
2214 case ISD::SIGN_EXTEND:
2215 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2216 case ISD::ANY_EXTEND:
2217 case ISD::ZERO_EXTEND:
2219 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2220 case ISD::UINT_TO_FP:
2221 case ISD::SINT_TO_FP: {
2222 const uint64_t zero[] = {0, 0};
2223 // No compile time operations on this type.
2224 if (VT==MVT::ppcf128)
2226 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2227 (void)apf.convertFromAPInt(Val,
2228 Opcode==ISD::SINT_TO_FP,
2229 APFloat::rmNearestTiesToEven);
2230 return getConstantFP(apf, VT);
2232 case ISD::BIT_CONVERT:
2233 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2234 return getConstantFP(Val.bitsToFloat(), VT);
2235 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2236 return getConstantFP(Val.bitsToDouble(), VT);
2239 return getConstant(Val.byteSwap(), VT);
2241 return getConstant(Val.countPopulation(), VT);
2243 return getConstant(Val.countLeadingZeros(), VT);
2245 return getConstant(Val.countTrailingZeros(), VT);
2249 // Constant fold unary operations with a floating point constant operand.
2250 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2251 APFloat V = C->getValueAPF(); // make copy
2252 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2256 return getConstantFP(V, VT);
2259 return getConstantFP(V, VT);
2261 case ISD::FP_EXTEND: {
2263 // This can return overflow, underflow, or inexact; we don't care.
2264 // FIXME need to be more flexible about rounding mode.
2265 (void)V.convert(*MVTToAPFloatSemantics(VT),
2266 APFloat::rmNearestTiesToEven, &ignored);
2267 return getConstantFP(V, VT);
2269 case ISD::FP_TO_SINT:
2270 case ISD::FP_TO_UINT: {
2273 assert(integerPartWidth >= 64);
2274 // FIXME need to be more flexible about rounding mode.
2275 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2276 Opcode==ISD::FP_TO_SINT,
2277 APFloat::rmTowardZero, &ignored);
2278 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2280 return getConstant(x, VT);
2282 case ISD::BIT_CONVERT:
2283 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2284 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2285 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2286 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2292 unsigned OpOpcode = Operand.getNode()->getOpcode();
2294 case ISD::TokenFactor:
2295 case ISD::MERGE_VALUES:
2296 case ISD::CONCAT_VECTORS:
2297 return Operand; // Factor, merge or concat of one node? No need.
2298 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2299 case ISD::FP_EXTEND:
2300 assert(VT.isFloatingPoint() &&
2301 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2302 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2303 if (Operand.getOpcode() == ISD::UNDEF)
2304 return getNode(ISD::UNDEF, VT);
2306 case ISD::SIGN_EXTEND:
2307 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2308 "Invalid SIGN_EXTEND!");
2309 if (Operand.getValueType() == VT) return Operand; // noop extension
2310 assert(Operand.getValueType().bitsLT(VT)
2311 && "Invalid sext node, dst < src!");
2312 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2313 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2315 case ISD::ZERO_EXTEND:
2316 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2317 "Invalid ZERO_EXTEND!");
2318 if (Operand.getValueType() == VT) return Operand; // noop extension
2319 assert(Operand.getValueType().bitsLT(VT)
2320 && "Invalid zext node, dst < src!");
2321 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2322 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2324 case ISD::ANY_EXTEND:
2325 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2326 "Invalid ANY_EXTEND!");
2327 if (Operand.getValueType() == VT) return Operand; // noop extension
2328 assert(Operand.getValueType().bitsLT(VT)
2329 && "Invalid anyext node, dst < src!");
2330 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2331 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2332 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2335 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2336 "Invalid TRUNCATE!");
2337 if (Operand.getValueType() == VT) return Operand; // noop truncate
2338 assert(Operand.getValueType().bitsGT(VT)
2339 && "Invalid truncate node, src < dst!");
2340 if (OpOpcode == ISD::TRUNCATE)
2341 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2342 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2343 OpOpcode == ISD::ANY_EXTEND) {
2344 // If the source is smaller than the dest, we still need an extend.
2345 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2346 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2347 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2348 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2350 return Operand.getNode()->getOperand(0);
2353 case ISD::BIT_CONVERT:
2354 // Basic sanity checking.
2355 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2356 && "Cannot BIT_CONVERT between types of different sizes!");
2357 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2358 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2359 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2360 if (OpOpcode == ISD::UNDEF)
2361 return getNode(ISD::UNDEF, VT);
2363 case ISD::SCALAR_TO_VECTOR:
2364 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2365 VT.getVectorElementType() == Operand.getValueType() &&
2366 "Illegal SCALAR_TO_VECTOR node!");
2367 if (OpOpcode == ISD::UNDEF)
2368 return getNode(ISD::UNDEF, VT);
2369 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2370 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2371 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2372 Operand.getConstantOperandVal(1) == 0 &&
2373 Operand.getOperand(0).getValueType() == VT)
2374 return Operand.getOperand(0);
2377 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2378 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2379 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2380 Operand.getNode()->getOperand(0));
2381 if (OpOpcode == ISD::FNEG) // --X -> X
2382 return Operand.getNode()->getOperand(0);
2385 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2386 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2391 SDVTList VTs = getVTList(VT);
2392 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2393 FoldingSetNodeID ID;
2394 SDValue Ops[1] = { Operand };
2395 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2398 return SDValue(E, 0);
2399 N = NodeAllocator.Allocate<UnarySDNode>();
2400 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2401 CSEMap.InsertNode(N, IP);
2403 N = NodeAllocator.Allocate<UnarySDNode>();
2404 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2407 AllNodes.push_back(N);
2411 return SDValue(N, 0);
2414 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2416 ConstantSDNode *Cst1,
2417 ConstantSDNode *Cst2) {
2418 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2421 case ISD::ADD: return getConstant(C1 + C2, VT);
2422 case ISD::SUB: return getConstant(C1 - C2, VT);
2423 case ISD::MUL: return getConstant(C1 * C2, VT);
2425 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2428 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2431 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2434 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2436 case ISD::AND: return getConstant(C1 & C2, VT);
2437 case ISD::OR: return getConstant(C1 | C2, VT);
2438 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2439 case ISD::SHL: return getConstant(C1 << C2, VT);
2440 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2441 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2442 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2443 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2450 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2451 SDValue N1, SDValue N2) {
2452 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2455 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2456 SDValue N1, SDValue N2) {
2457 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2458 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2461 case ISD::TokenFactor:
2462 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2463 N2.getValueType() == MVT::Other && "Invalid token factor!");
2464 // Fold trivial token factors.
2465 if (N1.getOpcode() == ISD::EntryToken) return N2;
2466 if (N2.getOpcode() == ISD::EntryToken) return N1;
2467 if (N1 == N2) return N1;
2469 case ISD::CONCAT_VECTORS:
2470 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2471 // one big BUILD_VECTOR.
2472 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2473 N2.getOpcode() == ISD::BUILD_VECTOR) {
2474 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2475 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2476 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2480 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2481 N1.getValueType() == VT && "Binary operator types must match!");
2482 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2483 // worth handling here.
2484 if (N2C && N2C->isNullValue())
2486 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2493 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2494 N1.getValueType() == VT && "Binary operator types must match!");
2495 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2496 // it's worth handling here.
2497 if (N2C && N2C->isNullValue())
2507 assert(VT.isInteger() && "This operator does not apply to FP types!");
2515 if (Opcode == ISD::FADD) {
2517 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2518 if (CFP->getValueAPF().isZero())
2521 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2522 if (CFP->getValueAPF().isZero())
2524 } else if (Opcode == ISD::FSUB) {
2526 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2527 if (CFP->getValueAPF().isZero())
2531 assert(N1.getValueType() == N2.getValueType() &&
2532 N1.getValueType() == VT && "Binary operator types must match!");
2534 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2535 assert(N1.getValueType() == VT &&
2536 N1.getValueType().isFloatingPoint() &&
2537 N2.getValueType().isFloatingPoint() &&
2538 "Invalid FCOPYSIGN!");
2545 assert(VT == N1.getValueType() &&
2546 "Shift operators return type must be the same as their first arg");
2547 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2548 "Shifts only work on integers");
2550 // Always fold shifts of i1 values so the code generator doesn't need to
2551 // handle them. Since we know the size of the shift has to be less than the
2552 // size of the value, the shift/rotate count is guaranteed to be zero.
2556 case ISD::FP_ROUND_INREG: {
2557 MVT EVT = cast<VTSDNode>(N2)->getVT();
2558 assert(VT == N1.getValueType() && "Not an inreg round!");
2559 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2560 "Cannot FP_ROUND_INREG integer types");
2561 assert(EVT.bitsLE(VT) && "Not rounding down!");
2562 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2566 assert(VT.isFloatingPoint() &&
2567 N1.getValueType().isFloatingPoint() &&
2568 VT.bitsLE(N1.getValueType()) &&
2569 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2570 if (N1.getValueType() == VT) return N1; // noop conversion.
2572 case ISD::AssertSext:
2573 case ISD::AssertZext: {
2574 MVT EVT = cast<VTSDNode>(N2)->getVT();
2575 assert(VT == N1.getValueType() && "Not an inreg extend!");
2576 assert(VT.isInteger() && EVT.isInteger() &&
2577 "Cannot *_EXTEND_INREG FP types");
2578 assert(EVT.bitsLE(VT) && "Not extending!");
2579 if (VT == EVT) return N1; // noop assertion.
2582 case ISD::SIGN_EXTEND_INREG: {
2583 MVT EVT = cast<VTSDNode>(N2)->getVT();
2584 assert(VT == N1.getValueType() && "Not an inreg extend!");
2585 assert(VT.isInteger() && EVT.isInteger() &&
2586 "Cannot *_EXTEND_INREG FP types");
2587 assert(EVT.bitsLE(VT) && "Not extending!");
2588 if (EVT == VT) return N1; // Not actually extending
2591 APInt Val = N1C->getAPIntValue();
2592 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2593 Val <<= Val.getBitWidth()-FromBits;
2594 Val = Val.ashr(Val.getBitWidth()-FromBits);
2595 return getConstant(Val, VT);
2599 case ISD::EXTRACT_VECTOR_ELT:
2600 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2601 if (N1.getOpcode() == ISD::UNDEF)
2602 return getNode(ISD::UNDEF, VT);
2604 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2605 // expanding copies of large vectors from registers.
2607 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2608 N1.getNumOperands() > 0) {
2610 N1.getOperand(0).getValueType().getVectorNumElements();
2611 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2612 N1.getOperand(N2C->getZExtValue() / Factor),
2613 getConstant(N2C->getZExtValue() % Factor,
2614 N2.getValueType()));
2617 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2618 // expanding large vector constants.
2619 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2620 return N1.getOperand(N2C->getZExtValue());
2622 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2623 // operations are lowered to scalars.
2624 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2625 // If the indices are the same, return the inserted element.
2626 if (N1.getOperand(2) == N2)
2627 return N1.getOperand(1);
2628 // If the indices are known different, extract the element from
2629 // the original vector.
2630 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2631 isa<ConstantSDNode>(N2))
2632 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2635 case ISD::EXTRACT_ELEMENT:
2636 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2637 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2638 (N1.getValueType().isInteger() == VT.isInteger()) &&
2639 "Wrong types for EXTRACT_ELEMENT!");
2641 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2642 // 64-bit integers into 32-bit parts. Instead of building the extract of
2643 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2644 if (N1.getOpcode() == ISD::BUILD_PAIR)
2645 return N1.getOperand(N2C->getZExtValue());
2647 // EXTRACT_ELEMENT of a constant int is also very common.
2648 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2649 unsigned ElementSize = VT.getSizeInBits();
2650 unsigned Shift = ElementSize * N2C->getZExtValue();
2651 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2652 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2655 case ISD::EXTRACT_SUBVECTOR:
2656 if (N1.getValueType() == VT) // Trivial extraction.
2663 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2664 if (SV.getNode()) return SV;
2665 } else { // Cannonicalize constant to RHS if commutative
2666 if (isCommutativeBinOp(Opcode)) {
2667 std::swap(N1C, N2C);
2673 // Constant fold FP operations.
2674 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2675 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2677 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2678 // Cannonicalize constant to RHS if commutative
2679 std::swap(N1CFP, N2CFP);
2681 } else if (N2CFP && VT != MVT::ppcf128) {
2682 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2683 APFloat::opStatus s;
2686 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2687 if (s != APFloat::opInvalidOp)
2688 return getConstantFP(V1, VT);
2691 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2692 if (s!=APFloat::opInvalidOp)
2693 return getConstantFP(V1, VT);
2696 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2697 if (s!=APFloat::opInvalidOp)
2698 return getConstantFP(V1, VT);
2701 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2702 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2703 return getConstantFP(V1, VT);
2706 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2707 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2708 return getConstantFP(V1, VT);
2710 case ISD::FCOPYSIGN:
2712 return getConstantFP(V1, VT);
2718 // Canonicalize an UNDEF to the RHS, even over a constant.
2719 if (N1.getOpcode() == ISD::UNDEF) {
2720 if (isCommutativeBinOp(Opcode)) {
2724 case ISD::FP_ROUND_INREG:
2725 case ISD::SIGN_EXTEND_INREG:
2731 return N1; // fold op(undef, arg2) -> undef
2739 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2740 // For vectors, we can't easily build an all zero vector, just return
2747 // Fold a bunch of operators when the RHS is undef.
2748 if (N2.getOpcode() == ISD::UNDEF) {
2751 if (N1.getOpcode() == ISD::UNDEF)
2752 // Handle undef ^ undef -> 0 special case. This is a common
2754 return getConstant(0, VT);
2769 return N2; // fold op(arg1, undef) -> undef
2775 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2776 // For vectors, we can't easily build an all zero vector, just return
2781 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2782 // For vectors, we can't easily build an all one vector, just return
2790 // Memoize this node if possible.
2792 SDVTList VTs = getVTList(VT);
2793 if (VT != MVT::Flag) {
2794 SDValue Ops[] = { N1, N2 };
2795 FoldingSetNodeID ID;
2796 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2798 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2799 return SDValue(E, 0);
2800 N = NodeAllocator.Allocate<BinarySDNode>();
2801 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2802 CSEMap.InsertNode(N, IP);
2804 N = NodeAllocator.Allocate<BinarySDNode>();
2805 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2808 AllNodes.push_back(N);
2812 return SDValue(N, 0);
2815 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2816 SDValue N1, SDValue N2, SDValue N3) {
2817 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2820 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2821 SDValue N1, SDValue N2, SDValue N3) {
2822 // Perform various simplifications.
2823 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2824 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2826 case ISD::CONCAT_VECTORS:
2827 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2828 // one big BUILD_VECTOR.
2829 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2830 N2.getOpcode() == ISD::BUILD_VECTOR &&
2831 N3.getOpcode() == ISD::BUILD_VECTOR) {
2832 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2833 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2834 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2835 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2839 // Use FoldSetCC to simplify SETCC's.
2840 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2841 if (Simp.getNode()) return Simp;
2846 if (N1C->getZExtValue())
2847 return N2; // select true, X, Y -> X
2849 return N3; // select false, X, Y -> Y
2852 if (N2 == N3) return N2; // select C, X, X -> X
2856 if (N2C->getZExtValue()) // Unconditional branch
2857 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2859 return N1; // Never-taken branch
2862 case ISD::VECTOR_SHUFFLE:
2863 assert(N1.getValueType() == N2.getValueType() &&
2864 N1.getValueType().isVector() &&
2865 VT.isVector() && N3.getValueType().isVector() &&
2866 N3.getOpcode() == ISD::BUILD_VECTOR &&
2867 VT.getVectorNumElements() == N3.getNumOperands() &&
2868 "Illegal VECTOR_SHUFFLE node!");
2870 case ISD::BIT_CONVERT:
2871 // Fold bit_convert nodes from a type to themselves.
2872 if (N1.getValueType() == VT)
2877 // Memoize node if it doesn't produce a flag.
2879 SDVTList VTs = getVTList(VT);
2880 if (VT != MVT::Flag) {
2881 SDValue Ops[] = { N1, N2, N3 };
2882 FoldingSetNodeID ID;
2883 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2886 return SDValue(E, 0);
2887 N = NodeAllocator.Allocate<TernarySDNode>();
2888 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2889 CSEMap.InsertNode(N, IP);
2891 N = NodeAllocator.Allocate<TernarySDNode>();
2892 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2894 AllNodes.push_back(N);
2898 return SDValue(N, 0);
2901 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2902 SDValue N1, SDValue N2, SDValue N3,
2904 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2907 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2908 SDValue N1, SDValue N2, SDValue N3,
2910 SDValue Ops[] = { N1, N2, N3, N4 };
2911 return getNode(Opcode, DL, VT, Ops, 4);
2914 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2915 SDValue N1, SDValue N2, SDValue N3,
2916 SDValue N4, SDValue N5) {
2917 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2920 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2921 SDValue N1, SDValue N2, SDValue N3,
2922 SDValue N4, SDValue N5) {
2923 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2924 return getNode(Opcode, DL, VT, Ops, 5);
2927 /// getMemsetValue - Vectorized representation of the memset value
2929 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2930 unsigned NumBits = VT.isVector() ?
2931 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2932 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2933 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2935 for (unsigned i = NumBits; i > 8; i >>= 1) {
2936 Val = (Val << Shift) | Val;
2940 return DAG.getConstant(Val, VT);
2941 return DAG.getConstantFP(APFloat(Val), VT);
2944 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2945 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2947 for (unsigned i = NumBits; i > 8; i >>= 1) {
2948 Value = DAG.getNode(ISD::OR, VT,
2949 DAG.getNode(ISD::SHL, VT, Value,
2950 DAG.getConstant(Shift,
2951 TLI.getShiftAmountTy())),
2959 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2960 /// used when a memcpy is turned into a memset when the source is a constant
2962 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2963 const TargetLowering &TLI,
2964 std::string &Str, unsigned Offset) {
2965 // Handle vector with all elements zero.
2968 return DAG.getConstant(0, VT);
2969 unsigned NumElts = VT.getVectorNumElements();
2970 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2971 return DAG.getNode(ISD::BIT_CONVERT, VT,
2972 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2975 assert(!VT.isVector() && "Can't handle vector type here!");
2976 unsigned NumBits = VT.getSizeInBits();
2977 unsigned MSB = NumBits / 8;
2979 if (TLI.isLittleEndian())
2980 Offset = Offset + MSB - 1;
2981 for (unsigned i = 0; i != MSB; ++i) {
2982 Val = (Val << 8) | (unsigned char)Str[Offset];
2983 Offset += TLI.isLittleEndian() ? -1 : 1;
2985 return DAG.getConstant(Val, VT);
2988 /// getMemBasePlusOffset - Returns base and offset node for the
2990 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2991 SelectionDAG &DAG) {
2992 MVT VT = Base.getValueType();
2993 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2996 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2998 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2999 unsigned SrcDelta = 0;
3000 GlobalAddressSDNode *G = NULL;
3001 if (Src.getOpcode() == ISD::GlobalAddress)
3002 G = cast<GlobalAddressSDNode>(Src);
3003 else if (Src.getOpcode() == ISD::ADD &&
3004 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3005 Src.getOperand(1).getOpcode() == ISD::Constant) {
3006 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3007 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3012 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3013 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3019 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3020 /// to replace the memset / memcpy is below the threshold. It also returns the
3021 /// types of the sequence of memory ops to perform memset / memcpy.
3023 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3024 SDValue Dst, SDValue Src,
3025 unsigned Limit, uint64_t Size, unsigned &Align,
3026 std::string &Str, bool &isSrcStr,
3028 const TargetLowering &TLI) {
3029 isSrcStr = isMemSrcFromString(Src, Str);
3030 bool isSrcConst = isa<ConstantSDNode>(Src);
3031 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3032 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3033 if (VT != MVT::iAny) {
3034 unsigned NewAlign = (unsigned)
3035 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3036 // If source is a string constant, this will require an unaligned load.
3037 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3038 if (Dst.getOpcode() != ISD::FrameIndex) {
3039 // Can't change destination alignment. It requires a unaligned store.
3043 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3044 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3045 if (MFI->isFixedObjectIndex(FI)) {
3046 // Can't change destination alignment. It requires a unaligned store.
3050 // Give the stack frame object a larger alignment if needed.
3051 if (MFI->getObjectAlignment(FI) < NewAlign)
3052 MFI->setObjectAlignment(FI, NewAlign);
3059 if (VT == MVT::iAny) {
3063 switch (Align & 7) {
3064 case 0: VT = MVT::i64; break;
3065 case 4: VT = MVT::i32; break;
3066 case 2: VT = MVT::i16; break;
3067 default: VT = MVT::i8; break;
3072 while (!TLI.isTypeLegal(LVT))
3073 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3074 assert(LVT.isInteger());
3080 unsigned NumMemOps = 0;
3082 unsigned VTSize = VT.getSizeInBits() / 8;
3083 while (VTSize > Size) {
3084 // For now, only use non-vector load / store's for the left-over pieces.
3085 if (VT.isVector()) {
3087 while (!TLI.isTypeLegal(VT))
3088 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3089 VTSize = VT.getSizeInBits() / 8;
3091 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3096 if (++NumMemOps > Limit)
3098 MemOps.push_back(VT);
3105 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
3106 SDValue Chain, SDValue Dst,
3107 SDValue Src, uint64_t Size,
3108 unsigned Align, bool AlwaysInline,
3109 const Value *DstSV, uint64_t DstSVOff,
3110 const Value *SrcSV, uint64_t SrcSVOff){
3111 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3113 // Expand memcpy to a series of load and store ops if the size operand falls
3114 // below a certain threshold.
3115 std::vector<MVT> MemOps;
3116 uint64_t Limit = -1ULL;
3118 Limit = TLI.getMaxStoresPerMemcpy();
3119 unsigned DstAlign = Align; // Destination alignment can change.
3122 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3123 Str, CopyFromStr, DAG, TLI))
3127 bool isZeroStr = CopyFromStr && Str.empty();
3128 SmallVector<SDValue, 8> OutChains;
3129 unsigned NumMemOps = MemOps.size();
3130 uint64_t SrcOff = 0, DstOff = 0;
3131 for (unsigned i = 0; i < NumMemOps; i++) {
3133 unsigned VTSize = VT.getSizeInBits() / 8;
3134 SDValue Value, Store;
3136 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3137 // It's unlikely a store of a vector immediate can be done in a single
3138 // instruction. It would require a load from a constantpool first.
3139 // We also handle store a vector with all zero's.
3140 // FIXME: Handle other cases where store of vector immediate is done in
3141 // a single instruction.
3142 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3143 Store = DAG.getStore(Chain, Value,
3144 getMemBasePlusOffset(Dst, DstOff, DAG),
3145 DstSV, DstSVOff + DstOff, false, DstAlign);
3147 Value = DAG.getLoad(VT, Chain,
3148 getMemBasePlusOffset(Src, SrcOff, DAG),
3149 SrcSV, SrcSVOff + SrcOff, false, Align);
3150 Store = DAG.getStore(Chain, Value,
3151 getMemBasePlusOffset(Dst, DstOff, DAG),
3152 DstSV, DstSVOff + DstOff, false, DstAlign);
3154 OutChains.push_back(Store);
3159 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3160 &OutChains[0], OutChains.size());
3163 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3164 SDValue Chain, SDValue Dst,
3165 SDValue Src, uint64_t Size,
3166 unsigned Align, bool AlwaysInline,
3167 const Value *DstSV, uint64_t DstSVOff,
3168 const Value *SrcSV, uint64_t SrcSVOff){
3169 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3171 // Expand memmove to a series of load and store ops if the size operand falls
3172 // below a certain threshold.
3173 std::vector<MVT> MemOps;
3174 uint64_t Limit = -1ULL;
3176 Limit = TLI.getMaxStoresPerMemmove();
3177 unsigned DstAlign = Align; // Destination alignment can change.
3180 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3181 Str, CopyFromStr, DAG, TLI))
3184 uint64_t SrcOff = 0, DstOff = 0;
3186 SmallVector<SDValue, 8> LoadValues;
3187 SmallVector<SDValue, 8> LoadChains;
3188 SmallVector<SDValue, 8> OutChains;
3189 unsigned NumMemOps = MemOps.size();
3190 for (unsigned i = 0; i < NumMemOps; i++) {
3192 unsigned VTSize = VT.getSizeInBits() / 8;
3193 SDValue Value, Store;
3195 Value = DAG.getLoad(VT, Chain,
3196 getMemBasePlusOffset(Src, SrcOff, DAG),
3197 SrcSV, SrcSVOff + SrcOff, false, Align);
3198 LoadValues.push_back(Value);
3199 LoadChains.push_back(Value.getValue(1));
3202 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3203 &LoadChains[0], LoadChains.size());
3205 for (unsigned i = 0; i < NumMemOps; i++) {
3207 unsigned VTSize = VT.getSizeInBits() / 8;
3208 SDValue Value, Store;
3210 Store = DAG.getStore(Chain, LoadValues[i],
3211 getMemBasePlusOffset(Dst, DstOff, DAG),
3212 DstSV, DstSVOff + DstOff, false, DstAlign);
3213 OutChains.push_back(Store);
3217 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3218 &OutChains[0], OutChains.size());
3221 static SDValue getMemsetStores(SelectionDAG &DAG,
3222 SDValue Chain, SDValue Dst,
3223 SDValue Src, uint64_t Size,
3225 const Value *DstSV, uint64_t DstSVOff) {
3226 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3228 // Expand memset to a series of load/store ops if the size operand
3229 // falls below a certain threshold.
3230 std::vector<MVT> MemOps;
3233 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3234 Size, Align, Str, CopyFromStr, DAG, TLI))
3237 SmallVector<SDValue, 8> OutChains;
3238 uint64_t DstOff = 0;
3240 unsigned NumMemOps = MemOps.size();
3241 for (unsigned i = 0; i < NumMemOps; i++) {
3243 unsigned VTSize = VT.getSizeInBits() / 8;
3244 SDValue Value = getMemsetValue(Src, VT, DAG);
3245 SDValue Store = DAG.getStore(Chain, Value,
3246 getMemBasePlusOffset(Dst, DstOff, DAG),
3247 DstSV, DstSVOff + DstOff);
3248 OutChains.push_back(Store);
3252 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3253 &OutChains[0], OutChains.size());
3256 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3257 SDValue Src, SDValue Size,
3258 unsigned Align, bool AlwaysInline,
3259 const Value *DstSV, uint64_t DstSVOff,
3260 const Value *SrcSV, uint64_t SrcSVOff) {
3262 // Check to see if we should lower the memcpy to loads and stores first.
3263 // For cases within the target-specified limits, this is the best choice.
3264 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3266 // Memcpy with size zero? Just return the original chain.
3267 if (ConstantSize->isNullValue())
3271 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3272 ConstantSize->getZExtValue(),
3273 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3274 if (Result.getNode())
3278 // Then check to see if we should lower the memcpy with target-specific
3279 // code. If the target chooses to do this, this is the next best.
3281 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3283 DstSV, DstSVOff, SrcSV, SrcSVOff);
3284 if (Result.getNode())
3287 // If we really need inline code and the target declined to provide it,
3288 // use a (potentially long) sequence of loads and stores.
3290 assert(ConstantSize && "AlwaysInline requires a constant size!");
3291 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3292 ConstantSize->getZExtValue(), Align, true,
3293 DstSV, DstSVOff, SrcSV, SrcSVOff);
3296 // Emit a library call.
3297 TargetLowering::ArgListTy Args;
3298 TargetLowering::ArgListEntry Entry;
3299 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3300 Entry.Node = Dst; Args.push_back(Entry);
3301 Entry.Node = Src; Args.push_back(Entry);
3302 Entry.Node = Size; Args.push_back(Entry);
3303 // FIXME: pass in DebugLoc
3304 std::pair<SDValue,SDValue> CallResult =
3305 TLI.LowerCallTo(Chain, Type::VoidTy,
3306 false, false, false, false, CallingConv::C, false,
3307 getExternalSymbol("memcpy", TLI.getPointerTy()),
3308 Args, *this, DebugLoc::getUnknownLoc());
3309 return CallResult.second;
3312 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3313 SDValue Src, SDValue Size,
3315 const Value *DstSV, uint64_t DstSVOff,
3316 const Value *SrcSV, uint64_t SrcSVOff) {
3318 // Check to see if we should lower the memmove to loads and stores first.
3319 // For cases within the target-specified limits, this is the best choice.
3320 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3322 // Memmove with size zero? Just return the original chain.
3323 if (ConstantSize->isNullValue())
3327 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3328 ConstantSize->getZExtValue(),
3329 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3330 if (Result.getNode())
3334 // Then check to see if we should lower the memmove with target-specific
3335 // code. If the target chooses to do this, this is the next best.
3337 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3338 DstSV, DstSVOff, SrcSV, SrcSVOff);
3339 if (Result.getNode())
3342 // Emit a library call.
3343 TargetLowering::ArgListTy Args;
3344 TargetLowering::ArgListEntry Entry;
3345 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3346 Entry.Node = Dst; Args.push_back(Entry);
3347 Entry.Node = Src; Args.push_back(Entry);
3348 Entry.Node = Size; Args.push_back(Entry);
3349 // FIXME: pass in DebugLoc
3350 std::pair<SDValue,SDValue> CallResult =
3351 TLI.LowerCallTo(Chain, Type::VoidTy,
3352 false, false, false, false, CallingConv::C, false,
3353 getExternalSymbol("memmove", TLI.getPointerTy()),
3354 Args, *this, DebugLoc::getUnknownLoc());
3355 return CallResult.second;
3358 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3359 SDValue Src, SDValue Size,
3361 const Value *DstSV, uint64_t DstSVOff) {
3363 // Check to see if we should lower the memset to stores first.
3364 // For cases within the target-specified limits, this is the best choice.
3365 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3367 // Memset with size zero? Just return the original chain.
3368 if (ConstantSize->isNullValue())
3372 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3373 Align, DstSV, DstSVOff);
3374 if (Result.getNode())
3378 // Then check to see if we should lower the memset with target-specific
3379 // code. If the target chooses to do this, this is the next best.
3381 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3383 if (Result.getNode())
3386 // Emit a library call.
3387 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3388 TargetLowering::ArgListTy Args;
3389 TargetLowering::ArgListEntry Entry;
3390 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3391 Args.push_back(Entry);
3392 // Extend or truncate the argument to be an i32 value for the call.
3393 if (Src.getValueType().bitsGT(MVT::i32))
3394 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3396 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3397 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3398 Args.push_back(Entry);
3399 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3400 Args.push_back(Entry);
3401 // FIXME: pass in DebugLoc
3402 std::pair<SDValue,SDValue> CallResult =
3403 TLI.LowerCallTo(Chain, Type::VoidTy,
3404 false, false, false, false, CallingConv::C, false,
3405 getExternalSymbol("memset", TLI.getPointerTy()),
3406 Args, *this, DebugLoc::getUnknownLoc());
3407 return CallResult.second;
3410 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3412 SDValue Ptr, SDValue Cmp,
3413 SDValue Swp, const Value* PtrVal,
3414 unsigned Alignment) {
3415 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3416 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3418 MVT VT = Cmp.getValueType();
3420 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3421 Alignment = getMVTAlignment(MemVT);
3423 SDVTList VTs = getVTList(VT, MVT::Other);
3424 FoldingSetNodeID ID;
3425 ID.AddInteger(MemVT.getRawBits());
3426 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3427 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3429 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3430 return SDValue(E, 0);
3431 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3432 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3433 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3434 CSEMap.InsertNode(N, IP);
3435 AllNodes.push_back(N);
3436 return SDValue(N, 0);
3439 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3441 SDValue Ptr, SDValue Cmp,
3442 SDValue Swp, const Value* PtrVal,
3443 unsigned Alignment) {
3444 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3445 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3447 MVT VT = Cmp.getValueType();
3449 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3450 Alignment = getMVTAlignment(MemVT);
3452 SDVTList VTs = getVTList(VT, MVT::Other);
3453 FoldingSetNodeID ID;
3454 ID.AddInteger(MemVT.getRawBits());
3455 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3456 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3458 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3459 return SDValue(E, 0);
3460 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3461 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3462 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3463 CSEMap.InsertNode(N, IP);
3464 AllNodes.push_back(N);
3465 return SDValue(N, 0);
3468 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3470 SDValue Ptr, SDValue Val,
3471 const Value* PtrVal,
3472 unsigned Alignment) {
3473 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3474 Opcode == ISD::ATOMIC_LOAD_SUB ||
3475 Opcode == ISD::ATOMIC_LOAD_AND ||
3476 Opcode == ISD::ATOMIC_LOAD_OR ||
3477 Opcode == ISD::ATOMIC_LOAD_XOR ||
3478 Opcode == ISD::ATOMIC_LOAD_NAND ||
3479 Opcode == ISD::ATOMIC_LOAD_MIN ||
3480 Opcode == ISD::ATOMIC_LOAD_MAX ||
3481 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3482 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3483 Opcode == ISD::ATOMIC_SWAP) &&
3484 "Invalid Atomic Op");
3486 MVT VT = Val.getValueType();
3488 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3489 Alignment = getMVTAlignment(MemVT);
3491 SDVTList VTs = getVTList(VT, MVT::Other);
3492 FoldingSetNodeID ID;
3493 ID.AddInteger(MemVT.getRawBits());
3494 SDValue Ops[] = {Chain, Ptr, Val};
3495 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3497 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3498 return SDValue(E, 0);
3499 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3500 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3501 Chain, Ptr, Val, PtrVal, Alignment);
3502 CSEMap.InsertNode(N, IP);
3503 AllNodes.push_back(N);
3504 return SDValue(N, 0);
3507 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3509 SDValue Ptr, SDValue Val,
3510 const Value* PtrVal,
3511 unsigned Alignment) {
3512 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3513 Opcode == ISD::ATOMIC_LOAD_SUB ||
3514 Opcode == ISD::ATOMIC_LOAD_AND ||
3515 Opcode == ISD::ATOMIC_LOAD_OR ||
3516 Opcode == ISD::ATOMIC_LOAD_XOR ||
3517 Opcode == ISD::ATOMIC_LOAD_NAND ||
3518 Opcode == ISD::ATOMIC_LOAD_MIN ||
3519 Opcode == ISD::ATOMIC_LOAD_MAX ||
3520 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3521 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3522 Opcode == ISD::ATOMIC_SWAP) &&
3523 "Invalid Atomic Op");
3525 MVT VT = Val.getValueType();
3527 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3528 Alignment = getMVTAlignment(MemVT);
3530 SDVTList VTs = getVTList(VT, MVT::Other);
3531 FoldingSetNodeID ID;
3532 ID.AddInteger(MemVT.getRawBits());
3533 SDValue Ops[] = {Chain, Ptr, Val};
3534 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3536 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3537 return SDValue(E, 0);
3538 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3539 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3540 Chain, Ptr, Val, PtrVal, Alignment);
3541 CSEMap.InsertNode(N, IP);
3542 AllNodes.push_back(N);
3543 return SDValue(N, 0);
3546 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3547 /// Allowed to return something different (and simpler) if Simplify is true.
3548 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3552 SmallVector<MVT, 4> VTs;
3553 VTs.reserve(NumOps);
3554 for (unsigned i = 0; i < NumOps; ++i)
3555 VTs.push_back(Ops[i].getValueType());
3556 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3559 /// DebugLoc-aware version.
3560 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3565 SmallVector<MVT, 4> VTs;
3566 VTs.reserve(NumOps);
3567 for (unsigned i = 0; i < NumOps; ++i)
3568 VTs.push_back(Ops[i].getValueType());
3569 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3574 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3575 const MVT *VTs, unsigned NumVTs,
3576 const SDValue *Ops, unsigned NumOps,
3577 MVT MemVT, const Value *srcValue, int SVOff,
3578 unsigned Align, bool Vol,
3579 bool ReadMem, bool WriteMem) {
3580 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3581 MemVT, srcValue, SVOff, Align, Vol,
3586 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3587 const MVT *VTs, unsigned NumVTs,
3588 const SDValue *Ops, unsigned NumOps,
3589 MVT MemVT, const Value *srcValue, int SVOff,
3590 unsigned Align, bool Vol,
3591 bool ReadMem, bool WriteMem) {
3592 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3593 MemVT, srcValue, SVOff, Align, Vol,
3598 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3599 const SDValue *Ops, unsigned NumOps,
3600 MVT MemVT, const Value *srcValue, int SVOff,
3601 unsigned Align, bool Vol,
3602 bool ReadMem, bool WriteMem) {
3603 // Memoize the node unless it returns a flag.
3604 MemIntrinsicSDNode *N;
3605 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3606 FoldingSetNodeID ID;
3607 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3610 return SDValue(E, 0);
3612 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3613 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3614 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3615 CSEMap.InsertNode(N, IP);
3617 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3618 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3619 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3621 AllNodes.push_back(N);
3622 return SDValue(N, 0);
3626 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3627 const SDValue *Ops, unsigned NumOps,
3628 MVT MemVT, const Value *srcValue, int SVOff,
3629 unsigned Align, bool Vol,
3630 bool ReadMem, bool WriteMem) {
3631 // Memoize the node unless it returns a flag.
3632 MemIntrinsicSDNode *N;
3633 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3634 FoldingSetNodeID ID;
3635 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3637 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3638 return SDValue(E, 0);
3640 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3641 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3642 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3643 CSEMap.InsertNode(N, IP);
3645 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3646 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3647 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3649 AllNodes.push_back(N);
3650 return SDValue(N, 0);
3654 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3655 bool IsInreg, SDVTList VTs,
3656 const SDValue *Operands, unsigned NumOperands) {
3657 // Do not include isTailCall in the folding set profile.
3658 FoldingSetNodeID ID;
3659 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3660 ID.AddInteger(CallingConv);
3661 ID.AddInteger(IsVarArgs);
3663 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3664 // Instead of including isTailCall in the folding set, we just
3665 // set the flag of the existing node.
3667 cast<CallSDNode>(E)->setNotTailCall();
3668 return SDValue(E, 0);
3670 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3671 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3672 VTs, Operands, NumOperands);
3673 CSEMap.InsertNode(N, IP);
3674 AllNodes.push_back(N);
3675 return SDValue(N, 0);
3679 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3680 bool IsTailCall, bool IsInreg, SDVTList VTs,
3681 const SDValue *Operands, unsigned NumOperands) {
3682 // Do not include isTailCall in the folding set profile.
3683 FoldingSetNodeID ID;
3684 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3685 ID.AddInteger(CallingConv);
3686 ID.AddInteger(IsVarArgs);
3688 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3689 // Instead of including isTailCall in the folding set, we just
3690 // set the flag of the existing node.
3692 cast<CallSDNode>(E)->setNotTailCall();
3693 return SDValue(E, 0);
3695 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3696 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3697 VTs, Operands, NumOperands);
3698 CSEMap.InsertNode(N, IP);
3699 AllNodes.push_back(N);
3700 return SDValue(N, 0);
3704 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3705 MVT VT, SDValue Chain,
3706 SDValue Ptr, SDValue Offset,
3707 const Value *SV, int SVOffset, MVT EVT,
3708 bool isVolatile, unsigned Alignment) {
3709 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3710 Alignment = getMVTAlignment(VT);
3713 ExtType = ISD::NON_EXTLOAD;
3714 } else if (ExtType == ISD::NON_EXTLOAD) {
3715 assert(VT == EVT && "Non-extending load from different memory type!");
3719 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3720 "Invalid vector extload!");
3722 assert(EVT.bitsLT(VT) &&
3723 "Should only be an extending load, not truncating!");
3724 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3725 "Cannot sign/zero extend a FP/Vector load!");
3726 assert(VT.isInteger() == EVT.isInteger() &&
3727 "Cannot convert from FP to Int or Int -> FP!");
3730 bool Indexed = AM != ISD::UNINDEXED;
3731 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3732 "Unindexed load with an offset!");
3734 SDVTList VTs = Indexed ?
3735 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3736 SDValue Ops[] = { Chain, Ptr, Offset };
3737 FoldingSetNodeID ID;
3738 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3739 ID.AddInteger(EVT.getRawBits());
3740 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3742 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3743 return SDValue(E, 0);
3744 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3745 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3746 Alignment, isVolatile);
3747 CSEMap.InsertNode(N, IP);
3748 AllNodes.push_back(N);
3749 return SDValue(N, 0);
3753 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3754 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3755 SDValue Ptr, SDValue Offset,
3756 const Value *SV, int SVOffset, MVT EVT,
3757 bool isVolatile, unsigned Alignment) {
3758 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3759 Alignment = getMVTAlignment(VT);
3762 ExtType = ISD::NON_EXTLOAD;
3763 } else if (ExtType == ISD::NON_EXTLOAD) {
3764 assert(VT == EVT && "Non-extending load from different memory type!");
3768 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3769 "Invalid vector extload!");
3771 assert(EVT.bitsLT(VT) &&
3772 "Should only be an extending load, not truncating!");
3773 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3774 "Cannot sign/zero extend a FP/Vector load!");
3775 assert(VT.isInteger() == EVT.isInteger() &&
3776 "Cannot convert from FP to Int or Int -> FP!");
3779 bool Indexed = AM != ISD::UNINDEXED;
3780 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3781 "Unindexed load with an offset!");
3783 SDVTList VTs = Indexed ?
3784 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3785 SDValue Ops[] = { Chain, Ptr, Offset };
3786 FoldingSetNodeID ID;
3787 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3788 ID.AddInteger(EVT.getRawBits());
3789 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3791 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3792 return SDValue(E, 0);
3793 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3794 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3795 Alignment, isVolatile);
3796 CSEMap.InsertNode(N, IP);
3797 AllNodes.push_back(N);
3798 return SDValue(N, 0);
3801 SDValue SelectionDAG::getLoad(MVT VT,
3802 SDValue Chain, SDValue Ptr,
3803 const Value *SV, int SVOffset,
3804 bool isVolatile, unsigned Alignment) {
3805 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3806 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3807 SV, SVOffset, VT, isVolatile, Alignment);
3810 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3811 SDValue Chain, SDValue Ptr,
3812 const Value *SV, int SVOffset,
3813 bool isVolatile, unsigned Alignment) {
3814 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3815 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3816 SV, SVOffset, VT, isVolatile, Alignment);
3819 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3820 SDValue Chain, SDValue Ptr,
3822 int SVOffset, MVT EVT,
3823 bool isVolatile, unsigned Alignment) {
3824 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3825 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3826 SV, SVOffset, EVT, isVolatile, Alignment);
3829 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3830 SDValue Chain, SDValue Ptr,
3832 int SVOffset, MVT EVT,
3833 bool isVolatile, unsigned Alignment) {
3834 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3835 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3836 SV, SVOffset, EVT, isVolatile, Alignment);
3840 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3841 SDValue Offset, ISD::MemIndexedMode AM) {
3842 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3843 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3844 "Load is already a indexed load!");
3845 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3846 LD->getChain(), Base, Offset, LD->getSrcValue(),
3847 LD->getSrcValueOffset(), LD->getMemoryVT(),
3848 LD->isVolatile(), LD->getAlignment());
3852 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3853 SDValue Offset, ISD::MemIndexedMode AM) {
3854 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3855 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3856 "Load is already a indexed load!");
3857 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3858 LD->getChain(), Base, Offset, LD->getSrcValue(),
3859 LD->getSrcValueOffset(), LD->getMemoryVT(),
3860 LD->isVolatile(), LD->getAlignment());
3863 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3864 SDValue Ptr, const Value *SV, int SVOffset,
3865 bool isVolatile, unsigned Alignment) {
3866 MVT VT = Val.getValueType();
3868 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3869 Alignment = getMVTAlignment(VT);
3871 SDVTList VTs = getVTList(MVT::Other);
3872 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3873 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3874 FoldingSetNodeID ID;
3875 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3876 ID.AddInteger(VT.getRawBits());
3877 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3878 isVolatile, Alignment));
3880 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3881 return SDValue(E, 0);
3882 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3883 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3884 VT, SV, SVOffset, Alignment, isVolatile);
3885 CSEMap.InsertNode(N, IP);
3886 AllNodes.push_back(N);
3887 return SDValue(N, 0);
3890 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3891 SDValue Ptr, const Value *SV, int SVOffset,
3892 bool isVolatile, unsigned Alignment) {
3893 MVT VT = Val.getValueType();
3895 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3896 Alignment = getMVTAlignment(VT);
3898 SDVTList VTs = getVTList(MVT::Other);
3899 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3900 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3901 FoldingSetNodeID ID;
3902 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3903 ID.AddInteger(VT.getRawBits());
3904 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3905 isVolatile, Alignment));
3907 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3908 return SDValue(E, 0);
3909 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3910 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3911 VT, SV, SVOffset, Alignment, isVolatile);
3912 CSEMap.InsertNode(N, IP);
3913 AllNodes.push_back(N);
3914 return SDValue(N, 0);
3917 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3918 SDValue Ptr, const Value *SV,
3919 int SVOffset, MVT SVT,
3920 bool isVolatile, unsigned Alignment) {
3921 MVT VT = Val.getValueType();
3924 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3926 assert(VT.bitsGT(SVT) && "Not a truncation?");
3927 assert(VT.isInteger() == SVT.isInteger() &&
3928 "Can't do FP-INT conversion!");
3930 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3931 Alignment = getMVTAlignment(VT);
3933 SDVTList VTs = getVTList(MVT::Other);
3934 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3935 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3936 FoldingSetNodeID ID;
3937 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3938 ID.AddInteger(SVT.getRawBits());
3939 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3940 isVolatile, Alignment));
3942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3943 return SDValue(E, 0);
3944 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3945 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3946 SVT, SV, SVOffset, Alignment, isVolatile);
3947 CSEMap.InsertNode(N, IP);
3948 AllNodes.push_back(N);
3949 return SDValue(N, 0);
3952 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3953 SDValue Ptr, const Value *SV,
3954 int SVOffset, MVT SVT,
3955 bool isVolatile, unsigned Alignment) {
3956 MVT VT = Val.getValueType();
3959 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3961 assert(VT.bitsGT(SVT) && "Not a truncation?");
3962 assert(VT.isInteger() == SVT.isInteger() &&
3963 "Can't do FP-INT conversion!");
3965 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3966 Alignment = getMVTAlignment(VT);
3968 SDVTList VTs = getVTList(MVT::Other);
3969 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3970 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3971 FoldingSetNodeID ID;
3972 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3973 ID.AddInteger(SVT.getRawBits());
3974 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3975 isVolatile, Alignment));
3977 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3978 return SDValue(E, 0);
3979 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3980 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3981 SVT, SV, SVOffset, Alignment, isVolatile);
3982 CSEMap.InsertNode(N, IP);
3983 AllNodes.push_back(N);
3984 return SDValue(N, 0);
3988 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3989 SDValue Offset, ISD::MemIndexedMode AM) {
3990 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3991 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3992 "Store is already a indexed store!");
3993 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3994 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3995 FoldingSetNodeID ID;
3996 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3997 ID.AddInteger(ST->getMemoryVT().getRawBits());
3998 ID.AddInteger(ST->getRawSubclassData());
4000 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4001 return SDValue(E, 0);
4002 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4003 new (N) StoreSDNode(Ops, VTs, AM,
4004 ST->isTruncatingStore(), ST->getMemoryVT(),
4005 ST->getSrcValue(), ST->getSrcValueOffset(),
4006 ST->getAlignment(), ST->isVolatile());
4007 CSEMap.InsertNode(N, IP);
4008 AllNodes.push_back(N);
4009 return SDValue(N, 0);
4013 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4014 SDValue Offset, ISD::MemIndexedMode AM) {
4015 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4016 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4017 "Store is already a indexed store!");
4018 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4019 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4020 FoldingSetNodeID ID;
4021 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4022 ID.AddInteger(ST->getMemoryVT().getRawBits());
4023 ID.AddInteger(ST->getRawSubclassData());
4025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4026 return SDValue(E, 0);
4027 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4028 new (N) StoreSDNode(Ops, dl, VTs, AM,
4029 ST->isTruncatingStore(), ST->getMemoryVT(),
4030 ST->getSrcValue(), ST->getSrcValueOffset(),
4031 ST->getAlignment(), ST->isVolatile());
4032 CSEMap.InsertNode(N, IP);
4033 AllNodes.push_back(N);
4034 return SDValue(N, 0);
4037 SDValue SelectionDAG::getVAArg(MVT VT,
4038 SDValue Chain, SDValue Ptr,
4040 SDValue Ops[] = { Chain, Ptr, SV };
4041 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
4044 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4045 const SDUse *Ops, unsigned NumOps) {
4046 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4049 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4050 const SDUse *Ops, unsigned NumOps) {
4052 case 0: return getNode(Opcode, DL, VT);
4053 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4054 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4055 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4059 // Copy from an SDUse array into an SDValue array for use with
4060 // the regular getNode logic.
4061 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4062 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4065 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4066 const SDValue *Ops, unsigned NumOps) {
4067 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4070 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4071 const SDValue *Ops, unsigned NumOps) {
4073 case 0: return getNode(Opcode, DL, VT);
4074 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4075 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4076 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4082 case ISD::SELECT_CC: {
4083 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4084 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4085 "LHS and RHS of condition must have same type!");
4086 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4087 "True and False arms of SelectCC must have same type!");
4088 assert(Ops[2].getValueType() == VT &&
4089 "select_cc node must be of same type as true and false value!");
4093 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4094 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4095 "LHS/RHS of comparison should match types!");
4102 SDVTList VTs = getVTList(VT);
4104 if (VT != MVT::Flag) {
4105 FoldingSetNodeID ID;
4106 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4110 return SDValue(E, 0);
4112 N = NodeAllocator.Allocate<SDNode>();
4113 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4114 CSEMap.InsertNode(N, IP);
4116 N = NodeAllocator.Allocate<SDNode>();
4117 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4120 AllNodes.push_back(N);
4124 return SDValue(N, 0);
4127 SDValue SelectionDAG::getNode(unsigned Opcode,
4128 const std::vector<MVT> &ResultTys,
4129 const SDValue *Ops, unsigned NumOps) {
4130 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
4133 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4134 const std::vector<MVT> &ResultTys,
4135 const SDValue *Ops, unsigned NumOps) {
4136 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
4140 SDValue SelectionDAG::getNode(unsigned Opcode,
4141 const MVT *VTs, unsigned NumVTs,
4142 const SDValue *Ops, unsigned NumOps) {
4143 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
4146 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4147 const MVT *VTs, unsigned NumVTs,
4148 const SDValue *Ops, unsigned NumOps) {
4150 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4151 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4154 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4155 const SDValue *Ops, unsigned NumOps) {
4156 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
4159 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4160 const SDValue *Ops, unsigned NumOps) {
4161 if (VTList.NumVTs == 1)
4162 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4165 // FIXME: figure out how to safely handle things like
4166 // int foo(int x) { return 1 << (x & 255); }
4167 // int bar() { return foo(256); }
4169 case ISD::SRA_PARTS:
4170 case ISD::SRL_PARTS:
4171 case ISD::SHL_PARTS:
4172 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4173 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4174 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4175 else if (N3.getOpcode() == ISD::AND)
4176 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4177 // If the and is only masking out bits that cannot effect the shift,
4178 // eliminate the and.
4179 unsigned NumBits = VT.getSizeInBits()*2;
4180 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4181 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4187 // Memoize the node unless it returns a flag.
4189 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4190 FoldingSetNodeID ID;
4191 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4193 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4194 return SDValue(E, 0);
4196 N = NodeAllocator.Allocate<UnarySDNode>();
4197 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4198 } else if (NumOps == 2) {
4199 N = NodeAllocator.Allocate<BinarySDNode>();
4200 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4201 } else if (NumOps == 3) {
4202 N = NodeAllocator.Allocate<TernarySDNode>();
4203 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4205 N = NodeAllocator.Allocate<SDNode>();
4206 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4208 CSEMap.InsertNode(N, IP);
4211 N = NodeAllocator.Allocate<UnarySDNode>();
4212 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4213 } else if (NumOps == 2) {
4214 N = NodeAllocator.Allocate<BinarySDNode>();
4215 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4216 } else if (NumOps == 3) {
4217 N = NodeAllocator.Allocate<TernarySDNode>();
4218 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4220 N = NodeAllocator.Allocate<SDNode>();
4221 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4224 AllNodes.push_back(N);
4228 return SDValue(N, 0);
4231 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
4232 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList);
4235 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4236 return getNode(Opcode, DL, VTList, 0, 0);
4239 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4241 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1);
4244 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4246 SDValue Ops[] = { N1 };
4247 return getNode(Opcode, DL, VTList, Ops, 1);
4250 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4251 SDValue N1, SDValue N2) {
4252 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2);
4255 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4256 SDValue N1, SDValue N2) {
4257 SDValue Ops[] = { N1, N2 };
4258 return getNode(Opcode, DL, VTList, Ops, 2);
4261 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4262 SDValue N1, SDValue N2, SDValue N3) {
4263 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3);
4266 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4267 SDValue N1, SDValue N2, SDValue N3) {
4268 SDValue Ops[] = { N1, N2, N3 };
4269 return getNode(Opcode, DL, VTList, Ops, 3);
4272 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4273 SDValue N1, SDValue N2, SDValue N3,
4275 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4);
4278 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4279 SDValue N1, SDValue N2, SDValue N3,
4281 SDValue Ops[] = { N1, N2, N3, N4 };
4282 return getNode(Opcode, DL, VTList, Ops, 4);
4285 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4286 SDValue N1, SDValue N2, SDValue N3,
4287 SDValue N4, SDValue N5) {
4288 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5);
4291 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4292 SDValue N1, SDValue N2, SDValue N3,
4293 SDValue N4, SDValue N5) {
4294 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4295 return getNode(Opcode, DL, VTList, Ops, 5);
4298 SDVTList SelectionDAG::getVTList(MVT VT) {
4299 return makeVTList(SDNode::getValueTypeList(VT), 1);
4302 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4303 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4304 E = VTList.rend(); I != E; ++I)
4305 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4308 MVT *Array = Allocator.Allocate<MVT>(2);
4311 SDVTList Result = makeVTList(Array, 2);
4312 VTList.push_back(Result);
4316 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4317 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4318 E = VTList.rend(); I != E; ++I)
4319 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4323 MVT *Array = Allocator.Allocate<MVT>(3);
4327 SDVTList Result = makeVTList(Array, 3);
4328 VTList.push_back(Result);
4332 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4333 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4334 E = VTList.rend(); I != E; ++I)
4335 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4336 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4339 MVT *Array = Allocator.Allocate<MVT>(3);
4344 SDVTList Result = makeVTList(Array, 4);
4345 VTList.push_back(Result);
4349 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4351 case 0: assert(0 && "Cannot have nodes without results!");
4352 case 1: return getVTList(VTs[0]);
4353 case 2: return getVTList(VTs[0], VTs[1]);
4354 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4358 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4359 E = VTList.rend(); I != E; ++I) {
4360 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4363 bool NoMatch = false;
4364 for (unsigned i = 2; i != NumVTs; ++i)
4365 if (VTs[i] != I->VTs[i]) {
4373 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4374 std::copy(VTs, VTs+NumVTs, Array);
4375 SDVTList Result = makeVTList(Array, NumVTs);
4376 VTList.push_back(Result);
4381 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4382 /// specified operands. If the resultant node already exists in the DAG,
4383 /// this does not modify the specified node, instead it returns the node that
4384 /// already exists. If the resultant node does not exist in the DAG, the
4385 /// input node is returned. As a degenerate case, if you specify the same
4386 /// input operands as the node already has, the input node is returned.
4387 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4388 SDNode *N = InN.getNode();
4389 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4391 // Check to see if there is no change.
4392 if (Op == N->getOperand(0)) return InN;
4394 // See if the modified node already exists.
4395 void *InsertPos = 0;
4396 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4397 return SDValue(Existing, InN.getResNo());
4399 // Nope it doesn't. Remove the node from its current place in the maps.
4401 if (!RemoveNodeFromCSEMaps(N))
4404 // Now we update the operands.
4405 N->OperandList[0].set(Op);
4407 // If this gets put into a CSE map, add it.
4408 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4412 SDValue SelectionDAG::
4413 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4414 SDNode *N = InN.getNode();
4415 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4417 // Check to see if there is no change.
4418 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4419 return InN; // No operands changed, just return the input node.
4421 // See if the modified node already exists.
4422 void *InsertPos = 0;
4423 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4424 return SDValue(Existing, InN.getResNo());
4426 // Nope it doesn't. Remove the node from its current place in the maps.
4428 if (!RemoveNodeFromCSEMaps(N))
4431 // Now we update the operands.
4432 if (N->OperandList[0] != Op1)
4433 N->OperandList[0].set(Op1);
4434 if (N->OperandList[1] != Op2)
4435 N->OperandList[1].set(Op2);
4437 // If this gets put into a CSE map, add it.
4438 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4442 SDValue SelectionDAG::
4443 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4444 SDValue Ops[] = { Op1, Op2, Op3 };
4445 return UpdateNodeOperands(N, Ops, 3);
4448 SDValue SelectionDAG::
4449 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4450 SDValue Op3, SDValue Op4) {
4451 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4452 return UpdateNodeOperands(N, Ops, 4);
4455 SDValue SelectionDAG::
4456 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4457 SDValue Op3, SDValue Op4, SDValue Op5) {
4458 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4459 return UpdateNodeOperands(N, Ops, 5);
4462 SDValue SelectionDAG::
4463 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4464 SDNode *N = InN.getNode();
4465 assert(N->getNumOperands() == NumOps &&
4466 "Update with wrong number of operands");
4468 // Check to see if there is no change.
4469 bool AnyChange = false;
4470 for (unsigned i = 0; i != NumOps; ++i) {
4471 if (Ops[i] != N->getOperand(i)) {
4477 // No operands changed, just return the input node.
4478 if (!AnyChange) return InN;
4480 // See if the modified node already exists.
4481 void *InsertPos = 0;
4482 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4483 return SDValue(Existing, InN.getResNo());
4485 // Nope it doesn't. Remove the node from its current place in the maps.
4487 if (!RemoveNodeFromCSEMaps(N))
4490 // Now we update the operands.
4491 for (unsigned i = 0; i != NumOps; ++i)
4492 if (N->OperandList[i] != Ops[i])
4493 N->OperandList[i].set(Ops[i]);
4495 // If this gets put into a CSE map, add it.
4496 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4500 /// DropOperands - Release the operands and set this node to have
4502 void SDNode::DropOperands() {
4503 // Unlike the code in MorphNodeTo that does this, we don't need to
4504 // watch for dead nodes here.
4505 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4511 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4514 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4516 SDVTList VTs = getVTList(VT);
4517 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4520 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4521 MVT VT, SDValue Op1) {
4522 SDVTList VTs = getVTList(VT);
4523 SDValue Ops[] = { Op1 };
4524 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4527 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4528 MVT VT, SDValue Op1,
4530 SDVTList VTs = getVTList(VT);
4531 SDValue Ops[] = { Op1, Op2 };
4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4535 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4536 MVT VT, SDValue Op1,
4537 SDValue Op2, SDValue Op3) {
4538 SDVTList VTs = getVTList(VT);
4539 SDValue Ops[] = { Op1, Op2, Op3 };
4540 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4543 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4544 MVT VT, const SDValue *Ops,
4546 SDVTList VTs = getVTList(VT);
4547 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4550 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4551 MVT VT1, MVT VT2, const SDValue *Ops,
4553 SDVTList VTs = getVTList(VT1, VT2);
4554 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4557 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4559 SDVTList VTs = getVTList(VT1, VT2);
4560 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4563 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4564 MVT VT1, MVT VT2, MVT VT3,
4565 const SDValue *Ops, unsigned NumOps) {
4566 SDVTList VTs = getVTList(VT1, VT2, VT3);
4567 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4570 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4571 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4572 const SDValue *Ops, unsigned NumOps) {
4573 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4574 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4577 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4580 SDVTList VTs = getVTList(VT1, VT2);
4581 SDValue Ops[] = { Op1 };
4582 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4585 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4587 SDValue Op1, SDValue Op2) {
4588 SDVTList VTs = getVTList(VT1, VT2);
4589 SDValue Ops[] = { Op1, Op2 };
4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4593 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 SDValue Op1, SDValue Op2,
4597 SDVTList VTs = getVTList(VT1, VT2);
4598 SDValue Ops[] = { Op1, Op2, Op3 };
4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4602 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4603 MVT VT1, MVT VT2, MVT VT3,
4604 SDValue Op1, SDValue Op2,
4606 SDVTList VTs = getVTList(VT1, VT2, VT3);
4607 SDValue Ops[] = { Op1, Op2, Op3 };
4608 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4611 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4612 SDVTList VTs, const SDValue *Ops,
4614 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4617 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4619 SDVTList VTs = getVTList(VT);
4620 return MorphNodeTo(N, Opc, VTs, 0, 0);
4623 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4624 MVT VT, SDValue Op1) {
4625 SDVTList VTs = getVTList(VT);
4626 SDValue Ops[] = { Op1 };
4627 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4630 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4631 MVT VT, SDValue Op1,
4633 SDVTList VTs = getVTList(VT);
4634 SDValue Ops[] = { Op1, Op2 };
4635 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4638 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4639 MVT VT, SDValue Op1,
4640 SDValue Op2, SDValue Op3) {
4641 SDVTList VTs = getVTList(VT);
4642 SDValue Ops[] = { Op1, Op2, Op3 };
4643 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4646 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4647 MVT VT, const SDValue *Ops,
4649 SDVTList VTs = getVTList(VT);
4650 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4653 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4654 MVT VT1, MVT VT2, const SDValue *Ops,
4656 SDVTList VTs = getVTList(VT1, VT2);
4657 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4660 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4662 SDVTList VTs = getVTList(VT1, VT2);
4663 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4666 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4667 MVT VT1, MVT VT2, MVT VT3,
4668 const SDValue *Ops, unsigned NumOps) {
4669 SDVTList VTs = getVTList(VT1, VT2, VT3);
4670 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4673 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4676 SDVTList VTs = getVTList(VT1, VT2);
4677 SDValue Ops[] = { Op1 };
4678 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4681 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4683 SDValue Op1, SDValue Op2) {
4684 SDVTList VTs = getVTList(VT1, VT2);
4685 SDValue Ops[] = { Op1, Op2 };
4686 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4689 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4691 SDValue Op1, SDValue Op2,
4693 SDVTList VTs = getVTList(VT1, VT2);
4694 SDValue Ops[] = { Op1, Op2, Op3 };
4695 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4698 /// MorphNodeTo - These *mutate* the specified node to have the specified
4699 /// return type, opcode, and operands.
4701 /// Note that MorphNodeTo returns the resultant node. If there is already a
4702 /// node of the specified opcode and operands, it returns that node instead of
4703 /// the current one.
4705 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4706 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4707 /// node, and because it doesn't require CSE recalculation for any of
4708 /// the node's users.
4710 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4711 SDVTList VTs, const SDValue *Ops,
4713 // If an identical node already exists, use it.
4715 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4716 FoldingSetNodeID ID;
4717 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4718 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4722 if (!RemoveNodeFromCSEMaps(N))
4725 // Start the morphing.
4727 N->ValueList = VTs.VTs;
4728 N->NumValues = VTs.NumVTs;
4730 // Clear the operands list, updating used nodes to remove this from their
4731 // use list. Keep track of any operands that become dead as a result.
4732 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4733 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4735 SDNode *Used = Use.getNode();
4737 if (Used->use_empty())
4738 DeadNodeSet.insert(Used);
4741 // If NumOps is larger than the # of operands we currently have, reallocate
4742 // the operand list.
4743 if (NumOps > N->NumOperands) {
4744 if (N->OperandsNeedDelete)
4745 delete[] N->OperandList;
4747 if (N->isMachineOpcode()) {
4748 // We're creating a final node that will live unmorphed for the
4749 // remainder of the current SelectionDAG iteration, so we can allocate
4750 // the operands directly out of a pool with no recycling metadata.
4751 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4752 N->OperandsNeedDelete = false;
4754 N->OperandList = new SDUse[NumOps];
4755 N->OperandsNeedDelete = true;
4759 // Assign the new operands.
4760 N->NumOperands = NumOps;
4761 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4762 N->OperandList[i].setUser(N);
4763 N->OperandList[i].setInitial(Ops[i]);
4766 // Delete any nodes that are still dead after adding the uses for the
4768 SmallVector<SDNode *, 16> DeadNodes;
4769 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4770 E = DeadNodeSet.end(); I != E; ++I)
4771 if ((*I)->use_empty())
4772 DeadNodes.push_back(*I);
4773 RemoveDeadNodes(DeadNodes);
4776 CSEMap.InsertNode(N, IP); // Memoize the new node.
4781 /// getTargetNode - These are used for target selectors to create a new node
4782 /// with specified return type(s), target opcode, and operands.
4784 /// Note that getTargetNode returns the resultant node. If there is already a
4785 /// node of the specified opcode and operands, it returns that node instead of
4786 /// the current one.
4787 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4788 return getNode(~Opcode, VT).getNode();
4790 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4791 return getNode(~Opcode, dl, VT).getNode();
4794 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4795 return getNode(~Opcode, VT, Op1).getNode();
4797 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4799 return getNode(~Opcode, dl, VT, Op1).getNode();
4802 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4803 SDValue Op1, SDValue Op2) {
4804 return getNode(~Opcode, VT, Op1, Op2).getNode();
4806 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4807 SDValue Op1, SDValue Op2) {
4808 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4811 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4812 SDValue Op1, SDValue Op2,
4814 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4816 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4817 SDValue Op1, SDValue Op2,
4819 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4822 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4823 const SDValue *Ops, unsigned NumOps) {
4824 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4826 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4827 const SDValue *Ops, unsigned NumOps) {
4828 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4831 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4832 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4834 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4836 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4838 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4840 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4843 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4844 MVT VT2, SDValue Op1) {
4845 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4846 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4848 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4849 MVT VT2, SDValue Op1) {
4850 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4851 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4854 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4855 MVT VT2, SDValue Op1,
4857 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4858 SDValue Ops[] = { Op1, Op2 };
4859 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4861 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4862 MVT VT2, SDValue Op1,
4864 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4865 SDValue Ops[] = { Op1, Op2 };
4866 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4869 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4870 MVT VT2, SDValue Op1,
4871 SDValue Op2, SDValue Op3) {
4872 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4873 SDValue Ops[] = { Op1, Op2, Op3 };
4874 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4876 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4877 MVT VT2, SDValue Op1,
4878 SDValue Op2, SDValue Op3) {
4879 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4880 SDValue Ops[] = { Op1, Op2, Op3 };
4881 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4884 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4885 const SDValue *Ops, unsigned NumOps) {
4886 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4887 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4889 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4891 const SDValue *Ops, unsigned NumOps) {
4892 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4893 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4896 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4897 SDValue Op1, SDValue Op2) {
4898 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4899 SDValue Ops[] = { Op1, Op2 };
4900 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4902 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4903 MVT VT1, MVT VT2, MVT VT3,
4904 SDValue Op1, SDValue Op2) {
4905 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4906 SDValue Ops[] = { Op1, Op2 };
4907 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4910 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4911 SDValue Op1, SDValue Op2,
4913 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4914 SDValue Ops[] = { Op1, Op2, Op3 };
4915 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4917 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4918 MVT VT1, MVT VT2, MVT VT3,
4919 SDValue Op1, SDValue Op2,
4921 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4922 SDValue Ops[] = { Op1, Op2, Op3 };
4923 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4926 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4927 const SDValue *Ops, unsigned NumOps) {
4928 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4929 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4931 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4932 MVT VT1, MVT VT2, MVT VT3,
4933 const SDValue *Ops, unsigned NumOps) {
4934 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4935 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4938 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4939 MVT VT2, MVT VT3, MVT VT4,
4940 const SDValue *Ops, unsigned NumOps) {
4941 std::vector<MVT> VTList;
4942 VTList.push_back(VT1);
4943 VTList.push_back(VT2);
4944 VTList.push_back(VT3);
4945 VTList.push_back(VT4);
4946 const MVT *VTs = getNodeValueTypes(VTList);
4947 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4949 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4950 MVT VT2, MVT VT3, MVT VT4,
4951 const SDValue *Ops, unsigned NumOps) {
4952 std::vector<MVT> VTList;
4953 VTList.push_back(VT1);
4954 VTList.push_back(VT2);
4955 VTList.push_back(VT3);
4956 VTList.push_back(VT4);
4957 const MVT *VTs = getNodeValueTypes(VTList);
4958 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4961 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4962 const std::vector<MVT> &ResultTys,
4963 const SDValue *Ops, unsigned NumOps) {
4964 const MVT *VTs = getNodeValueTypes(ResultTys);
4965 return getNode(~Opcode, VTs, ResultTys.size(),
4966 Ops, NumOps).getNode();
4968 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4969 const std::vector<MVT> &ResultTys,
4970 const SDValue *Ops, unsigned NumOps) {
4971 const MVT *VTs = getNodeValueTypes(ResultTys);
4972 return getNode(~Opcode, dl, VTs, ResultTys.size(),
4973 Ops, NumOps).getNode();
4976 /// getNodeIfExists - Get the specified node if it's already available, or
4977 /// else return NULL.
4978 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4979 const SDValue *Ops, unsigned NumOps) {
4980 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4981 FoldingSetNodeID ID;
4982 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4990 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4991 /// This can cause recursive merging of nodes in the DAG.
4993 /// This version assumes From has a single result value.
4995 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4996 DAGUpdateListener *UpdateListener) {
4997 SDNode *From = FromN.getNode();
4998 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4999 "Cannot replace with this method!");
5000 assert(From != To.getNode() && "Cannot replace uses of with self");
5002 // Iterate over all the existing uses of From. New uses will be added
5003 // to the beginning of the use list, which we avoid visiting.
5004 // This specifically avoids visiting uses of From that arise while the
5005 // replacement is happening, because any such uses would be the result
5006 // of CSE: If an existing node looks like From after one of its operands
5007 // is replaced by To, we don't want to replace of all its users with To
5008 // too. See PR3018 for more info.
5009 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5013 // This node is about to morph, remove its old self from the CSE maps.
5014 RemoveNodeFromCSEMaps(User);
5016 // A user can appear in a use list multiple times, and when this
5017 // happens the uses are usually next to each other in the list.
5018 // To help reduce the number of CSE recomputations, process all
5019 // the uses of this user that we can find this way.
5021 SDUse &Use = UI.getUse();
5024 } while (UI != UE && *UI == User);
5026 // Now that we have modified User, add it back to the CSE maps. If it
5027 // already exists there, recursively merge the results together.
5028 AddModifiedNodeToCSEMaps(User, UpdateListener);
5032 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5033 /// This can cause recursive merging of nodes in the DAG.
5035 /// This version assumes From/To have matching types and numbers of result
5038 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5039 DAGUpdateListener *UpdateListener) {
5040 assert(From->getVTList().VTs == To->getVTList().VTs &&
5041 From->getNumValues() == To->getNumValues() &&
5042 "Cannot use this version of ReplaceAllUsesWith!");
5044 // Handle the trivial case.
5048 // Iterate over just the existing users of From. See the comments in
5049 // the ReplaceAllUsesWith above.
5050 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5054 // This node is about to morph, remove its old self from the CSE maps.
5055 RemoveNodeFromCSEMaps(User);
5057 // A user can appear in a use list multiple times, and when this
5058 // happens the uses are usually next to each other in the list.
5059 // To help reduce the number of CSE recomputations, process all
5060 // the uses of this user that we can find this way.
5062 SDUse &Use = UI.getUse();
5065 } while (UI != UE && *UI == User);
5067 // Now that we have modified User, add it back to the CSE maps. If it
5068 // already exists there, recursively merge the results together.
5069 AddModifiedNodeToCSEMaps(User, UpdateListener);
5073 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5074 /// This can cause recursive merging of nodes in the DAG.
5076 /// This version can replace From with any result values. To must match the
5077 /// number and types of values returned by From.
5078 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5080 DAGUpdateListener *UpdateListener) {
5081 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5082 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5084 // Iterate over just the existing users of From. See the comments in
5085 // the ReplaceAllUsesWith above.
5086 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5090 // This node is about to morph, remove its old self from the CSE maps.
5091 RemoveNodeFromCSEMaps(User);
5093 // A user can appear in a use list multiple times, and when this
5094 // happens the uses are usually next to each other in the list.
5095 // To help reduce the number of CSE recomputations, process all
5096 // the uses of this user that we can find this way.
5098 SDUse &Use = UI.getUse();
5099 const SDValue &ToOp = To[Use.getResNo()];
5102 } while (UI != UE && *UI == User);
5104 // Now that we have modified User, add it back to the CSE maps. If it
5105 // already exists there, recursively merge the results together.
5106 AddModifiedNodeToCSEMaps(User, UpdateListener);
5110 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5111 /// uses of other values produced by From.getNode() alone. The Deleted
5112 /// vector is handled the same way as for ReplaceAllUsesWith.
5113 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5114 DAGUpdateListener *UpdateListener){
5115 // Handle the really simple, really trivial case efficiently.
5116 if (From == To) return;
5118 // Handle the simple, trivial, case efficiently.
5119 if (From.getNode()->getNumValues() == 1) {
5120 ReplaceAllUsesWith(From, To, UpdateListener);
5124 // Iterate over just the existing users of From. See the comments in
5125 // the ReplaceAllUsesWith above.
5126 SDNode::use_iterator UI = From.getNode()->use_begin(),
5127 UE = From.getNode()->use_end();
5130 bool UserRemovedFromCSEMaps = false;
5132 // A user can appear in a use list multiple times, and when this
5133 // happens the uses are usually next to each other in the list.
5134 // To help reduce the number of CSE recomputations, process all
5135 // the uses of this user that we can find this way.
5137 SDUse &Use = UI.getUse();
5139 // Skip uses of different values from the same node.
5140 if (Use.getResNo() != From.getResNo()) {
5145 // If this node hasn't been modified yet, it's still in the CSE maps,
5146 // so remove its old self from the CSE maps.
5147 if (!UserRemovedFromCSEMaps) {
5148 RemoveNodeFromCSEMaps(User);
5149 UserRemovedFromCSEMaps = true;
5154 } while (UI != UE && *UI == User);
5156 // We are iterating over all uses of the From node, so if a use
5157 // doesn't use the specific value, no changes are made.
5158 if (!UserRemovedFromCSEMaps)
5161 // Now that we have modified User, add it back to the CSE maps. If it
5162 // already exists there, recursively merge the results together.
5163 AddModifiedNodeToCSEMaps(User, UpdateListener);
5168 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5169 /// to record information about a use.
5176 /// operator< - Sort Memos by User.
5177 bool operator<(const UseMemo &L, const UseMemo &R) {
5178 return (intptr_t)L.User < (intptr_t)R.User;
5182 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5183 /// uses of other values produced by From.getNode() alone. The same value
5184 /// may appear in both the From and To list. The Deleted vector is
5185 /// handled the same way as for ReplaceAllUsesWith.
5186 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5189 DAGUpdateListener *UpdateListener){
5190 // Handle the simple, trivial case efficiently.
5192 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5194 // Read up all the uses and make records of them. This helps
5195 // processing new uses that are introduced during the
5196 // replacement process.
5197 SmallVector<UseMemo, 4> Uses;
5198 for (unsigned i = 0; i != Num; ++i) {
5199 unsigned FromResNo = From[i].getResNo();
5200 SDNode *FromNode = From[i].getNode();
5201 for (SDNode::use_iterator UI = FromNode->use_begin(),
5202 E = FromNode->use_end(); UI != E; ++UI) {
5203 SDUse &Use = UI.getUse();
5204 if (Use.getResNo() == FromResNo) {
5205 UseMemo Memo = { *UI, i, &Use };
5206 Uses.push_back(Memo);
5211 // Sort the uses, so that all the uses from a given User are together.
5212 std::sort(Uses.begin(), Uses.end());
5214 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5215 UseIndex != UseIndexEnd; ) {
5216 // We know that this user uses some value of From. If it is the right
5217 // value, update it.
5218 SDNode *User = Uses[UseIndex].User;
5220 // This node is about to morph, remove its old self from the CSE maps.
5221 RemoveNodeFromCSEMaps(User);
5223 // The Uses array is sorted, so all the uses for a given User
5224 // are next to each other in the list.
5225 // To help reduce the number of CSE recomputations, process all
5226 // the uses of this user that we can find this way.
5228 unsigned i = Uses[UseIndex].Index;
5229 SDUse &Use = *Uses[UseIndex].Use;
5233 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5235 // Now that we have modified User, add it back to the CSE maps. If it
5236 // already exists there, recursively merge the results together.
5237 AddModifiedNodeToCSEMaps(User, UpdateListener);
5241 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5242 /// based on their topological order. It returns the maximum id and a vector
5243 /// of the SDNodes* in assigned order by reference.
5244 unsigned SelectionDAG::AssignTopologicalOrder() {
5246 unsigned DAGSize = 0;
5248 // SortedPos tracks the progress of the algorithm. Nodes before it are
5249 // sorted, nodes after it are unsorted. When the algorithm completes
5250 // it is at the end of the list.
5251 allnodes_iterator SortedPos = allnodes_begin();
5253 // Visit all the nodes. Move nodes with no operands to the front of
5254 // the list immediately. Annotate nodes that do have operands with their
5255 // operand count. Before we do this, the Node Id fields of the nodes
5256 // may contain arbitrary values. After, the Node Id fields for nodes
5257 // before SortedPos will contain the topological sort index, and the
5258 // Node Id fields for nodes At SortedPos and after will contain the
5259 // count of outstanding operands.
5260 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5262 unsigned Degree = N->getNumOperands();
5264 // A node with no uses, add it to the result array immediately.
5265 N->setNodeId(DAGSize++);
5266 allnodes_iterator Q = N;
5268 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5271 // Temporarily use the Node Id as scratch space for the degree count.
5272 N->setNodeId(Degree);
5276 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5277 // such that by the time the end is reached all nodes will be sorted.
5278 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5280 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5283 unsigned Degree = P->getNodeId();
5286 // All of P's operands are sorted, so P may sorted now.
5287 P->setNodeId(DAGSize++);
5289 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5292 // Update P's outstanding operand count.
5293 P->setNodeId(Degree);
5298 assert(SortedPos == AllNodes.end() &&
5299 "Topological sort incomplete!");
5300 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5301 "First node in topological sort is not the entry token!");
5302 assert(AllNodes.front().getNodeId() == 0 &&
5303 "First node in topological sort has non-zero id!");
5304 assert(AllNodes.front().getNumOperands() == 0 &&
5305 "First node in topological sort has operands!");
5306 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5307 "Last node in topologic sort has unexpected id!");
5308 assert(AllNodes.back().use_empty() &&
5309 "Last node in topologic sort has users!");
5310 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5316 //===----------------------------------------------------------------------===//
5318 //===----------------------------------------------------------------------===//
5320 HandleSDNode::~HandleSDNode() {
5324 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
5326 : SDNode(isa<GlobalVariable>(GA) &&
5327 cast<GlobalVariable>(GA)->isThreadLocal() ?
5329 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
5331 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
5332 getSDVTList(VT)), Offset(o) {
5333 TheGlobal = const_cast<GlobalValue*>(GA);
5336 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
5337 const Value *srcValue, int SVO,
5338 unsigned alignment, bool vol)
5339 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5340 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5341 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5342 assert(getAlignment() == alignment && "Alignment representation error!");
5343 assert(isVolatile() == vol && "Volatile representation error!");
5346 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
5347 unsigned NumOps, MVT memvt, const Value *srcValue,
5348 int SVO, unsigned alignment, bool vol)
5349 : SDNode(Opc, VTs, Ops, NumOps),
5350 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5351 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5352 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5353 assert(getAlignment() == alignment && "Alignment representation error!");
5354 assert(isVolatile() == vol && "Volatile representation error!");
5357 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
5358 const Value *srcValue, int SVO,
5359 unsigned alignment, bool vol)
5360 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5361 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5362 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5363 assert(getAlignment() == alignment && "Alignment representation error!");
5364 assert(isVolatile() == vol && "Volatile representation error!");
5367 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5369 unsigned NumOps, MVT memvt, const Value *srcValue,
5370 int SVO, unsigned alignment, bool vol)
5371 : SDNode(Opc, dl, VTs, Ops, NumOps),
5372 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5373 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5374 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5375 assert(getAlignment() == alignment && "Alignment representation error!");
5376 assert(isVolatile() == vol && "Volatile representation error!");
5379 /// getMemOperand - Return a MachineMemOperand object describing the memory
5380 /// reference performed by this memory reference.
5381 MachineMemOperand MemSDNode::getMemOperand() const {
5383 if (isa<LoadSDNode>(this))
5384 Flags = MachineMemOperand::MOLoad;
5385 else if (isa<StoreSDNode>(this))
5386 Flags = MachineMemOperand::MOStore;
5387 else if (isa<AtomicSDNode>(this)) {
5388 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5391 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5392 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5393 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5394 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5397 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5398 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5400 // Check if the memory reference references a frame index
5401 const FrameIndexSDNode *FI =
5402 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5403 if (!getSrcValue() && FI)
5404 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5405 Flags, 0, Size, getAlignment());
5407 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5408 Size, getAlignment());
5411 /// Profile - Gather unique data for the node.
5413 void SDNode::Profile(FoldingSetNodeID &ID) const {
5414 AddNodeIDNode(ID, this);
5417 /// getValueTypeList - Return a pointer to the specified value type.
5419 const MVT *SDNode::getValueTypeList(MVT VT) {
5420 if (VT.isExtended()) {
5421 static std::set<MVT, MVT::compareRawBits> EVTs;
5422 return &(*EVTs.insert(VT).first);
5424 static MVT VTs[MVT::LAST_VALUETYPE];
5425 VTs[VT.getSimpleVT()] = VT;
5426 return &VTs[VT.getSimpleVT()];
5430 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5431 /// indicated value. This method ignores uses of other values defined by this
5433 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5434 assert(Value < getNumValues() && "Bad value!");
5436 // TODO: Only iterate over uses of a given value of the node
5437 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5438 if (UI.getUse().getResNo() == Value) {
5445 // Found exactly the right number of uses?
5450 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5451 /// value. This method ignores uses of other values defined by this operation.
5452 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5453 assert(Value < getNumValues() && "Bad value!");
5455 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5456 if (UI.getUse().getResNo() == Value)
5463 /// isOnlyUserOf - Return true if this node is the only use of N.
5465 bool SDNode::isOnlyUserOf(SDNode *N) const {
5467 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5478 /// isOperand - Return true if this node is an operand of N.
5480 bool SDValue::isOperandOf(SDNode *N) const {
5481 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5482 if (*this == N->getOperand(i))
5487 bool SDNode::isOperandOf(SDNode *N) const {
5488 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5489 if (this == N->OperandList[i].getNode())
5494 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5495 /// be a chain) reaches the specified operand without crossing any
5496 /// side-effecting instructions. In practice, this looks through token
5497 /// factors and non-volatile loads. In order to remain efficient, this only
5498 /// looks a couple of nodes in, it does not do an exhaustive search.
5499 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5500 unsigned Depth) const {
5501 if (*this == Dest) return true;
5503 // Don't search too deeply, we just want to be able to see through
5504 // TokenFactor's etc.
5505 if (Depth == 0) return false;
5507 // If this is a token factor, all inputs to the TF happen in parallel. If any
5508 // of the operands of the TF reach dest, then we can do the xform.
5509 if (getOpcode() == ISD::TokenFactor) {
5510 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5511 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5516 // Loads don't have side effects, look through them.
5517 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5518 if (!Ld->isVolatile())
5519 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5525 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5526 SmallPtrSet<SDNode *, 32> &Visited) {
5527 if (found || !Visited.insert(N))
5530 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5531 SDNode *Op = N->getOperand(i).getNode();
5536 findPredecessor(Op, P, found, Visited);
5540 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5541 /// is either an operand of N or it can be reached by recursively traversing
5542 /// up the operands.
5543 /// NOTE: this is an expensive method. Use it carefully.
5544 bool SDNode::isPredecessorOf(SDNode *N) const {
5545 SmallPtrSet<SDNode *, 32> Visited;
5547 findPredecessor(N, this, found, Visited);
5551 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5552 assert(Num < NumOperands && "Invalid child # of SDNode!");
5553 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5556 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5557 switch (getOpcode()) {
5559 if (getOpcode() < ISD::BUILTIN_OP_END)
5560 return "<<Unknown DAG Node>>";
5561 if (isMachineOpcode()) {
5563 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5564 if (getMachineOpcode() < TII->getNumOpcodes())
5565 return TII->get(getMachineOpcode()).getName();
5566 return "<<Unknown Machine Node>>";
5569 const TargetLowering &TLI = G->getTargetLoweringInfo();
5570 const char *Name = TLI.getTargetNodeName(getOpcode());
5571 if (Name) return Name;
5572 return "<<Unknown Target Node>>";
5574 return "<<Unknown Node>>";
5577 case ISD::DELETED_NODE:
5578 return "<<Deleted Node!>>";
5580 case ISD::PREFETCH: return "Prefetch";
5581 case ISD::MEMBARRIER: return "MemBarrier";
5582 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5583 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5584 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5585 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5586 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5587 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5588 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5589 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5590 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5591 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5592 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5593 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5594 case ISD::PCMARKER: return "PCMarker";
5595 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5596 case ISD::SRCVALUE: return "SrcValue";
5597 case ISD::MEMOPERAND: return "MemOperand";
5598 case ISD::EntryToken: return "EntryToken";
5599 case ISD::TokenFactor: return "TokenFactor";
5600 case ISD::AssertSext: return "AssertSext";
5601 case ISD::AssertZext: return "AssertZext";
5603 case ISD::BasicBlock: return "BasicBlock";
5604 case ISD::ARG_FLAGS: return "ArgFlags";
5605 case ISD::VALUETYPE: return "ValueType";
5606 case ISD::Register: return "Register";
5608 case ISD::Constant: return "Constant";
5609 case ISD::ConstantFP: return "ConstantFP";
5610 case ISD::GlobalAddress: return "GlobalAddress";
5611 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5612 case ISD::FrameIndex: return "FrameIndex";
5613 case ISD::JumpTable: return "JumpTable";
5614 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5615 case ISD::RETURNADDR: return "RETURNADDR";
5616 case ISD::FRAMEADDR: return "FRAMEADDR";
5617 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5618 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5619 case ISD::EHSELECTION: return "EHSELECTION";
5620 case ISD::EH_RETURN: return "EH_RETURN";
5621 case ISD::ConstantPool: return "ConstantPool";
5622 case ISD::ExternalSymbol: return "ExternalSymbol";
5623 case ISD::INTRINSIC_WO_CHAIN: {
5624 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5625 return Intrinsic::getName((Intrinsic::ID)IID);
5627 case ISD::INTRINSIC_VOID:
5628 case ISD::INTRINSIC_W_CHAIN: {
5629 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5630 return Intrinsic::getName((Intrinsic::ID)IID);
5633 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5634 case ISD::TargetConstant: return "TargetConstant";
5635 case ISD::TargetConstantFP:return "TargetConstantFP";
5636 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5637 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5638 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5639 case ISD::TargetJumpTable: return "TargetJumpTable";
5640 case ISD::TargetConstantPool: return "TargetConstantPool";
5641 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5643 case ISD::CopyToReg: return "CopyToReg";
5644 case ISD::CopyFromReg: return "CopyFromReg";
5645 case ISD::UNDEF: return "undef";
5646 case ISD::MERGE_VALUES: return "merge_values";
5647 case ISD::INLINEASM: return "inlineasm";
5648 case ISD::DBG_LABEL: return "dbg_label";
5649 case ISD::EH_LABEL: return "eh_label";
5650 case ISD::DECLARE: return "declare";
5651 case ISD::HANDLENODE: return "handlenode";
5652 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5653 case ISD::CALL: return "call";
5656 case ISD::FABS: return "fabs";
5657 case ISD::FNEG: return "fneg";
5658 case ISD::FSQRT: return "fsqrt";
5659 case ISD::FSIN: return "fsin";
5660 case ISD::FCOS: return "fcos";
5661 case ISD::FPOWI: return "fpowi";
5662 case ISD::FPOW: return "fpow";
5663 case ISD::FTRUNC: return "ftrunc";
5664 case ISD::FFLOOR: return "ffloor";
5665 case ISD::FCEIL: return "fceil";
5666 case ISD::FRINT: return "frint";
5667 case ISD::FNEARBYINT: return "fnearbyint";
5670 case ISD::ADD: return "add";
5671 case ISD::SUB: return "sub";
5672 case ISD::MUL: return "mul";
5673 case ISD::MULHU: return "mulhu";
5674 case ISD::MULHS: return "mulhs";
5675 case ISD::SDIV: return "sdiv";
5676 case ISD::UDIV: return "udiv";
5677 case ISD::SREM: return "srem";
5678 case ISD::UREM: return "urem";
5679 case ISD::SMUL_LOHI: return "smul_lohi";
5680 case ISD::UMUL_LOHI: return "umul_lohi";
5681 case ISD::SDIVREM: return "sdivrem";
5682 case ISD::UDIVREM: return "udivrem";
5683 case ISD::AND: return "and";
5684 case ISD::OR: return "or";
5685 case ISD::XOR: return "xor";
5686 case ISD::SHL: return "shl";
5687 case ISD::SRA: return "sra";
5688 case ISD::SRL: return "srl";
5689 case ISD::ROTL: return "rotl";
5690 case ISD::ROTR: return "rotr";
5691 case ISD::FADD: return "fadd";
5692 case ISD::FSUB: return "fsub";
5693 case ISD::FMUL: return "fmul";
5694 case ISD::FDIV: return "fdiv";
5695 case ISD::FREM: return "frem";
5696 case ISD::FCOPYSIGN: return "fcopysign";
5697 case ISD::FGETSIGN: return "fgetsign";
5699 case ISD::SETCC: return "setcc";
5700 case ISD::VSETCC: return "vsetcc";
5701 case ISD::SELECT: return "select";
5702 case ISD::SELECT_CC: return "select_cc";
5703 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5704 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5705 case ISD::CONCAT_VECTORS: return "concat_vectors";
5706 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5707 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5708 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5709 case ISD::CARRY_FALSE: return "carry_false";
5710 case ISD::ADDC: return "addc";
5711 case ISD::ADDE: return "adde";
5712 case ISD::SADDO: return "saddo";
5713 case ISD::UADDO: return "uaddo";
5714 case ISD::SSUBO: return "ssubo";
5715 case ISD::USUBO: return "usubo";
5716 case ISD::SMULO: return "smulo";
5717 case ISD::UMULO: return "umulo";
5718 case ISD::SUBC: return "subc";
5719 case ISD::SUBE: return "sube";
5720 case ISD::SHL_PARTS: return "shl_parts";
5721 case ISD::SRA_PARTS: return "sra_parts";
5722 case ISD::SRL_PARTS: return "srl_parts";
5724 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5725 case ISD::INSERT_SUBREG: return "insert_subreg";
5727 // Conversion operators.
5728 case ISD::SIGN_EXTEND: return "sign_extend";
5729 case ISD::ZERO_EXTEND: return "zero_extend";
5730 case ISD::ANY_EXTEND: return "any_extend";
5731 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5732 case ISD::TRUNCATE: return "truncate";
5733 case ISD::FP_ROUND: return "fp_round";
5734 case ISD::FLT_ROUNDS_: return "flt_rounds";
5735 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5736 case ISD::FP_EXTEND: return "fp_extend";
5738 case ISD::SINT_TO_FP: return "sint_to_fp";
5739 case ISD::UINT_TO_FP: return "uint_to_fp";
5740 case ISD::FP_TO_SINT: return "fp_to_sint";
5741 case ISD::FP_TO_UINT: return "fp_to_uint";
5742 case ISD::BIT_CONVERT: return "bit_convert";
5744 case ISD::CONVERT_RNDSAT: {
5745 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5746 default: assert(0 && "Unknown cvt code!");
5747 case ISD::CVT_FF: return "cvt_ff";
5748 case ISD::CVT_FS: return "cvt_fs";
5749 case ISD::CVT_FU: return "cvt_fu";
5750 case ISD::CVT_SF: return "cvt_sf";
5751 case ISD::CVT_UF: return "cvt_uf";
5752 case ISD::CVT_SS: return "cvt_ss";
5753 case ISD::CVT_SU: return "cvt_su";
5754 case ISD::CVT_US: return "cvt_us";
5755 case ISD::CVT_UU: return "cvt_uu";
5759 // Control flow instructions
5760 case ISD::BR: return "br";
5761 case ISD::BRIND: return "brind";
5762 case ISD::BR_JT: return "br_jt";
5763 case ISD::BRCOND: return "brcond";
5764 case ISD::BR_CC: return "br_cc";
5765 case ISD::RET: return "ret";
5766 case ISD::CALLSEQ_START: return "callseq_start";
5767 case ISD::CALLSEQ_END: return "callseq_end";
5770 case ISD::LOAD: return "load";
5771 case ISD::STORE: return "store";
5772 case ISD::VAARG: return "vaarg";
5773 case ISD::VACOPY: return "vacopy";
5774 case ISD::VAEND: return "vaend";
5775 case ISD::VASTART: return "vastart";
5776 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5777 case ISD::EXTRACT_ELEMENT: return "extract_element";
5778 case ISD::BUILD_PAIR: return "build_pair";
5779 case ISD::STACKSAVE: return "stacksave";
5780 case ISD::STACKRESTORE: return "stackrestore";
5781 case ISD::TRAP: return "trap";
5784 case ISD::BSWAP: return "bswap";
5785 case ISD::CTPOP: return "ctpop";
5786 case ISD::CTTZ: return "cttz";
5787 case ISD::CTLZ: return "ctlz";
5790 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5791 case ISD::DEBUG_LOC: return "debug_loc";
5794 case ISD::TRAMPOLINE: return "trampoline";
5797 switch (cast<CondCodeSDNode>(this)->get()) {
5798 default: assert(0 && "Unknown setcc condition!");
5799 case ISD::SETOEQ: return "setoeq";
5800 case ISD::SETOGT: return "setogt";
5801 case ISD::SETOGE: return "setoge";
5802 case ISD::SETOLT: return "setolt";
5803 case ISD::SETOLE: return "setole";
5804 case ISD::SETONE: return "setone";
5806 case ISD::SETO: return "seto";
5807 case ISD::SETUO: return "setuo";
5808 case ISD::SETUEQ: return "setue";
5809 case ISD::SETUGT: return "setugt";
5810 case ISD::SETUGE: return "setuge";
5811 case ISD::SETULT: return "setult";
5812 case ISD::SETULE: return "setule";
5813 case ISD::SETUNE: return "setune";
5815 case ISD::SETEQ: return "seteq";
5816 case ISD::SETGT: return "setgt";
5817 case ISD::SETGE: return "setge";
5818 case ISD::SETLT: return "setlt";
5819 case ISD::SETLE: return "setle";
5820 case ISD::SETNE: return "setne";
5825 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5834 return "<post-inc>";
5836 return "<post-dec>";
5840 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5841 std::string S = "< ";
5855 if (getByValAlign())
5856 S += "byval-align:" + utostr(getByValAlign()) + " ";
5858 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5860 S += "byval-size:" + utostr(getByValSize()) + " ";
5864 void SDNode::dump() const { dump(0); }
5865 void SDNode::dump(const SelectionDAG *G) const {
5870 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5871 OS << (void*)this << ": ";
5873 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5875 if (getValueType(i) == MVT::Other)
5878 OS << getValueType(i).getMVTString();
5880 OS << " = " << getOperationName(G);
5883 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5885 OS << (void*)getOperand(i).getNode();
5886 if (unsigned RN = getOperand(i).getResNo())
5890 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5891 SDNode *Mask = getOperand(2).getNode();
5893 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5895 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5898 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5903 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5904 OS << '<' << CSDN->getAPIntValue() << '>';
5905 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5906 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5907 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5908 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5909 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5912 CSDN->getValueAPF().bitcastToAPInt().dump();
5915 } else if (const GlobalAddressSDNode *GADN =
5916 dyn_cast<GlobalAddressSDNode>(this)) {
5917 int64_t offset = GADN->getOffset();
5919 WriteAsOperand(OS, GADN->getGlobal());
5922 OS << " + " << offset;
5924 OS << " " << offset;
5925 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5926 OS << "<" << FIDN->getIndex() << ">";
5927 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5928 OS << "<" << JTDN->getIndex() << ">";
5929 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5930 int offset = CP->getOffset();
5931 if (CP->isMachineConstantPoolEntry())
5932 OS << "<" << *CP->getMachineCPVal() << ">";
5934 OS << "<" << *CP->getConstVal() << ">";
5936 OS << " + " << offset;
5938 OS << " " << offset;
5939 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5941 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5943 OS << LBB->getName() << " ";
5944 OS << (const void*)BBDN->getBasicBlock() << ">";
5945 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5946 if (G && R->getReg() &&
5947 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5948 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5950 OS << " #" << R->getReg();
5952 } else if (const ExternalSymbolSDNode *ES =
5953 dyn_cast<ExternalSymbolSDNode>(this)) {
5954 OS << "'" << ES->getSymbol() << "'";
5955 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5957 OS << "<" << M->getValue() << ">";
5960 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5961 if (M->MO.getValue())
5962 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5964 OS << "<null:" << M->MO.getOffset() << ">";
5965 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5966 OS << N->getArgFlags().getArgFlagsString();
5967 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5968 OS << ":" << N->getVT().getMVTString();
5970 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5971 const Value *SrcValue = LD->getSrcValue();
5972 int SrcOffset = LD->getSrcValueOffset();
5978 OS << ":" << SrcOffset << ">";
5981 switch (LD->getExtensionType()) {
5982 default: doExt = false; break;
5983 case ISD::EXTLOAD: OS << " <anyext "; break;
5984 case ISD::SEXTLOAD: OS << " <sext "; break;
5985 case ISD::ZEXTLOAD: OS << " <zext "; break;
5988 OS << LD->getMemoryVT().getMVTString() << ">";
5990 const char *AM = getIndexedModeName(LD->getAddressingMode());
5993 if (LD->isVolatile())
5994 OS << " <volatile>";
5995 OS << " alignment=" << LD->getAlignment();
5996 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5997 const Value *SrcValue = ST->getSrcValue();
5998 int SrcOffset = ST->getSrcValueOffset();
6004 OS << ":" << SrcOffset << ">";
6006 if (ST->isTruncatingStore())
6007 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
6009 const char *AM = getIndexedModeName(ST->getAddressingMode());
6012 if (ST->isVolatile())
6013 OS << " <volatile>";
6014 OS << " alignment=" << ST->getAlignment();
6015 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
6016 const Value *SrcValue = AT->getSrcValue();
6017 int SrcOffset = AT->getSrcValueOffset();
6023 OS << ":" << SrcOffset << ">";
6024 if (AT->isVolatile())
6025 OS << " <volatile>";
6026 OS << " alignment=" << AT->getAlignment();
6030 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6031 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6032 if (N->getOperand(i).getNode()->hasOneUse())
6033 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6035 cerr << "\n" << std::string(indent+2, ' ')
6036 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6039 cerr << "\n" << std::string(indent, ' ');
6043 void SelectionDAG::dump() const {
6044 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
6046 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6048 const SDNode *N = I;
6049 if (!N->hasOneUse() && N != getRoot().getNode())
6050 DumpNodes(N, 2, this);
6053 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6058 const Type *ConstantPoolSDNode::getType() const {
6059 if (isMachineConstantPoolEntry())
6060 return Val.MachineCPVal->getType();
6061 return Val.ConstVal->getType();