1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/Analysis/ValueTracking.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/DebugInfo.h"
30 #include "llvm/IR/CallingConv.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DataLayout.h"
33 #include "llvm/IR/DerivedTypes.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/GlobalAlias.h"
36 #include "llvm/IR/GlobalVariable.h"
37 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/Mutex.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Target/TargetInstrInfo.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetLowering.h"
48 #include "llvm/Target/TargetMachine.h"
49 #include "llvm/Target/TargetOptions.h"
50 #include "llvm/Target/TargetRegisterInfo.h"
51 #include "llvm/Target/TargetSelectionDAGInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f16: return &APFloat::IEEEhalf;
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 // Default null implementations of the callbacks.
76 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
77 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
79 //===----------------------------------------------------------------------===//
80 // ConstantFPSDNode Class
81 //===----------------------------------------------------------------------===//
83 /// isExactlyValue - We don't rely on operator== working on double values, as
84 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
85 /// As such, this method can be used to do an exact bit-for-bit comparison of
86 /// two floating point values.
87 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
88 return getValueAPF().bitwiseIsEqual(V);
91 bool ConstantFPSDNode::isValueValidForType(EVT VT,
93 assert(VT.isFloatingPoint() && "Can only convert between FP types");
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BITCAST)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
126 // elements. We have to be a bit careful here, as the type of the constant
127 // may not be the same as the type of the vector elements due to type
128 // legalization (the elements are promoted to a legal type for the target and
129 // a vector of a type may be legal when the base element type is not).
130 // We only want to check enough bits to cover the vector elements, because
131 // we care if the resultant vector is all ones, not whether the individual
133 SDValue NotZero = N->getOperand(i);
134 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
135 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
136 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
138 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
139 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
144 // Okay, we have at least one ~0 value, check to see if the rest match or are
145 // undefs. Even with the above element type twiddling, this should be OK, as
146 // the same type legalization should have applied to all the elements.
147 for (++i; i != e; ++i)
148 if (N->getOperand(i) != NotZero &&
149 N->getOperand(i).getOpcode() != ISD::UNDEF)
155 /// isBuildVectorAllZeros - Return true if the specified node is a
156 /// BUILD_VECTOR where all of the elements are 0 or undef.
157 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
158 // Look through a bit convert.
159 if (N->getOpcode() == ISD::BITCAST)
160 N = N->getOperand(0).getNode();
162 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
164 unsigned i = 0, e = N->getNumOperands();
166 // Skip over all of the undef values.
167 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
170 // Do not accept an all-undef vector.
171 if (i == e) return false;
173 // Do not accept build_vectors that aren't all constants or which have non-0
175 SDValue Zero = N->getOperand(i);
176 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
177 if (!CN->isNullValue())
179 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
180 if (!CFPN->getValueAPF().isPosZero())
185 // Okay, we have at least one 0 value, check to see if the rest match or are
187 for (++i; i != e; ++i)
188 if (N->getOperand(i) != Zero &&
189 N->getOperand(i).getOpcode() != ISD::UNDEF)
194 /// isScalarToVector - Return true if the specified node is a
195 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
196 /// element is not an undef.
197 bool ISD::isScalarToVector(const SDNode *N) {
198 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
201 if (N->getOpcode() != ISD::BUILD_VECTOR)
203 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
205 unsigned NumElems = N->getNumOperands();
208 for (unsigned i = 1; i < NumElems; ++i) {
209 SDValue V = N->getOperand(i);
210 if (V.getOpcode() != ISD::UNDEF)
216 /// allOperandsUndef - Return true if the node has at least one operand
217 /// and all operands of the specified node are ISD::UNDEF.
218 bool ISD::allOperandsUndef(const SDNode *N) {
219 // Return false if the node has no operands.
220 // This is "logically inconsistent" with the definition of "all" but
221 // is probably the desired behavior.
222 if (N->getNumOperands() == 0)
225 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
226 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
232 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
233 /// when given the operation for (X op Y).
234 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
235 // To perform this operation, we just need to swap the L and G bits of the
237 unsigned OldL = (Operation >> 2) & 1;
238 unsigned OldG = (Operation >> 1) & 1;
239 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
240 (OldL << 1) | // New G bit
241 (OldG << 2)); // New L bit.
244 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
245 /// 'op' is a valid SetCC operation.
246 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
247 unsigned Operation = Op;
249 Operation ^= 7; // Flip L, G, E bits, but not U.
251 Operation ^= 15; // Flip all of the condition bits.
253 if (Operation > ISD::SETTRUE2)
254 Operation &= ~8; // Don't let N and U bits get set.
256 return ISD::CondCode(Operation);
260 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
261 /// signed operation and 2 if the result is an unsigned comparison. Return zero
262 /// if the operation does not depend on the sign of the input (setne and seteq).
263 static int isSignedOp(ISD::CondCode Opcode) {
265 default: llvm_unreachable("Illegal integer setcc operation!");
267 case ISD::SETNE: return 0;
271 case ISD::SETGE: return 1;
275 case ISD::SETUGE: return 2;
279 /// getSetCCOrOperation - Return the result of a logical OR between different
280 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
281 /// returns SETCC_INVALID if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed integer setcc with an unsigned integer setcc.
287 return ISD::SETCC_INVALID;
289 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
291 // If the N and U bits get set then the resultant comparison DOES suddenly
292 // care about orderedness, and is true when ordered.
293 if (Op > ISD::SETTRUE2)
294 Op &= ~16; // Clear the U bit if the N bit is set.
296 // Canonicalize illegal integer setcc's.
297 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
300 return ISD::CondCode(Op);
303 /// getSetCCAndOperation - Return the result of a logical AND between different
304 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
305 /// function returns zero if it is not possible to represent the resultant
307 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
309 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
310 // Cannot fold a signed setcc with an unsigned setcc.
311 return ISD::SETCC_INVALID;
313 // Combine all of the condition bits.
314 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
316 // Canonicalize illegal integer setcc's.
320 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
321 case ISD::SETOEQ: // SETEQ & SETU[LG]E
322 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
323 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
324 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
331 //===----------------------------------------------------------------------===//
332 // SDNode Profile Support
333 //===----------------------------------------------------------------------===//
335 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
337 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
341 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
342 /// solely with their pointer.
343 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
344 ID.AddPointer(VTList.VTs);
347 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
349 static void AddNodeIDOperands(FoldingSetNodeID &ID,
350 const SDValue *Ops, unsigned NumOps) {
351 for (; NumOps; --NumOps, ++Ops) {
352 ID.AddPointer(Ops->getNode());
353 ID.AddInteger(Ops->getResNo());
357 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
359 static void AddNodeIDOperands(FoldingSetNodeID &ID,
360 const SDUse *Ops, unsigned NumOps) {
361 for (; NumOps; --NumOps, ++Ops) {
362 ID.AddPointer(Ops->getNode());
363 ID.AddInteger(Ops->getResNo());
367 static void AddNodeIDNode(FoldingSetNodeID &ID,
368 unsigned short OpC, SDVTList VTList,
369 const SDValue *OpList, unsigned N) {
370 AddNodeIDOpcode(ID, OpC);
371 AddNodeIDValueTypes(ID, VTList);
372 AddNodeIDOperands(ID, OpList, N);
375 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
377 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
378 switch (N->getOpcode()) {
379 case ISD::TargetExternalSymbol:
380 case ISD::ExternalSymbol:
381 llvm_unreachable("Should only be used on nodes with operands");
382 default: break; // Normal nodes don't need extra info.
383 case ISD::TargetConstant:
385 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
387 case ISD::TargetConstantFP:
388 case ISD::ConstantFP: {
389 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
392 case ISD::TargetGlobalAddress:
393 case ISD::GlobalAddress:
394 case ISD::TargetGlobalTLSAddress:
395 case ISD::GlobalTLSAddress: {
396 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
397 ID.AddPointer(GA->getGlobal());
398 ID.AddInteger(GA->getOffset());
399 ID.AddInteger(GA->getTargetFlags());
400 ID.AddInteger(GA->getAddressSpace());
403 case ISD::BasicBlock:
404 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
407 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
409 case ISD::RegisterMask:
410 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
413 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
415 case ISD::FrameIndex:
416 case ISD::TargetFrameIndex:
417 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
420 case ISD::TargetJumpTable:
421 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
422 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
424 case ISD::ConstantPool:
425 case ISD::TargetConstantPool: {
426 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
427 ID.AddInteger(CP->getAlignment());
428 ID.AddInteger(CP->getOffset());
429 if (CP->isMachineConstantPoolEntry())
430 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
432 ID.AddPointer(CP->getConstVal());
433 ID.AddInteger(CP->getTargetFlags());
436 case ISD::TargetIndex: {
437 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
438 ID.AddInteger(TI->getIndex());
439 ID.AddInteger(TI->getOffset());
440 ID.AddInteger(TI->getTargetFlags());
444 const LoadSDNode *LD = cast<LoadSDNode>(N);
445 ID.AddInteger(LD->getMemoryVT().getRawBits());
446 ID.AddInteger(LD->getRawSubclassData());
447 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
451 const StoreSDNode *ST = cast<StoreSDNode>(N);
452 ID.AddInteger(ST->getMemoryVT().getRawBits());
453 ID.AddInteger(ST->getRawSubclassData());
454 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
457 case ISD::ATOMIC_CMP_SWAP:
458 case ISD::ATOMIC_SWAP:
459 case ISD::ATOMIC_LOAD_ADD:
460 case ISD::ATOMIC_LOAD_SUB:
461 case ISD::ATOMIC_LOAD_AND:
462 case ISD::ATOMIC_LOAD_OR:
463 case ISD::ATOMIC_LOAD_XOR:
464 case ISD::ATOMIC_LOAD_NAND:
465 case ISD::ATOMIC_LOAD_MIN:
466 case ISD::ATOMIC_LOAD_MAX:
467 case ISD::ATOMIC_LOAD_UMIN:
468 case ISD::ATOMIC_LOAD_UMAX:
469 case ISD::ATOMIC_LOAD:
470 case ISD::ATOMIC_STORE: {
471 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
472 ID.AddInteger(AT->getMemoryVT().getRawBits());
473 ID.AddInteger(AT->getRawSubclassData());
474 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
477 case ISD::PREFETCH: {
478 const MemSDNode *PF = cast<MemSDNode>(N);
479 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
482 case ISD::VECTOR_SHUFFLE: {
483 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
484 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
486 ID.AddInteger(SVN->getMaskElt(i));
489 case ISD::TargetBlockAddress:
490 case ISD::BlockAddress: {
491 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
492 ID.AddPointer(BA->getBlockAddress());
493 ID.AddInteger(BA->getOffset());
494 ID.AddInteger(BA->getTargetFlags());
497 } // end switch (N->getOpcode())
499 // Target specific memory nodes could also have address spaces to check.
500 if (N->isTargetMemoryOpcode())
501 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
504 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
506 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
507 AddNodeIDOpcode(ID, N->getOpcode());
508 // Add the return value info.
509 AddNodeIDValueTypes(ID, N->getVTList());
510 // Add the operand info.
511 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
513 // Handle SDNode leafs with special info.
514 AddNodeIDCustom(ID, N);
517 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
518 /// the CSE map that carries volatility, temporalness, indexing mode, and
519 /// extension/truncation information.
521 static inline unsigned
522 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
523 bool isNonTemporal, bool isInvariant) {
524 assert((ConvType & 3) == ConvType &&
525 "ConvType may not require more than 2 bits!");
526 assert((AM & 7) == AM &&
527 "AM may not require more than 3 bits!");
531 (isNonTemporal << 6) |
535 //===----------------------------------------------------------------------===//
536 // SelectionDAG Class
537 //===----------------------------------------------------------------------===//
539 /// doNotCSE - Return true if CSE should not be performed for this node.
540 static bool doNotCSE(SDNode *N) {
541 if (N->getValueType(0) == MVT::Glue)
542 return true; // Never CSE anything that produces a flag.
544 switch (N->getOpcode()) {
546 case ISD::HANDLENODE:
548 return true; // Never CSE these nodes.
551 // Check that remaining values produced are not flags.
552 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
553 if (N->getValueType(i) == MVT::Glue)
554 return true; // Never CSE anything that produces a flag.
559 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
561 void SelectionDAG::RemoveDeadNodes() {
562 // Create a dummy node (which is not added to allnodes), that adds a reference
563 // to the root node, preventing it from being deleted.
564 HandleSDNode Dummy(getRoot());
566 SmallVector<SDNode*, 128> DeadNodes;
568 // Add all obviously-dead nodes to the DeadNodes worklist.
569 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
571 DeadNodes.push_back(I);
573 RemoveDeadNodes(DeadNodes);
575 // If the root changed (e.g. it was a dead load, update the root).
576 setRoot(Dummy.getValue());
579 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
580 /// given list, and any nodes that become unreachable as a result.
581 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
583 // Process the worklist, deleting the nodes and adding their uses to the
585 while (!DeadNodes.empty()) {
586 SDNode *N = DeadNodes.pop_back_val();
588 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
589 DUL->NodeDeleted(N, 0);
591 // Take the node out of the appropriate CSE map.
592 RemoveNodeFromCSEMaps(N);
594 // Next, brutally remove the operand list. This is safe to do, as there are
595 // no cycles in the graph.
596 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
598 SDNode *Operand = Use.getNode();
601 // Now that we removed this operand, see if there are no uses of it left.
602 if (Operand->use_empty())
603 DeadNodes.push_back(Operand);
610 void SelectionDAG::RemoveDeadNode(SDNode *N){
611 SmallVector<SDNode*, 16> DeadNodes(1, N);
613 // Create a dummy node that adds a reference to the root node, preventing
614 // it from being deleted. (This matters if the root is an operand of the
616 HandleSDNode Dummy(getRoot());
618 RemoveDeadNodes(DeadNodes);
621 void SelectionDAG::DeleteNode(SDNode *N) {
622 // First take this out of the appropriate CSE map.
623 RemoveNodeFromCSEMaps(N);
625 // Finally, remove uses due to operands of this node, remove from the
626 // AllNodes list, and delete the node.
627 DeleteNodeNotInCSEMaps(N);
630 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
631 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
632 assert(N->use_empty() && "Cannot delete a node that is not dead!");
634 // Drop all of the operands and decrement used node's use counts.
640 void SelectionDAG::DeallocateNode(SDNode *N) {
641 if (N->OperandsNeedDelete)
642 delete[] N->OperandList;
644 // Set the opcode to DELETED_NODE to help catch bugs when node
645 // memory is reallocated.
646 N->NodeType = ISD::DELETED_NODE;
648 NodeAllocator.Deallocate(AllNodes.remove(N));
650 // Remove the ordering of this node.
653 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
654 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
655 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
656 DbgVals[i]->setIsInvalidated();
659 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
660 /// correspond to it. This is useful when we're about to delete or repurpose
661 /// the node. We don't want future request for structurally identical nodes
662 /// to return N anymore.
663 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
665 switch (N->getOpcode()) {
666 case ISD::HANDLENODE: return false; // noop.
668 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
669 "Cond code doesn't exist!");
670 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
671 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
673 case ISD::ExternalSymbol:
674 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
676 case ISD::TargetExternalSymbol: {
677 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
678 Erased = TargetExternalSymbols.erase(
679 std::pair<std::string,unsigned char>(ESN->getSymbol(),
680 ESN->getTargetFlags()));
683 case ISD::VALUETYPE: {
684 EVT VT = cast<VTSDNode>(N)->getVT();
685 if (VT.isExtended()) {
686 Erased = ExtendedValueTypeNodes.erase(VT);
688 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
689 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
694 // Remove it from the CSE Map.
695 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
696 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
697 Erased = CSEMap.RemoveNode(N);
701 // Verify that the node was actually in one of the CSE maps, unless it has a
702 // flag result (which cannot be CSE'd) or is one of the special cases that are
703 // not subject to CSE.
704 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
705 !N->isMachineOpcode() && !doNotCSE(N)) {
708 llvm_unreachable("Node is not in map!");
714 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
715 /// maps and modified in place. Add it back to the CSE maps, unless an identical
716 /// node already exists, in which case transfer all its users to the existing
717 /// node. This transfer can potentially trigger recursive merging.
720 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
721 // For node types that aren't CSE'd, just act as if no identical node
724 SDNode *Existing = CSEMap.GetOrInsertNode(N);
726 // If there was already an existing matching node, use ReplaceAllUsesWith
727 // to replace the dead one with the existing one. This can cause
728 // recursive merging of other unrelated nodes down the line.
729 ReplaceAllUsesWith(N, Existing);
731 // N is now dead. Inform the listeners and delete it.
732 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
733 DUL->NodeDeleted(N, Existing);
734 DeleteNodeNotInCSEMaps(N);
739 // If the node doesn't already exist, we updated it. Inform listeners.
740 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
744 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
745 /// were replaced with those specified. If this node is never memoized,
746 /// return null, otherwise return a pointer to the slot it would take. If a
747 /// node already exists with these operands, the slot will be non-null.
748 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
753 SDValue Ops[] = { Op };
755 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
756 AddNodeIDCustom(ID, N);
757 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
761 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
762 /// were replaced with those specified. If this node is never memoized,
763 /// return null, otherwise return a pointer to the slot it would take. If a
764 /// node already exists with these operands, the slot will be non-null.
765 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
766 SDValue Op1, SDValue Op2,
771 SDValue Ops[] = { Op1, Op2 };
773 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
774 AddNodeIDCustom(ID, N);
775 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
780 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
781 /// were replaced with those specified. If this node is never memoized,
782 /// return null, otherwise return a pointer to the slot it would take. If a
783 /// node already exists with these operands, the slot will be non-null.
784 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
785 const SDValue *Ops,unsigned NumOps,
791 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
792 AddNodeIDCustom(ID, N);
793 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
798 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
799 static void VerifyNodeCommon(SDNode *N) {
800 switch (N->getOpcode()) {
803 case ISD::BUILD_PAIR: {
804 EVT VT = N->getValueType(0);
805 assert(N->getNumValues() == 1 && "Too many results!");
806 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
807 "Wrong return type!");
808 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
809 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
810 "Mismatched operand types!");
811 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
812 "Wrong operand type!");
813 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
814 "Wrong return type size");
817 case ISD::BUILD_VECTOR: {
818 assert(N->getNumValues() == 1 && "Too many results!");
819 assert(N->getValueType(0).isVector() && "Wrong return type!");
820 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
821 "Wrong number of operands!");
822 EVT EltVT = N->getValueType(0).getVectorElementType();
823 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
824 assert((I->getValueType() == EltVT ||
825 (EltVT.isInteger() && I->getValueType().isInteger() &&
826 EltVT.bitsLE(I->getValueType()))) &&
827 "Wrong operand type!");
828 assert(I->getValueType() == N->getOperand(0).getValueType() &&
829 "Operands must all have the same type");
836 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
837 static void VerifySDNode(SDNode *N) {
838 // The SDNode allocators cannot be used to allocate nodes with fields that are
839 // not present in an SDNode!
840 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
841 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
842 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
843 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
844 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
845 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
846 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
847 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
848 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
849 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
850 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
851 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
852 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
853 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
854 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
855 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
856 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
857 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
858 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
863 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
865 static void VerifyMachineNode(SDNode *N) {
866 // The MachineNode allocators cannot be used to allocate nodes with fields
867 // that are not present in a MachineNode!
868 // Currently there are no such nodes.
874 /// getEVTAlignment - Compute the default alignment value for the
877 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
878 Type *Ty = VT == MVT::iPTR ?
879 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
880 VT.getTypeForEVT(*getContext());
882 return TLI.getDataLayout()->getABITypeAlignment(Ty);
885 // EntryNode could meaningfully have debug info if we can find it...
886 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
887 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
888 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(),
889 getVTList(MVT::Other)),
890 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
891 AllNodes.push_back(&EntryNode);
892 Ordering = new SDNodeOrdering();
893 DbgInfo = new SDDbgInfo();
896 void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) {
899 Context = &mf.getFunction()->getContext();
902 SelectionDAG::~SelectionDAG() {
903 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
909 void SelectionDAG::allnodes_clear() {
910 assert(&*AllNodes.begin() == &EntryNode);
911 AllNodes.remove(AllNodes.begin());
912 while (!AllNodes.empty())
913 DeallocateNode(AllNodes.begin());
916 void SelectionDAG::clear() {
918 OperandAllocator.Reset();
921 ExtendedValueTypeNodes.clear();
922 ExternalSymbols.clear();
923 TargetExternalSymbols.clear();
924 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
925 static_cast<CondCodeSDNode*>(0));
926 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
927 static_cast<SDNode*>(0));
929 EntryNode.UseList = 0;
930 AllNodes.push_back(&EntryNode);
931 Root = getEntryNode();
936 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
937 return VT.bitsGT(Op.getValueType()) ?
938 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
939 getNode(ISD::TRUNCATE, DL, VT, Op);
942 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
943 return VT.bitsGT(Op.getValueType()) ?
944 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
945 getNode(ISD::TRUNCATE, DL, VT, Op);
948 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
949 return VT.bitsGT(Op.getValueType()) ?
950 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
951 getNode(ISD::TRUNCATE, DL, VT, Op);
954 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
955 assert(!VT.isVector() &&
956 "getZeroExtendInReg should use the vector element type instead of "
958 if (Op.getValueType() == VT) return Op;
959 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
960 APInt Imm = APInt::getLowBitsSet(BitWidth,
962 return getNode(ISD::AND, DL, Op.getValueType(), Op,
963 getConstant(Imm, Op.getValueType()));
966 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
968 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
969 EVT EltVT = VT.getScalarType();
971 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
972 return getNode(ISD::XOR, DL, VT, Val, NegOne);
975 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
976 EVT EltVT = VT.getScalarType();
977 assert((EltVT.getSizeInBits() >= 64 ||
978 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
979 "getConstant with a uint64_t value that doesn't fit in the type!");
980 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
983 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
984 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
987 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
988 assert(VT.isInteger() && "Cannot create FP integer constant!");
990 EVT EltVT = VT.getScalarType();
991 const ConstantInt *Elt = &Val;
993 // In some cases the vector type is legal but the element type is illegal and
994 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
995 // inserted value (the type does not need to match the vector element type).
996 // Any extra bits introduced will be truncated away.
997 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
998 TargetLowering::TypePromoteInteger) {
999 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
1000 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1001 Elt = ConstantInt::get(*getContext(), NewVal);
1004 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1005 "APInt size does not match type size!");
1006 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1007 FoldingSetNodeID ID;
1008 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1012 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1014 return SDValue(N, 0);
1017 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1018 CSEMap.InsertNode(N, IP);
1019 AllNodes.push_back(N);
1022 SDValue Result(N, 0);
1023 if (VT.isVector()) {
1024 SmallVector<SDValue, 8> Ops;
1025 Ops.assign(VT.getVectorNumElements(), Result);
1026 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1031 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1032 return getConstant(Val, TLI.getPointerTy(), isTarget);
1036 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1037 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1040 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1041 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1043 EVT EltVT = VT.getScalarType();
1045 // Do the map lookup using the actual bit pattern for the floating point
1046 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1047 // we don't have issues with SNANs.
1048 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1049 FoldingSetNodeID ID;
1050 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1054 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1056 return SDValue(N, 0);
1059 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1060 CSEMap.InsertNode(N, IP);
1061 AllNodes.push_back(N);
1064 SDValue Result(N, 0);
1065 if (VT.isVector()) {
1066 SmallVector<SDValue, 8> Ops;
1067 Ops.assign(VT.getVectorNumElements(), Result);
1068 // FIXME DebugLoc info might be appropriate here
1069 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1074 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1075 EVT EltVT = VT.getScalarType();
1076 if (EltVT==MVT::f32)
1077 return getConstantFP(APFloat((float)Val), VT, isTarget);
1078 else if (EltVT==MVT::f64)
1079 return getConstantFP(APFloat(Val), VT, isTarget);
1080 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1083 APFloat apf = APFloat(Val);
1084 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1086 return getConstantFP(apf, VT, isTarget);
1088 llvm_unreachable("Unsupported type in getConstantFP");
1091 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1092 EVT VT, int64_t Offset,
1094 unsigned char TargetFlags) {
1095 assert((TargetFlags == 0 || isTargetGA) &&
1096 "Cannot set target flags on target-independent globals");
1098 // Truncate (with sign-extension) the offset value to the pointer size.
1099 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1101 Offset = SignExtend64(Offset, BitWidth);
1103 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1105 // If GV is an alias then use the aliasee for determining thread-localness.
1106 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1107 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1111 if (GVar && GVar->isThreadLocal())
1112 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1114 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1116 FoldingSetNodeID ID;
1117 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1119 ID.AddInteger(Offset);
1120 ID.AddInteger(TargetFlags);
1121 ID.AddInteger(GV->getType()->getAddressSpace());
1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1124 return SDValue(E, 0);
1126 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1127 Offset, TargetFlags);
1128 CSEMap.InsertNode(N, IP);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1134 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1135 FoldingSetNodeID ID;
1136 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1143 CSEMap.InsertNode(N, IP);
1144 AllNodes.push_back(N);
1145 return SDValue(N, 0);
1148 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1149 unsigned char TargetFlags) {
1150 assert((TargetFlags == 0 || isTarget) &&
1151 "Cannot set target flags on target-independent jump tables");
1152 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1153 FoldingSetNodeID ID;
1154 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1156 ID.AddInteger(TargetFlags);
1158 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1159 return SDValue(E, 0);
1161 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1163 CSEMap.InsertNode(N, IP);
1164 AllNodes.push_back(N);
1165 return SDValue(N, 0);
1168 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1169 unsigned Alignment, int Offset,
1171 unsigned char TargetFlags) {
1172 assert((TargetFlags == 0 || isTarget) &&
1173 "Cannot set target flags on target-independent globals");
1175 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1176 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1177 FoldingSetNodeID ID;
1178 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1179 ID.AddInteger(Alignment);
1180 ID.AddInteger(Offset);
1182 ID.AddInteger(TargetFlags);
1184 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1185 return SDValue(E, 0);
1187 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1188 Alignment, TargetFlags);
1189 CSEMap.InsertNode(N, IP);
1190 AllNodes.push_back(N);
1191 return SDValue(N, 0);
1195 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1196 unsigned Alignment, int Offset,
1198 unsigned char TargetFlags) {
1199 assert((TargetFlags == 0 || isTarget) &&
1200 "Cannot set target flags on target-independent globals");
1202 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1203 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1204 FoldingSetNodeID ID;
1205 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1206 ID.AddInteger(Alignment);
1207 ID.AddInteger(Offset);
1208 C->addSelectionDAGCSEId(ID);
1209 ID.AddInteger(TargetFlags);
1211 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1212 return SDValue(E, 0);
1214 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1215 Alignment, TargetFlags);
1216 CSEMap.InsertNode(N, IP);
1217 AllNodes.push_back(N);
1218 return SDValue(N, 0);
1221 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1222 unsigned char TargetFlags) {
1223 FoldingSetNodeID ID;
1224 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1225 ID.AddInteger(Index);
1226 ID.AddInteger(Offset);
1227 ID.AddInteger(TargetFlags);
1229 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1230 return SDValue(E, 0);
1232 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1234 CSEMap.InsertNode(N, IP);
1235 AllNodes.push_back(N);
1236 return SDValue(N, 0);
1239 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1240 FoldingSetNodeID ID;
1241 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1244 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1245 return SDValue(E, 0);
1247 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1248 CSEMap.InsertNode(N, IP);
1249 AllNodes.push_back(N);
1250 return SDValue(N, 0);
1253 SDValue SelectionDAG::getValueType(EVT VT) {
1254 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1255 ValueTypeNodes.size())
1256 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1258 SDNode *&N = VT.isExtended() ?
1259 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1261 if (N) return SDValue(N, 0);
1262 N = new (NodeAllocator) VTSDNode(VT);
1263 AllNodes.push_back(N);
1264 return SDValue(N, 0);
1267 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1268 SDNode *&N = ExternalSymbols[Sym];
1269 if (N) return SDValue(N, 0);
1270 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1271 AllNodes.push_back(N);
1272 return SDValue(N, 0);
1275 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1276 unsigned char TargetFlags) {
1278 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1280 if (N) return SDValue(N, 0);
1281 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1282 AllNodes.push_back(N);
1283 return SDValue(N, 0);
1286 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1287 if ((unsigned)Cond >= CondCodeNodes.size())
1288 CondCodeNodes.resize(Cond+1);
1290 if (CondCodeNodes[Cond] == 0) {
1291 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1292 CondCodeNodes[Cond] = N;
1293 AllNodes.push_back(N);
1296 return SDValue(CondCodeNodes[Cond], 0);
1299 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1300 // the shuffle mask M that point at N1 to point at N2, and indices that point
1301 // N2 to point at N1.
1302 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1304 int NElts = M.size();
1305 for (int i = 0; i != NElts; ++i) {
1313 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1314 SDValue N2, const int *Mask) {
1315 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1316 assert(VT.isVector() && N1.getValueType().isVector() &&
1317 "Vector Shuffle VTs must be a vectors");
1318 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1319 && "Vector Shuffle VTs must have same element type");
1321 // Canonicalize shuffle undef, undef -> undef
1322 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1323 return getUNDEF(VT);
1325 // Validate that all indices in Mask are within the range of the elements
1326 // input to the shuffle.
1327 unsigned NElts = VT.getVectorNumElements();
1328 SmallVector<int, 8> MaskVec;
1329 for (unsigned i = 0; i != NElts; ++i) {
1330 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1331 MaskVec.push_back(Mask[i]);
1334 // Canonicalize shuffle v, v -> v, undef
1337 for (unsigned i = 0; i != NElts; ++i)
1338 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1341 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1342 if (N1.getOpcode() == ISD::UNDEF)
1343 commuteShuffle(N1, N2, MaskVec);
1345 // Canonicalize all index into lhs, -> shuffle lhs, undef
1346 // Canonicalize all index into rhs, -> shuffle rhs, undef
1347 bool AllLHS = true, AllRHS = true;
1348 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1349 for (unsigned i = 0; i != NElts; ++i) {
1350 if (MaskVec[i] >= (int)NElts) {
1355 } else if (MaskVec[i] >= 0) {
1359 if (AllLHS && AllRHS)
1360 return getUNDEF(VT);
1361 if (AllLHS && !N2Undef)
1365 commuteShuffle(N1, N2, MaskVec);
1368 // If Identity shuffle, or all shuffle in to undef, return that node.
1369 bool AllUndef = true;
1370 bool Identity = true;
1371 for (unsigned i = 0; i != NElts; ++i) {
1372 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1373 if (MaskVec[i] >= 0) AllUndef = false;
1375 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1378 return getUNDEF(VT);
1380 FoldingSetNodeID ID;
1381 SDValue Ops[2] = { N1, N2 };
1382 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1383 for (unsigned i = 0; i != NElts; ++i)
1384 ID.AddInteger(MaskVec[i]);
1387 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1388 return SDValue(E, 0);
1390 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1391 // SDNode doesn't have access to it. This memory will be "leaked" when
1392 // the node is deallocated, but recovered when the NodeAllocator is released.
1393 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1394 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1396 ShuffleVectorSDNode *N =
1397 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1398 CSEMap.InsertNode(N, IP);
1399 AllNodes.push_back(N);
1400 return SDValue(N, 0);
1403 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1404 SDValue Val, SDValue DTy,
1405 SDValue STy, SDValue Rnd, SDValue Sat,
1406 ISD::CvtCode Code) {
1407 // If the src and dest types are the same and the conversion is between
1408 // integer types of the same sign or two floats, no conversion is necessary.
1410 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1413 FoldingSetNodeID ID;
1414 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1415 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1417 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1418 return SDValue(E, 0);
1420 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1422 CSEMap.InsertNode(N, IP);
1423 AllNodes.push_back(N);
1424 return SDValue(N, 0);
1427 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1428 FoldingSetNodeID ID;
1429 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1430 ID.AddInteger(RegNo);
1432 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1433 return SDValue(E, 0);
1435 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1436 CSEMap.InsertNode(N, IP);
1437 AllNodes.push_back(N);
1438 return SDValue(N, 0);
1441 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1442 FoldingSetNodeID ID;
1443 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1444 ID.AddPointer(RegMask);
1446 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1447 return SDValue(E, 0);
1449 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1450 CSEMap.InsertNode(N, IP);
1451 AllNodes.push_back(N);
1452 return SDValue(N, 0);
1455 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1456 FoldingSetNodeID ID;
1457 SDValue Ops[] = { Root };
1458 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1459 ID.AddPointer(Label);
1461 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1462 return SDValue(E, 0);
1464 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1465 CSEMap.InsertNode(N, IP);
1466 AllNodes.push_back(N);
1467 return SDValue(N, 0);
1471 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1474 unsigned char TargetFlags) {
1475 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1477 FoldingSetNodeID ID;
1478 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1480 ID.AddInteger(Offset);
1481 ID.AddInteger(TargetFlags);
1483 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1484 return SDValue(E, 0);
1486 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1488 CSEMap.InsertNode(N, IP);
1489 AllNodes.push_back(N);
1490 return SDValue(N, 0);
1493 SDValue SelectionDAG::getSrcValue(const Value *V) {
1494 assert((!V || V->getType()->isPointerTy()) &&
1495 "SrcValue is not a pointer?");
1497 FoldingSetNodeID ID;
1498 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1502 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1503 return SDValue(E, 0);
1505 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1506 CSEMap.InsertNode(N, IP);
1507 AllNodes.push_back(N);
1508 return SDValue(N, 0);
1511 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1512 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1513 FoldingSetNodeID ID;
1514 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1518 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1519 return SDValue(E, 0);
1521 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1522 CSEMap.InsertNode(N, IP);
1523 AllNodes.push_back(N);
1524 return SDValue(N, 0);
1528 /// getShiftAmountOperand - Return the specified value casted to
1529 /// the target's desired shift amount type.
1530 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1531 EVT OpTy = Op.getValueType();
1532 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1533 if (OpTy == ShTy || OpTy.isVector()) return Op;
1535 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1536 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1539 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1540 /// specified value type.
1541 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1542 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1543 unsigned ByteSize = VT.getStoreSize();
1544 Type *Ty = VT.getTypeForEVT(*getContext());
1545 unsigned StackAlign =
1546 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1548 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1549 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1552 /// CreateStackTemporary - Create a stack temporary suitable for holding
1553 /// either of the specified value types.
1554 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1555 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1556 VT2.getStoreSizeInBits())/8;
1557 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1558 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1559 const DataLayout *TD = TLI.getDataLayout();
1560 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1561 TD->getPrefTypeAlignment(Ty2));
1563 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1564 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1565 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1568 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1569 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1570 // These setcc operations always fold.
1574 case ISD::SETFALSE2: return getConstant(0, VT);
1576 case ISD::SETTRUE2: return getConstant(1, VT);
1588 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1592 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1593 const APInt &C2 = N2C->getAPIntValue();
1594 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1595 const APInt &C1 = N1C->getAPIntValue();
1598 default: llvm_unreachable("Unknown integer setcc!");
1599 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1600 case ISD::SETNE: return getConstant(C1 != C2, VT);
1601 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1602 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1603 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1604 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1605 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1606 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1607 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1608 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1612 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1613 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1614 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1617 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1618 return getUNDEF(VT);
1620 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1621 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1622 return getUNDEF(VT);
1624 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1625 R==APFloat::cmpLessThan, VT);
1626 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1629 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1630 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1631 return getUNDEF(VT);
1633 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1634 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1635 return getUNDEF(VT);
1637 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1638 R==APFloat::cmpEqual, VT);
1639 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1640 return getUNDEF(VT);
1642 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1645 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1646 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1647 R==APFloat::cmpEqual, VT);
1648 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1649 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1650 R==APFloat::cmpLessThan, VT);
1651 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1652 R==APFloat::cmpUnordered, VT);
1653 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1654 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1657 // Ensure that the constant occurs on the RHS.
1658 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1662 // Could not fold it.
1666 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1667 /// use this predicate to simplify operations downstream.
1668 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1669 // This predicate is not safe for vector operations.
1670 if (Op.getValueType().isVector())
1673 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1674 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1677 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1678 /// this predicate to simplify operations downstream. Mask is known to be zero
1679 /// for bits that V cannot have.
1680 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1681 unsigned Depth) const {
1682 APInt KnownZero, KnownOne;
1683 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1684 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1685 return (KnownZero & Mask) == Mask;
1688 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1689 /// known to be either zero or one and return them in the KnownZero/KnownOne
1690 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1692 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1693 APInt &KnownOne, unsigned Depth) const {
1694 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1696 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1698 return; // Limit search depth.
1700 APInt KnownZero2, KnownOne2;
1702 switch (Op.getOpcode()) {
1704 // We know all of the bits for a constant!
1705 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1706 KnownZero = ~KnownOne;
1709 // If either the LHS or the RHS are Zero, the result is zero.
1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1715 // Output known-1 bits are only known if set in both the LHS & RHS.
1716 KnownOne &= KnownOne2;
1717 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1718 KnownZero |= KnownZero2;
1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1726 // Output known-0 bits are only known if clear in both the LHS & RHS.
1727 KnownZero &= KnownZero2;
1728 // Output known-1 are known to be set if set in either the LHS | RHS.
1729 KnownOne |= KnownOne2;
1732 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1733 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1734 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1735 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1737 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1738 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1739 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1740 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1741 KnownZero = KnownZeroOut;
1745 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1746 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1747 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1748 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1750 // If low bits are zero in either operand, output low known-0 bits.
1751 // Also compute a conserative estimate for high known-0 bits.
1752 // More trickiness is possible, but this is sufficient for the
1753 // interesting case of alignment computation.
1754 KnownOne.clearAllBits();
1755 unsigned TrailZ = KnownZero.countTrailingOnes() +
1756 KnownZero2.countTrailingOnes();
1757 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1758 KnownZero2.countLeadingOnes(),
1759 BitWidth) - BitWidth;
1761 TrailZ = std::min(TrailZ, BitWidth);
1762 LeadZ = std::min(LeadZ, BitWidth);
1763 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1764 APInt::getHighBitsSet(BitWidth, LeadZ);
1768 // For the purposes of computing leading zeros we can conservatively
1769 // treat a udiv as a logical right shift by the power of 2 known to
1770 // be less than the denominator.
1771 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1772 unsigned LeadZ = KnownZero2.countLeadingOnes();
1774 KnownOne2.clearAllBits();
1775 KnownZero2.clearAllBits();
1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1777 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1778 if (RHSUnknownLeadingOnes != BitWidth)
1779 LeadZ = std::min(BitWidth,
1780 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1782 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1786 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1787 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1788 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1789 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1791 // Only known if known in both the LHS and RHS.
1792 KnownOne &= KnownOne2;
1793 KnownZero &= KnownZero2;
1795 case ISD::SELECT_CC:
1796 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1797 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1798 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1799 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1801 // Only known if known in both the LHS and RHS.
1802 KnownOne &= KnownOne2;
1803 KnownZero &= KnownZero2;
1811 if (Op.getResNo() != 1)
1813 // The boolean result conforms to getBooleanContents. Fall through.
1815 // If we know the result of a setcc has the top bits zero, use this info.
1816 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1817 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1818 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1821 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1822 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1823 unsigned ShAmt = SA->getZExtValue();
1825 // If the shift count is an invalid immediate, don't do anything.
1826 if (ShAmt >= BitWidth)
1829 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1830 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1831 KnownZero <<= ShAmt;
1833 // low bits known zero.
1834 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1838 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1839 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1840 unsigned ShAmt = SA->getZExtValue();
1842 // If the shift count is an invalid immediate, don't do anything.
1843 if (ShAmt >= BitWidth)
1846 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1847 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1848 KnownZero = KnownZero.lshr(ShAmt);
1849 KnownOne = KnownOne.lshr(ShAmt);
1851 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1852 KnownZero |= HighBits; // High bits known zero.
1856 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1857 unsigned ShAmt = SA->getZExtValue();
1859 // If the shift count is an invalid immediate, don't do anything.
1860 if (ShAmt >= BitWidth)
1863 // If any of the demanded bits are produced by the sign extension, we also
1864 // demand the input sign bit.
1865 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1867 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1868 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1869 KnownZero = KnownZero.lshr(ShAmt);
1870 KnownOne = KnownOne.lshr(ShAmt);
1872 // Handle the sign bits.
1873 APInt SignBit = APInt::getSignBit(BitWidth);
1874 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1876 if (KnownZero.intersects(SignBit)) {
1877 KnownZero |= HighBits; // New bits are known zero.
1878 } else if (KnownOne.intersects(SignBit)) {
1879 KnownOne |= HighBits; // New bits are known one.
1883 case ISD::SIGN_EXTEND_INREG: {
1884 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1885 unsigned EBits = EVT.getScalarType().getSizeInBits();
1887 // Sign extension. Compute the demanded bits in the result that are not
1888 // present in the input.
1889 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1891 APInt InSignBit = APInt::getSignBit(EBits);
1892 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1894 // If the sign extended bits are demanded, we know that the sign
1896 InSignBit = InSignBit.zext(BitWidth);
1897 if (NewBits.getBoolValue())
1898 InputDemandedBits |= InSignBit;
1900 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1901 KnownOne &= InputDemandedBits;
1902 KnownZero &= InputDemandedBits;
1903 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1905 // If the sign bit of the input is known set or clear, then we know the
1906 // top bits of the result.
1907 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1908 KnownZero |= NewBits;
1909 KnownOne &= ~NewBits;
1910 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1911 KnownOne |= NewBits;
1912 KnownZero &= ~NewBits;
1913 } else { // Input sign bit unknown
1914 KnownZero &= ~NewBits;
1915 KnownOne &= ~NewBits;
1920 case ISD::CTTZ_ZERO_UNDEF:
1922 case ISD::CTLZ_ZERO_UNDEF:
1924 unsigned LowBits = Log2_32(BitWidth)+1;
1925 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1926 KnownOne.clearAllBits();
1930 LoadSDNode *LD = cast<LoadSDNode>(Op);
1931 if (ISD::isZEXTLoad(Op.getNode())) {
1932 EVT VT = LD->getMemoryVT();
1933 unsigned MemBits = VT.getScalarType().getSizeInBits();
1934 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1935 } else if (const MDNode *Ranges = LD->getRanges()) {
1936 computeMaskedBitsLoad(*Ranges, KnownZero);
1940 case ISD::ZERO_EXTEND: {
1941 EVT InVT = Op.getOperand(0).getValueType();
1942 unsigned InBits = InVT.getScalarType().getSizeInBits();
1943 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1944 KnownZero = KnownZero.trunc(InBits);
1945 KnownOne = KnownOne.trunc(InBits);
1946 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1947 KnownZero = KnownZero.zext(BitWidth);
1948 KnownOne = KnownOne.zext(BitWidth);
1949 KnownZero |= NewBits;
1952 case ISD::SIGN_EXTEND: {
1953 EVT InVT = Op.getOperand(0).getValueType();
1954 unsigned InBits = InVT.getScalarType().getSizeInBits();
1955 APInt InSignBit = APInt::getSignBit(InBits);
1956 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1958 KnownZero = KnownZero.trunc(InBits);
1959 KnownOne = KnownOne.trunc(InBits);
1960 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1962 // Note if the sign bit is known to be zero or one.
1963 bool SignBitKnownZero = KnownZero.isNegative();
1964 bool SignBitKnownOne = KnownOne.isNegative();
1965 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1966 "Sign bit can't be known to be both zero and one!");
1968 KnownZero = KnownZero.zext(BitWidth);
1969 KnownOne = KnownOne.zext(BitWidth);
1971 // If the sign bit is known zero or one, the top bits match.
1972 if (SignBitKnownZero)
1973 KnownZero |= NewBits;
1974 else if (SignBitKnownOne)
1975 KnownOne |= NewBits;
1978 case ISD::ANY_EXTEND: {
1979 EVT InVT = Op.getOperand(0).getValueType();
1980 unsigned InBits = InVT.getScalarType().getSizeInBits();
1981 KnownZero = KnownZero.trunc(InBits);
1982 KnownOne = KnownOne.trunc(InBits);
1983 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1984 KnownZero = KnownZero.zext(BitWidth);
1985 KnownOne = KnownOne.zext(BitWidth);
1988 case ISD::TRUNCATE: {
1989 EVT InVT = Op.getOperand(0).getValueType();
1990 unsigned InBits = InVT.getScalarType().getSizeInBits();
1991 KnownZero = KnownZero.zext(InBits);
1992 KnownOne = KnownOne.zext(InBits);
1993 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1994 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1995 KnownZero = KnownZero.trunc(BitWidth);
1996 KnownOne = KnownOne.trunc(BitWidth);
1999 case ISD::AssertZext: {
2000 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2001 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2002 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2003 KnownZero |= (~InMask);
2004 KnownOne &= (~KnownZero);
2008 // All bits are zero except the low bit.
2009 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2013 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2014 // We know that the top bits of C-X are clear if X contains less bits
2015 // than C (i.e. no wrap-around can happen). For example, 20-X is
2016 // positive if we can prove that X is >= 0 and < 16.
2017 if (CLHS->getAPIntValue().isNonNegative()) {
2018 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2019 // NLZ can't be BitWidth with no sign bit
2020 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2021 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2023 // If all of the MaskV bits are known to be zero, then we know the
2024 // output top bits are zero, because we now know that the output is
2026 if ((KnownZero2 & MaskV) == MaskV) {
2027 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2028 // Top bits known zero.
2029 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2037 // Output known-0 bits are known if clear or set in both the low clear bits
2038 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2039 // low 3 bits clear.
2040 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2041 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2042 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2044 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2045 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2046 KnownZeroOut = std::min(KnownZeroOut,
2047 KnownZero2.countTrailingOnes());
2049 if (Op.getOpcode() == ISD::ADD) {
2050 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2054 // With ADDE, a carry bit may be added in, so we can only use this
2055 // information if we know (at least) that the low two bits are clear. We
2056 // then return to the caller that the low bit is unknown but that other bits
2058 if (KnownZeroOut >= 2) // ADDE
2059 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2063 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2064 const APInt &RA = Rem->getAPIntValue().abs();
2065 if (RA.isPowerOf2()) {
2066 APInt LowBits = RA - 1;
2067 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2068 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2070 // The low bits of the first operand are unchanged by the srem.
2071 KnownZero = KnownZero2 & LowBits;
2072 KnownOne = KnownOne2 & LowBits;
2074 // If the first operand is non-negative or has all low bits zero, then
2075 // the upper bits are all zero.
2076 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2077 KnownZero |= ~LowBits;
2079 // If the first operand is negative and not all low bits are zero, then
2080 // the upper bits are all one.
2081 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2082 KnownOne |= ~LowBits;
2083 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2088 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2089 const APInt &RA = Rem->getAPIntValue();
2090 if (RA.isPowerOf2()) {
2091 APInt LowBits = (RA - 1);
2092 KnownZero |= ~LowBits;
2093 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2094 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2099 // Since the result is less than or equal to either operand, any leading
2100 // zero bits in either operand must also exist in the result.
2101 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2102 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2104 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2105 KnownZero2.countLeadingOnes());
2106 KnownOne.clearAllBits();
2107 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2110 case ISD::FrameIndex:
2111 case ISD::TargetFrameIndex:
2112 if (unsigned Align = InferPtrAlignment(Op)) {
2113 // The low bits are known zero if the pointer is aligned.
2114 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2120 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2123 case ISD::INTRINSIC_WO_CHAIN:
2124 case ISD::INTRINSIC_W_CHAIN:
2125 case ISD::INTRINSIC_VOID:
2126 // Allow the target to implement this method for its nodes.
2127 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2132 /// ComputeNumSignBits - Return the number of times the sign bit of the
2133 /// register is replicated into the other bits. We know that at least 1 bit
2134 /// is always equal to the sign bit (itself), but other cases can give us
2135 /// information. For example, immediately after an "SRA X, 2", we know that
2136 /// the top 3 bits are all equal to each other, so we return 3.
2137 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2138 EVT VT = Op.getValueType();
2139 assert(VT.isInteger() && "Invalid VT!");
2140 unsigned VTBits = VT.getScalarType().getSizeInBits();
2142 unsigned FirstAnswer = 1;
2145 return 1; // Limit search depth.
2147 switch (Op.getOpcode()) {
2149 case ISD::AssertSext:
2150 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2151 return VTBits-Tmp+1;
2152 case ISD::AssertZext:
2153 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2156 case ISD::Constant: {
2157 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2158 return Val.getNumSignBits();
2161 case ISD::SIGN_EXTEND:
2162 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2163 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2165 case ISD::SIGN_EXTEND_INREG:
2166 // Max of the input and what this extends.
2168 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2171 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2172 return std::max(Tmp, Tmp2);
2175 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2176 // SRA X, C -> adds C sign bits.
2177 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2178 Tmp += C->getZExtValue();
2179 if (Tmp > VTBits) Tmp = VTBits;
2183 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2184 // shl destroys sign bits.
2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2186 if (C->getZExtValue() >= VTBits || // Bad shift.
2187 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2188 return Tmp - C->getZExtValue();
2193 case ISD::XOR: // NOT is handled here.
2194 // Logical binary ops preserve the number of sign bits at the worst.
2195 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2197 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2198 FirstAnswer = std::min(Tmp, Tmp2);
2199 // We computed what we know about the sign bits as our first
2200 // answer. Now proceed to the generic code that uses
2201 // ComputeMaskedBits, and pick whichever answer is better.
2206 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2207 if (Tmp == 1) return 1; // Early out.
2208 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2209 return std::min(Tmp, Tmp2);
2217 if (Op.getResNo() != 1)
2219 // The boolean result conforms to getBooleanContents. Fall through.
2221 // If setcc returns 0/-1, all bits are sign bits.
2222 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2223 TargetLowering::ZeroOrNegativeOneBooleanContent)
2228 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2229 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2231 // Handle rotate right by N like a rotate left by 32-N.
2232 if (Op.getOpcode() == ISD::ROTR)
2233 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2235 // If we aren't rotating out all of the known-in sign bits, return the
2236 // number that are left. This handles rotl(sext(x), 1) for example.
2237 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2238 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2242 // Add can have at most one carry bit. Thus we know that the output
2243 // is, at worst, one more bit than the inputs.
2244 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2245 if (Tmp == 1) return 1; // Early out.
2247 // Special case decrementing a value (ADD X, -1):
2248 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2249 if (CRHS->isAllOnesValue()) {
2250 APInt KnownZero, KnownOne;
2251 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2253 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2255 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2258 // If we are subtracting one from a positive number, there is no carry
2259 // out of the result.
2260 if (KnownZero.isNegative())
2264 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2265 if (Tmp2 == 1) return 1;
2266 return std::min(Tmp, Tmp2)-1;
2269 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2270 if (Tmp2 == 1) return 1;
2273 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2274 if (CLHS->isNullValue()) {
2275 APInt KnownZero, KnownOne;
2276 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2277 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2279 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2282 // If the input is known to be positive (the sign bit is known clear),
2283 // the output of the NEG has the same number of sign bits as the input.
2284 if (KnownZero.isNegative())
2287 // Otherwise, we treat this like a SUB.
2290 // Sub can have at most one carry bit. Thus we know that the output
2291 // is, at worst, one more bit than the inputs.
2292 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2293 if (Tmp == 1) return 1; // Early out.
2294 return std::min(Tmp, Tmp2)-1;
2296 // FIXME: it's tricky to do anything useful for this, but it is an important
2297 // case for targets like X86.
2301 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2302 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2303 unsigned ExtType = LD->getExtensionType();
2306 case ISD::SEXTLOAD: // '17' bits known
2307 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2308 return VTBits-Tmp+1;
2309 case ISD::ZEXTLOAD: // '16' bits known
2310 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2315 // Allow the target to implement this method for its nodes.
2316 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2317 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2318 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2319 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2320 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2321 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2324 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2325 // use this information.
2326 APInt KnownZero, KnownOne;
2327 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2330 if (KnownZero.isNegative()) { // sign bit is 0
2332 } else if (KnownOne.isNegative()) { // sign bit is 1;
2339 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2340 // the number of identical bits in the top of the input value.
2342 Mask <<= Mask.getBitWidth()-VTBits;
2343 // Return # leading zeros. We use 'min' here in case Val was zero before
2344 // shifting. We don't want to return '64' as for an i32 "0".
2345 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2348 /// isBaseWithConstantOffset - Return true if the specified operand is an
2349 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2350 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2351 /// semantics as an ADD. This handles the equivalence:
2352 /// X|Cst == X+Cst iff X&Cst = 0.
2353 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2354 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2355 !isa<ConstantSDNode>(Op.getOperand(1)))
2358 if (Op.getOpcode() == ISD::OR &&
2359 !MaskedValueIsZero(Op.getOperand(0),
2360 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2367 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2368 // If we're told that NaNs won't happen, assume they won't.
2369 if (getTarget().Options.NoNaNsFPMath)
2372 // If the value is a constant, we can obviously see if it is a NaN or not.
2373 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2374 return !C->getValueAPF().isNaN();
2376 // TODO: Recognize more cases here.
2381 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2382 // If the value is a constant, we can obviously see if it is a zero or not.
2383 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2384 return !C->isZero();
2386 // TODO: Recognize more cases here.
2387 switch (Op.getOpcode()) {
2390 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2391 return !C->isNullValue();
2398 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2399 // Check the obvious case.
2400 if (A == B) return true;
2402 // For for negative and positive zero.
2403 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2404 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2405 if (CA->isZero() && CB->isZero()) return true;
2407 // Otherwise they may not be equal.
2411 /// getNode - Gets or creates the specified node.
2413 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2414 FoldingSetNodeID ID;
2415 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2417 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2418 return SDValue(E, 0);
2420 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2421 CSEMap.InsertNode(N, IP);
2423 AllNodes.push_back(N);
2427 return SDValue(N, 0);
2430 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2431 EVT VT, SDValue Operand) {
2432 // Constant fold unary operations with an integer constant operand.
2433 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2434 const APInt &Val = C->getAPIntValue();
2437 case ISD::SIGN_EXTEND:
2438 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2439 case ISD::ANY_EXTEND:
2440 case ISD::ZERO_EXTEND:
2442 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2443 case ISD::UINT_TO_FP:
2444 case ISD::SINT_TO_FP: {
2445 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2446 (void)apf.convertFromAPInt(Val,
2447 Opcode==ISD::SINT_TO_FP,
2448 APFloat::rmNearestTiesToEven);
2449 return getConstantFP(apf, VT);
2452 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2453 return getConstantFP(APFloat(Val), VT);
2454 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2455 return getConstantFP(APFloat(Val), VT);
2458 return getConstant(Val.byteSwap(), VT);
2460 return getConstant(Val.countPopulation(), VT);
2462 case ISD::CTLZ_ZERO_UNDEF:
2463 return getConstant(Val.countLeadingZeros(), VT);
2465 case ISD::CTTZ_ZERO_UNDEF:
2466 return getConstant(Val.countTrailingZeros(), VT);
2470 // Constant fold unary operations with a floating point constant operand.
2471 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2472 APFloat V = C->getValueAPF(); // make copy
2476 return getConstantFP(V, VT);
2479 return getConstantFP(V, VT);
2481 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2482 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2483 return getConstantFP(V, VT);
2487 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2488 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2489 return getConstantFP(V, VT);
2493 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2494 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2495 return getConstantFP(V, VT);
2498 case ISD::FP_EXTEND: {
2500 // This can return overflow, underflow, or inexact; we don't care.
2501 // FIXME need to be more flexible about rounding mode.
2502 (void)V.convert(*EVTToAPFloatSemantics(VT),
2503 APFloat::rmNearestTiesToEven, &ignored);
2504 return getConstantFP(V, VT);
2506 case ISD::FP_TO_SINT:
2507 case ISD::FP_TO_UINT: {
2510 assert(integerPartWidth >= 64);
2511 // FIXME need to be more flexible about rounding mode.
2512 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2513 Opcode==ISD::FP_TO_SINT,
2514 APFloat::rmTowardZero, &ignored);
2515 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2517 APInt api(VT.getSizeInBits(), x);
2518 return getConstant(api, VT);
2521 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2522 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2523 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2524 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2529 unsigned OpOpcode = Operand.getNode()->getOpcode();
2531 case ISD::TokenFactor:
2532 case ISD::MERGE_VALUES:
2533 case ISD::CONCAT_VECTORS:
2534 return Operand; // Factor, merge or concat of one node? No need.
2535 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2536 case ISD::FP_EXTEND:
2537 assert(VT.isFloatingPoint() &&
2538 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2539 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2540 assert((!VT.isVector() ||
2541 VT.getVectorNumElements() ==
2542 Operand.getValueType().getVectorNumElements()) &&
2543 "Vector element count mismatch!");
2544 if (Operand.getOpcode() == ISD::UNDEF)
2545 return getUNDEF(VT);
2547 case ISD::SIGN_EXTEND:
2548 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2549 "Invalid SIGN_EXTEND!");
2550 if (Operand.getValueType() == VT) return Operand; // noop extension
2551 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2552 "Invalid sext node, dst < src!");
2553 assert((!VT.isVector() ||
2554 VT.getVectorNumElements() ==
2555 Operand.getValueType().getVectorNumElements()) &&
2556 "Vector element count mismatch!");
2557 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2558 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2559 else if (OpOpcode == ISD::UNDEF)
2560 // sext(undef) = 0, because the top bits will all be the same.
2561 return getConstant(0, VT);
2563 case ISD::ZERO_EXTEND:
2564 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2565 "Invalid ZERO_EXTEND!");
2566 if (Operand.getValueType() == VT) return Operand; // noop extension
2567 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2568 "Invalid zext node, dst < src!");
2569 assert((!VT.isVector() ||
2570 VT.getVectorNumElements() ==
2571 Operand.getValueType().getVectorNumElements()) &&
2572 "Vector element count mismatch!");
2573 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2574 return getNode(ISD::ZERO_EXTEND, DL, VT,
2575 Operand.getNode()->getOperand(0));
2576 else if (OpOpcode == ISD::UNDEF)
2577 // zext(undef) = 0, because the top bits will be zero.
2578 return getConstant(0, VT);
2580 case ISD::ANY_EXTEND:
2581 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2582 "Invalid ANY_EXTEND!");
2583 if (Operand.getValueType() == VT) return Operand; // noop extension
2584 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2585 "Invalid anyext node, dst < src!");
2586 assert((!VT.isVector() ||
2587 VT.getVectorNumElements() ==
2588 Operand.getValueType().getVectorNumElements()) &&
2589 "Vector element count mismatch!");
2591 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2592 OpOpcode == ISD::ANY_EXTEND)
2593 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2594 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2595 else if (OpOpcode == ISD::UNDEF)
2596 return getUNDEF(VT);
2598 // (ext (trunx x)) -> x
2599 if (OpOpcode == ISD::TRUNCATE) {
2600 SDValue OpOp = Operand.getNode()->getOperand(0);
2601 if (OpOp.getValueType() == VT)
2606 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2607 "Invalid TRUNCATE!");
2608 if (Operand.getValueType() == VT) return Operand; // noop truncate
2609 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2610 "Invalid truncate node, src < dst!");
2611 assert((!VT.isVector() ||
2612 VT.getVectorNumElements() ==
2613 Operand.getValueType().getVectorNumElements()) &&
2614 "Vector element count mismatch!");
2615 if (OpOpcode == ISD::TRUNCATE)
2616 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2617 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2618 OpOpcode == ISD::ANY_EXTEND) {
2619 // If the source is smaller than the dest, we still need an extend.
2620 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2621 .bitsLT(VT.getScalarType()))
2622 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2623 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2624 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2625 return Operand.getNode()->getOperand(0);
2627 if (OpOpcode == ISD::UNDEF)
2628 return getUNDEF(VT);
2631 // Basic sanity checking.
2632 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2633 && "Cannot BITCAST between types of different sizes!");
2634 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2635 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2636 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2637 if (OpOpcode == ISD::UNDEF)
2638 return getUNDEF(VT);
2640 case ISD::SCALAR_TO_VECTOR:
2641 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2642 (VT.getVectorElementType() == Operand.getValueType() ||
2643 (VT.getVectorElementType().isInteger() &&
2644 Operand.getValueType().isInteger() &&
2645 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2646 "Illegal SCALAR_TO_VECTOR node!");
2647 if (OpOpcode == ISD::UNDEF)
2648 return getUNDEF(VT);
2649 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2650 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2651 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2652 Operand.getConstantOperandVal(1) == 0 &&
2653 Operand.getOperand(0).getValueType() == VT)
2654 return Operand.getOperand(0);
2657 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2658 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2659 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2660 Operand.getNode()->getOperand(0));
2661 if (OpOpcode == ISD::FNEG) // --X -> X
2662 return Operand.getNode()->getOperand(0);
2665 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2666 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2671 SDVTList VTs = getVTList(VT);
2672 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2673 FoldingSetNodeID ID;
2674 SDValue Ops[1] = { Operand };
2675 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2677 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2678 return SDValue(E, 0);
2680 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2681 CSEMap.InsertNode(N, IP);
2683 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2686 AllNodes.push_back(N);
2690 return SDValue(N, 0);
2693 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2695 ConstantSDNode *Cst1,
2696 ConstantSDNode *Cst2) {
2697 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2700 case ISD::ADD: return getConstant(C1 + C2, VT);
2701 case ISD::SUB: return getConstant(C1 - C2, VT);
2702 case ISD::MUL: return getConstant(C1 * C2, VT);
2704 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2707 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2710 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2713 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2715 case ISD::AND: return getConstant(C1 & C2, VT);
2716 case ISD::OR: return getConstant(C1 | C2, VT);
2717 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2718 case ISD::SHL: return getConstant(C1 << C2, VT);
2719 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2720 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2721 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2722 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2729 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2730 SDValue N1, SDValue N2) {
2731 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2732 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2735 case ISD::TokenFactor:
2736 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2737 N2.getValueType() == MVT::Other && "Invalid token factor!");
2738 // Fold trivial token factors.
2739 if (N1.getOpcode() == ISD::EntryToken) return N2;
2740 if (N2.getOpcode() == ISD::EntryToken) return N1;
2741 if (N1 == N2) return N1;
2743 case ISD::CONCAT_VECTORS:
2744 // Concat of UNDEFs is UNDEF.
2745 if (N1.getOpcode() == ISD::UNDEF &&
2746 N2.getOpcode() == ISD::UNDEF)
2747 return getUNDEF(VT);
2749 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2750 // one big BUILD_VECTOR.
2751 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2752 N2.getOpcode() == ISD::BUILD_VECTOR) {
2753 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2754 N1.getNode()->op_end());
2755 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2756 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2760 assert(VT.isInteger() && "This operator does not apply to FP types!");
2761 assert(N1.getValueType() == N2.getValueType() &&
2762 N1.getValueType() == VT && "Binary operator types must match!");
2763 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2764 // worth handling here.
2765 if (N2C && N2C->isNullValue())
2767 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2774 assert(VT.isInteger() && "This operator does not apply to FP types!");
2775 assert(N1.getValueType() == N2.getValueType() &&
2776 N1.getValueType() == VT && "Binary operator types must match!");
2777 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2778 // it's worth handling here.
2779 if (N2C && N2C->isNullValue())
2789 assert(VT.isInteger() && "This operator does not apply to FP types!");
2790 assert(N1.getValueType() == N2.getValueType() &&
2791 N1.getValueType() == VT && "Binary operator types must match!");
2798 if (getTarget().Options.UnsafeFPMath) {
2799 if (Opcode == ISD::FADD) {
2801 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2802 if (CFP->getValueAPF().isZero())
2805 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2806 if (CFP->getValueAPF().isZero())
2808 } else if (Opcode == ISD::FSUB) {
2810 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2811 if (CFP->getValueAPF().isZero())
2813 } else if (Opcode == ISD::FMUL) {
2814 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2817 // If the first operand isn't the constant, try the second
2819 CFP = dyn_cast<ConstantFPSDNode>(N2);
2826 return SDValue(CFP,0);
2828 if (CFP->isExactlyValue(1.0))
2833 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2834 assert(N1.getValueType() == N2.getValueType() &&
2835 N1.getValueType() == VT && "Binary operator types must match!");
2837 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2838 assert(N1.getValueType() == VT &&
2839 N1.getValueType().isFloatingPoint() &&
2840 N2.getValueType().isFloatingPoint() &&
2841 "Invalid FCOPYSIGN!");
2848 assert(VT == N1.getValueType() &&
2849 "Shift operators return type must be the same as their first arg");
2850 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2851 "Shifts only work on integers");
2852 // Verify that the shift amount VT is bit enough to hold valid shift
2853 // amounts. This catches things like trying to shift an i1024 value by an
2854 // i8, which is easy to fall into in generic code that uses
2855 // TLI.getShiftAmount().
2856 assert(N2.getValueType().getSizeInBits() >=
2857 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2858 "Invalid use of small shift amount with oversized value!");
2860 // Always fold shifts of i1 values so the code generator doesn't need to
2861 // handle them. Since we know the size of the shift has to be less than the
2862 // size of the value, the shift/rotate count is guaranteed to be zero.
2865 if (N2C && N2C->isNullValue())
2868 case ISD::FP_ROUND_INREG: {
2869 EVT EVT = cast<VTSDNode>(N2)->getVT();
2870 assert(VT == N1.getValueType() && "Not an inreg round!");
2871 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2872 "Cannot FP_ROUND_INREG integer types");
2873 assert(EVT.isVector() == VT.isVector() &&
2874 "FP_ROUND_INREG type should be vector iff the operand "
2876 assert((!EVT.isVector() ||
2877 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2878 "Vector element counts must match in FP_ROUND_INREG");
2879 assert(EVT.bitsLE(VT) && "Not rounding down!");
2881 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2885 assert(VT.isFloatingPoint() &&
2886 N1.getValueType().isFloatingPoint() &&
2887 VT.bitsLE(N1.getValueType()) &&
2888 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2889 if (N1.getValueType() == VT) return N1; // noop conversion.
2891 case ISD::AssertSext:
2892 case ISD::AssertZext: {
2893 EVT EVT = cast<VTSDNode>(N2)->getVT();
2894 assert(VT == N1.getValueType() && "Not an inreg extend!");
2895 assert(VT.isInteger() && EVT.isInteger() &&
2896 "Cannot *_EXTEND_INREG FP types");
2897 assert(!EVT.isVector() &&
2898 "AssertSExt/AssertZExt type should be the vector element type "
2899 "rather than the vector type!");
2900 assert(EVT.bitsLE(VT) && "Not extending!");
2901 if (VT == EVT) return N1; // noop assertion.
2904 case ISD::SIGN_EXTEND_INREG: {
2905 EVT EVT = cast<VTSDNode>(N2)->getVT();
2906 assert(VT == N1.getValueType() && "Not an inreg extend!");
2907 assert(VT.isInteger() && EVT.isInteger() &&
2908 "Cannot *_EXTEND_INREG FP types");
2909 assert(EVT.isVector() == VT.isVector() &&
2910 "SIGN_EXTEND_INREG type should be vector iff the operand "
2912 assert((!EVT.isVector() ||
2913 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2914 "Vector element counts must match in SIGN_EXTEND_INREG");
2915 assert(EVT.bitsLE(VT) && "Not extending!");
2916 if (EVT == VT) return N1; // Not actually extending
2919 APInt Val = N1C->getAPIntValue();
2920 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2921 Val <<= Val.getBitWidth()-FromBits;
2922 Val = Val.ashr(Val.getBitWidth()-FromBits);
2923 return getConstant(Val, VT);
2927 case ISD::EXTRACT_VECTOR_ELT:
2928 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2929 if (N1.getOpcode() == ISD::UNDEF)
2930 return getUNDEF(VT);
2932 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2933 // expanding copies of large vectors from registers.
2935 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2936 N1.getNumOperands() > 0) {
2938 N1.getOperand(0).getValueType().getVectorNumElements();
2939 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2940 N1.getOperand(N2C->getZExtValue() / Factor),
2941 getConstant(N2C->getZExtValue() % Factor,
2942 N2.getValueType()));
2945 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2946 // expanding large vector constants.
2947 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2948 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2950 if (VT != Elt.getValueType())
2951 // If the vector element type is not legal, the BUILD_VECTOR operands
2952 // are promoted and implicitly truncated, and the result implicitly
2953 // extended. Make that explicit here.
2954 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2959 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2960 // operations are lowered to scalars.
2961 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2962 // If the indices are the same, return the inserted element else
2963 // if the indices are known different, extract the element from
2964 // the original vector.
2965 SDValue N1Op2 = N1.getOperand(2);
2966 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2968 if (N1Op2C && N2C) {
2969 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2970 if (VT == N1.getOperand(1).getValueType())
2971 return N1.getOperand(1);
2973 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2976 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2980 case ISD::EXTRACT_ELEMENT:
2981 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2982 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2983 (N1.getValueType().isInteger() == VT.isInteger()) &&
2984 N1.getValueType() != VT &&
2985 "Wrong types for EXTRACT_ELEMENT!");
2987 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2988 // 64-bit integers into 32-bit parts. Instead of building the extract of
2989 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2990 if (N1.getOpcode() == ISD::BUILD_PAIR)
2991 return N1.getOperand(N2C->getZExtValue());
2993 // EXTRACT_ELEMENT of a constant int is also very common.
2994 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2995 unsigned ElementSize = VT.getSizeInBits();
2996 unsigned Shift = ElementSize * N2C->getZExtValue();
2997 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2998 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3001 case ISD::EXTRACT_SUBVECTOR: {
3003 if (VT.isSimple() && N1.getValueType().isSimple()) {
3004 assert(VT.isVector() && N1.getValueType().isVector() &&
3005 "Extract subvector VTs must be a vectors!");
3006 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3007 "Extract subvector VTs must have the same element type!");
3008 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3009 "Extract subvector must be from larger vector to smaller vector!");
3011 if (isa<ConstantSDNode>(Index.getNode())) {
3012 assert((VT.getVectorNumElements() +
3013 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3014 <= N1.getValueType().getVectorNumElements())
3015 && "Extract subvector overflow!");
3018 // Trivial extraction.
3019 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3028 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3029 if (SV.getNode()) return SV;
3030 } else { // Cannonicalize constant to RHS if commutative
3031 if (isCommutativeBinOp(Opcode)) {
3032 std::swap(N1C, N2C);
3038 // Constant fold FP operations.
3039 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3040 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3042 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3043 // Cannonicalize constant to RHS if commutative
3044 std::swap(N1CFP, N2CFP);
3047 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3048 APFloat::opStatus s;
3051 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3052 if (s != APFloat::opInvalidOp)
3053 return getConstantFP(V1, VT);
3056 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3057 if (s!=APFloat::opInvalidOp)
3058 return getConstantFP(V1, VT);
3061 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3062 if (s!=APFloat::opInvalidOp)
3063 return getConstantFP(V1, VT);
3066 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3067 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3068 return getConstantFP(V1, VT);
3071 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3072 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3073 return getConstantFP(V1, VT);
3075 case ISD::FCOPYSIGN:
3077 return getConstantFP(V1, VT);
3082 if (Opcode == ISD::FP_ROUND) {
3083 APFloat V = N1CFP->getValueAPF(); // make copy
3085 // This can return overflow, underflow, or inexact; we don't care.
3086 // FIXME need to be more flexible about rounding mode.
3087 (void)V.convert(*EVTToAPFloatSemantics(VT),
3088 APFloat::rmNearestTiesToEven, &ignored);
3089 return getConstantFP(V, VT);
3093 // Canonicalize an UNDEF to the RHS, even over a constant.
3094 if (N1.getOpcode() == ISD::UNDEF) {
3095 if (isCommutativeBinOp(Opcode)) {
3099 case ISD::FP_ROUND_INREG:
3100 case ISD::SIGN_EXTEND_INREG:
3106 return N1; // fold op(undef, arg2) -> undef
3114 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3115 // For vectors, we can't easily build an all zero vector, just return
3122 // Fold a bunch of operators when the RHS is undef.
3123 if (N2.getOpcode() == ISD::UNDEF) {
3126 if (N1.getOpcode() == ISD::UNDEF)
3127 // Handle undef ^ undef -> 0 special case. This is a common
3129 return getConstant(0, VT);
3139 return N2; // fold op(arg1, undef) -> undef
3145 if (getTarget().Options.UnsafeFPMath)
3153 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3154 // For vectors, we can't easily build an all zero vector, just return
3159 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3160 // For vectors, we can't easily build an all one vector, just return
3168 // Memoize this node if possible.
3170 SDVTList VTs = getVTList(VT);
3171 if (VT != MVT::Glue) {
3172 SDValue Ops[] = { N1, N2 };
3173 FoldingSetNodeID ID;
3174 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3176 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3177 return SDValue(E, 0);
3179 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3180 CSEMap.InsertNode(N, IP);
3182 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3185 AllNodes.push_back(N);
3189 return SDValue(N, 0);
3192 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3193 SDValue N1, SDValue N2, SDValue N3) {
3194 // Perform various simplifications.
3195 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3197 case ISD::CONCAT_VECTORS:
3198 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3199 // one big BUILD_VECTOR.
3200 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3201 N2.getOpcode() == ISD::BUILD_VECTOR &&
3202 N3.getOpcode() == ISD::BUILD_VECTOR) {
3203 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3204 N1.getNode()->op_end());
3205 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3206 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3207 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3211 // Use FoldSetCC to simplify SETCC's.
3212 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3213 if (Simp.getNode()) return Simp;
3218 if (N1C->getZExtValue())
3219 return N2; // select true, X, Y -> X
3220 return N3; // select false, X, Y -> Y
3223 if (N2 == N3) return N2; // select C, X, X -> X
3225 case ISD::VECTOR_SHUFFLE:
3226 llvm_unreachable("should use getVectorShuffle constructor!");
3227 case ISD::INSERT_SUBVECTOR: {
3229 if (VT.isSimple() && N1.getValueType().isSimple()
3230 && N2.getValueType().isSimple()) {
3231 assert(VT.isVector() && N1.getValueType().isVector() &&
3232 N2.getValueType().isVector() &&
3233 "Insert subvector VTs must be a vectors");
3234 assert(VT == N1.getValueType() &&
3235 "Dest and insert subvector source types must match!");
3236 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3237 "Insert subvector must be from smaller vector to larger vector!");
3238 if (isa<ConstantSDNode>(Index.getNode())) {
3239 assert((N2.getValueType().getVectorNumElements() +
3240 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3241 <= VT.getVectorNumElements())
3242 && "Insert subvector overflow!");
3245 // Trivial insertion.
3246 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3252 // Fold bit_convert nodes from a type to themselves.
3253 if (N1.getValueType() == VT)
3258 // Memoize node if it doesn't produce a flag.
3260 SDVTList VTs = getVTList(VT);
3261 if (VT != MVT::Glue) {
3262 SDValue Ops[] = { N1, N2, N3 };
3263 FoldingSetNodeID ID;
3264 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3266 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3267 return SDValue(E, 0);
3269 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3270 CSEMap.InsertNode(N, IP);
3272 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3275 AllNodes.push_back(N);
3279 return SDValue(N, 0);
3282 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3283 SDValue N1, SDValue N2, SDValue N3,
3285 SDValue Ops[] = { N1, N2, N3, N4 };
3286 return getNode(Opcode, DL, VT, Ops, 4);
3289 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3290 SDValue N1, SDValue N2, SDValue N3,
3291 SDValue N4, SDValue N5) {
3292 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3293 return getNode(Opcode, DL, VT, Ops, 5);
3296 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3297 /// the incoming stack arguments to be loaded from the stack.
3298 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3299 SmallVector<SDValue, 8> ArgChains;
3301 // Include the original chain at the beginning of the list. When this is
3302 // used by target LowerCall hooks, this helps legalize find the
3303 // CALLSEQ_BEGIN node.
3304 ArgChains.push_back(Chain);
3306 // Add a chain value for each stack argument.
3307 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3308 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3309 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3310 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3311 if (FI->getIndex() < 0)
3312 ArgChains.push_back(SDValue(L, 1));
3314 // Build a tokenfactor for all the chains.
3315 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3316 &ArgChains[0], ArgChains.size());
3319 /// SplatByte - Distribute ByteVal over NumBits bits.
3320 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3321 APInt Val = APInt(NumBits, ByteVal);
3323 for (unsigned i = NumBits; i > 8; i >>= 1) {
3324 Val = (Val << Shift) | Val;
3330 /// getMemsetValue - Vectorized representation of the memset value
3332 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3334 assert(Value.getOpcode() != ISD::UNDEF);
3336 unsigned NumBits = VT.getScalarType().getSizeInBits();
3337 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3338 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3340 return DAG.getConstant(Val, VT);
3341 return DAG.getConstantFP(APFloat(Val), VT);
3344 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3346 // Use a multiplication with 0x010101... to extend the input to the
3348 APInt Magic = SplatByte(NumBits, 0x01);
3349 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3355 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3356 /// used when a memcpy is turned into a memset when the source is a constant
3358 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3359 const TargetLowering &TLI, StringRef Str) {
3360 // Handle vector with all elements zero.
3363 return DAG.getConstant(0, VT);
3364 else if (VT == MVT::f32 || VT == MVT::f64)
3365 return DAG.getConstantFP(0.0, VT);
3366 else if (VT.isVector()) {
3367 unsigned NumElts = VT.getVectorNumElements();
3368 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3369 return DAG.getNode(ISD::BITCAST, dl, VT,
3370 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3373 llvm_unreachable("Expected type!");
3376 assert(!VT.isVector() && "Can't handle vector type here!");
3377 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3378 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3380 APInt Val(NumBytes*8, 0);
3381 if (TLI.isLittleEndian()) {
3382 for (unsigned i = 0; i != NumBytes; ++i)
3383 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3385 for (unsigned i = 0; i != NumBytes; ++i)
3386 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3389 // If the "cost" of materializing the integer immediate is 1 or free, then
3390 // it is cost effective to turn the load into the immediate.
3391 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
3392 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3393 return DAG.getConstant(Val, VT);
3394 return SDValue(0, 0);
3397 /// getMemBasePlusOffset - Returns base and offset node for the
3399 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3400 SelectionDAG &DAG) {
3401 EVT VT = Base.getValueType();
3402 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3403 VT, Base, DAG.getConstant(Offset, VT));
3406 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3408 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3409 unsigned SrcDelta = 0;
3410 GlobalAddressSDNode *G = NULL;
3411 if (Src.getOpcode() == ISD::GlobalAddress)
3412 G = cast<GlobalAddressSDNode>(Src);
3413 else if (Src.getOpcode() == ISD::ADD &&
3414 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3415 Src.getOperand(1).getOpcode() == ISD::Constant) {
3416 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3417 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3422 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3425 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3426 /// to replace the memset / memcpy. Return true if the number of memory ops
3427 /// is below the threshold. It returns the types of the sequence of
3428 /// memory ops to perform memset / memcpy by reference.
3429 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3430 unsigned Limit, uint64_t Size,
3431 unsigned DstAlign, unsigned SrcAlign,
3437 const TargetLowering &TLI) {
3438 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3439 "Expecting memcpy / memset source to meet alignment requirement!");
3440 // If 'SrcAlign' is zero, that means the memory operation does not need to
3441 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3442 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3443 // is the specified alignment of the memory operation. If it is zero, that
3444 // means it's possible to change the alignment of the destination.
3445 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3446 // not need to be loaded.
3447 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3448 IsMemset, ZeroMemset, MemcpyStrSrc,
3449 DAG.getMachineFunction());
3451 if (VT == MVT::Other) {
3452 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3453 TLI.allowsUnalignedMemoryAccesses(VT)) {
3454 VT = TLI.getPointerTy();
3456 switch (DstAlign & 7) {
3457 case 0: VT = MVT::i64; break;
3458 case 4: VT = MVT::i32; break;
3459 case 2: VT = MVT::i16; break;
3460 default: VT = MVT::i8; break;
3465 while (!TLI.isTypeLegal(LVT))
3466 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3467 assert(LVT.isInteger());
3473 unsigned NumMemOps = 0;
3475 unsigned VTSize = VT.getSizeInBits() / 8;
3476 while (VTSize > Size) {
3477 // For now, only use non-vector load / store's for the left-over pieces.
3482 if (VT.isVector() || VT.isFloatingPoint()) {
3483 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3484 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3485 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3487 else if (NewVT == MVT::i64 &&
3488 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3489 TLI.isSafeMemOpType(MVT::f64)) {
3490 // i64 is usually not legal on 32-bit targets, but f64 may be.
3498 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3499 if (NewVT == MVT::i8)
3501 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3503 NewVTSize = NewVT.getSizeInBits() / 8;
3505 // If the new VT cannot cover all of the remaining bits, then consider
3506 // issuing a (or a pair of) unaligned and overlapping load / store.
3507 // FIXME: Only does this for 64-bit or more since we don't have proper
3508 // cost model for unaligned load / store.
3510 if (NumMemOps && AllowOverlap &&
3511 VTSize >= 8 && NewVTSize < Size &&
3512 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3520 if (++NumMemOps > Limit)
3523 MemOps.push_back(VT);
3530 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3531 SDValue Chain, SDValue Dst,
3532 SDValue Src, uint64_t Size,
3533 unsigned Align, bool isVol,
3535 MachinePointerInfo DstPtrInfo,
3536 MachinePointerInfo SrcPtrInfo) {
3537 // Turn a memcpy of undef to nop.
3538 if (Src.getOpcode() == ISD::UNDEF)
3541 // Expand memcpy to a series of load and store ops if the size operand falls
3542 // below a certain threshold.
3543 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3544 // rather than maybe a humongous number of loads and stores.
3545 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3546 std::vector<EVT> MemOps;
3547 bool DstAlignCanChange = false;
3548 MachineFunction &MF = DAG.getMachineFunction();
3549 MachineFrameInfo *MFI = MF.getFrameInfo();
3551 MF.getFunction()->getAttributes().
3552 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3553 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3554 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3555 DstAlignCanChange = true;
3556 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3557 if (Align > SrcAlign)
3560 bool CopyFromStr = isMemSrcFromString(Src, Str);
3561 bool isZeroStr = CopyFromStr && Str.empty();
3562 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3564 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3565 (DstAlignCanChange ? 0 : Align),
3566 (isZeroStr ? 0 : SrcAlign),
3567 false, false, CopyFromStr, true, DAG, TLI))
3570 if (DstAlignCanChange) {
3571 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3572 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3573 if (NewAlign > Align) {
3574 // Give the stack frame object a larger alignment if needed.
3575 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3576 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3581 SmallVector<SDValue, 8> OutChains;
3582 unsigned NumMemOps = MemOps.size();
3583 uint64_t SrcOff = 0, DstOff = 0;
3584 for (unsigned i = 0; i != NumMemOps; ++i) {
3586 unsigned VTSize = VT.getSizeInBits() / 8;
3587 SDValue Value, Store;
3589 if (VTSize > Size) {
3590 // Issuing an unaligned load / store pair that overlaps with the previous
3591 // pair. Adjust the offset accordingly.
3592 assert(i == NumMemOps-1 && i != 0);
3593 SrcOff -= VTSize - Size;
3594 DstOff -= VTSize - Size;
3598 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3599 // It's unlikely a store of a vector immediate can be done in a single
3600 // instruction. It would require a load from a constantpool first.
3601 // We only handle zero vectors here.
3602 // FIXME: Handle other cases where store of vector immediate is done in
3603 // a single instruction.
3604 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3605 if (Value.getNode())
3606 Store = DAG.getStore(Chain, dl, Value,
3607 getMemBasePlusOffset(Dst, DstOff, DAG),
3608 DstPtrInfo.getWithOffset(DstOff), isVol,
3612 if (!Store.getNode()) {
3613 // The type might not be legal for the target. This should only happen
3614 // if the type is smaller than a legal type, as on PPC, so the right
3615 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3616 // to Load/Store if NVT==VT.
3617 // FIXME does the case above also need this?
3618 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3619 assert(NVT.bitsGE(VT));
3620 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3621 getMemBasePlusOffset(Src, SrcOff, DAG),
3622 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3623 MinAlign(SrcAlign, SrcOff));
3624 Store = DAG.getTruncStore(Chain, dl, Value,
3625 getMemBasePlusOffset(Dst, DstOff, DAG),
3626 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3629 OutChains.push_back(Store);
3635 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3636 &OutChains[0], OutChains.size());
3639 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3640 SDValue Chain, SDValue Dst,
3641 SDValue Src, uint64_t Size,
3642 unsigned Align, bool isVol,
3644 MachinePointerInfo DstPtrInfo,
3645 MachinePointerInfo SrcPtrInfo) {
3646 // Turn a memmove of undef to nop.
3647 if (Src.getOpcode() == ISD::UNDEF)
3650 // Expand memmove to a series of load and store ops if the size operand falls
3651 // below a certain threshold.
3652 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3653 std::vector<EVT> MemOps;
3654 bool DstAlignCanChange = false;
3655 MachineFunction &MF = DAG.getMachineFunction();
3656 MachineFrameInfo *MFI = MF.getFrameInfo();
3657 bool OptSize = MF.getFunction()->getAttributes().
3658 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3659 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3660 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3661 DstAlignCanChange = true;
3662 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3663 if (Align > SrcAlign)
3665 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3667 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3668 (DstAlignCanChange ? 0 : Align), SrcAlign,
3669 false, false, false, false, DAG, TLI))
3672 if (DstAlignCanChange) {
3673 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3674 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3675 if (NewAlign > Align) {
3676 // Give the stack frame object a larger alignment if needed.
3677 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3678 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3683 uint64_t SrcOff = 0, DstOff = 0;
3684 SmallVector<SDValue, 8> LoadValues;
3685 SmallVector<SDValue, 8> LoadChains;
3686 SmallVector<SDValue, 8> OutChains;
3687 unsigned NumMemOps = MemOps.size();
3688 for (unsigned i = 0; i < NumMemOps; i++) {
3690 unsigned VTSize = VT.getSizeInBits() / 8;
3691 SDValue Value, Store;
3693 Value = DAG.getLoad(VT, dl, Chain,
3694 getMemBasePlusOffset(Src, SrcOff, DAG),
3695 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3696 false, false, SrcAlign);
3697 LoadValues.push_back(Value);
3698 LoadChains.push_back(Value.getValue(1));
3701 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3702 &LoadChains[0], LoadChains.size());
3704 for (unsigned i = 0; i < NumMemOps; i++) {
3706 unsigned VTSize = VT.getSizeInBits() / 8;
3707 SDValue Value, Store;
3709 Store = DAG.getStore(Chain, dl, LoadValues[i],
3710 getMemBasePlusOffset(Dst, DstOff, DAG),
3711 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3712 OutChains.push_back(Store);
3716 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3717 &OutChains[0], OutChains.size());
3720 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3721 SDValue Chain, SDValue Dst,
3722 SDValue Src, uint64_t Size,
3723 unsigned Align, bool isVol,
3724 MachinePointerInfo DstPtrInfo) {
3725 // Turn a memset of undef to nop.
3726 if (Src.getOpcode() == ISD::UNDEF)
3729 // Expand memset to a series of load/store ops if the size operand
3730 // falls below a certain threshold.
3731 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3732 std::vector<EVT> MemOps;
3733 bool DstAlignCanChange = false;
3734 MachineFunction &MF = DAG.getMachineFunction();
3735 MachineFrameInfo *MFI = MF.getFrameInfo();
3736 bool OptSize = MF.getFunction()->getAttributes().
3737 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3738 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3739 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3740 DstAlignCanChange = true;
3742 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3743 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3744 Size, (DstAlignCanChange ? 0 : Align), 0,
3745 true, IsZeroVal, false, true, DAG, TLI))
3748 if (DstAlignCanChange) {
3749 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3750 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3751 if (NewAlign > Align) {
3752 // Give the stack frame object a larger alignment if needed.
3753 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3754 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3759 SmallVector<SDValue, 8> OutChains;
3760 uint64_t DstOff = 0;
3761 unsigned NumMemOps = MemOps.size();
3763 // Find the largest store and generate the bit pattern for it.
3764 EVT LargestVT = MemOps[0];
3765 for (unsigned i = 1; i < NumMemOps; i++)
3766 if (MemOps[i].bitsGT(LargestVT))
3767 LargestVT = MemOps[i];
3768 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3770 for (unsigned i = 0; i < NumMemOps; i++) {
3772 unsigned VTSize = VT.getSizeInBits() / 8;
3773 if (VTSize > Size) {
3774 // Issuing an unaligned load / store pair that overlaps with the previous
3775 // pair. Adjust the offset accordingly.
3776 assert(i == NumMemOps-1 && i != 0);
3777 DstOff -= VTSize - Size;
3780 // If this store is smaller than the largest store see whether we can get
3781 // the smaller value for free with a truncate.
3782 SDValue Value = MemSetValue;
3783 if (VT.bitsLT(LargestVT)) {
3784 if (!LargestVT.isVector() && !VT.isVector() &&
3785 TLI.isTruncateFree(LargestVT, VT))
3786 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3788 Value = getMemsetValue(Src, VT, DAG, dl);
3790 assert(Value.getValueType() == VT && "Value with wrong type.");
3791 SDValue Store = DAG.getStore(Chain, dl, Value,
3792 getMemBasePlusOffset(Dst, DstOff, DAG),
3793 DstPtrInfo.getWithOffset(DstOff),
3794 isVol, false, Align);
3795 OutChains.push_back(Store);
3796 DstOff += VT.getSizeInBits() / 8;
3800 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3801 &OutChains[0], OutChains.size());
3804 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3805 SDValue Src, SDValue Size,
3806 unsigned Align, bool isVol, bool AlwaysInline,
3807 MachinePointerInfo DstPtrInfo,
3808 MachinePointerInfo SrcPtrInfo) {
3810 // Check to see if we should lower the memcpy to loads and stores first.
3811 // For cases within the target-specified limits, this is the best choice.
3812 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3814 // Memcpy with size zero? Just return the original chain.
3815 if (ConstantSize->isNullValue())
3818 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3819 ConstantSize->getZExtValue(),Align,
3820 isVol, false, DstPtrInfo, SrcPtrInfo);
3821 if (Result.getNode())
3825 // Then check to see if we should lower the memcpy with target-specific
3826 // code. If the target chooses to do this, this is the next best.
3828 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3829 isVol, AlwaysInline,
3830 DstPtrInfo, SrcPtrInfo);
3831 if (Result.getNode())
3834 // If we really need inline code and the target declined to provide it,
3835 // use a (potentially long) sequence of loads and stores.
3837 assert(ConstantSize && "AlwaysInline requires a constant size!");
3838 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3839 ConstantSize->getZExtValue(), Align, isVol,
3840 true, DstPtrInfo, SrcPtrInfo);
3843 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3844 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3845 // respect volatile, so they may do things like read or write memory
3846 // beyond the given memory regions. But fixing this isn't easy, and most
3847 // people don't care.
3849 // Emit a library call.
3850 TargetLowering::ArgListTy Args;
3851 TargetLowering::ArgListEntry Entry;
3852 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3853 Entry.Node = Dst; Args.push_back(Entry);
3854 Entry.Node = Src; Args.push_back(Entry);
3855 Entry.Node = Size; Args.push_back(Entry);
3856 // FIXME: pass in DebugLoc
3858 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3859 false, false, false, false, 0,
3860 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3861 /*isTailCall=*/false,
3862 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3863 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3864 TLI.getPointerTy()),
3866 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3868 return CallResult.second;
3871 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3872 SDValue Src, SDValue Size,
3873 unsigned Align, bool isVol,
3874 MachinePointerInfo DstPtrInfo,
3875 MachinePointerInfo SrcPtrInfo) {
3877 // Check to see if we should lower the memmove to loads and stores first.
3878 // For cases within the target-specified limits, this is the best choice.
3879 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3881 // Memmove with size zero? Just return the original chain.
3882 if (ConstantSize->isNullValue())
3886 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3887 ConstantSize->getZExtValue(), Align, isVol,
3888 false, DstPtrInfo, SrcPtrInfo);
3889 if (Result.getNode())
3893 // Then check to see if we should lower the memmove with target-specific
3894 // code. If the target chooses to do this, this is the next best.
3896 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3897 DstPtrInfo, SrcPtrInfo);
3898 if (Result.getNode())
3901 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3902 // not be safe. See memcpy above for more details.
3904 // Emit a library call.
3905 TargetLowering::ArgListTy Args;
3906 TargetLowering::ArgListEntry Entry;
3907 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3908 Entry.Node = Dst; Args.push_back(Entry);
3909 Entry.Node = Src; Args.push_back(Entry);
3910 Entry.Node = Size; Args.push_back(Entry);
3911 // FIXME: pass in DebugLoc
3913 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3914 false, false, false, false, 0,
3915 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3916 /*isTailCall=*/false,
3917 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3918 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3919 TLI.getPointerTy()),
3921 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3923 return CallResult.second;
3926 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3927 SDValue Src, SDValue Size,
3928 unsigned Align, bool isVol,
3929 MachinePointerInfo DstPtrInfo) {
3931 // Check to see if we should lower the memset to stores first.
3932 // For cases within the target-specified limits, this is the best choice.
3933 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3935 // Memset with size zero? Just return the original chain.
3936 if (ConstantSize->isNullValue())
3940 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3941 Align, isVol, DstPtrInfo);
3943 if (Result.getNode())
3947 // Then check to see if we should lower the memset with target-specific
3948 // code. If the target chooses to do this, this is the next best.
3950 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3952 if (Result.getNode())
3955 // Emit a library call.
3956 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3957 TargetLowering::ArgListTy Args;
3958 TargetLowering::ArgListEntry Entry;
3959 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3960 Args.push_back(Entry);
3961 // Extend or truncate the argument to be an i32 value for the call.
3962 if (Src.getValueType().bitsGT(MVT::i32))
3963 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3965 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3967 Entry.Ty = Type::getInt32Ty(*getContext());
3968 Entry.isSExt = true;
3969 Args.push_back(Entry);
3971 Entry.Ty = IntPtrTy;
3972 Entry.isSExt = false;
3973 Args.push_back(Entry);
3974 // FIXME: pass in DebugLoc
3976 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3977 false, false, false, false, 0,
3978 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3979 /*isTailCall=*/false,
3980 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3981 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3982 TLI.getPointerTy()),
3984 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3986 return CallResult.second;
3989 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3990 SDValue Chain, SDValue Ptr, SDValue Cmp,
3991 SDValue Swp, MachinePointerInfo PtrInfo,
3993 AtomicOrdering Ordering,
3994 SynchronizationScope SynchScope) {
3995 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3996 Alignment = getEVTAlignment(MemVT);
3998 MachineFunction &MF = getMachineFunction();
4000 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
4001 // For now, atomics are considered to be volatile always.
4002 // FIXME: Volatile isn't really correct; we should keep track of atomic
4003 // orderings in the memoperand.
4004 unsigned Flags = MachineMemOperand::MOVolatile;
4005 if (Opcode != ISD::ATOMIC_STORE)
4006 Flags |= MachineMemOperand::MOLoad;
4007 if (Opcode != ISD::ATOMIC_LOAD)
4008 Flags |= MachineMemOperand::MOStore;
4010 MachineMemOperand *MMO =
4011 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4013 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4014 Ordering, SynchScope);
4017 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4019 SDValue Ptr, SDValue Cmp,
4020 SDValue Swp, MachineMemOperand *MMO,
4021 AtomicOrdering Ordering,
4022 SynchronizationScope SynchScope) {
4023 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4024 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4026 EVT VT = Cmp.getValueType();
4028 SDVTList VTs = getVTList(VT, MVT::Other);
4029 FoldingSetNodeID ID;
4030 ID.AddInteger(MemVT.getRawBits());
4031 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4032 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4033 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4036 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4037 return SDValue(E, 0);
4039 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4040 Ptr, Cmp, Swp, MMO, Ordering,
4042 CSEMap.InsertNode(N, IP);
4043 AllNodes.push_back(N);
4044 return SDValue(N, 0);
4047 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4049 SDValue Ptr, SDValue Val,
4050 const Value* PtrVal,
4052 AtomicOrdering Ordering,
4053 SynchronizationScope SynchScope) {
4054 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4055 Alignment = getEVTAlignment(MemVT);
4057 MachineFunction &MF = getMachineFunction();
4058 // An atomic store does not load. An atomic load does not store.
4059 // (An atomicrmw obviously both loads and stores.)
4060 // For now, atomics are considered to be volatile always, and they are
4062 // FIXME: Volatile isn't really correct; we should keep track of atomic
4063 // orderings in the memoperand.
4064 unsigned Flags = MachineMemOperand::MOVolatile;
4065 if (Opcode != ISD::ATOMIC_STORE)
4066 Flags |= MachineMemOperand::MOLoad;
4067 if (Opcode != ISD::ATOMIC_LOAD)
4068 Flags |= MachineMemOperand::MOStore;
4070 MachineMemOperand *MMO =
4071 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4072 MemVT.getStoreSize(), Alignment);
4074 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4075 Ordering, SynchScope);
4078 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4080 SDValue Ptr, SDValue Val,
4081 MachineMemOperand *MMO,
4082 AtomicOrdering Ordering,
4083 SynchronizationScope SynchScope) {
4084 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4085 Opcode == ISD::ATOMIC_LOAD_SUB ||
4086 Opcode == ISD::ATOMIC_LOAD_AND ||
4087 Opcode == ISD::ATOMIC_LOAD_OR ||
4088 Opcode == ISD::ATOMIC_LOAD_XOR ||
4089 Opcode == ISD::ATOMIC_LOAD_NAND ||
4090 Opcode == ISD::ATOMIC_LOAD_MIN ||
4091 Opcode == ISD::ATOMIC_LOAD_MAX ||
4092 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4093 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4094 Opcode == ISD::ATOMIC_SWAP ||
4095 Opcode == ISD::ATOMIC_STORE) &&
4096 "Invalid Atomic Op");
4098 EVT VT = Val.getValueType();
4100 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4101 getVTList(VT, MVT::Other);
4102 FoldingSetNodeID ID;
4103 ID.AddInteger(MemVT.getRawBits());
4104 SDValue Ops[] = {Chain, Ptr, Val};
4105 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4106 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4109 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4110 return SDValue(E, 0);
4112 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4114 Ordering, SynchScope);
4115 CSEMap.InsertNode(N, IP);
4116 AllNodes.push_back(N);
4117 return SDValue(N, 0);
4120 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4121 EVT VT, SDValue Chain,
4123 const Value* PtrVal,
4125 AtomicOrdering Ordering,
4126 SynchronizationScope SynchScope) {
4127 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4128 Alignment = getEVTAlignment(MemVT);
4130 MachineFunction &MF = getMachineFunction();
4131 // An atomic store does not load. An atomic load does not store.
4132 // (An atomicrmw obviously both loads and stores.)
4133 // For now, atomics are considered to be volatile always, and they are
4135 // FIXME: Volatile isn't really correct; we should keep track of atomic
4136 // orderings in the memoperand.
4137 unsigned Flags = MachineMemOperand::MOVolatile;
4138 if (Opcode != ISD::ATOMIC_STORE)
4139 Flags |= MachineMemOperand::MOLoad;
4140 if (Opcode != ISD::ATOMIC_LOAD)
4141 Flags |= MachineMemOperand::MOStore;
4143 MachineMemOperand *MMO =
4144 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4145 MemVT.getStoreSize(), Alignment);
4147 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4148 Ordering, SynchScope);
4151 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4152 EVT VT, SDValue Chain,
4154 MachineMemOperand *MMO,
4155 AtomicOrdering Ordering,
4156 SynchronizationScope SynchScope) {
4157 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4159 SDVTList VTs = getVTList(VT, MVT::Other);
4160 FoldingSetNodeID ID;
4161 ID.AddInteger(MemVT.getRawBits());
4162 SDValue Ops[] = {Chain, Ptr};
4163 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4164 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4167 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4168 return SDValue(E, 0);
4170 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4171 Ptr, MMO, Ordering, SynchScope);
4172 CSEMap.InsertNode(N, IP);
4173 AllNodes.push_back(N);
4174 return SDValue(N, 0);
4177 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4178 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4183 SmallVector<EVT, 4> VTs;
4184 VTs.reserve(NumOps);
4185 for (unsigned i = 0; i < NumOps; ++i)
4186 VTs.push_back(Ops[i].getValueType());
4187 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4192 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4193 const EVT *VTs, unsigned NumVTs,
4194 const SDValue *Ops, unsigned NumOps,
4195 EVT MemVT, MachinePointerInfo PtrInfo,
4196 unsigned Align, bool Vol,
4197 bool ReadMem, bool WriteMem) {
4198 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4199 MemVT, PtrInfo, Align, Vol,
4204 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4205 const SDValue *Ops, unsigned NumOps,
4206 EVT MemVT, MachinePointerInfo PtrInfo,
4207 unsigned Align, bool Vol,
4208 bool ReadMem, bool WriteMem) {
4209 if (Align == 0) // Ensure that codegen never sees alignment 0
4210 Align = getEVTAlignment(MemVT);
4212 MachineFunction &MF = getMachineFunction();
4215 Flags |= MachineMemOperand::MOStore;
4217 Flags |= MachineMemOperand::MOLoad;
4219 Flags |= MachineMemOperand::MOVolatile;
4220 MachineMemOperand *MMO =
4221 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4223 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4227 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4228 const SDValue *Ops, unsigned NumOps,
4229 EVT MemVT, MachineMemOperand *MMO) {
4230 assert((Opcode == ISD::INTRINSIC_VOID ||
4231 Opcode == ISD::INTRINSIC_W_CHAIN ||
4232 Opcode == ISD::PREFETCH ||
4233 Opcode == ISD::LIFETIME_START ||
4234 Opcode == ISD::LIFETIME_END ||
4235 (Opcode <= INT_MAX &&
4236 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4237 "Opcode is not a memory-accessing opcode!");
4239 // Memoize the node unless it returns a flag.
4240 MemIntrinsicSDNode *N;
4241 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4242 FoldingSetNodeID ID;
4243 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4244 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4247 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4248 return SDValue(E, 0);
4251 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4253 CSEMap.InsertNode(N, IP);
4255 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4258 AllNodes.push_back(N);
4259 return SDValue(N, 0);
4262 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4263 /// MachinePointerInfo record from it. This is particularly useful because the
4264 /// code generator has many cases where it doesn't bother passing in a
4265 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4266 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4267 // If this is FI+Offset, we can model it.
4268 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4269 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4271 // If this is (FI+Offset1)+Offset2, we can model it.
4272 if (Ptr.getOpcode() != ISD::ADD ||
4273 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4274 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4275 return MachinePointerInfo();
4277 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4278 return MachinePointerInfo::getFixedStack(FI, Offset+
4279 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4282 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4283 /// MachinePointerInfo record from it. This is particularly useful because the
4284 /// code generator has many cases where it doesn't bother passing in a
4285 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4286 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4287 // If the 'Offset' value isn't a constant, we can't handle this.
4288 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4289 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4290 if (OffsetOp.getOpcode() == ISD::UNDEF)
4291 return InferPointerInfo(Ptr);
4292 return MachinePointerInfo();
4297 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4298 EVT VT, DebugLoc dl, SDValue Chain,
4299 SDValue Ptr, SDValue Offset,
4300 MachinePointerInfo PtrInfo, EVT MemVT,
4301 bool isVolatile, bool isNonTemporal, bool isInvariant,
4302 unsigned Alignment, const MDNode *TBAAInfo,
4303 const MDNode *Ranges) {
4304 assert(Chain.getValueType() == MVT::Other &&
4305 "Invalid chain type");
4306 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4307 Alignment = getEVTAlignment(VT);
4309 unsigned Flags = MachineMemOperand::MOLoad;
4311 Flags |= MachineMemOperand::MOVolatile;
4313 Flags |= MachineMemOperand::MONonTemporal;
4315 Flags |= MachineMemOperand::MOInvariant;
4317 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4320 PtrInfo = InferPointerInfo(Ptr, Offset);
4322 MachineFunction &MF = getMachineFunction();
4323 MachineMemOperand *MMO =
4324 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4326 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4330 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4331 EVT VT, DebugLoc dl, SDValue Chain,
4332 SDValue Ptr, SDValue Offset, EVT MemVT,
4333 MachineMemOperand *MMO) {
4335 ExtType = ISD::NON_EXTLOAD;
4336 } else if (ExtType == ISD::NON_EXTLOAD) {
4337 assert(VT == MemVT && "Non-extending load from different memory type!");
4340 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4341 "Should only be an extending load, not truncating!");
4342 assert(VT.isInteger() == MemVT.isInteger() &&
4343 "Cannot convert from FP to Int or Int -> FP!");
4344 assert(VT.isVector() == MemVT.isVector() &&
4345 "Cannot use trunc store to convert to or from a vector!");
4346 assert((!VT.isVector() ||
4347 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4348 "Cannot use trunc store to change the number of vector elements!");
4351 bool Indexed = AM != ISD::UNINDEXED;
4352 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4353 "Unindexed load with an offset!");
4355 SDVTList VTs = Indexed ?
4356 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4357 SDValue Ops[] = { Chain, Ptr, Offset };
4358 FoldingSetNodeID ID;
4359 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4360 ID.AddInteger(MemVT.getRawBits());
4361 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4362 MMO->isNonTemporal(),
4363 MMO->isInvariant()));
4364 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4367 cast<LoadSDNode>(E)->refineAlignment(MMO);
4368 return SDValue(E, 0);
4370 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4372 CSEMap.InsertNode(N, IP);
4373 AllNodes.push_back(N);
4374 return SDValue(N, 0);
4377 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4378 SDValue Chain, SDValue Ptr,
4379 MachinePointerInfo PtrInfo,
4380 bool isVolatile, bool isNonTemporal,
4381 bool isInvariant, unsigned Alignment,
4382 const MDNode *TBAAInfo,
4383 const MDNode *Ranges) {
4384 SDValue Undef = getUNDEF(Ptr.getValueType());
4385 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4386 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4390 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4391 SDValue Chain, SDValue Ptr,
4392 MachinePointerInfo PtrInfo, EVT MemVT,
4393 bool isVolatile, bool isNonTemporal,
4394 unsigned Alignment, const MDNode *TBAAInfo) {
4395 SDValue Undef = getUNDEF(Ptr.getValueType());
4396 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4397 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4403 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4404 SDValue Offset, ISD::MemIndexedMode AM) {
4405 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4406 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4407 "Load is already a indexed load!");
4408 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4409 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4410 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4411 false, LD->getAlignment());
4414 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4415 SDValue Ptr, MachinePointerInfo PtrInfo,
4416 bool isVolatile, bool isNonTemporal,
4417 unsigned Alignment, const MDNode *TBAAInfo) {
4418 assert(Chain.getValueType() == MVT::Other &&
4419 "Invalid chain type");
4420 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4421 Alignment = getEVTAlignment(Val.getValueType());
4423 unsigned Flags = MachineMemOperand::MOStore;
4425 Flags |= MachineMemOperand::MOVolatile;
4427 Flags |= MachineMemOperand::MONonTemporal;
4430 PtrInfo = InferPointerInfo(Ptr);
4432 MachineFunction &MF = getMachineFunction();
4433 MachineMemOperand *MMO =
4434 MF.getMachineMemOperand(PtrInfo, Flags,
4435 Val.getValueType().getStoreSize(), Alignment,
4438 return getStore(Chain, dl, Val, Ptr, MMO);
4441 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4442 SDValue Ptr, MachineMemOperand *MMO) {
4443 assert(Chain.getValueType() == MVT::Other &&
4444 "Invalid chain type");
4445 EVT VT = Val.getValueType();
4446 SDVTList VTs = getVTList(MVT::Other);
4447 SDValue Undef = getUNDEF(Ptr.getValueType());
4448 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4449 FoldingSetNodeID ID;
4450 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4451 ID.AddInteger(VT.getRawBits());
4452 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4453 MMO->isNonTemporal(), MMO->isInvariant()));
4454 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4457 cast<StoreSDNode>(E)->refineAlignment(MMO);
4458 return SDValue(E, 0);
4460 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4462 CSEMap.InsertNode(N, IP);
4463 AllNodes.push_back(N);
4464 return SDValue(N, 0);
4467 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4468 SDValue Ptr, MachinePointerInfo PtrInfo,
4469 EVT SVT,bool isVolatile, bool isNonTemporal,
4471 const MDNode *TBAAInfo) {
4472 assert(Chain.getValueType() == MVT::Other &&
4473 "Invalid chain type");
4474 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4475 Alignment = getEVTAlignment(SVT);
4477 unsigned Flags = MachineMemOperand::MOStore;
4479 Flags |= MachineMemOperand::MOVolatile;
4481 Flags |= MachineMemOperand::MONonTemporal;
4484 PtrInfo = InferPointerInfo(Ptr);
4486 MachineFunction &MF = getMachineFunction();
4487 MachineMemOperand *MMO =
4488 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4491 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4494 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4495 SDValue Ptr, EVT SVT,
4496 MachineMemOperand *MMO) {
4497 EVT VT = Val.getValueType();
4499 assert(Chain.getValueType() == MVT::Other &&
4500 "Invalid chain type");
4502 return getStore(Chain, dl, Val, Ptr, MMO);
4504 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4505 "Should only be a truncating store, not extending!");
4506 assert(VT.isInteger() == SVT.isInteger() &&
4507 "Can't do FP-INT conversion!");
4508 assert(VT.isVector() == SVT.isVector() &&
4509 "Cannot use trunc store to convert to or from a vector!");
4510 assert((!VT.isVector() ||
4511 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4512 "Cannot use trunc store to change the number of vector elements!");
4514 SDVTList VTs = getVTList(MVT::Other);
4515 SDValue Undef = getUNDEF(Ptr.getValueType());
4516 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4517 FoldingSetNodeID ID;
4518 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4519 ID.AddInteger(SVT.getRawBits());
4520 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4521 MMO->isNonTemporal(), MMO->isInvariant()));
4522 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4524 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4525 cast<StoreSDNode>(E)->refineAlignment(MMO);
4526 return SDValue(E, 0);
4528 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4530 CSEMap.InsertNode(N, IP);
4531 AllNodes.push_back(N);
4532 return SDValue(N, 0);
4536 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4537 SDValue Offset, ISD::MemIndexedMode AM) {
4538 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4539 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4540 "Store is already a indexed store!");
4541 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4542 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4543 FoldingSetNodeID ID;
4544 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4545 ID.AddInteger(ST->getMemoryVT().getRawBits());
4546 ID.AddInteger(ST->getRawSubclassData());
4547 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4549 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4550 return SDValue(E, 0);
4552 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4553 ST->isTruncatingStore(),
4555 ST->getMemOperand());
4556 CSEMap.InsertNode(N, IP);
4557 AllNodes.push_back(N);
4558 return SDValue(N, 0);
4561 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4562 SDValue Chain, SDValue Ptr,
4565 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4566 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4569 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4570 const SDUse *Ops, unsigned NumOps) {
4572 case 0: return getNode(Opcode, DL, VT);
4573 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4574 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4575 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4579 // Copy from an SDUse array into an SDValue array for use with
4580 // the regular getNode logic.
4581 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4582 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4585 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4586 const SDValue *Ops, unsigned NumOps) {
4588 case 0: return getNode(Opcode, DL, VT);
4589 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4590 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4591 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4597 case ISD::SELECT_CC: {
4598 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4599 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4600 "LHS and RHS of condition must have same type!");
4601 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4602 "True and False arms of SelectCC must have same type!");
4603 assert(Ops[2].getValueType() == VT &&
4604 "select_cc node must be of same type as true and false value!");
4608 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4609 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4610 "LHS/RHS of comparison should match types!");
4617 SDVTList VTs = getVTList(VT);
4619 if (VT != MVT::Glue) {
4620 FoldingSetNodeID ID;
4621 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4625 return SDValue(E, 0);
4627 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4628 CSEMap.InsertNode(N, IP);
4630 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4633 AllNodes.push_back(N);
4637 return SDValue(N, 0);
4640 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4641 const std::vector<EVT> &ResultTys,
4642 const SDValue *Ops, unsigned NumOps) {
4643 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4647 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4648 const EVT *VTs, unsigned NumVTs,
4649 const SDValue *Ops, unsigned NumOps) {
4651 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4652 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4655 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4656 const SDValue *Ops, unsigned NumOps) {
4657 if (VTList.NumVTs == 1)
4658 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4662 // FIXME: figure out how to safely handle things like
4663 // int foo(int x) { return 1 << (x & 255); }
4664 // int bar() { return foo(256); }
4665 case ISD::SRA_PARTS:
4666 case ISD::SRL_PARTS:
4667 case ISD::SHL_PARTS:
4668 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4669 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4670 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4671 else if (N3.getOpcode() == ISD::AND)
4672 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4673 // If the and is only masking out bits that cannot effect the shift,
4674 // eliminate the and.
4675 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4676 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4677 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4683 // Memoize the node unless it returns a flag.
4685 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4686 FoldingSetNodeID ID;
4687 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4689 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4690 return SDValue(E, 0);
4693 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4694 } else if (NumOps == 2) {
4695 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4696 } else if (NumOps == 3) {
4697 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4700 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4702 CSEMap.InsertNode(N, IP);
4705 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4706 } else if (NumOps == 2) {
4707 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4708 } else if (NumOps == 3) {
4709 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4712 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4715 AllNodes.push_back(N);
4719 return SDValue(N, 0);
4722 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4723 return getNode(Opcode, DL, VTList, 0, 0);
4726 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4728 SDValue Ops[] = { N1 };
4729 return getNode(Opcode, DL, VTList, Ops, 1);
4732 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4733 SDValue N1, SDValue N2) {
4734 SDValue Ops[] = { N1, N2 };
4735 return getNode(Opcode, DL, VTList, Ops, 2);
4738 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4739 SDValue N1, SDValue N2, SDValue N3) {
4740 SDValue Ops[] = { N1, N2, N3 };
4741 return getNode(Opcode, DL, VTList, Ops, 3);
4744 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4745 SDValue N1, SDValue N2, SDValue N3,
4747 SDValue Ops[] = { N1, N2, N3, N4 };
4748 return getNode(Opcode, DL, VTList, Ops, 4);
4751 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4752 SDValue N1, SDValue N2, SDValue N3,
4753 SDValue N4, SDValue N5) {
4754 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4755 return getNode(Opcode, DL, VTList, Ops, 5);
4758 SDVTList SelectionDAG::getVTList(EVT VT) {
4759 return makeVTList(SDNode::getValueTypeList(VT), 1);
4762 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4763 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4764 E = VTList.rend(); I != E; ++I)
4765 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4768 EVT *Array = Allocator.Allocate<EVT>(2);
4771 SDVTList Result = makeVTList(Array, 2);
4772 VTList.push_back(Result);
4776 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4777 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4778 E = VTList.rend(); I != E; ++I)
4779 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4783 EVT *Array = Allocator.Allocate<EVT>(3);
4787 SDVTList Result = makeVTList(Array, 3);
4788 VTList.push_back(Result);
4792 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4793 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4794 E = VTList.rend(); I != E; ++I)
4795 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4796 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4799 EVT *Array = Allocator.Allocate<EVT>(4);
4804 SDVTList Result = makeVTList(Array, 4);
4805 VTList.push_back(Result);
4809 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4811 case 0: llvm_unreachable("Cannot have nodes without results!");
4812 case 1: return getVTList(VTs[0]);
4813 case 2: return getVTList(VTs[0], VTs[1]);
4814 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4815 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4819 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4820 E = VTList.rend(); I != E; ++I) {
4821 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4824 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4828 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4829 std::copy(VTs, VTs+NumVTs, Array);
4830 SDVTList Result = makeVTList(Array, NumVTs);
4831 VTList.push_back(Result);
4836 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4837 /// specified operands. If the resultant node already exists in the DAG,
4838 /// this does not modify the specified node, instead it returns the node that
4839 /// already exists. If the resultant node does not exist in the DAG, the
4840 /// input node is returned. As a degenerate case, if you specify the same
4841 /// input operands as the node already has, the input node is returned.
4842 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4843 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4845 // Check to see if there is no change.
4846 if (Op == N->getOperand(0)) return N;
4848 // See if the modified node already exists.
4849 void *InsertPos = 0;
4850 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4853 // Nope it doesn't. Remove the node from its current place in the maps.
4855 if (!RemoveNodeFromCSEMaps(N))
4858 // Now we update the operands.
4859 N->OperandList[0].set(Op);
4861 // If this gets put into a CSE map, add it.
4862 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4866 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4867 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4869 // Check to see if there is no change.
4870 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4871 return N; // No operands changed, just return the input node.
4873 // See if the modified node already exists.
4874 void *InsertPos = 0;
4875 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4878 // Nope it doesn't. Remove the node from its current place in the maps.
4880 if (!RemoveNodeFromCSEMaps(N))
4883 // Now we update the operands.
4884 if (N->OperandList[0] != Op1)
4885 N->OperandList[0].set(Op1);
4886 if (N->OperandList[1] != Op2)
4887 N->OperandList[1].set(Op2);
4889 // If this gets put into a CSE map, add it.
4890 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4894 SDNode *SelectionDAG::
4895 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4896 SDValue Ops[] = { Op1, Op2, Op3 };
4897 return UpdateNodeOperands(N, Ops, 3);
4900 SDNode *SelectionDAG::
4901 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4902 SDValue Op3, SDValue Op4) {
4903 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4904 return UpdateNodeOperands(N, Ops, 4);
4907 SDNode *SelectionDAG::
4908 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4909 SDValue Op3, SDValue Op4, SDValue Op5) {
4910 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4911 return UpdateNodeOperands(N, Ops, 5);
4914 SDNode *SelectionDAG::
4915 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4916 assert(N->getNumOperands() == NumOps &&
4917 "Update with wrong number of operands");
4919 // Check to see if there is no change.
4920 bool AnyChange = false;
4921 for (unsigned i = 0; i != NumOps; ++i) {
4922 if (Ops[i] != N->getOperand(i)) {
4928 // No operands changed, just return the input node.
4929 if (!AnyChange) return N;
4931 // See if the modified node already exists.
4932 void *InsertPos = 0;
4933 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4936 // Nope it doesn't. Remove the node from its current place in the maps.
4938 if (!RemoveNodeFromCSEMaps(N))
4941 // Now we update the operands.
4942 for (unsigned i = 0; i != NumOps; ++i)
4943 if (N->OperandList[i] != Ops[i])
4944 N->OperandList[i].set(Ops[i]);
4946 // If this gets put into a CSE map, add it.
4947 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4951 /// DropOperands - Release the operands and set this node to have
4953 void SDNode::DropOperands() {
4954 // Unlike the code in MorphNodeTo that does this, we don't need to
4955 // watch for dead nodes here.
4956 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4962 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4965 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4967 SDVTList VTs = getVTList(VT);
4968 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4971 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4972 EVT VT, SDValue Op1) {
4973 SDVTList VTs = getVTList(VT);
4974 SDValue Ops[] = { Op1 };
4975 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4978 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4979 EVT VT, SDValue Op1,
4981 SDVTList VTs = getVTList(VT);
4982 SDValue Ops[] = { Op1, Op2 };
4983 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4986 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4987 EVT VT, SDValue Op1,
4988 SDValue Op2, SDValue Op3) {
4989 SDVTList VTs = getVTList(VT);
4990 SDValue Ops[] = { Op1, Op2, Op3 };
4991 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4994 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4995 EVT VT, const SDValue *Ops,
4997 SDVTList VTs = getVTList(VT);
4998 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5001 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5002 EVT VT1, EVT VT2, const SDValue *Ops,
5004 SDVTList VTs = getVTList(VT1, VT2);
5005 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5008 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5010 SDVTList VTs = getVTList(VT1, VT2);
5011 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5014 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5015 EVT VT1, EVT VT2, EVT VT3,
5016 const SDValue *Ops, unsigned NumOps) {
5017 SDVTList VTs = getVTList(VT1, VT2, VT3);
5018 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5021 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5022 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5023 const SDValue *Ops, unsigned NumOps) {
5024 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5025 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5028 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5031 SDVTList VTs = getVTList(VT1, VT2);
5032 SDValue Ops[] = { Op1 };
5033 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5036 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5038 SDValue Op1, SDValue Op2) {
5039 SDVTList VTs = getVTList(VT1, VT2);
5040 SDValue Ops[] = { Op1, Op2 };
5041 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5044 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5046 SDValue Op1, SDValue Op2,
5048 SDVTList VTs = getVTList(VT1, VT2);
5049 SDValue Ops[] = { Op1, Op2, Op3 };
5050 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5053 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5054 EVT VT1, EVT VT2, EVT VT3,
5055 SDValue Op1, SDValue Op2,
5057 SDVTList VTs = getVTList(VT1, VT2, VT3);
5058 SDValue Ops[] = { Op1, Op2, Op3 };
5059 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5062 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5063 SDVTList VTs, const SDValue *Ops,
5065 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5066 // Reset the NodeID to -1.
5071 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5072 /// the line number information on the merged node since it is not possible to
5073 /// preserve the information that operation is associated with multiple lines.
5074 /// This will make the debugger working better at -O0, were there is a higher
5075 /// probability having other instructions associated with that line.
5077 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5078 DebugLoc NLoc = N->getDebugLoc();
5079 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5080 N->setDebugLoc(DebugLoc());
5085 /// MorphNodeTo - This *mutates* the specified node to have the specified
5086 /// return type, opcode, and operands.
5088 /// Note that MorphNodeTo returns the resultant node. If there is already a
5089 /// node of the specified opcode and operands, it returns that node instead of
5090 /// the current one. Note that the DebugLoc need not be the same.
5092 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5093 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5094 /// node, and because it doesn't require CSE recalculation for any of
5095 /// the node's users.
5097 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5098 SDVTList VTs, const SDValue *Ops,
5100 // If an identical node already exists, use it.
5102 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5103 FoldingSetNodeID ID;
5104 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5105 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5106 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5109 if (!RemoveNodeFromCSEMaps(N))
5112 // Start the morphing.
5114 N->ValueList = VTs.VTs;
5115 N->NumValues = VTs.NumVTs;
5117 // Clear the operands list, updating used nodes to remove this from their
5118 // use list. Keep track of any operands that become dead as a result.
5119 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5120 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5122 SDNode *Used = Use.getNode();
5124 if (Used->use_empty())
5125 DeadNodeSet.insert(Used);
5128 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5129 // Initialize the memory references information.
5130 MN->setMemRefs(0, 0);
5131 // If NumOps is larger than the # of operands we can have in a
5132 // MachineSDNode, reallocate the operand list.
5133 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5134 if (MN->OperandsNeedDelete)
5135 delete[] MN->OperandList;
5136 if (NumOps > array_lengthof(MN->LocalOperands))
5137 // We're creating a final node that will live unmorphed for the
5138 // remainder of the current SelectionDAG iteration, so we can allocate
5139 // the operands directly out of a pool with no recycling metadata.
5140 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5143 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5144 MN->OperandsNeedDelete = false;
5146 MN->InitOperands(MN->OperandList, Ops, NumOps);
5148 // If NumOps is larger than the # of operands we currently have, reallocate
5149 // the operand list.
5150 if (NumOps > N->NumOperands) {
5151 if (N->OperandsNeedDelete)
5152 delete[] N->OperandList;
5153 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5154 N->OperandsNeedDelete = true;
5156 N->InitOperands(N->OperandList, Ops, NumOps);
5159 // Delete any nodes that are still dead after adding the uses for the
5161 if (!DeadNodeSet.empty()) {
5162 SmallVector<SDNode *, 16> DeadNodes;
5163 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5164 E = DeadNodeSet.end(); I != E; ++I)
5165 if ((*I)->use_empty())
5166 DeadNodes.push_back(*I);
5167 RemoveDeadNodes(DeadNodes);
5171 CSEMap.InsertNode(N, IP); // Memoize the new node.
5176 /// getMachineNode - These are used for target selectors to create a new node
5177 /// with specified return type(s), MachineInstr opcode, and operands.
5179 /// Note that getMachineNode returns the resultant node. If there is already a
5180 /// node of the specified opcode and operands, it returns that node instead of
5181 /// the current one.
5183 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5184 SDVTList VTs = getVTList(VT);
5185 return getMachineNode(Opcode, dl, VTs, 0, 0);
5189 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5190 SDVTList VTs = getVTList(VT);
5191 SDValue Ops[] = { Op1 };
5192 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5196 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5197 SDValue Op1, SDValue Op2) {
5198 SDVTList VTs = getVTList(VT);
5199 SDValue Ops[] = { Op1, Op2 };
5200 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5204 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5205 SDValue Op1, SDValue Op2, SDValue Op3) {
5206 SDVTList VTs = getVTList(VT);
5207 SDValue Ops[] = { Op1, Op2, Op3 };
5208 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5212 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5213 const SDValue *Ops, unsigned NumOps) {
5214 SDVTList VTs = getVTList(VT);
5215 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5219 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5220 SDVTList VTs = getVTList(VT1, VT2);
5221 return getMachineNode(Opcode, dl, VTs, 0, 0);
5225 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5226 EVT VT1, EVT VT2, SDValue Op1) {
5227 SDVTList VTs = getVTList(VT1, VT2);
5228 SDValue Ops[] = { Op1 };
5229 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5233 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5234 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5235 SDVTList VTs = getVTList(VT1, VT2);
5236 SDValue Ops[] = { Op1, Op2 };
5237 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5241 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5242 EVT VT1, EVT VT2, SDValue Op1,
5243 SDValue Op2, SDValue Op3) {
5244 SDVTList VTs = getVTList(VT1, VT2);
5245 SDValue Ops[] = { Op1, Op2, Op3 };
5246 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5250 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5252 const SDValue *Ops, unsigned NumOps) {
5253 SDVTList VTs = getVTList(VT1, VT2);
5254 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5258 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5259 EVT VT1, EVT VT2, EVT VT3,
5260 SDValue Op1, SDValue Op2) {
5261 SDVTList VTs = getVTList(VT1, VT2, VT3);
5262 SDValue Ops[] = { Op1, Op2 };
5263 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5267 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5268 EVT VT1, EVT VT2, EVT VT3,
5269 SDValue Op1, SDValue Op2, SDValue Op3) {
5270 SDVTList VTs = getVTList(VT1, VT2, VT3);
5271 SDValue Ops[] = { Op1, Op2, Op3 };
5272 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5276 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5277 EVT VT1, EVT VT2, EVT VT3,
5278 const SDValue *Ops, unsigned NumOps) {
5279 SDVTList VTs = getVTList(VT1, VT2, VT3);
5280 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5284 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5285 EVT VT2, EVT VT3, EVT VT4,
5286 const SDValue *Ops, unsigned NumOps) {
5287 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5288 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5292 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5293 const std::vector<EVT> &ResultTys,
5294 const SDValue *Ops, unsigned NumOps) {
5295 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5296 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5300 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5301 const SDValue *Ops, unsigned NumOps) {
5302 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5307 FoldingSetNodeID ID;
5308 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5310 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5311 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5315 // Allocate a new MachineSDNode.
5316 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5318 // Initialize the operands list.
5319 if (NumOps > array_lengthof(N->LocalOperands))
5320 // We're creating a final node that will live unmorphed for the
5321 // remainder of the current SelectionDAG iteration, so we can allocate
5322 // the operands directly out of a pool with no recycling metadata.
5323 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5326 N->InitOperands(N->LocalOperands, Ops, NumOps);
5327 N->OperandsNeedDelete = false;
5330 CSEMap.InsertNode(N, IP);
5332 AllNodes.push_back(N);
5334 VerifyMachineNode(N);
5339 /// getTargetExtractSubreg - A convenience function for creating
5340 /// TargetOpcode::EXTRACT_SUBREG nodes.
5342 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5344 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5345 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5346 VT, Operand, SRIdxVal);
5347 return SDValue(Subreg, 0);
5350 /// getTargetInsertSubreg - A convenience function for creating
5351 /// TargetOpcode::INSERT_SUBREG nodes.
5353 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5354 SDValue Operand, SDValue Subreg) {
5355 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5356 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5357 VT, Operand, Subreg, SRIdxVal);
5358 return SDValue(Result, 0);
5361 /// getNodeIfExists - Get the specified node if it's already available, or
5362 /// else return NULL.
5363 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5364 const SDValue *Ops, unsigned NumOps) {
5365 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5366 FoldingSetNodeID ID;
5367 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5375 /// getDbgValue - Creates a SDDbgValue node.
5378 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5379 DebugLoc DL, unsigned O) {
5380 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5384 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5385 DebugLoc DL, unsigned O) {
5386 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5390 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5391 DebugLoc DL, unsigned O) {
5392 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5397 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5398 /// pointed to by a use iterator is deleted, increment the use iterator
5399 /// so that it doesn't dangle.
5401 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5402 SDNode::use_iterator &UI;
5403 SDNode::use_iterator &UE;
5405 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5406 // Increment the iterator as needed.
5407 while (UI != UE && N == *UI)
5412 RAUWUpdateListener(SelectionDAG &d,
5413 SDNode::use_iterator &ui,
5414 SDNode::use_iterator &ue)
5415 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5420 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5421 /// This can cause recursive merging of nodes in the DAG.
5423 /// This version assumes From has a single result value.
5425 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5426 SDNode *From = FromN.getNode();
5427 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5428 "Cannot replace with this method!");
5429 assert(From != To.getNode() && "Cannot replace uses of with self");
5431 // Iterate over all the existing uses of From. New uses will be added
5432 // to the beginning of the use list, which we avoid visiting.
5433 // This specifically avoids visiting uses of From that arise while the
5434 // replacement is happening, because any such uses would be the result
5435 // of CSE: If an existing node looks like From after one of its operands
5436 // is replaced by To, we don't want to replace of all its users with To
5437 // too. See PR3018 for more info.
5438 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5439 RAUWUpdateListener Listener(*this, UI, UE);
5443 // This node is about to morph, remove its old self from the CSE maps.
5444 RemoveNodeFromCSEMaps(User);
5446 // A user can appear in a use list multiple times, and when this
5447 // happens the uses are usually next to each other in the list.
5448 // To help reduce the number of CSE recomputations, process all
5449 // the uses of this user that we can find this way.
5451 SDUse &Use = UI.getUse();
5454 } while (UI != UE && *UI == User);
5456 // Now that we have modified User, add it back to the CSE maps. If it
5457 // already exists there, recursively merge the results together.
5458 AddModifiedNodeToCSEMaps(User);
5461 // If we just RAUW'd the root, take note.
5462 if (FromN == getRoot())
5466 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5467 /// This can cause recursive merging of nodes in the DAG.
5469 /// This version assumes that for each value of From, there is a
5470 /// corresponding value in To in the same position with the same type.
5472 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5474 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5475 assert((!From->hasAnyUseOfValue(i) ||
5476 From->getValueType(i) == To->getValueType(i)) &&
5477 "Cannot use this version of ReplaceAllUsesWith!");
5480 // Handle the trivial case.
5484 // Iterate over just the existing users of From. See the comments in
5485 // the ReplaceAllUsesWith above.
5486 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5487 RAUWUpdateListener Listener(*this, UI, UE);
5491 // This node is about to morph, remove its old self from the CSE maps.
5492 RemoveNodeFromCSEMaps(User);
5494 // A user can appear in a use list multiple times, and when this
5495 // happens the uses are usually next to each other in the list.
5496 // To help reduce the number of CSE recomputations, process all
5497 // the uses of this user that we can find this way.
5499 SDUse &Use = UI.getUse();
5502 } while (UI != UE && *UI == User);
5504 // Now that we have modified User, add it back to the CSE maps. If it
5505 // already exists there, recursively merge the results together.
5506 AddModifiedNodeToCSEMaps(User);
5509 // If we just RAUW'd the root, take note.
5510 if (From == getRoot().getNode())
5511 setRoot(SDValue(To, getRoot().getResNo()));
5514 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5515 /// This can cause recursive merging of nodes in the DAG.
5517 /// This version can replace From with any result values. To must match the
5518 /// number and types of values returned by From.
5519 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5520 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5521 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5523 // Iterate over just the existing users of From. See the comments in
5524 // the ReplaceAllUsesWith above.
5525 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5526 RAUWUpdateListener Listener(*this, UI, UE);
5530 // This node is about to morph, remove its old self from the CSE maps.
5531 RemoveNodeFromCSEMaps(User);
5533 // A user can appear in a use list multiple times, and when this
5534 // happens the uses are usually next to each other in the list.
5535 // To help reduce the number of CSE recomputations, process all
5536 // the uses of this user that we can find this way.
5538 SDUse &Use = UI.getUse();
5539 const SDValue &ToOp = To[Use.getResNo()];
5542 } while (UI != UE && *UI == User);
5544 // Now that we have modified User, add it back to the CSE maps. If it
5545 // already exists there, recursively merge the results together.
5546 AddModifiedNodeToCSEMaps(User);
5549 // If we just RAUW'd the root, take note.
5550 if (From == getRoot().getNode())
5551 setRoot(SDValue(To[getRoot().getResNo()]));
5554 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5555 /// uses of other values produced by From.getNode() alone. The Deleted
5556 /// vector is handled the same way as for ReplaceAllUsesWith.
5557 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5558 // Handle the really simple, really trivial case efficiently.
5559 if (From == To) return;
5561 // Handle the simple, trivial, case efficiently.
5562 if (From.getNode()->getNumValues() == 1) {
5563 ReplaceAllUsesWith(From, To);
5567 // Iterate over just the existing users of From. See the comments in
5568 // the ReplaceAllUsesWith above.
5569 SDNode::use_iterator UI = From.getNode()->use_begin(),
5570 UE = From.getNode()->use_end();
5571 RAUWUpdateListener Listener(*this, UI, UE);
5574 bool UserRemovedFromCSEMaps = false;
5576 // A user can appear in a use list multiple times, and when this
5577 // happens the uses are usually next to each other in the list.
5578 // To help reduce the number of CSE recomputations, process all
5579 // the uses of this user that we can find this way.
5581 SDUse &Use = UI.getUse();
5583 // Skip uses of different values from the same node.
5584 if (Use.getResNo() != From.getResNo()) {
5589 // If this node hasn't been modified yet, it's still in the CSE maps,
5590 // so remove its old self from the CSE maps.
5591 if (!UserRemovedFromCSEMaps) {
5592 RemoveNodeFromCSEMaps(User);
5593 UserRemovedFromCSEMaps = true;
5598 } while (UI != UE && *UI == User);
5600 // We are iterating over all uses of the From node, so if a use
5601 // doesn't use the specific value, no changes are made.
5602 if (!UserRemovedFromCSEMaps)
5605 // Now that we have modified User, add it back to the CSE maps. If it
5606 // already exists there, recursively merge the results together.
5607 AddModifiedNodeToCSEMaps(User);
5610 // If we just RAUW'd the root, take note.
5611 if (From == getRoot())
5616 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5617 /// to record information about a use.
5624 /// operator< - Sort Memos by User.
5625 bool operator<(const UseMemo &L, const UseMemo &R) {
5626 return (intptr_t)L.User < (intptr_t)R.User;
5630 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5631 /// uses of other values produced by From.getNode() alone. The same value
5632 /// may appear in both the From and To list. The Deleted vector is
5633 /// handled the same way as for ReplaceAllUsesWith.
5634 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5637 // Handle the simple, trivial case efficiently.
5639 return ReplaceAllUsesOfValueWith(*From, *To);
5641 // Read up all the uses and make records of them. This helps
5642 // processing new uses that are introduced during the
5643 // replacement process.
5644 SmallVector<UseMemo, 4> Uses;
5645 for (unsigned i = 0; i != Num; ++i) {
5646 unsigned FromResNo = From[i].getResNo();
5647 SDNode *FromNode = From[i].getNode();
5648 for (SDNode::use_iterator UI = FromNode->use_begin(),
5649 E = FromNode->use_end(); UI != E; ++UI) {
5650 SDUse &Use = UI.getUse();
5651 if (Use.getResNo() == FromResNo) {
5652 UseMemo Memo = { *UI, i, &Use };
5653 Uses.push_back(Memo);
5658 // Sort the uses, so that all the uses from a given User are together.
5659 std::sort(Uses.begin(), Uses.end());
5661 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5662 UseIndex != UseIndexEnd; ) {
5663 // We know that this user uses some value of From. If it is the right
5664 // value, update it.
5665 SDNode *User = Uses[UseIndex].User;
5667 // This node is about to morph, remove its old self from the CSE maps.
5668 RemoveNodeFromCSEMaps(User);
5670 // The Uses array is sorted, so all the uses for a given User
5671 // are next to each other in the list.
5672 // To help reduce the number of CSE recomputations, process all
5673 // the uses of this user that we can find this way.
5675 unsigned i = Uses[UseIndex].Index;
5676 SDUse &Use = *Uses[UseIndex].Use;
5680 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5682 // Now that we have modified User, add it back to the CSE maps. If it
5683 // already exists there, recursively merge the results together.
5684 AddModifiedNodeToCSEMaps(User);
5688 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5689 /// based on their topological order. It returns the maximum id and a vector
5690 /// of the SDNodes* in assigned order by reference.
5691 unsigned SelectionDAG::AssignTopologicalOrder() {
5693 unsigned DAGSize = 0;
5695 // SortedPos tracks the progress of the algorithm. Nodes before it are
5696 // sorted, nodes after it are unsorted. When the algorithm completes
5697 // it is at the end of the list.
5698 allnodes_iterator SortedPos = allnodes_begin();
5700 // Visit all the nodes. Move nodes with no operands to the front of
5701 // the list immediately. Annotate nodes that do have operands with their
5702 // operand count. Before we do this, the Node Id fields of the nodes
5703 // may contain arbitrary values. After, the Node Id fields for nodes
5704 // before SortedPos will contain the topological sort index, and the
5705 // Node Id fields for nodes At SortedPos and after will contain the
5706 // count of outstanding operands.
5707 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5710 unsigned Degree = N->getNumOperands();
5712 // A node with no uses, add it to the result array immediately.
5713 N->setNodeId(DAGSize++);
5714 allnodes_iterator Q = N;
5716 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5717 assert(SortedPos != AllNodes.end() && "Overran node list");
5720 // Temporarily use the Node Id as scratch space for the degree count.
5721 N->setNodeId(Degree);
5725 // Visit all the nodes. As we iterate, move nodes into sorted order,
5726 // such that by the time the end is reached all nodes will be sorted.
5727 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5730 // N is in sorted position, so all its uses have one less operand
5731 // that needs to be sorted.
5732 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5735 unsigned Degree = P->getNodeId();
5736 assert(Degree != 0 && "Invalid node degree");
5739 // All of P's operands are sorted, so P may sorted now.
5740 P->setNodeId(DAGSize++);
5742 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5743 assert(SortedPos != AllNodes.end() && "Overran node list");
5746 // Update P's outstanding operand count.
5747 P->setNodeId(Degree);
5750 if (I == SortedPos) {
5753 dbgs() << "Overran sorted position:\n";
5756 llvm_unreachable(0);
5760 assert(SortedPos == AllNodes.end() &&
5761 "Topological sort incomplete!");
5762 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5763 "First node in topological sort is not the entry token!");
5764 assert(AllNodes.front().getNodeId() == 0 &&
5765 "First node in topological sort has non-zero id!");
5766 assert(AllNodes.front().getNumOperands() == 0 &&
5767 "First node in topological sort has operands!");
5768 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5769 "Last node in topologic sort has unexpected id!");
5770 assert(AllNodes.back().use_empty() &&
5771 "Last node in topologic sort has users!");
5772 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5776 /// AssignOrdering - Assign an order to the SDNode.
5777 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5778 assert(SD && "Trying to assign an order to a null node!");
5779 Ordering->add(SD, Order);
5782 /// GetOrdering - Get the order for the SDNode.
5783 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5784 assert(SD && "Trying to get the order of a null node!");
5785 return Ordering->getOrder(SD);
5788 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5789 /// value is produced by SD.
5790 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5791 DbgInfo->add(DB, SD, isParameter);
5793 SD->setHasDebugValue(true);
5796 /// TransferDbgValues - Transfer SDDbgValues.
5797 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5798 if (From == To || !From.getNode()->getHasDebugValue())
5800 SDNode *FromNode = From.getNode();
5801 SDNode *ToNode = To.getNode();
5802 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5803 SmallVector<SDDbgValue *, 2> ClonedDVs;
5804 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5806 SDDbgValue *Dbg = *I;
5807 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5808 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5809 Dbg->getOffset(), Dbg->getDebugLoc(),
5811 ClonedDVs.push_back(Clone);
5814 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5815 E = ClonedDVs.end(); I != E; ++I)
5816 AddDbgValue(*I, ToNode, false);
5819 //===----------------------------------------------------------------------===//
5821 //===----------------------------------------------------------------------===//
5823 HandleSDNode::~HandleSDNode() {
5827 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5828 const GlobalValue *GA,
5829 EVT VT, int64_t o, unsigned char TF)
5830 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5834 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5835 MachineMemOperand *mmo)
5836 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5837 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5838 MMO->isNonTemporal(), MMO->isInvariant());
5839 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5840 assert(isNonTemporal() == MMO->isNonTemporal() &&
5841 "Non-temporal encoding error!");
5842 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5845 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5846 const SDValue *Ops, unsigned NumOps, EVT memvt,
5847 MachineMemOperand *mmo)
5848 : SDNode(Opc, dl, VTs, Ops, NumOps),
5849 MemoryVT(memvt), MMO(mmo) {
5850 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5851 MMO->isNonTemporal(), MMO->isInvariant());
5852 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5853 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5856 /// Profile - Gather unique data for the node.
5858 void SDNode::Profile(FoldingSetNodeID &ID) const {
5859 AddNodeIDNode(ID, this);
5864 std::vector<EVT> VTs;
5867 VTs.reserve(MVT::LAST_VALUETYPE);
5868 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5869 VTs.push_back(MVT((MVT::SimpleValueType)i));
5874 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5875 static ManagedStatic<EVTArray> SimpleVTArray;
5876 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5878 /// getValueTypeList - Return a pointer to the specified value type.
5880 const EVT *SDNode::getValueTypeList(EVT VT) {
5881 if (VT.isExtended()) {
5882 sys::SmartScopedLock<true> Lock(*VTMutex);
5883 return &(*EVTs->insert(VT).first);
5885 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5886 "Value type out of range!");
5887 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5891 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5892 /// indicated value. This method ignores uses of other values defined by this
5894 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5895 assert(Value < getNumValues() && "Bad value!");
5897 // TODO: Only iterate over uses of a given value of the node
5898 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5899 if (UI.getUse().getResNo() == Value) {
5906 // Found exactly the right number of uses?
5911 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5912 /// value. This method ignores uses of other values defined by this operation.
5913 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5914 assert(Value < getNumValues() && "Bad value!");
5916 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5917 if (UI.getUse().getResNo() == Value)
5924 /// isOnlyUserOf - Return true if this node is the only use of N.
5926 bool SDNode::isOnlyUserOf(SDNode *N) const {
5928 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5939 /// isOperand - Return true if this node is an operand of N.
5941 bool SDValue::isOperandOf(SDNode *N) const {
5942 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5943 if (*this == N->getOperand(i))
5948 bool SDNode::isOperandOf(SDNode *N) const {
5949 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5950 if (this == N->OperandList[i].getNode())
5955 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5956 /// be a chain) reaches the specified operand without crossing any
5957 /// side-effecting instructions on any chain path. In practice, this looks
5958 /// through token factors and non-volatile loads. In order to remain efficient,
5959 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5960 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5961 unsigned Depth) const {
5962 if (*this == Dest) return true;
5964 // Don't search too deeply, we just want to be able to see through
5965 // TokenFactor's etc.
5966 if (Depth == 0) return false;
5968 // If this is a token factor, all inputs to the TF happen in parallel. If any
5969 // of the operands of the TF does not reach dest, then we cannot do the xform.
5970 if (getOpcode() == ISD::TokenFactor) {
5971 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5972 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5977 // Loads don't have side effects, look through them.
5978 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5979 if (!Ld->isVolatile())
5980 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5985 /// hasPredecessor - Return true if N is a predecessor of this node.
5986 /// N is either an operand of this node, or can be reached by recursively
5987 /// traversing up the operands.
5988 /// NOTE: This is an expensive method. Use it carefully.
5989 bool SDNode::hasPredecessor(const SDNode *N) const {
5990 SmallPtrSet<const SDNode *, 32> Visited;
5991 SmallVector<const SDNode *, 16> Worklist;
5992 return hasPredecessorHelper(N, Visited, Worklist);
5995 bool SDNode::hasPredecessorHelper(const SDNode *N,
5996 SmallPtrSet<const SDNode *, 32> &Visited,
5997 SmallVector<const SDNode *, 16> &Worklist) const {
5998 if (Visited.empty()) {
5999 Worklist.push_back(this);
6001 // Take a look in the visited set. If we've already encountered this node
6002 // we needn't search further.
6003 if (Visited.count(N))
6007 // Haven't visited N yet. Continue the search.
6008 while (!Worklist.empty()) {
6009 const SDNode *M = Worklist.pop_back_val();
6010 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6011 SDNode *Op = M->getOperand(i).getNode();
6012 if (Visited.insert(Op))
6013 Worklist.push_back(Op);
6022 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6023 assert(Num < NumOperands && "Invalid child # of SDNode!");
6024 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6027 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6028 assert(N->getNumValues() == 1 &&
6029 "Can't unroll a vector with multiple results!");
6031 EVT VT = N->getValueType(0);
6032 unsigned NE = VT.getVectorNumElements();
6033 EVT EltVT = VT.getVectorElementType();
6034 DebugLoc dl = N->getDebugLoc();
6036 SmallVector<SDValue, 8> Scalars;
6037 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6039 // If ResNE is 0, fully unroll the vector op.
6042 else if (NE > ResNE)
6046 for (i= 0; i != NE; ++i) {
6047 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6048 SDValue Operand = N->getOperand(j);
6049 EVT OperandVT = Operand.getValueType();
6050 if (OperandVT.isVector()) {
6051 // A vector operand; extract a single element.
6052 EVT OperandEltVT = OperandVT.getVectorElementType();
6053 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6056 getConstant(i, TLI.getPointerTy()));
6058 // A scalar operand; just use it as is.
6059 Operands[j] = Operand;
6063 switch (N->getOpcode()) {
6065 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6066 &Operands[0], Operands.size()));
6069 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6070 &Operands[0], Operands.size()));
6077 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6078 getShiftAmountOperand(Operands[0].getValueType(),
6081 case ISD::SIGN_EXTEND_INREG:
6082 case ISD::FP_ROUND_INREG: {
6083 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6084 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6086 getValueType(ExtVT)));
6091 for (; i < ResNE; ++i)
6092 Scalars.push_back(getUNDEF(EltVT));
6094 return getNode(ISD::BUILD_VECTOR, dl,
6095 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6096 &Scalars[0], Scalars.size());
6100 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6101 /// location that is 'Dist' units away from the location that the 'Base' load
6102 /// is loading from.
6103 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6104 unsigned Bytes, int Dist) const {
6105 if (LD->getChain() != Base->getChain())
6107 EVT VT = LD->getValueType(0);
6108 if (VT.getSizeInBits() / 8 != Bytes)
6111 SDValue Loc = LD->getOperand(1);
6112 SDValue BaseLoc = Base->getOperand(1);
6113 if (Loc.getOpcode() == ISD::FrameIndex) {
6114 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6116 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6117 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6118 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6119 int FS = MFI->getObjectSize(FI);
6120 int BFS = MFI->getObjectSize(BFI);
6121 if (FS != BFS || FS != (int)Bytes) return false;
6122 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6126 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6127 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6130 const GlobalValue *GV1 = NULL;
6131 const GlobalValue *GV2 = NULL;
6132 int64_t Offset1 = 0;
6133 int64_t Offset2 = 0;
6134 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6135 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6136 if (isGA1 && isGA2 && GV1 == GV2)
6137 return Offset1 == (Offset2 + Dist*Bytes);
6142 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6143 /// it cannot be inferred.
6144 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6145 // If this is a GlobalAddress + cst, return the alignment.
6146 const GlobalValue *GV;
6147 int64_t GVOffset = 0;
6148 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6149 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6150 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6151 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6152 TLI.getDataLayout());
6153 unsigned AlignBits = KnownZero.countTrailingOnes();
6154 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6156 return MinAlign(Align, GVOffset);
6159 // If this is a direct reference to a stack slot, use information about the
6160 // stack slot's alignment.
6161 int FrameIdx = 1 << 31;
6162 int64_t FrameOffset = 0;
6163 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6164 FrameIdx = FI->getIndex();
6165 } else if (isBaseWithConstantOffset(Ptr) &&
6166 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6168 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6169 FrameOffset = Ptr.getConstantOperandVal(1);
6172 if (FrameIdx != (1 << 31)) {
6173 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6174 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6182 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6183 unsigned GlobalAddressSDNode::getAddressSpace() const {
6184 return getGlobal()->getType()->getAddressSpace();
6188 Type *ConstantPoolSDNode::getType() const {
6189 if (isMachineConstantPoolEntry())
6190 return Val.MachineCPVal->getType();
6191 return Val.ConstVal->getType();
6194 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6196 unsigned &SplatBitSize,
6198 unsigned MinSplatBits,
6200 EVT VT = getValueType(0);
6201 assert(VT.isVector() && "Expected a vector type");
6202 unsigned sz = VT.getSizeInBits();
6203 if (MinSplatBits > sz)
6206 SplatValue = APInt(sz, 0);
6207 SplatUndef = APInt(sz, 0);
6209 // Get the bits. Bits with undefined values (when the corresponding element
6210 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6211 // in SplatValue. If any of the values are not constant, give up and return
6213 unsigned int nOps = getNumOperands();
6214 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6215 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6217 for (unsigned j = 0; j < nOps; ++j) {
6218 unsigned i = isBigEndian ? nOps-1-j : j;
6219 SDValue OpVal = getOperand(i);
6220 unsigned BitPos = j * EltBitSize;
6222 if (OpVal.getOpcode() == ISD::UNDEF)
6223 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6224 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6225 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6226 zextOrTrunc(sz) << BitPos;
6227 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6228 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6233 // The build_vector is all constants or undefs. Find the smallest element
6234 // size that splats the vector.
6236 HasAnyUndefs = (SplatUndef != 0);
6239 unsigned HalfSize = sz / 2;
6240 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6241 APInt LowValue = SplatValue.trunc(HalfSize);
6242 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6243 APInt LowUndef = SplatUndef.trunc(HalfSize);
6245 // If the two halves do not match (ignoring undef bits), stop here.
6246 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6247 MinSplatBits > HalfSize)
6250 SplatValue = HighValue | LowValue;
6251 SplatUndef = HighUndef & LowUndef;
6260 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6261 // Find the first non-undef value in the shuffle mask.
6263 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6266 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6268 // Make sure all remaining elements are either undef or the same as the first
6270 for (int Idx = Mask[i]; i != e; ++i)
6271 if (Mask[i] >= 0 && Mask[i] != Idx)
6277 static void checkForCyclesHelper(const SDNode *N,
6278 SmallPtrSet<const SDNode*, 32> &Visited,
6279 SmallPtrSet<const SDNode*, 32> &Checked) {
6280 // If this node has already been checked, don't check it again.
6281 if (Checked.count(N))
6284 // If a node has already been visited on this depth-first walk, reject it as
6286 if (!Visited.insert(N)) {
6287 dbgs() << "Offending node:\n";
6289 errs() << "Detected cycle in SelectionDAG\n";
6293 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6294 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6301 void llvm::checkForCycles(const llvm::SDNode *N) {
6303 assert(N && "Checking nonexistant SDNode");
6304 SmallPtrSet<const SDNode*, 32> visited;
6305 SmallPtrSet<const SDNode*, 32> checked;
6306 checkForCyclesHelper(N, visited, checked);
6310 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6311 checkForCycles(DAG->getRoot().getNode());