1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 if (N->getOpcode() == ISD::BIT_CONVERT)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
117 SDValue NotZero = N->getOperand(i);
118 if (isa<ConstantSDNode>(NotZero)) {
119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
121 } else if (isa<ConstantFPSDNode>(NotZero)) {
122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
123 bitcastToAPInt().isAllOnesValue())
128 // Okay, we have at least one ~0 value, check to see if the rest match or are
130 for (++i; i != e; ++i)
131 if (N->getOperand(i) != NotZero &&
132 N->getOperand(i).getOpcode() != ISD::UNDEF)
138 /// isBuildVectorAllZeros - Return true if the specified node is a
139 /// BUILD_VECTOR where all of the elements are 0 or undef.
140 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
141 // Look through a bit convert.
142 if (N->getOpcode() == ISD::BIT_CONVERT)
143 N = N->getOperand(0).getNode();
145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
147 unsigned i = 0, e = N->getNumOperands();
149 // Skip over all of the undef values.
150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 // Do not accept an all-undef vector.
154 if (i == e) return false;
156 // Do not accept build_vectors that aren't all constants or which have non-~0
158 SDValue Zero = N->getOperand(i);
159 if (isa<ConstantSDNode>(Zero)) {
160 if (!cast<ConstantSDNode>(Zero)->isNullValue())
162 } else if (isa<ConstantFPSDNode>(Zero)) {
163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
168 // Okay, we have at least one ~0 value, check to see if the rest match or are
170 for (++i; i != e; ++i)
171 if (N->getOperand(i) != Zero &&
172 N->getOperand(i).getOpcode() != ISD::UNDEF)
177 /// isScalarToVector - Return true if the specified node is a
178 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
179 /// element is not an undef.
180 bool ISD::isScalarToVector(const SDNode *N) {
181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
184 if (N->getOpcode() != ISD::BUILD_VECTOR)
186 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
188 unsigned NumElems = N->getNumOperands();
189 for (unsigned i = 1; i < NumElems; ++i) {
190 SDValue V = N->getOperand(i);
191 if (V.getOpcode() != ISD::UNDEF)
198 /// isDebugLabel - Return true if the specified node represents a debug
199 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
200 bool ISD::isDebugLabel(const SDNode *N) {
202 if (N->getOpcode() == ISD::DBG_LABEL)
204 if (N->isMachineOpcode() &&
205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: assert(0 && "Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 const TargetMachine &SelectionDAG::getTarget() const {
310 return MF->getTarget();
313 //===----------------------------------------------------------------------===//
314 // SDNode Profile Support
315 //===----------------------------------------------------------------------===//
317 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
319 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
323 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
324 /// solely with their pointer.
325 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
326 ID.AddPointer(VTList.VTs);
329 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
331 static void AddNodeIDOperands(FoldingSetNodeID &ID,
332 const SDValue *Ops, unsigned NumOps) {
333 for (; NumOps; --NumOps, ++Ops) {
334 ID.AddPointer(Ops->getNode());
335 ID.AddInteger(Ops->getResNo());
339 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
341 static void AddNodeIDOperands(FoldingSetNodeID &ID,
342 const SDUse *Ops, unsigned NumOps) {
343 for (; NumOps; --NumOps, ++Ops) {
344 ID.AddPointer(Ops->getVal());
345 ID.AddInteger(Ops->getSDValue().getResNo());
349 static void AddNodeIDNode(FoldingSetNodeID &ID,
350 unsigned short OpC, SDVTList VTList,
351 const SDValue *OpList, unsigned N) {
352 AddNodeIDOpcode(ID, OpC);
353 AddNodeIDValueTypes(ID, VTList);
354 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
360 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
361 AddNodeIDOpcode(ID, N->getOpcode());
362 // Add the return value info.
363 AddNodeIDValueTypes(ID, N->getVTList());
364 // Add the operand info.
365 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
367 // Handle SDNode leafs with special info.
368 switch (N->getOpcode()) {
369 default: break; // Normal nodes don't need extra info.
371 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
373 case ISD::TargetConstant:
375 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
377 case ISD::TargetConstantFP:
378 case ISD::ConstantFP: {
379 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
382 case ISD::TargetGlobalAddress:
383 case ISD::GlobalAddress:
384 case ISD::TargetGlobalTLSAddress:
385 case ISD::GlobalTLSAddress: {
386 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
387 ID.AddPointer(GA->getGlobal());
388 ID.AddInteger(GA->getOffset());
391 case ISD::BasicBlock:
392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
397 case ISD::DBG_STOPPOINT: {
398 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
399 ID.AddInteger(DSP->getLine());
400 ID.AddInteger(DSP->getColumn());
401 ID.AddPointer(DSP->getCompileUnit());
405 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
407 case ISD::MEMOPERAND: {
408 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
412 case ISD::FrameIndex:
413 case ISD::TargetFrameIndex:
414 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
417 case ISD::TargetJumpTable:
418 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
420 case ISD::ConstantPool:
421 case ISD::TargetConstantPool: {
422 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
423 ID.AddInteger(CP->getAlignment());
424 ID.AddInteger(CP->getOffset());
425 if (CP->isMachineConstantPoolEntry())
426 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
428 ID.AddPointer(CP->getConstVal());
432 const CallSDNode *Call = cast<CallSDNode>(N);
433 ID.AddInteger(Call->getCallingConv());
434 ID.AddInteger(Call->isVarArg());
438 const LoadSDNode *LD = cast<LoadSDNode>(N);
439 ID.AddInteger(LD->getAddressingMode());
440 ID.AddInteger(LD->getExtensionType());
441 ID.AddInteger(LD->getMemoryVT().getRawBits());
442 ID.AddInteger(LD->getRawFlags());
446 const StoreSDNode *ST = cast<StoreSDNode>(N);
447 ID.AddInteger(ST->getAddressingMode());
448 ID.AddInteger(ST->isTruncatingStore());
449 ID.AddInteger(ST->getMemoryVT().getRawBits());
450 ID.AddInteger(ST->getRawFlags());
453 case ISD::ATOMIC_CMP_SWAP_8:
454 case ISD::ATOMIC_SWAP_8:
455 case ISD::ATOMIC_LOAD_ADD_8:
456 case ISD::ATOMIC_LOAD_SUB_8:
457 case ISD::ATOMIC_LOAD_AND_8:
458 case ISD::ATOMIC_LOAD_OR_8:
459 case ISD::ATOMIC_LOAD_XOR_8:
460 case ISD::ATOMIC_LOAD_NAND_8:
461 case ISD::ATOMIC_LOAD_MIN_8:
462 case ISD::ATOMIC_LOAD_MAX_8:
463 case ISD::ATOMIC_LOAD_UMIN_8:
464 case ISD::ATOMIC_LOAD_UMAX_8:
465 case ISD::ATOMIC_CMP_SWAP_16:
466 case ISD::ATOMIC_SWAP_16:
467 case ISD::ATOMIC_LOAD_ADD_16:
468 case ISD::ATOMIC_LOAD_SUB_16:
469 case ISD::ATOMIC_LOAD_AND_16:
470 case ISD::ATOMIC_LOAD_OR_16:
471 case ISD::ATOMIC_LOAD_XOR_16:
472 case ISD::ATOMIC_LOAD_NAND_16:
473 case ISD::ATOMIC_LOAD_MIN_16:
474 case ISD::ATOMIC_LOAD_MAX_16:
475 case ISD::ATOMIC_LOAD_UMIN_16:
476 case ISD::ATOMIC_LOAD_UMAX_16:
477 case ISD::ATOMIC_CMP_SWAP_32:
478 case ISD::ATOMIC_SWAP_32:
479 case ISD::ATOMIC_LOAD_ADD_32:
480 case ISD::ATOMIC_LOAD_SUB_32:
481 case ISD::ATOMIC_LOAD_AND_32:
482 case ISD::ATOMIC_LOAD_OR_32:
483 case ISD::ATOMIC_LOAD_XOR_32:
484 case ISD::ATOMIC_LOAD_NAND_32:
485 case ISD::ATOMIC_LOAD_MIN_32:
486 case ISD::ATOMIC_LOAD_MAX_32:
487 case ISD::ATOMIC_LOAD_UMIN_32:
488 case ISD::ATOMIC_LOAD_UMAX_32:
489 case ISD::ATOMIC_CMP_SWAP_64:
490 case ISD::ATOMIC_SWAP_64:
491 case ISD::ATOMIC_LOAD_ADD_64:
492 case ISD::ATOMIC_LOAD_SUB_64:
493 case ISD::ATOMIC_LOAD_AND_64:
494 case ISD::ATOMIC_LOAD_OR_64:
495 case ISD::ATOMIC_LOAD_XOR_64:
496 case ISD::ATOMIC_LOAD_NAND_64:
497 case ISD::ATOMIC_LOAD_MIN_64:
498 case ISD::ATOMIC_LOAD_MAX_64:
499 case ISD::ATOMIC_LOAD_UMIN_64:
500 case ISD::ATOMIC_LOAD_UMAX_64: {
501 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
502 ID.AddInteger(AT->getRawFlags());
505 } // end switch (N->getOpcode())
508 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
509 /// the CSE map that carries both alignment and volatility information.
511 static inline unsigned
512 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
513 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
516 //===----------------------------------------------------------------------===//
517 // SelectionDAG Class
518 //===----------------------------------------------------------------------===//
520 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
522 void SelectionDAG::RemoveDeadNodes() {
523 // Create a dummy node (which is not added to allnodes), that adds a reference
524 // to the root node, preventing it from being deleted.
525 HandleSDNode Dummy(getRoot());
527 SmallVector<SDNode*, 128> DeadNodes;
529 // Add all obviously-dead nodes to the DeadNodes worklist.
530 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
532 DeadNodes.push_back(I);
534 RemoveDeadNodes(DeadNodes);
536 // If the root changed (e.g. it was a dead load, update the root).
537 setRoot(Dummy.getValue());
540 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
541 /// given list, and any nodes that become unreachable as a result.
542 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
543 DAGUpdateListener *UpdateListener) {
545 // Process the worklist, deleting the nodes and adding their uses to the
547 while (!DeadNodes.empty()) {
548 SDNode *N = DeadNodes.back();
549 DeadNodes.pop_back();
552 UpdateListener->NodeDeleted(N, 0);
554 // Take the node out of the appropriate CSE map.
555 RemoveNodeFromCSEMaps(N);
557 // Next, brutally remove the operand list. This is safe to do, as there are
558 // no cycles in the graph.
559 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
560 SDNode *Operand = I->getVal();
561 Operand->removeUser(std::distance(N->op_begin(), I), N);
563 // Now that we removed this operand, see if there are no uses of it left.
564 if (Operand->use_empty())
565 DeadNodes.push_back(Operand);
568 if (N->OperandsNeedDelete)
569 delete[] N->OperandList;
574 // Finally, remove N itself.
575 NodeAllocator.Deallocate(AllNodes.remove(N));
579 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
580 SmallVector<SDNode*, 16> DeadNodes(1, N);
581 RemoveDeadNodes(DeadNodes, UpdateListener);
584 void SelectionDAG::DeleteNode(SDNode *N) {
585 assert(N->use_empty() && "Cannot delete a node that is not dead!");
587 // First take this out of the appropriate CSE map.
588 RemoveNodeFromCSEMaps(N);
590 // Finally, remove uses due to operands of this node, remove from the
591 // AllNodes list, and delete the node.
592 DeleteNodeNotInCSEMaps(N);
595 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
596 // Drop all of the operands and decrement used node's use counts.
597 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
598 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
600 if (N->OperandsNeedDelete) {
601 delete[] N->OperandList;
605 assert(N != AllNodes.begin());
606 NodeAllocator.Deallocate(AllNodes.remove(N));
609 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
610 /// correspond to it. This is useful when we're about to delete or repurpose
611 /// the node. We don't want future request for structurally identical nodes
612 /// to return N anymore.
613 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
615 switch (N->getOpcode()) {
616 case ISD::EntryToken:
617 assert(0 && "EntryToken should not be in CSEMaps!");
619 case ISD::HANDLENODE: return false; // noop.
621 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
622 "Cond code doesn't exist!");
623 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
624 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
626 case ISD::ExternalSymbol:
627 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
629 case ISD::TargetExternalSymbol:
631 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::VALUETYPE: {
634 MVT VT = cast<VTSDNode>(N)->getVT();
635 if (VT.isExtended()) {
636 Erased = ExtendedValueTypeNodes.erase(VT);
638 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
639 ValueTypeNodes[VT.getSimpleVT()] = 0;
644 // Remove it from the CSE Map.
645 Erased = CSEMap.RemoveNode(N);
649 // Verify that the node was actually in one of the CSE maps, unless it has a
650 // flag result (which cannot be CSE'd) or is one of the special cases that are
651 // not subject to CSE.
652 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
653 !N->isMachineOpcode() &&
654 N->getOpcode() != ISD::DBG_LABEL &&
655 N->getOpcode() != ISD::DBG_STOPPOINT &&
656 N->getOpcode() != ISD::EH_LABEL &&
657 N->getOpcode() != ISD::DECLARE) {
660 assert(0 && "Node is not in map!");
666 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
667 /// has been taken out and modified in some way. If the specified node already
668 /// exists in the CSE maps, do not modify the maps, but return the existing node
669 /// instead. If it doesn't exist, add it and return null.
671 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
672 assert(N->getNumOperands() && "This is a leaf node!");
674 if (N->getValueType(0) == MVT::Flag)
675 return 0; // Never CSE anything that produces a flag.
677 switch (N->getOpcode()) {
679 case ISD::HANDLENODE:
681 case ISD::DBG_STOPPOINT:
684 return 0; // Never add these nodes.
687 // Check that remaining values produced are not flags.
688 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
689 if (N->getValueType(i) == MVT::Flag)
690 return 0; // Never CSE anything that produces a flag.
692 SDNode *New = CSEMap.GetOrInsertNode(N);
693 if (New != N) return New; // Node already existed.
697 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
698 /// were replaced with those specified. If this node is never memoized,
699 /// return null, otherwise return a pointer to the slot it would take. If a
700 /// node already exists with these operands, the slot will be non-null.
701 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
703 if (N->getValueType(0) == MVT::Flag)
704 return 0; // Never CSE anything that produces a flag.
706 switch (N->getOpcode()) {
708 case ISD::HANDLENODE:
710 case ISD::DBG_STOPPOINT:
712 return 0; // Never add these nodes.
715 // Check that remaining values produced are not flags.
716 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
717 if (N->getValueType(i) == MVT::Flag)
718 return 0; // Never CSE anything that produces a flag.
720 SDValue Ops[] = { Op };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
723 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
726 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
727 /// were replaced with those specified. If this node is never memoized,
728 /// return null, otherwise return a pointer to the slot it would take. If a
729 /// node already exists with these operands, the slot will be non-null.
730 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
731 SDValue Op1, SDValue Op2,
733 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
735 // Check that remaining values produced are not flags.
736 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
737 if (N->getValueType(i) == MVT::Flag)
738 return 0; // Never CSE anything that produces a flag.
740 SDValue Ops[] = { Op1, Op2 };
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
743 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
747 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
748 /// were replaced with those specified. If this node is never memoized,
749 /// return null, otherwise return a pointer to the slot it would take. If a
750 /// node already exists with these operands, the slot will be non-null.
751 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
752 const SDValue *Ops,unsigned NumOps,
754 if (N->getValueType(0) == MVT::Flag)
755 return 0; // Never CSE anything that produces a flag.
757 switch (N->getOpcode()) {
759 case ISD::HANDLENODE:
761 case ISD::DBG_STOPPOINT:
764 return 0; // Never add these nodes.
767 // Check that remaining values produced are not flags.
768 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
769 if (N->getValueType(i) == MVT::Flag)
770 return 0; // Never CSE anything that produces a flag.
773 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
775 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
776 ID.AddInteger(LD->getAddressingMode());
777 ID.AddInteger(LD->getExtensionType());
778 ID.AddInteger(LD->getMemoryVT().getRawBits());
779 ID.AddInteger(LD->getRawFlags());
780 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
781 ID.AddInteger(ST->getAddressingMode());
782 ID.AddInteger(ST->isTruncatingStore());
783 ID.AddInteger(ST->getMemoryVT().getRawBits());
784 ID.AddInteger(ST->getRawFlags());
787 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
790 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
791 void SelectionDAG::VerifyNode(SDNode *N) {
792 switch (N->getOpcode()) {
795 case ISD::BUILD_VECTOR: {
796 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!");
797 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!");
798 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
799 "Wrong number of BUILD_VECTOR operands!");
800 // FIXME: Change vector_shuffle to a variadic node with mask elements being
801 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
802 // operand, and it is not always possible to legalize it. Turning off the
803 // following checks at least makes it possible to legalize most of the time.
804 // MVT EltVT = N->getValueType(0).getVectorElementType();
805 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
806 // assert(I->getSDValue().getValueType() == EltVT &&
807 // "Wrong BUILD_VECTOR operand type!");
813 /// getMVTAlignment - Compute the default alignment value for the
816 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
817 const Type *Ty = VT == MVT::iPTR ?
818 PointerType::get(Type::Int8Ty, 0) :
821 return TLI.getTargetData()->getABITypeAlignment(Ty);
824 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
825 : TLI(tli), FLI(fli),
826 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
827 Root(getEntryNode()) {
828 AllNodes.push_back(&EntryNode);
831 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
836 SelectionDAG::~SelectionDAG() {
840 void SelectionDAG::allnodes_clear() {
841 assert(&*AllNodes.begin() == &EntryNode);
842 AllNodes.remove(AllNodes.begin());
843 while (!AllNodes.empty()) {
844 SDNode *N = AllNodes.remove(AllNodes.begin());
845 N->SetNextInBucket(0);
847 if (N->OperandsNeedDelete) {
848 delete [] N->OperandList;
852 NodeAllocator.Deallocate(N);
856 void SelectionDAG::clear() {
858 OperandAllocator.Reset();
861 ExtendedValueTypeNodes.clear();
862 ExternalSymbols.clear();
863 TargetExternalSymbols.clear();
864 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
865 static_cast<CondCodeSDNode*>(0));
866 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
867 static_cast<SDNode*>(0));
870 AllNodes.push_back(&EntryNode);
871 Root = getEntryNode();
874 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
875 if (Op.getValueType() == VT) return Op;
876 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
878 return getNode(ISD::AND, Op.getValueType(), Op,
879 getConstant(Imm, Op.getValueType()));
882 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
883 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
884 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
887 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
888 return getConstant(*ConstantInt::get(Val), VT, isT);
891 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
892 assert(VT.isInteger() && "Cannot create FP integer constant!");
894 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
895 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
896 "APInt size does not match type size!");
898 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
900 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
904 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
906 return SDValue(N, 0);
908 N = NodeAllocator.Allocate<ConstantSDNode>();
909 new (N) ConstantSDNode(isT, &Val, EltVT);
910 CSEMap.InsertNode(N, IP);
911 AllNodes.push_back(N);
914 SDValue Result(N, 0);
916 SmallVector<SDValue, 8> Ops;
917 Ops.assign(VT.getVectorNumElements(), Result);
918 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
923 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
924 return getConstant(Val, TLI.getPointerTy(), isTarget);
928 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
929 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
932 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
933 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
936 VT.isVector() ? VT.getVectorElementType() : VT;
938 // Do the map lookup using the actual bit pattern for the floating point
939 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
940 // we don't have issues with SNANs.
941 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
943 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
947 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
949 return SDValue(N, 0);
951 N = NodeAllocator.Allocate<ConstantFPSDNode>();
952 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
953 CSEMap.InsertNode(N, IP);
954 AllNodes.push_back(N);
957 SDValue Result(N, 0);
959 SmallVector<SDValue, 8> Ops;
960 Ops.assign(VT.getVectorNumElements(), Result);
961 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
966 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
968 VT.isVector() ? VT.getVectorElementType() : VT;
970 return getConstantFP(APFloat((float)Val), VT, isTarget);
972 return getConstantFP(APFloat(Val), VT, isTarget);
975 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
976 MVT VT, int64_t Offset,
980 // Truncate (with sign-extension) the offset value to the pointer size.
981 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
983 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
985 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
987 // If GV is an alias then use the aliasee for determining thread-localness.
988 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
989 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
992 if (GVar && GVar->isThreadLocal())
993 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
995 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
998 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1000 ID.AddInteger(Offset);
1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1003 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1005 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
1012 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1013 FoldingSetNodeID ID;
1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1018 return SDValue(E, 0);
1019 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1020 new (N) FrameIndexSDNode(FI, VT, isTarget);
1021 CSEMap.InsertNode(N, IP);
1022 AllNodes.push_back(N);
1023 return SDValue(N, 0);
1026 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1027 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1028 FoldingSetNodeID ID;
1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1032 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1033 return SDValue(E, 0);
1034 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1035 new (N) JumpTableSDNode(JTI, VT, isTarget);
1036 CSEMap.InsertNode(N, IP);
1037 AllNodes.push_back(N);
1038 return SDValue(N, 0);
1041 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1042 unsigned Alignment, int Offset,
1046 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1047 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1048 FoldingSetNodeID ID;
1049 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1050 ID.AddInteger(Alignment);
1051 ID.AddInteger(Offset);
1054 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1055 return SDValue(E, 0);
1056 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1057 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1058 CSEMap.InsertNode(N, IP);
1059 AllNodes.push_back(N);
1060 return SDValue(N, 0);
1064 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1065 unsigned Alignment, int Offset,
1069 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1070 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1071 FoldingSetNodeID ID;
1072 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1073 ID.AddInteger(Alignment);
1074 ID.AddInteger(Offset);
1075 C->AddSelectionDAGCSEId(ID);
1077 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1078 return SDValue(E, 0);
1079 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1080 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1081 CSEMap.InsertNode(N, IP);
1082 AllNodes.push_back(N);
1083 return SDValue(N, 0);
1087 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1088 FoldingSetNodeID ID;
1089 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1093 return SDValue(E, 0);
1094 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1095 new (N) BasicBlockSDNode(MBB);
1096 CSEMap.InsertNode(N, IP);
1097 AllNodes.push_back(N);
1098 return SDValue(N, 0);
1101 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1102 FoldingSetNodeID ID;
1103 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1104 ID.AddInteger(Flags.getRawBits());
1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1107 return SDValue(E, 0);
1108 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1109 new (N) ARG_FLAGSSDNode(Flags);
1110 CSEMap.InsertNode(N, IP);
1111 AllNodes.push_back(N);
1112 return SDValue(N, 0);
1115 SDValue SelectionDAG::getValueType(MVT VT) {
1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1117 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1119 SDNode *&N = VT.isExtended() ?
1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1122 if (N) return SDValue(N, 0);
1123 N = NodeAllocator.Allocate<VTSDNode>();
1124 new (N) VTSDNode(VT);
1125 AllNodes.push_back(N);
1126 return SDValue(N, 0);
1129 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1130 SDNode *&N = ExternalSymbols[Sym];
1131 if (N) return SDValue(N, 0);
1132 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1133 new (N) ExternalSymbolSDNode(false, Sym, VT);
1134 AllNodes.push_back(N);
1135 return SDValue(N, 0);
1138 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1139 SDNode *&N = TargetExternalSymbols[Sym];
1140 if (N) return SDValue(N, 0);
1141 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1142 new (N) ExternalSymbolSDNode(true, Sym, VT);
1143 AllNodes.push_back(N);
1144 return SDValue(N, 0);
1147 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1148 if ((unsigned)Cond >= CondCodeNodes.size())
1149 CondCodeNodes.resize(Cond+1);
1151 if (CondCodeNodes[Cond] == 0) {
1152 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1153 new (N) CondCodeSDNode(Cond);
1154 CondCodeNodes[Cond] = N;
1155 AllNodes.push_back(N);
1157 return SDValue(CondCodeNodes[Cond], 0);
1160 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1161 FoldingSetNodeID ID;
1162 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1163 ID.AddInteger(RegNo);
1165 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1166 return SDValue(E, 0);
1167 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1168 new (N) RegisterSDNode(RegNo, VT);
1169 CSEMap.InsertNode(N, IP);
1170 AllNodes.push_back(N);
1171 return SDValue(N, 0);
1174 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1175 unsigned Line, unsigned Col,
1176 const CompileUnitDesc *CU) {
1177 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1178 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1183 SDValue SelectionDAG::getLabel(unsigned Opcode,
1186 FoldingSetNodeID ID;
1187 SDValue Ops[] = { Root };
1188 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1189 ID.AddInteger(LabelID);
1191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1192 return SDValue(E, 0);
1193 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1194 new (N) LabelSDNode(Opcode, Root, LabelID);
1195 CSEMap.InsertNode(N, IP);
1196 AllNodes.push_back(N);
1197 return SDValue(N, 0);
1200 SDValue SelectionDAG::getSrcValue(const Value *V) {
1201 assert((!V || isa<PointerType>(V->getType())) &&
1202 "SrcValue is not a pointer?");
1204 FoldingSetNodeID ID;
1205 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1209 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1210 return SDValue(E, 0);
1212 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1213 new (N) SrcValueSDNode(V);
1214 CSEMap.InsertNode(N, IP);
1215 AllNodes.push_back(N);
1216 return SDValue(N, 0);
1219 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1220 const Value *v = MO.getValue();
1221 assert((!v || isa<PointerType>(v->getType())) &&
1222 "SrcValue is not a pointer?");
1224 FoldingSetNodeID ID;
1225 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1229 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1230 return SDValue(E, 0);
1232 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1233 new (N) MemOperandSDNode(MO);
1234 CSEMap.InsertNode(N, IP);
1235 AllNodes.push_back(N);
1236 return SDValue(N, 0);
1239 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1240 /// specified value type.
1241 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1242 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1243 unsigned ByteSize = VT.getSizeInBits()/8;
1244 const Type *Ty = VT.getTypeForMVT();
1245 unsigned StackAlign =
1246 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1248 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1249 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1252 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1253 SDValue N2, ISD::CondCode Cond) {
1254 // These setcc operations always fold.
1258 case ISD::SETFALSE2: return getConstant(0, VT);
1260 case ISD::SETTRUE2: return getConstant(1, VT);
1272 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1276 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1277 const APInt &C2 = N2C->getAPIntValue();
1278 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1279 const APInt &C1 = N1C->getAPIntValue();
1282 default: assert(0 && "Unknown integer setcc!");
1283 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1284 case ISD::SETNE: return getConstant(C1 != C2, VT);
1285 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1286 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1287 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1288 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1289 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1290 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1291 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1292 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1296 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1297 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1298 // No compile time operations on this type yet.
1299 if (N1C->getValueType(0) == MVT::ppcf128)
1302 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1305 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1306 return getNode(ISD::UNDEF, VT);
1308 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1309 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1310 return getNode(ISD::UNDEF, VT);
1312 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1313 R==APFloat::cmpLessThan, VT);
1314 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1315 return getNode(ISD::UNDEF, VT);
1317 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1318 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1319 return getNode(ISD::UNDEF, VT);
1321 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1322 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1323 return getNode(ISD::UNDEF, VT);
1325 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1326 R==APFloat::cmpEqual, VT);
1327 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1328 return getNode(ISD::UNDEF, VT);
1330 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1331 R==APFloat::cmpEqual, VT);
1332 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1333 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1334 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1335 R==APFloat::cmpEqual, VT);
1336 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1337 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1338 R==APFloat::cmpLessThan, VT);
1339 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1340 R==APFloat::cmpUnordered, VT);
1341 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1342 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1345 // Ensure that the constant occurs on the RHS.
1346 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1350 // Could not fold it.
1354 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1355 /// use this predicate to simplify operations downstream.
1356 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1357 unsigned BitWidth = Op.getValueSizeInBits();
1358 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1361 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1362 /// this predicate to simplify operations downstream. Mask is known to be zero
1363 /// for bits that V cannot have.
1364 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1365 unsigned Depth) const {
1366 APInt KnownZero, KnownOne;
1367 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1368 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1369 return (KnownZero & Mask) == Mask;
1372 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1373 /// known to be either zero or one and return them in the KnownZero/KnownOne
1374 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1376 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1377 APInt &KnownZero, APInt &KnownOne,
1378 unsigned Depth) const {
1379 unsigned BitWidth = Mask.getBitWidth();
1380 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1381 "Mask size mismatches value type size!");
1383 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1384 if (Depth == 6 || Mask == 0)
1385 return; // Limit search depth.
1387 APInt KnownZero2, KnownOne2;
1389 switch (Op.getOpcode()) {
1391 // We know all of the bits for a constant!
1392 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1393 KnownZero = ~KnownOne & Mask;
1396 // If either the LHS or the RHS are Zero, the result is zero.
1397 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1398 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1399 KnownZero2, KnownOne2, Depth+1);
1400 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1401 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1403 // Output known-1 bits are only known if set in both the LHS & RHS.
1404 KnownOne &= KnownOne2;
1405 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1406 KnownZero |= KnownZero2;
1409 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1410 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1411 KnownZero2, KnownOne2, Depth+1);
1412 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1413 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1415 // Output known-0 bits are only known if clear in both the LHS & RHS.
1416 KnownZero &= KnownZero2;
1417 // Output known-1 are known to be set if set in either the LHS | RHS.
1418 KnownOne |= KnownOne2;
1421 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1422 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1423 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1424 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1426 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1427 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1428 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1429 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1430 KnownZero = KnownZeroOut;
1434 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1435 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1436 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1437 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1438 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1440 // If low bits are zero in either operand, output low known-0 bits.
1441 // Also compute a conserative estimate for high known-0 bits.
1442 // More trickiness is possible, but this is sufficient for the
1443 // interesting case of alignment computation.
1445 unsigned TrailZ = KnownZero.countTrailingOnes() +
1446 KnownZero2.countTrailingOnes();
1447 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1448 KnownZero2.countLeadingOnes(),
1449 BitWidth) - BitWidth;
1451 TrailZ = std::min(TrailZ, BitWidth);
1452 LeadZ = std::min(LeadZ, BitWidth);
1453 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1454 APInt::getHighBitsSet(BitWidth, LeadZ);
1459 // For the purposes of computing leading zeros we can conservatively
1460 // treat a udiv as a logical right shift by the power of 2 known to
1461 // be less than the denominator.
1462 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1463 ComputeMaskedBits(Op.getOperand(0),
1464 AllOnes, KnownZero2, KnownOne2, Depth+1);
1465 unsigned LeadZ = KnownZero2.countLeadingOnes();
1469 ComputeMaskedBits(Op.getOperand(1),
1470 AllOnes, KnownZero2, KnownOne2, Depth+1);
1471 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1472 if (RHSUnknownLeadingOnes != BitWidth)
1473 LeadZ = std::min(BitWidth,
1474 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1476 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1480 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1481 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1482 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1483 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1485 // Only known if known in both the LHS and RHS.
1486 KnownOne &= KnownOne2;
1487 KnownZero &= KnownZero2;
1489 case ISD::SELECT_CC:
1490 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1491 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1492 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1493 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1495 // Only known if known in both the LHS and RHS.
1496 KnownOne &= KnownOne2;
1497 KnownZero &= KnownZero2;
1500 // If we know the result of a setcc has the top bits zero, use this info.
1501 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1503 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1506 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1507 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1508 unsigned ShAmt = SA->getZExtValue();
1510 // If the shift count is an invalid immediate, don't do anything.
1511 if (ShAmt >= BitWidth)
1514 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1515 KnownZero, KnownOne, Depth+1);
1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1517 KnownZero <<= ShAmt;
1519 // low bits known zero.
1520 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1524 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1525 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1526 unsigned ShAmt = SA->getZExtValue();
1528 // If the shift count is an invalid immediate, don't do anything.
1529 if (ShAmt >= BitWidth)
1532 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1533 KnownZero, KnownOne, Depth+1);
1534 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1535 KnownZero = KnownZero.lshr(ShAmt);
1536 KnownOne = KnownOne.lshr(ShAmt);
1538 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1539 KnownZero |= HighBits; // High bits known zero.
1543 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1544 unsigned ShAmt = SA->getZExtValue();
1546 // If the shift count is an invalid immediate, don't do anything.
1547 if (ShAmt >= BitWidth)
1550 APInt InDemandedMask = (Mask << ShAmt);
1551 // If any of the demanded bits are produced by the sign extension, we also
1552 // demand the input sign bit.
1553 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1554 if (HighBits.getBoolValue())
1555 InDemandedMask |= APInt::getSignBit(BitWidth);
1557 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1560 KnownZero = KnownZero.lshr(ShAmt);
1561 KnownOne = KnownOne.lshr(ShAmt);
1563 // Handle the sign bits.
1564 APInt SignBit = APInt::getSignBit(BitWidth);
1565 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1567 if (KnownZero.intersects(SignBit)) {
1568 KnownZero |= HighBits; // New bits are known zero.
1569 } else if (KnownOne.intersects(SignBit)) {
1570 KnownOne |= HighBits; // New bits are known one.
1574 case ISD::SIGN_EXTEND_INREG: {
1575 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1576 unsigned EBits = EVT.getSizeInBits();
1578 // Sign extension. Compute the demanded bits in the result that are not
1579 // present in the input.
1580 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1582 APInt InSignBit = APInt::getSignBit(EBits);
1583 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1585 // If the sign extended bits are demanded, we know that the sign
1587 InSignBit.zext(BitWidth);
1588 if (NewBits.getBoolValue())
1589 InputDemandedBits |= InSignBit;
1591 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1592 KnownZero, KnownOne, Depth+1);
1593 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1595 // If the sign bit of the input is known set or clear, then we know the
1596 // top bits of the result.
1597 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1598 KnownZero |= NewBits;
1599 KnownOne &= ~NewBits;
1600 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1601 KnownOne |= NewBits;
1602 KnownZero &= ~NewBits;
1603 } else { // Input sign bit unknown
1604 KnownZero &= ~NewBits;
1605 KnownOne &= ~NewBits;
1612 unsigned LowBits = Log2_32(BitWidth)+1;
1613 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1618 if (ISD::isZEXTLoad(Op.getNode())) {
1619 LoadSDNode *LD = cast<LoadSDNode>(Op);
1620 MVT VT = LD->getMemoryVT();
1621 unsigned MemBits = VT.getSizeInBits();
1622 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1626 case ISD::ZERO_EXTEND: {
1627 MVT InVT = Op.getOperand(0).getValueType();
1628 unsigned InBits = InVT.getSizeInBits();
1629 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1630 APInt InMask = Mask;
1631 InMask.trunc(InBits);
1632 KnownZero.trunc(InBits);
1633 KnownOne.trunc(InBits);
1634 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1635 KnownZero.zext(BitWidth);
1636 KnownOne.zext(BitWidth);
1637 KnownZero |= NewBits;
1640 case ISD::SIGN_EXTEND: {
1641 MVT InVT = Op.getOperand(0).getValueType();
1642 unsigned InBits = InVT.getSizeInBits();
1643 APInt InSignBit = APInt::getSignBit(InBits);
1644 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1645 APInt InMask = Mask;
1646 InMask.trunc(InBits);
1648 // If any of the sign extended bits are demanded, we know that the sign
1649 // bit is demanded. Temporarily set this bit in the mask for our callee.
1650 if (NewBits.getBoolValue())
1651 InMask |= InSignBit;
1653 KnownZero.trunc(InBits);
1654 KnownOne.trunc(InBits);
1655 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1657 // Note if the sign bit is known to be zero or one.
1658 bool SignBitKnownZero = KnownZero.isNegative();
1659 bool SignBitKnownOne = KnownOne.isNegative();
1660 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1661 "Sign bit can't be known to be both zero and one!");
1663 // If the sign bit wasn't actually demanded by our caller, we don't
1664 // want it set in the KnownZero and KnownOne result values. Reset the
1665 // mask and reapply it to the result values.
1667 InMask.trunc(InBits);
1668 KnownZero &= InMask;
1671 KnownZero.zext(BitWidth);
1672 KnownOne.zext(BitWidth);
1674 // If the sign bit is known zero or one, the top bits match.
1675 if (SignBitKnownZero)
1676 KnownZero |= NewBits;
1677 else if (SignBitKnownOne)
1678 KnownOne |= NewBits;
1681 case ISD::ANY_EXTEND: {
1682 MVT InVT = Op.getOperand(0).getValueType();
1683 unsigned InBits = InVT.getSizeInBits();
1684 APInt InMask = Mask;
1685 InMask.trunc(InBits);
1686 KnownZero.trunc(InBits);
1687 KnownOne.trunc(InBits);
1688 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1689 KnownZero.zext(BitWidth);
1690 KnownOne.zext(BitWidth);
1693 case ISD::TRUNCATE: {
1694 MVT InVT = Op.getOperand(0).getValueType();
1695 unsigned InBits = InVT.getSizeInBits();
1696 APInt InMask = Mask;
1697 InMask.zext(InBits);
1698 KnownZero.zext(InBits);
1699 KnownOne.zext(InBits);
1700 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1702 KnownZero.trunc(BitWidth);
1703 KnownOne.trunc(BitWidth);
1706 case ISD::AssertZext: {
1707 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1708 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1709 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1711 KnownZero |= (~InMask) & Mask;
1715 // All bits are zero except the low bit.
1716 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1720 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1721 // We know that the top bits of C-X are clear if X contains less bits
1722 // than C (i.e. no wrap-around can happen). For example, 20-X is
1723 // positive if we can prove that X is >= 0 and < 16.
1724 if (CLHS->getAPIntValue().isNonNegative()) {
1725 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1726 // NLZ can't be BitWidth with no sign bit
1727 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1728 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1731 // If all of the MaskV bits are known to be zero, then we know the
1732 // output top bits are zero, because we now know that the output is
1734 if ((KnownZero2 & MaskV) == MaskV) {
1735 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1736 // Top bits known zero.
1737 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1744 // Output known-0 bits are known if clear or set in both the low clear bits
1745 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1746 // low 3 bits clear.
1747 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1748 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1749 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1750 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1752 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1753 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1754 KnownZeroOut = std::min(KnownZeroOut,
1755 KnownZero2.countTrailingOnes());
1757 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1761 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1762 const APInt &RA = Rem->getAPIntValue();
1763 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1764 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1765 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1766 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1768 // If the sign bit of the first operand is zero, the sign bit of
1769 // the result is zero. If the first operand has no one bits below
1770 // the second operand's single 1 bit, its sign will be zero.
1771 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1772 KnownZero2 |= ~LowBits;
1774 KnownZero |= KnownZero2 & Mask;
1776 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1781 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1782 const APInt &RA = Rem->getAPIntValue();
1783 if (RA.isPowerOf2()) {
1784 APInt LowBits = (RA - 1);
1785 APInt Mask2 = LowBits & Mask;
1786 KnownZero |= ~LowBits & Mask;
1787 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1788 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1793 // Since the result is less than or equal to either operand, any leading
1794 // zero bits in either operand must also exist in the result.
1795 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1796 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1798 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1801 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1802 KnownZero2.countLeadingOnes());
1804 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1808 // Allow the target to implement this method for its nodes.
1809 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1810 case ISD::INTRINSIC_WO_CHAIN:
1811 case ISD::INTRINSIC_W_CHAIN:
1812 case ISD::INTRINSIC_VOID:
1813 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1819 /// ComputeNumSignBits - Return the number of times the sign bit of the
1820 /// register is replicated into the other bits. We know that at least 1 bit
1821 /// is always equal to the sign bit (itself), but other cases can give us
1822 /// information. For example, immediately after an "SRA X, 2", we know that
1823 /// the top 3 bits are all equal to each other, so we return 3.
1824 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1825 MVT VT = Op.getValueType();
1826 assert(VT.isInteger() && "Invalid VT!");
1827 unsigned VTBits = VT.getSizeInBits();
1829 unsigned FirstAnswer = 1;
1832 return 1; // Limit search depth.
1834 switch (Op.getOpcode()) {
1836 case ISD::AssertSext:
1837 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1838 return VTBits-Tmp+1;
1839 case ISD::AssertZext:
1840 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1843 case ISD::Constant: {
1844 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1845 // If negative, return # leading ones.
1846 if (Val.isNegative())
1847 return Val.countLeadingOnes();
1849 // Return # leading zeros.
1850 return Val.countLeadingZeros();
1853 case ISD::SIGN_EXTEND:
1854 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1855 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1857 case ISD::SIGN_EXTEND_INREG:
1858 // Max of the input and what this extends.
1859 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1862 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1863 return std::max(Tmp, Tmp2);
1866 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1867 // SRA X, C -> adds C sign bits.
1868 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1869 Tmp += C->getZExtValue();
1870 if (Tmp > VTBits) Tmp = VTBits;
1874 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1875 // shl destroys sign bits.
1876 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1877 if (C->getZExtValue() >= VTBits || // Bad shift.
1878 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1879 return Tmp - C->getZExtValue();
1884 case ISD::XOR: // NOT is handled here.
1885 // Logical binary ops preserve the number of sign bits at the worst.
1886 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1888 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1889 FirstAnswer = std::min(Tmp, Tmp2);
1890 // We computed what we know about the sign bits as our first
1891 // answer. Now proceed to the generic code that uses
1892 // ComputeMaskedBits, and pick whichever answer is better.
1897 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1898 if (Tmp == 1) return 1; // Early out.
1899 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1900 return std::min(Tmp, Tmp2);
1903 // If setcc returns 0/-1, all bits are sign bits.
1904 if (TLI.getSetCCResultContents() ==
1905 TargetLowering::ZeroOrNegativeOneSetCCResult)
1910 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1911 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1913 // Handle rotate right by N like a rotate left by 32-N.
1914 if (Op.getOpcode() == ISD::ROTR)
1915 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1917 // If we aren't rotating out all of the known-in sign bits, return the
1918 // number that are left. This handles rotl(sext(x), 1) for example.
1919 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1920 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1924 // Add can have at most one carry bit. Thus we know that the output
1925 // is, at worst, one more bit than the inputs.
1926 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1927 if (Tmp == 1) return 1; // Early out.
1929 // Special case decrementing a value (ADD X, -1):
1930 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1931 if (CRHS->isAllOnesValue()) {
1932 APInt KnownZero, KnownOne;
1933 APInt Mask = APInt::getAllOnesValue(VTBits);
1934 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1936 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1938 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1941 // If we are subtracting one from a positive number, there is no carry
1942 // out of the result.
1943 if (KnownZero.isNegative())
1947 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1948 if (Tmp2 == 1) return 1;
1949 return std::min(Tmp, Tmp2)-1;
1953 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1954 if (Tmp2 == 1) return 1;
1957 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1958 if (CLHS->isNullValue()) {
1959 APInt KnownZero, KnownOne;
1960 APInt Mask = APInt::getAllOnesValue(VTBits);
1961 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1962 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1964 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1967 // If the input is known to be positive (the sign bit is known clear),
1968 // the output of the NEG has the same number of sign bits as the input.
1969 if (KnownZero.isNegative())
1972 // Otherwise, we treat this like a SUB.
1975 // Sub can have at most one carry bit. Thus we know that the output
1976 // is, at worst, one more bit than the inputs.
1977 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1978 if (Tmp == 1) return 1; // Early out.
1979 return std::min(Tmp, Tmp2)-1;
1982 // FIXME: it's tricky to do anything useful for this, but it is an important
1983 // case for targets like X86.
1987 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1988 if (Op.getOpcode() == ISD::LOAD) {
1989 LoadSDNode *LD = cast<LoadSDNode>(Op);
1990 unsigned ExtType = LD->getExtensionType();
1993 case ISD::SEXTLOAD: // '17' bits known
1994 Tmp = LD->getMemoryVT().getSizeInBits();
1995 return VTBits-Tmp+1;
1996 case ISD::ZEXTLOAD: // '16' bits known
1997 Tmp = LD->getMemoryVT().getSizeInBits();
2002 // Allow the target to implement this method for its nodes.
2003 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2004 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2005 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2006 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2007 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2008 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2011 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2012 // use this information.
2013 APInt KnownZero, KnownOne;
2014 APInt Mask = APInt::getAllOnesValue(VTBits);
2015 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2017 if (KnownZero.isNegative()) { // sign bit is 0
2019 } else if (KnownOne.isNegative()) { // sign bit is 1;
2026 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2027 // the number of identical bits in the top of the input value.
2029 Mask <<= Mask.getBitWidth()-VTBits;
2030 // Return # leading zeros. We use 'min' here in case Val was zero before
2031 // shifting. We don't want to return '64' as for an i32 "0".
2032 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2036 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2037 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2038 if (!GA) return false;
2039 if (GA->getOffset() != 0) return false;
2040 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2041 if (!GV) return false;
2042 MachineModuleInfo *MMI = getMachineModuleInfo();
2043 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
2047 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2048 /// element of the result of the vector shuffle.
2049 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2050 MVT VT = N->getValueType(0);
2051 SDValue PermMask = N->getOperand(2);
2052 SDValue Idx = PermMask.getOperand(i);
2053 if (Idx.getOpcode() == ISD::UNDEF)
2054 return getNode(ISD::UNDEF, VT.getVectorElementType());
2055 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2056 unsigned NumElems = PermMask.getNumOperands();
2057 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2060 if (V.getOpcode() == ISD::BIT_CONVERT) {
2061 V = V.getOperand(0);
2062 if (V.getValueType().getVectorNumElements() != NumElems)
2065 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2066 return (Index == 0) ? V.getOperand(0)
2067 : getNode(ISD::UNDEF, VT.getVectorElementType());
2068 if (V.getOpcode() == ISD::BUILD_VECTOR)
2069 return V.getOperand(Index);
2070 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2071 return getShuffleScalarElt(V.getNode(), Index);
2076 /// getNode - Gets or creates the specified node.
2078 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2079 FoldingSetNodeID ID;
2080 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2082 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2083 return SDValue(E, 0);
2084 SDNode *N = NodeAllocator.Allocate<SDNode>();
2085 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2086 CSEMap.InsertNode(N, IP);
2088 AllNodes.push_back(N);
2092 return SDValue(N, 0);
2095 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2096 // Constant fold unary operations with an integer constant operand.
2097 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2098 const APInt &Val = C->getAPIntValue();
2099 unsigned BitWidth = VT.getSizeInBits();
2102 case ISD::SIGN_EXTEND:
2103 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2104 case ISD::ANY_EXTEND:
2105 case ISD::ZERO_EXTEND:
2107 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2108 case ISD::UINT_TO_FP:
2109 case ISD::SINT_TO_FP: {
2110 const uint64_t zero[] = {0, 0};
2111 // No compile time operations on this type.
2112 if (VT==MVT::ppcf128)
2114 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2115 (void)apf.convertFromAPInt(Val,
2116 Opcode==ISD::SINT_TO_FP,
2117 APFloat::rmNearestTiesToEven);
2118 return getConstantFP(apf, VT);
2120 case ISD::BIT_CONVERT:
2121 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2122 return getConstantFP(Val.bitsToFloat(), VT);
2123 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2124 return getConstantFP(Val.bitsToDouble(), VT);
2127 return getConstant(Val.byteSwap(), VT);
2129 return getConstant(Val.countPopulation(), VT);
2131 return getConstant(Val.countLeadingZeros(), VT);
2133 return getConstant(Val.countTrailingZeros(), VT);
2137 // Constant fold unary operations with a floating point constant operand.
2138 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2139 APFloat V = C->getValueAPF(); // make copy
2140 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2144 return getConstantFP(V, VT);
2147 return getConstantFP(V, VT);
2149 case ISD::FP_EXTEND: {
2151 // This can return overflow, underflow, or inexact; we don't care.
2152 // FIXME need to be more flexible about rounding mode.
2153 (void)V.convert(*MVTToAPFloatSemantics(VT),
2154 APFloat::rmNearestTiesToEven, &ignored);
2155 return getConstantFP(V, VT);
2157 case ISD::FP_TO_SINT:
2158 case ISD::FP_TO_UINT: {
2161 assert(integerPartWidth >= 64);
2162 // FIXME need to be more flexible about rounding mode.
2163 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2164 Opcode==ISD::FP_TO_SINT,
2165 APFloat::rmTowardZero, &ignored);
2166 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2168 return getConstant(x, VT);
2170 case ISD::BIT_CONVERT:
2171 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2172 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2173 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2174 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2180 unsigned OpOpcode = Operand.getNode()->getOpcode();
2182 case ISD::TokenFactor:
2183 case ISD::CONCAT_VECTORS:
2184 return Operand; // Factor or concat of one node? No need.
2185 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2186 case ISD::FP_EXTEND:
2187 assert(VT.isFloatingPoint() &&
2188 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2189 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2190 if (Operand.getOpcode() == ISD::UNDEF)
2191 return getNode(ISD::UNDEF, VT);
2193 case ISD::SIGN_EXTEND:
2194 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2195 "Invalid SIGN_EXTEND!");
2196 if (Operand.getValueType() == VT) return Operand; // noop extension
2197 assert(Operand.getValueType().bitsLT(VT)
2198 && "Invalid sext node, dst < src!");
2199 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2200 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2202 case ISD::ZERO_EXTEND:
2203 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2204 "Invalid ZERO_EXTEND!");
2205 if (Operand.getValueType() == VT) return Operand; // noop extension
2206 assert(Operand.getValueType().bitsLT(VT)
2207 && "Invalid zext node, dst < src!");
2208 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2209 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2211 case ISD::ANY_EXTEND:
2212 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2213 "Invalid ANY_EXTEND!");
2214 if (Operand.getValueType() == VT) return Operand; // noop extension
2215 assert(Operand.getValueType().bitsLT(VT)
2216 && "Invalid anyext node, dst < src!");
2217 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2218 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2219 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2222 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2223 "Invalid TRUNCATE!");
2224 if (Operand.getValueType() == VT) return Operand; // noop truncate
2225 assert(Operand.getValueType().bitsGT(VT)
2226 && "Invalid truncate node, src < dst!");
2227 if (OpOpcode == ISD::TRUNCATE)
2228 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2229 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2230 OpOpcode == ISD::ANY_EXTEND) {
2231 // If the source is smaller than the dest, we still need an extend.
2232 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2233 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2234 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2235 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2237 return Operand.getNode()->getOperand(0);
2240 case ISD::BIT_CONVERT:
2241 // Basic sanity checking.
2242 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2243 && "Cannot BIT_CONVERT between types of different sizes!");
2244 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2245 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2246 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2247 if (OpOpcode == ISD::UNDEF)
2248 return getNode(ISD::UNDEF, VT);
2250 case ISD::SCALAR_TO_VECTOR:
2251 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2252 VT.getVectorElementType() == Operand.getValueType() &&
2253 "Illegal SCALAR_TO_VECTOR node!");
2254 if (OpOpcode == ISD::UNDEF)
2255 return getNode(ISD::UNDEF, VT);
2256 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2257 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2258 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2259 Operand.getConstantOperandVal(1) == 0 &&
2260 Operand.getOperand(0).getValueType() == VT)
2261 return Operand.getOperand(0);
2264 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2265 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2266 Operand.getNode()->getOperand(0));
2267 if (OpOpcode == ISD::FNEG) // --X -> X
2268 return Operand.getNode()->getOperand(0);
2271 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2272 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2277 SDVTList VTs = getVTList(VT);
2278 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2279 FoldingSetNodeID ID;
2280 SDValue Ops[1] = { Operand };
2281 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2284 return SDValue(E, 0);
2285 N = NodeAllocator.Allocate<UnarySDNode>();
2286 new (N) UnarySDNode(Opcode, VTs, Operand);
2287 CSEMap.InsertNode(N, IP);
2289 N = NodeAllocator.Allocate<UnarySDNode>();
2290 new (N) UnarySDNode(Opcode, VTs, Operand);
2293 AllNodes.push_back(N);
2297 return SDValue(N, 0);
2300 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2302 ConstantSDNode *Cst1,
2303 ConstantSDNode *Cst2) {
2304 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2307 case ISD::ADD: return getConstant(C1 + C2, VT);
2308 case ISD::SUB: return getConstant(C1 - C2, VT);
2309 case ISD::MUL: return getConstant(C1 * C2, VT);
2311 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2314 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2317 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2320 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2322 case ISD::AND: return getConstant(C1 & C2, VT);
2323 case ISD::OR: return getConstant(C1 | C2, VT);
2324 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2325 case ISD::SHL: return getConstant(C1 << C2, VT);
2326 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2327 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2328 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2329 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2336 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2337 SDValue N1, SDValue N2) {
2338 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2339 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2342 case ISD::TokenFactor:
2343 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2344 N2.getValueType() == MVT::Other && "Invalid token factor!");
2345 // Fold trivial token factors.
2346 if (N1.getOpcode() == ISD::EntryToken) return N2;
2347 if (N2.getOpcode() == ISD::EntryToken) return N1;
2348 if (N1 == N2) return N1;
2350 case ISD::CONCAT_VECTORS:
2351 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2352 // one big BUILD_VECTOR.
2353 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2354 N2.getOpcode() == ISD::BUILD_VECTOR) {
2355 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2356 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2357 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2361 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2362 N1.getValueType() == VT && "Binary operator types must match!");
2363 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2364 // worth handling here.
2365 if (N2C && N2C->isNullValue())
2367 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2374 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2375 N1.getValueType() == VT && "Binary operator types must match!");
2376 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2377 // it's worth handling here.
2378 if (N2C && N2C->isNullValue())
2385 assert(VT.isInteger() && "This operator does not apply to FP types!");
2395 assert(N1.getValueType() == N2.getValueType() &&
2396 N1.getValueType() == VT && "Binary operator types must match!");
2398 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2399 assert(N1.getValueType() == VT &&
2400 N1.getValueType().isFloatingPoint() &&
2401 N2.getValueType().isFloatingPoint() &&
2402 "Invalid FCOPYSIGN!");
2409 assert(VT == N1.getValueType() &&
2410 "Shift operators return type must be the same as their first arg");
2411 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2412 "Shifts only work on integers");
2414 // Always fold shifts of i1 values so the code generator doesn't need to
2415 // handle them. Since we know the size of the shift has to be less than the
2416 // size of the value, the shift/rotate count is guaranteed to be zero.
2420 case ISD::FP_ROUND_INREG: {
2421 MVT EVT = cast<VTSDNode>(N2)->getVT();
2422 assert(VT == N1.getValueType() && "Not an inreg round!");
2423 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2424 "Cannot FP_ROUND_INREG integer types");
2425 assert(EVT.bitsLE(VT) && "Not rounding down!");
2426 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2430 assert(VT.isFloatingPoint() &&
2431 N1.getValueType().isFloatingPoint() &&
2432 VT.bitsLE(N1.getValueType()) &&
2433 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2434 if (N1.getValueType() == VT) return N1; // noop conversion.
2436 case ISD::AssertSext:
2437 case ISD::AssertZext: {
2438 MVT EVT = cast<VTSDNode>(N2)->getVT();
2439 assert(VT == N1.getValueType() && "Not an inreg extend!");
2440 assert(VT.isInteger() && EVT.isInteger() &&
2441 "Cannot *_EXTEND_INREG FP types");
2442 assert(EVT.bitsLE(VT) && "Not extending!");
2443 if (VT == EVT) return N1; // noop assertion.
2446 case ISD::SIGN_EXTEND_INREG: {
2447 MVT EVT = cast<VTSDNode>(N2)->getVT();
2448 assert(VT == N1.getValueType() && "Not an inreg extend!");
2449 assert(VT.isInteger() && EVT.isInteger() &&
2450 "Cannot *_EXTEND_INREG FP types");
2451 assert(EVT.bitsLE(VT) && "Not extending!");
2452 if (EVT == VT) return N1; // Not actually extending
2455 APInt Val = N1C->getAPIntValue();
2456 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2457 Val <<= Val.getBitWidth()-FromBits;
2458 Val = Val.ashr(Val.getBitWidth()-FromBits);
2459 return getConstant(Val, VT);
2463 case ISD::EXTRACT_VECTOR_ELT:
2464 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2465 if (N1.getOpcode() == ISD::UNDEF)
2466 return getNode(ISD::UNDEF, VT);
2468 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2469 // expanding copies of large vectors from registers.
2471 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2472 N1.getNumOperands() > 0) {
2474 N1.getOperand(0).getValueType().getVectorNumElements();
2475 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2476 N1.getOperand(N2C->getZExtValue() / Factor),
2477 getConstant(N2C->getZExtValue() % Factor,
2478 N2.getValueType()));
2481 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2482 // expanding large vector constants.
2483 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2484 return N1.getOperand(N2C->getZExtValue());
2486 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2487 // operations are lowered to scalars.
2488 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2489 if (N1.getOperand(2) == N2)
2490 return N1.getOperand(1);
2492 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2495 case ISD::EXTRACT_ELEMENT:
2496 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2497 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2498 (N1.getValueType().isInteger() == VT.isInteger()) &&
2499 "Wrong types for EXTRACT_ELEMENT!");
2501 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2502 // 64-bit integers into 32-bit parts. Instead of building the extract of
2503 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2504 if (N1.getOpcode() == ISD::BUILD_PAIR)
2505 return N1.getOperand(N2C->getZExtValue());
2507 // EXTRACT_ELEMENT of a constant int is also very common.
2508 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2509 unsigned ElementSize = VT.getSizeInBits();
2510 unsigned Shift = ElementSize * N2C->getZExtValue();
2511 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2512 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2515 case ISD::EXTRACT_SUBVECTOR:
2516 if (N1.getValueType() == VT) // Trivial extraction.
2523 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2524 if (SV.getNode()) return SV;
2525 } else { // Cannonicalize constant to RHS if commutative
2526 if (isCommutativeBinOp(Opcode)) {
2527 std::swap(N1C, N2C);
2533 // Constant fold FP operations.
2534 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2535 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2537 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2538 // Cannonicalize constant to RHS if commutative
2539 std::swap(N1CFP, N2CFP);
2541 } else if (N2CFP && VT != MVT::ppcf128) {
2542 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2543 APFloat::opStatus s;
2546 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2547 if (s != APFloat::opInvalidOp)
2548 return getConstantFP(V1, VT);
2551 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2552 if (s!=APFloat::opInvalidOp)
2553 return getConstantFP(V1, VT);
2556 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2557 if (s!=APFloat::opInvalidOp)
2558 return getConstantFP(V1, VT);
2561 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2562 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2563 return getConstantFP(V1, VT);
2566 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2567 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2568 return getConstantFP(V1, VT);
2570 case ISD::FCOPYSIGN:
2572 return getConstantFP(V1, VT);
2578 // Canonicalize an UNDEF to the RHS, even over a constant.
2579 if (N1.getOpcode() == ISD::UNDEF) {
2580 if (isCommutativeBinOp(Opcode)) {
2584 case ISD::FP_ROUND_INREG:
2585 case ISD::SIGN_EXTEND_INREG:
2591 return N1; // fold op(undef, arg2) -> undef
2599 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2600 // For vectors, we can't easily build an all zero vector, just return
2607 // Fold a bunch of operators when the RHS is undef.
2608 if (N2.getOpcode() == ISD::UNDEF) {
2611 if (N1.getOpcode() == ISD::UNDEF)
2612 // Handle undef ^ undef -> 0 special case. This is a common
2614 return getConstant(0, VT);
2629 return N2; // fold op(arg1, undef) -> undef
2635 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2636 // For vectors, we can't easily build an all zero vector, just return
2641 return getConstant(VT.getIntegerVTBitMask(), VT);
2642 // For vectors, we can't easily build an all one vector, just return
2650 // Memoize this node if possible.
2652 SDVTList VTs = getVTList(VT);
2653 if (VT != MVT::Flag) {
2654 SDValue Ops[] = { N1, N2 };
2655 FoldingSetNodeID ID;
2656 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2658 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2659 return SDValue(E, 0);
2660 N = NodeAllocator.Allocate<BinarySDNode>();
2661 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2662 CSEMap.InsertNode(N, IP);
2664 N = NodeAllocator.Allocate<BinarySDNode>();
2665 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2668 AllNodes.push_back(N);
2672 return SDValue(N, 0);
2675 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2676 SDValue N1, SDValue N2, SDValue N3) {
2677 // Perform various simplifications.
2678 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2679 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2681 case ISD::CONCAT_VECTORS:
2682 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2683 // one big BUILD_VECTOR.
2684 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2685 N2.getOpcode() == ISD::BUILD_VECTOR &&
2686 N3.getOpcode() == ISD::BUILD_VECTOR) {
2687 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2688 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2689 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2690 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2694 // Use FoldSetCC to simplify SETCC's.
2695 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2696 if (Simp.getNode()) return Simp;
2701 if (N1C->getZExtValue())
2702 return N2; // select true, X, Y -> X
2704 return N3; // select false, X, Y -> Y
2707 if (N2 == N3) return N2; // select C, X, X -> X
2711 if (N2C->getZExtValue()) // Unconditional branch
2712 return getNode(ISD::BR, MVT::Other, N1, N3);
2714 return N1; // Never-taken branch
2717 case ISD::VECTOR_SHUFFLE:
2718 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2719 VT.isVector() && N3.getValueType().isVector() &&
2720 N3.getOpcode() == ISD::BUILD_VECTOR &&
2721 VT.getVectorNumElements() == N3.getNumOperands() &&
2722 "Illegal VECTOR_SHUFFLE node!");
2724 case ISD::BIT_CONVERT:
2725 // Fold bit_convert nodes from a type to themselves.
2726 if (N1.getValueType() == VT)
2731 // Memoize node if it doesn't produce a flag.
2733 SDVTList VTs = getVTList(VT);
2734 if (VT != MVT::Flag) {
2735 SDValue Ops[] = { N1, N2, N3 };
2736 FoldingSetNodeID ID;
2737 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2739 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2740 return SDValue(E, 0);
2741 N = NodeAllocator.Allocate<TernarySDNode>();
2742 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2743 CSEMap.InsertNode(N, IP);
2745 N = NodeAllocator.Allocate<TernarySDNode>();
2746 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2748 AllNodes.push_back(N);
2752 return SDValue(N, 0);
2755 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2756 SDValue N1, SDValue N2, SDValue N3,
2758 SDValue Ops[] = { N1, N2, N3, N4 };
2759 return getNode(Opcode, VT, Ops, 4);
2762 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2763 SDValue N1, SDValue N2, SDValue N3,
2764 SDValue N4, SDValue N5) {
2765 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2766 return getNode(Opcode, VT, Ops, 5);
2769 /// getMemsetValue - Vectorized representation of the memset value
2771 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2772 unsigned NumBits = VT.isVector() ?
2773 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2774 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2775 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2777 for (unsigned i = NumBits; i > 8; i >>= 1) {
2778 Val = (Val << Shift) | Val;
2782 return DAG.getConstant(Val, VT);
2783 return DAG.getConstantFP(APFloat(Val), VT);
2786 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2788 for (unsigned i = NumBits; i > 8; i >>= 1) {
2789 Value = DAG.getNode(ISD::OR, VT,
2790 DAG.getNode(ISD::SHL, VT, Value,
2791 DAG.getConstant(Shift, MVT::i8)), Value);
2798 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2799 /// used when a memcpy is turned into a memset when the source is a constant
2801 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2802 const TargetLowering &TLI,
2803 std::string &Str, unsigned Offset) {
2804 // Handle vector with all elements zero.
2807 return DAG.getConstant(0, VT);
2808 unsigned NumElts = VT.getVectorNumElements();
2809 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2810 return DAG.getNode(ISD::BIT_CONVERT, VT,
2811 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2814 assert(!VT.isVector() && "Can't handle vector type here!");
2815 unsigned NumBits = VT.getSizeInBits();
2816 unsigned MSB = NumBits / 8;
2818 if (TLI.isLittleEndian())
2819 Offset = Offset + MSB - 1;
2820 for (unsigned i = 0; i != MSB; ++i) {
2821 Val = (Val << 8) | (unsigned char)Str[Offset];
2822 Offset += TLI.isLittleEndian() ? -1 : 1;
2824 return DAG.getConstant(Val, VT);
2827 /// getMemBasePlusOffset - Returns base and offset node for the
2829 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2830 SelectionDAG &DAG) {
2831 MVT VT = Base.getValueType();
2832 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2835 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2837 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2838 unsigned SrcDelta = 0;
2839 GlobalAddressSDNode *G = NULL;
2840 if (Src.getOpcode() == ISD::GlobalAddress)
2841 G = cast<GlobalAddressSDNode>(Src);
2842 else if (Src.getOpcode() == ISD::ADD &&
2843 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2844 Src.getOperand(1).getOpcode() == ISD::Constant) {
2845 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2846 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2851 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2852 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2858 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2859 /// to replace the memset / memcpy is below the threshold. It also returns the
2860 /// types of the sequence of memory ops to perform memset / memcpy.
2862 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2863 SDValue Dst, SDValue Src,
2864 unsigned Limit, uint64_t Size, unsigned &Align,
2865 std::string &Str, bool &isSrcStr,
2867 const TargetLowering &TLI) {
2868 isSrcStr = isMemSrcFromString(Src, Str);
2869 bool isSrcConst = isa<ConstantSDNode>(Src);
2870 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2871 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2872 if (VT != MVT::iAny) {
2873 unsigned NewAlign = (unsigned)
2874 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2875 // If source is a string constant, this will require an unaligned load.
2876 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2877 if (Dst.getOpcode() != ISD::FrameIndex) {
2878 // Can't change destination alignment. It requires a unaligned store.
2882 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2883 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2884 if (MFI->isFixedObjectIndex(FI)) {
2885 // Can't change destination alignment. It requires a unaligned store.
2889 // Give the stack frame object a larger alignment if needed.
2890 if (MFI->getObjectAlignment(FI) < NewAlign)
2891 MFI->setObjectAlignment(FI, NewAlign);
2898 if (VT == MVT::iAny) {
2902 switch (Align & 7) {
2903 case 0: VT = MVT::i64; break;
2904 case 4: VT = MVT::i32; break;
2905 case 2: VT = MVT::i16; break;
2906 default: VT = MVT::i8; break;
2911 while (!TLI.isTypeLegal(LVT))
2912 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2913 assert(LVT.isInteger());
2919 unsigned NumMemOps = 0;
2921 unsigned VTSize = VT.getSizeInBits() / 8;
2922 while (VTSize > Size) {
2923 // For now, only use non-vector load / store's for the left-over pieces.
2924 if (VT.isVector()) {
2926 while (!TLI.isTypeLegal(VT))
2927 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2928 VTSize = VT.getSizeInBits() / 8;
2930 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2935 if (++NumMemOps > Limit)
2937 MemOps.push_back(VT);
2944 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2945 SDValue Chain, SDValue Dst,
2946 SDValue Src, uint64_t Size,
2947 unsigned Align, bool AlwaysInline,
2948 const Value *DstSV, uint64_t DstSVOff,
2949 const Value *SrcSV, uint64_t SrcSVOff){
2950 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2952 // Expand memcpy to a series of load and store ops if the size operand falls
2953 // below a certain threshold.
2954 std::vector<MVT> MemOps;
2955 uint64_t Limit = -1ULL;
2957 Limit = TLI.getMaxStoresPerMemcpy();
2958 unsigned DstAlign = Align; // Destination alignment can change.
2961 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2962 Str, CopyFromStr, DAG, TLI))
2966 bool isZeroStr = CopyFromStr && Str.empty();
2967 SmallVector<SDValue, 8> OutChains;
2968 unsigned NumMemOps = MemOps.size();
2969 uint64_t SrcOff = 0, DstOff = 0;
2970 for (unsigned i = 0; i < NumMemOps; i++) {
2972 unsigned VTSize = VT.getSizeInBits() / 8;
2973 SDValue Value, Store;
2975 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2976 // It's unlikely a store of a vector immediate can be done in a single
2977 // instruction. It would require a load from a constantpool first.
2978 // We also handle store a vector with all zero's.
2979 // FIXME: Handle other cases where store of vector immediate is done in
2980 // a single instruction.
2981 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2982 Store = DAG.getStore(Chain, Value,
2983 getMemBasePlusOffset(Dst, DstOff, DAG),
2984 DstSV, DstSVOff + DstOff, false, DstAlign);
2986 Value = DAG.getLoad(VT, Chain,
2987 getMemBasePlusOffset(Src, SrcOff, DAG),
2988 SrcSV, SrcSVOff + SrcOff, false, Align);
2989 Store = DAG.getStore(Chain, Value,
2990 getMemBasePlusOffset(Dst, DstOff, DAG),
2991 DstSV, DstSVOff + DstOff, false, DstAlign);
2993 OutChains.push_back(Store);
2998 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2999 &OutChains[0], OutChains.size());
3002 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3003 SDValue Chain, SDValue Dst,
3004 SDValue Src, uint64_t Size,
3005 unsigned Align, bool AlwaysInline,
3006 const Value *DstSV, uint64_t DstSVOff,
3007 const Value *SrcSV, uint64_t SrcSVOff){
3008 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3010 // Expand memmove to a series of load and store ops if the size operand falls
3011 // below a certain threshold.
3012 std::vector<MVT> MemOps;
3013 uint64_t Limit = -1ULL;
3015 Limit = TLI.getMaxStoresPerMemmove();
3016 unsigned DstAlign = Align; // Destination alignment can change.
3019 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3020 Str, CopyFromStr, DAG, TLI))
3023 uint64_t SrcOff = 0, DstOff = 0;
3025 SmallVector<SDValue, 8> LoadValues;
3026 SmallVector<SDValue, 8> LoadChains;
3027 SmallVector<SDValue, 8> OutChains;
3028 unsigned NumMemOps = MemOps.size();
3029 for (unsigned i = 0; i < NumMemOps; i++) {
3031 unsigned VTSize = VT.getSizeInBits() / 8;
3032 SDValue Value, Store;
3034 Value = DAG.getLoad(VT, Chain,
3035 getMemBasePlusOffset(Src, SrcOff, DAG),
3036 SrcSV, SrcSVOff + SrcOff, false, Align);
3037 LoadValues.push_back(Value);
3038 LoadChains.push_back(Value.getValue(1));
3041 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3042 &LoadChains[0], LoadChains.size());
3044 for (unsigned i = 0; i < NumMemOps; i++) {
3046 unsigned VTSize = VT.getSizeInBits() / 8;
3047 SDValue Value, Store;
3049 Store = DAG.getStore(Chain, LoadValues[i],
3050 getMemBasePlusOffset(Dst, DstOff, DAG),
3051 DstSV, DstSVOff + DstOff, false, DstAlign);
3052 OutChains.push_back(Store);
3056 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3057 &OutChains[0], OutChains.size());
3060 static SDValue getMemsetStores(SelectionDAG &DAG,
3061 SDValue Chain, SDValue Dst,
3062 SDValue Src, uint64_t Size,
3064 const Value *DstSV, uint64_t DstSVOff) {
3065 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3067 // Expand memset to a series of load/store ops if the size operand
3068 // falls below a certain threshold.
3069 std::vector<MVT> MemOps;
3072 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3073 Size, Align, Str, CopyFromStr, DAG, TLI))
3076 SmallVector<SDValue, 8> OutChains;
3077 uint64_t DstOff = 0;
3079 unsigned NumMemOps = MemOps.size();
3080 for (unsigned i = 0; i < NumMemOps; i++) {
3082 unsigned VTSize = VT.getSizeInBits() / 8;
3083 SDValue Value = getMemsetValue(Src, VT, DAG);
3084 SDValue Store = DAG.getStore(Chain, Value,
3085 getMemBasePlusOffset(Dst, DstOff, DAG),
3086 DstSV, DstSVOff + DstOff);
3087 OutChains.push_back(Store);
3091 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3092 &OutChains[0], OutChains.size());
3095 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3096 SDValue Src, SDValue Size,
3097 unsigned Align, bool AlwaysInline,
3098 const Value *DstSV, uint64_t DstSVOff,
3099 const Value *SrcSV, uint64_t SrcSVOff) {
3101 // Check to see if we should lower the memcpy to loads and stores first.
3102 // For cases within the target-specified limits, this is the best choice.
3103 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3105 // Memcpy with size zero? Just return the original chain.
3106 if (ConstantSize->isNullValue())
3110 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3111 ConstantSize->getZExtValue(),
3112 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3113 if (Result.getNode())
3117 // Then check to see if we should lower the memcpy with target-specific
3118 // code. If the target chooses to do this, this is the next best.
3120 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3122 DstSV, DstSVOff, SrcSV, SrcSVOff);
3123 if (Result.getNode())
3126 // If we really need inline code and the target declined to provide it,
3127 // use a (potentially long) sequence of loads and stores.
3129 assert(ConstantSize && "AlwaysInline requires a constant size!");
3130 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3131 ConstantSize->getZExtValue(), Align, true,
3132 DstSV, DstSVOff, SrcSV, SrcSVOff);
3135 // Emit a library call.
3136 TargetLowering::ArgListTy Args;
3137 TargetLowering::ArgListEntry Entry;
3138 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3139 Entry.Node = Dst; Args.push_back(Entry);
3140 Entry.Node = Src; Args.push_back(Entry);
3141 Entry.Node = Size; Args.push_back(Entry);
3142 std::pair<SDValue,SDValue> CallResult =
3143 TLI.LowerCallTo(Chain, Type::VoidTy,
3144 false, false, false, false, CallingConv::C, false,
3145 getExternalSymbol("memcpy", TLI.getPointerTy()),
3147 return CallResult.second;
3150 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3151 SDValue Src, SDValue Size,
3153 const Value *DstSV, uint64_t DstSVOff,
3154 const Value *SrcSV, uint64_t SrcSVOff) {
3156 // Check to see if we should lower the memmove to loads and stores first.
3157 // For cases within the target-specified limits, this is the best choice.
3158 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3160 // Memmove with size zero? Just return the original chain.
3161 if (ConstantSize->isNullValue())
3165 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3166 ConstantSize->getZExtValue(),
3167 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3168 if (Result.getNode())
3172 // Then check to see if we should lower the memmove with target-specific
3173 // code. If the target chooses to do this, this is the next best.
3175 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3176 DstSV, DstSVOff, SrcSV, SrcSVOff);
3177 if (Result.getNode())
3180 // Emit a library call.
3181 TargetLowering::ArgListTy Args;
3182 TargetLowering::ArgListEntry Entry;
3183 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3184 Entry.Node = Dst; Args.push_back(Entry);
3185 Entry.Node = Src; Args.push_back(Entry);
3186 Entry.Node = Size; Args.push_back(Entry);
3187 std::pair<SDValue,SDValue> CallResult =
3188 TLI.LowerCallTo(Chain, Type::VoidTy,
3189 false, false, false, false, CallingConv::C, false,
3190 getExternalSymbol("memmove", TLI.getPointerTy()),
3192 return CallResult.second;
3195 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3196 SDValue Src, SDValue Size,
3198 const Value *DstSV, uint64_t DstSVOff) {
3200 // Check to see if we should lower the memset to stores first.
3201 // For cases within the target-specified limits, this is the best choice.
3202 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3204 // Memset with size zero? Just return the original chain.
3205 if (ConstantSize->isNullValue())
3209 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3210 Align, DstSV, DstSVOff);
3211 if (Result.getNode())
3215 // Then check to see if we should lower the memset with target-specific
3216 // code. If the target chooses to do this, this is the next best.
3218 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3220 if (Result.getNode())
3223 // Emit a library call.
3224 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3225 TargetLowering::ArgListTy Args;
3226 TargetLowering::ArgListEntry Entry;
3227 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3228 Args.push_back(Entry);
3229 // Extend or truncate the argument to be an i32 value for the call.
3230 if (Src.getValueType().bitsGT(MVT::i32))
3231 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3233 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3234 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3235 Args.push_back(Entry);
3236 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3237 Args.push_back(Entry);
3238 std::pair<SDValue,SDValue> CallResult =
3239 TLI.LowerCallTo(Chain, Type::VoidTy,
3240 false, false, false, false, CallingConv::C, false,
3241 getExternalSymbol("memset", TLI.getPointerTy()),
3243 return CallResult.second;
3246 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3247 SDValue Ptr, SDValue Cmp,
3248 SDValue Swp, const Value* PtrVal,
3249 unsigned Alignment) {
3250 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 ||
3251 Opcode == ISD::ATOMIC_CMP_SWAP_16 ||
3252 Opcode == ISD::ATOMIC_CMP_SWAP_32 ||
3253 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op");
3254 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3256 MVT VT = Cmp.getValueType();
3258 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3259 Alignment = getMVTAlignment(VT);
3261 SDVTList VTs = getVTList(VT, MVT::Other);
3262 FoldingSetNodeID ID;
3263 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3264 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3266 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3267 return SDValue(E, 0);
3268 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3269 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3270 CSEMap.InsertNode(N, IP);
3271 AllNodes.push_back(N);
3272 return SDValue(N, 0);
3275 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3276 SDValue Ptr, SDValue Val,
3277 const Value* PtrVal,
3278 unsigned Alignment) {
3279 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 ||
3280 Opcode == ISD::ATOMIC_LOAD_SUB_8 ||
3281 Opcode == ISD::ATOMIC_LOAD_AND_8 ||
3282 Opcode == ISD::ATOMIC_LOAD_OR_8 ||
3283 Opcode == ISD::ATOMIC_LOAD_XOR_8 ||
3284 Opcode == ISD::ATOMIC_LOAD_NAND_8 ||
3285 Opcode == ISD::ATOMIC_LOAD_MIN_8 ||
3286 Opcode == ISD::ATOMIC_LOAD_MAX_8 ||
3287 Opcode == ISD::ATOMIC_LOAD_UMIN_8 ||
3288 Opcode == ISD::ATOMIC_LOAD_UMAX_8 ||
3289 Opcode == ISD::ATOMIC_SWAP_8 ||
3290 Opcode == ISD::ATOMIC_LOAD_ADD_16 ||
3291 Opcode == ISD::ATOMIC_LOAD_SUB_16 ||
3292 Opcode == ISD::ATOMIC_LOAD_AND_16 ||
3293 Opcode == ISD::ATOMIC_LOAD_OR_16 ||
3294 Opcode == ISD::ATOMIC_LOAD_XOR_16 ||
3295 Opcode == ISD::ATOMIC_LOAD_NAND_16 ||
3296 Opcode == ISD::ATOMIC_LOAD_MIN_16 ||
3297 Opcode == ISD::ATOMIC_LOAD_MAX_16 ||
3298 Opcode == ISD::ATOMIC_LOAD_UMIN_16 ||
3299 Opcode == ISD::ATOMIC_LOAD_UMAX_16 ||
3300 Opcode == ISD::ATOMIC_SWAP_16 ||
3301 Opcode == ISD::ATOMIC_LOAD_ADD_32 ||
3302 Opcode == ISD::ATOMIC_LOAD_SUB_32 ||
3303 Opcode == ISD::ATOMIC_LOAD_AND_32 ||
3304 Opcode == ISD::ATOMIC_LOAD_OR_32 ||
3305 Opcode == ISD::ATOMIC_LOAD_XOR_32 ||
3306 Opcode == ISD::ATOMIC_LOAD_NAND_32 ||
3307 Opcode == ISD::ATOMIC_LOAD_MIN_32 ||
3308 Opcode == ISD::ATOMIC_LOAD_MAX_32 ||
3309 Opcode == ISD::ATOMIC_LOAD_UMIN_32 ||
3310 Opcode == ISD::ATOMIC_LOAD_UMAX_32 ||
3311 Opcode == ISD::ATOMIC_SWAP_32 ||
3312 Opcode == ISD::ATOMIC_LOAD_ADD_64 ||
3313 Opcode == ISD::ATOMIC_LOAD_SUB_64 ||
3314 Opcode == ISD::ATOMIC_LOAD_AND_64 ||
3315 Opcode == ISD::ATOMIC_LOAD_OR_64 ||
3316 Opcode == ISD::ATOMIC_LOAD_XOR_64 ||
3317 Opcode == ISD::ATOMIC_LOAD_NAND_64 ||
3318 Opcode == ISD::ATOMIC_LOAD_MIN_64 ||
3319 Opcode == ISD::ATOMIC_LOAD_MAX_64 ||
3320 Opcode == ISD::ATOMIC_LOAD_UMIN_64 ||
3321 Opcode == ISD::ATOMIC_LOAD_UMAX_64 ||
3322 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op");
3324 MVT VT = Val.getValueType();
3326 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3327 Alignment = getMVTAlignment(VT);
3329 SDVTList VTs = getVTList(VT, MVT::Other);
3330 FoldingSetNodeID ID;
3331 SDValue Ops[] = {Chain, Ptr, Val};
3332 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3334 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3335 return SDValue(E, 0);
3336 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3337 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3338 CSEMap.InsertNode(N, IP);
3339 AllNodes.push_back(N);
3340 return SDValue(N, 0);
3343 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3344 /// Allowed to return something different (and simpler) if Simplify is true.
3345 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3347 if (Simplify && NumOps == 1)
3350 SmallVector<MVT, 4> VTs;
3351 VTs.reserve(NumOps);
3352 for (unsigned i = 0; i < NumOps; ++i)
3353 VTs.push_back(Ops[i].getValueType());
3354 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3358 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3359 const MVT *VTs, unsigned NumVTs,
3360 const SDValue *Ops, unsigned NumOps,
3361 MVT MemVT, const Value *srcValue, int SVOff,
3362 unsigned Align, bool Vol,
3363 bool ReadMem, bool WriteMem) {
3364 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3365 MemVT, srcValue, SVOff, Align, Vol,
3370 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3371 const SDValue *Ops, unsigned NumOps,
3372 MVT MemVT, const Value *srcValue, int SVOff,
3373 unsigned Align, bool Vol,
3374 bool ReadMem, bool WriteMem) {
3375 // Memoize the node unless it returns a flag.
3376 MemIntrinsicSDNode *N;
3377 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3378 FoldingSetNodeID ID;
3379 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3381 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3382 return SDValue(E, 0);
3384 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3385 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3386 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3387 CSEMap.InsertNode(N, IP);
3389 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3390 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3391 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3393 AllNodes.push_back(N);
3394 return SDValue(N, 0);
3398 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3399 bool IsInreg, SDVTList VTs,
3400 const SDValue *Operands, unsigned NumOperands) {
3401 // Do not include isTailCall in the folding set profile.
3402 FoldingSetNodeID ID;
3403 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3404 ID.AddInteger(CallingConv);
3405 ID.AddInteger(IsVarArgs);
3407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3408 // Instead of including isTailCall in the folding set, we just
3409 // set the flag of the existing node.
3411 cast<CallSDNode>(E)->setNotTailCall();
3412 return SDValue(E, 0);
3414 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3415 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3416 VTs, Operands, NumOperands);
3417 CSEMap.InsertNode(N, IP);
3418 AllNodes.push_back(N);
3419 return SDValue(N, 0);
3423 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3424 MVT VT, SDValue Chain,
3425 SDValue Ptr, SDValue Offset,
3426 const Value *SV, int SVOffset, MVT EVT,
3427 bool isVolatile, unsigned Alignment) {
3428 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3429 Alignment = getMVTAlignment(VT);
3432 ExtType = ISD::NON_EXTLOAD;
3433 } else if (ExtType == ISD::NON_EXTLOAD) {
3434 assert(VT == EVT && "Non-extending load from different memory type!");
3438 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3439 "Invalid vector extload!");
3441 assert(EVT.bitsLT(VT) &&
3442 "Should only be an extending load, not truncating!");
3443 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3444 "Cannot sign/zero extend a FP/Vector load!");
3445 assert(VT.isInteger() == EVT.isInteger() &&
3446 "Cannot convert from FP to Int or Int -> FP!");
3449 bool Indexed = AM != ISD::UNINDEXED;
3450 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3451 "Unindexed load with an offset!");
3453 SDVTList VTs = Indexed ?
3454 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3455 SDValue Ops[] = { Chain, Ptr, Offset };
3456 FoldingSetNodeID ID;
3457 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3459 ID.AddInteger(ExtType);
3460 ID.AddInteger(EVT.getRawBits());
3461 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3463 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3464 return SDValue(E, 0);
3465 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3466 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3467 Alignment, isVolatile);
3468 CSEMap.InsertNode(N, IP);
3469 AllNodes.push_back(N);
3470 return SDValue(N, 0);
3473 SDValue SelectionDAG::getLoad(MVT VT,
3474 SDValue Chain, SDValue Ptr,
3475 const Value *SV, int SVOffset,
3476 bool isVolatile, unsigned Alignment) {
3477 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3478 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3479 SV, SVOffset, VT, isVolatile, Alignment);
3482 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3483 SDValue Chain, SDValue Ptr,
3485 int SVOffset, MVT EVT,
3486 bool isVolatile, unsigned Alignment) {
3487 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3488 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3489 SV, SVOffset, EVT, isVolatile, Alignment);
3493 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3494 SDValue Offset, ISD::MemIndexedMode AM) {
3495 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3496 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3497 "Load is already a indexed load!");
3498 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3499 LD->getChain(), Base, Offset, LD->getSrcValue(),
3500 LD->getSrcValueOffset(), LD->getMemoryVT(),
3501 LD->isVolatile(), LD->getAlignment());
3504 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3505 SDValue Ptr, const Value *SV, int SVOffset,
3506 bool isVolatile, unsigned Alignment) {
3507 MVT VT = Val.getValueType();
3509 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3510 Alignment = getMVTAlignment(VT);
3512 SDVTList VTs = getVTList(MVT::Other);
3513 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3514 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3515 FoldingSetNodeID ID;
3516 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3517 ID.AddInteger(ISD::UNINDEXED);
3518 ID.AddInteger(false);
3519 ID.AddInteger(VT.getRawBits());
3520 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3522 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3523 return SDValue(E, 0);
3524 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3525 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3526 VT, SV, SVOffset, Alignment, isVolatile);
3527 CSEMap.InsertNode(N, IP);
3528 AllNodes.push_back(N);
3529 return SDValue(N, 0);
3532 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3533 SDValue Ptr, const Value *SV,
3534 int SVOffset, MVT SVT,
3535 bool isVolatile, unsigned Alignment) {
3536 MVT VT = Val.getValueType();
3539 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3541 assert(VT.bitsGT(SVT) && "Not a truncation?");
3542 assert(VT.isInteger() == SVT.isInteger() &&
3543 "Can't do FP-INT conversion!");
3545 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3546 Alignment = getMVTAlignment(VT);
3548 SDVTList VTs = getVTList(MVT::Other);
3549 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3550 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3551 FoldingSetNodeID ID;
3552 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3553 ID.AddInteger(ISD::UNINDEXED);
3555 ID.AddInteger(SVT.getRawBits());
3556 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3558 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3559 return SDValue(E, 0);
3560 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3561 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3562 SVT, SV, SVOffset, Alignment, isVolatile);
3563 CSEMap.InsertNode(N, IP);
3564 AllNodes.push_back(N);
3565 return SDValue(N, 0);
3569 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3570 SDValue Offset, ISD::MemIndexedMode AM) {
3571 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3572 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3573 "Store is already a indexed store!");
3574 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3575 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3576 FoldingSetNodeID ID;
3577 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3579 ID.AddInteger(ST->isTruncatingStore());
3580 ID.AddInteger(ST->getMemoryVT().getRawBits());
3581 ID.AddInteger(ST->getRawFlags());
3583 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3584 return SDValue(E, 0);
3585 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3586 new (N) StoreSDNode(Ops, VTs, AM,
3587 ST->isTruncatingStore(), ST->getMemoryVT(),
3588 ST->getSrcValue(), ST->getSrcValueOffset(),
3589 ST->getAlignment(), ST->isVolatile());
3590 CSEMap.InsertNode(N, IP);
3591 AllNodes.push_back(N);
3592 return SDValue(N, 0);
3595 SDValue SelectionDAG::getVAArg(MVT VT,
3596 SDValue Chain, SDValue Ptr,
3598 SDValue Ops[] = { Chain, Ptr, SV };
3599 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3602 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3603 const SDUse *Ops, unsigned NumOps) {
3605 case 0: return getNode(Opcode, VT);
3606 case 1: return getNode(Opcode, VT, Ops[0]);
3607 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3608 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3612 // Copy from an SDUse array into an SDValue array for use with
3613 // the regular getNode logic.
3614 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3615 return getNode(Opcode, VT, &NewOps[0], NumOps);
3618 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3619 const SDValue *Ops, unsigned NumOps) {
3621 case 0: return getNode(Opcode, VT);
3622 case 1: return getNode(Opcode, VT, Ops[0]);
3623 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3624 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3630 case ISD::SELECT_CC: {
3631 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3632 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3633 "LHS and RHS of condition must have same type!");
3634 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3635 "True and False arms of SelectCC must have same type!");
3636 assert(Ops[2].getValueType() == VT &&
3637 "select_cc node must be of same type as true and false value!");
3641 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3642 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3643 "LHS/RHS of comparison should match types!");
3650 SDVTList VTs = getVTList(VT);
3651 if (VT != MVT::Flag) {
3652 FoldingSetNodeID ID;
3653 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3655 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3656 return SDValue(E, 0);
3657 N = NodeAllocator.Allocate<SDNode>();
3658 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3659 CSEMap.InsertNode(N, IP);
3661 N = NodeAllocator.Allocate<SDNode>();
3662 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3664 AllNodes.push_back(N);
3668 return SDValue(N, 0);
3671 SDValue SelectionDAG::getNode(unsigned Opcode,
3672 const std::vector<MVT> &ResultTys,
3673 const SDValue *Ops, unsigned NumOps) {
3674 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3678 SDValue SelectionDAG::getNode(unsigned Opcode,
3679 const MVT *VTs, unsigned NumVTs,
3680 const SDValue *Ops, unsigned NumOps) {
3682 return getNode(Opcode, VTs[0], Ops, NumOps);
3683 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3686 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3687 const SDValue *Ops, unsigned NumOps) {
3688 if (VTList.NumVTs == 1)
3689 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3692 // FIXME: figure out how to safely handle things like
3693 // int foo(int x) { return 1 << (x & 255); }
3694 // int bar() { return foo(256); }
3696 case ISD::SRA_PARTS:
3697 case ISD::SRL_PARTS:
3698 case ISD::SHL_PARTS:
3699 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3700 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3701 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3702 else if (N3.getOpcode() == ISD::AND)
3703 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3704 // If the and is only masking out bits that cannot effect the shift,
3705 // eliminate the and.
3706 unsigned NumBits = VT.getSizeInBits()*2;
3707 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3708 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3714 // Memoize the node unless it returns a flag.
3716 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3717 FoldingSetNodeID ID;
3718 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3720 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3721 return SDValue(E, 0);
3723 N = NodeAllocator.Allocate<UnarySDNode>();
3724 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3725 } else if (NumOps == 2) {
3726 N = NodeAllocator.Allocate<BinarySDNode>();
3727 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3728 } else if (NumOps == 3) {
3729 N = NodeAllocator.Allocate<TernarySDNode>();
3730 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3732 N = NodeAllocator.Allocate<SDNode>();
3733 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3735 CSEMap.InsertNode(N, IP);
3738 N = NodeAllocator.Allocate<UnarySDNode>();
3739 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3740 } else if (NumOps == 2) {
3741 N = NodeAllocator.Allocate<BinarySDNode>();
3742 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3743 } else if (NumOps == 3) {
3744 N = NodeAllocator.Allocate<TernarySDNode>();
3745 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3747 N = NodeAllocator.Allocate<SDNode>();
3748 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3751 AllNodes.push_back(N);
3755 return SDValue(N, 0);
3758 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3759 return getNode(Opcode, VTList, 0, 0);
3762 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3764 SDValue Ops[] = { N1 };
3765 return getNode(Opcode, VTList, Ops, 1);
3768 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3769 SDValue N1, SDValue N2) {
3770 SDValue Ops[] = { N1, N2 };
3771 return getNode(Opcode, VTList, Ops, 2);
3774 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3775 SDValue N1, SDValue N2, SDValue N3) {
3776 SDValue Ops[] = { N1, N2, N3 };
3777 return getNode(Opcode, VTList, Ops, 3);
3780 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3781 SDValue N1, SDValue N2, SDValue N3,
3783 SDValue Ops[] = { N1, N2, N3, N4 };
3784 return getNode(Opcode, VTList, Ops, 4);
3787 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3788 SDValue N1, SDValue N2, SDValue N3,
3789 SDValue N4, SDValue N5) {
3790 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3791 return getNode(Opcode, VTList, Ops, 5);
3794 SDVTList SelectionDAG::getVTList(MVT VT) {
3795 return makeVTList(SDNode::getValueTypeList(VT), 1);
3798 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3799 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3800 E = VTList.rend(); I != E; ++I)
3801 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3804 MVT *Array = Allocator.Allocate<MVT>(2);
3807 SDVTList Result = makeVTList(Array, 2);
3808 VTList.push_back(Result);
3812 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3813 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3814 E = VTList.rend(); I != E; ++I)
3815 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3819 MVT *Array = Allocator.Allocate<MVT>(3);
3823 SDVTList Result = makeVTList(Array, 3);
3824 VTList.push_back(Result);
3828 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3830 case 0: assert(0 && "Cannot have nodes without results!");
3831 case 1: return getVTList(VTs[0]);
3832 case 2: return getVTList(VTs[0], VTs[1]);
3833 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3837 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3838 E = VTList.rend(); I != E; ++I) {
3839 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3842 bool NoMatch = false;
3843 for (unsigned i = 2; i != NumVTs; ++i)
3844 if (VTs[i] != I->VTs[i]) {
3852 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3853 std::copy(VTs, VTs+NumVTs, Array);
3854 SDVTList Result = makeVTList(Array, NumVTs);
3855 VTList.push_back(Result);
3860 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3861 /// specified operands. If the resultant node already exists in the DAG,
3862 /// this does not modify the specified node, instead it returns the node that
3863 /// already exists. If the resultant node does not exist in the DAG, the
3864 /// input node is returned. As a degenerate case, if you specify the same
3865 /// input operands as the node already has, the input node is returned.
3866 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3867 SDNode *N = InN.getNode();
3868 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3870 // Check to see if there is no change.
3871 if (Op == N->getOperand(0)) return InN;
3873 // See if the modified node already exists.
3874 void *InsertPos = 0;
3875 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3876 return SDValue(Existing, InN.getResNo());
3878 // Nope it doesn't. Remove the node from its current place in the maps.
3880 if (!RemoveNodeFromCSEMaps(N))
3883 // Now we update the operands.
3884 N->OperandList[0].getVal()->removeUser(0, N);
3885 N->OperandList[0] = Op;
3886 N->OperandList[0].setUser(N);
3887 Op.getNode()->addUser(0, N);
3889 // If this gets put into a CSE map, add it.
3890 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3894 SDValue SelectionDAG::
3895 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3896 SDNode *N = InN.getNode();
3897 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3899 // Check to see if there is no change.
3900 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3901 return InN; // No operands changed, just return the input node.
3903 // See if the modified node already exists.
3904 void *InsertPos = 0;
3905 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3906 return SDValue(Existing, InN.getResNo());
3908 // Nope it doesn't. Remove the node from its current place in the maps.
3910 if (!RemoveNodeFromCSEMaps(N))
3913 // Now we update the operands.
3914 if (N->OperandList[0] != Op1) {
3915 N->OperandList[0].getVal()->removeUser(0, N);
3916 N->OperandList[0] = Op1;
3917 N->OperandList[0].setUser(N);
3918 Op1.getNode()->addUser(0, N);
3920 if (N->OperandList[1] != Op2) {
3921 N->OperandList[1].getVal()->removeUser(1, N);
3922 N->OperandList[1] = Op2;
3923 N->OperandList[1].setUser(N);
3924 Op2.getNode()->addUser(1, N);
3927 // If this gets put into a CSE map, add it.
3928 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3932 SDValue SelectionDAG::
3933 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3934 SDValue Ops[] = { Op1, Op2, Op3 };
3935 return UpdateNodeOperands(N, Ops, 3);
3938 SDValue SelectionDAG::
3939 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3940 SDValue Op3, SDValue Op4) {
3941 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3942 return UpdateNodeOperands(N, Ops, 4);
3945 SDValue SelectionDAG::
3946 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3947 SDValue Op3, SDValue Op4, SDValue Op5) {
3948 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3949 return UpdateNodeOperands(N, Ops, 5);
3952 SDValue SelectionDAG::
3953 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3954 SDNode *N = InN.getNode();
3955 assert(N->getNumOperands() == NumOps &&
3956 "Update with wrong number of operands");
3958 // Check to see if there is no change.
3959 bool AnyChange = false;
3960 for (unsigned i = 0; i != NumOps; ++i) {
3961 if (Ops[i] != N->getOperand(i)) {
3967 // No operands changed, just return the input node.
3968 if (!AnyChange) return InN;
3970 // See if the modified node already exists.
3971 void *InsertPos = 0;
3972 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3973 return SDValue(Existing, InN.getResNo());
3975 // Nope it doesn't. Remove the node from its current place in the maps.
3977 if (!RemoveNodeFromCSEMaps(N))
3980 // Now we update the operands.
3981 for (unsigned i = 0; i != NumOps; ++i) {
3982 if (N->OperandList[i] != Ops[i]) {
3983 N->OperandList[i].getVal()->removeUser(i, N);
3984 N->OperandList[i] = Ops[i];
3985 N->OperandList[i].setUser(N);
3986 Ops[i].getNode()->addUser(i, N);
3990 // If this gets put into a CSE map, add it.
3991 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3995 /// DropOperands - Release the operands and set this node to have
3997 void SDNode::DropOperands() {
3998 // Unlike the code in MorphNodeTo that does this, we don't need to
3999 // watch for dead nodes here.
4000 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
4001 I->getVal()->removeUser(std::distance(op_begin(), I), this);
4006 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4009 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4011 SDVTList VTs = getVTList(VT);
4012 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4015 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4016 MVT VT, SDValue Op1) {
4017 SDVTList VTs = getVTList(VT);
4018 SDValue Ops[] = { Op1 };
4019 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4022 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4023 MVT VT, SDValue Op1,
4025 SDVTList VTs = getVTList(VT);
4026 SDValue Ops[] = { Op1, Op2 };
4027 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4030 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4031 MVT VT, SDValue Op1,
4032 SDValue Op2, SDValue Op3) {
4033 SDVTList VTs = getVTList(VT);
4034 SDValue Ops[] = { Op1, Op2, Op3 };
4035 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4038 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4039 MVT VT, const SDValue *Ops,
4041 SDVTList VTs = getVTList(VT);
4042 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4045 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4046 MVT VT1, MVT VT2, const SDValue *Ops,
4048 SDVTList VTs = getVTList(VT1, VT2);
4049 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4052 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4054 SDVTList VTs = getVTList(VT1, VT2);
4055 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4058 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4059 MVT VT1, MVT VT2, MVT VT3,
4060 const SDValue *Ops, unsigned NumOps) {
4061 SDVTList VTs = getVTList(VT1, VT2, VT3);
4062 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4065 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4068 SDVTList VTs = getVTList(VT1, VT2);
4069 SDValue Ops[] = { Op1 };
4070 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4073 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4075 SDValue Op1, SDValue Op2) {
4076 SDVTList VTs = getVTList(VT1, VT2);
4077 SDValue Ops[] = { Op1, Op2 };
4078 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4081 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4083 SDValue Op1, SDValue Op2,
4085 SDVTList VTs = getVTList(VT1, VT2);
4086 SDValue Ops[] = { Op1, Op2, Op3 };
4087 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4090 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4091 SDVTList VTs, const SDValue *Ops,
4093 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4096 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4098 SDVTList VTs = getVTList(VT);
4099 return MorphNodeTo(N, Opc, VTs, 0, 0);
4102 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4103 MVT VT, SDValue Op1) {
4104 SDVTList VTs = getVTList(VT);
4105 SDValue Ops[] = { Op1 };
4106 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4109 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4110 MVT VT, SDValue Op1,
4112 SDVTList VTs = getVTList(VT);
4113 SDValue Ops[] = { Op1, Op2 };
4114 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4117 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4118 MVT VT, SDValue Op1,
4119 SDValue Op2, SDValue Op3) {
4120 SDVTList VTs = getVTList(VT);
4121 SDValue Ops[] = { Op1, Op2, Op3 };
4122 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4125 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4126 MVT VT, const SDValue *Ops,
4128 SDVTList VTs = getVTList(VT);
4129 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4132 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4133 MVT VT1, MVT VT2, const SDValue *Ops,
4135 SDVTList VTs = getVTList(VT1, VT2);
4136 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4139 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4141 SDVTList VTs = getVTList(VT1, VT2);
4142 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4145 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4146 MVT VT1, MVT VT2, MVT VT3,
4147 const SDValue *Ops, unsigned NumOps) {
4148 SDVTList VTs = getVTList(VT1, VT2, VT3);
4149 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4152 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4155 SDVTList VTs = getVTList(VT1, VT2);
4156 SDValue Ops[] = { Op1 };
4157 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4160 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4162 SDValue Op1, SDValue Op2) {
4163 SDVTList VTs = getVTList(VT1, VT2);
4164 SDValue Ops[] = { Op1, Op2 };
4165 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4168 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4170 SDValue Op1, SDValue Op2,
4172 SDVTList VTs = getVTList(VT1, VT2);
4173 SDValue Ops[] = { Op1, Op2, Op3 };
4174 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4177 /// MorphNodeTo - These *mutate* the specified node to have the specified
4178 /// return type, opcode, and operands.
4180 /// Note that MorphNodeTo returns the resultant node. If there is already a
4181 /// node of the specified opcode and operands, it returns that node instead of
4182 /// the current one.
4184 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4185 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4186 /// node, and because it doesn't require CSE recalculation for any of
4187 /// the node's users.
4189 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4190 SDVTList VTs, const SDValue *Ops,
4192 // If an identical node already exists, use it.
4194 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4195 FoldingSetNodeID ID;
4196 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4197 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4201 if (!RemoveNodeFromCSEMaps(N))
4204 // Start the morphing.
4206 N->ValueList = VTs.VTs;
4207 N->NumValues = VTs.NumVTs;
4209 // Clear the operands list, updating used nodes to remove this from their
4210 // use list. Keep track of any operands that become dead as a result.
4211 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4212 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4214 SDNode *Used = I->getVal();
4215 Used->removeUser(std::distance(B, I), N);
4216 if (Used->use_empty())
4217 DeadNodeSet.insert(Used);
4220 // If NumOps is larger than the # of operands we currently have, reallocate
4221 // the operand list.
4222 if (NumOps > N->NumOperands) {
4223 if (N->OperandsNeedDelete)
4224 delete[] N->OperandList;
4226 if (N->isMachineOpcode()) {
4227 // We're creating a final node that will live unmorphed for the
4228 // remainder of the current SelectionDAG iteration, so we can allocate
4229 // the operands directly out of a pool with no recycling metadata.
4230 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4231 N->OperandsNeedDelete = false;
4233 N->OperandList = new SDUse[NumOps];
4234 N->OperandsNeedDelete = true;
4238 // Assign the new operands.
4239 N->NumOperands = NumOps;
4240 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4241 N->OperandList[i] = Ops[i];
4242 N->OperandList[i].setUser(N);
4243 SDNode *ToUse = N->OperandList[i].getVal();
4244 ToUse->addUser(i, N);
4247 // Delete any nodes that are still dead after adding the uses for the
4249 SmallVector<SDNode *, 16> DeadNodes;
4250 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4251 E = DeadNodeSet.end(); I != E; ++I)
4252 if ((*I)->use_empty())
4253 DeadNodes.push_back(*I);
4254 RemoveDeadNodes(DeadNodes);
4257 CSEMap.InsertNode(N, IP); // Memoize the new node.
4262 /// getTargetNode - These are used for target selectors to create a new node
4263 /// with specified return type(s), target opcode, and operands.
4265 /// Note that getTargetNode returns the resultant node. If there is already a
4266 /// node of the specified opcode and operands, it returns that node instead of
4267 /// the current one.
4268 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4269 return getNode(~Opcode, VT).getNode();
4271 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4272 return getNode(~Opcode, VT, Op1).getNode();
4274 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4275 SDValue Op1, SDValue Op2) {
4276 return getNode(~Opcode, VT, Op1, Op2).getNode();
4278 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4279 SDValue Op1, SDValue Op2,
4281 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4283 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4284 const SDValue *Ops, unsigned NumOps) {
4285 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4287 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4288 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4290 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4292 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4293 MVT VT2, SDValue Op1) {
4294 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4295 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4297 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4298 MVT VT2, SDValue Op1,
4300 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4301 SDValue Ops[] = { Op1, Op2 };
4302 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4304 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4305 MVT VT2, SDValue Op1,
4306 SDValue Op2, SDValue Op3) {
4307 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4308 SDValue Ops[] = { Op1, Op2, Op3 };
4309 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4311 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4312 const SDValue *Ops, unsigned NumOps) {
4313 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4314 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4316 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4317 SDValue Op1, SDValue Op2) {
4318 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4319 SDValue Ops[] = { Op1, Op2 };
4320 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4322 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4323 SDValue Op1, SDValue Op2,
4325 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4326 SDValue Ops[] = { Op1, Op2, Op3 };
4327 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4329 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4330 const SDValue *Ops, unsigned NumOps) {
4331 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4332 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4334 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4335 MVT VT2, MVT VT3, MVT VT4,
4336 const SDValue *Ops, unsigned NumOps) {
4337 std::vector<MVT> VTList;
4338 VTList.push_back(VT1);
4339 VTList.push_back(VT2);
4340 VTList.push_back(VT3);
4341 VTList.push_back(VT4);
4342 const MVT *VTs = getNodeValueTypes(VTList);
4343 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4345 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4346 const std::vector<MVT> &ResultTys,
4347 const SDValue *Ops, unsigned NumOps) {
4348 const MVT *VTs = getNodeValueTypes(ResultTys);
4349 return getNode(~Opcode, VTs, ResultTys.size(),
4350 Ops, NumOps).getNode();
4353 /// getNodeIfExists - Get the specified node if it's already available, or
4354 /// else return NULL.
4355 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4356 const SDValue *Ops, unsigned NumOps) {
4357 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4358 FoldingSetNodeID ID;
4359 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4361 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4368 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4369 /// This can cause recursive merging of nodes in the DAG.
4371 /// This version assumes From has a single result value.
4373 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4374 DAGUpdateListener *UpdateListener) {
4375 SDNode *From = FromN.getNode();
4376 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4377 "Cannot replace with this method!");
4378 assert(From != To.getNode() && "Cannot replace uses of with self");
4380 while (!From->use_empty()) {
4381 SDNode::use_iterator UI = From->use_begin();
4384 // This node is about to morph, remove its old self from the CSE maps.
4385 RemoveNodeFromCSEMaps(U);
4387 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4388 I != E; ++I, ++operandNum)
4389 if (I->getVal() == From) {
4390 From->removeUser(operandNum, U);
4393 To.getNode()->addUser(operandNum, U);
4396 // Now that we have modified U, add it back to the CSE maps. If it already
4397 // exists there, recursively merge the results together.
4398 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4399 ReplaceAllUsesWith(U, Existing, UpdateListener);
4400 // U is now dead. Inform the listener if it exists and delete it.
4402 UpdateListener->NodeDeleted(U, Existing);
4403 DeleteNodeNotInCSEMaps(U);
4405 // If the node doesn't already exist, we updated it. Inform a listener if
4408 UpdateListener->NodeUpdated(U);
4413 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4414 /// This can cause recursive merging of nodes in the DAG.
4416 /// This version assumes From/To have matching types and numbers of result
4419 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4420 DAGUpdateListener *UpdateListener) {
4421 assert(From->getVTList().VTs == To->getVTList().VTs &&
4422 From->getNumValues() == To->getNumValues() &&
4423 "Cannot use this version of ReplaceAllUsesWith!");
4425 // Handle the trivial case.
4429 while (!From->use_empty()) {
4430 SDNode::use_iterator UI = From->use_begin();
4433 // This node is about to morph, remove its old self from the CSE maps.
4434 RemoveNodeFromCSEMaps(U);
4436 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4437 I != E; ++I, ++operandNum)
4438 if (I->getVal() == From) {
4439 From->removeUser(operandNum, U);
4440 I->getSDValue().setNode(To);
4441 To->addUser(operandNum, U);
4444 // Now that we have modified U, add it back to the CSE maps. If it already
4445 // exists there, recursively merge the results together.
4446 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4447 ReplaceAllUsesWith(U, Existing, UpdateListener);
4448 // U is now dead. Inform the listener if it exists and delete it.
4450 UpdateListener->NodeDeleted(U, Existing);
4451 DeleteNodeNotInCSEMaps(U);
4453 // If the node doesn't already exist, we updated it. Inform a listener if
4456 UpdateListener->NodeUpdated(U);
4461 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4462 /// This can cause recursive merging of nodes in the DAG.
4464 /// This version can replace From with any result values. To must match the
4465 /// number and types of values returned by From.
4466 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4468 DAGUpdateListener *UpdateListener) {
4469 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4470 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4472 while (!From->use_empty()) {
4473 SDNode::use_iterator UI = From->use_begin();
4476 // This node is about to morph, remove its old self from the CSE maps.
4477 RemoveNodeFromCSEMaps(U);
4479 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4480 I != E; ++I, ++operandNum)
4481 if (I->getVal() == From) {
4482 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4483 From->removeUser(operandNum, U);
4486 ToOp.getNode()->addUser(operandNum, U);
4489 // Now that we have modified U, add it back to the CSE maps. If it already
4490 // exists there, recursively merge the results together.
4491 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4492 ReplaceAllUsesWith(U, Existing, UpdateListener);
4493 // U is now dead. Inform the listener if it exists and delete it.
4495 UpdateListener->NodeDeleted(U, Existing);
4496 DeleteNodeNotInCSEMaps(U);
4498 // If the node doesn't already exist, we updated it. Inform a listener if
4501 UpdateListener->NodeUpdated(U);
4506 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4507 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4508 /// handled the same way as for ReplaceAllUsesWith.
4509 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4510 DAGUpdateListener *UpdateListener){
4511 // Handle the really simple, really trivial case efficiently.
4512 if (From == To) return;
4514 // Handle the simple, trivial, case efficiently.
4515 if (From.getNode()->getNumValues() == 1) {
4516 ReplaceAllUsesWith(From, To, UpdateListener);
4520 // Get all of the users of From.getNode(). We want these in a nice,
4521 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4522 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4524 while (!Users.empty()) {
4525 // We know that this user uses some value of From. If it is the right
4526 // value, update it.
4527 SDNode *User = Users.back();
4530 // Scan for an operand that matches From.
4531 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4532 for (; Op != E; ++Op)
4533 if (*Op == From) break;
4535 // If there are no matches, the user must use some other result of From.
4536 if (Op == E) continue;
4538 // Okay, we know this user needs to be updated. Remove its old self
4539 // from the CSE maps.
4540 RemoveNodeFromCSEMaps(User);
4542 // Update all operands that match "From" in case there are multiple uses.
4543 for (; Op != E; ++Op) {
4545 From.getNode()->removeUser(Op-User->op_begin(), User);
4548 To.getNode()->addUser(Op-User->op_begin(), User);
4552 // Now that we have modified User, add it back to the CSE maps. If it
4553 // already exists there, recursively merge the results together.
4554 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4556 if (UpdateListener) UpdateListener->NodeUpdated(User);
4557 continue; // Continue on to next user.
4560 // If there was already an existing matching node, use ReplaceAllUsesWith
4561 // to replace the dead one with the existing one. This can cause
4562 // recursive merging of other unrelated nodes down the line.
4563 ReplaceAllUsesWith(User, Existing, UpdateListener);
4565 // User is now dead. Notify a listener if present.
4566 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4567 DeleteNodeNotInCSEMaps(User);
4571 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4572 /// uses of other values produced by From.getVal() alone. The same value may
4573 /// appear in both the From and To list. The Deleted vector is
4574 /// handled the same way as for ReplaceAllUsesWith.
4575 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4578 DAGUpdateListener *UpdateListener){
4579 // Handle the simple, trivial case efficiently.
4581 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4583 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4584 for (unsigned i = 0; i != Num; ++i)
4585 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4586 E = From[i].getNode()->use_end(); UI != E; ++UI)
4587 Users.push_back(std::make_pair(*UI, i));
4589 while (!Users.empty()) {
4590 // We know that this user uses some value of From. If it is the right
4591 // value, update it.
4592 SDNode *User = Users.back().first;
4593 unsigned i = Users.back().second;
4596 // Scan for an operand that matches From.
4597 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4598 for (; Op != E; ++Op)
4599 if (*Op == From[i]) break;
4601 // If there are no matches, the user must use some other result of From.
4602 if (Op == E) continue;
4604 // Okay, we know this user needs to be updated. Remove its old self
4605 // from the CSE maps.
4606 RemoveNodeFromCSEMaps(User);
4608 // Update all operands that match "From" in case there are multiple uses.
4609 for (; Op != E; ++Op) {
4610 if (*Op == From[i]) {
4611 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4614 To[i].getNode()->addUser(Op-User->op_begin(), User);
4618 // Now that we have modified User, add it back to the CSE maps. If it
4619 // already exists there, recursively merge the results together.
4620 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4622 if (UpdateListener) UpdateListener->NodeUpdated(User);
4623 continue; // Continue on to next user.
4626 // If there was already an existing matching node, use ReplaceAllUsesWith
4627 // to replace the dead one with the existing one. This can cause
4628 // recursive merging of other unrelated nodes down the line.
4629 ReplaceAllUsesWith(User, Existing, UpdateListener);
4631 // User is now dead. Notify a listener if present.
4632 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4633 DeleteNodeNotInCSEMaps(User);
4637 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4638 /// based on their topological order. It returns the maximum id and a vector
4639 /// of the SDNodes* in assigned order by reference.
4640 unsigned SelectionDAG::AssignTopologicalOrder() {
4642 unsigned DAGSize = 0;
4644 // SortedPos tracks the progress of the algorithm. Nodes before it are
4645 // sorted, nodes after it are unsorted. When the algorithm completes
4646 // it is at the end of the list.
4647 allnodes_iterator SortedPos = allnodes_begin();
4649 // Visit all the nodes. Add nodes with no operands to the TopOrder result
4650 // array immediately. Annotate nodes that do have operands with their
4651 // operand count. Before we do this, the Node Id fields of the nodes
4652 // may contain arbitrary values. After, the Node Id fields for nodes
4653 // before SortedPos will contain the topological sort index, and the
4654 // Node Id fields for nodes At SortedPos and after will contain the
4655 // count of outstanding operands.
4656 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4658 unsigned Degree = N->getNumOperands();
4660 // A node with no uses, add it to the result array immediately.
4661 N->setNodeId(DAGSize++);
4662 allnodes_iterator Q = N;
4664 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4667 // Temporarily use the Node Id as scratch space for the degree count.
4668 N->setNodeId(Degree);
4672 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4673 // such that by the time the end is reached all nodes will be sorted.
4674 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4676 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4679 unsigned Degree = P->getNodeId();
4682 // All of P's operands are sorted, so P may sorted now.
4683 P->setNodeId(DAGSize++);
4685 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4688 // Update P's outstanding operand count.
4689 P->setNodeId(Degree);
4694 assert(SortedPos == AllNodes.end() &&
4695 "Topological sort incomplete!");
4696 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4697 "First node in topological sort is not the entry token!");
4698 assert(AllNodes.front().getNodeId() == 0 &&
4699 "First node in topological sort has non-zero id!");
4700 assert(AllNodes.front().getNumOperands() == 0 &&
4701 "First node in topological sort has operands!");
4702 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4703 "Last node in topologic sort has unexpected id!");
4704 assert(AllNodes.back().use_empty() &&
4705 "Last node in topologic sort has users!");
4706 assert(DAGSize == allnodes_size() && "TopOrder result count mismatch!");
4712 //===----------------------------------------------------------------------===//
4714 //===----------------------------------------------------------------------===//
4716 // Out-of-line virtual method to give class a home.
4717 void SDNode::ANCHOR() {}
4718 void UnarySDNode::ANCHOR() {}
4719 void BinarySDNode::ANCHOR() {}
4720 void TernarySDNode::ANCHOR() {}
4721 void HandleSDNode::ANCHOR() {}
4722 void ConstantSDNode::ANCHOR() {}
4723 void ConstantFPSDNode::ANCHOR() {}
4724 void GlobalAddressSDNode::ANCHOR() {}
4725 void FrameIndexSDNode::ANCHOR() {}
4726 void JumpTableSDNode::ANCHOR() {}
4727 void ConstantPoolSDNode::ANCHOR() {}
4728 void BasicBlockSDNode::ANCHOR() {}
4729 void SrcValueSDNode::ANCHOR() {}
4730 void MemOperandSDNode::ANCHOR() {}
4731 void RegisterSDNode::ANCHOR() {}
4732 void DbgStopPointSDNode::ANCHOR() {}
4733 void LabelSDNode::ANCHOR() {}
4734 void ExternalSymbolSDNode::ANCHOR() {}
4735 void CondCodeSDNode::ANCHOR() {}
4736 void ARG_FLAGSSDNode::ANCHOR() {}
4737 void VTSDNode::ANCHOR() {}
4738 void MemSDNode::ANCHOR() {}
4739 void LoadSDNode::ANCHOR() {}
4740 void StoreSDNode::ANCHOR() {}
4741 void AtomicSDNode::ANCHOR() {}
4742 void MemIntrinsicSDNode::ANCHOR() {}
4743 void CallSDNode::ANCHOR() {}
4745 HandleSDNode::~HandleSDNode() {
4749 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4751 : SDNode(isa<GlobalVariable>(GA) &&
4752 cast<GlobalVariable>(GA)->isThreadLocal() ?
4754 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4756 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4757 getSDVTList(VT)), Offset(o) {
4758 TheGlobal = const_cast<GlobalValue*>(GA);
4761 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4762 const Value *srcValue, int SVO,
4763 unsigned alignment, bool vol)
4764 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4765 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4767 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4768 assert(getAlignment() == alignment && "Alignment representation error!");
4769 assert(isVolatile() == vol && "Volatile representation error!");
4772 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4773 unsigned NumOps, MVT memvt, const Value *srcValue,
4774 int SVO, unsigned alignment, bool vol)
4775 : SDNode(Opc, VTs, Ops, NumOps),
4776 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4777 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4778 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4779 assert(getAlignment() == alignment && "Alignment representation error!");
4780 assert(isVolatile() == vol && "Volatile representation error!");
4783 /// getMemOperand - Return a MachineMemOperand object describing the memory
4784 /// reference performed by this memory reference.
4785 MachineMemOperand MemSDNode::getMemOperand() const {
4787 if (isa<LoadSDNode>(this))
4788 Flags = MachineMemOperand::MOLoad;
4789 else if (isa<StoreSDNode>(this))
4790 Flags = MachineMemOperand::MOStore;
4791 else if (isa<AtomicSDNode>(this)) {
4792 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4795 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4796 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4797 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4798 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4801 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4802 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4804 // Check if the memory reference references a frame index
4805 const FrameIndexSDNode *FI =
4806 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4807 if (!getSrcValue() && FI)
4808 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4809 Flags, 0, Size, getAlignment());
4811 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4812 Size, getAlignment());
4815 /// Profile - Gather unique data for the node.
4817 void SDNode::Profile(FoldingSetNodeID &ID) const {
4818 AddNodeIDNode(ID, this);
4821 /// getValueTypeList - Return a pointer to the specified value type.
4823 const MVT *SDNode::getValueTypeList(MVT VT) {
4824 if (VT.isExtended()) {
4825 static std::set<MVT, MVT::compareRawBits> EVTs;
4826 return &(*EVTs.insert(VT).first);
4828 static MVT VTs[MVT::LAST_VALUETYPE];
4829 VTs[VT.getSimpleVT()] = VT;
4830 return &VTs[VT.getSimpleVT()];
4834 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4835 /// indicated value. This method ignores uses of other values defined by this
4837 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4838 assert(Value < getNumValues() && "Bad value!");
4840 // TODO: Only iterate over uses of a given value of the node
4841 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4842 if (UI.getUse().getSDValue().getResNo() == Value) {
4849 // Found exactly the right number of uses?
4854 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4855 /// value. This method ignores uses of other values defined by this operation.
4856 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4857 assert(Value < getNumValues() && "Bad value!");
4859 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4860 if (UI.getUse().getSDValue().getResNo() == Value)
4867 /// isOnlyUserOf - Return true if this node is the only use of N.
4869 bool SDNode::isOnlyUserOf(SDNode *N) const {
4871 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4882 /// isOperand - Return true if this node is an operand of N.
4884 bool SDValue::isOperandOf(SDNode *N) const {
4885 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4886 if (*this == N->getOperand(i))
4891 bool SDNode::isOperandOf(SDNode *N) const {
4892 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4893 if (this == N->OperandList[i].getVal())
4898 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4899 /// be a chain) reaches the specified operand without crossing any
4900 /// side-effecting instructions. In practice, this looks through token
4901 /// factors and non-volatile loads. In order to remain efficient, this only
4902 /// looks a couple of nodes in, it does not do an exhaustive search.
4903 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4904 unsigned Depth) const {
4905 if (*this == Dest) return true;
4907 // Don't search too deeply, we just want to be able to see through
4908 // TokenFactor's etc.
4909 if (Depth == 0) return false;
4911 // If this is a token factor, all inputs to the TF happen in parallel. If any
4912 // of the operands of the TF reach dest, then we can do the xform.
4913 if (getOpcode() == ISD::TokenFactor) {
4914 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4915 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4920 // Loads don't have side effects, look through them.
4921 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4922 if (!Ld->isVolatile())
4923 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4929 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4930 SmallPtrSet<SDNode *, 32> &Visited) {
4931 if (found || !Visited.insert(N))
4934 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4935 SDNode *Op = N->getOperand(i).getNode();
4940 findPredecessor(Op, P, found, Visited);
4944 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4945 /// is either an operand of N or it can be reached by recursively traversing
4946 /// up the operands.
4947 /// NOTE: this is an expensive method. Use it carefully.
4948 bool SDNode::isPredecessorOf(SDNode *N) const {
4949 SmallPtrSet<SDNode *, 32> Visited;
4951 findPredecessor(N, this, found, Visited);
4955 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4956 assert(Num < NumOperands && "Invalid child # of SDNode!");
4957 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4960 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4961 switch (getOpcode()) {
4963 if (getOpcode() < ISD::BUILTIN_OP_END)
4964 return "<<Unknown DAG Node>>";
4965 if (isMachineOpcode()) {
4967 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4968 if (getMachineOpcode() < TII->getNumOpcodes())
4969 return TII->get(getMachineOpcode()).getName();
4970 return "<<Unknown Machine Node>>";
4973 TargetLowering &TLI = G->getTargetLoweringInfo();
4974 const char *Name = TLI.getTargetNodeName(getOpcode());
4975 if (Name) return Name;
4976 return "<<Unknown Target Node>>";
4978 return "<<Unknown Node>>";
4981 case ISD::DELETED_NODE:
4982 return "<<Deleted Node!>>";
4984 case ISD::PREFETCH: return "Prefetch";
4985 case ISD::MEMBARRIER: return "MemBarrier";
4986 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8";
4987 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8";
4988 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8";
4989 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8";
4990 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8";
4991 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8";
4992 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8";
4993 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8";
4994 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8";
4995 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8";
4996 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8";
4997 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8";
4998 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16";
4999 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16";
5000 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16";
5001 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16";
5002 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16";
5003 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16";
5004 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16";
5005 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16";
5006 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16";
5007 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16";
5008 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16";
5009 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16";
5010 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32";
5011 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32";
5012 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32";
5013 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32";
5014 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32";
5015 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32";
5016 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32";
5017 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32";
5018 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32";
5019 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32";
5020 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32";
5021 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32";
5022 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64";
5023 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64";
5024 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64";
5025 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64";
5026 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64";
5027 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64";
5028 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64";
5029 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64";
5030 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64";
5031 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64";
5032 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64";
5033 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64";
5034 case ISD::PCMARKER: return "PCMarker";
5035 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5036 case ISD::SRCVALUE: return "SrcValue";
5037 case ISD::MEMOPERAND: return "MemOperand";
5038 case ISD::EntryToken: return "EntryToken";
5039 case ISD::TokenFactor: return "TokenFactor";
5040 case ISD::AssertSext: return "AssertSext";
5041 case ISD::AssertZext: return "AssertZext";
5043 case ISD::BasicBlock: return "BasicBlock";
5044 case ISD::ARG_FLAGS: return "ArgFlags";
5045 case ISD::VALUETYPE: return "ValueType";
5046 case ISD::Register: return "Register";
5048 case ISD::Constant: return "Constant";
5049 case ISD::ConstantFP: return "ConstantFP";
5050 case ISD::GlobalAddress: return "GlobalAddress";
5051 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5052 case ISD::FrameIndex: return "FrameIndex";
5053 case ISD::JumpTable: return "JumpTable";
5054 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5055 case ISD::RETURNADDR: return "RETURNADDR";
5056 case ISD::FRAMEADDR: return "FRAMEADDR";
5057 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5058 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5059 case ISD::EHSELECTION: return "EHSELECTION";
5060 case ISD::EH_RETURN: return "EH_RETURN";
5061 case ISD::ConstantPool: return "ConstantPool";
5062 case ISD::ExternalSymbol: return "ExternalSymbol";
5063 case ISD::INTRINSIC_WO_CHAIN: {
5064 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5065 return Intrinsic::getName((Intrinsic::ID)IID);
5067 case ISD::INTRINSIC_VOID:
5068 case ISD::INTRINSIC_W_CHAIN: {
5069 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5070 return Intrinsic::getName((Intrinsic::ID)IID);
5073 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5074 case ISD::TargetConstant: return "TargetConstant";
5075 case ISD::TargetConstantFP:return "TargetConstantFP";
5076 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5077 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5078 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5079 case ISD::TargetJumpTable: return "TargetJumpTable";
5080 case ISD::TargetConstantPool: return "TargetConstantPool";
5081 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5083 case ISD::CopyToReg: return "CopyToReg";
5084 case ISD::CopyFromReg: return "CopyFromReg";
5085 case ISD::UNDEF: return "undef";
5086 case ISD::MERGE_VALUES: return "merge_values";
5087 case ISD::INLINEASM: return "inlineasm";
5088 case ISD::DBG_LABEL: return "dbg_label";
5089 case ISD::EH_LABEL: return "eh_label";
5090 case ISD::DECLARE: return "declare";
5091 case ISD::HANDLENODE: return "handlenode";
5092 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5093 case ISD::CALL: return "call";
5096 case ISD::FABS: return "fabs";
5097 case ISD::FNEG: return "fneg";
5098 case ISD::FSQRT: return "fsqrt";
5099 case ISD::FSIN: return "fsin";
5100 case ISD::FCOS: return "fcos";
5101 case ISD::FPOWI: return "fpowi";
5102 case ISD::FPOW: return "fpow";
5103 case ISD::FTRUNC: return "ftrunc";
5104 case ISD::FFLOOR: return "ffloor";
5105 case ISD::FCEIL: return "fceil";
5106 case ISD::FRINT: return "frint";
5107 case ISD::FNEARBYINT: return "fnearbyint";
5110 case ISD::ADD: return "add";
5111 case ISD::SUB: return "sub";
5112 case ISD::MUL: return "mul";
5113 case ISD::MULHU: return "mulhu";
5114 case ISD::MULHS: return "mulhs";
5115 case ISD::SDIV: return "sdiv";
5116 case ISD::UDIV: return "udiv";
5117 case ISD::SREM: return "srem";
5118 case ISD::UREM: return "urem";
5119 case ISD::SMUL_LOHI: return "smul_lohi";
5120 case ISD::UMUL_LOHI: return "umul_lohi";
5121 case ISD::SDIVREM: return "sdivrem";
5122 case ISD::UDIVREM: return "udivrem";
5123 case ISD::AND: return "and";
5124 case ISD::OR: return "or";
5125 case ISD::XOR: return "xor";
5126 case ISD::SHL: return "shl";
5127 case ISD::SRA: return "sra";
5128 case ISD::SRL: return "srl";
5129 case ISD::ROTL: return "rotl";
5130 case ISD::ROTR: return "rotr";
5131 case ISD::FADD: return "fadd";
5132 case ISD::FSUB: return "fsub";
5133 case ISD::FMUL: return "fmul";
5134 case ISD::FDIV: return "fdiv";
5135 case ISD::FREM: return "frem";
5136 case ISD::FCOPYSIGN: return "fcopysign";
5137 case ISD::FGETSIGN: return "fgetsign";
5139 case ISD::SETCC: return "setcc";
5140 case ISD::VSETCC: return "vsetcc";
5141 case ISD::SELECT: return "select";
5142 case ISD::SELECT_CC: return "select_cc";
5143 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5144 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5145 case ISD::CONCAT_VECTORS: return "concat_vectors";
5146 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5147 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5148 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5149 case ISD::CARRY_FALSE: return "carry_false";
5150 case ISD::ADDC: return "addc";
5151 case ISD::ADDE: return "adde";
5152 case ISD::SUBC: return "subc";
5153 case ISD::SUBE: return "sube";
5154 case ISD::SHL_PARTS: return "shl_parts";
5155 case ISD::SRA_PARTS: return "sra_parts";
5156 case ISD::SRL_PARTS: return "srl_parts";
5158 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5159 case ISD::INSERT_SUBREG: return "insert_subreg";
5161 // Conversion operators.
5162 case ISD::SIGN_EXTEND: return "sign_extend";
5163 case ISD::ZERO_EXTEND: return "zero_extend";
5164 case ISD::ANY_EXTEND: return "any_extend";
5165 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5166 case ISD::TRUNCATE: return "truncate";
5167 case ISD::FP_ROUND: return "fp_round";
5168 case ISD::FLT_ROUNDS_: return "flt_rounds";
5169 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5170 case ISD::FP_EXTEND: return "fp_extend";
5172 case ISD::SINT_TO_FP: return "sint_to_fp";
5173 case ISD::UINT_TO_FP: return "uint_to_fp";
5174 case ISD::FP_TO_SINT: return "fp_to_sint";
5175 case ISD::FP_TO_UINT: return "fp_to_uint";
5176 case ISD::BIT_CONVERT: return "bit_convert";
5178 // Control flow instructions
5179 case ISD::BR: return "br";
5180 case ISD::BRIND: return "brind";
5181 case ISD::BR_JT: return "br_jt";
5182 case ISD::BRCOND: return "brcond";
5183 case ISD::BR_CC: return "br_cc";
5184 case ISD::RET: return "ret";
5185 case ISD::CALLSEQ_START: return "callseq_start";
5186 case ISD::CALLSEQ_END: return "callseq_end";
5189 case ISD::LOAD: return "load";
5190 case ISD::STORE: return "store";
5191 case ISD::VAARG: return "vaarg";
5192 case ISD::VACOPY: return "vacopy";
5193 case ISD::VAEND: return "vaend";
5194 case ISD::VASTART: return "vastart";
5195 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5196 case ISD::EXTRACT_ELEMENT: return "extract_element";
5197 case ISD::BUILD_PAIR: return "build_pair";
5198 case ISD::STACKSAVE: return "stacksave";
5199 case ISD::STACKRESTORE: return "stackrestore";
5200 case ISD::TRAP: return "trap";
5203 case ISD::BSWAP: return "bswap";
5204 case ISD::CTPOP: return "ctpop";
5205 case ISD::CTTZ: return "cttz";
5206 case ISD::CTLZ: return "ctlz";
5209 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5210 case ISD::DEBUG_LOC: return "debug_loc";
5213 case ISD::TRAMPOLINE: return "trampoline";
5216 switch (cast<CondCodeSDNode>(this)->get()) {
5217 default: assert(0 && "Unknown setcc condition!");
5218 case ISD::SETOEQ: return "setoeq";
5219 case ISD::SETOGT: return "setogt";
5220 case ISD::SETOGE: return "setoge";
5221 case ISD::SETOLT: return "setolt";
5222 case ISD::SETOLE: return "setole";
5223 case ISD::SETONE: return "setone";
5225 case ISD::SETO: return "seto";
5226 case ISD::SETUO: return "setuo";
5227 case ISD::SETUEQ: return "setue";
5228 case ISD::SETUGT: return "setugt";
5229 case ISD::SETUGE: return "setuge";
5230 case ISD::SETULT: return "setult";
5231 case ISD::SETULE: return "setule";
5232 case ISD::SETUNE: return "setune";
5234 case ISD::SETEQ: return "seteq";
5235 case ISD::SETGT: return "setgt";
5236 case ISD::SETGE: return "setge";
5237 case ISD::SETLT: return "setlt";
5238 case ISD::SETLE: return "setle";
5239 case ISD::SETNE: return "setne";
5244 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5253 return "<post-inc>";
5255 return "<post-dec>";
5259 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5260 std::string S = "< ";
5274 if (getByValAlign())
5275 S += "byval-align:" + utostr(getByValAlign()) + " ";
5277 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5279 S += "byval-size:" + utostr(getByValSize()) + " ";
5283 void SDNode::dump() const { dump(0); }
5284 void SDNode::dump(const SelectionDAG *G) const {
5289 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5290 OS << (void*)this << ": ";
5292 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5294 if (getValueType(i) == MVT::Other)
5297 OS << getValueType(i).getMVTString();
5299 OS << " = " << getOperationName(G);
5302 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5304 OS << (void*)getOperand(i).getNode();
5305 if (unsigned RN = getOperand(i).getResNo())
5309 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5310 SDNode *Mask = getOperand(2).getNode();
5312 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5314 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5317 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5322 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5323 OS << '<' << CSDN->getAPIntValue() << '>';
5324 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5325 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5326 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5327 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5328 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5331 CSDN->getValueAPF().bitcastToAPInt().dump();
5334 } else if (const GlobalAddressSDNode *GADN =
5335 dyn_cast<GlobalAddressSDNode>(this)) {
5336 int64_t offset = GADN->getOffset();
5338 WriteAsOperand(OS, GADN->getGlobal());
5341 OS << " + " << offset;
5343 OS << " " << offset;
5344 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5345 OS << "<" << FIDN->getIndex() << ">";
5346 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5347 OS << "<" << JTDN->getIndex() << ">";
5348 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5349 int offset = CP->getOffset();
5350 if (CP->isMachineConstantPoolEntry())
5351 OS << "<" << *CP->getMachineCPVal() << ">";
5353 OS << "<" << *CP->getConstVal() << ">";
5355 OS << " + " << offset;
5357 OS << " " << offset;
5358 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5360 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5362 OS << LBB->getName() << " ";
5363 OS << (const void*)BBDN->getBasicBlock() << ">";
5364 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5365 if (G && R->getReg() &&
5366 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5367 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5369 OS << " #" << R->getReg();
5371 } else if (const ExternalSymbolSDNode *ES =
5372 dyn_cast<ExternalSymbolSDNode>(this)) {
5373 OS << "'" << ES->getSymbol() << "'";
5374 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5376 OS << "<" << M->getValue() << ">";
5379 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5380 if (M->MO.getValue())
5381 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5383 OS << "<null:" << M->MO.getOffset() << ">";
5384 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5385 OS << N->getArgFlags().getArgFlagsString();
5386 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5387 OS << ":" << N->getVT().getMVTString();
5389 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5390 const Value *SrcValue = LD->getSrcValue();
5391 int SrcOffset = LD->getSrcValueOffset();
5397 OS << ":" << SrcOffset << ">";
5400 switch (LD->getExtensionType()) {
5401 default: doExt = false; break;
5402 case ISD::EXTLOAD: OS << " <anyext "; break;
5403 case ISD::SEXTLOAD: OS << " <sext "; break;
5404 case ISD::ZEXTLOAD: OS << " <zext "; break;
5407 OS << LD->getMemoryVT().getMVTString() << ">";
5409 const char *AM = getIndexedModeName(LD->getAddressingMode());
5412 if (LD->isVolatile())
5413 OS << " <volatile>";
5414 OS << " alignment=" << LD->getAlignment();
5415 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5416 const Value *SrcValue = ST->getSrcValue();
5417 int SrcOffset = ST->getSrcValueOffset();
5423 OS << ":" << SrcOffset << ">";
5425 if (ST->isTruncatingStore())
5426 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5428 const char *AM = getIndexedModeName(ST->getAddressingMode());
5431 if (ST->isVolatile())
5432 OS << " <volatile>";
5433 OS << " alignment=" << ST->getAlignment();
5434 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5435 const Value *SrcValue = AT->getSrcValue();
5436 int SrcOffset = AT->getSrcValueOffset();
5442 OS << ":" << SrcOffset << ">";
5443 if (AT->isVolatile())
5444 OS << " <volatile>";
5445 OS << " alignment=" << AT->getAlignment();
5449 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5450 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5451 if (N->getOperand(i).getNode()->hasOneUse())
5452 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5454 cerr << "\n" << std::string(indent+2, ' ')
5455 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5458 cerr << "\n" << std::string(indent, ' ');
5462 void SelectionDAG::dump() const {
5463 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5465 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5467 const SDNode *N = I;
5468 if (!N->hasOneUse() && N != getRoot().getNode())
5469 DumpNodes(N, 2, this);
5472 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5477 const Type *ConstantPoolSDNode::getType() const {
5478 if (isMachineConstantPoolEntry())
5479 return Val.MachineCPVal->getType();
5480 return Val.ConstVal->getType();