1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// isScalarToVector - Return true if the specified node is a
200 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
201 /// element is not an undef.
202 bool ISD::isScalarToVector(const SDNode *N) {
203 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
206 if (N->getOpcode() != ISD::BUILD_VECTOR)
208 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
210 unsigned NumElems = N->getNumOperands();
213 for (unsigned i = 1; i < NumElems; ++i) {
214 SDValue V = N->getOperand(i);
215 if (V.getOpcode() != ISD::UNDEF)
221 /// allOperandsUndef - Return true if the node has at least one operand
222 /// and all operands of the specified node are ISD::UNDEF.
223 bool ISD::allOperandsUndef(const SDNode *N) {
224 // Return false if the node has no operands.
225 // This is "logically inconsistent" with the definition of "all" but
226 // is probably the desired behavior.
227 if (N->getNumOperands() == 0)
230 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
231 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
237 ISD::NodeType ISD::getExtForLoadExtType(ISD::LoadExtType ExtType) {
240 return ISD::ANY_EXTEND;
242 return ISD::SIGN_EXTEND;
244 return ISD::ZERO_EXTEND;
249 llvm_unreachable("Invalid LoadExtType");
252 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
253 /// when given the operation for (X op Y).
254 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
255 // To perform this operation, we just need to swap the L and G bits of the
257 unsigned OldL = (Operation >> 2) & 1;
258 unsigned OldG = (Operation >> 1) & 1;
259 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
260 (OldL << 1) | // New G bit
261 (OldG << 2)); // New L bit.
264 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
265 /// 'op' is a valid SetCC operation.
266 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
267 unsigned Operation = Op;
269 Operation ^= 7; // Flip L, G, E bits, but not U.
271 Operation ^= 15; // Flip all of the condition bits.
273 if (Operation > ISD::SETTRUE2)
274 Operation &= ~8; // Don't let N and U bits get set.
276 return ISD::CondCode(Operation);
280 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
281 /// signed operation and 2 if the result is an unsigned comparison. Return zero
282 /// if the operation does not depend on the sign of the input (setne and seteq).
283 static int isSignedOp(ISD::CondCode Opcode) {
285 default: llvm_unreachable("Illegal integer setcc operation!");
287 case ISD::SETNE: return 0;
291 case ISD::SETGE: return 1;
295 case ISD::SETUGE: return 2;
299 /// getSetCCOrOperation - Return the result of a logical OR between different
300 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
301 /// returns SETCC_INVALID if it is not possible to represent the resultant
303 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
305 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
306 // Cannot fold a signed integer setcc with an unsigned integer setcc.
307 return ISD::SETCC_INVALID;
309 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
311 // If the N and U bits get set then the resultant comparison DOES suddenly
312 // care about orderedness, and is true when ordered.
313 if (Op > ISD::SETTRUE2)
314 Op &= ~16; // Clear the U bit if the N bit is set.
316 // Canonicalize illegal integer setcc's.
317 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
320 return ISD::CondCode(Op);
323 /// getSetCCAndOperation - Return the result of a logical AND between different
324 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
325 /// function returns zero if it is not possible to represent the resultant
327 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
329 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
330 // Cannot fold a signed setcc with an unsigned setcc.
331 return ISD::SETCC_INVALID;
333 // Combine all of the condition bits.
334 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
336 // Canonicalize illegal integer setcc's.
340 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
341 case ISD::SETOEQ: // SETEQ & SETU[LG]E
342 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
343 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
344 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
351 //===----------------------------------------------------------------------===//
352 // SDNode Profile Support
353 //===----------------------------------------------------------------------===//
355 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
357 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
361 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
362 /// solely with their pointer.
363 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
364 ID.AddPointer(VTList.VTs);
367 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
369 static void AddNodeIDOperands(FoldingSetNodeID &ID,
370 ArrayRef<SDValue> Ops) {
371 for (auto& Op : Ops) {
372 ID.AddPointer(Op.getNode());
373 ID.AddInteger(Op.getResNo());
377 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
379 static void AddNodeIDOperands(FoldingSetNodeID &ID,
380 ArrayRef<SDUse> Ops) {
381 for (auto& Op : Ops) {
382 ID.AddPointer(Op.getNode());
383 ID.AddInteger(Op.getResNo());
387 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
391 ID.AddBoolean(exact);
394 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
395 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
396 bool nuw, bool nsw, bool exact) {
397 if (isBinOpWithFlags(Opcode))
398 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
401 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
402 SDVTList VTList, ArrayRef<SDValue> OpList) {
403 AddNodeIDOpcode(ID, OpC);
404 AddNodeIDValueTypes(ID, VTList);
405 AddNodeIDOperands(ID, OpList);
408 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
410 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
411 switch (N->getOpcode()) {
412 case ISD::TargetExternalSymbol:
413 case ISD::ExternalSymbol:
414 llvm_unreachable("Should only be used on nodes with operands");
415 default: break; // Normal nodes don't need extra info.
416 case ISD::TargetConstant:
417 case ISD::Constant: {
418 const ConstantSDNode *C = cast<ConstantSDNode>(N);
419 ID.AddPointer(C->getConstantIntValue());
420 ID.AddBoolean(C->isOpaque());
423 case ISD::TargetConstantFP:
424 case ISD::ConstantFP: {
425 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
428 case ISD::TargetGlobalAddress:
429 case ISD::GlobalAddress:
430 case ISD::TargetGlobalTLSAddress:
431 case ISD::GlobalTLSAddress: {
432 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
433 ID.AddPointer(GA->getGlobal());
434 ID.AddInteger(GA->getOffset());
435 ID.AddInteger(GA->getTargetFlags());
436 ID.AddInteger(GA->getAddressSpace());
439 case ISD::BasicBlock:
440 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
443 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
445 case ISD::RegisterMask:
446 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
449 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
451 case ISD::FrameIndex:
452 case ISD::TargetFrameIndex:
453 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
456 case ISD::TargetJumpTable:
457 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
458 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
460 case ISD::ConstantPool:
461 case ISD::TargetConstantPool: {
462 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
463 ID.AddInteger(CP->getAlignment());
464 ID.AddInteger(CP->getOffset());
465 if (CP->isMachineConstantPoolEntry())
466 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
468 ID.AddPointer(CP->getConstVal());
469 ID.AddInteger(CP->getTargetFlags());
472 case ISD::TargetIndex: {
473 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
474 ID.AddInteger(TI->getIndex());
475 ID.AddInteger(TI->getOffset());
476 ID.AddInteger(TI->getTargetFlags());
480 const LoadSDNode *LD = cast<LoadSDNode>(N);
481 ID.AddInteger(LD->getMemoryVT().getRawBits());
482 ID.AddInteger(LD->getRawSubclassData());
483 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
487 const StoreSDNode *ST = cast<StoreSDNode>(N);
488 ID.AddInteger(ST->getMemoryVT().getRawBits());
489 ID.AddInteger(ST->getRawSubclassData());
490 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
501 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
502 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
503 BinNode->hasNoSignedWrap(), BinNode->isExact());
506 case ISD::ATOMIC_CMP_SWAP:
507 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
508 case ISD::ATOMIC_SWAP:
509 case ISD::ATOMIC_LOAD_ADD:
510 case ISD::ATOMIC_LOAD_SUB:
511 case ISD::ATOMIC_LOAD_AND:
512 case ISD::ATOMIC_LOAD_OR:
513 case ISD::ATOMIC_LOAD_XOR:
514 case ISD::ATOMIC_LOAD_NAND:
515 case ISD::ATOMIC_LOAD_MIN:
516 case ISD::ATOMIC_LOAD_MAX:
517 case ISD::ATOMIC_LOAD_UMIN:
518 case ISD::ATOMIC_LOAD_UMAX:
519 case ISD::ATOMIC_LOAD:
520 case ISD::ATOMIC_STORE: {
521 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
522 ID.AddInteger(AT->getMemoryVT().getRawBits());
523 ID.AddInteger(AT->getRawSubclassData());
524 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
527 case ISD::PREFETCH: {
528 const MemSDNode *PF = cast<MemSDNode>(N);
529 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
532 case ISD::VECTOR_SHUFFLE: {
533 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
534 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
536 ID.AddInteger(SVN->getMaskElt(i));
539 case ISD::TargetBlockAddress:
540 case ISD::BlockAddress: {
541 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
542 ID.AddPointer(BA->getBlockAddress());
543 ID.AddInteger(BA->getOffset());
544 ID.AddInteger(BA->getTargetFlags());
547 } // end switch (N->getOpcode())
549 // Target specific memory nodes could also have address spaces to check.
550 if (N->isTargetMemoryOpcode())
551 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
554 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
556 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
557 AddNodeIDOpcode(ID, N->getOpcode());
558 // Add the return value info.
559 AddNodeIDValueTypes(ID, N->getVTList());
560 // Add the operand info.
561 AddNodeIDOperands(ID, N->ops());
563 // Handle SDNode leafs with special info.
564 AddNodeIDCustom(ID, N);
567 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
568 /// the CSE map that carries volatility, temporalness, indexing mode, and
569 /// extension/truncation information.
571 static inline unsigned
572 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
573 bool isNonTemporal, bool isInvariant) {
574 assert((ConvType & 3) == ConvType &&
575 "ConvType may not require more than 2 bits!");
576 assert((AM & 7) == AM &&
577 "AM may not require more than 3 bits!");
581 (isNonTemporal << 6) |
585 //===----------------------------------------------------------------------===//
586 // SelectionDAG Class
587 //===----------------------------------------------------------------------===//
589 /// doNotCSE - Return true if CSE should not be performed for this node.
590 static bool doNotCSE(SDNode *N) {
591 if (N->getValueType(0) == MVT::Glue)
592 return true; // Never CSE anything that produces a flag.
594 switch (N->getOpcode()) {
596 case ISD::HANDLENODE:
598 return true; // Never CSE these nodes.
601 // Check that remaining values produced are not flags.
602 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
603 if (N->getValueType(i) == MVT::Glue)
604 return true; // Never CSE anything that produces a flag.
609 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
611 void SelectionDAG::RemoveDeadNodes() {
612 // Create a dummy node (which is not added to allnodes), that adds a reference
613 // to the root node, preventing it from being deleted.
614 HandleSDNode Dummy(getRoot());
616 SmallVector<SDNode*, 128> DeadNodes;
618 // Add all obviously-dead nodes to the DeadNodes worklist.
619 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
621 DeadNodes.push_back(I);
623 RemoveDeadNodes(DeadNodes);
625 // If the root changed (e.g. it was a dead load, update the root).
626 setRoot(Dummy.getValue());
629 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
630 /// given list, and any nodes that become unreachable as a result.
631 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
633 // Process the worklist, deleting the nodes and adding their uses to the
635 while (!DeadNodes.empty()) {
636 SDNode *N = DeadNodes.pop_back_val();
638 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
639 DUL->NodeDeleted(N, nullptr);
641 // Take the node out of the appropriate CSE map.
642 RemoveNodeFromCSEMaps(N);
644 // Next, brutally remove the operand list. This is safe to do, as there are
645 // no cycles in the graph.
646 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
648 SDNode *Operand = Use.getNode();
651 // Now that we removed this operand, see if there are no uses of it left.
652 if (Operand->use_empty())
653 DeadNodes.push_back(Operand);
660 void SelectionDAG::RemoveDeadNode(SDNode *N){
661 SmallVector<SDNode*, 16> DeadNodes(1, N);
663 // Create a dummy node that adds a reference to the root node, preventing
664 // it from being deleted. (This matters if the root is an operand of the
666 HandleSDNode Dummy(getRoot());
668 RemoveDeadNodes(DeadNodes);
671 void SelectionDAG::DeleteNode(SDNode *N) {
672 // First take this out of the appropriate CSE map.
673 RemoveNodeFromCSEMaps(N);
675 // Finally, remove uses due to operands of this node, remove from the
676 // AllNodes list, and delete the node.
677 DeleteNodeNotInCSEMaps(N);
680 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
681 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
682 assert(N->use_empty() && "Cannot delete a node that is not dead!");
684 // Drop all of the operands and decrement used node's use counts.
690 void SDDbgInfo::erase(const SDNode *Node) {
691 DbgValMapType::iterator I = DbgValMap.find(Node);
692 if (I == DbgValMap.end())
694 for (auto &Val: I->second)
695 Val->setIsInvalidated();
699 void SelectionDAG::DeallocateNode(SDNode *N) {
700 if (N->OperandsNeedDelete)
701 delete[] N->OperandList;
703 // Set the opcode to DELETED_NODE to help catch bugs when node
704 // memory is reallocated.
705 N->NodeType = ISD::DELETED_NODE;
707 NodeAllocator.Deallocate(AllNodes.remove(N));
709 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
710 // them and forget about that node.
715 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
716 static void VerifySDNode(SDNode *N) {
717 switch (N->getOpcode()) {
720 case ISD::BUILD_PAIR: {
721 EVT VT = N->getValueType(0);
722 assert(N->getNumValues() == 1 && "Too many results!");
723 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
724 "Wrong return type!");
725 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
726 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
727 "Mismatched operand types!");
728 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
729 "Wrong operand type!");
730 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
731 "Wrong return type size");
734 case ISD::BUILD_VECTOR: {
735 assert(N->getNumValues() == 1 && "Too many results!");
736 assert(N->getValueType(0).isVector() && "Wrong return type!");
737 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
738 "Wrong number of operands!");
739 EVT EltVT = N->getValueType(0).getVectorElementType();
740 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
741 assert((I->getValueType() == EltVT ||
742 (EltVT.isInteger() && I->getValueType().isInteger() &&
743 EltVT.bitsLE(I->getValueType()))) &&
744 "Wrong operand type!");
745 assert(I->getValueType() == N->getOperand(0).getValueType() &&
746 "Operands must all have the same type");
754 /// \brief Insert a newly allocated node into the DAG.
756 /// Handles insertion into the all nodes list and CSE map, as well as
757 /// verification and other common operations when a new node is allocated.
758 void SelectionDAG::InsertNode(SDNode *N) {
759 AllNodes.push_back(N);
765 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
766 /// correspond to it. This is useful when we're about to delete or repurpose
767 /// the node. We don't want future request for structurally identical nodes
768 /// to return N anymore.
769 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
771 switch (N->getOpcode()) {
772 case ISD::HANDLENODE: return false; // noop.
774 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
775 "Cond code doesn't exist!");
776 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
777 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
779 case ISD::ExternalSymbol:
780 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
782 case ISD::TargetExternalSymbol: {
783 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
784 Erased = TargetExternalSymbols.erase(
785 std::pair<std::string,unsigned char>(ESN->getSymbol(),
786 ESN->getTargetFlags()));
789 case ISD::VALUETYPE: {
790 EVT VT = cast<VTSDNode>(N)->getVT();
791 if (VT.isExtended()) {
792 Erased = ExtendedValueTypeNodes.erase(VT);
794 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
795 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
800 // Remove it from the CSE Map.
801 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
802 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
803 Erased = CSEMap.RemoveNode(N);
807 // Verify that the node was actually in one of the CSE maps, unless it has a
808 // flag result (which cannot be CSE'd) or is one of the special cases that are
809 // not subject to CSE.
810 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
811 !N->isMachineOpcode() && !doNotCSE(N)) {
814 llvm_unreachable("Node is not in map!");
820 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
821 /// maps and modified in place. Add it back to the CSE maps, unless an identical
822 /// node already exists, in which case transfer all its users to the existing
823 /// node. This transfer can potentially trigger recursive merging.
826 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
827 // For node types that aren't CSE'd, just act as if no identical node
830 SDNode *Existing = CSEMap.GetOrInsertNode(N);
832 // If there was already an existing matching node, use ReplaceAllUsesWith
833 // to replace the dead one with the existing one. This can cause
834 // recursive merging of other unrelated nodes down the line.
835 ReplaceAllUsesWith(N, Existing);
837 // N is now dead. Inform the listeners and delete it.
838 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
839 DUL->NodeDeleted(N, Existing);
840 DeleteNodeNotInCSEMaps(N);
845 // If the node doesn't already exist, we updated it. Inform listeners.
846 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
850 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
851 /// were replaced with those specified. If this node is never memoized,
852 /// return null, otherwise return a pointer to the slot it would take. If a
853 /// node already exists with these operands, the slot will be non-null.
854 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
859 SDValue Ops[] = { Op };
861 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
862 AddNodeIDCustom(ID, N);
863 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
867 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
868 /// were replaced with those specified. If this node is never memoized,
869 /// return null, otherwise return a pointer to the slot it would take. If a
870 /// node already exists with these operands, the slot will be non-null.
871 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
872 SDValue Op1, SDValue Op2,
877 SDValue Ops[] = { Op1, Op2 };
879 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
880 AddNodeIDCustom(ID, N);
881 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
886 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
887 /// were replaced with those specified. If this node is never memoized,
888 /// return null, otherwise return a pointer to the slot it would take. If a
889 /// node already exists with these operands, the slot will be non-null.
890 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
896 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
897 AddNodeIDCustom(ID, N);
898 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// getEVTAlignment - Compute the default alignment value for the
905 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
906 Type *Ty = VT == MVT::iPTR ?
907 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
908 VT.getTypeForEVT(*getContext());
910 return TLI->getDataLayout()->getABITypeAlignment(Ty);
913 // EntryNode could meaningfully have debug info if we can find it...
914 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
915 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
916 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
917 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
918 UpdateListeners(nullptr) {
919 AllNodes.push_back(&EntryNode);
920 DbgInfo = new SDDbgInfo();
923 void SelectionDAG::init(MachineFunction &mf) {
925 TLI = getSubtarget().getTargetLowering();
926 TSI = getSubtarget().getSelectionDAGInfo();
927 Context = &mf.getFunction()->getContext();
930 SelectionDAG::~SelectionDAG() {
931 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
936 void SelectionDAG::allnodes_clear() {
937 assert(&*AllNodes.begin() == &EntryNode);
938 AllNodes.remove(AllNodes.begin());
939 while (!AllNodes.empty())
940 DeallocateNode(AllNodes.begin());
943 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
944 SDVTList VTs, SDValue N1,
945 SDValue N2, bool nuw, bool nsw,
947 if (isBinOpWithFlags(Opcode)) {
948 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
949 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
950 FN->setHasNoUnsignedWrap(nuw);
951 FN->setHasNoSignedWrap(nsw);
952 FN->setIsExact(exact);
957 BinarySDNode *N = new (NodeAllocator)
958 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
962 void SelectionDAG::clear() {
964 OperandAllocator.Reset();
967 ExtendedValueTypeNodes.clear();
968 ExternalSymbols.clear();
969 TargetExternalSymbols.clear();
970 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
971 static_cast<CondCodeSDNode*>(nullptr));
972 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
973 static_cast<SDNode*>(nullptr));
975 EntryNode.UseList = nullptr;
976 AllNodes.push_back(&EntryNode);
977 Root = getEntryNode();
981 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
982 return VT.bitsGT(Op.getValueType()) ?
983 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
984 getNode(ISD::TRUNCATE, DL, VT, Op);
987 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
988 return VT.bitsGT(Op.getValueType()) ?
989 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
990 getNode(ISD::TRUNCATE, DL, VT, Op);
993 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
994 return VT.bitsGT(Op.getValueType()) ?
995 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
996 getNode(ISD::TRUNCATE, DL, VT, Op);
999 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1001 if (VT.bitsLE(Op.getValueType()))
1002 return getNode(ISD::TRUNCATE, SL, VT, Op);
1004 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1005 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1008 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1009 assert(!VT.isVector() &&
1010 "getZeroExtendInReg should use the vector element type instead of "
1011 "the vector type!");
1012 if (Op.getValueType() == VT) return Op;
1013 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1014 APInt Imm = APInt::getLowBitsSet(BitWidth,
1015 VT.getSizeInBits());
1016 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1017 getConstant(Imm, Op.getValueType()));
1020 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1021 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1022 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1023 "The sizes of the input and result must match in order to perform the "
1024 "extend in-register.");
1025 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1026 "The destination vector type must have fewer lanes than the input.");
1027 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1030 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1031 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1032 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1033 "The sizes of the input and result must match in order to perform the "
1034 "extend in-register.");
1035 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1036 "The destination vector type must have fewer lanes than the input.");
1037 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1040 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1041 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1042 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1043 "The sizes of the input and result must match in order to perform the "
1044 "extend in-register.");
1045 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1046 "The destination vector type must have fewer lanes than the input.");
1047 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1050 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1052 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1053 EVT EltVT = VT.getScalarType();
1055 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1056 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1059 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1060 EVT EltVT = VT.getScalarType();
1062 switch (TLI->getBooleanContents(VT)) {
1063 case TargetLowering::ZeroOrOneBooleanContent:
1064 case TargetLowering::UndefinedBooleanContent:
1065 TrueValue = getConstant(1, VT);
1067 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1068 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1072 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1075 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1076 EVT EltVT = VT.getScalarType();
1077 assert((EltVT.getSizeInBits() >= 64 ||
1078 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1079 "getConstant with a uint64_t value that doesn't fit in the type!");
1080 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1083 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1085 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1088 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1090 assert(VT.isInteger() && "Cannot create FP integer constant!");
1092 EVT EltVT = VT.getScalarType();
1093 const ConstantInt *Elt = &Val;
1095 // In some cases the vector type is legal but the element type is illegal and
1096 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1097 // inserted value (the type does not need to match the vector element type).
1098 // Any extra bits introduced will be truncated away.
1099 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1100 TargetLowering::TypePromoteInteger) {
1101 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1102 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1103 Elt = ConstantInt::get(*getContext(), NewVal);
1105 // In other cases the element type is illegal and needs to be expanded, for
1106 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1107 // the value into n parts and use a vector type with n-times the elements.
1108 // Then bitcast to the type requested.
1109 // Legalizing constants too early makes the DAGCombiner's job harder so we
1110 // only legalize if the DAG tells us we must produce legal types.
1111 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1112 TLI->getTypeAction(*getContext(), EltVT) ==
1113 TargetLowering::TypeExpandInteger) {
1114 APInt NewVal = Elt->getValue();
1115 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1116 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1117 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1118 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1120 // Check the temporary vector is the correct size. If this fails then
1121 // getTypeToTransformTo() probably returned a type whose size (in bits)
1122 // isn't a power-of-2 factor of the requested type size.
1123 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1125 SmallVector<SDValue, 2> EltParts;
1126 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1127 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1128 .trunc(ViaEltSizeInBits),
1129 ViaEltVT, isT, isO));
1132 // EltParts is currently in little endian order. If we actually want
1133 // big-endian order then reverse it now.
1134 if (TLI->isBigEndian())
1135 std::reverse(EltParts.begin(), EltParts.end());
1137 // The elements must be reversed when the element order is different
1138 // to the endianness of the elements (because the BITCAST is itself a
1139 // vector shuffle in this situation). However, we do not need any code to
1140 // perform this reversal because getConstant() is producing a vector
1142 // This situation occurs in MIPS MSA.
1144 SmallVector<SDValue, 8> Ops;
1145 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1146 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1148 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1149 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1154 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1155 "APInt size does not match type size!");
1156 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1157 FoldingSetNodeID ID;
1158 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1162 SDNode *N = nullptr;
1163 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1165 return SDValue(N, 0);
1168 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1169 CSEMap.InsertNode(N, IP);
1173 SDValue Result(N, 0);
1174 if (VT.isVector()) {
1175 SmallVector<SDValue, 8> Ops;
1176 Ops.assign(VT.getVectorNumElements(), Result);
1177 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1182 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1183 return getConstant(Val, TLI->getPointerTy(), isTarget);
1187 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1188 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1191 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1192 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1194 EVT EltVT = VT.getScalarType();
1196 // Do the map lookup using the actual bit pattern for the floating point
1197 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1198 // we don't have issues with SNANs.
1199 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1204 SDNode *N = nullptr;
1205 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1207 return SDValue(N, 0);
1210 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1211 CSEMap.InsertNode(N, IP);
1215 SDValue Result(N, 0);
1216 if (VT.isVector()) {
1217 SmallVector<SDValue, 8> Ops;
1218 Ops.assign(VT.getVectorNumElements(), Result);
1219 // FIXME SDLoc info might be appropriate here
1220 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1225 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1226 EVT EltVT = VT.getScalarType();
1227 if (EltVT==MVT::f32)
1228 return getConstantFP(APFloat((float)Val), VT, isTarget);
1229 else if (EltVT==MVT::f64)
1230 return getConstantFP(APFloat(Val), VT, isTarget);
1231 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1234 APFloat apf = APFloat(Val);
1235 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1237 return getConstantFP(apf, VT, isTarget);
1239 llvm_unreachable("Unsupported type in getConstantFP");
1242 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1243 EVT VT, int64_t Offset,
1245 unsigned char TargetFlags) {
1246 assert((TargetFlags == 0 || isTargetGA) &&
1247 "Cannot set target flags on target-independent globals");
1249 // Truncate (with sign-extension) the offset value to the pointer size.
1250 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1252 Offset = SignExtend64(Offset, BitWidth);
1255 if (GV->isThreadLocal())
1256 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1258 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1260 FoldingSetNodeID ID;
1261 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1263 ID.AddInteger(Offset);
1264 ID.AddInteger(TargetFlags);
1265 ID.AddInteger(GV->getType()->getAddressSpace());
1267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1268 return SDValue(E, 0);
1270 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1271 DL.getDebugLoc(), GV, VT,
1272 Offset, TargetFlags);
1273 CSEMap.InsertNode(N, IP);
1275 return SDValue(N, 0);
1278 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1279 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1280 FoldingSetNodeID ID;
1281 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1284 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1285 return SDValue(E, 0);
1287 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1288 CSEMap.InsertNode(N, IP);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1294 unsigned char TargetFlags) {
1295 assert((TargetFlags == 0 || isTarget) &&
1296 "Cannot set target flags on target-independent jump tables");
1297 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1298 FoldingSetNodeID ID;
1299 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1301 ID.AddInteger(TargetFlags);
1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1304 return SDValue(E, 0);
1306 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1308 CSEMap.InsertNode(N, IP);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1314 unsigned Alignment, int Offset,
1316 unsigned char TargetFlags) {
1317 assert((TargetFlags == 0 || isTarget) &&
1318 "Cannot set target flags on target-independent globals");
1320 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1321 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1322 FoldingSetNodeID ID;
1323 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1324 ID.AddInteger(Alignment);
1325 ID.AddInteger(Offset);
1327 ID.AddInteger(TargetFlags);
1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1330 return SDValue(E, 0);
1332 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1333 Alignment, TargetFlags);
1334 CSEMap.InsertNode(N, IP);
1336 return SDValue(N, 0);
1340 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1341 unsigned Alignment, int Offset,
1343 unsigned char TargetFlags) {
1344 assert((TargetFlags == 0 || isTarget) &&
1345 "Cannot set target flags on target-independent globals");
1347 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1348 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1349 FoldingSetNodeID ID;
1350 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1351 ID.AddInteger(Alignment);
1352 ID.AddInteger(Offset);
1353 C->addSelectionDAGCSEId(ID);
1354 ID.AddInteger(TargetFlags);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1360 Alignment, TargetFlags);
1361 CSEMap.InsertNode(N, IP);
1363 return SDValue(N, 0);
1366 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1367 unsigned char TargetFlags) {
1368 FoldingSetNodeID ID;
1369 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1370 ID.AddInteger(Index);
1371 ID.AddInteger(Offset);
1372 ID.AddInteger(TargetFlags);
1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1375 return SDValue(E, 0);
1377 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1379 CSEMap.InsertNode(N, IP);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1385 FoldingSetNodeID ID;
1386 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1390 return SDValue(E, 0);
1392 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1393 CSEMap.InsertNode(N, IP);
1395 return SDValue(N, 0);
1398 SDValue SelectionDAG::getValueType(EVT VT) {
1399 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1400 ValueTypeNodes.size())
1401 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1403 SDNode *&N = VT.isExtended() ?
1404 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1406 if (N) return SDValue(N, 0);
1407 N = new (NodeAllocator) VTSDNode(VT);
1409 return SDValue(N, 0);
1412 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1413 SDNode *&N = ExternalSymbols[Sym];
1414 if (N) return SDValue(N, 0);
1415 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1417 return SDValue(N, 0);
1420 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1421 unsigned char TargetFlags) {
1423 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1425 if (N) return SDValue(N, 0);
1426 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1428 return SDValue(N, 0);
1431 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1432 if ((unsigned)Cond >= CondCodeNodes.size())
1433 CondCodeNodes.resize(Cond+1);
1435 if (!CondCodeNodes[Cond]) {
1436 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1437 CondCodeNodes[Cond] = N;
1441 return SDValue(CondCodeNodes[Cond], 0);
1444 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1445 // the shuffle mask M that point at N1 to point at N2, and indices that point
1446 // N2 to point at N1.
1447 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1449 int NElts = M.size();
1450 for (int i = 0; i != NElts; ++i) {
1458 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1459 SDValue N2, const int *Mask) {
1460 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1461 "Invalid VECTOR_SHUFFLE");
1463 // Canonicalize shuffle undef, undef -> undef
1464 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1465 return getUNDEF(VT);
1467 // Validate that all indices in Mask are within the range of the elements
1468 // input to the shuffle.
1469 unsigned NElts = VT.getVectorNumElements();
1470 SmallVector<int, 8> MaskVec;
1471 for (unsigned i = 0; i != NElts; ++i) {
1472 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1473 MaskVec.push_back(Mask[i]);
1476 // Canonicalize shuffle v, v -> v, undef
1479 for (unsigned i = 0; i != NElts; ++i)
1480 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1483 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1484 if (N1.getOpcode() == ISD::UNDEF)
1485 commuteShuffle(N1, N2, MaskVec);
1487 // Canonicalize all index into lhs, -> shuffle lhs, undef
1488 // Canonicalize all index into rhs, -> shuffle rhs, undef
1489 bool AllLHS = true, AllRHS = true;
1490 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1491 for (unsigned i = 0; i != NElts; ++i) {
1492 if (MaskVec[i] >= (int)NElts) {
1497 } else if (MaskVec[i] >= 0) {
1501 if (AllLHS && AllRHS)
1502 return getUNDEF(VT);
1503 if (AllLHS && !N2Undef)
1507 commuteShuffle(N1, N2, MaskVec);
1509 // Reset our undef status after accounting for the mask.
1510 N2Undef = N2.getOpcode() == ISD::UNDEF;
1511 // Re-check whether both sides ended up undef.
1512 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1513 return getUNDEF(VT);
1515 // If Identity shuffle return that node.
1516 bool Identity = true;
1517 for (unsigned i = 0; i != NElts; ++i) {
1518 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1520 if (Identity && NElts)
1523 // Shuffling a constant splat doesn't change the result.
1527 // Look through any bitcasts. We check that these don't change the number
1528 // (and size) of elements and just changes their types.
1529 while (V.getOpcode() == ISD::BITCAST)
1530 V = V->getOperand(0);
1532 // A splat should always show up as a build vector node.
1533 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1534 BitVector UndefElements;
1535 SDValue Splat = BV->getSplatValue(&UndefElements);
1536 // If this is a splat of an undef, shuffling it is also undef.
1537 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1538 return getUNDEF(VT);
1540 // We only have a splat which can skip shuffles if there is a splatted
1541 // value and no undef lanes rearranged by the shuffle.
1542 if (Splat && UndefElements.none()) {
1543 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1544 // number of elements match or the value splatted is a zero constant.
1545 if (V.getValueType().getVectorNumElements() ==
1546 VT.getVectorNumElements())
1548 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1549 if (C->isNullValue())
1555 FoldingSetNodeID ID;
1556 SDValue Ops[2] = { N1, N2 };
1557 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1558 for (unsigned i = 0; i != NElts; ++i)
1559 ID.AddInteger(MaskVec[i]);
1562 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1563 return SDValue(E, 0);
1565 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1566 // SDNode doesn't have access to it. This memory will be "leaked" when
1567 // the node is deallocated, but recovered when the NodeAllocator is released.
1568 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1569 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1571 ShuffleVectorSDNode *N =
1572 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1573 dl.getDebugLoc(), N1, N2,
1575 CSEMap.InsertNode(N, IP);
1577 return SDValue(N, 0);
1580 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1581 MVT VT = SV.getSimpleValueType(0);
1582 unsigned NumElems = VT.getVectorNumElements();
1583 SmallVector<int, 8> MaskVec;
1585 for (unsigned i = 0; i != NumElems; ++i) {
1586 int Idx = SV.getMaskElt(i);
1588 if (Idx < (int)NumElems)
1593 MaskVec.push_back(Idx);
1596 SDValue Op0 = SV.getOperand(0);
1597 SDValue Op1 = SV.getOperand(1);
1598 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1601 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1602 SDValue Val, SDValue DTy,
1603 SDValue STy, SDValue Rnd, SDValue Sat,
1604 ISD::CvtCode Code) {
1605 // If the src and dest types are the same and the conversion is between
1606 // integer types of the same sign or two floats, no conversion is necessary.
1608 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1611 FoldingSetNodeID ID;
1612 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1613 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1615 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1616 return SDValue(E, 0);
1618 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1621 CSEMap.InsertNode(N, IP);
1623 return SDValue(N, 0);
1626 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1627 FoldingSetNodeID ID;
1628 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1629 ID.AddInteger(RegNo);
1631 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1632 return SDValue(E, 0);
1634 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1635 CSEMap.InsertNode(N, IP);
1637 return SDValue(N, 0);
1640 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1641 FoldingSetNodeID ID;
1642 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1643 ID.AddPointer(RegMask);
1645 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1646 return SDValue(E, 0);
1648 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1649 CSEMap.InsertNode(N, IP);
1651 return SDValue(N, 0);
1654 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1655 FoldingSetNodeID ID;
1656 SDValue Ops[] = { Root };
1657 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1658 ID.AddPointer(Label);
1660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1661 return SDValue(E, 0);
1663 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1664 dl.getDebugLoc(), Root, Label);
1665 CSEMap.InsertNode(N, IP);
1667 return SDValue(N, 0);
1671 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1674 unsigned char TargetFlags) {
1675 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1677 FoldingSetNodeID ID;
1678 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1680 ID.AddInteger(Offset);
1681 ID.AddInteger(TargetFlags);
1683 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1684 return SDValue(E, 0);
1686 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1688 CSEMap.InsertNode(N, IP);
1690 return SDValue(N, 0);
1693 SDValue SelectionDAG::getSrcValue(const Value *V) {
1694 assert((!V || V->getType()->isPointerTy()) &&
1695 "SrcValue is not a pointer?");
1697 FoldingSetNodeID ID;
1698 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1702 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1703 return SDValue(E, 0);
1705 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1706 CSEMap.InsertNode(N, IP);
1708 return SDValue(N, 0);
1711 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1712 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1713 FoldingSetNodeID ID;
1714 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1718 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1719 return SDValue(E, 0);
1721 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1722 CSEMap.InsertNode(N, IP);
1724 return SDValue(N, 0);
1727 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1728 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1729 unsigned SrcAS, unsigned DestAS) {
1730 SDValue Ops[] = {Ptr};
1731 FoldingSetNodeID ID;
1732 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1733 ID.AddInteger(SrcAS);
1734 ID.AddInteger(DestAS);
1737 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1738 return SDValue(E, 0);
1740 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1742 VT, Ptr, SrcAS, DestAS);
1743 CSEMap.InsertNode(N, IP);
1745 return SDValue(N, 0);
1748 /// getShiftAmountOperand - Return the specified value casted to
1749 /// the target's desired shift amount type.
1750 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1751 EVT OpTy = Op.getValueType();
1752 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1753 if (OpTy == ShTy || OpTy.isVector()) return Op;
1755 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1756 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1759 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1760 /// specified value type.
1761 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1762 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1763 unsigned ByteSize = VT.getStoreSize();
1764 Type *Ty = VT.getTypeForEVT(*getContext());
1765 unsigned StackAlign =
1766 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1768 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1769 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1772 /// CreateStackTemporary - Create a stack temporary suitable for holding
1773 /// either of the specified value types.
1774 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1775 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1776 VT2.getStoreSizeInBits())/8;
1777 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1778 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1779 const DataLayout *TD = TLI->getDataLayout();
1780 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1781 TD->getPrefTypeAlignment(Ty2));
1783 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1784 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1785 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1788 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1789 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1790 // These setcc operations always fold.
1794 case ISD::SETFALSE2: return getConstant(0, VT);
1796 case ISD::SETTRUE2: {
1797 TargetLowering::BooleanContent Cnt =
1798 TLI->getBooleanContents(N1->getValueType(0));
1800 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1813 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1817 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1818 const APInt &C2 = N2C->getAPIntValue();
1819 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1820 const APInt &C1 = N1C->getAPIntValue();
1823 default: llvm_unreachable("Unknown integer setcc!");
1824 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1825 case ISD::SETNE: return getConstant(C1 != C2, VT);
1826 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1827 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1828 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1829 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1830 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1831 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1832 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1833 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1837 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1838 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1839 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1842 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1843 return getUNDEF(VT);
1845 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1846 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1847 return getUNDEF(VT);
1849 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1850 R==APFloat::cmpLessThan, VT);
1851 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1852 return getUNDEF(VT);
1854 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1855 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1856 return getUNDEF(VT);
1858 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1859 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1860 return getUNDEF(VT);
1862 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1863 R==APFloat::cmpEqual, VT);
1864 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1865 return getUNDEF(VT);
1867 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1868 R==APFloat::cmpEqual, VT);
1869 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1870 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1871 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1872 R==APFloat::cmpEqual, VT);
1873 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1874 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1875 R==APFloat::cmpLessThan, VT);
1876 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1877 R==APFloat::cmpUnordered, VT);
1878 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1879 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1882 // Ensure that the constant occurs on the RHS.
1883 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1884 MVT CompVT = N1.getValueType().getSimpleVT();
1885 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1888 return getSetCC(dl, VT, N2, N1, SwappedCond);
1892 // Could not fold it.
1896 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1897 /// use this predicate to simplify operations downstream.
1898 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1899 // This predicate is not safe for vector operations.
1900 if (Op.getValueType().isVector())
1903 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1904 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1907 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1908 /// this predicate to simplify operations downstream. Mask is known to be zero
1909 /// for bits that V cannot have.
1910 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1911 unsigned Depth) const {
1912 APInt KnownZero, KnownOne;
1913 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1914 return (KnownZero & Mask) == Mask;
1917 /// Determine which bits of Op are known to be either zero or one and return
1918 /// them in the KnownZero/KnownOne bitsets.
1919 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1920 APInt &KnownOne, unsigned Depth) const {
1921 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1923 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1925 return; // Limit search depth.
1927 APInt KnownZero2, KnownOne2;
1929 switch (Op.getOpcode()) {
1931 // We know all of the bits for a constant!
1932 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1933 KnownZero = ~KnownOne;
1936 // If either the LHS or the RHS are Zero, the result is zero.
1937 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1938 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1940 // Output known-1 bits are only known if set in both the LHS & RHS.
1941 KnownOne &= KnownOne2;
1942 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1943 KnownZero |= KnownZero2;
1946 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1947 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1949 // Output known-0 bits are only known if clear in both the LHS & RHS.
1950 KnownZero &= KnownZero2;
1951 // Output known-1 are known to be set if set in either the LHS | RHS.
1952 KnownOne |= KnownOne2;
1955 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1956 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1958 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1959 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1960 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1961 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1962 KnownZero = KnownZeroOut;
1966 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1967 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1969 // If low bits are zero in either operand, output low known-0 bits.
1970 // Also compute a conserative estimate for high known-0 bits.
1971 // More trickiness is possible, but this is sufficient for the
1972 // interesting case of alignment computation.
1973 KnownOne.clearAllBits();
1974 unsigned TrailZ = KnownZero.countTrailingOnes() +
1975 KnownZero2.countTrailingOnes();
1976 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1977 KnownZero2.countLeadingOnes(),
1978 BitWidth) - BitWidth;
1980 TrailZ = std::min(TrailZ, BitWidth);
1981 LeadZ = std::min(LeadZ, BitWidth);
1982 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1983 APInt::getHighBitsSet(BitWidth, LeadZ);
1987 // For the purposes of computing leading zeros we can conservatively
1988 // treat a udiv as a logical right shift by the power of 2 known to
1989 // be less than the denominator.
1990 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1991 unsigned LeadZ = KnownZero2.countLeadingOnes();
1993 KnownOne2.clearAllBits();
1994 KnownZero2.clearAllBits();
1995 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1996 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1997 if (RHSUnknownLeadingOnes != BitWidth)
1998 LeadZ = std::min(BitWidth,
1999 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2001 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2005 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2006 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2008 // Only known if known in both the LHS and RHS.
2009 KnownOne &= KnownOne2;
2010 KnownZero &= KnownZero2;
2012 case ISD::SELECT_CC:
2013 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2014 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2016 // Only known if known in both the LHS and RHS.
2017 KnownOne &= KnownOne2;
2018 KnownZero &= KnownZero2;
2026 if (Op.getResNo() != 1)
2028 // The boolean result conforms to getBooleanContents.
2029 // If we know the result of a setcc has the top bits zero, use this info.
2030 // We know that we have an integer-based boolean since these operations
2031 // are only available for integer.
2032 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2033 TargetLowering::ZeroOrOneBooleanContent &&
2035 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2038 // If we know the result of a setcc has the top bits zero, use this info.
2039 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2040 TargetLowering::ZeroOrOneBooleanContent &&
2042 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2045 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2046 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2047 unsigned ShAmt = SA->getZExtValue();
2049 // If the shift count is an invalid immediate, don't do anything.
2050 if (ShAmt >= BitWidth)
2053 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2054 KnownZero <<= ShAmt;
2056 // low bits known zero.
2057 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2061 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2062 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2063 unsigned ShAmt = SA->getZExtValue();
2065 // If the shift count is an invalid immediate, don't do anything.
2066 if (ShAmt >= BitWidth)
2069 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2070 KnownZero = KnownZero.lshr(ShAmt);
2071 KnownOne = KnownOne.lshr(ShAmt);
2073 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2074 KnownZero |= HighBits; // High bits known zero.
2078 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2079 unsigned ShAmt = SA->getZExtValue();
2081 // If the shift count is an invalid immediate, don't do anything.
2082 if (ShAmt >= BitWidth)
2085 // If any of the demanded bits are produced by the sign extension, we also
2086 // demand the input sign bit.
2087 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2089 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2090 KnownZero = KnownZero.lshr(ShAmt);
2091 KnownOne = KnownOne.lshr(ShAmt);
2093 // Handle the sign bits.
2094 APInt SignBit = APInt::getSignBit(BitWidth);
2095 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2097 if (KnownZero.intersects(SignBit)) {
2098 KnownZero |= HighBits; // New bits are known zero.
2099 } else if (KnownOne.intersects(SignBit)) {
2100 KnownOne |= HighBits; // New bits are known one.
2104 case ISD::SIGN_EXTEND_INREG: {
2105 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2106 unsigned EBits = EVT.getScalarType().getSizeInBits();
2108 // Sign extension. Compute the demanded bits in the result that are not
2109 // present in the input.
2110 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2112 APInt InSignBit = APInt::getSignBit(EBits);
2113 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2115 // If the sign extended bits are demanded, we know that the sign
2117 InSignBit = InSignBit.zext(BitWidth);
2118 if (NewBits.getBoolValue())
2119 InputDemandedBits |= InSignBit;
2121 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2122 KnownOne &= InputDemandedBits;
2123 KnownZero &= InputDemandedBits;
2125 // If the sign bit of the input is known set or clear, then we know the
2126 // top bits of the result.
2127 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2128 KnownZero |= NewBits;
2129 KnownOne &= ~NewBits;
2130 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2131 KnownOne |= NewBits;
2132 KnownZero &= ~NewBits;
2133 } else { // Input sign bit unknown
2134 KnownZero &= ~NewBits;
2135 KnownOne &= ~NewBits;
2140 case ISD::CTTZ_ZERO_UNDEF:
2142 case ISD::CTLZ_ZERO_UNDEF:
2144 unsigned LowBits = Log2_32(BitWidth)+1;
2145 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2146 KnownOne.clearAllBits();
2150 LoadSDNode *LD = cast<LoadSDNode>(Op);
2151 // If this is a ZEXTLoad and we are looking at the loaded value.
2152 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2153 EVT VT = LD->getMemoryVT();
2154 unsigned MemBits = VT.getScalarType().getSizeInBits();
2155 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2156 } else if (const MDNode *Ranges = LD->getRanges()) {
2157 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2161 case ISD::ZERO_EXTEND: {
2162 EVT InVT = Op.getOperand(0).getValueType();
2163 unsigned InBits = InVT.getScalarType().getSizeInBits();
2164 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2165 KnownZero = KnownZero.trunc(InBits);
2166 KnownOne = KnownOne.trunc(InBits);
2167 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2168 KnownZero = KnownZero.zext(BitWidth);
2169 KnownOne = KnownOne.zext(BitWidth);
2170 KnownZero |= NewBits;
2173 case ISD::SIGN_EXTEND: {
2174 EVT InVT = Op.getOperand(0).getValueType();
2175 unsigned InBits = InVT.getScalarType().getSizeInBits();
2176 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2178 KnownZero = KnownZero.trunc(InBits);
2179 KnownOne = KnownOne.trunc(InBits);
2180 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2182 // Note if the sign bit is known to be zero or one.
2183 bool SignBitKnownZero = KnownZero.isNegative();
2184 bool SignBitKnownOne = KnownOne.isNegative();
2186 KnownZero = KnownZero.zext(BitWidth);
2187 KnownOne = KnownOne.zext(BitWidth);
2189 // If the sign bit is known zero or one, the top bits match.
2190 if (SignBitKnownZero)
2191 KnownZero |= NewBits;
2192 else if (SignBitKnownOne)
2193 KnownOne |= NewBits;
2196 case ISD::ANY_EXTEND: {
2197 EVT InVT = Op.getOperand(0).getValueType();
2198 unsigned InBits = InVT.getScalarType().getSizeInBits();
2199 KnownZero = KnownZero.trunc(InBits);
2200 KnownOne = KnownOne.trunc(InBits);
2201 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2202 KnownZero = KnownZero.zext(BitWidth);
2203 KnownOne = KnownOne.zext(BitWidth);
2206 case ISD::TRUNCATE: {
2207 EVT InVT = Op.getOperand(0).getValueType();
2208 unsigned InBits = InVT.getScalarType().getSizeInBits();
2209 KnownZero = KnownZero.zext(InBits);
2210 KnownOne = KnownOne.zext(InBits);
2211 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2212 KnownZero = KnownZero.trunc(BitWidth);
2213 KnownOne = KnownOne.trunc(BitWidth);
2216 case ISD::AssertZext: {
2217 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2218 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2219 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2220 KnownZero |= (~InMask);
2221 KnownOne &= (~KnownZero);
2225 // All bits are zero except the low bit.
2226 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2230 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2231 // We know that the top bits of C-X are clear if X contains less bits
2232 // than C (i.e. no wrap-around can happen). For example, 20-X is
2233 // positive if we can prove that X is >= 0 and < 16.
2234 if (CLHS->getAPIntValue().isNonNegative()) {
2235 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2236 // NLZ can't be BitWidth with no sign bit
2237 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2238 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2240 // If all of the MaskV bits are known to be zero, then we know the
2241 // output top bits are zero, because we now know that the output is
2243 if ((KnownZero2 & MaskV) == MaskV) {
2244 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2245 // Top bits known zero.
2246 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2254 // Output known-0 bits are known if clear or set in both the low clear bits
2255 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2256 // low 3 bits clear.
2257 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2258 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2260 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2261 KnownZeroOut = std::min(KnownZeroOut,
2262 KnownZero2.countTrailingOnes());
2264 if (Op.getOpcode() == ISD::ADD) {
2265 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2269 // With ADDE, a carry bit may be added in, so we can only use this
2270 // information if we know (at least) that the low two bits are clear. We
2271 // then return to the caller that the low bit is unknown but that other bits
2273 if (KnownZeroOut >= 2) // ADDE
2274 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2278 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2279 const APInt &RA = Rem->getAPIntValue().abs();
2280 if (RA.isPowerOf2()) {
2281 APInt LowBits = RA - 1;
2282 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2284 // The low bits of the first operand are unchanged by the srem.
2285 KnownZero = KnownZero2 & LowBits;
2286 KnownOne = KnownOne2 & LowBits;
2288 // If the first operand is non-negative or has all low bits zero, then
2289 // the upper bits are all zero.
2290 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2291 KnownZero |= ~LowBits;
2293 // If the first operand is negative and not all low bits are zero, then
2294 // the upper bits are all one.
2295 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2296 KnownOne |= ~LowBits;
2297 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2302 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2303 const APInt &RA = Rem->getAPIntValue();
2304 if (RA.isPowerOf2()) {
2305 APInt LowBits = (RA - 1);
2306 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2308 // The upper bits are all zero, the lower ones are unchanged.
2309 KnownZero = KnownZero2 | ~LowBits;
2310 KnownOne = KnownOne2 & LowBits;
2315 // Since the result is less than or equal to either operand, any leading
2316 // zero bits in either operand must also exist in the result.
2317 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2318 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2320 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2321 KnownZero2.countLeadingOnes());
2322 KnownOne.clearAllBits();
2323 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2326 case ISD::FrameIndex:
2327 case ISD::TargetFrameIndex:
2328 if (unsigned Align = InferPtrAlignment(Op)) {
2329 // The low bits are known zero if the pointer is aligned.
2330 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2336 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2339 case ISD::INTRINSIC_WO_CHAIN:
2340 case ISD::INTRINSIC_W_CHAIN:
2341 case ISD::INTRINSIC_VOID:
2342 // Allow the target to implement this method for its nodes.
2343 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2347 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2350 /// ComputeNumSignBits - Return the number of times the sign bit of the
2351 /// register is replicated into the other bits. We know that at least 1 bit
2352 /// is always equal to the sign bit (itself), but other cases can give us
2353 /// information. For example, immediately after an "SRA X, 2", we know that
2354 /// the top 3 bits are all equal to each other, so we return 3.
2355 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2356 EVT VT = Op.getValueType();
2357 assert(VT.isInteger() && "Invalid VT!");
2358 unsigned VTBits = VT.getScalarType().getSizeInBits();
2360 unsigned FirstAnswer = 1;
2363 return 1; // Limit search depth.
2365 switch (Op.getOpcode()) {
2367 case ISD::AssertSext:
2368 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2369 return VTBits-Tmp+1;
2370 case ISD::AssertZext:
2371 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2374 case ISD::Constant: {
2375 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2376 return Val.getNumSignBits();
2379 case ISD::SIGN_EXTEND:
2381 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2382 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2384 case ISD::SIGN_EXTEND_INREG:
2385 // Max of the input and what this extends.
2387 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2390 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2391 return std::max(Tmp, Tmp2);
2394 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2395 // SRA X, C -> adds C sign bits.
2396 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2397 Tmp += C->getZExtValue();
2398 if (Tmp > VTBits) Tmp = VTBits;
2402 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2403 // shl destroys sign bits.
2404 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2405 if (C->getZExtValue() >= VTBits || // Bad shift.
2406 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2407 return Tmp - C->getZExtValue();
2412 case ISD::XOR: // NOT is handled here.
2413 // Logical binary ops preserve the number of sign bits at the worst.
2414 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2416 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2417 FirstAnswer = std::min(Tmp, Tmp2);
2418 // We computed what we know about the sign bits as our first
2419 // answer. Now proceed to the generic code that uses
2420 // computeKnownBits, and pick whichever answer is better.
2425 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2426 if (Tmp == 1) return 1; // Early out.
2427 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2428 return std::min(Tmp, Tmp2);
2436 if (Op.getResNo() != 1)
2438 // The boolean result conforms to getBooleanContents. Fall through.
2439 // If setcc returns 0/-1, all bits are sign bits.
2440 // We know that we have an integer-based boolean since these operations
2441 // are only available for integer.
2442 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2443 TargetLowering::ZeroOrNegativeOneBooleanContent)
2447 // If setcc returns 0/-1, all bits are sign bits.
2448 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2449 TargetLowering::ZeroOrNegativeOneBooleanContent)
2454 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2455 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2457 // Handle rotate right by N like a rotate left by 32-N.
2458 if (Op.getOpcode() == ISD::ROTR)
2459 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2461 // If we aren't rotating out all of the known-in sign bits, return the
2462 // number that are left. This handles rotl(sext(x), 1) for example.
2463 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2464 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2468 // Add can have at most one carry bit. Thus we know that the output
2469 // is, at worst, one more bit than the inputs.
2470 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2471 if (Tmp == 1) return 1; // Early out.
2473 // Special case decrementing a value (ADD X, -1):
2474 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2475 if (CRHS->isAllOnesValue()) {
2476 APInt KnownZero, KnownOne;
2477 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2479 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2481 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2484 // If we are subtracting one from a positive number, there is no carry
2485 // out of the result.
2486 if (KnownZero.isNegative())
2490 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2491 if (Tmp2 == 1) return 1;
2492 return std::min(Tmp, Tmp2)-1;
2495 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2496 if (Tmp2 == 1) return 1;
2499 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2500 if (CLHS->isNullValue()) {
2501 APInt KnownZero, KnownOne;
2502 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2503 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2505 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2508 // If the input is known to be positive (the sign bit is known clear),
2509 // the output of the NEG has the same number of sign bits as the input.
2510 if (KnownZero.isNegative())
2513 // Otherwise, we treat this like a SUB.
2516 // Sub can have at most one carry bit. Thus we know that the output
2517 // is, at worst, one more bit than the inputs.
2518 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2519 if (Tmp == 1) return 1; // Early out.
2520 return std::min(Tmp, Tmp2)-1;
2522 // FIXME: it's tricky to do anything useful for this, but it is an important
2523 // case for targets like X86.
2527 // If we are looking at the loaded value of the SDNode.
2528 if (Op.getResNo() == 0) {
2529 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2530 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2531 unsigned ExtType = LD->getExtensionType();
2534 case ISD::SEXTLOAD: // '17' bits known
2535 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2536 return VTBits-Tmp+1;
2537 case ISD::ZEXTLOAD: // '16' bits known
2538 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2544 // Allow the target to implement this method for its nodes.
2545 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2546 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2547 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2548 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2549 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2550 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2553 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2554 // use this information.
2555 APInt KnownZero, KnownOne;
2556 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2559 if (KnownZero.isNegative()) { // sign bit is 0
2561 } else if (KnownOne.isNegative()) { // sign bit is 1;
2568 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2569 // the number of identical bits in the top of the input value.
2571 Mask <<= Mask.getBitWidth()-VTBits;
2572 // Return # leading zeros. We use 'min' here in case Val was zero before
2573 // shifting. We don't want to return '64' as for an i32 "0".
2574 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2577 /// isBaseWithConstantOffset - Return true if the specified operand is an
2578 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2579 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2580 /// semantics as an ADD. This handles the equivalence:
2581 /// X|Cst == X+Cst iff X&Cst = 0.
2582 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2583 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2584 !isa<ConstantSDNode>(Op.getOperand(1)))
2587 if (Op.getOpcode() == ISD::OR &&
2588 !MaskedValueIsZero(Op.getOperand(0),
2589 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2596 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2597 // If we're told that NaNs won't happen, assume they won't.
2598 if (getTarget().Options.NoNaNsFPMath)
2601 // If the value is a constant, we can obviously see if it is a NaN or not.
2602 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2603 return !C->getValueAPF().isNaN();
2605 // TODO: Recognize more cases here.
2610 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2611 // If the value is a constant, we can obviously see if it is a zero or not.
2612 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2613 return !C->isZero();
2615 // TODO: Recognize more cases here.
2616 switch (Op.getOpcode()) {
2619 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2620 return !C->isNullValue();
2627 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2628 // Check the obvious case.
2629 if (A == B) return true;
2631 // For for negative and positive zero.
2632 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2633 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2634 if (CA->isZero() && CB->isZero()) return true;
2636 // Otherwise they may not be equal.
2640 /// getNode - Gets or creates the specified node.
2642 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2643 FoldingSetNodeID ID;
2644 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2646 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2647 return SDValue(E, 0);
2649 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2650 DL.getDebugLoc(), getVTList(VT));
2651 CSEMap.InsertNode(N, IP);
2654 return SDValue(N, 0);
2657 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2658 EVT VT, SDValue Operand) {
2659 // Constant fold unary operations with an integer constant operand. Even
2660 // opaque constant will be folded, because the folding of unary operations
2661 // doesn't create new constants with different values. Nevertheless, the
2662 // opaque flag is preserved during folding to prevent future folding with
2664 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2665 const APInt &Val = C->getAPIntValue();
2668 case ISD::SIGN_EXTEND:
2669 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2670 C->isTargetOpcode(), C->isOpaque());
2671 case ISD::ANY_EXTEND:
2672 case ISD::ZERO_EXTEND:
2674 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2675 C->isTargetOpcode(), C->isOpaque());
2676 case ISD::UINT_TO_FP:
2677 case ISD::SINT_TO_FP: {
2678 APFloat apf(EVTToAPFloatSemantics(VT),
2679 APInt::getNullValue(VT.getSizeInBits()));
2680 (void)apf.convertFromAPInt(Val,
2681 Opcode==ISD::SINT_TO_FP,
2682 APFloat::rmNearestTiesToEven);
2683 return getConstantFP(apf, VT);
2686 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2687 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2688 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2689 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2692 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2695 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2698 case ISD::CTLZ_ZERO_UNDEF:
2699 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2702 case ISD::CTTZ_ZERO_UNDEF:
2703 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2708 // Constant fold unary operations with a floating point constant operand.
2709 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2710 APFloat V = C->getValueAPF(); // make copy
2714 return getConstantFP(V, VT);
2717 return getConstantFP(V, VT);
2719 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2720 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2721 return getConstantFP(V, VT);
2725 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2726 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2727 return getConstantFP(V, VT);
2731 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2732 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2733 return getConstantFP(V, VT);
2736 case ISD::FP_EXTEND: {
2738 // This can return overflow, underflow, or inexact; we don't care.
2739 // FIXME need to be more flexible about rounding mode.
2740 (void)V.convert(EVTToAPFloatSemantics(VT),
2741 APFloat::rmNearestTiesToEven, &ignored);
2742 return getConstantFP(V, VT);
2744 case ISD::FP_TO_SINT:
2745 case ISD::FP_TO_UINT: {
2748 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2749 // FIXME need to be more flexible about rounding mode.
2750 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2751 Opcode==ISD::FP_TO_SINT,
2752 APFloat::rmTowardZero, &ignored);
2753 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2755 APInt api(VT.getSizeInBits(), x);
2756 return getConstant(api, VT);
2759 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2760 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2761 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2762 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2767 // Constant fold unary operations with a vector integer operand.
2768 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2769 if (BV->isConstant()) {
2772 // FIXME: Entirely reasonable to perform folding of other unary
2773 // operations here as the need arises.
2775 case ISD::UINT_TO_FP:
2776 case ISD::SINT_TO_FP: {
2777 SmallVector<SDValue, 8> Ops;
2778 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2779 SDValue OpN = BV->getOperand(i);
2780 // Let the above scalar folding handle the conversion of each
2782 OpN = getNode(ISD::SINT_TO_FP, DL, VT.getVectorElementType(),
2786 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2792 unsigned OpOpcode = Operand.getNode()->getOpcode();
2794 case ISD::TokenFactor:
2795 case ISD::MERGE_VALUES:
2796 case ISD::CONCAT_VECTORS:
2797 return Operand; // Factor, merge or concat of one node? No need.
2798 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2799 case ISD::FP_EXTEND:
2800 assert(VT.isFloatingPoint() &&
2801 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2802 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2803 assert((!VT.isVector() ||
2804 VT.getVectorNumElements() ==
2805 Operand.getValueType().getVectorNumElements()) &&
2806 "Vector element count mismatch!");
2807 if (Operand.getOpcode() == ISD::UNDEF)
2808 return getUNDEF(VT);
2810 case ISD::SIGN_EXTEND:
2811 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2812 "Invalid SIGN_EXTEND!");
2813 if (Operand.getValueType() == VT) return Operand; // noop extension
2814 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2815 "Invalid sext node, dst < src!");
2816 assert((!VT.isVector() ||
2817 VT.getVectorNumElements() ==
2818 Operand.getValueType().getVectorNumElements()) &&
2819 "Vector element count mismatch!");
2820 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2821 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2822 else if (OpOpcode == ISD::UNDEF)
2823 // sext(undef) = 0, because the top bits will all be the same.
2824 return getConstant(0, VT);
2826 case ISD::ZERO_EXTEND:
2827 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2828 "Invalid ZERO_EXTEND!");
2829 if (Operand.getValueType() == VT) return Operand; // noop extension
2830 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2831 "Invalid zext node, dst < src!");
2832 assert((!VT.isVector() ||
2833 VT.getVectorNumElements() ==
2834 Operand.getValueType().getVectorNumElements()) &&
2835 "Vector element count mismatch!");
2836 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2837 return getNode(ISD::ZERO_EXTEND, DL, VT,
2838 Operand.getNode()->getOperand(0));
2839 else if (OpOpcode == ISD::UNDEF)
2840 // zext(undef) = 0, because the top bits will be zero.
2841 return getConstant(0, VT);
2843 case ISD::ANY_EXTEND:
2844 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2845 "Invalid ANY_EXTEND!");
2846 if (Operand.getValueType() == VT) return Operand; // noop extension
2847 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2848 "Invalid anyext node, dst < src!");
2849 assert((!VT.isVector() ||
2850 VT.getVectorNumElements() ==
2851 Operand.getValueType().getVectorNumElements()) &&
2852 "Vector element count mismatch!");
2854 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2855 OpOpcode == ISD::ANY_EXTEND)
2856 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2857 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2858 else if (OpOpcode == ISD::UNDEF)
2859 return getUNDEF(VT);
2861 // (ext (trunx x)) -> x
2862 if (OpOpcode == ISD::TRUNCATE) {
2863 SDValue OpOp = Operand.getNode()->getOperand(0);
2864 if (OpOp.getValueType() == VT)
2869 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2870 "Invalid TRUNCATE!");
2871 if (Operand.getValueType() == VT) return Operand; // noop truncate
2872 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2873 "Invalid truncate node, src < dst!");
2874 assert((!VT.isVector() ||
2875 VT.getVectorNumElements() ==
2876 Operand.getValueType().getVectorNumElements()) &&
2877 "Vector element count mismatch!");
2878 if (OpOpcode == ISD::TRUNCATE)
2879 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2880 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2881 OpOpcode == ISD::ANY_EXTEND) {
2882 // If the source is smaller than the dest, we still need an extend.
2883 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2884 .bitsLT(VT.getScalarType()))
2885 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2886 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2887 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2888 return Operand.getNode()->getOperand(0);
2890 if (OpOpcode == ISD::UNDEF)
2891 return getUNDEF(VT);
2894 // Basic sanity checking.
2895 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2896 && "Cannot BITCAST between types of different sizes!");
2897 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2898 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2899 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2900 if (OpOpcode == ISD::UNDEF)
2901 return getUNDEF(VT);
2903 case ISD::SCALAR_TO_VECTOR:
2904 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2905 (VT.getVectorElementType() == Operand.getValueType() ||
2906 (VT.getVectorElementType().isInteger() &&
2907 Operand.getValueType().isInteger() &&
2908 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2909 "Illegal SCALAR_TO_VECTOR node!");
2910 if (OpOpcode == ISD::UNDEF)
2911 return getUNDEF(VT);
2912 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2913 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2914 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2915 Operand.getConstantOperandVal(1) == 0 &&
2916 Operand.getOperand(0).getValueType() == VT)
2917 return Operand.getOperand(0);
2920 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2921 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2922 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2923 Operand.getNode()->getOperand(0));
2924 if (OpOpcode == ISD::FNEG) // --X -> X
2925 return Operand.getNode()->getOperand(0);
2928 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2929 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2934 SDVTList VTs = getVTList(VT);
2935 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2936 FoldingSetNodeID ID;
2937 SDValue Ops[1] = { Operand };
2938 AddNodeIDNode(ID, Opcode, VTs, Ops);
2940 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2941 return SDValue(E, 0);
2943 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2944 DL.getDebugLoc(), VTs, Operand);
2945 CSEMap.InsertNode(N, IP);
2947 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2948 DL.getDebugLoc(), VTs, Operand);
2952 return SDValue(N, 0);
2955 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2956 SDNode *Cst1, SDNode *Cst2) {
2957 // If the opcode is a target-specific ISD node, there's nothing we can
2958 // do here and the operand rules may not line up with the below, so
2960 if (Opcode >= ISD::BUILTIN_OP_END)
2963 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2964 SmallVector<SDValue, 4> Outputs;
2965 EVT SVT = VT.getScalarType();
2967 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2968 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2969 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
2972 if (Scalar1 && Scalar2)
2973 // Scalar instruction.
2974 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2976 // For vectors extract each constant element into Inputs so we can constant
2977 // fold them individually.
2978 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2979 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2983 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2985 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2986 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2987 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2988 if (!V1 || !V2) // Not a constant, bail.
2991 if (V1->isOpaque() || V2->isOpaque())
2994 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2995 // FIXME: This is valid and could be handled by truncating the APInts.
2996 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2999 Inputs.push_back(std::make_pair(V1, V2));
3003 // We have a number of constant values, constant fold them element by element.
3004 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3005 const APInt &C1 = Inputs[I].first->getAPIntValue();
3006 const APInt &C2 = Inputs[I].second->getAPIntValue();
3010 Outputs.push_back(getConstant(C1 + C2, SVT));
3013 Outputs.push_back(getConstant(C1 - C2, SVT));
3016 Outputs.push_back(getConstant(C1 * C2, SVT));
3019 if (!C2.getBoolValue())
3021 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3024 if (!C2.getBoolValue())
3026 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3029 if (!C2.getBoolValue())
3031 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3034 if (!C2.getBoolValue())
3036 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3039 Outputs.push_back(getConstant(C1 & C2, SVT));
3042 Outputs.push_back(getConstant(C1 | C2, SVT));
3045 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3048 Outputs.push_back(getConstant(C1 << C2, SVT));
3051 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3054 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3057 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3060 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3067 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3068 "Expected a scalar or vector!"));
3070 // Handle the scalar case first.
3072 return Outputs.back();
3074 // We may have a vector type but a scalar result. Create a splat.
3075 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3077 // Build a big vector out of the scalar elements we generated.
3078 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3081 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3082 SDValue N2, bool nuw, bool nsw, bool exact) {
3083 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3084 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3087 case ISD::TokenFactor:
3088 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3089 N2.getValueType() == MVT::Other && "Invalid token factor!");
3090 // Fold trivial token factors.
3091 if (N1.getOpcode() == ISD::EntryToken) return N2;
3092 if (N2.getOpcode() == ISD::EntryToken) return N1;
3093 if (N1 == N2) return N1;
3095 case ISD::CONCAT_VECTORS:
3096 // Concat of UNDEFs is UNDEF.
3097 if (N1.getOpcode() == ISD::UNDEF &&
3098 N2.getOpcode() == ISD::UNDEF)
3099 return getUNDEF(VT);
3101 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3102 // one big BUILD_VECTOR.
3103 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3104 N2.getOpcode() == ISD::BUILD_VECTOR) {
3105 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3106 N1.getNode()->op_end());
3107 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3108 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3112 assert(VT.isInteger() && "This operator does not apply to FP types!");
3113 assert(N1.getValueType() == N2.getValueType() &&
3114 N1.getValueType() == VT && "Binary operator types must match!");
3115 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3116 // worth handling here.
3117 if (N2C && N2C->isNullValue())
3119 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3126 assert(VT.isInteger() && "This operator does not apply to FP types!");
3127 assert(N1.getValueType() == N2.getValueType() &&
3128 N1.getValueType() == VT && "Binary operator types must match!");
3129 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3130 // it's worth handling here.
3131 if (N2C && N2C->isNullValue())
3141 assert(VT.isInteger() && "This operator does not apply to FP types!");
3142 assert(N1.getValueType() == N2.getValueType() &&
3143 N1.getValueType() == VT && "Binary operator types must match!");
3150 if (getTarget().Options.UnsafeFPMath) {
3151 if (Opcode == ISD::FADD) {
3153 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3154 if (CFP->getValueAPF().isZero())
3157 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3158 if (CFP->getValueAPF().isZero())
3160 } else if (Opcode == ISD::FSUB) {
3162 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3163 if (CFP->getValueAPF().isZero())
3165 } else if (Opcode == ISD::FMUL) {
3166 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3169 // If the first operand isn't the constant, try the second
3171 CFP = dyn_cast<ConstantFPSDNode>(N2);
3178 return SDValue(CFP,0);
3180 if (CFP->isExactlyValue(1.0))
3185 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3186 assert(N1.getValueType() == N2.getValueType() &&
3187 N1.getValueType() == VT && "Binary operator types must match!");
3189 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3190 assert(N1.getValueType() == VT &&
3191 N1.getValueType().isFloatingPoint() &&
3192 N2.getValueType().isFloatingPoint() &&
3193 "Invalid FCOPYSIGN!");
3200 assert(VT == N1.getValueType() &&
3201 "Shift operators return type must be the same as their first arg");
3202 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3203 "Shifts only work on integers");
3204 assert((!VT.isVector() || VT == N2.getValueType()) &&
3205 "Vector shift amounts must be in the same as their first arg");
3206 // Verify that the shift amount VT is bit enough to hold valid shift
3207 // amounts. This catches things like trying to shift an i1024 value by an
3208 // i8, which is easy to fall into in generic code that uses
3209 // TLI.getShiftAmount().
3210 assert(N2.getValueType().getSizeInBits() >=
3211 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3212 "Invalid use of small shift amount with oversized value!");
3214 // Always fold shifts of i1 values so the code generator doesn't need to
3215 // handle them. Since we know the size of the shift has to be less than the
3216 // size of the value, the shift/rotate count is guaranteed to be zero.
3219 if (N2C && N2C->isNullValue())
3222 case ISD::FP_ROUND_INREG: {
3223 EVT EVT = cast<VTSDNode>(N2)->getVT();
3224 assert(VT == N1.getValueType() && "Not an inreg round!");
3225 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3226 "Cannot FP_ROUND_INREG integer types");
3227 assert(EVT.isVector() == VT.isVector() &&
3228 "FP_ROUND_INREG type should be vector iff the operand "
3230 assert((!EVT.isVector() ||
3231 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3232 "Vector element counts must match in FP_ROUND_INREG");
3233 assert(EVT.bitsLE(VT) && "Not rounding down!");
3235 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3239 assert(VT.isFloatingPoint() &&
3240 N1.getValueType().isFloatingPoint() &&
3241 VT.bitsLE(N1.getValueType()) &&
3242 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3243 if (N1.getValueType() == VT) return N1; // noop conversion.
3245 case ISD::AssertSext:
3246 case ISD::AssertZext: {
3247 EVT EVT = cast<VTSDNode>(N2)->getVT();
3248 assert(VT == N1.getValueType() && "Not an inreg extend!");
3249 assert(VT.isInteger() && EVT.isInteger() &&
3250 "Cannot *_EXTEND_INREG FP types");
3251 assert(!EVT.isVector() &&
3252 "AssertSExt/AssertZExt type should be the vector element type "
3253 "rather than the vector type!");
3254 assert(EVT.bitsLE(VT) && "Not extending!");
3255 if (VT == EVT) return N1; // noop assertion.
3258 case ISD::SIGN_EXTEND_INREG: {
3259 EVT EVT = cast<VTSDNode>(N2)->getVT();
3260 assert(VT == N1.getValueType() && "Not an inreg extend!");
3261 assert(VT.isInteger() && EVT.isInteger() &&
3262 "Cannot *_EXTEND_INREG FP types");
3263 assert(EVT.isVector() == VT.isVector() &&
3264 "SIGN_EXTEND_INREG type should be vector iff the operand "
3266 assert((!EVT.isVector() ||
3267 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3268 "Vector element counts must match in SIGN_EXTEND_INREG");
3269 assert(EVT.bitsLE(VT) && "Not extending!");
3270 if (EVT == VT) return N1; // Not actually extending
3273 APInt Val = N1C->getAPIntValue();
3274 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3275 Val <<= Val.getBitWidth()-FromBits;
3276 Val = Val.ashr(Val.getBitWidth()-FromBits);
3277 return getConstant(Val, VT);
3281 case ISD::EXTRACT_VECTOR_ELT:
3282 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3283 if (N1.getOpcode() == ISD::UNDEF)
3284 return getUNDEF(VT);
3286 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3287 // expanding copies of large vectors from registers.
3289 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3290 N1.getNumOperands() > 0) {
3292 N1.getOperand(0).getValueType().getVectorNumElements();
3293 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3294 N1.getOperand(N2C->getZExtValue() / Factor),
3295 getConstant(N2C->getZExtValue() % Factor,
3296 N2.getValueType()));
3299 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3300 // expanding large vector constants.
3301 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3302 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3304 if (VT != Elt.getValueType())
3305 // If the vector element type is not legal, the BUILD_VECTOR operands
3306 // are promoted and implicitly truncated, and the result implicitly
3307 // extended. Make that explicit here.
3308 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3313 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3314 // operations are lowered to scalars.
3315 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3316 // If the indices are the same, return the inserted element else
3317 // if the indices are known different, extract the element from
3318 // the original vector.
3319 SDValue N1Op2 = N1.getOperand(2);
3320 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3322 if (N1Op2C && N2C) {
3323 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3324 if (VT == N1.getOperand(1).getValueType())
3325 return N1.getOperand(1);
3327 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3330 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3334 case ISD::EXTRACT_ELEMENT:
3335 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3336 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3337 (N1.getValueType().isInteger() == VT.isInteger()) &&
3338 N1.getValueType() != VT &&
3339 "Wrong types for EXTRACT_ELEMENT!");
3341 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3342 // 64-bit integers into 32-bit parts. Instead of building the extract of
3343 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3344 if (N1.getOpcode() == ISD::BUILD_PAIR)
3345 return N1.getOperand(N2C->getZExtValue());
3347 // EXTRACT_ELEMENT of a constant int is also very common.
3348 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3349 unsigned ElementSize = VT.getSizeInBits();
3350 unsigned Shift = ElementSize * N2C->getZExtValue();
3351 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3352 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3355 case ISD::EXTRACT_SUBVECTOR: {
3357 if (VT.isSimple() && N1.getValueType().isSimple()) {
3358 assert(VT.isVector() && N1.getValueType().isVector() &&
3359 "Extract subvector VTs must be a vectors!");
3360 assert(VT.getVectorElementType() ==
3361 N1.getValueType().getVectorElementType() &&
3362 "Extract subvector VTs must have the same element type!");
3363 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3364 "Extract subvector must be from larger vector to smaller vector!");
3366 if (isa<ConstantSDNode>(Index.getNode())) {
3367 assert((VT.getVectorNumElements() +
3368 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3369 <= N1.getValueType().getVectorNumElements())
3370 && "Extract subvector overflow!");
3373 // Trivial extraction.
3374 if (VT.getSimpleVT() == N1.getSimpleValueType())
3381 // Perform trivial constant folding.
3382 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3383 if (SV.getNode()) return SV;
3385 // Canonicalize constant to RHS if commutative.
3386 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3387 std::swap(N1C, N2C);
3391 // Constant fold FP operations.
3392 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3393 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3394 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3396 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3397 // Canonicalize constant to RHS if commutative.
3398 std::swap(N1CFP, N2CFP);
3401 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3402 APFloat::opStatus s;
3405 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3406 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3407 return getConstantFP(V1, VT);
3410 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3411 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3412 return getConstantFP(V1, VT);
3415 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3416 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3417 return getConstantFP(V1, VT);
3420 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3421 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3422 s!=APFloat::opDivByZero)) {
3423 return getConstantFP(V1, VT);
3427 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3428 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3429 s!=APFloat::opDivByZero)) {
3430 return getConstantFP(V1, VT);
3433 case ISD::FCOPYSIGN:
3435 return getConstantFP(V1, VT);
3440 if (Opcode == ISD::FP_ROUND) {
3441 APFloat V = N1CFP->getValueAPF(); // make copy
3443 // This can return overflow, underflow, or inexact; we don't care.
3444 // FIXME need to be more flexible about rounding mode.
3445 (void)V.convert(EVTToAPFloatSemantics(VT),
3446 APFloat::rmNearestTiesToEven, &ignored);
3447 return getConstantFP(V, VT);
3451 // Canonicalize an UNDEF to the RHS, even over a constant.
3452 if (N1.getOpcode() == ISD::UNDEF) {
3453 if (isCommutativeBinOp(Opcode)) {
3457 case ISD::FP_ROUND_INREG:
3458 case ISD::SIGN_EXTEND_INREG:
3464 return N1; // fold op(undef, arg2) -> undef
3472 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3473 // For vectors, we can't easily build an all zero vector, just return
3480 // Fold a bunch of operators when the RHS is undef.
3481 if (N2.getOpcode() == ISD::UNDEF) {
3484 if (N1.getOpcode() == ISD::UNDEF)
3485 // Handle undef ^ undef -> 0 special case. This is a common
3487 return getConstant(0, VT);
3497 return N2; // fold op(arg1, undef) -> undef
3503 if (getTarget().Options.UnsafeFPMath)
3511 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3512 // For vectors, we can't easily build an all zero vector, just return
3517 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3518 // For vectors, we can't easily build an all one vector, just return
3526 // Memoize this node if possible.
3528 SDVTList VTs = getVTList(VT);
3529 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3530 if (VT != MVT::Glue) {
3531 SDValue Ops[] = {N1, N2};
3532 FoldingSetNodeID ID;
3533 AddNodeIDNode(ID, Opcode, VTs, Ops);
3535 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3537 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3538 return SDValue(E, 0);
3540 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3542 CSEMap.InsertNode(N, IP);
3545 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3549 return SDValue(N, 0);
3552 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3553 SDValue N1, SDValue N2, SDValue N3) {
3554 // Perform various simplifications.
3555 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3558 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3559 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3560 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3561 if (N1CFP && N2CFP && N3CFP) {
3562 APFloat V1 = N1CFP->getValueAPF();
3563 const APFloat &V2 = N2CFP->getValueAPF();
3564 const APFloat &V3 = N3CFP->getValueAPF();
3565 APFloat::opStatus s =
3566 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3567 if (s != APFloat::opInvalidOp)
3568 return getConstantFP(V1, VT);
3572 case ISD::CONCAT_VECTORS:
3573 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3574 // one big BUILD_VECTOR.
3575 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3576 N2.getOpcode() == ISD::BUILD_VECTOR &&
3577 N3.getOpcode() == ISD::BUILD_VECTOR) {
3578 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3579 N1.getNode()->op_end());
3580 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3581 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3582 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3586 // Use FoldSetCC to simplify SETCC's.
3587 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3588 if (Simp.getNode()) return Simp;
3593 if (N1C->getZExtValue())
3594 return N2; // select true, X, Y -> X
3595 return N3; // select false, X, Y -> Y
3598 if (N2 == N3) return N2; // select C, X, X -> X
3600 case ISD::VECTOR_SHUFFLE:
3601 llvm_unreachable("should use getVectorShuffle constructor!");
3602 case ISD::INSERT_SUBVECTOR: {
3604 if (VT.isSimple() && N1.getValueType().isSimple()
3605 && N2.getValueType().isSimple()) {
3606 assert(VT.isVector() && N1.getValueType().isVector() &&
3607 N2.getValueType().isVector() &&
3608 "Insert subvector VTs must be a vectors");
3609 assert(VT == N1.getValueType() &&
3610 "Dest and insert subvector source types must match!");
3611 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3612 "Insert subvector must be from smaller vector to larger vector!");
3613 if (isa<ConstantSDNode>(Index.getNode())) {
3614 assert((N2.getValueType().getVectorNumElements() +
3615 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3616 <= VT.getVectorNumElements())
3617 && "Insert subvector overflow!");
3620 // Trivial insertion.
3621 if (VT.getSimpleVT() == N2.getSimpleValueType())
3627 // Fold bit_convert nodes from a type to themselves.
3628 if (N1.getValueType() == VT)
3633 // Memoize node if it doesn't produce a flag.
3635 SDVTList VTs = getVTList(VT);
3636 if (VT != MVT::Glue) {
3637 SDValue Ops[] = { N1, N2, N3 };
3638 FoldingSetNodeID ID;
3639 AddNodeIDNode(ID, Opcode, VTs, Ops);
3641 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3642 return SDValue(E, 0);
3644 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3645 DL.getDebugLoc(), VTs, N1, N2, N3);
3646 CSEMap.InsertNode(N, IP);
3648 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3649 DL.getDebugLoc(), VTs, N1, N2, N3);
3653 return SDValue(N, 0);
3656 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3657 SDValue N1, SDValue N2, SDValue N3,
3659 SDValue Ops[] = { N1, N2, N3, N4 };
3660 return getNode(Opcode, DL, VT, Ops);
3663 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3664 SDValue N1, SDValue N2, SDValue N3,
3665 SDValue N4, SDValue N5) {
3666 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3667 return getNode(Opcode, DL, VT, Ops);
3670 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3671 /// the incoming stack arguments to be loaded from the stack.
3672 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3673 SmallVector<SDValue, 8> ArgChains;
3675 // Include the original chain at the beginning of the list. When this is
3676 // used by target LowerCall hooks, this helps legalize find the
3677 // CALLSEQ_BEGIN node.
3678 ArgChains.push_back(Chain);
3680 // Add a chain value for each stack argument.
3681 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3682 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3683 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3684 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3685 if (FI->getIndex() < 0)
3686 ArgChains.push_back(SDValue(L, 1));
3688 // Build a tokenfactor for all the chains.
3689 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3692 /// getMemsetValue - Vectorized representation of the memset value
3694 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3696 assert(Value.getOpcode() != ISD::UNDEF);
3698 unsigned NumBits = VT.getScalarType().getSizeInBits();
3699 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3700 assert(C->getAPIntValue().getBitWidth() == 8);
3701 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3703 return DAG.getConstant(Val, VT);
3704 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3707 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3709 // Use a multiplication with 0x010101... to extend the input to the
3711 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3712 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3718 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3719 /// used when a memcpy is turned into a memset when the source is a constant
3721 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3722 const TargetLowering &TLI, StringRef Str) {
3723 // Handle vector with all elements zero.
3726 return DAG.getConstant(0, VT);
3727 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3728 return DAG.getConstantFP(0.0, VT);
3729 else if (VT.isVector()) {
3730 unsigned NumElts = VT.getVectorNumElements();
3731 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3732 return DAG.getNode(ISD::BITCAST, dl, VT,
3733 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3736 llvm_unreachable("Expected type!");
3739 assert(!VT.isVector() && "Can't handle vector type here!");
3740 unsigned NumVTBits = VT.getSizeInBits();
3741 unsigned NumVTBytes = NumVTBits / 8;
3742 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3744 APInt Val(NumVTBits, 0);
3745 if (TLI.isLittleEndian()) {
3746 for (unsigned i = 0; i != NumBytes; ++i)
3747 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3749 for (unsigned i = 0; i != NumBytes; ++i)
3750 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3753 // If the "cost" of materializing the integer immediate is less than the cost
3754 // of a load, then it is cost effective to turn the load into the immediate.
3755 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3756 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3757 return DAG.getConstant(Val, VT);
3758 return SDValue(nullptr, 0);
3761 /// getMemBasePlusOffset - Returns base and offset node for the
3763 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3764 SelectionDAG &DAG) {
3765 EVT VT = Base.getValueType();
3766 return DAG.getNode(ISD::ADD, dl,
3767 VT, Base, DAG.getConstant(Offset, VT));
3770 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3772 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3773 unsigned SrcDelta = 0;
3774 GlobalAddressSDNode *G = nullptr;
3775 if (Src.getOpcode() == ISD::GlobalAddress)
3776 G = cast<GlobalAddressSDNode>(Src);
3777 else if (Src.getOpcode() == ISD::ADD &&
3778 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3779 Src.getOperand(1).getOpcode() == ISD::Constant) {
3780 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3781 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3786 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3789 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3790 /// to replace the memset / memcpy. Return true if the number of memory ops
3791 /// is below the threshold. It returns the types of the sequence of
3792 /// memory ops to perform memset / memcpy by reference.
3793 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3794 unsigned Limit, uint64_t Size,
3795 unsigned DstAlign, unsigned SrcAlign,
3801 const TargetLowering &TLI) {
3802 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3803 "Expecting memcpy / memset source to meet alignment requirement!");
3804 // If 'SrcAlign' is zero, that means the memory operation does not need to
3805 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3806 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3807 // is the specified alignment of the memory operation. If it is zero, that
3808 // means it's possible to change the alignment of the destination.
3809 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3810 // not need to be loaded.
3811 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3812 IsMemset, ZeroMemset, MemcpyStrSrc,
3813 DAG.getMachineFunction());
3815 if (VT == MVT::Other) {
3817 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3818 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3819 VT = TLI.getPointerTy();
3821 switch (DstAlign & 7) {
3822 case 0: VT = MVT::i64; break;
3823 case 4: VT = MVT::i32; break;
3824 case 2: VT = MVT::i16; break;
3825 default: VT = MVT::i8; break;
3830 while (!TLI.isTypeLegal(LVT))
3831 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3832 assert(LVT.isInteger());
3838 unsigned NumMemOps = 0;
3840 unsigned VTSize = VT.getSizeInBits() / 8;
3841 while (VTSize > Size) {
3842 // For now, only use non-vector load / store's for the left-over pieces.
3847 if (VT.isVector() || VT.isFloatingPoint()) {
3848 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3849 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3850 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3852 else if (NewVT == MVT::i64 &&
3853 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3854 TLI.isSafeMemOpType(MVT::f64)) {
3855 // i64 is usually not legal on 32-bit targets, but f64 may be.
3863 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3864 if (NewVT == MVT::i8)
3866 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3868 NewVTSize = NewVT.getSizeInBits() / 8;
3870 // If the new VT cannot cover all of the remaining bits, then consider
3871 // issuing a (or a pair of) unaligned and overlapping load / store.
3872 // FIXME: Only does this for 64-bit or more since we don't have proper
3873 // cost model for unaligned load / store.
3876 if (NumMemOps && AllowOverlap &&
3877 VTSize >= 8 && NewVTSize < Size &&
3878 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3886 if (++NumMemOps > Limit)
3889 MemOps.push_back(VT);
3896 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3897 SDValue Chain, SDValue Dst,
3898 SDValue Src, uint64_t Size,
3899 unsigned Align, bool isVol,
3901 MachinePointerInfo DstPtrInfo,
3902 MachinePointerInfo SrcPtrInfo) {
3903 // Turn a memcpy of undef to nop.
3904 if (Src.getOpcode() == ISD::UNDEF)
3907 // Expand memcpy to a series of load and store ops if the size operand falls
3908 // below a certain threshold.
3909 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3910 // rather than maybe a humongous number of loads and stores.
3911 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3912 std::vector<EVT> MemOps;
3913 bool DstAlignCanChange = false;
3914 MachineFunction &MF = DAG.getMachineFunction();
3915 MachineFrameInfo *MFI = MF.getFrameInfo();
3917 MF.getFunction()->getAttributes().
3918 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3919 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3920 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3921 DstAlignCanChange = true;
3922 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3923 if (Align > SrcAlign)
3926 bool CopyFromStr = isMemSrcFromString(Src, Str);
3927 bool isZeroStr = CopyFromStr && Str.empty();
3928 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3930 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3931 (DstAlignCanChange ? 0 : Align),
3932 (isZeroStr ? 0 : SrcAlign),
3933 false, false, CopyFromStr, true, DAG, TLI))
3936 if (DstAlignCanChange) {
3937 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3938 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3940 // Don't promote to an alignment that would require dynamic stack
3942 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
3943 if (!TRI->needsStackRealignment(MF))
3944 while (NewAlign > Align &&
3945 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3948 if (NewAlign > Align) {
3949 // Give the stack frame object a larger alignment if needed.
3950 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3951 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3956 SmallVector<SDValue, 8> OutChains;
3957 unsigned NumMemOps = MemOps.size();
3958 uint64_t SrcOff = 0, DstOff = 0;
3959 for (unsigned i = 0; i != NumMemOps; ++i) {
3961 unsigned VTSize = VT.getSizeInBits() / 8;
3962 SDValue Value, Store;
3964 if (VTSize > Size) {
3965 // Issuing an unaligned load / store pair that overlaps with the previous
3966 // pair. Adjust the offset accordingly.
3967 assert(i == NumMemOps-1 && i != 0);
3968 SrcOff -= VTSize - Size;
3969 DstOff -= VTSize - Size;
3973 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3974 // It's unlikely a store of a vector immediate can be done in a single
3975 // instruction. It would require a load from a constantpool first.
3976 // We only handle zero vectors here.
3977 // FIXME: Handle other cases where store of vector immediate is done in
3978 // a single instruction.
3979 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3980 if (Value.getNode())
3981 Store = DAG.getStore(Chain, dl, Value,
3982 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3983 DstPtrInfo.getWithOffset(DstOff), isVol,
3987 if (!Store.getNode()) {
3988 // The type might not be legal for the target. This should only happen
3989 // if the type is smaller than a legal type, as on PPC, so the right
3990 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3991 // to Load/Store if NVT==VT.
3992 // FIXME does the case above also need this?
3993 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3994 assert(NVT.bitsGE(VT));
3995 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3996 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
3997 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3998 false, MinAlign(SrcAlign, SrcOff));
3999 Store = DAG.getTruncStore(Chain, dl, Value,
4000 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4001 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4004 OutChains.push_back(Store);
4010 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4013 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4014 SDValue Chain, SDValue Dst,
4015 SDValue Src, uint64_t Size,
4016 unsigned Align, bool isVol,
4018 MachinePointerInfo DstPtrInfo,
4019 MachinePointerInfo SrcPtrInfo) {
4020 // Turn a memmove of undef to nop.
4021 if (Src.getOpcode() == ISD::UNDEF)
4024 // Expand memmove to a series of load and store ops if the size operand falls
4025 // below a certain threshold.
4026 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4027 std::vector<EVT> MemOps;
4028 bool DstAlignCanChange = false;
4029 MachineFunction &MF = DAG.getMachineFunction();
4030 MachineFrameInfo *MFI = MF.getFrameInfo();
4031 bool OptSize = MF.getFunction()->getAttributes().
4032 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4033 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4034 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4035 DstAlignCanChange = true;
4036 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4037 if (Align > SrcAlign)
4039 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4041 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4042 (DstAlignCanChange ? 0 : Align), SrcAlign,
4043 false, false, false, false, DAG, TLI))
4046 if (DstAlignCanChange) {
4047 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4048 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4049 if (NewAlign > Align) {
4050 // Give the stack frame object a larger alignment if needed.
4051 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4052 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4057 uint64_t SrcOff = 0, DstOff = 0;
4058 SmallVector<SDValue, 8> LoadValues;
4059 SmallVector<SDValue, 8> LoadChains;
4060 SmallVector<SDValue, 8> OutChains;
4061 unsigned NumMemOps = MemOps.size();
4062 for (unsigned i = 0; i < NumMemOps; i++) {
4064 unsigned VTSize = VT.getSizeInBits() / 8;
4067 Value = DAG.getLoad(VT, dl, Chain,
4068 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4069 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4070 false, false, SrcAlign);
4071 LoadValues.push_back(Value);
4072 LoadChains.push_back(Value.getValue(1));
4075 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4077 for (unsigned i = 0; i < NumMemOps; i++) {
4079 unsigned VTSize = VT.getSizeInBits() / 8;
4082 Store = DAG.getStore(Chain, dl, LoadValues[i],
4083 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4084 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4085 OutChains.push_back(Store);
4089 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4092 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4095 /// \param DAG Selection DAG where lowered code is placed.
4096 /// \param dl Link to corresponding IR location.
4097 /// \param Chain Control flow dependency.
4098 /// \param Dst Pointer to destination memory location.
4099 /// \param Src Value of byte to write into the memory.
4100 /// \param Size Number of bytes to write.
4101 /// \param Align Alignment of the destination in bytes.
4102 /// \param isVol True if destination is volatile.
4103 /// \param DstPtrInfo IR information on the memory pointer.
4104 /// \returns New head in the control flow, if lowering was successful, empty
4105 /// SDValue otherwise.
4107 /// The function tries to replace 'llvm.memset' intrinsic with several store
4108 /// operations and value calculation code. This is usually profitable for small
4110 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4111 SDValue Chain, SDValue Dst,
4112 SDValue Src, uint64_t Size,
4113 unsigned Align, bool isVol,
4114 MachinePointerInfo DstPtrInfo) {
4115 // Turn a memset of undef to nop.
4116 if (Src.getOpcode() == ISD::UNDEF)
4119 // Expand memset to a series of load/store ops if the size operand
4120 // falls below a certain threshold.
4121 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4122 std::vector<EVT> MemOps;
4123 bool DstAlignCanChange = false;
4124 MachineFunction &MF = DAG.getMachineFunction();
4125 MachineFrameInfo *MFI = MF.getFrameInfo();
4126 bool OptSize = MF.getFunction()->getAttributes().
4127 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4128 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4129 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4130 DstAlignCanChange = true;
4132 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4133 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4134 Size, (DstAlignCanChange ? 0 : Align), 0,
4135 true, IsZeroVal, false, true, DAG, TLI))
4138 if (DstAlignCanChange) {
4139 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4140 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4141 if (NewAlign > Align) {
4142 // Give the stack frame object a larger alignment if needed.
4143 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4144 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4149 SmallVector<SDValue, 8> OutChains;
4150 uint64_t DstOff = 0;
4151 unsigned NumMemOps = MemOps.size();
4153 // Find the largest store and generate the bit pattern for it.
4154 EVT LargestVT = MemOps[0];
4155 for (unsigned i = 1; i < NumMemOps; i++)
4156 if (MemOps[i].bitsGT(LargestVT))
4157 LargestVT = MemOps[i];
4158 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4160 for (unsigned i = 0; i < NumMemOps; i++) {
4162 unsigned VTSize = VT.getSizeInBits() / 8;
4163 if (VTSize > Size) {
4164 // Issuing an unaligned load / store pair that overlaps with the previous
4165 // pair. Adjust the offset accordingly.
4166 assert(i == NumMemOps-1 && i != 0);
4167 DstOff -= VTSize - Size;
4170 // If this store is smaller than the largest store see whether we can get
4171 // the smaller value for free with a truncate.
4172 SDValue Value = MemSetValue;
4173 if (VT.bitsLT(LargestVT)) {
4174 if (!LargestVT.isVector() && !VT.isVector() &&
4175 TLI.isTruncateFree(LargestVT, VT))
4176 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4178 Value = getMemsetValue(Src, VT, DAG, dl);
4180 assert(Value.getValueType() == VT && "Value with wrong type.");
4181 SDValue Store = DAG.getStore(Chain, dl, Value,
4182 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4183 DstPtrInfo.getWithOffset(DstOff),
4184 isVol, false, Align);
4185 OutChains.push_back(Store);
4186 DstOff += VT.getSizeInBits() / 8;
4190 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4193 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4194 SDValue Src, SDValue Size,
4195 unsigned Align, bool isVol, bool AlwaysInline,
4196 MachinePointerInfo DstPtrInfo,
4197 MachinePointerInfo SrcPtrInfo) {
4198 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4200 // Check to see if we should lower the memcpy to loads and stores first.
4201 // For cases within the target-specified limits, this is the best choice.
4202 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4204 // Memcpy with size zero? Just return the original chain.
4205 if (ConstantSize->isNullValue())
4208 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4209 ConstantSize->getZExtValue(),Align,
4210 isVol, false, DstPtrInfo, SrcPtrInfo);
4211 if (Result.getNode())
4215 // Then check to see if we should lower the memcpy with target-specific
4216 // code. If the target chooses to do this, this is the next best.
4218 TSI->EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
4219 isVol, AlwaysInline, DstPtrInfo, SrcPtrInfo);
4220 if (Result.getNode())
4223 // If we really need inline code and the target declined to provide it,
4224 // use a (potentially long) sequence of loads and stores.
4226 assert(ConstantSize && "AlwaysInline requires a constant size!");
4227 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4228 ConstantSize->getZExtValue(), Align, isVol,
4229 true, DstPtrInfo, SrcPtrInfo);
4232 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4233 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4234 // respect volatile, so they may do things like read or write memory
4235 // beyond the given memory regions. But fixing this isn't easy, and most
4236 // people don't care.
4238 // Emit a library call.
4239 TargetLowering::ArgListTy Args;
4240 TargetLowering::ArgListEntry Entry;
4241 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4242 Entry.Node = Dst; Args.push_back(Entry);
4243 Entry.Node = Src; Args.push_back(Entry);
4244 Entry.Node = Size; Args.push_back(Entry);
4245 // FIXME: pass in SDLoc
4246 TargetLowering::CallLoweringInfo CLI(*this);
4247 CLI.setDebugLoc(dl).setChain(Chain)
4248 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4249 Type::getVoidTy(*getContext()),
4250 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4251 TLI->getPointerTy()), std::move(Args), 0)
4252 .setDiscardResult();
4253 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4255 return CallResult.second;
4258 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4259 SDValue Src, SDValue Size,
4260 unsigned Align, bool isVol,
4261 MachinePointerInfo DstPtrInfo,
4262 MachinePointerInfo SrcPtrInfo) {
4263 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4265 // Check to see if we should lower the memmove to loads and stores first.
4266 // For cases within the target-specified limits, this is the best choice.
4267 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4269 // Memmove with size zero? Just return the original chain.
4270 if (ConstantSize->isNullValue())
4274 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4275 ConstantSize->getZExtValue(), Align, isVol,
4276 false, DstPtrInfo, SrcPtrInfo);
4277 if (Result.getNode())
4281 // Then check to see if we should lower the memmove with target-specific
4282 // code. If the target chooses to do this, this is the next best.
4283 SDValue Result = TSI->EmitTargetCodeForMemmove(
4284 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4285 if (Result.getNode())
4288 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4289 // not be safe. See memcpy above for more details.
4291 // Emit a library call.
4292 TargetLowering::ArgListTy Args;
4293 TargetLowering::ArgListEntry Entry;
4294 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4295 Entry.Node = Dst; Args.push_back(Entry);
4296 Entry.Node = Src; Args.push_back(Entry);
4297 Entry.Node = Size; Args.push_back(Entry);
4298 // FIXME: pass in SDLoc
4299 TargetLowering::CallLoweringInfo CLI(*this);
4300 CLI.setDebugLoc(dl).setChain(Chain)
4301 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4302 Type::getVoidTy(*getContext()),
4303 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4304 TLI->getPointerTy()), std::move(Args), 0)
4305 .setDiscardResult();
4306 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4308 return CallResult.second;
4311 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4312 SDValue Src, SDValue Size,
4313 unsigned Align, bool isVol,
4314 MachinePointerInfo DstPtrInfo) {
4315 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4317 // Check to see if we should lower the memset to stores first.
4318 // For cases within the target-specified limits, this is the best choice.
4319 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4321 // Memset with size zero? Just return the original chain.
4322 if (ConstantSize->isNullValue())
4326 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4327 Align, isVol, DstPtrInfo);
4329 if (Result.getNode())
4333 // Then check to see if we should lower the memset with target-specific
4334 // code. If the target chooses to do this, this is the next best.
4335 SDValue Result = TSI->EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src,
4336 Size, Align, isVol, DstPtrInfo);
4337 if (Result.getNode())
4340 // Emit a library call.
4341 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4342 TargetLowering::ArgListTy Args;
4343 TargetLowering::ArgListEntry Entry;
4344 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4345 Args.push_back(Entry);
4347 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4348 Args.push_back(Entry);
4350 Entry.Ty = IntPtrTy;
4351 Args.push_back(Entry);
4353 // FIXME: pass in SDLoc
4354 TargetLowering::CallLoweringInfo CLI(*this);
4355 CLI.setDebugLoc(dl).setChain(Chain)
4356 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4357 Type::getVoidTy(*getContext()),
4358 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4359 TLI->getPointerTy()), std::move(Args), 0)
4360 .setDiscardResult();
4362 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4363 return CallResult.second;
4366 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4367 SDVTList VTList, ArrayRef<SDValue> Ops,
4368 MachineMemOperand *MMO,
4369 AtomicOrdering SuccessOrdering,
4370 AtomicOrdering FailureOrdering,
4371 SynchronizationScope SynchScope) {
4372 FoldingSetNodeID ID;
4373 ID.AddInteger(MemVT.getRawBits());
4374 AddNodeIDNode(ID, Opcode, VTList, Ops);
4375 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4378 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4379 return SDValue(E, 0);
4382 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4383 // SDNode doesn't have access to it. This memory will be "leaked" when
4384 // the node is deallocated, but recovered when the allocator is released.
4385 // If the number of operands is less than 5 we use AtomicSDNode's internal
4387 unsigned NumOps = Ops.size();
4388 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4391 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4392 dl.getDebugLoc(), VTList, MemVT,
4393 Ops.data(), DynOps, NumOps, MMO,
4394 SuccessOrdering, FailureOrdering,
4396 CSEMap.InsertNode(N, IP);
4398 return SDValue(N, 0);
4401 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4402 SDVTList VTList, ArrayRef<SDValue> Ops,
4403 MachineMemOperand *MMO,
4404 AtomicOrdering Ordering,
4405 SynchronizationScope SynchScope) {
4406 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4407 Ordering, SynchScope);
4410 SDValue SelectionDAG::getAtomicCmpSwap(
4411 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4412 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4413 unsigned Alignment, AtomicOrdering SuccessOrdering,
4414 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4415 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4416 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4417 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4419 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4420 Alignment = getEVTAlignment(MemVT);
4422 MachineFunction &MF = getMachineFunction();
4424 // FIXME: Volatile isn't really correct; we should keep track of atomic
4425 // orderings in the memoperand.
4426 unsigned Flags = MachineMemOperand::MOVolatile;
4427 Flags |= MachineMemOperand::MOLoad;
4428 Flags |= MachineMemOperand::MOStore;
4430 MachineMemOperand *MMO =
4431 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4433 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4434 SuccessOrdering, FailureOrdering, SynchScope);
4437 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4438 SDVTList VTs, SDValue Chain, SDValue Ptr,
4439 SDValue Cmp, SDValue Swp,
4440 MachineMemOperand *MMO,
4441 AtomicOrdering SuccessOrdering,
4442 AtomicOrdering FailureOrdering,
4443 SynchronizationScope SynchScope) {
4444 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4445 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4446 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4448 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4449 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4450 SuccessOrdering, FailureOrdering, SynchScope);
4453 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4455 SDValue Ptr, SDValue Val,
4456 const Value* PtrVal,
4458 AtomicOrdering Ordering,
4459 SynchronizationScope SynchScope) {
4460 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4461 Alignment = getEVTAlignment(MemVT);
4463 MachineFunction &MF = getMachineFunction();
4464 // An atomic store does not load. An atomic load does not store.
4465 // (An atomicrmw obviously both loads and stores.)
4466 // For now, atomics are considered to be volatile always, and they are
4468 // FIXME: Volatile isn't really correct; we should keep track of atomic
4469 // orderings in the memoperand.
4470 unsigned Flags = MachineMemOperand::MOVolatile;
4471 if (Opcode != ISD::ATOMIC_STORE)
4472 Flags |= MachineMemOperand::MOLoad;
4473 if (Opcode != ISD::ATOMIC_LOAD)
4474 Flags |= MachineMemOperand::MOStore;
4476 MachineMemOperand *MMO =
4477 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4478 MemVT.getStoreSize(), Alignment);
4480 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4481 Ordering, SynchScope);
4484 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4486 SDValue Ptr, SDValue Val,
4487 MachineMemOperand *MMO,
4488 AtomicOrdering Ordering,
4489 SynchronizationScope SynchScope) {
4490 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4491 Opcode == ISD::ATOMIC_LOAD_SUB ||
4492 Opcode == ISD::ATOMIC_LOAD_AND ||
4493 Opcode == ISD::ATOMIC_LOAD_OR ||
4494 Opcode == ISD::ATOMIC_LOAD_XOR ||
4495 Opcode == ISD::ATOMIC_LOAD_NAND ||
4496 Opcode == ISD::ATOMIC_LOAD_MIN ||
4497 Opcode == ISD::ATOMIC_LOAD_MAX ||
4498 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4499 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4500 Opcode == ISD::ATOMIC_SWAP ||
4501 Opcode == ISD::ATOMIC_STORE) &&
4502 "Invalid Atomic Op");
4504 EVT VT = Val.getValueType();
4506 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4507 getVTList(VT, MVT::Other);
4508 SDValue Ops[] = {Chain, Ptr, Val};
4509 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4512 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4513 EVT VT, SDValue Chain,
4515 MachineMemOperand *MMO,
4516 AtomicOrdering Ordering,
4517 SynchronizationScope SynchScope) {
4518 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4520 SDVTList VTs = getVTList(VT, MVT::Other);
4521 SDValue Ops[] = {Chain, Ptr};
4522 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4525 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4526 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4527 if (Ops.size() == 1)
4530 SmallVector<EVT, 4> VTs;
4531 VTs.reserve(Ops.size());
4532 for (unsigned i = 0; i < Ops.size(); ++i)
4533 VTs.push_back(Ops[i].getValueType());
4534 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4538 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4539 ArrayRef<SDValue> Ops,
4540 EVT MemVT, MachinePointerInfo PtrInfo,
4541 unsigned Align, bool Vol,
4542 bool ReadMem, bool WriteMem, unsigned Size) {
4543 if (Align == 0) // Ensure that codegen never sees alignment 0
4544 Align = getEVTAlignment(MemVT);
4546 MachineFunction &MF = getMachineFunction();
4549 Flags |= MachineMemOperand::MOStore;
4551 Flags |= MachineMemOperand::MOLoad;
4553 Flags |= MachineMemOperand::MOVolatile;
4555 Size = MemVT.getStoreSize();
4556 MachineMemOperand *MMO =
4557 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4559 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4563 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4564 ArrayRef<SDValue> Ops, EVT MemVT,
4565 MachineMemOperand *MMO) {
4566 assert((Opcode == ISD::INTRINSIC_VOID ||
4567 Opcode == ISD::INTRINSIC_W_CHAIN ||
4568 Opcode == ISD::PREFETCH ||
4569 Opcode == ISD::LIFETIME_START ||
4570 Opcode == ISD::LIFETIME_END ||
4571 (Opcode <= INT_MAX &&
4572 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4573 "Opcode is not a memory-accessing opcode!");
4575 // Memoize the node unless it returns a flag.
4576 MemIntrinsicSDNode *N;
4577 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4578 FoldingSetNodeID ID;
4579 AddNodeIDNode(ID, Opcode, VTList, Ops);
4580 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4582 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4583 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4584 return SDValue(E, 0);
4587 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4588 dl.getDebugLoc(), VTList, Ops,
4590 CSEMap.InsertNode(N, IP);
4592 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4593 dl.getDebugLoc(), VTList, Ops,
4597 return SDValue(N, 0);
4600 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4601 /// MachinePointerInfo record from it. This is particularly useful because the
4602 /// code generator has many cases where it doesn't bother passing in a
4603 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4604 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4605 // If this is FI+Offset, we can model it.
4606 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4607 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4609 // If this is (FI+Offset1)+Offset2, we can model it.
4610 if (Ptr.getOpcode() != ISD::ADD ||
4611 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4612 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4613 return MachinePointerInfo();
4615 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4616 return MachinePointerInfo::getFixedStack(FI, Offset+
4617 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4620 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4621 /// MachinePointerInfo record from it. This is particularly useful because the
4622 /// code generator has many cases where it doesn't bother passing in a
4623 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4624 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4625 // If the 'Offset' value isn't a constant, we can't handle this.
4626 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4627 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4628 if (OffsetOp.getOpcode() == ISD::UNDEF)
4629 return InferPointerInfo(Ptr);
4630 return MachinePointerInfo();
4635 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4636 EVT VT, SDLoc dl, SDValue Chain,
4637 SDValue Ptr, SDValue Offset,
4638 MachinePointerInfo PtrInfo, EVT MemVT,
4639 bool isVolatile, bool isNonTemporal, bool isInvariant,
4640 unsigned Alignment, const AAMDNodes &AAInfo,
4641 const MDNode *Ranges) {
4642 assert(Chain.getValueType() == MVT::Other &&
4643 "Invalid chain type");
4644 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4645 Alignment = getEVTAlignment(VT);
4647 unsigned Flags = MachineMemOperand::MOLoad;
4649 Flags |= MachineMemOperand::MOVolatile;
4651 Flags |= MachineMemOperand::MONonTemporal;
4653 Flags |= MachineMemOperand::MOInvariant;
4655 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4657 if (PtrInfo.V.isNull())
4658 PtrInfo = InferPointerInfo(Ptr, Offset);
4660 MachineFunction &MF = getMachineFunction();
4661 MachineMemOperand *MMO =
4662 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4664 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4668 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4669 EVT VT, SDLoc dl, SDValue Chain,
4670 SDValue Ptr, SDValue Offset, EVT MemVT,
4671 MachineMemOperand *MMO) {
4673 ExtType = ISD::NON_EXTLOAD;
4674 } else if (ExtType == ISD::NON_EXTLOAD) {
4675 assert(VT == MemVT && "Non-extending load from different memory type!");
4678 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4679 "Should only be an extending load, not truncating!");
4680 assert(VT.isInteger() == MemVT.isInteger() &&
4681 "Cannot convert from FP to Int or Int -> FP!");
4682 assert(VT.isVector() == MemVT.isVector() &&
4683 "Cannot use trunc store to convert to or from a vector!");
4684 assert((!VT.isVector() ||
4685 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4686 "Cannot use trunc store to change the number of vector elements!");
4689 bool Indexed = AM != ISD::UNINDEXED;
4690 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4691 "Unindexed load with an offset!");
4693 SDVTList VTs = Indexed ?
4694 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4695 SDValue Ops[] = { Chain, Ptr, Offset };
4696 FoldingSetNodeID ID;
4697 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4698 ID.AddInteger(MemVT.getRawBits());
4699 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4700 MMO->isNonTemporal(),
4701 MMO->isInvariant()));
4702 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4704 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4705 cast<LoadSDNode>(E)->refineAlignment(MMO);
4706 return SDValue(E, 0);
4708 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4709 dl.getDebugLoc(), VTs, AM, ExtType,
4711 CSEMap.InsertNode(N, IP);
4713 return SDValue(N, 0);
4716 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4717 SDValue Chain, SDValue Ptr,
4718 MachinePointerInfo PtrInfo,
4719 bool isVolatile, bool isNonTemporal,
4720 bool isInvariant, unsigned Alignment,
4721 const AAMDNodes &AAInfo,
4722 const MDNode *Ranges) {
4723 SDValue Undef = getUNDEF(Ptr.getValueType());
4724 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4725 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4729 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4730 SDValue Chain, SDValue Ptr,
4731 MachineMemOperand *MMO) {
4732 SDValue Undef = getUNDEF(Ptr.getValueType());
4733 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4737 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4738 SDValue Chain, SDValue Ptr,
4739 MachinePointerInfo PtrInfo, EVT MemVT,
4740 bool isVolatile, bool isNonTemporal,
4741 bool isInvariant, unsigned Alignment,
4742 const AAMDNodes &AAInfo) {
4743 SDValue Undef = getUNDEF(Ptr.getValueType());
4744 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4745 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4750 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4751 SDValue Chain, SDValue Ptr, EVT MemVT,
4752 MachineMemOperand *MMO) {
4753 SDValue Undef = getUNDEF(Ptr.getValueType());
4754 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4759 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4760 SDValue Offset, ISD::MemIndexedMode AM) {
4761 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4762 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4763 "Load is already a indexed load!");
4764 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4765 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4766 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4767 false, LD->getAlignment());
4770 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4771 SDValue Ptr, MachinePointerInfo PtrInfo,
4772 bool isVolatile, bool isNonTemporal,
4773 unsigned Alignment, const AAMDNodes &AAInfo) {
4774 assert(Chain.getValueType() == MVT::Other &&
4775 "Invalid chain type");
4776 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4777 Alignment = getEVTAlignment(Val.getValueType());
4779 unsigned Flags = MachineMemOperand::MOStore;
4781 Flags |= MachineMemOperand::MOVolatile;
4783 Flags |= MachineMemOperand::MONonTemporal;
4785 if (PtrInfo.V.isNull())
4786 PtrInfo = InferPointerInfo(Ptr);
4788 MachineFunction &MF = getMachineFunction();
4789 MachineMemOperand *MMO =
4790 MF.getMachineMemOperand(PtrInfo, Flags,
4791 Val.getValueType().getStoreSize(), Alignment,
4794 return getStore(Chain, dl, Val, Ptr, MMO);
4797 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4798 SDValue Ptr, MachineMemOperand *MMO) {
4799 assert(Chain.getValueType() == MVT::Other &&
4800 "Invalid chain type");
4801 EVT VT = Val.getValueType();
4802 SDVTList VTs = getVTList(MVT::Other);
4803 SDValue Undef = getUNDEF(Ptr.getValueType());
4804 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4805 FoldingSetNodeID ID;
4806 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4807 ID.AddInteger(VT.getRawBits());
4808 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4809 MMO->isNonTemporal(), MMO->isInvariant()));
4810 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4812 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4813 cast<StoreSDNode>(E)->refineAlignment(MMO);
4814 return SDValue(E, 0);
4816 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4817 dl.getDebugLoc(), VTs,
4818 ISD::UNINDEXED, false, VT, MMO);
4819 CSEMap.InsertNode(N, IP);
4821 return SDValue(N, 0);
4824 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4825 SDValue Ptr, MachinePointerInfo PtrInfo,
4826 EVT SVT,bool isVolatile, bool isNonTemporal,
4828 const AAMDNodes &AAInfo) {
4829 assert(Chain.getValueType() == MVT::Other &&
4830 "Invalid chain type");
4831 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4832 Alignment = getEVTAlignment(SVT);
4834 unsigned Flags = MachineMemOperand::MOStore;
4836 Flags |= MachineMemOperand::MOVolatile;
4838 Flags |= MachineMemOperand::MONonTemporal;
4840 if (PtrInfo.V.isNull())
4841 PtrInfo = InferPointerInfo(Ptr);
4843 MachineFunction &MF = getMachineFunction();
4844 MachineMemOperand *MMO =
4845 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4848 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4851 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4852 SDValue Ptr, EVT SVT,
4853 MachineMemOperand *MMO) {
4854 EVT VT = Val.getValueType();
4856 assert(Chain.getValueType() == MVT::Other &&
4857 "Invalid chain type");
4859 return getStore(Chain, dl, Val, Ptr, MMO);
4861 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4862 "Should only be a truncating store, not extending!");
4863 assert(VT.isInteger() == SVT.isInteger() &&
4864 "Can't do FP-INT conversion!");
4865 assert(VT.isVector() == SVT.isVector() &&
4866 "Cannot use trunc store to convert to or from a vector!");
4867 assert((!VT.isVector() ||
4868 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4869 "Cannot use trunc store to change the number of vector elements!");
4871 SDVTList VTs = getVTList(MVT::Other);
4872 SDValue Undef = getUNDEF(Ptr.getValueType());
4873 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4874 FoldingSetNodeID ID;
4875 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4876 ID.AddInteger(SVT.getRawBits());
4877 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4878 MMO->isNonTemporal(), MMO->isInvariant()));
4879 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4882 cast<StoreSDNode>(E)->refineAlignment(MMO);
4883 return SDValue(E, 0);
4885 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4886 dl.getDebugLoc(), VTs,
4887 ISD::UNINDEXED, true, SVT, MMO);
4888 CSEMap.InsertNode(N, IP);
4890 return SDValue(N, 0);
4894 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4895 SDValue Offset, ISD::MemIndexedMode AM) {
4896 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4897 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4898 "Store is already a indexed store!");
4899 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4900 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4901 FoldingSetNodeID ID;
4902 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4903 ID.AddInteger(ST->getMemoryVT().getRawBits());
4904 ID.AddInteger(ST->getRawSubclassData());
4905 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4907 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4908 return SDValue(E, 0);
4910 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4911 dl.getDebugLoc(), VTs, AM,
4912 ST->isTruncatingStore(),
4914 ST->getMemOperand());
4915 CSEMap.InsertNode(N, IP);
4917 return SDValue(N, 0);
4920 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
4921 SDValue Chain, SDValue Ptr,
4924 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4925 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
4928 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4929 ArrayRef<SDUse> Ops) {
4930 switch (Ops.size()) {
4931 case 0: return getNode(Opcode, DL, VT);
4932 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
4933 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4934 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4938 // Copy from an SDUse array into an SDValue array for use with
4939 // the regular getNode logic.
4940 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
4941 return getNode(Opcode, DL, VT, NewOps);
4944 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4945 ArrayRef<SDValue> Ops) {
4946 unsigned NumOps = Ops.size();
4948 case 0: return getNode(Opcode, DL, VT);
4949 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4950 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4951 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4957 case ISD::SELECT_CC: {
4958 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4959 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4960 "LHS and RHS of condition must have same type!");
4961 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4962 "True and False arms of SelectCC must have same type!");
4963 assert(Ops[2].getValueType() == VT &&
4964 "select_cc node must be of same type as true and false value!");
4968 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4969 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4970 "LHS/RHS of comparison should match types!");
4977 SDVTList VTs = getVTList(VT);
4979 if (VT != MVT::Glue) {
4980 FoldingSetNodeID ID;
4981 AddNodeIDNode(ID, Opcode, VTs, Ops);
4984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4985 return SDValue(E, 0);
4987 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4989 CSEMap.InsertNode(N, IP);
4991 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4996 return SDValue(N, 0);
4999 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5000 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5001 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5004 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5005 ArrayRef<SDValue> Ops) {
5006 if (VTList.NumVTs == 1)
5007 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5011 // FIXME: figure out how to safely handle things like
5012 // int foo(int x) { return 1 << (x & 255); }
5013 // int bar() { return foo(256); }
5014 case ISD::SRA_PARTS:
5015 case ISD::SRL_PARTS:
5016 case ISD::SHL_PARTS:
5017 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5018 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5019 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5020 else if (N3.getOpcode() == ISD::AND)
5021 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5022 // If the and is only masking out bits that cannot effect the shift,
5023 // eliminate the and.
5024 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5025 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5026 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5032 // Memoize the node unless it returns a flag.
5034 unsigned NumOps = Ops.size();
5035 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5036 FoldingSetNodeID ID;
5037 AddNodeIDNode(ID, Opcode, VTList, Ops);
5039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5040 return SDValue(E, 0);
5043 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5044 DL.getDebugLoc(), VTList, Ops[0]);
5045 } else if (NumOps == 2) {
5046 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5047 DL.getDebugLoc(), VTList, Ops[0],
5049 } else if (NumOps == 3) {
5050 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5051 DL.getDebugLoc(), VTList, Ops[0],
5054 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5057 CSEMap.InsertNode(N, IP);
5060 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5061 DL.getDebugLoc(), VTList, Ops[0]);
5062 } else if (NumOps == 2) {
5063 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5064 DL.getDebugLoc(), VTList, Ops[0],
5066 } else if (NumOps == 3) {
5067 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5068 DL.getDebugLoc(), VTList, Ops[0],
5071 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5076 return SDValue(N, 0);
5079 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5080 return getNode(Opcode, DL, VTList, None);
5083 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5085 SDValue Ops[] = { N1 };
5086 return getNode(Opcode, DL, VTList, Ops);
5089 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5090 SDValue N1, SDValue N2) {
5091 SDValue Ops[] = { N1, N2 };
5092 return getNode(Opcode, DL, VTList, Ops);
5095 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5096 SDValue N1, SDValue N2, SDValue N3) {
5097 SDValue Ops[] = { N1, N2, N3 };
5098 return getNode(Opcode, DL, VTList, Ops);
5101 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5102 SDValue N1, SDValue N2, SDValue N3,
5104 SDValue Ops[] = { N1, N2, N3, N4 };
5105 return getNode(Opcode, DL, VTList, Ops);
5108 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5109 SDValue N1, SDValue N2, SDValue N3,
5110 SDValue N4, SDValue N5) {
5111 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5112 return getNode(Opcode, DL, VTList, Ops);
5115 SDVTList SelectionDAG::getVTList(EVT VT) {
5116 return makeVTList(SDNode::getValueTypeList(VT), 1);
5119 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5120 FoldingSetNodeID ID;
5122 ID.AddInteger(VT1.getRawBits());
5123 ID.AddInteger(VT2.getRawBits());
5126 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5128 EVT *Array = Allocator.Allocate<EVT>(2);
5131 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5132 VTListMap.InsertNode(Result, IP);
5134 return Result->getSDVTList();
5137 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5138 FoldingSetNodeID ID;
5140 ID.AddInteger(VT1.getRawBits());
5141 ID.AddInteger(VT2.getRawBits());
5142 ID.AddInteger(VT3.getRawBits());
5145 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5147 EVT *Array = Allocator.Allocate<EVT>(3);
5151 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5152 VTListMap.InsertNode(Result, IP);
5154 return Result->getSDVTList();
5157 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5158 FoldingSetNodeID ID;
5160 ID.AddInteger(VT1.getRawBits());
5161 ID.AddInteger(VT2.getRawBits());
5162 ID.AddInteger(VT3.getRawBits());
5163 ID.AddInteger(VT4.getRawBits());
5166 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5168 EVT *Array = Allocator.Allocate<EVT>(4);
5173 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5174 VTListMap.InsertNode(Result, IP);
5176 return Result->getSDVTList();
5179 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5180 unsigned NumVTs = VTs.size();
5181 FoldingSetNodeID ID;
5182 ID.AddInteger(NumVTs);
5183 for (unsigned index = 0; index < NumVTs; index++) {
5184 ID.AddInteger(VTs[index].getRawBits());
5188 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5190 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5191 std::copy(VTs.begin(), VTs.end(), Array);
5192 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5193 VTListMap.InsertNode(Result, IP);
5195 return Result->getSDVTList();
5199 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5200 /// specified operands. If the resultant node already exists in the DAG,
5201 /// this does not modify the specified node, instead it returns the node that
5202 /// already exists. If the resultant node does not exist in the DAG, the
5203 /// input node is returned. As a degenerate case, if you specify the same
5204 /// input operands as the node already has, the input node is returned.
5205 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5206 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5208 // Check to see if there is no change.
5209 if (Op == N->getOperand(0)) return N;
5211 // See if the modified node already exists.
5212 void *InsertPos = nullptr;
5213 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5216 // Nope it doesn't. Remove the node from its current place in the maps.
5218 if (!RemoveNodeFromCSEMaps(N))
5219 InsertPos = nullptr;
5221 // Now we update the operands.
5222 N->OperandList[0].set(Op);
5224 // If this gets put into a CSE map, add it.
5225 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5229 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5230 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5232 // Check to see if there is no change.
5233 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5234 return N; // No operands changed, just return the input node.
5236 // See if the modified node already exists.
5237 void *InsertPos = nullptr;
5238 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5241 // Nope it doesn't. Remove the node from its current place in the maps.
5243 if (!RemoveNodeFromCSEMaps(N))
5244 InsertPos = nullptr;
5246 // Now we update the operands.
5247 if (N->OperandList[0] != Op1)
5248 N->OperandList[0].set(Op1);
5249 if (N->OperandList[1] != Op2)
5250 N->OperandList[1].set(Op2);
5252 // If this gets put into a CSE map, add it.
5253 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5257 SDNode *SelectionDAG::
5258 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5259 SDValue Ops[] = { Op1, Op2, Op3 };
5260 return UpdateNodeOperands(N, Ops);
5263 SDNode *SelectionDAG::
5264 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5265 SDValue Op3, SDValue Op4) {
5266 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5267 return UpdateNodeOperands(N, Ops);
5270 SDNode *SelectionDAG::
5271 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5272 SDValue Op3, SDValue Op4, SDValue Op5) {
5273 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5274 return UpdateNodeOperands(N, Ops);
5277 SDNode *SelectionDAG::
5278 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5279 unsigned NumOps = Ops.size();
5280 assert(N->getNumOperands() == NumOps &&
5281 "Update with wrong number of operands");
5283 // Check to see if there is no change.
5284 bool AnyChange = false;
5285 for (unsigned i = 0; i != NumOps; ++i) {
5286 if (Ops[i] != N->getOperand(i)) {
5292 // No operands changed, just return the input node.
5293 if (!AnyChange) return N;
5295 // See if the modified node already exists.
5296 void *InsertPos = nullptr;
5297 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5300 // Nope it doesn't. Remove the node from its current place in the maps.
5302 if (!RemoveNodeFromCSEMaps(N))
5303 InsertPos = nullptr;
5305 // Now we update the operands.
5306 for (unsigned i = 0; i != NumOps; ++i)
5307 if (N->OperandList[i] != Ops[i])
5308 N->OperandList[i].set(Ops[i]);
5310 // If this gets put into a CSE map, add it.
5311 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5315 /// DropOperands - Release the operands and set this node to have
5317 void SDNode::DropOperands() {
5318 // Unlike the code in MorphNodeTo that does this, we don't need to
5319 // watch for dead nodes here.
5320 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5326 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5329 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5331 SDVTList VTs = getVTList(VT);
5332 return SelectNodeTo(N, MachineOpc, VTs, None);
5335 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5336 EVT VT, SDValue Op1) {
5337 SDVTList VTs = getVTList(VT);
5338 SDValue Ops[] = { Op1 };
5339 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5342 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5343 EVT VT, SDValue Op1,
5345 SDVTList VTs = getVTList(VT);
5346 SDValue Ops[] = { Op1, Op2 };
5347 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5350 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5351 EVT VT, SDValue Op1,
5352 SDValue Op2, SDValue Op3) {
5353 SDVTList VTs = getVTList(VT);
5354 SDValue Ops[] = { Op1, Op2, Op3 };
5355 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5358 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5359 EVT VT, ArrayRef<SDValue> Ops) {
5360 SDVTList VTs = getVTList(VT);
5361 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5364 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5365 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5366 SDVTList VTs = getVTList(VT1, VT2);
5367 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5370 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5372 SDVTList VTs = getVTList(VT1, VT2);
5373 return SelectNodeTo(N, MachineOpc, VTs, None);
5376 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5377 EVT VT1, EVT VT2, EVT VT3,
5378 ArrayRef<SDValue> Ops) {
5379 SDVTList VTs = getVTList(VT1, VT2, VT3);
5380 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5383 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5384 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5385 ArrayRef<SDValue> Ops) {
5386 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5387 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5390 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5393 SDVTList VTs = getVTList(VT1, VT2);
5394 SDValue Ops[] = { Op1 };
5395 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5398 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5400 SDValue Op1, SDValue Op2) {
5401 SDVTList VTs = getVTList(VT1, VT2);
5402 SDValue Ops[] = { Op1, Op2 };
5403 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5406 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5408 SDValue Op1, SDValue Op2,
5410 SDVTList VTs = getVTList(VT1, VT2);
5411 SDValue Ops[] = { Op1, Op2, Op3 };
5412 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5415 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5416 EVT VT1, EVT VT2, EVT VT3,
5417 SDValue Op1, SDValue Op2,
5419 SDVTList VTs = getVTList(VT1, VT2, VT3);
5420 SDValue Ops[] = { Op1, Op2, Op3 };
5421 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5424 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5425 SDVTList VTs,ArrayRef<SDValue> Ops) {
5426 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5427 // Reset the NodeID to -1.
5432 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5433 /// the line number information on the merged node since it is not possible to
5434 /// preserve the information that operation is associated with multiple lines.
5435 /// This will make the debugger working better at -O0, were there is a higher
5436 /// probability having other instructions associated with that line.
5438 /// For IROrder, we keep the smaller of the two
5439 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5440 DebugLoc NLoc = N->getDebugLoc();
5441 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5442 (OLoc.getDebugLoc() != NLoc)) {
5443 N->setDebugLoc(DebugLoc());
5445 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5446 N->setIROrder(Order);
5450 /// MorphNodeTo - This *mutates* the specified node to have the specified
5451 /// return type, opcode, and operands.
5453 /// Note that MorphNodeTo returns the resultant node. If there is already a
5454 /// node of the specified opcode and operands, it returns that node instead of
5455 /// the current one. Note that the SDLoc need not be the same.
5457 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5458 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5459 /// node, and because it doesn't require CSE recalculation for any of
5460 /// the node's users.
5462 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5463 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5464 /// the legalizer which maintain worklists that would need to be updated when
5465 /// deleting things.
5466 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5467 SDVTList VTs, ArrayRef<SDValue> Ops) {
5468 unsigned NumOps = Ops.size();
5469 // If an identical node already exists, use it.
5471 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5472 FoldingSetNodeID ID;
5473 AddNodeIDNode(ID, Opc, VTs, Ops);
5474 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5475 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5478 if (!RemoveNodeFromCSEMaps(N))
5481 // Start the morphing.
5483 N->ValueList = VTs.VTs;
5484 N->NumValues = VTs.NumVTs;
5486 // Clear the operands list, updating used nodes to remove this from their
5487 // use list. Keep track of any operands that become dead as a result.
5488 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5489 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5491 SDNode *Used = Use.getNode();
5493 if (Used->use_empty())
5494 DeadNodeSet.insert(Used);
5497 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5498 // Initialize the memory references information.
5499 MN->setMemRefs(nullptr, nullptr);
5500 // If NumOps is larger than the # of operands we can have in a
5501 // MachineSDNode, reallocate the operand list.
5502 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5503 if (MN->OperandsNeedDelete)
5504 delete[] MN->OperandList;
5505 if (NumOps > array_lengthof(MN->LocalOperands))
5506 // We're creating a final node that will live unmorphed for the
5507 // remainder of the current SelectionDAG iteration, so we can allocate
5508 // the operands directly out of a pool with no recycling metadata.
5509 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5510 Ops.data(), NumOps);
5512 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5513 MN->OperandsNeedDelete = false;
5515 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5517 // If NumOps is larger than the # of operands we currently have, reallocate
5518 // the operand list.
5519 if (NumOps > N->NumOperands) {
5520 if (N->OperandsNeedDelete)
5521 delete[] N->OperandList;
5522 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5523 N->OperandsNeedDelete = true;
5525 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5528 // Delete any nodes that are still dead after adding the uses for the
5530 if (!DeadNodeSet.empty()) {
5531 SmallVector<SDNode *, 16> DeadNodes;
5532 for (SDNode *N : DeadNodeSet)
5534 DeadNodes.push_back(N);
5535 RemoveDeadNodes(DeadNodes);
5539 CSEMap.InsertNode(N, IP); // Memoize the new node.
5544 /// getMachineNode - These are used for target selectors to create a new node
5545 /// with specified return type(s), MachineInstr opcode, and operands.
5547 /// Note that getMachineNode returns the resultant node. If there is already a
5548 /// node of the specified opcode and operands, it returns that node instead of
5549 /// the current one.
5551 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5552 SDVTList VTs = getVTList(VT);
5553 return getMachineNode(Opcode, dl, VTs, None);
5557 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5558 SDVTList VTs = getVTList(VT);
5559 SDValue Ops[] = { Op1 };
5560 return getMachineNode(Opcode, dl, VTs, Ops);
5564 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5565 SDValue Op1, SDValue Op2) {
5566 SDVTList VTs = getVTList(VT);
5567 SDValue Ops[] = { Op1, Op2 };
5568 return getMachineNode(Opcode, dl, VTs, Ops);
5572 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5573 SDValue Op1, SDValue Op2, SDValue Op3) {
5574 SDVTList VTs = getVTList(VT);
5575 SDValue Ops[] = { Op1, Op2, Op3 };
5576 return getMachineNode(Opcode, dl, VTs, Ops);
5580 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5581 ArrayRef<SDValue> Ops) {
5582 SDVTList VTs = getVTList(VT);
5583 return getMachineNode(Opcode, dl, VTs, Ops);
5587 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5588 SDVTList VTs = getVTList(VT1, VT2);
5589 return getMachineNode(Opcode, dl, VTs, None);
5593 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5594 EVT VT1, EVT VT2, SDValue Op1) {
5595 SDVTList VTs = getVTList(VT1, VT2);
5596 SDValue Ops[] = { Op1 };
5597 return getMachineNode(Opcode, dl, VTs, Ops);
5601 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5602 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5603 SDVTList VTs = getVTList(VT1, VT2);
5604 SDValue Ops[] = { Op1, Op2 };
5605 return getMachineNode(Opcode, dl, VTs, Ops);
5609 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5610 EVT VT1, EVT VT2, SDValue Op1,
5611 SDValue Op2, SDValue Op3) {
5612 SDVTList VTs = getVTList(VT1, VT2);
5613 SDValue Ops[] = { Op1, Op2, Op3 };
5614 return getMachineNode(Opcode, dl, VTs, Ops);
5618 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5620 ArrayRef<SDValue> Ops) {
5621 SDVTList VTs = getVTList(VT1, VT2);
5622 return getMachineNode(Opcode, dl, VTs, Ops);
5626 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5627 EVT VT1, EVT VT2, EVT VT3,
5628 SDValue Op1, SDValue Op2) {
5629 SDVTList VTs = getVTList(VT1, VT2, VT3);
5630 SDValue Ops[] = { Op1, Op2 };
5631 return getMachineNode(Opcode, dl, VTs, Ops);
5635 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5636 EVT VT1, EVT VT2, EVT VT3,
5637 SDValue Op1, SDValue Op2, SDValue Op3) {
5638 SDVTList VTs = getVTList(VT1, VT2, VT3);
5639 SDValue Ops[] = { Op1, Op2, Op3 };
5640 return getMachineNode(Opcode, dl, VTs, Ops);
5644 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5645 EVT VT1, EVT VT2, EVT VT3,
5646 ArrayRef<SDValue> Ops) {
5647 SDVTList VTs = getVTList(VT1, VT2, VT3);
5648 return getMachineNode(Opcode, dl, VTs, Ops);
5652 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5653 EVT VT2, EVT VT3, EVT VT4,
5654 ArrayRef<SDValue> Ops) {
5655 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5656 return getMachineNode(Opcode, dl, VTs, Ops);
5660 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5661 ArrayRef<EVT> ResultTys,
5662 ArrayRef<SDValue> Ops) {
5663 SDVTList VTs = getVTList(ResultTys);
5664 return getMachineNode(Opcode, dl, VTs, Ops);
5668 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5669 ArrayRef<SDValue> OpsArray) {
5670 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5673 const SDValue *Ops = OpsArray.data();
5674 unsigned NumOps = OpsArray.size();
5677 FoldingSetNodeID ID;
5678 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5680 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5681 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5685 // Allocate a new MachineSDNode.
5686 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5687 DL.getDebugLoc(), VTs);
5689 // Initialize the operands list.
5690 if (NumOps > array_lengthof(N->LocalOperands))
5691 // We're creating a final node that will live unmorphed for the
5692 // remainder of the current SelectionDAG iteration, so we can allocate
5693 // the operands directly out of a pool with no recycling metadata.
5694 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5697 N->InitOperands(N->LocalOperands, Ops, NumOps);
5698 N->OperandsNeedDelete = false;
5701 CSEMap.InsertNode(N, IP);
5707 /// getTargetExtractSubreg - A convenience function for creating
5708 /// TargetOpcode::EXTRACT_SUBREG nodes.
5710 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5712 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5713 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5714 VT, Operand, SRIdxVal);
5715 return SDValue(Subreg, 0);
5718 /// getTargetInsertSubreg - A convenience function for creating
5719 /// TargetOpcode::INSERT_SUBREG nodes.
5721 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5722 SDValue Operand, SDValue Subreg) {
5723 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5724 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5725 VT, Operand, Subreg, SRIdxVal);
5726 return SDValue(Result, 0);
5729 /// getNodeIfExists - Get the specified node if it's already available, or
5730 /// else return NULL.
5731 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5732 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5734 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5735 FoldingSetNodeID ID;
5736 AddNodeIDNode(ID, Opcode, VTList, Ops);
5737 if (isBinOpWithFlags(Opcode))
5738 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5740 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5746 /// getDbgValue - Creates a SDDbgValue node.
5749 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5750 unsigned R, bool IsIndirect, uint64_t Off,
5751 DebugLoc DL, unsigned O) {
5752 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5756 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5757 const Value *C, uint64_t Off,
5758 DebugLoc DL, unsigned O) {
5759 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5763 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5764 unsigned FI, uint64_t Off,
5765 DebugLoc DL, unsigned O) {
5766 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5771 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5772 /// pointed to by a use iterator is deleted, increment the use iterator
5773 /// so that it doesn't dangle.
5775 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5776 SDNode::use_iterator &UI;
5777 SDNode::use_iterator &UE;
5779 void NodeDeleted(SDNode *N, SDNode *E) override {
5780 // Increment the iterator as needed.
5781 while (UI != UE && N == *UI)
5786 RAUWUpdateListener(SelectionDAG &d,
5787 SDNode::use_iterator &ui,
5788 SDNode::use_iterator &ue)
5789 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5794 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5795 /// This can cause recursive merging of nodes in the DAG.
5797 /// This version assumes From has a single result value.
5799 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5800 SDNode *From = FromN.getNode();
5801 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5802 "Cannot replace with this method!");
5803 assert(From != To.getNode() && "Cannot replace uses of with self");
5805 // Iterate over all the existing uses of From. New uses will be added
5806 // to the beginning of the use list, which we avoid visiting.
5807 // This specifically avoids visiting uses of From that arise while the
5808 // replacement is happening, because any such uses would be the result
5809 // of CSE: If an existing node looks like From after one of its operands
5810 // is replaced by To, we don't want to replace of all its users with To
5811 // too. See PR3018 for more info.
5812 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5813 RAUWUpdateListener Listener(*this, UI, UE);
5817 // This node is about to morph, remove its old self from the CSE maps.
5818 RemoveNodeFromCSEMaps(User);
5820 // A user can appear in a use list multiple times, and when this
5821 // happens the uses are usually next to each other in the list.
5822 // To help reduce the number of CSE recomputations, process all
5823 // the uses of this user that we can find this way.
5825 SDUse &Use = UI.getUse();
5828 } while (UI != UE && *UI == User);
5830 // Now that we have modified User, add it back to the CSE maps. If it
5831 // already exists there, recursively merge the results together.
5832 AddModifiedNodeToCSEMaps(User);
5835 // If we just RAUW'd the root, take note.
5836 if (FromN == getRoot())
5840 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5841 /// This can cause recursive merging of nodes in the DAG.
5843 /// This version assumes that for each value of From, there is a
5844 /// corresponding value in To in the same position with the same type.
5846 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5848 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5849 assert((!From->hasAnyUseOfValue(i) ||
5850 From->getValueType(i) == To->getValueType(i)) &&
5851 "Cannot use this version of ReplaceAllUsesWith!");
5854 // Handle the trivial case.
5858 // Iterate over just the existing users of From. See the comments in
5859 // the ReplaceAllUsesWith above.
5860 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5861 RAUWUpdateListener Listener(*this, UI, UE);
5865 // This node is about to morph, remove its old self from the CSE maps.
5866 RemoveNodeFromCSEMaps(User);
5868 // A user can appear in a use list multiple times, and when this
5869 // happens the uses are usually next to each other in the list.
5870 // To help reduce the number of CSE recomputations, process all
5871 // the uses of this user that we can find this way.
5873 SDUse &Use = UI.getUse();
5876 } while (UI != UE && *UI == User);
5878 // Now that we have modified User, add it back to the CSE maps. If it
5879 // already exists there, recursively merge the results together.
5880 AddModifiedNodeToCSEMaps(User);
5883 // If we just RAUW'd the root, take note.
5884 if (From == getRoot().getNode())
5885 setRoot(SDValue(To, getRoot().getResNo()));
5888 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5889 /// This can cause recursive merging of nodes in the DAG.
5891 /// This version can replace From with any result values. To must match the
5892 /// number and types of values returned by From.
5893 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5894 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5895 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5897 // Iterate over just the existing users of From. See the comments in
5898 // the ReplaceAllUsesWith above.
5899 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5900 RAUWUpdateListener Listener(*this, UI, UE);
5904 // This node is about to morph, remove its old self from the CSE maps.
5905 RemoveNodeFromCSEMaps(User);
5907 // A user can appear in a use list multiple times, and when this
5908 // happens the uses are usually next to each other in the list.
5909 // To help reduce the number of CSE recomputations, process all
5910 // the uses of this user that we can find this way.
5912 SDUse &Use = UI.getUse();
5913 const SDValue &ToOp = To[Use.getResNo()];
5916 } while (UI != UE && *UI == User);
5918 // Now that we have modified User, add it back to the CSE maps. If it
5919 // already exists there, recursively merge the results together.
5920 AddModifiedNodeToCSEMaps(User);
5923 // If we just RAUW'd the root, take note.
5924 if (From == getRoot().getNode())
5925 setRoot(SDValue(To[getRoot().getResNo()]));
5928 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5929 /// uses of other values produced by From.getNode() alone. The Deleted
5930 /// vector is handled the same way as for ReplaceAllUsesWith.
5931 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5932 // Handle the really simple, really trivial case efficiently.
5933 if (From == To) return;
5935 // Handle the simple, trivial, case efficiently.
5936 if (From.getNode()->getNumValues() == 1) {
5937 ReplaceAllUsesWith(From, To);
5941 // Iterate over just the existing users of From. See the comments in
5942 // the ReplaceAllUsesWith above.
5943 SDNode::use_iterator UI = From.getNode()->use_begin(),
5944 UE = From.getNode()->use_end();
5945 RAUWUpdateListener Listener(*this, UI, UE);
5948 bool UserRemovedFromCSEMaps = false;
5950 // A user can appear in a use list multiple times, and when this
5951 // happens the uses are usually next to each other in the list.
5952 // To help reduce the number of CSE recomputations, process all
5953 // the uses of this user that we can find this way.
5955 SDUse &Use = UI.getUse();
5957 // Skip uses of different values from the same node.
5958 if (Use.getResNo() != From.getResNo()) {
5963 // If this node hasn't been modified yet, it's still in the CSE maps,
5964 // so remove its old self from the CSE maps.
5965 if (!UserRemovedFromCSEMaps) {
5966 RemoveNodeFromCSEMaps(User);
5967 UserRemovedFromCSEMaps = true;
5972 } while (UI != UE && *UI == User);
5974 // We are iterating over all uses of the From node, so if a use
5975 // doesn't use the specific value, no changes are made.
5976 if (!UserRemovedFromCSEMaps)
5979 // Now that we have modified User, add it back to the CSE maps. If it
5980 // already exists there, recursively merge the results together.
5981 AddModifiedNodeToCSEMaps(User);
5984 // If we just RAUW'd the root, take note.
5985 if (From == getRoot())
5990 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5991 /// to record information about a use.
5998 /// operator< - Sort Memos by User.
5999 bool operator<(const UseMemo &L, const UseMemo &R) {
6000 return (intptr_t)L.User < (intptr_t)R.User;
6004 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6005 /// uses of other values produced by From.getNode() alone. The same value
6006 /// may appear in both the From and To list. The Deleted vector is
6007 /// handled the same way as for ReplaceAllUsesWith.
6008 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6011 // Handle the simple, trivial case efficiently.
6013 return ReplaceAllUsesOfValueWith(*From, *To);
6015 // Read up all the uses and make records of them. This helps
6016 // processing new uses that are introduced during the
6017 // replacement process.
6018 SmallVector<UseMemo, 4> Uses;
6019 for (unsigned i = 0; i != Num; ++i) {
6020 unsigned FromResNo = From[i].getResNo();
6021 SDNode *FromNode = From[i].getNode();
6022 for (SDNode::use_iterator UI = FromNode->use_begin(),
6023 E = FromNode->use_end(); UI != E; ++UI) {
6024 SDUse &Use = UI.getUse();
6025 if (Use.getResNo() == FromResNo) {
6026 UseMemo Memo = { *UI, i, &Use };
6027 Uses.push_back(Memo);
6032 // Sort the uses, so that all the uses from a given User are together.
6033 std::sort(Uses.begin(), Uses.end());
6035 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6036 UseIndex != UseIndexEnd; ) {
6037 // We know that this user uses some value of From. If it is the right
6038 // value, update it.
6039 SDNode *User = Uses[UseIndex].User;
6041 // This node is about to morph, remove its old self from the CSE maps.
6042 RemoveNodeFromCSEMaps(User);
6044 // The Uses array is sorted, so all the uses for a given User
6045 // are next to each other in the list.
6046 // To help reduce the number of CSE recomputations, process all
6047 // the uses of this user that we can find this way.
6049 unsigned i = Uses[UseIndex].Index;
6050 SDUse &Use = *Uses[UseIndex].Use;
6054 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6056 // Now that we have modified User, add it back to the CSE maps. If it
6057 // already exists there, recursively merge the results together.
6058 AddModifiedNodeToCSEMaps(User);
6062 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6063 /// based on their topological order. It returns the maximum id and a vector
6064 /// of the SDNodes* in assigned order by reference.
6065 unsigned SelectionDAG::AssignTopologicalOrder() {
6067 unsigned DAGSize = 0;
6069 // SortedPos tracks the progress of the algorithm. Nodes before it are
6070 // sorted, nodes after it are unsorted. When the algorithm completes
6071 // it is at the end of the list.
6072 allnodes_iterator SortedPos = allnodes_begin();
6074 // Visit all the nodes. Move nodes with no operands to the front of
6075 // the list immediately. Annotate nodes that do have operands with their
6076 // operand count. Before we do this, the Node Id fields of the nodes
6077 // may contain arbitrary values. After, the Node Id fields for nodes
6078 // before SortedPos will contain the topological sort index, and the
6079 // Node Id fields for nodes At SortedPos and after will contain the
6080 // count of outstanding operands.
6081 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6083 checkForCycles(N, this);
6084 unsigned Degree = N->getNumOperands();
6086 // A node with no uses, add it to the result array immediately.
6087 N->setNodeId(DAGSize++);
6088 allnodes_iterator Q = N;
6090 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6091 assert(SortedPos != AllNodes.end() && "Overran node list");
6094 // Temporarily use the Node Id as scratch space for the degree count.
6095 N->setNodeId(Degree);
6099 // Visit all the nodes. As we iterate, move nodes into sorted order,
6100 // such that by the time the end is reached all nodes will be sorted.
6101 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6103 checkForCycles(N, this);
6104 // N is in sorted position, so all its uses have one less operand
6105 // that needs to be sorted.
6106 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6109 unsigned Degree = P->getNodeId();
6110 assert(Degree != 0 && "Invalid node degree");
6113 // All of P's operands are sorted, so P may sorted now.
6114 P->setNodeId(DAGSize++);
6116 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6117 assert(SortedPos != AllNodes.end() && "Overran node list");
6120 // Update P's outstanding operand count.
6121 P->setNodeId(Degree);
6124 if (I == SortedPos) {
6127 dbgs() << "Overran sorted position:\n";
6128 S->dumprFull(this); dbgs() << "\n";
6129 dbgs() << "Checking if this is due to cycles\n";
6130 checkForCycles(this, true);
6132 llvm_unreachable(nullptr);
6136 assert(SortedPos == AllNodes.end() &&
6137 "Topological sort incomplete!");
6138 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6139 "First node in topological sort is not the entry token!");
6140 assert(AllNodes.front().getNodeId() == 0 &&
6141 "First node in topological sort has non-zero id!");
6142 assert(AllNodes.front().getNumOperands() == 0 &&
6143 "First node in topological sort has operands!");
6144 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6145 "Last node in topologic sort has unexpected id!");
6146 assert(AllNodes.back().use_empty() &&
6147 "Last node in topologic sort has users!");
6148 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6152 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6153 /// value is produced by SD.
6154 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6156 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6157 SD->setHasDebugValue(true);
6159 DbgInfo->add(DB, SD, isParameter);
6162 /// TransferDbgValues - Transfer SDDbgValues.
6163 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6164 if (From == To || !From.getNode()->getHasDebugValue())
6166 SDNode *FromNode = From.getNode();
6167 SDNode *ToNode = To.getNode();
6168 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6169 SmallVector<SDDbgValue *, 2> ClonedDVs;
6170 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6172 SDDbgValue *Dbg = *I;
6173 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6175 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6176 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6177 Dbg->getDebugLoc(), Dbg->getOrder());
6178 ClonedDVs.push_back(Clone);
6181 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6182 E = ClonedDVs.end(); I != E; ++I)
6183 AddDbgValue(*I, ToNode, false);
6186 //===----------------------------------------------------------------------===//
6188 //===----------------------------------------------------------------------===//
6190 HandleSDNode::~HandleSDNode() {
6194 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6195 DebugLoc DL, const GlobalValue *GA,
6196 EVT VT, int64_t o, unsigned char TF)
6197 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6201 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6202 SDValue X, unsigned SrcAS,
6204 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6205 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6207 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6208 EVT memvt, MachineMemOperand *mmo)
6209 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6210 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6211 MMO->isNonTemporal(), MMO->isInvariant());
6212 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6213 assert(isNonTemporal() == MMO->isNonTemporal() &&
6214 "Non-temporal encoding error!");
6215 // We check here that the size of the memory operand fits within the size of
6216 // the MMO. This is because the MMO might indicate only a possible address
6217 // range instead of specifying the affected memory addresses precisely.
6218 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6221 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6222 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6223 : SDNode(Opc, Order, dl, VTs, Ops),
6224 MemoryVT(memvt), MMO(mmo) {
6225 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6226 MMO->isNonTemporal(), MMO->isInvariant());
6227 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6228 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6231 /// Profile - Gather unique data for the node.
6233 void SDNode::Profile(FoldingSetNodeID &ID) const {
6234 AddNodeIDNode(ID, this);
6239 std::vector<EVT> VTs;
6242 VTs.reserve(MVT::LAST_VALUETYPE);
6243 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6244 VTs.push_back(MVT((MVT::SimpleValueType)i));
6249 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6250 static ManagedStatic<EVTArray> SimpleVTArray;
6251 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6253 /// getValueTypeList - Return a pointer to the specified value type.
6255 const EVT *SDNode::getValueTypeList(EVT VT) {
6256 if (VT.isExtended()) {
6257 sys::SmartScopedLock<true> Lock(*VTMutex);
6258 return &(*EVTs->insert(VT).first);
6260 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6261 "Value type out of range!");
6262 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6266 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6267 /// indicated value. This method ignores uses of other values defined by this
6269 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6270 assert(Value < getNumValues() && "Bad value!");
6272 // TODO: Only iterate over uses of a given value of the node
6273 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6274 if (UI.getUse().getResNo() == Value) {
6281 // Found exactly the right number of uses?
6286 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6287 /// value. This method ignores uses of other values defined by this operation.
6288 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6289 assert(Value < getNumValues() && "Bad value!");
6291 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6292 if (UI.getUse().getResNo() == Value)
6299 /// isOnlyUserOf - Return true if this node is the only use of N.
6301 bool SDNode::isOnlyUserOf(SDNode *N) const {
6303 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6314 /// isOperand - Return true if this node is an operand of N.
6316 bool SDValue::isOperandOf(SDNode *N) const {
6317 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6318 if (*this == N->getOperand(i))
6323 bool SDNode::isOperandOf(SDNode *N) const {
6324 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6325 if (this == N->OperandList[i].getNode())
6330 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6331 /// be a chain) reaches the specified operand without crossing any
6332 /// side-effecting instructions on any chain path. In practice, this looks
6333 /// through token factors and non-volatile loads. In order to remain efficient,
6334 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6335 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6336 unsigned Depth) const {
6337 if (*this == Dest) return true;
6339 // Don't search too deeply, we just want to be able to see through
6340 // TokenFactor's etc.
6341 if (Depth == 0) return false;
6343 // If this is a token factor, all inputs to the TF happen in parallel. If any
6344 // of the operands of the TF does not reach dest, then we cannot do the xform.
6345 if (getOpcode() == ISD::TokenFactor) {
6346 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6347 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6352 // Loads don't have side effects, look through them.
6353 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6354 if (!Ld->isVolatile())
6355 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6360 /// hasPredecessor - Return true if N is a predecessor of this node.
6361 /// N is either an operand of this node, or can be reached by recursively
6362 /// traversing up the operands.
6363 /// NOTE: This is an expensive method. Use it carefully.
6364 bool SDNode::hasPredecessor(const SDNode *N) const {
6365 SmallPtrSet<const SDNode *, 32> Visited;
6366 SmallVector<const SDNode *, 16> Worklist;
6367 return hasPredecessorHelper(N, Visited, Worklist);
6371 SDNode::hasPredecessorHelper(const SDNode *N,
6372 SmallPtrSetImpl<const SDNode *> &Visited,
6373 SmallVectorImpl<const SDNode *> &Worklist) const {
6374 if (Visited.empty()) {
6375 Worklist.push_back(this);
6377 // Take a look in the visited set. If we've already encountered this node
6378 // we needn't search further.
6379 if (Visited.count(N))
6383 // Haven't visited N yet. Continue the search.
6384 while (!Worklist.empty()) {
6385 const SDNode *M = Worklist.pop_back_val();
6386 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6387 SDNode *Op = M->getOperand(i).getNode();
6388 if (Visited.insert(Op).second)
6389 Worklist.push_back(Op);
6398 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6399 assert(Num < NumOperands && "Invalid child # of SDNode!");
6400 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6403 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6404 assert(N->getNumValues() == 1 &&
6405 "Can't unroll a vector with multiple results!");
6407 EVT VT = N->getValueType(0);
6408 unsigned NE = VT.getVectorNumElements();
6409 EVT EltVT = VT.getVectorElementType();
6412 SmallVector<SDValue, 8> Scalars;
6413 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6415 // If ResNE is 0, fully unroll the vector op.
6418 else if (NE > ResNE)
6422 for (i= 0; i != NE; ++i) {
6423 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6424 SDValue Operand = N->getOperand(j);
6425 EVT OperandVT = Operand.getValueType();
6426 if (OperandVT.isVector()) {
6427 // A vector operand; extract a single element.
6428 EVT OperandEltVT = OperandVT.getVectorElementType();
6429 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6432 getConstant(i, TLI->getVectorIdxTy()));
6434 // A scalar operand; just use it as is.
6435 Operands[j] = Operand;
6439 switch (N->getOpcode()) {
6441 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6444 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6451 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6452 getShiftAmountOperand(Operands[0].getValueType(),
6455 case ISD::SIGN_EXTEND_INREG:
6456 case ISD::FP_ROUND_INREG: {
6457 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6458 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6460 getValueType(ExtVT)));
6465 for (; i < ResNE; ++i)
6466 Scalars.push_back(getUNDEF(EltVT));
6468 return getNode(ISD::BUILD_VECTOR, dl,
6469 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6473 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6474 /// location that is 'Dist' units away from the location that the 'Base' load
6475 /// is loading from.
6476 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6477 unsigned Bytes, int Dist) const {
6478 if (LD->getChain() != Base->getChain())
6480 EVT VT = LD->getValueType(0);
6481 if (VT.getSizeInBits() / 8 != Bytes)
6484 SDValue Loc = LD->getOperand(1);
6485 SDValue BaseLoc = Base->getOperand(1);
6486 if (Loc.getOpcode() == ISD::FrameIndex) {
6487 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6489 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6490 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6491 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6492 int FS = MFI->getObjectSize(FI);
6493 int BFS = MFI->getObjectSize(BFI);
6494 if (FS != BFS || FS != (int)Bytes) return false;
6495 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6499 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6500 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6503 const GlobalValue *GV1 = nullptr;
6504 const GlobalValue *GV2 = nullptr;
6505 int64_t Offset1 = 0;
6506 int64_t Offset2 = 0;
6507 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6508 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6509 if (isGA1 && isGA2 && GV1 == GV2)
6510 return Offset1 == (Offset2 + Dist*Bytes);
6515 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6516 /// it cannot be inferred.
6517 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6518 // If this is a GlobalAddress + cst, return the alignment.
6519 const GlobalValue *GV;
6520 int64_t GVOffset = 0;
6521 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6522 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6523 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6524 llvm::computeKnownBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6525 TLI->getDataLayout());
6526 unsigned AlignBits = KnownZero.countTrailingOnes();
6527 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6529 return MinAlign(Align, GVOffset);
6532 // If this is a direct reference to a stack slot, use information about the
6533 // stack slot's alignment.
6534 int FrameIdx = 1 << 31;
6535 int64_t FrameOffset = 0;
6536 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6537 FrameIdx = FI->getIndex();
6538 } else if (isBaseWithConstantOffset(Ptr) &&
6539 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6541 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6542 FrameOffset = Ptr.getConstantOperandVal(1);
6545 if (FrameIdx != (1 << 31)) {
6546 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6547 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6555 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6556 /// which is split (or expanded) into two not necessarily identical pieces.
6557 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6558 // Currently all types are split in half.
6560 if (!VT.isVector()) {
6561 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6563 unsigned NumElements = VT.getVectorNumElements();
6564 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6565 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6568 return std::make_pair(LoVT, HiVT);
6571 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6573 std::pair<SDValue, SDValue>
6574 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6576 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6577 N.getValueType().getVectorNumElements() &&
6578 "More vector elements requested than available!");
6580 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6581 getConstant(0, TLI->getVectorIdxTy()));
6582 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6583 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6584 return std::make_pair(Lo, Hi);
6587 void SelectionDAG::ExtractVectorElements(SDValue Op,
6588 SmallVectorImpl<SDValue> &Args,
6589 unsigned Start, unsigned Count) {
6590 EVT VT = Op.getValueType();
6592 Count = VT.getVectorNumElements();
6594 EVT EltVT = VT.getVectorElementType();
6595 EVT IdxTy = TLI->getVectorIdxTy();
6597 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6598 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6599 Op, getConstant(i, IdxTy)));
6603 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6604 unsigned GlobalAddressSDNode::getAddressSpace() const {
6605 return getGlobal()->getType()->getAddressSpace();
6609 Type *ConstantPoolSDNode::getType() const {
6610 if (isMachineConstantPoolEntry())
6611 return Val.MachineCPVal->getType();
6612 return Val.ConstVal->getType();
6615 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6617 unsigned &SplatBitSize,
6619 unsigned MinSplatBits,
6620 bool isBigEndian) const {
6621 EVT VT = getValueType(0);
6622 assert(VT.isVector() && "Expected a vector type");
6623 unsigned sz = VT.getSizeInBits();
6624 if (MinSplatBits > sz)
6627 SplatValue = APInt(sz, 0);
6628 SplatUndef = APInt(sz, 0);
6630 // Get the bits. Bits with undefined values (when the corresponding element
6631 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6632 // in SplatValue. If any of the values are not constant, give up and return
6634 unsigned int nOps = getNumOperands();
6635 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6636 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6638 for (unsigned j = 0; j < nOps; ++j) {
6639 unsigned i = isBigEndian ? nOps-1-j : j;
6640 SDValue OpVal = getOperand(i);
6641 unsigned BitPos = j * EltBitSize;
6643 if (OpVal.getOpcode() == ISD::UNDEF)
6644 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6645 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6646 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6647 zextOrTrunc(sz) << BitPos;
6648 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6649 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6654 // The build_vector is all constants or undefs. Find the smallest element
6655 // size that splats the vector.
6657 HasAnyUndefs = (SplatUndef != 0);
6660 unsigned HalfSize = sz / 2;
6661 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6662 APInt LowValue = SplatValue.trunc(HalfSize);
6663 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6664 APInt LowUndef = SplatUndef.trunc(HalfSize);
6666 // If the two halves do not match (ignoring undef bits), stop here.
6667 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6668 MinSplatBits > HalfSize)
6671 SplatValue = HighValue | LowValue;
6672 SplatUndef = HighUndef & LowUndef;
6681 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6682 if (UndefElements) {
6683 UndefElements->clear();
6684 UndefElements->resize(getNumOperands());
6687 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6688 SDValue Op = getOperand(i);
6689 if (Op.getOpcode() == ISD::UNDEF) {
6691 (*UndefElements)[i] = true;
6692 } else if (!Splatted) {
6694 } else if (Splatted != Op) {
6700 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6701 "Can only have a splat without a constant for all undefs.");
6702 return getOperand(0);
6709 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6710 return dyn_cast_or_null<ConstantSDNode>(
6711 getSplatValue(UndefElements).getNode());
6715 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6716 return dyn_cast_or_null<ConstantFPSDNode>(
6717 getSplatValue(UndefElements).getNode());
6720 bool BuildVectorSDNode::isConstant() const {
6721 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6722 unsigned Opc = getOperand(i).getOpcode();
6723 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6729 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6730 // Find the first non-undef value in the shuffle mask.
6732 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6735 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6737 // Make sure all remaining elements are either undef or the same as the first
6739 for (int Idx = Mask[i]; i != e; ++i)
6740 if (Mask[i] >= 0 && Mask[i] != Idx)
6746 static void checkForCyclesHelper(const SDNode *N,
6747 SmallPtrSetImpl<const SDNode*> &Visited,
6748 SmallPtrSetImpl<const SDNode*> &Checked,
6749 const llvm::SelectionDAG *DAG) {
6750 // If this node has already been checked, don't check it again.
6751 if (Checked.count(N))
6754 // If a node has already been visited on this depth-first walk, reject it as
6756 if (!Visited.insert(N).second) {
6757 errs() << "Detected cycle in SelectionDAG\n";
6758 dbgs() << "Offending node:\n";
6759 N->dumprFull(DAG); dbgs() << "\n";
6763 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6764 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6771 void llvm::checkForCycles(const llvm::SDNode *N,
6772 const llvm::SelectionDAG *DAG,
6780 assert(N && "Checking nonexistent SDNode");
6781 SmallPtrSet<const SDNode*, 32> visited;
6782 SmallPtrSet<const SDNode*, 32> checked;
6783 checkForCyclesHelper(N, visited, checked, DAG);
6788 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6789 checkForCycles(DAG->getRoot().getNode(), DAG, force);