1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BITCAST)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BITCAST)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
202 for (unsigned i = 1; i < NumElems; ++i) {
203 SDValue V = N->getOperand(i);
204 if (V.getOpcode() != ISD::UNDEF)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: llvm_unreachable("Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
353 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
356 switch (N->getOpcode()) {
357 case ISD::TargetExternalSymbol:
358 case ISD::ExternalSymbol:
359 llvm_unreachable("Should only be used on nodes with operands");
360 default: break; // Normal nodes don't need extra info.
361 case ISD::TargetConstant:
363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365 case ISD::TargetConstantFP:
366 case ISD::ConstantFP: {
367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
370 case ISD::TargetGlobalAddress:
371 case ISD::GlobalAddress:
372 case ISD::TargetGlobalTLSAddress:
373 case ISD::GlobalTLSAddress: {
374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375 ID.AddPointer(GA->getGlobal());
376 ID.AddInteger(GA->getOffset());
377 ID.AddInteger(GA->getTargetFlags());
380 case ISD::BasicBlock:
381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
386 case ISD::RegisterMask:
387 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX:
437 case ISD::ATOMIC_LOAD:
438 case ISD::ATOMIC_STORE: {
439 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
440 ID.AddInteger(AT->getMemoryVT().getRawBits());
441 ID.AddInteger(AT->getRawSubclassData());
444 case ISD::VECTOR_SHUFFLE: {
445 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
446 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
448 ID.AddInteger(SVN->getMaskElt(i));
451 case ISD::TargetBlockAddress:
452 case ISD::BlockAddress: {
453 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
454 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
457 } // end switch (N->getOpcode())
460 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
462 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
463 AddNodeIDOpcode(ID, N->getOpcode());
464 // Add the return value info.
465 AddNodeIDValueTypes(ID, N->getVTList());
466 // Add the operand info.
467 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
469 // Handle SDNode leafs with special info.
470 AddNodeIDCustom(ID, N);
473 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
474 /// the CSE map that carries volatility, temporalness, indexing mode, and
475 /// extension/truncation information.
477 static inline unsigned
478 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
479 bool isNonTemporal, bool isInvariant) {
480 assert((ConvType & 3) == ConvType &&
481 "ConvType may not require more than 2 bits!");
482 assert((AM & 7) == AM &&
483 "AM may not require more than 3 bits!");
487 (isNonTemporal << 6) |
491 //===----------------------------------------------------------------------===//
492 // SelectionDAG Class
493 //===----------------------------------------------------------------------===//
495 /// doNotCSE - Return true if CSE should not be performed for this node.
496 static bool doNotCSE(SDNode *N) {
497 if (N->getValueType(0) == MVT::Glue)
498 return true; // Never CSE anything that produces a flag.
500 switch (N->getOpcode()) {
502 case ISD::HANDLENODE:
504 return true; // Never CSE these nodes.
507 // Check that remaining values produced are not flags.
508 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
509 if (N->getValueType(i) == MVT::Glue)
510 return true; // Never CSE anything that produces a flag.
515 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
517 void SelectionDAG::RemoveDeadNodes() {
518 // Create a dummy node (which is not added to allnodes), that adds a reference
519 // to the root node, preventing it from being deleted.
520 HandleSDNode Dummy(getRoot());
522 SmallVector<SDNode*, 128> DeadNodes;
524 // Add all obviously-dead nodes to the DeadNodes worklist.
525 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
527 DeadNodes.push_back(I);
529 RemoveDeadNodes(DeadNodes);
531 // If the root changed (e.g. it was a dead load, update the root).
532 setRoot(Dummy.getValue());
535 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
536 /// given list, and any nodes that become unreachable as a result.
537 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
538 DAGUpdateListener *UpdateListener) {
540 // Process the worklist, deleting the nodes and adding their uses to the
542 while (!DeadNodes.empty()) {
543 SDNode *N = DeadNodes.pop_back_val();
546 UpdateListener->NodeDeleted(N, 0);
548 // Take the node out of the appropriate CSE map.
549 RemoveNodeFromCSEMaps(N);
551 // Next, brutally remove the operand list. This is safe to do, as there are
552 // no cycles in the graph.
553 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
555 SDNode *Operand = Use.getNode();
558 // Now that we removed this operand, see if there are no uses of it left.
559 if (Operand->use_empty())
560 DeadNodes.push_back(Operand);
567 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
568 SmallVector<SDNode*, 16> DeadNodes(1, N);
570 // Create a dummy node that adds a reference to the root node, preventing
571 // it from being deleted. (This matters if the root is an operand of the
573 HandleSDNode Dummy(getRoot());
575 RemoveDeadNodes(DeadNodes, UpdateListener);
578 void SelectionDAG::DeleteNode(SDNode *N) {
579 // First take this out of the appropriate CSE map.
580 RemoveNodeFromCSEMaps(N);
582 // Finally, remove uses due to operands of this node, remove from the
583 // AllNodes list, and delete the node.
584 DeleteNodeNotInCSEMaps(N);
587 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
588 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
589 assert(N->use_empty() && "Cannot delete a node that is not dead!");
591 // Drop all of the operands and decrement used node's use counts.
597 void SelectionDAG::DeallocateNode(SDNode *N) {
598 if (N->OperandsNeedDelete)
599 delete[] N->OperandList;
601 // Set the opcode to DELETED_NODE to help catch bugs when node
602 // memory is reallocated.
603 N->NodeType = ISD::DELETED_NODE;
605 NodeAllocator.Deallocate(AllNodes.remove(N));
607 // Remove the ordering of this node.
610 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
611 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
612 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
613 DbgVals[i]->setIsInvalidated();
616 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
617 /// correspond to it. This is useful when we're about to delete or repurpose
618 /// the node. We don't want future request for structurally identical nodes
619 /// to return N anymore.
620 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
622 switch (N->getOpcode()) {
623 case ISD::HANDLENODE: return false; // noop.
625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
626 "Cond code doesn't exist!");
627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
630 case ISD::ExternalSymbol:
631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::TargetExternalSymbol: {
634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
635 Erased = TargetExternalSymbols.erase(
636 std::pair<std::string,unsigned char>(ESN->getSymbol(),
637 ESN->getTargetFlags()));
640 case ISD::VALUETYPE: {
641 EVT VT = cast<VTSDNode>(N)->getVT();
642 if (VT.isExtended()) {
643 Erased = ExtendedValueTypeNodes.erase(VT);
645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
651 // Remove it from the CSE Map.
652 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
653 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
654 Erased = CSEMap.RemoveNode(N);
658 // Verify that the node was actually in one of the CSE maps, unless it has a
659 // flag result (which cannot be CSE'd) or is one of the special cases that are
660 // not subject to CSE.
661 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
662 !N->isMachineOpcode() && !doNotCSE(N)) {
665 llvm_unreachable("Node is not in map!");
671 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
672 /// maps and modified in place. Add it back to the CSE maps, unless an identical
673 /// node already exists, in which case transfer all its users to the existing
674 /// node. This transfer can potentially trigger recursive merging.
677 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
678 DAGUpdateListener *UpdateListener) {
679 // For node types that aren't CSE'd, just act as if no identical node
682 SDNode *Existing = CSEMap.GetOrInsertNode(N);
684 // If there was already an existing matching node, use ReplaceAllUsesWith
685 // to replace the dead one with the existing one. This can cause
686 // recursive merging of other unrelated nodes down the line.
687 ReplaceAllUsesWith(N, Existing, UpdateListener);
689 // N is now dead. Inform the listener if it exists and delete it.
691 UpdateListener->NodeDeleted(N, Existing);
692 DeleteNodeNotInCSEMaps(N);
697 // If the node doesn't already exist, we updated it. Inform a listener if
700 UpdateListener->NodeUpdated(N);
703 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
704 /// were replaced with those specified. If this node is never memoized,
705 /// return null, otherwise return a pointer to the slot it would take. If a
706 /// node already exists with these operands, the slot will be non-null.
707 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
712 SDValue Ops[] = { Op };
714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
715 AddNodeIDCustom(ID, N);
716 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
720 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
721 /// were replaced with those specified. If this node is never memoized,
722 /// return null, otherwise return a pointer to the slot it would take. If a
723 /// node already exists with these operands, the slot will be non-null.
724 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
725 SDValue Op1, SDValue Op2,
730 SDValue Ops[] = { Op1, Op2 };
732 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
733 AddNodeIDCustom(ID, N);
734 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
739 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
740 /// were replaced with those specified. If this node is never memoized,
741 /// return null, otherwise return a pointer to the slot it would take. If a
742 /// node already exists with these operands, the slot will be non-null.
743 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
744 const SDValue *Ops,unsigned NumOps,
750 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
751 AddNodeIDCustom(ID, N);
752 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
757 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
758 static void VerifyNodeCommon(SDNode *N) {
759 switch (N->getOpcode()) {
762 case ISD::BUILD_PAIR: {
763 EVT VT = N->getValueType(0);
764 assert(N->getNumValues() == 1 && "Too many results!");
765 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
766 "Wrong return type!");
767 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
768 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
769 "Mismatched operand types!");
770 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
771 "Wrong operand type!");
772 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
773 "Wrong return type size");
776 case ISD::BUILD_VECTOR: {
777 assert(N->getNumValues() == 1 && "Too many results!");
778 assert(N->getValueType(0).isVector() && "Wrong return type!");
779 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
780 "Wrong number of operands!");
781 EVT EltVT = N->getValueType(0).getVectorElementType();
782 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
783 assert((I->getValueType() == EltVT ||
784 (EltVT.isInteger() && I->getValueType().isInteger() &&
785 EltVT.bitsLE(I->getValueType()))) &&
786 "Wrong operand type!");
787 assert(I->getValueType() == N->getOperand(0).getValueType() &&
788 "Operands must all have the same type");
795 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
796 static void VerifySDNode(SDNode *N) {
797 // The SDNode allocators cannot be used to allocate nodes with fields that are
798 // not present in an SDNode!
799 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
800 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
801 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
802 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
803 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
804 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
805 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
806 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
807 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
808 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
809 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
810 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
811 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
812 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
813 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
814 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
815 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
816 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
817 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
822 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
824 static void VerifyMachineNode(SDNode *N) {
825 // The MachineNode allocators cannot be used to allocate nodes with fields
826 // that are not present in a MachineNode!
827 // Currently there are no such nodes.
833 /// getEVTAlignment - Compute the default alignment value for the
836 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
837 Type *Ty = VT == MVT::iPTR ?
838 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
839 VT.getTypeForEVT(*getContext());
841 return TLI.getTargetData()->getABITypeAlignment(Ty);
844 // EntryNode could meaningfully have debug info if we can find it...
845 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
846 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
847 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
848 Root(getEntryNode()), Ordering(0) {
849 AllNodes.push_back(&EntryNode);
850 Ordering = new SDNodeOrdering();
851 DbgInfo = new SDDbgInfo();
854 void SelectionDAG::init(MachineFunction &mf) {
856 Context = &mf.getFunction()->getContext();
859 SelectionDAG::~SelectionDAG() {
865 void SelectionDAG::allnodes_clear() {
866 assert(&*AllNodes.begin() == &EntryNode);
867 AllNodes.remove(AllNodes.begin());
868 while (!AllNodes.empty())
869 DeallocateNode(AllNodes.begin());
872 void SelectionDAG::clear() {
874 OperandAllocator.Reset();
877 ExtendedValueTypeNodes.clear();
878 ExternalSymbols.clear();
879 TargetExternalSymbols.clear();
880 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
881 static_cast<CondCodeSDNode*>(0));
882 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
883 static_cast<SDNode*>(0));
885 EntryNode.UseList = 0;
886 AllNodes.push_back(&EntryNode);
887 Root = getEntryNode();
892 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
893 return VT.bitsGT(Op.getValueType()) ?
894 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
895 getNode(ISD::TRUNCATE, DL, VT, Op);
898 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
899 return VT.bitsGT(Op.getValueType()) ?
900 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
901 getNode(ISD::TRUNCATE, DL, VT, Op);
904 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
905 return VT.bitsGT(Op.getValueType()) ?
906 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
907 getNode(ISD::TRUNCATE, DL, VT, Op);
910 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
911 assert(!VT.isVector() &&
912 "getZeroExtendInReg should use the vector element type instead of "
914 if (Op.getValueType() == VT) return Op;
915 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
916 APInt Imm = APInt::getLowBitsSet(BitWidth,
918 return getNode(ISD::AND, DL, Op.getValueType(), Op,
919 getConstant(Imm, Op.getValueType()));
922 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
924 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
925 EVT EltVT = VT.getScalarType();
927 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
928 return getNode(ISD::XOR, DL, VT, Val, NegOne);
931 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
932 EVT EltVT = VT.getScalarType();
933 assert((EltVT.getSizeInBits() >= 64 ||
934 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
935 "getConstant with a uint64_t value that doesn't fit in the type!");
936 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
939 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
940 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
943 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
944 assert(VT.isInteger() && "Cannot create FP integer constant!");
946 EVT EltVT = VT.getScalarType();
947 const ConstantInt *Elt = &Val;
949 // In some cases the vector type is legal but the element type is illegal and
950 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
951 // inserted value (the type does not need to match the vector element type).
952 // Any extra bits introduced will be truncated away.
953 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
954 TargetLowering::TypePromoteInteger) {
955 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
956 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
957 Elt = ConstantInt::get(*getContext(), NewVal);
960 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
961 "APInt size does not match type size!");
962 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
964 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
968 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
970 return SDValue(N, 0);
973 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
974 CSEMap.InsertNode(N, IP);
975 AllNodes.push_back(N);
978 SDValue Result(N, 0);
980 SmallVector<SDValue, 8> Ops;
981 Ops.assign(VT.getVectorNumElements(), Result);
982 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
987 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
988 return getConstant(Val, TLI.getPointerTy(), isTarget);
992 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
993 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
996 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
997 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
999 EVT EltVT = VT.getScalarType();
1001 // Do the map lookup using the actual bit pattern for the floating point
1002 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1003 // we don't have issues with SNANs.
1004 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1005 FoldingSetNodeID ID;
1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1012 return SDValue(N, 0);
1015 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1020 SDValue Result(N, 0);
1021 if (VT.isVector()) {
1022 SmallVector<SDValue, 8> Ops;
1023 Ops.assign(VT.getVectorNumElements(), Result);
1024 // FIXME DebugLoc info might be appropriate here
1025 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1030 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1031 EVT EltVT = VT.getScalarType();
1032 if (EltVT==MVT::f32)
1033 return getConstantFP(APFloat((float)Val), VT, isTarget);
1034 else if (EltVT==MVT::f64)
1035 return getConstantFP(APFloat(Val), VT, isTarget);
1036 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1038 APFloat apf = APFloat(Val);
1039 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1041 return getConstantFP(apf, VT, isTarget);
1043 llvm_unreachable("Unsupported type in getConstantFP");
1046 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1047 EVT VT, int64_t Offset,
1049 unsigned char TargetFlags) {
1050 assert((TargetFlags == 0 || isTargetGA) &&
1051 "Cannot set target flags on target-independent globals");
1053 // Truncate (with sign-extension) the offset value to the pointer size.
1054 EVT PTy = TLI.getPointerTy();
1055 unsigned BitWidth = PTy.getSizeInBits();
1057 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1059 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1061 // If GV is an alias then use the aliasee for determining thread-localness.
1062 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1063 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1067 if (GVar && GVar->isThreadLocal())
1068 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1070 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1072 FoldingSetNodeID ID;
1073 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1075 ID.AddInteger(Offset);
1076 ID.AddInteger(TargetFlags);
1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1079 return SDValue(E, 0);
1081 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1082 Offset, TargetFlags);
1083 CSEMap.InsertNode(N, IP);
1084 AllNodes.push_back(N);
1085 return SDValue(N, 0);
1088 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1089 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1090 FoldingSetNodeID ID;
1091 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1095 return SDValue(E, 0);
1097 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1098 CSEMap.InsertNode(N, IP);
1099 AllNodes.push_back(N);
1100 return SDValue(N, 0);
1103 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1104 unsigned char TargetFlags) {
1105 assert((TargetFlags == 0 || isTarget) &&
1106 "Cannot set target flags on target-independent jump tables");
1107 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1108 FoldingSetNodeID ID;
1109 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1111 ID.AddInteger(TargetFlags);
1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1114 return SDValue(E, 0);
1116 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1118 CSEMap.InsertNode(N, IP);
1119 AllNodes.push_back(N);
1120 return SDValue(N, 0);
1123 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1124 unsigned Alignment, int Offset,
1126 unsigned char TargetFlags) {
1127 assert((TargetFlags == 0 || isTarget) &&
1128 "Cannot set target flags on target-independent globals");
1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1132 FoldingSetNodeID ID;
1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1134 ID.AddInteger(Alignment);
1135 ID.AddInteger(Offset);
1137 ID.AddInteger(TargetFlags);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1143 Alignment, TargetFlags);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1150 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1151 unsigned Alignment, int Offset,
1153 unsigned char TargetFlags) {
1154 assert((TargetFlags == 0 || isTarget) &&
1155 "Cannot set target flags on target-independent globals");
1157 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1158 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1159 FoldingSetNodeID ID;
1160 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1161 ID.AddInteger(Alignment);
1162 ID.AddInteger(Offset);
1163 C->addSelectionDAGCSEId(ID);
1164 ID.AddInteger(TargetFlags);
1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1167 return SDValue(E, 0);
1169 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1170 Alignment, TargetFlags);
1171 CSEMap.InsertNode(N, IP);
1172 AllNodes.push_back(N);
1173 return SDValue(N, 0);
1176 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1177 FoldingSetNodeID ID;
1178 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1182 return SDValue(E, 0);
1184 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1185 CSEMap.InsertNode(N, IP);
1186 AllNodes.push_back(N);
1187 return SDValue(N, 0);
1190 SDValue SelectionDAG::getValueType(EVT VT) {
1191 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1192 ValueTypeNodes.size())
1193 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1195 SDNode *&N = VT.isExtended() ?
1196 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1198 if (N) return SDValue(N, 0);
1199 N = new (NodeAllocator) VTSDNode(VT);
1200 AllNodes.push_back(N);
1201 return SDValue(N, 0);
1204 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1205 SDNode *&N = ExternalSymbols[Sym];
1206 if (N) return SDValue(N, 0);
1207 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1208 AllNodes.push_back(N);
1209 return SDValue(N, 0);
1212 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1213 unsigned char TargetFlags) {
1215 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1217 if (N) return SDValue(N, 0);
1218 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1219 AllNodes.push_back(N);
1220 return SDValue(N, 0);
1223 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1224 if ((unsigned)Cond >= CondCodeNodes.size())
1225 CondCodeNodes.resize(Cond+1);
1227 if (CondCodeNodes[Cond] == 0) {
1228 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1229 CondCodeNodes[Cond] = N;
1230 AllNodes.push_back(N);
1233 return SDValue(CondCodeNodes[Cond], 0);
1236 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1237 // the shuffle mask M that point at N1 to point at N2, and indices that point
1238 // N2 to point at N1.
1239 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1241 int NElts = M.size();
1242 for (int i = 0; i != NElts; ++i) {
1250 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1251 SDValue N2, const int *Mask) {
1252 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1253 assert(VT.isVector() && N1.getValueType().isVector() &&
1254 "Vector Shuffle VTs must be a vectors");
1255 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1256 && "Vector Shuffle VTs must have same element type");
1258 // Canonicalize shuffle undef, undef -> undef
1259 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1260 return getUNDEF(VT);
1262 // Validate that all indices in Mask are within the range of the elements
1263 // input to the shuffle.
1264 unsigned NElts = VT.getVectorNumElements();
1265 SmallVector<int, 8> MaskVec;
1266 for (unsigned i = 0; i != NElts; ++i) {
1267 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1268 MaskVec.push_back(Mask[i]);
1271 // Canonicalize shuffle v, v -> v, undef
1274 for (unsigned i = 0; i != NElts; ++i)
1275 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1278 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1279 if (N1.getOpcode() == ISD::UNDEF)
1280 commuteShuffle(N1, N2, MaskVec);
1282 // Canonicalize all index into lhs, -> shuffle lhs, undef
1283 // Canonicalize all index into rhs, -> shuffle rhs, undef
1284 bool AllLHS = true, AllRHS = true;
1285 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1286 for (unsigned i = 0; i != NElts; ++i) {
1287 if (MaskVec[i] >= (int)NElts) {
1292 } else if (MaskVec[i] >= 0) {
1296 if (AllLHS && AllRHS)
1297 return getUNDEF(VT);
1298 if (AllLHS && !N2Undef)
1302 commuteShuffle(N1, N2, MaskVec);
1305 // If Identity shuffle, or all shuffle in to undef, return that node.
1306 bool AllUndef = true;
1307 bool Identity = true;
1308 for (unsigned i = 0; i != NElts; ++i) {
1309 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1310 if (MaskVec[i] >= 0) AllUndef = false;
1312 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1315 return getUNDEF(VT);
1317 FoldingSetNodeID ID;
1318 SDValue Ops[2] = { N1, N2 };
1319 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1320 for (unsigned i = 0; i != NElts; ++i)
1321 ID.AddInteger(MaskVec[i]);
1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1325 return SDValue(E, 0);
1327 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1328 // SDNode doesn't have access to it. This memory will be "leaked" when
1329 // the node is deallocated, but recovered when the NodeAllocator is released.
1330 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1331 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1333 ShuffleVectorSDNode *N =
1334 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1335 CSEMap.InsertNode(N, IP);
1336 AllNodes.push_back(N);
1337 return SDValue(N, 0);
1340 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1341 SDValue Val, SDValue DTy,
1342 SDValue STy, SDValue Rnd, SDValue Sat,
1343 ISD::CvtCode Code) {
1344 // If the src and dest types are the same and the conversion is between
1345 // integer types of the same sign or two floats, no conversion is necessary.
1347 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1350 FoldingSetNodeID ID;
1351 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1352 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1355 return SDValue(E, 0);
1357 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1359 CSEMap.InsertNode(N, IP);
1360 AllNodes.push_back(N);
1361 return SDValue(N, 0);
1364 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1367 ID.AddInteger(RegNo);
1369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1370 return SDValue(E, 0);
1372 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1373 CSEMap.InsertNode(N, IP);
1374 AllNodes.push_back(N);
1375 return SDValue(N, 0);
1378 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1379 FoldingSetNodeID ID;
1380 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1381 ID.AddPointer(RegMask);
1383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1384 return SDValue(E, 0);
1386 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1387 CSEMap.InsertNode(N, IP);
1388 AllNodes.push_back(N);
1389 return SDValue(N, 0);
1392 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1393 FoldingSetNodeID ID;
1394 SDValue Ops[] = { Root };
1395 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1396 ID.AddPointer(Label);
1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1399 return SDValue(E, 0);
1401 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1402 CSEMap.InsertNode(N, IP);
1403 AllNodes.push_back(N);
1404 return SDValue(N, 0);
1408 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1410 unsigned char TargetFlags) {
1411 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1413 FoldingSetNodeID ID;
1414 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1416 ID.AddInteger(TargetFlags);
1418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1419 return SDValue(E, 0);
1421 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1422 CSEMap.InsertNode(N, IP);
1423 AllNodes.push_back(N);
1424 return SDValue(N, 0);
1427 SDValue SelectionDAG::getSrcValue(const Value *V) {
1428 assert((!V || V->getType()->isPointerTy()) &&
1429 "SrcValue is not a pointer?");
1431 FoldingSetNodeID ID;
1432 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1436 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1437 return SDValue(E, 0);
1439 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1440 CSEMap.InsertNode(N, IP);
1441 AllNodes.push_back(N);
1442 return SDValue(N, 0);
1445 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1446 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1447 FoldingSetNodeID ID;
1448 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1452 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1453 return SDValue(E, 0);
1455 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1456 CSEMap.InsertNode(N, IP);
1457 AllNodes.push_back(N);
1458 return SDValue(N, 0);
1462 /// getShiftAmountOperand - Return the specified value casted to
1463 /// the target's desired shift amount type.
1464 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1465 EVT OpTy = Op.getValueType();
1466 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1467 if (OpTy == ShTy || OpTy.isVector()) return Op;
1469 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1470 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1473 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1474 /// specified value type.
1475 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1476 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1477 unsigned ByteSize = VT.getStoreSize();
1478 Type *Ty = VT.getTypeForEVT(*getContext());
1479 unsigned StackAlign =
1480 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1482 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1483 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1486 /// CreateStackTemporary - Create a stack temporary suitable for holding
1487 /// either of the specified value types.
1488 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1489 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1490 VT2.getStoreSizeInBits())/8;
1491 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1492 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1493 const TargetData *TD = TLI.getTargetData();
1494 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1495 TD->getPrefTypeAlignment(Ty2));
1497 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1498 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1499 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1502 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1503 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1504 // These setcc operations always fold.
1508 case ISD::SETFALSE2: return getConstant(0, VT);
1510 case ISD::SETTRUE2: return getConstant(1, VT);
1522 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1526 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1527 const APInt &C2 = N2C->getAPIntValue();
1528 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1529 const APInt &C1 = N1C->getAPIntValue();
1532 default: llvm_unreachable("Unknown integer setcc!");
1533 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1534 case ISD::SETNE: return getConstant(C1 != C2, VT);
1535 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1536 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1537 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1538 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1539 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1540 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1541 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1542 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1546 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1547 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1548 // No compile time operations on this type yet.
1549 if (N1C->getValueType(0) == MVT::ppcf128)
1552 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1555 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1556 return getUNDEF(VT);
1558 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1559 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1560 return getUNDEF(VT);
1562 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1563 R==APFloat::cmpLessThan, VT);
1564 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1565 return getUNDEF(VT);
1567 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1568 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1569 return getUNDEF(VT);
1571 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1572 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1573 return getUNDEF(VT);
1575 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1576 R==APFloat::cmpEqual, VT);
1577 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1578 return getUNDEF(VT);
1580 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1581 R==APFloat::cmpEqual, VT);
1582 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1583 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1584 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1585 R==APFloat::cmpEqual, VT);
1586 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1587 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1588 R==APFloat::cmpLessThan, VT);
1589 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1590 R==APFloat::cmpUnordered, VT);
1591 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1592 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1595 // Ensure that the constant occurs on the RHS.
1596 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1600 // Could not fold it.
1604 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1605 /// use this predicate to simplify operations downstream.
1606 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1607 // This predicate is not safe for vector operations.
1608 if (Op.getValueType().isVector())
1611 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1612 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1615 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1616 /// this predicate to simplify operations downstream. Mask is known to be zero
1617 /// for bits that V cannot have.
1618 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1619 unsigned Depth) const {
1620 APInt KnownZero, KnownOne;
1621 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1622 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1623 return (KnownZero & Mask) == Mask;
1626 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1627 /// known to be either zero or one and return them in the KnownZero/KnownOne
1628 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1630 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1631 APInt &KnownZero, APInt &KnownOne,
1632 unsigned Depth) const {
1633 unsigned BitWidth = Mask.getBitWidth();
1634 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1635 "Mask size mismatches value type size!");
1637 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1638 if (Depth == 6 || Mask == 0)
1639 return; // Limit search depth.
1641 APInt KnownZero2, KnownOne2;
1643 switch (Op.getOpcode()) {
1645 // We know all of the bits for a constant!
1646 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1647 KnownZero = ~KnownOne & Mask;
1650 // If either the LHS or the RHS are Zero, the result is zero.
1651 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1652 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1653 KnownZero2, KnownOne2, Depth+1);
1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1657 // Output known-1 bits are only known if set in both the LHS & RHS.
1658 KnownOne &= KnownOne2;
1659 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1660 KnownZero |= KnownZero2;
1663 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1664 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1665 KnownZero2, KnownOne2, Depth+1);
1666 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1667 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1669 // Output known-0 bits are only known if clear in both the LHS & RHS.
1670 KnownZero &= KnownZero2;
1671 // Output known-1 are known to be set if set in either the LHS | RHS.
1672 KnownOne |= KnownOne2;
1675 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1676 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1677 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1678 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1680 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1681 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1682 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1683 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1684 KnownZero = KnownZeroOut;
1688 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1689 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1690 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1691 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1692 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1694 // If low bits are zero in either operand, output low known-0 bits.
1695 // Also compute a conserative estimate for high known-0 bits.
1696 // More trickiness is possible, but this is sufficient for the
1697 // interesting case of alignment computation.
1698 KnownOne.clearAllBits();
1699 unsigned TrailZ = KnownZero.countTrailingOnes() +
1700 KnownZero2.countTrailingOnes();
1701 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1702 KnownZero2.countLeadingOnes(),
1703 BitWidth) - BitWidth;
1705 TrailZ = std::min(TrailZ, BitWidth);
1706 LeadZ = std::min(LeadZ, BitWidth);
1707 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1708 APInt::getHighBitsSet(BitWidth, LeadZ);
1713 // For the purposes of computing leading zeros we can conservatively
1714 // treat a udiv as a logical right shift by the power of 2 known to
1715 // be less than the denominator.
1716 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1717 ComputeMaskedBits(Op.getOperand(0),
1718 AllOnes, KnownZero2, KnownOne2, Depth+1);
1719 unsigned LeadZ = KnownZero2.countLeadingOnes();
1721 KnownOne2.clearAllBits();
1722 KnownZero2.clearAllBits();
1723 ComputeMaskedBits(Op.getOperand(1),
1724 AllOnes, KnownZero2, KnownOne2, Depth+1);
1725 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1726 if (RHSUnknownLeadingOnes != BitWidth)
1727 LeadZ = std::min(BitWidth,
1728 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1730 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1734 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1735 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1739 // Only known if known in both the LHS and RHS.
1740 KnownOne &= KnownOne2;
1741 KnownZero &= KnownZero2;
1743 case ISD::SELECT_CC:
1744 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1745 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1746 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1747 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1749 // Only known if known in both the LHS and RHS.
1750 KnownOne &= KnownOne2;
1751 KnownZero &= KnownZero2;
1759 if (Op.getResNo() != 1)
1761 // The boolean result conforms to getBooleanContents. Fall through.
1763 // If we know the result of a setcc has the top bits zero, use this info.
1764 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1765 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1766 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1769 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1770 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1771 unsigned ShAmt = SA->getZExtValue();
1773 // If the shift count is an invalid immediate, don't do anything.
1774 if (ShAmt >= BitWidth)
1777 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1778 KnownZero, KnownOne, Depth+1);
1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1780 KnownZero <<= ShAmt;
1782 // low bits known zero.
1783 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1787 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1788 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1789 unsigned ShAmt = SA->getZExtValue();
1791 // If the shift count is an invalid immediate, don't do anything.
1792 if (ShAmt >= BitWidth)
1795 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1796 KnownZero, KnownOne, Depth+1);
1797 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1798 KnownZero = KnownZero.lshr(ShAmt);
1799 KnownOne = KnownOne.lshr(ShAmt);
1801 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1802 KnownZero |= HighBits; // High bits known zero.
1806 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1807 unsigned ShAmt = SA->getZExtValue();
1809 // If the shift count is an invalid immediate, don't do anything.
1810 if (ShAmt >= BitWidth)
1813 APInt InDemandedMask = (Mask << ShAmt);
1814 // If any of the demanded bits are produced by the sign extension, we also
1815 // demand the input sign bit.
1816 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1817 if (HighBits.getBoolValue())
1818 InDemandedMask |= APInt::getSignBit(BitWidth);
1820 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1822 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1823 KnownZero = KnownZero.lshr(ShAmt);
1824 KnownOne = KnownOne.lshr(ShAmt);
1826 // Handle the sign bits.
1827 APInt SignBit = APInt::getSignBit(BitWidth);
1828 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1830 if (KnownZero.intersects(SignBit)) {
1831 KnownZero |= HighBits; // New bits are known zero.
1832 } else if (KnownOne.intersects(SignBit)) {
1833 KnownOne |= HighBits; // New bits are known one.
1837 case ISD::SIGN_EXTEND_INREG: {
1838 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1839 unsigned EBits = EVT.getScalarType().getSizeInBits();
1841 // Sign extension. Compute the demanded bits in the result that are not
1842 // present in the input.
1843 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1845 APInt InSignBit = APInt::getSignBit(EBits);
1846 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1848 // If the sign extended bits are demanded, we know that the sign
1850 InSignBit = InSignBit.zext(BitWidth);
1851 if (NewBits.getBoolValue())
1852 InputDemandedBits |= InSignBit;
1854 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1855 KnownZero, KnownOne, Depth+1);
1856 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 // If the sign bit of the input is known set or clear, then we know the
1859 // top bits of the result.
1860 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1861 KnownZero |= NewBits;
1862 KnownOne &= ~NewBits;
1863 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1864 KnownOne |= NewBits;
1865 KnownZero &= ~NewBits;
1866 } else { // Input sign bit unknown
1867 KnownZero &= ~NewBits;
1868 KnownOne &= ~NewBits;
1873 case ISD::CTTZ_ZERO_UNDEF:
1875 case ISD::CTLZ_ZERO_UNDEF:
1877 unsigned LowBits = Log2_32(BitWidth)+1;
1878 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1879 KnownOne.clearAllBits();
1883 if (ISD::isZEXTLoad(Op.getNode())) {
1884 LoadSDNode *LD = cast<LoadSDNode>(Op);
1885 EVT VT = LD->getMemoryVT();
1886 unsigned MemBits = VT.getScalarType().getSizeInBits();
1887 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1891 case ISD::ZERO_EXTEND: {
1892 EVT InVT = Op.getOperand(0).getValueType();
1893 unsigned InBits = InVT.getScalarType().getSizeInBits();
1894 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1895 APInt InMask = Mask.trunc(InBits);
1896 KnownZero = KnownZero.trunc(InBits);
1897 KnownOne = KnownOne.trunc(InBits);
1898 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1899 KnownZero = KnownZero.zext(BitWidth);
1900 KnownOne = KnownOne.zext(BitWidth);
1901 KnownZero |= NewBits;
1904 case ISD::SIGN_EXTEND: {
1905 EVT InVT = Op.getOperand(0).getValueType();
1906 unsigned InBits = InVT.getScalarType().getSizeInBits();
1907 APInt InSignBit = APInt::getSignBit(InBits);
1908 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1909 APInt InMask = Mask.trunc(InBits);
1911 // If any of the sign extended bits are demanded, we know that the sign
1912 // bit is demanded. Temporarily set this bit in the mask for our callee.
1913 if (NewBits.getBoolValue())
1914 InMask |= InSignBit;
1916 KnownZero = KnownZero.trunc(InBits);
1917 KnownOne = KnownOne.trunc(InBits);
1918 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1920 // Note if the sign bit is known to be zero or one.
1921 bool SignBitKnownZero = KnownZero.isNegative();
1922 bool SignBitKnownOne = KnownOne.isNegative();
1923 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1924 "Sign bit can't be known to be both zero and one!");
1926 // If the sign bit wasn't actually demanded by our caller, we don't
1927 // want it set in the KnownZero and KnownOne result values. Reset the
1928 // mask and reapply it to the result values.
1929 InMask = Mask.trunc(InBits);
1930 KnownZero &= InMask;
1933 KnownZero = KnownZero.zext(BitWidth);
1934 KnownOne = KnownOne.zext(BitWidth);
1936 // If the sign bit is known zero or one, the top bits match.
1937 if (SignBitKnownZero)
1938 KnownZero |= NewBits;
1939 else if (SignBitKnownOne)
1940 KnownOne |= NewBits;
1943 case ISD::ANY_EXTEND: {
1944 EVT InVT = Op.getOperand(0).getValueType();
1945 unsigned InBits = InVT.getScalarType().getSizeInBits();
1946 APInt InMask = Mask.trunc(InBits);
1947 KnownZero = KnownZero.trunc(InBits);
1948 KnownOne = KnownOne.trunc(InBits);
1949 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1950 KnownZero = KnownZero.zext(BitWidth);
1951 KnownOne = KnownOne.zext(BitWidth);
1954 case ISD::TRUNCATE: {
1955 EVT InVT = Op.getOperand(0).getValueType();
1956 unsigned InBits = InVT.getScalarType().getSizeInBits();
1957 APInt InMask = Mask.zext(InBits);
1958 KnownZero = KnownZero.zext(InBits);
1959 KnownOne = KnownOne.zext(InBits);
1960 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1961 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1962 KnownZero = KnownZero.trunc(BitWidth);
1963 KnownOne = KnownOne.trunc(BitWidth);
1966 case ISD::AssertZext: {
1967 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1968 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1969 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1971 KnownZero |= (~InMask) & Mask;
1975 // All bits are zero except the low bit.
1976 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1980 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1981 // We know that the top bits of C-X are clear if X contains less bits
1982 // than C (i.e. no wrap-around can happen). For example, 20-X is
1983 // positive if we can prove that X is >= 0 and < 16.
1984 if (CLHS->getAPIntValue().isNonNegative()) {
1985 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1986 // NLZ can't be BitWidth with no sign bit
1987 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1988 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1991 // If all of the MaskV bits are known to be zero, then we know the
1992 // output top bits are zero, because we now know that the output is
1994 if ((KnownZero2 & MaskV) == MaskV) {
1995 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1996 // Top bits known zero.
1997 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
2005 // Output known-0 bits are known if clear or set in both the low clear bits
2006 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2007 // low 3 bits clear.
2008 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
2009 BitWidth - Mask.countLeadingZeros());
2010 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
2011 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2012 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2014 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
2015 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2016 KnownZeroOut = std::min(KnownZeroOut,
2017 KnownZero2.countTrailingOnes());
2019 if (Op.getOpcode() == ISD::ADD) {
2020 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2024 // With ADDE, a carry bit may be added in, so we can only use this
2025 // information if we know (at least) that the low two bits are clear. We
2026 // then return to the caller that the low bit is unknown but that other bits
2028 if (KnownZeroOut >= 2) // ADDE
2029 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2033 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2034 const APInt &RA = Rem->getAPIntValue().abs();
2035 if (RA.isPowerOf2()) {
2036 APInt LowBits = RA - 1;
2037 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2038 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2040 // The low bits of the first operand are unchanged by the srem.
2041 KnownZero = KnownZero2 & LowBits;
2042 KnownOne = KnownOne2 & LowBits;
2044 // If the first operand is non-negative or has all low bits zero, then
2045 // the upper bits are all zero.
2046 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2047 KnownZero |= ~LowBits;
2049 // If the first operand is negative and not all low bits are zero, then
2050 // the upper bits are all one.
2051 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2052 KnownOne |= ~LowBits;
2057 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2062 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2063 const APInt &RA = Rem->getAPIntValue();
2064 if (RA.isPowerOf2()) {
2065 APInt LowBits = (RA - 1);
2066 APInt Mask2 = LowBits & Mask;
2067 KnownZero |= ~LowBits & Mask;
2068 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2069 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2074 // Since the result is less than or equal to either operand, any leading
2075 // zero bits in either operand must also exist in the result.
2076 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2077 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2079 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2082 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2083 KnownZero2.countLeadingOnes());
2084 KnownOne.clearAllBits();
2085 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2088 case ISD::FrameIndex:
2089 case ISD::TargetFrameIndex:
2090 if (unsigned Align = InferPtrAlignment(Op)) {
2091 // The low bits are known zero if the pointer is aligned.
2092 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2098 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2101 case ISD::INTRINSIC_WO_CHAIN:
2102 case ISD::INTRINSIC_W_CHAIN:
2103 case ISD::INTRINSIC_VOID:
2104 // Allow the target to implement this method for its nodes.
2105 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2111 /// ComputeNumSignBits - Return the number of times the sign bit of the
2112 /// register is replicated into the other bits. We know that at least 1 bit
2113 /// is always equal to the sign bit (itself), but other cases can give us
2114 /// information. For example, immediately after an "SRA X, 2", we know that
2115 /// the top 3 bits are all equal to each other, so we return 3.
2116 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2117 EVT VT = Op.getValueType();
2118 assert(VT.isInteger() && "Invalid VT!");
2119 unsigned VTBits = VT.getScalarType().getSizeInBits();
2121 unsigned FirstAnswer = 1;
2124 return 1; // Limit search depth.
2126 switch (Op.getOpcode()) {
2128 case ISD::AssertSext:
2129 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2130 return VTBits-Tmp+1;
2131 case ISD::AssertZext:
2132 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2135 case ISD::Constant: {
2136 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2137 return Val.getNumSignBits();
2140 case ISD::SIGN_EXTEND:
2141 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2142 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2144 case ISD::SIGN_EXTEND_INREG:
2145 // Max of the input and what this extends.
2147 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2150 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2151 return std::max(Tmp, Tmp2);
2154 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2155 // SRA X, C -> adds C sign bits.
2156 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2157 Tmp += C->getZExtValue();
2158 if (Tmp > VTBits) Tmp = VTBits;
2162 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2163 // shl destroys sign bits.
2164 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2165 if (C->getZExtValue() >= VTBits || // Bad shift.
2166 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2167 return Tmp - C->getZExtValue();
2172 case ISD::XOR: // NOT is handled here.
2173 // Logical binary ops preserve the number of sign bits at the worst.
2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2176 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2177 FirstAnswer = std::min(Tmp, Tmp2);
2178 // We computed what we know about the sign bits as our first
2179 // answer. Now proceed to the generic code that uses
2180 // ComputeMaskedBits, and pick whichever answer is better.
2185 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2186 if (Tmp == 1) return 1; // Early out.
2187 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2188 return std::min(Tmp, Tmp2);
2196 if (Op.getResNo() != 1)
2198 // The boolean result conforms to getBooleanContents. Fall through.
2200 // If setcc returns 0/-1, all bits are sign bits.
2201 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2202 TargetLowering::ZeroOrNegativeOneBooleanContent)
2207 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2208 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2210 // Handle rotate right by N like a rotate left by 32-N.
2211 if (Op.getOpcode() == ISD::ROTR)
2212 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2214 // If we aren't rotating out all of the known-in sign bits, return the
2215 // number that are left. This handles rotl(sext(x), 1) for example.
2216 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2217 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2221 // Add can have at most one carry bit. Thus we know that the output
2222 // is, at worst, one more bit than the inputs.
2223 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2224 if (Tmp == 1) return 1; // Early out.
2226 // Special case decrementing a value (ADD X, -1):
2227 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2228 if (CRHS->isAllOnesValue()) {
2229 APInt KnownZero, KnownOne;
2230 APInt Mask = APInt::getAllOnesValue(VTBits);
2231 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2233 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2235 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2238 // If we are subtracting one from a positive number, there is no carry
2239 // out of the result.
2240 if (KnownZero.isNegative())
2244 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2245 if (Tmp2 == 1) return 1;
2246 return std::min(Tmp, Tmp2)-1;
2249 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2250 if (Tmp2 == 1) return 1;
2253 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2254 if (CLHS->isNullValue()) {
2255 APInt KnownZero, KnownOne;
2256 APInt Mask = APInt::getAllOnesValue(VTBits);
2257 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2258 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2260 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2263 // If the input is known to be positive (the sign bit is known clear),
2264 // the output of the NEG has the same number of sign bits as the input.
2265 if (KnownZero.isNegative())
2268 // Otherwise, we treat this like a SUB.
2271 // Sub can have at most one carry bit. Thus we know that the output
2272 // is, at worst, one more bit than the inputs.
2273 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2274 if (Tmp == 1) return 1; // Early out.
2275 return std::min(Tmp, Tmp2)-1;
2277 // FIXME: it's tricky to do anything useful for this, but it is an important
2278 // case for targets like X86.
2282 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2283 if (Op.getOpcode() == ISD::LOAD) {
2284 LoadSDNode *LD = cast<LoadSDNode>(Op);
2285 unsigned ExtType = LD->getExtensionType();
2288 case ISD::SEXTLOAD: // '17' bits known
2289 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2290 return VTBits-Tmp+1;
2291 case ISD::ZEXTLOAD: // '16' bits known
2292 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2297 // Allow the target to implement this method for its nodes.
2298 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2299 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2300 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2301 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2302 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2303 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2306 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2307 // use this information.
2308 APInt KnownZero, KnownOne;
2309 APInt Mask = APInt::getAllOnesValue(VTBits);
2310 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2312 if (KnownZero.isNegative()) { // sign bit is 0
2314 } else if (KnownOne.isNegative()) { // sign bit is 1;
2321 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2322 // the number of identical bits in the top of the input value.
2324 Mask <<= Mask.getBitWidth()-VTBits;
2325 // Return # leading zeros. We use 'min' here in case Val was zero before
2326 // shifting. We don't want to return '64' as for an i32 "0".
2327 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2330 /// isBaseWithConstantOffset - Return true if the specified operand is an
2331 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2332 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2333 /// semantics as an ADD. This handles the equivalence:
2334 /// X|Cst == X+Cst iff X&Cst = 0.
2335 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2336 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2337 !isa<ConstantSDNode>(Op.getOperand(1)))
2340 if (Op.getOpcode() == ISD::OR &&
2341 !MaskedValueIsZero(Op.getOperand(0),
2342 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2349 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2350 // If we're told that NaNs won't happen, assume they won't.
2351 if (getTarget().Options.NoNaNsFPMath)
2354 // If the value is a constant, we can obviously see if it is a NaN or not.
2355 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2356 return !C->getValueAPF().isNaN();
2358 // TODO: Recognize more cases here.
2363 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2364 // If the value is a constant, we can obviously see if it is a zero or not.
2365 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2366 return !C->isZero();
2368 // TODO: Recognize more cases here.
2369 switch (Op.getOpcode()) {
2372 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2373 return !C->isNullValue();
2380 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2381 // Check the obvious case.
2382 if (A == B) return true;
2384 // For for negative and positive zero.
2385 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2386 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2387 if (CA->isZero() && CB->isZero()) return true;
2389 // Otherwise they may not be equal.
2393 /// getNode - Gets or creates the specified node.
2395 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2396 FoldingSetNodeID ID;
2397 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2399 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2400 return SDValue(E, 0);
2402 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2403 CSEMap.InsertNode(N, IP);
2405 AllNodes.push_back(N);
2409 return SDValue(N, 0);
2412 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2413 EVT VT, SDValue Operand) {
2414 // Constant fold unary operations with an integer constant operand.
2415 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2416 const APInt &Val = C->getAPIntValue();
2419 case ISD::SIGN_EXTEND:
2420 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2421 case ISD::ANY_EXTEND:
2422 case ISD::ZERO_EXTEND:
2424 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2425 case ISD::UINT_TO_FP:
2426 case ISD::SINT_TO_FP: {
2427 // No compile time operations on ppcf128.
2428 if (VT == MVT::ppcf128) break;
2429 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2430 (void)apf.convertFromAPInt(Val,
2431 Opcode==ISD::SINT_TO_FP,
2432 APFloat::rmNearestTiesToEven);
2433 return getConstantFP(apf, VT);
2436 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2437 return getConstantFP(Val.bitsToFloat(), VT);
2438 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2439 return getConstantFP(Val.bitsToDouble(), VT);
2442 return getConstant(Val.byteSwap(), VT);
2444 return getConstant(Val.countPopulation(), VT);
2446 case ISD::CTLZ_ZERO_UNDEF:
2447 return getConstant(Val.countLeadingZeros(), VT);
2449 case ISD::CTTZ_ZERO_UNDEF:
2450 return getConstant(Val.countTrailingZeros(), VT);
2454 // Constant fold unary operations with a floating point constant operand.
2455 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2456 APFloat V = C->getValueAPF(); // make copy
2457 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2461 return getConstantFP(V, VT);
2464 return getConstantFP(V, VT);
2466 case ISD::FP_EXTEND: {
2468 // This can return overflow, underflow, or inexact; we don't care.
2469 // FIXME need to be more flexible about rounding mode.
2470 (void)V.convert(*EVTToAPFloatSemantics(VT),
2471 APFloat::rmNearestTiesToEven, &ignored);
2472 return getConstantFP(V, VT);
2474 case ISD::FP_TO_SINT:
2475 case ISD::FP_TO_UINT: {
2478 assert(integerPartWidth >= 64);
2479 // FIXME need to be more flexible about rounding mode.
2480 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2481 Opcode==ISD::FP_TO_SINT,
2482 APFloat::rmTowardZero, &ignored);
2483 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2485 APInt api(VT.getSizeInBits(), x);
2486 return getConstant(api, VT);
2489 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2490 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2491 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2492 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2498 unsigned OpOpcode = Operand.getNode()->getOpcode();
2500 case ISD::TokenFactor:
2501 case ISD::MERGE_VALUES:
2502 case ISD::CONCAT_VECTORS:
2503 return Operand; // Factor, merge or concat of one node? No need.
2504 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2505 case ISD::FP_EXTEND:
2506 assert(VT.isFloatingPoint() &&
2507 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2508 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2509 assert((!VT.isVector() ||
2510 VT.getVectorNumElements() ==
2511 Operand.getValueType().getVectorNumElements()) &&
2512 "Vector element count mismatch!");
2513 if (Operand.getOpcode() == ISD::UNDEF)
2514 return getUNDEF(VT);
2516 case ISD::SIGN_EXTEND:
2517 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2518 "Invalid SIGN_EXTEND!");
2519 if (Operand.getValueType() == VT) return Operand; // noop extension
2520 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2521 "Invalid sext node, dst < src!");
2522 assert((!VT.isVector() ||
2523 VT.getVectorNumElements() ==
2524 Operand.getValueType().getVectorNumElements()) &&
2525 "Vector element count mismatch!");
2526 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2527 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2528 else if (OpOpcode == ISD::UNDEF)
2529 // sext(undef) = 0, because the top bits will all be the same.
2530 return getConstant(0, VT);
2532 case ISD::ZERO_EXTEND:
2533 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2534 "Invalid ZERO_EXTEND!");
2535 if (Operand.getValueType() == VT) return Operand; // noop extension
2536 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2537 "Invalid zext node, dst < src!");
2538 assert((!VT.isVector() ||
2539 VT.getVectorNumElements() ==
2540 Operand.getValueType().getVectorNumElements()) &&
2541 "Vector element count mismatch!");
2542 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2543 return getNode(ISD::ZERO_EXTEND, DL, VT,
2544 Operand.getNode()->getOperand(0));
2545 else if (OpOpcode == ISD::UNDEF)
2546 // zext(undef) = 0, because the top bits will be zero.
2547 return getConstant(0, VT);
2549 case ISD::ANY_EXTEND:
2550 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2551 "Invalid ANY_EXTEND!");
2552 if (Operand.getValueType() == VT) return Operand; // noop extension
2553 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2554 "Invalid anyext node, dst < src!");
2555 assert((!VT.isVector() ||
2556 VT.getVectorNumElements() ==
2557 Operand.getValueType().getVectorNumElements()) &&
2558 "Vector element count mismatch!");
2560 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2561 OpOpcode == ISD::ANY_EXTEND)
2562 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2563 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2564 else if (OpOpcode == ISD::UNDEF)
2565 return getUNDEF(VT);
2567 // (ext (trunx x)) -> x
2568 if (OpOpcode == ISD::TRUNCATE) {
2569 SDValue OpOp = Operand.getNode()->getOperand(0);
2570 if (OpOp.getValueType() == VT)
2575 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2576 "Invalid TRUNCATE!");
2577 if (Operand.getValueType() == VT) return Operand; // noop truncate
2578 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2579 "Invalid truncate node, src < dst!");
2580 assert((!VT.isVector() ||
2581 VT.getVectorNumElements() ==
2582 Operand.getValueType().getVectorNumElements()) &&
2583 "Vector element count mismatch!");
2584 if (OpOpcode == ISD::TRUNCATE)
2585 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2586 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2587 OpOpcode == ISD::ANY_EXTEND) {
2588 // If the source is smaller than the dest, we still need an extend.
2589 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2590 .bitsLT(VT.getScalarType()))
2591 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2592 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2593 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2594 return Operand.getNode()->getOperand(0);
2596 if (OpOpcode == ISD::UNDEF)
2597 return getUNDEF(VT);
2600 // Basic sanity checking.
2601 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2602 && "Cannot BITCAST between types of different sizes!");
2603 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2604 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2605 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2606 if (OpOpcode == ISD::UNDEF)
2607 return getUNDEF(VT);
2609 case ISD::SCALAR_TO_VECTOR:
2610 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2611 (VT.getVectorElementType() == Operand.getValueType() ||
2612 (VT.getVectorElementType().isInteger() &&
2613 Operand.getValueType().isInteger() &&
2614 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2615 "Illegal SCALAR_TO_VECTOR node!");
2616 if (OpOpcode == ISD::UNDEF)
2617 return getUNDEF(VT);
2618 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2619 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2620 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2621 Operand.getConstantOperandVal(1) == 0 &&
2622 Operand.getOperand(0).getValueType() == VT)
2623 return Operand.getOperand(0);
2626 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2627 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2628 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2629 Operand.getNode()->getOperand(0));
2630 if (OpOpcode == ISD::FNEG) // --X -> X
2631 return Operand.getNode()->getOperand(0);
2634 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2635 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2640 SDVTList VTs = getVTList(VT);
2641 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2642 FoldingSetNodeID ID;
2643 SDValue Ops[1] = { Operand };
2644 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2646 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2647 return SDValue(E, 0);
2649 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2650 CSEMap.InsertNode(N, IP);
2652 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2655 AllNodes.push_back(N);
2659 return SDValue(N, 0);
2662 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2664 ConstantSDNode *Cst1,
2665 ConstantSDNode *Cst2) {
2666 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2669 case ISD::ADD: return getConstant(C1 + C2, VT);
2670 case ISD::SUB: return getConstant(C1 - C2, VT);
2671 case ISD::MUL: return getConstant(C1 * C2, VT);
2673 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2676 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2679 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2682 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2684 case ISD::AND: return getConstant(C1 & C2, VT);
2685 case ISD::OR: return getConstant(C1 | C2, VT);
2686 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2687 case ISD::SHL: return getConstant(C1 << C2, VT);
2688 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2689 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2690 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2691 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2698 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2699 SDValue N1, SDValue N2) {
2700 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2701 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2704 case ISD::TokenFactor:
2705 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2706 N2.getValueType() == MVT::Other && "Invalid token factor!");
2707 // Fold trivial token factors.
2708 if (N1.getOpcode() == ISD::EntryToken) return N2;
2709 if (N2.getOpcode() == ISD::EntryToken) return N1;
2710 if (N1 == N2) return N1;
2712 case ISD::CONCAT_VECTORS:
2713 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2714 // one big BUILD_VECTOR.
2715 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2716 N2.getOpcode() == ISD::BUILD_VECTOR) {
2717 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2718 N1.getNode()->op_end());
2719 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2720 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2724 assert(VT.isInteger() && "This operator does not apply to FP types!");
2725 assert(N1.getValueType() == N2.getValueType() &&
2726 N1.getValueType() == VT && "Binary operator types must match!");
2727 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2728 // worth handling here.
2729 if (N2C && N2C->isNullValue())
2731 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2738 assert(VT.isInteger() && "This operator does not apply to FP types!");
2739 assert(N1.getValueType() == N2.getValueType() &&
2740 N1.getValueType() == VT && "Binary operator types must match!");
2741 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2742 // it's worth handling here.
2743 if (N2C && N2C->isNullValue())
2753 assert(VT.isInteger() && "This operator does not apply to FP types!");
2754 assert(N1.getValueType() == N2.getValueType() &&
2755 N1.getValueType() == VT && "Binary operator types must match!");
2762 if (getTarget().Options.UnsafeFPMath) {
2763 if (Opcode == ISD::FADD) {
2765 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2766 if (CFP->getValueAPF().isZero())
2769 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2770 if (CFP->getValueAPF().isZero())
2772 } else if (Opcode == ISD::FSUB) {
2774 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2775 if (CFP->getValueAPF().isZero())
2779 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2780 assert(N1.getValueType() == N2.getValueType() &&
2781 N1.getValueType() == VT && "Binary operator types must match!");
2783 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2784 assert(N1.getValueType() == VT &&
2785 N1.getValueType().isFloatingPoint() &&
2786 N2.getValueType().isFloatingPoint() &&
2787 "Invalid FCOPYSIGN!");
2794 assert(VT == N1.getValueType() &&
2795 "Shift operators return type must be the same as their first arg");
2796 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2797 "Shifts only work on integers");
2798 // Verify that the shift amount VT is bit enough to hold valid shift
2799 // amounts. This catches things like trying to shift an i1024 value by an
2800 // i8, which is easy to fall into in generic code that uses
2801 // TLI.getShiftAmount().
2802 assert(N2.getValueType().getSizeInBits() >=
2803 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2804 "Invalid use of small shift amount with oversized value!");
2806 // Always fold shifts of i1 values so the code generator doesn't need to
2807 // handle them. Since we know the size of the shift has to be less than the
2808 // size of the value, the shift/rotate count is guaranteed to be zero.
2811 if (N2C && N2C->isNullValue())
2814 case ISD::FP_ROUND_INREG: {
2815 EVT EVT = cast<VTSDNode>(N2)->getVT();
2816 assert(VT == N1.getValueType() && "Not an inreg round!");
2817 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2818 "Cannot FP_ROUND_INREG integer types");
2819 assert(EVT.isVector() == VT.isVector() &&
2820 "FP_ROUND_INREG type should be vector iff the operand "
2822 assert((!EVT.isVector() ||
2823 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2824 "Vector element counts must match in FP_ROUND_INREG");
2825 assert(EVT.bitsLE(VT) && "Not rounding down!");
2827 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2831 assert(VT.isFloatingPoint() &&
2832 N1.getValueType().isFloatingPoint() &&
2833 VT.bitsLE(N1.getValueType()) &&
2834 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2835 if (N1.getValueType() == VT) return N1; // noop conversion.
2837 case ISD::AssertSext:
2838 case ISD::AssertZext: {
2839 EVT EVT = cast<VTSDNode>(N2)->getVT();
2840 assert(VT == N1.getValueType() && "Not an inreg extend!");
2841 assert(VT.isInteger() && EVT.isInteger() &&
2842 "Cannot *_EXTEND_INREG FP types");
2843 assert(!EVT.isVector() &&
2844 "AssertSExt/AssertZExt type should be the vector element type "
2845 "rather than the vector type!");
2846 assert(EVT.bitsLE(VT) && "Not extending!");
2847 if (VT == EVT) return N1; // noop assertion.
2850 case ISD::SIGN_EXTEND_INREG: {
2851 EVT EVT = cast<VTSDNode>(N2)->getVT();
2852 assert(VT == N1.getValueType() && "Not an inreg extend!");
2853 assert(VT.isInteger() && EVT.isInteger() &&
2854 "Cannot *_EXTEND_INREG FP types");
2855 assert(EVT.isVector() == VT.isVector() &&
2856 "SIGN_EXTEND_INREG type should be vector iff the operand "
2858 assert((!EVT.isVector() ||
2859 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2860 "Vector element counts must match in SIGN_EXTEND_INREG");
2861 assert(EVT.bitsLE(VT) && "Not extending!");
2862 if (EVT == VT) return N1; // Not actually extending
2865 APInt Val = N1C->getAPIntValue();
2866 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2867 Val <<= Val.getBitWidth()-FromBits;
2868 Val = Val.ashr(Val.getBitWidth()-FromBits);
2869 return getConstant(Val, VT);
2873 case ISD::EXTRACT_VECTOR_ELT:
2874 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2875 if (N1.getOpcode() == ISD::UNDEF)
2876 return getUNDEF(VT);
2878 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2879 // expanding copies of large vectors from registers.
2881 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2882 N1.getNumOperands() > 0) {
2884 N1.getOperand(0).getValueType().getVectorNumElements();
2885 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2886 N1.getOperand(N2C->getZExtValue() / Factor),
2887 getConstant(N2C->getZExtValue() % Factor,
2888 N2.getValueType()));
2891 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2892 // expanding large vector constants.
2893 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2894 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2895 EVT VEltTy = N1.getValueType().getVectorElementType();
2896 if (Elt.getValueType() != VEltTy) {
2897 // If the vector element type is not legal, the BUILD_VECTOR operands
2898 // are promoted and implicitly truncated. Make that explicit here.
2899 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2902 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2903 // result is implicitly extended.
2904 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2909 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2910 // operations are lowered to scalars.
2911 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2912 // If the indices are the same, return the inserted element else
2913 // if the indices are known different, extract the element from
2914 // the original vector.
2915 SDValue N1Op2 = N1.getOperand(2);
2916 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2918 if (N1Op2C && N2C) {
2919 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2920 if (VT == N1.getOperand(1).getValueType())
2921 return N1.getOperand(1);
2923 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2926 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2930 case ISD::EXTRACT_ELEMENT:
2931 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2932 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2933 (N1.getValueType().isInteger() == VT.isInteger()) &&
2934 N1.getValueType() != VT &&
2935 "Wrong types for EXTRACT_ELEMENT!");
2937 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2938 // 64-bit integers into 32-bit parts. Instead of building the extract of
2939 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2940 if (N1.getOpcode() == ISD::BUILD_PAIR)
2941 return N1.getOperand(N2C->getZExtValue());
2943 // EXTRACT_ELEMENT of a constant int is also very common.
2944 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2945 unsigned ElementSize = VT.getSizeInBits();
2946 unsigned Shift = ElementSize * N2C->getZExtValue();
2947 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2948 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2951 case ISD::EXTRACT_SUBVECTOR: {
2953 if (VT.isSimple() && N1.getValueType().isSimple()) {
2954 assert(VT.isVector() && N1.getValueType().isVector() &&
2955 "Extract subvector VTs must be a vectors!");
2956 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2957 "Extract subvector VTs must have the same element type!");
2958 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2959 "Extract subvector must be from larger vector to smaller vector!");
2961 if (isa<ConstantSDNode>(Index.getNode())) {
2962 assert((VT.getVectorNumElements() +
2963 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2964 <= N1.getValueType().getVectorNumElements())
2965 && "Extract subvector overflow!");
2968 // Trivial extraction.
2969 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2978 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2979 if (SV.getNode()) return SV;
2980 } else { // Cannonicalize constant to RHS if commutative
2981 if (isCommutativeBinOp(Opcode)) {
2982 std::swap(N1C, N2C);
2988 // Constant fold FP operations.
2989 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2990 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2992 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2993 // Cannonicalize constant to RHS if commutative
2994 std::swap(N1CFP, N2CFP);
2996 } else if (N2CFP && VT != MVT::ppcf128) {
2997 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2998 APFloat::opStatus s;
3001 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3002 if (s != APFloat::opInvalidOp)
3003 return getConstantFP(V1, VT);
3006 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3007 if (s!=APFloat::opInvalidOp)
3008 return getConstantFP(V1, VT);
3011 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3012 if (s!=APFloat::opInvalidOp)
3013 return getConstantFP(V1, VT);
3016 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3017 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3018 return getConstantFP(V1, VT);
3021 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3022 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3023 return getConstantFP(V1, VT);
3025 case ISD::FCOPYSIGN:
3027 return getConstantFP(V1, VT);
3033 // Canonicalize an UNDEF to the RHS, even over a constant.
3034 if (N1.getOpcode() == ISD::UNDEF) {
3035 if (isCommutativeBinOp(Opcode)) {
3039 case ISD::FP_ROUND_INREG:
3040 case ISD::SIGN_EXTEND_INREG:
3046 return N1; // fold op(undef, arg2) -> undef
3054 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3055 // For vectors, we can't easily build an all zero vector, just return
3062 // Fold a bunch of operators when the RHS is undef.
3063 if (N2.getOpcode() == ISD::UNDEF) {
3066 if (N1.getOpcode() == ISD::UNDEF)
3067 // Handle undef ^ undef -> 0 special case. This is a common
3069 return getConstant(0, VT);
3079 return N2; // fold op(arg1, undef) -> undef
3085 if (getTarget().Options.UnsafeFPMath)
3093 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3094 // For vectors, we can't easily build an all zero vector, just return
3099 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3100 // For vectors, we can't easily build an all one vector, just return
3108 // Memoize this node if possible.
3110 SDVTList VTs = getVTList(VT);
3111 if (VT != MVT::Glue) {
3112 SDValue Ops[] = { N1, N2 };
3113 FoldingSetNodeID ID;
3114 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3116 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3117 return SDValue(E, 0);
3119 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3120 CSEMap.InsertNode(N, IP);
3122 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3125 AllNodes.push_back(N);
3129 return SDValue(N, 0);
3132 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3133 SDValue N1, SDValue N2, SDValue N3) {
3134 // Perform various simplifications.
3135 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3137 case ISD::CONCAT_VECTORS:
3138 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3139 // one big BUILD_VECTOR.
3140 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3141 N2.getOpcode() == ISD::BUILD_VECTOR &&
3142 N3.getOpcode() == ISD::BUILD_VECTOR) {
3143 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3144 N1.getNode()->op_end());
3145 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3146 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3147 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3151 // Use FoldSetCC to simplify SETCC's.
3152 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3153 if (Simp.getNode()) return Simp;
3158 if (N1C->getZExtValue())
3159 return N2; // select true, X, Y -> X
3160 return N3; // select false, X, Y -> Y
3163 if (N2 == N3) return N2; // select C, X, X -> X
3165 case ISD::VECTOR_SHUFFLE:
3166 llvm_unreachable("should use getVectorShuffle constructor!");
3167 case ISD::INSERT_SUBVECTOR: {
3169 if (VT.isSimple() && N1.getValueType().isSimple()
3170 && N2.getValueType().isSimple()) {
3171 assert(VT.isVector() && N1.getValueType().isVector() &&
3172 N2.getValueType().isVector() &&
3173 "Insert subvector VTs must be a vectors");
3174 assert(VT == N1.getValueType() &&
3175 "Dest and insert subvector source types must match!");
3176 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3177 "Insert subvector must be from smaller vector to larger vector!");
3178 if (isa<ConstantSDNode>(Index.getNode())) {
3179 assert((N2.getValueType().getVectorNumElements() +
3180 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3181 <= VT.getVectorNumElements())
3182 && "Insert subvector overflow!");
3185 // Trivial insertion.
3186 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3192 // Fold bit_convert nodes from a type to themselves.
3193 if (N1.getValueType() == VT)
3198 // Memoize node if it doesn't produce a flag.
3200 SDVTList VTs = getVTList(VT);
3201 if (VT != MVT::Glue) {
3202 SDValue Ops[] = { N1, N2, N3 };
3203 FoldingSetNodeID ID;
3204 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3206 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3207 return SDValue(E, 0);
3209 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3210 CSEMap.InsertNode(N, IP);
3212 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3215 AllNodes.push_back(N);
3219 return SDValue(N, 0);
3222 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3223 SDValue N1, SDValue N2, SDValue N3,
3225 SDValue Ops[] = { N1, N2, N3, N4 };
3226 return getNode(Opcode, DL, VT, Ops, 4);
3229 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3230 SDValue N1, SDValue N2, SDValue N3,
3231 SDValue N4, SDValue N5) {
3232 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3233 return getNode(Opcode, DL, VT, Ops, 5);
3236 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3237 /// the incoming stack arguments to be loaded from the stack.
3238 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3239 SmallVector<SDValue, 8> ArgChains;
3241 // Include the original chain at the beginning of the list. When this is
3242 // used by target LowerCall hooks, this helps legalize find the
3243 // CALLSEQ_BEGIN node.
3244 ArgChains.push_back(Chain);
3246 // Add a chain value for each stack argument.
3247 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3248 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3249 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3250 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3251 if (FI->getIndex() < 0)
3252 ArgChains.push_back(SDValue(L, 1));
3254 // Build a tokenfactor for all the chains.
3255 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3256 &ArgChains[0], ArgChains.size());
3259 /// SplatByte - Distribute ByteVal over NumBits bits.
3260 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3261 APInt Val = APInt(NumBits, ByteVal);
3263 for (unsigned i = NumBits; i > 8; i >>= 1) {
3264 Val = (Val << Shift) | Val;
3270 /// getMemsetValue - Vectorized representation of the memset value
3272 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3274 assert(Value.getOpcode() != ISD::UNDEF);
3276 unsigned NumBits = VT.getScalarType().getSizeInBits();
3277 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3278 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3280 return DAG.getConstant(Val, VT);
3281 return DAG.getConstantFP(APFloat(Val), VT);
3284 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3286 // Use a multiplication with 0x010101... to extend the input to the
3288 APInt Magic = SplatByte(NumBits, 0x01);
3289 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3295 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3296 /// used when a memcpy is turned into a memset when the source is a constant
3298 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3299 const TargetLowering &TLI, StringRef Str) {
3300 // Handle vector with all elements zero.
3303 return DAG.getConstant(0, VT);
3304 else if (VT == MVT::f32 || VT == MVT::f64)
3305 return DAG.getConstantFP(0.0, VT);
3306 else if (VT.isVector()) {
3307 unsigned NumElts = VT.getVectorNumElements();
3308 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3309 return DAG.getNode(ISD::BITCAST, dl, VT,
3310 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3313 llvm_unreachable("Expected type!");
3316 assert(!VT.isVector() && "Can't handle vector type here!");
3317 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3318 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3321 if (TLI.isLittleEndian()) {
3322 for (unsigned i = 0; i != NumBytes; ++i)
3323 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3325 for (unsigned i = 0; i != NumBytes; ++i)
3326 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3329 return DAG.getConstant(Val, VT);
3332 /// getMemBasePlusOffset - Returns base and offset node for the
3334 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3335 SelectionDAG &DAG) {
3336 EVT VT = Base.getValueType();
3337 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3338 VT, Base, DAG.getConstant(Offset, VT));
3341 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3343 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3344 unsigned SrcDelta = 0;
3345 GlobalAddressSDNode *G = NULL;
3346 if (Src.getOpcode() == ISD::GlobalAddress)
3347 G = cast<GlobalAddressSDNode>(Src);
3348 else if (Src.getOpcode() == ISD::ADD &&
3349 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3350 Src.getOperand(1).getOpcode() == ISD::Constant) {
3351 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3352 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3357 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3360 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3361 /// to replace the memset / memcpy. Return true if the number of memory ops
3362 /// is below the threshold. It returns the types of the sequence of
3363 /// memory ops to perform memset / memcpy by reference.
3364 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3365 unsigned Limit, uint64_t Size,
3366 unsigned DstAlign, unsigned SrcAlign,
3370 const TargetLowering &TLI) {
3371 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3372 "Expecting memcpy / memset source to meet alignment requirement!");
3373 // If 'SrcAlign' is zero, that means the memory operation does not need to
3374 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3375 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3376 // is the specified alignment of the memory operation. If it is zero, that
3377 // means it's possible to change the alignment of the destination.
3378 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3379 // not need to be loaded.
3380 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3381 IsZeroVal, MemcpyStrSrc,
3382 DAG.getMachineFunction());
3384 if (VT == MVT::Other) {
3385 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3386 TLI.allowsUnalignedMemoryAccesses(VT)) {
3387 VT = TLI.getPointerTy();
3389 switch (DstAlign & 7) {
3390 case 0: VT = MVT::i64; break;
3391 case 4: VT = MVT::i32; break;
3392 case 2: VT = MVT::i16; break;
3393 default: VT = MVT::i8; break;
3398 while (!TLI.isTypeLegal(LVT))
3399 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3400 assert(LVT.isInteger());
3406 unsigned NumMemOps = 0;
3408 unsigned VTSize = VT.getSizeInBits() / 8;
3409 while (VTSize > Size) {
3410 // For now, only use non-vector load / store's for the left-over pieces.
3411 if (VT.isVector() || VT.isFloatingPoint()) {
3413 while (!TLI.isTypeLegal(VT))
3414 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3415 VTSize = VT.getSizeInBits() / 8;
3417 // This can result in a type that is not legal on the target, e.g.
3418 // 1 or 2 bytes on PPC.
3419 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3424 if (++NumMemOps > Limit)
3426 MemOps.push_back(VT);
3433 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3434 SDValue Chain, SDValue Dst,
3435 SDValue Src, uint64_t Size,
3436 unsigned Align, bool isVol,
3438 MachinePointerInfo DstPtrInfo,
3439 MachinePointerInfo SrcPtrInfo) {
3440 // Turn a memcpy of undef to nop.
3441 if (Src.getOpcode() == ISD::UNDEF)
3444 // Expand memcpy to a series of load and store ops if the size operand falls
3445 // below a certain threshold.
3446 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3447 // rather than maybe a humongous number of loads and stores.
3448 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3449 std::vector<EVT> MemOps;
3450 bool DstAlignCanChange = false;
3451 MachineFunction &MF = DAG.getMachineFunction();
3452 MachineFrameInfo *MFI = MF.getFrameInfo();
3453 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3454 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3455 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3456 DstAlignCanChange = true;
3457 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3458 if (Align > SrcAlign)
3461 bool CopyFromStr = isMemSrcFromString(Src, Str);
3462 bool isZeroStr = CopyFromStr && Str.empty();
3463 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3465 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3466 (DstAlignCanChange ? 0 : Align),
3467 (isZeroStr ? 0 : SrcAlign),
3468 true, CopyFromStr, DAG, TLI))
3471 if (DstAlignCanChange) {
3472 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3473 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3474 if (NewAlign > Align) {
3475 // Give the stack frame object a larger alignment if needed.
3476 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3477 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3482 SmallVector<SDValue, 8> OutChains;
3483 unsigned NumMemOps = MemOps.size();
3484 uint64_t SrcOff = 0, DstOff = 0;
3485 for (unsigned i = 0; i != NumMemOps; ++i) {
3487 unsigned VTSize = VT.getSizeInBits() / 8;
3488 SDValue Value, Store;
3491 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3492 // It's unlikely a store of a vector immediate can be done in a single
3493 // instruction. It would require a load from a constantpool first.
3494 // We only handle zero vectors here.
3495 // FIXME: Handle other cases where store of vector immediate is done in
3496 // a single instruction.
3497 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3498 Store = DAG.getStore(Chain, dl, Value,
3499 getMemBasePlusOffset(Dst, DstOff, DAG),
3500 DstPtrInfo.getWithOffset(DstOff), isVol,
3503 // The type might not be legal for the target. This should only happen
3504 // if the type is smaller than a legal type, as on PPC, so the right
3505 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3506 // to Load/Store if NVT==VT.
3507 // FIXME does the case above also need this?
3508 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3509 assert(NVT.bitsGE(VT));
3510 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3511 getMemBasePlusOffset(Src, SrcOff, DAG),
3512 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3513 MinAlign(SrcAlign, SrcOff));
3514 Store = DAG.getTruncStore(Chain, dl, Value,
3515 getMemBasePlusOffset(Dst, DstOff, DAG),
3516 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3519 OutChains.push_back(Store);
3524 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3525 &OutChains[0], OutChains.size());
3528 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3529 SDValue Chain, SDValue Dst,
3530 SDValue Src, uint64_t Size,
3531 unsigned Align, bool isVol,
3533 MachinePointerInfo DstPtrInfo,
3534 MachinePointerInfo SrcPtrInfo) {
3535 // Turn a memmove of undef to nop.
3536 if (Src.getOpcode() == ISD::UNDEF)
3539 // Expand memmove to a series of load and store ops if the size operand falls
3540 // below a certain threshold.
3541 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3542 std::vector<EVT> MemOps;
3543 bool DstAlignCanChange = false;
3544 MachineFunction &MF = DAG.getMachineFunction();
3545 MachineFrameInfo *MFI = MF.getFrameInfo();
3546 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3547 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3548 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3549 DstAlignCanChange = true;
3550 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3551 if (Align > SrcAlign)
3553 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3555 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3556 (DstAlignCanChange ? 0 : Align),
3557 SrcAlign, true, false, DAG, TLI))
3560 if (DstAlignCanChange) {
3561 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3562 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3563 if (NewAlign > Align) {
3564 // Give the stack frame object a larger alignment if needed.
3565 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3566 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3571 uint64_t SrcOff = 0, DstOff = 0;
3572 SmallVector<SDValue, 8> LoadValues;
3573 SmallVector<SDValue, 8> LoadChains;
3574 SmallVector<SDValue, 8> OutChains;
3575 unsigned NumMemOps = MemOps.size();
3576 for (unsigned i = 0; i < NumMemOps; i++) {
3578 unsigned VTSize = VT.getSizeInBits() / 8;
3579 SDValue Value, Store;
3581 Value = DAG.getLoad(VT, dl, Chain,
3582 getMemBasePlusOffset(Src, SrcOff, DAG),
3583 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3584 false, false, SrcAlign);
3585 LoadValues.push_back(Value);
3586 LoadChains.push_back(Value.getValue(1));
3589 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3590 &LoadChains[0], LoadChains.size());
3592 for (unsigned i = 0; i < NumMemOps; i++) {
3594 unsigned VTSize = VT.getSizeInBits() / 8;
3595 SDValue Value, Store;
3597 Store = DAG.getStore(Chain, dl, LoadValues[i],
3598 getMemBasePlusOffset(Dst, DstOff, DAG),
3599 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3600 OutChains.push_back(Store);
3604 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3605 &OutChains[0], OutChains.size());
3608 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3609 SDValue Chain, SDValue Dst,
3610 SDValue Src, uint64_t Size,
3611 unsigned Align, bool isVol,
3612 MachinePointerInfo DstPtrInfo) {
3613 // Turn a memset of undef to nop.
3614 if (Src.getOpcode() == ISD::UNDEF)
3617 // Expand memset to a series of load/store ops if the size operand
3618 // falls below a certain threshold.
3619 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3620 std::vector<EVT> MemOps;
3621 bool DstAlignCanChange = false;
3622 MachineFunction &MF = DAG.getMachineFunction();
3623 MachineFrameInfo *MFI = MF.getFrameInfo();
3624 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3625 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3626 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3627 DstAlignCanChange = true;
3629 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3630 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3631 Size, (DstAlignCanChange ? 0 : Align), 0,
3632 IsZeroVal, false, DAG, TLI))
3635 if (DstAlignCanChange) {
3636 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3637 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3638 if (NewAlign > Align) {
3639 // Give the stack frame object a larger alignment if needed.
3640 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3641 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3646 SmallVector<SDValue, 8> OutChains;
3647 uint64_t DstOff = 0;
3648 unsigned NumMemOps = MemOps.size();
3650 // Find the largest store and generate the bit pattern for it.
3651 EVT LargestVT = MemOps[0];
3652 for (unsigned i = 1; i < NumMemOps; i++)
3653 if (MemOps[i].bitsGT(LargestVT))
3654 LargestVT = MemOps[i];
3655 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3657 for (unsigned i = 0; i < NumMemOps; i++) {
3660 // If this store is smaller than the largest store see whether we can get
3661 // the smaller value for free with a truncate.
3662 SDValue Value = MemSetValue;
3663 if (VT.bitsLT(LargestVT)) {
3664 if (!LargestVT.isVector() && !VT.isVector() &&
3665 TLI.isTruncateFree(LargestVT, VT))
3666 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3668 Value = getMemsetValue(Src, VT, DAG, dl);
3670 assert(Value.getValueType() == VT && "Value with wrong type.");
3671 SDValue Store = DAG.getStore(Chain, dl, Value,
3672 getMemBasePlusOffset(Dst, DstOff, DAG),
3673 DstPtrInfo.getWithOffset(DstOff),
3674 isVol, false, Align);
3675 OutChains.push_back(Store);
3676 DstOff += VT.getSizeInBits() / 8;
3679 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3680 &OutChains[0], OutChains.size());
3683 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3684 SDValue Src, SDValue Size,
3685 unsigned Align, bool isVol, bool AlwaysInline,
3686 MachinePointerInfo DstPtrInfo,
3687 MachinePointerInfo SrcPtrInfo) {
3689 // Check to see if we should lower the memcpy to loads and stores first.
3690 // For cases within the target-specified limits, this is the best choice.
3691 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3693 // Memcpy with size zero? Just return the original chain.
3694 if (ConstantSize->isNullValue())
3697 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3698 ConstantSize->getZExtValue(),Align,
3699 isVol, false, DstPtrInfo, SrcPtrInfo);
3700 if (Result.getNode())
3704 // Then check to see if we should lower the memcpy with target-specific
3705 // code. If the target chooses to do this, this is the next best.
3707 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3708 isVol, AlwaysInline,
3709 DstPtrInfo, SrcPtrInfo);
3710 if (Result.getNode())
3713 // If we really need inline code and the target declined to provide it,
3714 // use a (potentially long) sequence of loads and stores.
3716 assert(ConstantSize && "AlwaysInline requires a constant size!");
3717 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3718 ConstantSize->getZExtValue(), Align, isVol,
3719 true, DstPtrInfo, SrcPtrInfo);
3722 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3723 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3724 // respect volatile, so they may do things like read or write memory
3725 // beyond the given memory regions. But fixing this isn't easy, and most
3726 // people don't care.
3728 // Emit a library call.
3729 TargetLowering::ArgListTy Args;
3730 TargetLowering::ArgListEntry Entry;
3731 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3732 Entry.Node = Dst; Args.push_back(Entry);
3733 Entry.Node = Src; Args.push_back(Entry);
3734 Entry.Node = Size; Args.push_back(Entry);
3735 // FIXME: pass in DebugLoc
3736 std::pair<SDValue,SDValue> CallResult =
3737 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3738 false, false, false, false, 0,
3739 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3740 /*isTailCall=*/false,
3741 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3742 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3743 TLI.getPointerTy()),
3745 return CallResult.second;
3748 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3749 SDValue Src, SDValue Size,
3750 unsigned Align, bool isVol,
3751 MachinePointerInfo DstPtrInfo,
3752 MachinePointerInfo SrcPtrInfo) {
3754 // Check to see if we should lower the memmove to loads and stores first.
3755 // For cases within the target-specified limits, this is the best choice.
3756 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3758 // Memmove with size zero? Just return the original chain.
3759 if (ConstantSize->isNullValue())
3763 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3764 ConstantSize->getZExtValue(), Align, isVol,
3765 false, DstPtrInfo, SrcPtrInfo);
3766 if (Result.getNode())
3770 // Then check to see if we should lower the memmove with target-specific
3771 // code. If the target chooses to do this, this is the next best.
3773 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3774 DstPtrInfo, SrcPtrInfo);
3775 if (Result.getNode())
3778 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3779 // not be safe. See memcpy above for more details.
3781 // Emit a library call.
3782 TargetLowering::ArgListTy Args;
3783 TargetLowering::ArgListEntry Entry;
3784 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3785 Entry.Node = Dst; Args.push_back(Entry);
3786 Entry.Node = Src; Args.push_back(Entry);
3787 Entry.Node = Size; Args.push_back(Entry);
3788 // FIXME: pass in DebugLoc
3789 std::pair<SDValue,SDValue> CallResult =
3790 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3791 false, false, false, false, 0,
3792 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3793 /*isTailCall=*/false,
3794 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3795 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3796 TLI.getPointerTy()),
3798 return CallResult.second;
3801 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3802 SDValue Src, SDValue Size,
3803 unsigned Align, bool isVol,
3804 MachinePointerInfo DstPtrInfo) {
3806 // Check to see if we should lower the memset to stores first.
3807 // For cases within the target-specified limits, this is the best choice.
3808 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3810 // Memset with size zero? Just return the original chain.
3811 if (ConstantSize->isNullValue())
3815 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3816 Align, isVol, DstPtrInfo);
3818 if (Result.getNode())
3822 // Then check to see if we should lower the memset with target-specific
3823 // code. If the target chooses to do this, this is the next best.
3825 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3827 if (Result.getNode())
3830 // Emit a library call.
3831 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3832 TargetLowering::ArgListTy Args;
3833 TargetLowering::ArgListEntry Entry;
3834 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3835 Args.push_back(Entry);
3836 // Extend or truncate the argument to be an i32 value for the call.
3837 if (Src.getValueType().bitsGT(MVT::i32))
3838 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3840 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3842 Entry.Ty = Type::getInt32Ty(*getContext());
3843 Entry.isSExt = true;
3844 Args.push_back(Entry);
3846 Entry.Ty = IntPtrTy;
3847 Entry.isSExt = false;
3848 Args.push_back(Entry);
3849 // FIXME: pass in DebugLoc
3850 std::pair<SDValue,SDValue> CallResult =
3851 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3852 false, false, false, false, 0,
3853 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3854 /*isTailCall=*/false,
3855 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3856 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3857 TLI.getPointerTy()),
3859 return CallResult.second;
3862 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3863 SDValue Chain, SDValue Ptr, SDValue Cmp,
3864 SDValue Swp, MachinePointerInfo PtrInfo,
3866 AtomicOrdering Ordering,
3867 SynchronizationScope SynchScope) {
3868 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3869 Alignment = getEVTAlignment(MemVT);
3871 MachineFunction &MF = getMachineFunction();
3872 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3874 // For now, atomics are considered to be volatile always.
3875 // FIXME: Volatile isn't really correct; we should keep track of atomic
3876 // orderings in the memoperand.
3877 Flags |= MachineMemOperand::MOVolatile;
3879 MachineMemOperand *MMO =
3880 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3882 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3883 Ordering, SynchScope);
3886 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3888 SDValue Ptr, SDValue Cmp,
3889 SDValue Swp, MachineMemOperand *MMO,
3890 AtomicOrdering Ordering,
3891 SynchronizationScope SynchScope) {
3892 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3893 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3895 EVT VT = Cmp.getValueType();
3897 SDVTList VTs = getVTList(VT, MVT::Other);
3898 FoldingSetNodeID ID;
3899 ID.AddInteger(MemVT.getRawBits());
3900 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3901 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3903 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3904 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3905 return SDValue(E, 0);
3907 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3908 Ptr, Cmp, Swp, MMO, Ordering,
3910 CSEMap.InsertNode(N, IP);
3911 AllNodes.push_back(N);
3912 return SDValue(N, 0);
3915 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3917 SDValue Ptr, SDValue Val,
3918 const Value* PtrVal,
3920 AtomicOrdering Ordering,
3921 SynchronizationScope SynchScope) {
3922 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3923 Alignment = getEVTAlignment(MemVT);
3925 MachineFunction &MF = getMachineFunction();
3926 // A monotonic store does not load; a release store "loads" in the sense
3927 // that other stores cannot be sunk past it.
3928 // (An atomicrmw obviously both loads and stores.)
3929 unsigned Flags = MachineMemOperand::MOStore;
3930 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3931 Flags |= MachineMemOperand::MOLoad;
3933 // For now, atomics are considered to be volatile always.
3934 // FIXME: Volatile isn't really correct; we should keep track of atomic
3935 // orderings in the memoperand.
3936 Flags |= MachineMemOperand::MOVolatile;
3938 MachineMemOperand *MMO =
3939 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3940 MemVT.getStoreSize(), Alignment);
3942 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3943 Ordering, SynchScope);
3946 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3948 SDValue Ptr, SDValue Val,
3949 MachineMemOperand *MMO,
3950 AtomicOrdering Ordering,
3951 SynchronizationScope SynchScope) {
3952 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3953 Opcode == ISD::ATOMIC_LOAD_SUB ||
3954 Opcode == ISD::ATOMIC_LOAD_AND ||
3955 Opcode == ISD::ATOMIC_LOAD_OR ||
3956 Opcode == ISD::ATOMIC_LOAD_XOR ||
3957 Opcode == ISD::ATOMIC_LOAD_NAND ||
3958 Opcode == ISD::ATOMIC_LOAD_MIN ||
3959 Opcode == ISD::ATOMIC_LOAD_MAX ||
3960 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3961 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3962 Opcode == ISD::ATOMIC_SWAP ||
3963 Opcode == ISD::ATOMIC_STORE) &&
3964 "Invalid Atomic Op");
3966 EVT VT = Val.getValueType();
3968 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3969 getVTList(VT, MVT::Other);
3970 FoldingSetNodeID ID;
3971 ID.AddInteger(MemVT.getRawBits());
3972 SDValue Ops[] = {Chain, Ptr, Val};
3973 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3975 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3976 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3977 return SDValue(E, 0);
3979 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3981 Ordering, SynchScope);
3982 CSEMap.InsertNode(N, IP);
3983 AllNodes.push_back(N);
3984 return SDValue(N, 0);
3987 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3988 EVT VT, SDValue Chain,
3990 const Value* PtrVal,
3992 AtomicOrdering Ordering,
3993 SynchronizationScope SynchScope) {
3994 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3995 Alignment = getEVTAlignment(MemVT);
3997 MachineFunction &MF = getMachineFunction();
3998 // A monotonic load does not store; an acquire load "stores" in the sense
3999 // that other loads cannot be hoisted past it.
4000 unsigned Flags = MachineMemOperand::MOLoad;
4001 if (Ordering > Monotonic)
4002 Flags |= MachineMemOperand::MOStore;
4004 // For now, atomics are considered to be volatile always.
4005 // FIXME: Volatile isn't really correct; we should keep track of atomic
4006 // orderings in the memoperand.
4007 Flags |= MachineMemOperand::MOVolatile;
4009 MachineMemOperand *MMO =
4010 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4011 MemVT.getStoreSize(), Alignment);
4013 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4014 Ordering, SynchScope);
4017 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4018 EVT VT, SDValue Chain,
4020 MachineMemOperand *MMO,
4021 AtomicOrdering Ordering,
4022 SynchronizationScope SynchScope) {
4023 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4025 SDVTList VTs = getVTList(VT, MVT::Other);
4026 FoldingSetNodeID ID;
4027 ID.AddInteger(MemVT.getRawBits());
4028 SDValue Ops[] = {Chain, Ptr};
4029 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4031 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4032 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4033 return SDValue(E, 0);
4035 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4036 Ptr, MMO, Ordering, SynchScope);
4037 CSEMap.InsertNode(N, IP);
4038 AllNodes.push_back(N);
4039 return SDValue(N, 0);
4042 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4043 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4048 SmallVector<EVT, 4> VTs;
4049 VTs.reserve(NumOps);
4050 for (unsigned i = 0; i < NumOps; ++i)
4051 VTs.push_back(Ops[i].getValueType());
4052 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4057 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4058 const EVT *VTs, unsigned NumVTs,
4059 const SDValue *Ops, unsigned NumOps,
4060 EVT MemVT, MachinePointerInfo PtrInfo,
4061 unsigned Align, bool Vol,
4062 bool ReadMem, bool WriteMem) {
4063 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4064 MemVT, PtrInfo, Align, Vol,
4069 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4070 const SDValue *Ops, unsigned NumOps,
4071 EVT MemVT, MachinePointerInfo PtrInfo,
4072 unsigned Align, bool Vol,
4073 bool ReadMem, bool WriteMem) {
4074 if (Align == 0) // Ensure that codegen never sees alignment 0
4075 Align = getEVTAlignment(MemVT);
4077 MachineFunction &MF = getMachineFunction();
4080 Flags |= MachineMemOperand::MOStore;
4082 Flags |= MachineMemOperand::MOLoad;
4084 Flags |= MachineMemOperand::MOVolatile;
4085 MachineMemOperand *MMO =
4086 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4088 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4092 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4093 const SDValue *Ops, unsigned NumOps,
4094 EVT MemVT, MachineMemOperand *MMO) {
4095 assert((Opcode == ISD::INTRINSIC_VOID ||
4096 Opcode == ISD::INTRINSIC_W_CHAIN ||
4097 Opcode == ISD::PREFETCH ||
4098 (Opcode <= INT_MAX &&
4099 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4100 "Opcode is not a memory-accessing opcode!");
4102 // Memoize the node unless it returns a flag.
4103 MemIntrinsicSDNode *N;
4104 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4105 FoldingSetNodeID ID;
4106 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4109 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4110 return SDValue(E, 0);
4113 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4115 CSEMap.InsertNode(N, IP);
4117 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4120 AllNodes.push_back(N);
4121 return SDValue(N, 0);
4124 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4125 /// MachinePointerInfo record from it. This is particularly useful because the
4126 /// code generator has many cases where it doesn't bother passing in a
4127 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4128 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4129 // If this is FI+Offset, we can model it.
4130 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4131 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4133 // If this is (FI+Offset1)+Offset2, we can model it.
4134 if (Ptr.getOpcode() != ISD::ADD ||
4135 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4136 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4137 return MachinePointerInfo();
4139 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4140 return MachinePointerInfo::getFixedStack(FI, Offset+
4141 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4144 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4145 /// MachinePointerInfo record from it. This is particularly useful because the
4146 /// code generator has many cases where it doesn't bother passing in a
4147 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4148 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4149 // If the 'Offset' value isn't a constant, we can't handle this.
4150 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4151 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4152 if (OffsetOp.getOpcode() == ISD::UNDEF)
4153 return InferPointerInfo(Ptr);
4154 return MachinePointerInfo();
4159 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4160 EVT VT, DebugLoc dl, SDValue Chain,
4161 SDValue Ptr, SDValue Offset,
4162 MachinePointerInfo PtrInfo, EVT MemVT,
4163 bool isVolatile, bool isNonTemporal, bool isInvariant,
4164 unsigned Alignment, const MDNode *TBAAInfo) {
4165 assert(Chain.getValueType() == MVT::Other &&
4166 "Invalid chain type");
4167 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4168 Alignment = getEVTAlignment(VT);
4170 unsigned Flags = MachineMemOperand::MOLoad;
4172 Flags |= MachineMemOperand::MOVolatile;
4174 Flags |= MachineMemOperand::MONonTemporal;
4176 Flags |= MachineMemOperand::MOInvariant;
4178 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4181 PtrInfo = InferPointerInfo(Ptr, Offset);
4183 MachineFunction &MF = getMachineFunction();
4184 MachineMemOperand *MMO =
4185 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4187 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4191 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4192 EVT VT, DebugLoc dl, SDValue Chain,
4193 SDValue Ptr, SDValue Offset, EVT MemVT,
4194 MachineMemOperand *MMO) {
4196 ExtType = ISD::NON_EXTLOAD;
4197 } else if (ExtType == ISD::NON_EXTLOAD) {
4198 assert(VT == MemVT && "Non-extending load from different memory type!");
4201 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4202 "Should only be an extending load, not truncating!");
4203 assert(VT.isInteger() == MemVT.isInteger() &&
4204 "Cannot convert from FP to Int or Int -> FP!");
4205 assert(VT.isVector() == MemVT.isVector() &&
4206 "Cannot use trunc store to convert to or from a vector!");
4207 assert((!VT.isVector() ||
4208 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4209 "Cannot use trunc store to change the number of vector elements!");
4212 bool Indexed = AM != ISD::UNINDEXED;
4213 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4214 "Unindexed load with an offset!");
4216 SDVTList VTs = Indexed ?
4217 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4218 SDValue Ops[] = { Chain, Ptr, Offset };
4219 FoldingSetNodeID ID;
4220 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4221 ID.AddInteger(MemVT.getRawBits());
4222 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4223 MMO->isNonTemporal(),
4224 MMO->isInvariant()));
4226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4227 cast<LoadSDNode>(E)->refineAlignment(MMO);
4228 return SDValue(E, 0);
4230 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4232 CSEMap.InsertNode(N, IP);
4233 AllNodes.push_back(N);
4234 return SDValue(N, 0);
4237 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4238 SDValue Chain, SDValue Ptr,
4239 MachinePointerInfo PtrInfo,
4240 bool isVolatile, bool isNonTemporal,
4241 bool isInvariant, unsigned Alignment,
4242 const MDNode *TBAAInfo) {
4243 SDValue Undef = getUNDEF(Ptr.getValueType());
4244 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4245 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4249 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4250 SDValue Chain, SDValue Ptr,
4251 MachinePointerInfo PtrInfo, EVT MemVT,
4252 bool isVolatile, bool isNonTemporal,
4253 unsigned Alignment, const MDNode *TBAAInfo) {
4254 SDValue Undef = getUNDEF(Ptr.getValueType());
4255 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4256 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4262 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4263 SDValue Offset, ISD::MemIndexedMode AM) {
4264 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4265 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4266 "Load is already a indexed load!");
4267 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4268 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4269 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4270 false, LD->getAlignment());
4273 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4274 SDValue Ptr, MachinePointerInfo PtrInfo,
4275 bool isVolatile, bool isNonTemporal,
4276 unsigned Alignment, const MDNode *TBAAInfo) {
4277 assert(Chain.getValueType() == MVT::Other &&
4278 "Invalid chain type");
4279 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4280 Alignment = getEVTAlignment(Val.getValueType());
4282 unsigned Flags = MachineMemOperand::MOStore;
4284 Flags |= MachineMemOperand::MOVolatile;
4286 Flags |= MachineMemOperand::MONonTemporal;
4289 PtrInfo = InferPointerInfo(Ptr);
4291 MachineFunction &MF = getMachineFunction();
4292 MachineMemOperand *MMO =
4293 MF.getMachineMemOperand(PtrInfo, Flags,
4294 Val.getValueType().getStoreSize(), Alignment,
4297 return getStore(Chain, dl, Val, Ptr, MMO);
4300 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4301 SDValue Ptr, MachineMemOperand *MMO) {
4302 assert(Chain.getValueType() == MVT::Other &&
4303 "Invalid chain type");
4304 EVT VT = Val.getValueType();
4305 SDVTList VTs = getVTList(MVT::Other);
4306 SDValue Undef = getUNDEF(Ptr.getValueType());
4307 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4308 FoldingSetNodeID ID;
4309 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4310 ID.AddInteger(VT.getRawBits());
4311 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4312 MMO->isNonTemporal(), MMO->isInvariant()));
4314 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4315 cast<StoreSDNode>(E)->refineAlignment(MMO);
4316 return SDValue(E, 0);
4318 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4320 CSEMap.InsertNode(N, IP);
4321 AllNodes.push_back(N);
4322 return SDValue(N, 0);
4325 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4326 SDValue Ptr, MachinePointerInfo PtrInfo,
4327 EVT SVT,bool isVolatile, bool isNonTemporal,
4329 const MDNode *TBAAInfo) {
4330 assert(Chain.getValueType() == MVT::Other &&
4331 "Invalid chain type");
4332 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4333 Alignment = getEVTAlignment(SVT);
4335 unsigned Flags = MachineMemOperand::MOStore;
4337 Flags |= MachineMemOperand::MOVolatile;
4339 Flags |= MachineMemOperand::MONonTemporal;
4342 PtrInfo = InferPointerInfo(Ptr);
4344 MachineFunction &MF = getMachineFunction();
4345 MachineMemOperand *MMO =
4346 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4349 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4352 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4353 SDValue Ptr, EVT SVT,
4354 MachineMemOperand *MMO) {
4355 EVT VT = Val.getValueType();
4357 assert(Chain.getValueType() == MVT::Other &&
4358 "Invalid chain type");
4360 return getStore(Chain, dl, Val, Ptr, MMO);
4362 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4363 "Should only be a truncating store, not extending!");
4364 assert(VT.isInteger() == SVT.isInteger() &&
4365 "Can't do FP-INT conversion!");
4366 assert(VT.isVector() == SVT.isVector() &&
4367 "Cannot use trunc store to convert to or from a vector!");
4368 assert((!VT.isVector() ||
4369 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4370 "Cannot use trunc store to change the number of vector elements!");
4372 SDVTList VTs = getVTList(MVT::Other);
4373 SDValue Undef = getUNDEF(Ptr.getValueType());
4374 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4375 FoldingSetNodeID ID;
4376 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4377 ID.AddInteger(SVT.getRawBits());
4378 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4379 MMO->isNonTemporal(), MMO->isInvariant()));
4381 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4382 cast<StoreSDNode>(E)->refineAlignment(MMO);
4383 return SDValue(E, 0);
4385 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4387 CSEMap.InsertNode(N, IP);
4388 AllNodes.push_back(N);
4389 return SDValue(N, 0);
4393 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4394 SDValue Offset, ISD::MemIndexedMode AM) {
4395 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4396 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4397 "Store is already a indexed store!");
4398 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4399 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4400 FoldingSetNodeID ID;
4401 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4402 ID.AddInteger(ST->getMemoryVT().getRawBits());
4403 ID.AddInteger(ST->getRawSubclassData());
4405 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4406 return SDValue(E, 0);
4408 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4409 ST->isTruncatingStore(),
4411 ST->getMemOperand());
4412 CSEMap.InsertNode(N, IP);
4413 AllNodes.push_back(N);
4414 return SDValue(N, 0);
4417 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4418 SDValue Chain, SDValue Ptr,
4421 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4422 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4425 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4426 const SDUse *Ops, unsigned NumOps) {
4428 case 0: return getNode(Opcode, DL, VT);
4429 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4430 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4431 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4435 // Copy from an SDUse array into an SDValue array for use with
4436 // the regular getNode logic.
4437 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4438 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4441 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4442 const SDValue *Ops, unsigned NumOps) {
4444 case 0: return getNode(Opcode, DL, VT);
4445 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4446 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4447 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4453 case ISD::SELECT_CC: {
4454 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4455 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4456 "LHS and RHS of condition must have same type!");
4457 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4458 "True and False arms of SelectCC must have same type!");
4459 assert(Ops[2].getValueType() == VT &&
4460 "select_cc node must be of same type as true and false value!");
4464 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4465 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4466 "LHS/RHS of comparison should match types!");
4473 SDVTList VTs = getVTList(VT);
4475 if (VT != MVT::Glue) {
4476 FoldingSetNodeID ID;
4477 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4480 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4481 return SDValue(E, 0);
4483 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4484 CSEMap.InsertNode(N, IP);
4486 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4489 AllNodes.push_back(N);
4493 return SDValue(N, 0);
4496 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4497 const std::vector<EVT> &ResultTys,
4498 const SDValue *Ops, unsigned NumOps) {
4499 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4503 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4504 const EVT *VTs, unsigned NumVTs,
4505 const SDValue *Ops, unsigned NumOps) {
4507 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4508 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4511 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4512 const SDValue *Ops, unsigned NumOps) {
4513 if (VTList.NumVTs == 1)
4514 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4518 // FIXME: figure out how to safely handle things like
4519 // int foo(int x) { return 1 << (x & 255); }
4520 // int bar() { return foo(256); }
4521 case ISD::SRA_PARTS:
4522 case ISD::SRL_PARTS:
4523 case ISD::SHL_PARTS:
4524 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4525 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4526 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4527 else if (N3.getOpcode() == ISD::AND)
4528 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4529 // If the and is only masking out bits that cannot effect the shift,
4530 // eliminate the and.
4531 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4532 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4533 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4539 // Memoize the node unless it returns a flag.
4541 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4542 FoldingSetNodeID ID;
4543 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4545 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4546 return SDValue(E, 0);
4549 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4550 } else if (NumOps == 2) {
4551 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4552 } else if (NumOps == 3) {
4553 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4556 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4558 CSEMap.InsertNode(N, IP);
4561 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4562 } else if (NumOps == 2) {
4563 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4564 } else if (NumOps == 3) {
4565 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4568 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4571 AllNodes.push_back(N);
4575 return SDValue(N, 0);
4578 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4579 return getNode(Opcode, DL, VTList, 0, 0);
4582 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4584 SDValue Ops[] = { N1 };
4585 return getNode(Opcode, DL, VTList, Ops, 1);
4588 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4589 SDValue N1, SDValue N2) {
4590 SDValue Ops[] = { N1, N2 };
4591 return getNode(Opcode, DL, VTList, Ops, 2);
4594 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4595 SDValue N1, SDValue N2, SDValue N3) {
4596 SDValue Ops[] = { N1, N2, N3 };
4597 return getNode(Opcode, DL, VTList, Ops, 3);
4600 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4601 SDValue N1, SDValue N2, SDValue N3,
4603 SDValue Ops[] = { N1, N2, N3, N4 };
4604 return getNode(Opcode, DL, VTList, Ops, 4);
4607 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4608 SDValue N1, SDValue N2, SDValue N3,
4609 SDValue N4, SDValue N5) {
4610 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4611 return getNode(Opcode, DL, VTList, Ops, 5);
4614 SDVTList SelectionDAG::getVTList(EVT VT) {
4615 return makeVTList(SDNode::getValueTypeList(VT), 1);
4618 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4619 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4620 E = VTList.rend(); I != E; ++I)
4621 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4624 EVT *Array = Allocator.Allocate<EVT>(2);
4627 SDVTList Result = makeVTList(Array, 2);
4628 VTList.push_back(Result);
4632 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4633 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4634 E = VTList.rend(); I != E; ++I)
4635 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4639 EVT *Array = Allocator.Allocate<EVT>(3);
4643 SDVTList Result = makeVTList(Array, 3);
4644 VTList.push_back(Result);
4648 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4649 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4650 E = VTList.rend(); I != E; ++I)
4651 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4652 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4655 EVT *Array = Allocator.Allocate<EVT>(4);
4660 SDVTList Result = makeVTList(Array, 4);
4661 VTList.push_back(Result);
4665 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4667 case 0: llvm_unreachable("Cannot have nodes without results!");
4668 case 1: return getVTList(VTs[0]);
4669 case 2: return getVTList(VTs[0], VTs[1]);
4670 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4671 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4675 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4676 E = VTList.rend(); I != E; ++I) {
4677 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4680 bool NoMatch = false;
4681 for (unsigned i = 2; i != NumVTs; ++i)
4682 if (VTs[i] != I->VTs[i]) {
4690 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4691 std::copy(VTs, VTs+NumVTs, Array);
4692 SDVTList Result = makeVTList(Array, NumVTs);
4693 VTList.push_back(Result);
4698 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4699 /// specified operands. If the resultant node already exists in the DAG,
4700 /// this does not modify the specified node, instead it returns the node that
4701 /// already exists. If the resultant node does not exist in the DAG, the
4702 /// input node is returned. As a degenerate case, if you specify the same
4703 /// input operands as the node already has, the input node is returned.
4704 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4705 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4707 // Check to see if there is no change.
4708 if (Op == N->getOperand(0)) return N;
4710 // See if the modified node already exists.
4711 void *InsertPos = 0;
4712 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4715 // Nope it doesn't. Remove the node from its current place in the maps.
4717 if (!RemoveNodeFromCSEMaps(N))
4720 // Now we update the operands.
4721 N->OperandList[0].set(Op);
4723 // If this gets put into a CSE map, add it.
4724 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4728 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4729 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4731 // Check to see if there is no change.
4732 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4733 return N; // No operands changed, just return the input node.
4735 // See if the modified node already exists.
4736 void *InsertPos = 0;
4737 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4740 // Nope it doesn't. Remove the node from its current place in the maps.
4742 if (!RemoveNodeFromCSEMaps(N))
4745 // Now we update the operands.
4746 if (N->OperandList[0] != Op1)
4747 N->OperandList[0].set(Op1);
4748 if (N->OperandList[1] != Op2)
4749 N->OperandList[1].set(Op2);
4751 // If this gets put into a CSE map, add it.
4752 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4756 SDNode *SelectionDAG::
4757 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4758 SDValue Ops[] = { Op1, Op2, Op3 };
4759 return UpdateNodeOperands(N, Ops, 3);
4762 SDNode *SelectionDAG::
4763 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4764 SDValue Op3, SDValue Op4) {
4765 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4766 return UpdateNodeOperands(N, Ops, 4);
4769 SDNode *SelectionDAG::
4770 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4771 SDValue Op3, SDValue Op4, SDValue Op5) {
4772 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4773 return UpdateNodeOperands(N, Ops, 5);
4776 SDNode *SelectionDAG::
4777 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4778 assert(N->getNumOperands() == NumOps &&
4779 "Update with wrong number of operands");
4781 // Check to see if there is no change.
4782 bool AnyChange = false;
4783 for (unsigned i = 0; i != NumOps; ++i) {
4784 if (Ops[i] != N->getOperand(i)) {
4790 // No operands changed, just return the input node.
4791 if (!AnyChange) return N;
4793 // See if the modified node already exists.
4794 void *InsertPos = 0;
4795 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4798 // Nope it doesn't. Remove the node from its current place in the maps.
4800 if (!RemoveNodeFromCSEMaps(N))
4803 // Now we update the operands.
4804 for (unsigned i = 0; i != NumOps; ++i)
4805 if (N->OperandList[i] != Ops[i])
4806 N->OperandList[i].set(Ops[i]);
4808 // If this gets put into a CSE map, add it.
4809 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4813 /// DropOperands - Release the operands and set this node to have
4815 void SDNode::DropOperands() {
4816 // Unlike the code in MorphNodeTo that does this, we don't need to
4817 // watch for dead nodes here.
4818 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4824 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4827 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4829 SDVTList VTs = getVTList(VT);
4830 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4833 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4834 EVT VT, SDValue Op1) {
4835 SDVTList VTs = getVTList(VT);
4836 SDValue Ops[] = { Op1 };
4837 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4840 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4841 EVT VT, SDValue Op1,
4843 SDVTList VTs = getVTList(VT);
4844 SDValue Ops[] = { Op1, Op2 };
4845 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4848 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4849 EVT VT, SDValue Op1,
4850 SDValue Op2, SDValue Op3) {
4851 SDVTList VTs = getVTList(VT);
4852 SDValue Ops[] = { Op1, Op2, Op3 };
4853 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4856 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4857 EVT VT, const SDValue *Ops,
4859 SDVTList VTs = getVTList(VT);
4860 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4863 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4864 EVT VT1, EVT VT2, const SDValue *Ops,
4866 SDVTList VTs = getVTList(VT1, VT2);
4867 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4870 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4872 SDVTList VTs = getVTList(VT1, VT2);
4873 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4876 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4877 EVT VT1, EVT VT2, EVT VT3,
4878 const SDValue *Ops, unsigned NumOps) {
4879 SDVTList VTs = getVTList(VT1, VT2, VT3);
4880 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4883 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4884 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4885 const SDValue *Ops, unsigned NumOps) {
4886 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4887 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4890 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4893 SDVTList VTs = getVTList(VT1, VT2);
4894 SDValue Ops[] = { Op1 };
4895 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4898 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4900 SDValue Op1, SDValue Op2) {
4901 SDVTList VTs = getVTList(VT1, VT2);
4902 SDValue Ops[] = { Op1, Op2 };
4903 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4906 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4908 SDValue Op1, SDValue Op2,
4910 SDVTList VTs = getVTList(VT1, VT2);
4911 SDValue Ops[] = { Op1, Op2, Op3 };
4912 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4915 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4916 EVT VT1, EVT VT2, EVT VT3,
4917 SDValue Op1, SDValue Op2,
4919 SDVTList VTs = getVTList(VT1, VT2, VT3);
4920 SDValue Ops[] = { Op1, Op2, Op3 };
4921 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4924 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4925 SDVTList VTs, const SDValue *Ops,
4927 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4928 // Reset the NodeID to -1.
4933 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
4934 /// the line number information on the merged node since it is not possible to
4935 /// preserve the information that operation is associated with multiple lines.
4936 /// This will make the debugger working better at -O0, were there is a higher
4937 /// probability having other instructions associated with that line.
4939 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
4940 DebugLoc NLoc = N->getDebugLoc();
4941 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
4942 N->setDebugLoc(DebugLoc());
4947 /// MorphNodeTo - This *mutates* the specified node to have the specified
4948 /// return type, opcode, and operands.
4950 /// Note that MorphNodeTo returns the resultant node. If there is already a
4951 /// node of the specified opcode and operands, it returns that node instead of
4952 /// the current one. Note that the DebugLoc need not be the same.
4954 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4955 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4956 /// node, and because it doesn't require CSE recalculation for any of
4957 /// the node's users.
4959 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4960 SDVTList VTs, const SDValue *Ops,
4962 // If an identical node already exists, use it.
4964 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4965 FoldingSetNodeID ID;
4966 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4967 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4968 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
4971 if (!RemoveNodeFromCSEMaps(N))
4974 // Start the morphing.
4976 N->ValueList = VTs.VTs;
4977 N->NumValues = VTs.NumVTs;
4979 // Clear the operands list, updating used nodes to remove this from their
4980 // use list. Keep track of any operands that become dead as a result.
4981 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4982 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4984 SDNode *Used = Use.getNode();
4986 if (Used->use_empty())
4987 DeadNodeSet.insert(Used);
4990 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4991 // Initialize the memory references information.
4992 MN->setMemRefs(0, 0);
4993 // If NumOps is larger than the # of operands we can have in a
4994 // MachineSDNode, reallocate the operand list.
4995 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4996 if (MN->OperandsNeedDelete)
4997 delete[] MN->OperandList;
4998 if (NumOps > array_lengthof(MN->LocalOperands))
4999 // We're creating a final node that will live unmorphed for the
5000 // remainder of the current SelectionDAG iteration, so we can allocate
5001 // the operands directly out of a pool with no recycling metadata.
5002 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5005 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5006 MN->OperandsNeedDelete = false;
5008 MN->InitOperands(MN->OperandList, Ops, NumOps);
5010 // If NumOps is larger than the # of operands we currently have, reallocate
5011 // the operand list.
5012 if (NumOps > N->NumOperands) {
5013 if (N->OperandsNeedDelete)
5014 delete[] N->OperandList;
5015 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5016 N->OperandsNeedDelete = true;
5018 N->InitOperands(N->OperandList, Ops, NumOps);
5021 // Delete any nodes that are still dead after adding the uses for the
5023 if (!DeadNodeSet.empty()) {
5024 SmallVector<SDNode *, 16> DeadNodes;
5025 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5026 E = DeadNodeSet.end(); I != E; ++I)
5027 if ((*I)->use_empty())
5028 DeadNodes.push_back(*I);
5029 RemoveDeadNodes(DeadNodes);
5033 CSEMap.InsertNode(N, IP); // Memoize the new node.
5038 /// getMachineNode - These are used for target selectors to create a new node
5039 /// with specified return type(s), MachineInstr opcode, and operands.
5041 /// Note that getMachineNode returns the resultant node. If there is already a
5042 /// node of the specified opcode and operands, it returns that node instead of
5043 /// the current one.
5045 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5046 SDVTList VTs = getVTList(VT);
5047 return getMachineNode(Opcode, dl, VTs, 0, 0);
5051 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5052 SDVTList VTs = getVTList(VT);
5053 SDValue Ops[] = { Op1 };
5054 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5058 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5059 SDValue Op1, SDValue Op2) {
5060 SDVTList VTs = getVTList(VT);
5061 SDValue Ops[] = { Op1, Op2 };
5062 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5066 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5067 SDValue Op1, SDValue Op2, SDValue Op3) {
5068 SDVTList VTs = getVTList(VT);
5069 SDValue Ops[] = { Op1, Op2, Op3 };
5070 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5074 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5075 const SDValue *Ops, unsigned NumOps) {
5076 SDVTList VTs = getVTList(VT);
5077 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5081 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5082 SDVTList VTs = getVTList(VT1, VT2);
5083 return getMachineNode(Opcode, dl, VTs, 0, 0);
5087 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5088 EVT VT1, EVT VT2, SDValue Op1) {
5089 SDVTList VTs = getVTList(VT1, VT2);
5090 SDValue Ops[] = { Op1 };
5091 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5095 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5096 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5097 SDVTList VTs = getVTList(VT1, VT2);
5098 SDValue Ops[] = { Op1, Op2 };
5099 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5103 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5104 EVT VT1, EVT VT2, SDValue Op1,
5105 SDValue Op2, SDValue Op3) {
5106 SDVTList VTs = getVTList(VT1, VT2);
5107 SDValue Ops[] = { Op1, Op2, Op3 };
5108 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5112 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5114 const SDValue *Ops, unsigned NumOps) {
5115 SDVTList VTs = getVTList(VT1, VT2);
5116 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5120 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5121 EVT VT1, EVT VT2, EVT VT3,
5122 SDValue Op1, SDValue Op2) {
5123 SDVTList VTs = getVTList(VT1, VT2, VT3);
5124 SDValue Ops[] = { Op1, Op2 };
5125 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5129 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5130 EVT VT1, EVT VT2, EVT VT3,
5131 SDValue Op1, SDValue Op2, SDValue Op3) {
5132 SDVTList VTs = getVTList(VT1, VT2, VT3);
5133 SDValue Ops[] = { Op1, Op2, Op3 };
5134 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5138 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5139 EVT VT1, EVT VT2, EVT VT3,
5140 const SDValue *Ops, unsigned NumOps) {
5141 SDVTList VTs = getVTList(VT1, VT2, VT3);
5142 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5146 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5147 EVT VT2, EVT VT3, EVT VT4,
5148 const SDValue *Ops, unsigned NumOps) {
5149 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5150 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5154 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5155 const std::vector<EVT> &ResultTys,
5156 const SDValue *Ops, unsigned NumOps) {
5157 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5158 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5162 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5163 const SDValue *Ops, unsigned NumOps) {
5164 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5169 FoldingSetNodeID ID;
5170 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5173 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5177 // Allocate a new MachineSDNode.
5178 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5180 // Initialize the operands list.
5181 if (NumOps > array_lengthof(N->LocalOperands))
5182 // We're creating a final node that will live unmorphed for the
5183 // remainder of the current SelectionDAG iteration, so we can allocate
5184 // the operands directly out of a pool with no recycling metadata.
5185 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5188 N->InitOperands(N->LocalOperands, Ops, NumOps);
5189 N->OperandsNeedDelete = false;
5192 CSEMap.InsertNode(N, IP);
5194 AllNodes.push_back(N);
5196 VerifyMachineNode(N);
5201 /// getTargetExtractSubreg - A convenience function for creating
5202 /// TargetOpcode::EXTRACT_SUBREG nodes.
5204 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5206 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5207 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5208 VT, Operand, SRIdxVal);
5209 return SDValue(Subreg, 0);
5212 /// getTargetInsertSubreg - A convenience function for creating
5213 /// TargetOpcode::INSERT_SUBREG nodes.
5215 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5216 SDValue Operand, SDValue Subreg) {
5217 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5218 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5219 VT, Operand, Subreg, SRIdxVal);
5220 return SDValue(Result, 0);
5223 /// getNodeIfExists - Get the specified node if it's already available, or
5224 /// else return NULL.
5225 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5226 const SDValue *Ops, unsigned NumOps) {
5227 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5228 FoldingSetNodeID ID;
5229 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5237 /// getDbgValue - Creates a SDDbgValue node.
5240 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5241 DebugLoc DL, unsigned O) {
5242 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5246 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5247 DebugLoc DL, unsigned O) {
5248 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5252 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5253 DebugLoc DL, unsigned O) {
5254 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5259 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5260 /// pointed to by a use iterator is deleted, increment the use iterator
5261 /// so that it doesn't dangle.
5263 /// This class also manages a "downlink" DAGUpdateListener, to forward
5264 /// messages to ReplaceAllUsesWith's callers.
5266 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5267 SelectionDAG::DAGUpdateListener *DownLink;
5268 SDNode::use_iterator &UI;
5269 SDNode::use_iterator &UE;
5271 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5272 // Increment the iterator as needed.
5273 while (UI != UE && N == *UI)
5276 // Then forward the message.
5277 if (DownLink) DownLink->NodeDeleted(N, E);
5280 virtual void NodeUpdated(SDNode *N) {
5281 // Just forward the message.
5282 if (DownLink) DownLink->NodeUpdated(N);
5286 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5287 SDNode::use_iterator &ui,
5288 SDNode::use_iterator &ue)
5289 : DownLink(dl), UI(ui), UE(ue) {}
5294 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5295 /// This can cause recursive merging of nodes in the DAG.
5297 /// This version assumes From has a single result value.
5299 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5300 DAGUpdateListener *UpdateListener) {
5301 SDNode *From = FromN.getNode();
5302 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5303 "Cannot replace with this method!");
5304 assert(From != To.getNode() && "Cannot replace uses of with self");
5306 // Iterate over all the existing uses of From. New uses will be added
5307 // to the beginning of the use list, which we avoid visiting.
5308 // This specifically avoids visiting uses of From that arise while the
5309 // replacement is happening, because any such uses would be the result
5310 // of CSE: If an existing node looks like From after one of its operands
5311 // is replaced by To, we don't want to replace of all its users with To
5312 // too. See PR3018 for more info.
5313 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5314 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5318 // This node is about to morph, remove its old self from the CSE maps.
5319 RemoveNodeFromCSEMaps(User);
5321 // A user can appear in a use list multiple times, and when this
5322 // happens the uses are usually next to each other in the list.
5323 // To help reduce the number of CSE recomputations, process all
5324 // the uses of this user that we can find this way.
5326 SDUse &Use = UI.getUse();
5329 } while (UI != UE && *UI == User);
5331 // Now that we have modified User, add it back to the CSE maps. If it
5332 // already exists there, recursively merge the results together.
5333 AddModifiedNodeToCSEMaps(User, &Listener);
5336 // If we just RAUW'd the root, take note.
5337 if (FromN == getRoot())
5341 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5342 /// This can cause recursive merging of nodes in the DAG.
5344 /// This version assumes that for each value of From, there is a
5345 /// corresponding value in To in the same position with the same type.
5347 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5348 DAGUpdateListener *UpdateListener) {
5350 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5351 assert((!From->hasAnyUseOfValue(i) ||
5352 From->getValueType(i) == To->getValueType(i)) &&
5353 "Cannot use this version of ReplaceAllUsesWith!");
5356 // Handle the trivial case.
5360 // Iterate over just the existing users of From. See the comments in
5361 // the ReplaceAllUsesWith above.
5362 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5363 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5367 // This node is about to morph, remove its old self from the CSE maps.
5368 RemoveNodeFromCSEMaps(User);
5370 // A user can appear in a use list multiple times, and when this
5371 // happens the uses are usually next to each other in the list.
5372 // To help reduce the number of CSE recomputations, process all
5373 // the uses of this user that we can find this way.
5375 SDUse &Use = UI.getUse();
5378 } while (UI != UE && *UI == User);
5380 // Now that we have modified User, add it back to the CSE maps. If it
5381 // already exists there, recursively merge the results together.
5382 AddModifiedNodeToCSEMaps(User, &Listener);
5385 // If we just RAUW'd the root, take note.
5386 if (From == getRoot().getNode())
5387 setRoot(SDValue(To, getRoot().getResNo()));
5390 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5391 /// This can cause recursive merging of nodes in the DAG.
5393 /// This version can replace From with any result values. To must match the
5394 /// number and types of values returned by From.
5395 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5397 DAGUpdateListener *UpdateListener) {
5398 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5399 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5401 // Iterate over just the existing users of From. See the comments in
5402 // the ReplaceAllUsesWith above.
5403 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5404 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5408 // This node is about to morph, remove its old self from the CSE maps.
5409 RemoveNodeFromCSEMaps(User);
5411 // A user can appear in a use list multiple times, and when this
5412 // happens the uses are usually next to each other in the list.
5413 // To help reduce the number of CSE recomputations, process all
5414 // the uses of this user that we can find this way.
5416 SDUse &Use = UI.getUse();
5417 const SDValue &ToOp = To[Use.getResNo()];
5420 } while (UI != UE && *UI == User);
5422 // Now that we have modified User, add it back to the CSE maps. If it
5423 // already exists there, recursively merge the results together.
5424 AddModifiedNodeToCSEMaps(User, &Listener);
5427 // If we just RAUW'd the root, take note.
5428 if (From == getRoot().getNode())
5429 setRoot(SDValue(To[getRoot().getResNo()]));
5432 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5433 /// uses of other values produced by From.getNode() alone. The Deleted
5434 /// vector is handled the same way as for ReplaceAllUsesWith.
5435 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5436 DAGUpdateListener *UpdateListener){
5437 // Handle the really simple, really trivial case efficiently.
5438 if (From == To) return;
5440 // Handle the simple, trivial, case efficiently.
5441 if (From.getNode()->getNumValues() == 1) {
5442 ReplaceAllUsesWith(From, To, UpdateListener);
5446 // Iterate over just the existing users of From. See the comments in
5447 // the ReplaceAllUsesWith above.
5448 SDNode::use_iterator UI = From.getNode()->use_begin(),
5449 UE = From.getNode()->use_end();
5450 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5453 bool UserRemovedFromCSEMaps = false;
5455 // A user can appear in a use list multiple times, and when this
5456 // happens the uses are usually next to each other in the list.
5457 // To help reduce the number of CSE recomputations, process all
5458 // the uses of this user that we can find this way.
5460 SDUse &Use = UI.getUse();
5462 // Skip uses of different values from the same node.
5463 if (Use.getResNo() != From.getResNo()) {
5468 // If this node hasn't been modified yet, it's still in the CSE maps,
5469 // so remove its old self from the CSE maps.
5470 if (!UserRemovedFromCSEMaps) {
5471 RemoveNodeFromCSEMaps(User);
5472 UserRemovedFromCSEMaps = true;
5477 } while (UI != UE && *UI == User);
5479 // We are iterating over all uses of the From node, so if a use
5480 // doesn't use the specific value, no changes are made.
5481 if (!UserRemovedFromCSEMaps)
5484 // Now that we have modified User, add it back to the CSE maps. If it
5485 // already exists there, recursively merge the results together.
5486 AddModifiedNodeToCSEMaps(User, &Listener);
5489 // If we just RAUW'd the root, take note.
5490 if (From == getRoot())
5495 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5496 /// to record information about a use.
5503 /// operator< - Sort Memos by User.
5504 bool operator<(const UseMemo &L, const UseMemo &R) {
5505 return (intptr_t)L.User < (intptr_t)R.User;
5509 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5510 /// uses of other values produced by From.getNode() alone. The same value
5511 /// may appear in both the From and To list. The Deleted vector is
5512 /// handled the same way as for ReplaceAllUsesWith.
5513 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5516 DAGUpdateListener *UpdateListener){
5517 // Handle the simple, trivial case efficiently.
5519 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5521 // Read up all the uses and make records of them. This helps
5522 // processing new uses that are introduced during the
5523 // replacement process.
5524 SmallVector<UseMemo, 4> Uses;
5525 for (unsigned i = 0; i != Num; ++i) {
5526 unsigned FromResNo = From[i].getResNo();
5527 SDNode *FromNode = From[i].getNode();
5528 for (SDNode::use_iterator UI = FromNode->use_begin(),
5529 E = FromNode->use_end(); UI != E; ++UI) {
5530 SDUse &Use = UI.getUse();
5531 if (Use.getResNo() == FromResNo) {
5532 UseMemo Memo = { *UI, i, &Use };
5533 Uses.push_back(Memo);
5538 // Sort the uses, so that all the uses from a given User are together.
5539 std::sort(Uses.begin(), Uses.end());
5541 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5542 UseIndex != UseIndexEnd; ) {
5543 // We know that this user uses some value of From. If it is the right
5544 // value, update it.
5545 SDNode *User = Uses[UseIndex].User;
5547 // This node is about to morph, remove its old self from the CSE maps.
5548 RemoveNodeFromCSEMaps(User);
5550 // The Uses array is sorted, so all the uses for a given User
5551 // are next to each other in the list.
5552 // To help reduce the number of CSE recomputations, process all
5553 // the uses of this user that we can find this way.
5555 unsigned i = Uses[UseIndex].Index;
5556 SDUse &Use = *Uses[UseIndex].Use;
5560 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5562 // Now that we have modified User, add it back to the CSE maps. If it
5563 // already exists there, recursively merge the results together.
5564 AddModifiedNodeToCSEMaps(User, UpdateListener);
5568 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5569 /// based on their topological order. It returns the maximum id and a vector
5570 /// of the SDNodes* in assigned order by reference.
5571 unsigned SelectionDAG::AssignTopologicalOrder() {
5573 unsigned DAGSize = 0;
5575 // SortedPos tracks the progress of the algorithm. Nodes before it are
5576 // sorted, nodes after it are unsorted. When the algorithm completes
5577 // it is at the end of the list.
5578 allnodes_iterator SortedPos = allnodes_begin();
5580 // Visit all the nodes. Move nodes with no operands to the front of
5581 // the list immediately. Annotate nodes that do have operands with their
5582 // operand count. Before we do this, the Node Id fields of the nodes
5583 // may contain arbitrary values. After, the Node Id fields for nodes
5584 // before SortedPos will contain the topological sort index, and the
5585 // Node Id fields for nodes At SortedPos and after will contain the
5586 // count of outstanding operands.
5587 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5590 unsigned Degree = N->getNumOperands();
5592 // A node with no uses, add it to the result array immediately.
5593 N->setNodeId(DAGSize++);
5594 allnodes_iterator Q = N;
5596 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5597 assert(SortedPos != AllNodes.end() && "Overran node list");
5600 // Temporarily use the Node Id as scratch space for the degree count.
5601 N->setNodeId(Degree);
5605 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5606 // such that by the time the end is reached all nodes will be sorted.
5607 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5610 // N is in sorted position, so all its uses have one less operand
5611 // that needs to be sorted.
5612 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5615 unsigned Degree = P->getNodeId();
5616 assert(Degree != 0 && "Invalid node degree");
5619 // All of P's operands are sorted, so P may sorted now.
5620 P->setNodeId(DAGSize++);
5622 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5623 assert(SortedPos != AllNodes.end() && "Overran node list");
5626 // Update P's outstanding operand count.
5627 P->setNodeId(Degree);
5630 if (I == SortedPos) {
5633 dbgs() << "Overran sorted position:\n";
5636 llvm_unreachable(0);
5640 assert(SortedPos == AllNodes.end() &&
5641 "Topological sort incomplete!");
5642 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5643 "First node in topological sort is not the entry token!");
5644 assert(AllNodes.front().getNodeId() == 0 &&
5645 "First node in topological sort has non-zero id!");
5646 assert(AllNodes.front().getNumOperands() == 0 &&
5647 "First node in topological sort has operands!");
5648 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5649 "Last node in topologic sort has unexpected id!");
5650 assert(AllNodes.back().use_empty() &&
5651 "Last node in topologic sort has users!");
5652 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5656 /// AssignOrdering - Assign an order to the SDNode.
5657 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5658 assert(SD && "Trying to assign an order to a null node!");
5659 Ordering->add(SD, Order);
5662 /// GetOrdering - Get the order for the SDNode.
5663 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5664 assert(SD && "Trying to get the order of a null node!");
5665 return Ordering->getOrder(SD);
5668 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5669 /// value is produced by SD.
5670 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5671 DbgInfo->add(DB, SD, isParameter);
5673 SD->setHasDebugValue(true);
5676 /// TransferDbgValues - Transfer SDDbgValues.
5677 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5678 if (From == To || !From.getNode()->getHasDebugValue())
5680 SDNode *FromNode = From.getNode();
5681 SDNode *ToNode = To.getNode();
5682 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5683 SmallVector<SDDbgValue *, 2> ClonedDVs;
5684 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5686 SDDbgValue *Dbg = *I;
5687 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5688 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5689 Dbg->getOffset(), Dbg->getDebugLoc(),
5691 ClonedDVs.push_back(Clone);
5694 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5695 E = ClonedDVs.end(); I != E; ++I)
5696 AddDbgValue(*I, ToNode, false);
5699 //===----------------------------------------------------------------------===//
5701 //===----------------------------------------------------------------------===//
5703 HandleSDNode::~HandleSDNode() {
5707 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5708 const GlobalValue *GA,
5709 EVT VT, int64_t o, unsigned char TF)
5710 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5714 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5715 MachineMemOperand *mmo)
5716 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5717 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5718 MMO->isNonTemporal(), MMO->isInvariant());
5719 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5720 assert(isNonTemporal() == MMO->isNonTemporal() &&
5721 "Non-temporal encoding error!");
5722 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5725 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5726 const SDValue *Ops, unsigned NumOps, EVT memvt,
5727 MachineMemOperand *mmo)
5728 : SDNode(Opc, dl, VTs, Ops, NumOps),
5729 MemoryVT(memvt), MMO(mmo) {
5730 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5731 MMO->isNonTemporal(), MMO->isInvariant());
5732 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5733 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5736 /// Profile - Gather unique data for the node.
5738 void SDNode::Profile(FoldingSetNodeID &ID) const {
5739 AddNodeIDNode(ID, this);
5744 std::vector<EVT> VTs;
5747 VTs.reserve(MVT::LAST_VALUETYPE);
5748 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5749 VTs.push_back(MVT((MVT::SimpleValueType)i));
5754 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5755 static ManagedStatic<EVTArray> SimpleVTArray;
5756 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5758 /// getValueTypeList - Return a pointer to the specified value type.
5760 const EVT *SDNode::getValueTypeList(EVT VT) {
5761 if (VT.isExtended()) {
5762 sys::SmartScopedLock<true> Lock(*VTMutex);
5763 return &(*EVTs->insert(VT).first);
5765 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5766 "Value type out of range!");
5767 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5771 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5772 /// indicated value. This method ignores uses of other values defined by this
5774 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5775 assert(Value < getNumValues() && "Bad value!");
5777 // TODO: Only iterate over uses of a given value of the node
5778 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5779 if (UI.getUse().getResNo() == Value) {
5786 // Found exactly the right number of uses?
5791 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5792 /// value. This method ignores uses of other values defined by this operation.
5793 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5794 assert(Value < getNumValues() && "Bad value!");
5796 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5797 if (UI.getUse().getResNo() == Value)
5804 /// isOnlyUserOf - Return true if this node is the only use of N.
5806 bool SDNode::isOnlyUserOf(SDNode *N) const {
5808 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5819 /// isOperand - Return true if this node is an operand of N.
5821 bool SDValue::isOperandOf(SDNode *N) const {
5822 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5823 if (*this == N->getOperand(i))
5828 bool SDNode::isOperandOf(SDNode *N) const {
5829 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5830 if (this == N->OperandList[i].getNode())
5835 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5836 /// be a chain) reaches the specified operand without crossing any
5837 /// side-effecting instructions on any chain path. In practice, this looks
5838 /// through token factors and non-volatile loads. In order to remain efficient,
5839 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5840 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5841 unsigned Depth) const {
5842 if (*this == Dest) return true;
5844 // Don't search too deeply, we just want to be able to see through
5845 // TokenFactor's etc.
5846 if (Depth == 0) return false;
5848 // If this is a token factor, all inputs to the TF happen in parallel. If any
5849 // of the operands of the TF does not reach dest, then we cannot do the xform.
5850 if (getOpcode() == ISD::TokenFactor) {
5851 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5852 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5857 // Loads don't have side effects, look through them.
5858 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5859 if (!Ld->isVolatile())
5860 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5865 /// hasPredecessor - Return true if N is a predecessor of this node.
5866 /// N is either an operand of this node, or can be reached by recursively
5867 /// traversing up the operands.
5868 /// NOTE: This is an expensive method. Use it carefully.
5869 bool SDNode::hasPredecessor(const SDNode *N) const {
5870 SmallPtrSet<const SDNode *, 32> Visited;
5871 SmallVector<const SDNode *, 16> Worklist;
5872 return hasPredecessorHelper(N, Visited, Worklist);
5875 bool SDNode::hasPredecessorHelper(const SDNode *N,
5876 SmallPtrSet<const SDNode *, 32> &Visited,
5877 SmallVector<const SDNode *, 16> &Worklist) const {
5878 if (Visited.empty()) {
5879 Worklist.push_back(this);
5881 // Take a look in the visited set. If we've already encountered this node
5882 // we needn't search further.
5883 if (Visited.count(N))
5887 // Haven't visited N yet. Continue the search.
5888 while (!Worklist.empty()) {
5889 const SDNode *M = Worklist.pop_back_val();
5890 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5891 SDNode *Op = M->getOperand(i).getNode();
5892 if (Visited.insert(Op))
5893 Worklist.push_back(Op);
5902 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5903 assert(Num < NumOperands && "Invalid child # of SDNode!");
5904 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5907 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5908 switch (getOpcode()) {
5910 if (getOpcode() < ISD::BUILTIN_OP_END)
5911 return "<<Unknown DAG Node>>";
5912 if (isMachineOpcode()) {
5914 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5915 if (getMachineOpcode() < TII->getNumOpcodes())
5916 return TII->getName(getMachineOpcode());
5917 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5920 const TargetLowering &TLI = G->getTargetLoweringInfo();
5921 const char *Name = TLI.getTargetNodeName(getOpcode());
5922 if (Name) return Name;
5923 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5925 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5928 case ISD::DELETED_NODE:
5929 return "<<Deleted Node!>>";
5931 case ISD::PREFETCH: return "Prefetch";
5932 case ISD::MEMBARRIER: return "MemBarrier";
5933 case ISD::ATOMIC_FENCE: return "AtomicFence";
5934 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5935 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5936 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5937 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5938 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5939 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5940 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5941 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5942 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5943 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5944 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5945 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5946 case ISD::ATOMIC_LOAD: return "AtomicLoad";
5947 case ISD::ATOMIC_STORE: return "AtomicStore";
5948 case ISD::PCMARKER: return "PCMarker";
5949 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5950 case ISD::SRCVALUE: return "SrcValue";
5951 case ISD::MDNODE_SDNODE: return "MDNode";
5952 case ISD::EntryToken: return "EntryToken";
5953 case ISD::TokenFactor: return "TokenFactor";
5954 case ISD::AssertSext: return "AssertSext";
5955 case ISD::AssertZext: return "AssertZext";
5957 case ISD::BasicBlock: return "BasicBlock";
5958 case ISD::VALUETYPE: return "ValueType";
5959 case ISD::Register: return "Register";
5960 case ISD::RegisterMask: return "RegisterMask";
5961 case ISD::Constant: return "Constant";
5962 case ISD::ConstantFP: return "ConstantFP";
5963 case ISD::GlobalAddress: return "GlobalAddress";
5964 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5965 case ISD::FrameIndex: return "FrameIndex";
5966 case ISD::JumpTable: return "JumpTable";
5967 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5968 case ISD::RETURNADDR: return "RETURNADDR";
5969 case ISD::FRAMEADDR: return "FRAMEADDR";
5970 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5971 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5972 case ISD::LSDAADDR: return "LSDAADDR";
5973 case ISD::EHSELECTION: return "EHSELECTION";
5974 case ISD::EH_RETURN: return "EH_RETURN";
5975 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5976 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5977 case ISD::ConstantPool: return "ConstantPool";
5978 case ISD::ExternalSymbol: return "ExternalSymbol";
5979 case ISD::BlockAddress: return "BlockAddress";
5980 case ISD::INTRINSIC_WO_CHAIN:
5981 case ISD::INTRINSIC_VOID:
5982 case ISD::INTRINSIC_W_CHAIN: {
5983 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5984 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5985 if (IID < Intrinsic::num_intrinsics)
5986 return Intrinsic::getName((Intrinsic::ID)IID);
5987 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5988 return TII->getName(IID);
5989 llvm_unreachable("Invalid intrinsic ID");
5992 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5993 case ISD::TargetConstant: return "TargetConstant";
5994 case ISD::TargetConstantFP:return "TargetConstantFP";
5995 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5996 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5997 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5998 case ISD::TargetJumpTable: return "TargetJumpTable";
5999 case ISD::TargetConstantPool: return "TargetConstantPool";
6000 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
6001 case ISD::TargetBlockAddress: return "TargetBlockAddress";
6003 case ISD::CopyToReg: return "CopyToReg";
6004 case ISD::CopyFromReg: return "CopyFromReg";
6005 case ISD::UNDEF: return "undef";
6006 case ISD::MERGE_VALUES: return "merge_values";
6007 case ISD::INLINEASM: return "inlineasm";
6008 case ISD::EH_LABEL: return "eh_label";
6009 case ISD::HANDLENODE: return "handlenode";
6012 case ISD::FABS: return "fabs";
6013 case ISD::FNEG: return "fneg";
6014 case ISD::FSQRT: return "fsqrt";
6015 case ISD::FSIN: return "fsin";
6016 case ISD::FCOS: return "fcos";
6017 case ISD::FTRUNC: return "ftrunc";
6018 case ISD::FFLOOR: return "ffloor";
6019 case ISD::FCEIL: return "fceil";
6020 case ISD::FRINT: return "frint";
6021 case ISD::FNEARBYINT: return "fnearbyint";
6022 case ISD::FEXP: return "fexp";
6023 case ISD::FEXP2: return "fexp2";
6024 case ISD::FLOG: return "flog";
6025 case ISD::FLOG2: return "flog2";
6026 case ISD::FLOG10: return "flog10";
6029 case ISD::ADD: return "add";
6030 case ISD::SUB: return "sub";
6031 case ISD::MUL: return "mul";
6032 case ISD::MULHU: return "mulhu";
6033 case ISD::MULHS: return "mulhs";
6034 case ISD::SDIV: return "sdiv";
6035 case ISD::UDIV: return "udiv";
6036 case ISD::SREM: return "srem";
6037 case ISD::UREM: return "urem";
6038 case ISD::SMUL_LOHI: return "smul_lohi";
6039 case ISD::UMUL_LOHI: return "umul_lohi";
6040 case ISD::SDIVREM: return "sdivrem";
6041 case ISD::UDIVREM: return "udivrem";
6042 case ISD::AND: return "and";
6043 case ISD::OR: return "or";
6044 case ISD::XOR: return "xor";
6045 case ISD::SHL: return "shl";
6046 case ISD::SRA: return "sra";
6047 case ISD::SRL: return "srl";
6048 case ISD::ROTL: return "rotl";
6049 case ISD::ROTR: return "rotr";
6050 case ISD::FADD: return "fadd";
6051 case ISD::FSUB: return "fsub";
6052 case ISD::FMUL: return "fmul";
6053 case ISD::FDIV: return "fdiv";
6054 case ISD::FMA: return "fma";
6055 case ISD::FREM: return "frem";
6056 case ISD::FCOPYSIGN: return "fcopysign";
6057 case ISD::FGETSIGN: return "fgetsign";
6058 case ISD::FPOW: return "fpow";
6060 case ISD::FPOWI: return "fpowi";
6061 case ISD::SETCC: return "setcc";
6062 case ISD::SELECT: return "select";
6063 case ISD::VSELECT: return "vselect";
6064 case ISD::SELECT_CC: return "select_cc";
6065 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
6066 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
6067 case ISD::CONCAT_VECTORS: return "concat_vectors";
6068 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
6069 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
6070 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
6071 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
6072 case ISD::CARRY_FALSE: return "carry_false";
6073 case ISD::ADDC: return "addc";
6074 case ISD::ADDE: return "adde";
6075 case ISD::SADDO: return "saddo";
6076 case ISD::UADDO: return "uaddo";
6077 case ISD::SSUBO: return "ssubo";
6078 case ISD::USUBO: return "usubo";
6079 case ISD::SMULO: return "smulo";
6080 case ISD::UMULO: return "umulo";
6081 case ISD::SUBC: return "subc";
6082 case ISD::SUBE: return "sube";
6083 case ISD::SHL_PARTS: return "shl_parts";
6084 case ISD::SRA_PARTS: return "sra_parts";
6085 case ISD::SRL_PARTS: return "srl_parts";
6087 // Conversion operators.
6088 case ISD::SIGN_EXTEND: return "sign_extend";
6089 case ISD::ZERO_EXTEND: return "zero_extend";
6090 case ISD::ANY_EXTEND: return "any_extend";
6091 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
6092 case ISD::TRUNCATE: return "truncate";
6093 case ISD::FP_ROUND: return "fp_round";
6094 case ISD::FLT_ROUNDS_: return "flt_rounds";
6095 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6096 case ISD::FP_EXTEND: return "fp_extend";
6098 case ISD::SINT_TO_FP: return "sint_to_fp";
6099 case ISD::UINT_TO_FP: return "uint_to_fp";
6100 case ISD::FP_TO_SINT: return "fp_to_sint";
6101 case ISD::FP_TO_UINT: return "fp_to_uint";
6102 case ISD::BITCAST: return "bitcast";
6103 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6104 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6106 case ISD::CONVERT_RNDSAT: {
6107 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6108 default: llvm_unreachable("Unknown cvt code!");
6109 case ISD::CVT_FF: return "cvt_ff";
6110 case ISD::CVT_FS: return "cvt_fs";
6111 case ISD::CVT_FU: return "cvt_fu";
6112 case ISD::CVT_SF: return "cvt_sf";
6113 case ISD::CVT_UF: return "cvt_uf";
6114 case ISD::CVT_SS: return "cvt_ss";
6115 case ISD::CVT_SU: return "cvt_su";
6116 case ISD::CVT_US: return "cvt_us";
6117 case ISD::CVT_UU: return "cvt_uu";
6121 // Control flow instructions
6122 case ISD::BR: return "br";
6123 case ISD::BRIND: return "brind";
6124 case ISD::BR_JT: return "br_jt";
6125 case ISD::BRCOND: return "brcond";
6126 case ISD::BR_CC: return "br_cc";
6127 case ISD::CALLSEQ_START: return "callseq_start";
6128 case ISD::CALLSEQ_END: return "callseq_end";
6131 case ISD::LOAD: return "load";
6132 case ISD::STORE: return "store";
6133 case ISD::VAARG: return "vaarg";
6134 case ISD::VACOPY: return "vacopy";
6135 case ISD::VAEND: return "vaend";
6136 case ISD::VASTART: return "vastart";
6137 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6138 case ISD::EXTRACT_ELEMENT: return "extract_element";
6139 case ISD::BUILD_PAIR: return "build_pair";
6140 case ISD::STACKSAVE: return "stacksave";
6141 case ISD::STACKRESTORE: return "stackrestore";
6142 case ISD::TRAP: return "trap";
6145 case ISD::BSWAP: return "bswap";
6146 case ISD::CTPOP: return "ctpop";
6147 case ISD::CTTZ: return "cttz";
6148 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
6149 case ISD::CTLZ: return "ctlz";
6150 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
6153 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
6154 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
6157 switch (cast<CondCodeSDNode>(this)->get()) {
6158 default: llvm_unreachable("Unknown setcc condition!");
6159 case ISD::SETOEQ: return "setoeq";
6160 case ISD::SETOGT: return "setogt";
6161 case ISD::SETOGE: return "setoge";
6162 case ISD::SETOLT: return "setolt";
6163 case ISD::SETOLE: return "setole";
6164 case ISD::SETONE: return "setone";
6166 case ISD::SETO: return "seto";
6167 case ISD::SETUO: return "setuo";
6168 case ISD::SETUEQ: return "setue";
6169 case ISD::SETUGT: return "setugt";
6170 case ISD::SETUGE: return "setuge";
6171 case ISD::SETULT: return "setult";
6172 case ISD::SETULE: return "setule";
6173 case ISD::SETUNE: return "setune";
6175 case ISD::SETEQ: return "seteq";
6176 case ISD::SETGT: return "setgt";
6177 case ISD::SETGE: return "setge";
6178 case ISD::SETLT: return "setlt";
6179 case ISD::SETLE: return "setle";
6180 case ISD::SETNE: return "setne";
6182 case ISD::SETTRUE: return "settrue";
6183 case ISD::SETTRUE2: return "settrue2";
6184 case ISD::SETFALSE: return "setfalse";
6185 case ISD::SETFALSE2: return "setfalse2";
6190 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6199 return "<post-inc>";
6201 return "<post-dec>";
6205 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6206 std::string S = "< ";
6220 if (getByValAlign())
6221 S += "byval-align:" + utostr(getByValAlign()) + " ";
6223 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6225 S += "byval-size:" + utostr(getByValSize()) + " ";
6229 void SDNode::dump() const { dump(0); }
6230 void SDNode::dump(const SelectionDAG *G) const {
6235 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6236 OS << (void*)this << ": ";
6238 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6240 if (getValueType(i) == MVT::Other)
6243 OS << getValueType(i).getEVTString();
6245 OS << " = " << getOperationName(G);
6248 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6249 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6250 if (!MN->memoperands_empty()) {
6253 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6254 e = MN->memoperands_end(); i != e; ++i) {
6256 if (llvm::next(i) != e)
6261 } else if (const ShuffleVectorSDNode *SVN =
6262 dyn_cast<ShuffleVectorSDNode>(this)) {
6264 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6265 int Idx = SVN->getMaskElt(i);
6273 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6274 OS << '<' << CSDN->getAPIntValue() << '>';
6275 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6276 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6277 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6278 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6279 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6282 CSDN->getValueAPF().bitcastToAPInt().dump();
6285 } else if (const GlobalAddressSDNode *GADN =
6286 dyn_cast<GlobalAddressSDNode>(this)) {
6287 int64_t offset = GADN->getOffset();
6289 WriteAsOperand(OS, GADN->getGlobal());
6292 OS << " + " << offset;
6294 OS << " " << offset;
6295 if (unsigned int TF = GADN->getTargetFlags())
6296 OS << " [TF=" << TF << ']';
6297 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6298 OS << "<" << FIDN->getIndex() << ">";
6299 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6300 OS << "<" << JTDN->getIndex() << ">";
6301 if (unsigned int TF = JTDN->getTargetFlags())
6302 OS << " [TF=" << TF << ']';
6303 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6304 int offset = CP->getOffset();
6305 if (CP->isMachineConstantPoolEntry())
6306 OS << "<" << *CP->getMachineCPVal() << ">";
6308 OS << "<" << *CP->getConstVal() << ">";
6310 OS << " + " << offset;
6312 OS << " " << offset;
6313 if (unsigned int TF = CP->getTargetFlags())
6314 OS << " [TF=" << TF << ']';
6315 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6317 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6319 OS << LBB->getName() << " ";
6320 OS << (const void*)BBDN->getBasicBlock() << ">";
6321 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6322 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6323 } else if (const ExternalSymbolSDNode *ES =
6324 dyn_cast<ExternalSymbolSDNode>(this)) {
6325 OS << "'" << ES->getSymbol() << "'";
6326 if (unsigned int TF = ES->getTargetFlags())
6327 OS << " [TF=" << TF << ']';
6328 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6330 OS << "<" << M->getValue() << ">";
6333 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6335 OS << "<" << MD->getMD() << ">";
6338 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6339 OS << ":" << N->getVT().getEVTString();
6341 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6342 OS << "<" << *LD->getMemOperand();
6345 switch (LD->getExtensionType()) {
6346 default: doExt = false; break;
6347 case ISD::EXTLOAD: OS << ", anyext"; break;
6348 case ISD::SEXTLOAD: OS << ", sext"; break;
6349 case ISD::ZEXTLOAD: OS << ", zext"; break;
6352 OS << " from " << LD->getMemoryVT().getEVTString();
6354 const char *AM = getIndexedModeName(LD->getAddressingMode());
6359 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6360 OS << "<" << *ST->getMemOperand();
6362 if (ST->isTruncatingStore())
6363 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6365 const char *AM = getIndexedModeName(ST->getAddressingMode());
6370 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6371 OS << "<" << *M->getMemOperand() << ">";
6372 } else if (const BlockAddressSDNode *BA =
6373 dyn_cast<BlockAddressSDNode>(this)) {
6375 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6377 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6379 if (unsigned int TF = BA->getTargetFlags())
6380 OS << " [TF=" << TF << ']';
6384 if (unsigned Order = G->GetOrdering(this))
6385 OS << " [ORD=" << Order << ']';
6387 if (getNodeId() != -1)
6388 OS << " [ID=" << getNodeId() << ']';
6390 DebugLoc dl = getDebugLoc();
6391 if (G && !dl.isUnknown()) {
6393 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6395 // Omit the directory, since it's usually long and uninteresting.
6397 OS << Scope.getFilename();
6400 OS << ':' << dl.getLine();
6401 if (dl.getCol() != 0)
6402 OS << ':' << dl.getCol();
6406 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6408 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6409 if (i) OS << ", "; else OS << " ";
6410 OS << (void*)getOperand(i).getNode();
6411 if (unsigned RN = getOperand(i).getResNo())
6414 print_details(OS, G);
6417 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6418 const SelectionDAG *G, unsigned depth,
6430 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6431 // Don't follow chain operands.
6432 if (N->getOperand(i).getValueType() == MVT::Other)
6435 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6439 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6440 unsigned depth) const {
6441 printrWithDepthHelper(OS, this, G, depth, 0);
6444 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6445 // Don't print impossibly deep things.
6446 printrWithDepth(OS, G, 10);
6449 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6450 printrWithDepth(dbgs(), G, depth);
6453 void SDNode::dumprFull(const SelectionDAG *G) const {
6454 // Don't print impossibly deep things.
6455 dumprWithDepth(G, 10);
6458 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6459 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6460 if (N->getOperand(i).getNode()->hasOneUse())
6461 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6463 dbgs() << "\n" << std::string(indent+2, ' ')
6464 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6468 dbgs().indent(indent);
6472 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6473 assert(N->getNumValues() == 1 &&
6474 "Can't unroll a vector with multiple results!");
6476 EVT VT = N->getValueType(0);
6477 unsigned NE = VT.getVectorNumElements();
6478 EVT EltVT = VT.getVectorElementType();
6479 DebugLoc dl = N->getDebugLoc();
6481 SmallVector<SDValue, 8> Scalars;
6482 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6484 // If ResNE is 0, fully unroll the vector op.
6487 else if (NE > ResNE)
6491 for (i= 0; i != NE; ++i) {
6492 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6493 SDValue Operand = N->getOperand(j);
6494 EVT OperandVT = Operand.getValueType();
6495 if (OperandVT.isVector()) {
6496 // A vector operand; extract a single element.
6497 EVT OperandEltVT = OperandVT.getVectorElementType();
6498 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6501 getConstant(i, TLI.getPointerTy()));
6503 // A scalar operand; just use it as is.
6504 Operands[j] = Operand;
6508 switch (N->getOpcode()) {
6510 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6511 &Operands[0], Operands.size()));
6514 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6515 &Operands[0], Operands.size()));
6522 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6523 getShiftAmountOperand(Operands[0].getValueType(),
6526 case ISD::SIGN_EXTEND_INREG:
6527 case ISD::FP_ROUND_INREG: {
6528 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6529 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6531 getValueType(ExtVT)));
6536 for (; i < ResNE; ++i)
6537 Scalars.push_back(getUNDEF(EltVT));
6539 return getNode(ISD::BUILD_VECTOR, dl,
6540 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6541 &Scalars[0], Scalars.size());
6545 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6546 /// location that is 'Dist' units away from the location that the 'Base' load
6547 /// is loading from.
6548 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6549 unsigned Bytes, int Dist) const {
6550 if (LD->getChain() != Base->getChain())
6552 EVT VT = LD->getValueType(0);
6553 if (VT.getSizeInBits() / 8 != Bytes)
6556 SDValue Loc = LD->getOperand(1);
6557 SDValue BaseLoc = Base->getOperand(1);
6558 if (Loc.getOpcode() == ISD::FrameIndex) {
6559 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6561 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6562 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6563 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6564 int FS = MFI->getObjectSize(FI);
6565 int BFS = MFI->getObjectSize(BFI);
6566 if (FS != BFS || FS != (int)Bytes) return false;
6567 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6571 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6572 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6575 const GlobalValue *GV1 = NULL;
6576 const GlobalValue *GV2 = NULL;
6577 int64_t Offset1 = 0;
6578 int64_t Offset2 = 0;
6579 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6580 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6581 if (isGA1 && isGA2 && GV1 == GV2)
6582 return Offset1 == (Offset2 + Dist*Bytes);
6587 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6588 /// it cannot be inferred.
6589 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6590 // If this is a GlobalAddress + cst, return the alignment.
6591 const GlobalValue *GV;
6592 int64_t GVOffset = 0;
6593 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6594 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6595 APInt AllOnes = APInt::getAllOnesValue(PtrWidth);
6596 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6597 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes,
6598 KnownZero, KnownOne, TLI.getTargetData());
6599 unsigned AlignBits = KnownZero.countTrailingOnes();
6600 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6602 return MinAlign(Align, GVOffset);
6605 // If this is a direct reference to a stack slot, use information about the
6606 // stack slot's alignment.
6607 int FrameIdx = 1 << 31;
6608 int64_t FrameOffset = 0;
6609 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6610 FrameIdx = FI->getIndex();
6611 } else if (isBaseWithConstantOffset(Ptr) &&
6612 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6614 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6615 FrameOffset = Ptr.getConstantOperandVal(1);
6618 if (FrameIdx != (1 << 31)) {
6619 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6620 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6628 void SelectionDAG::dump() const {
6629 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6631 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6633 const SDNode *N = I;
6634 if (!N->hasOneUse() && N != getRoot().getNode())
6635 DumpNodes(N, 2, this);
6638 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6643 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6645 print_details(OS, G);
6648 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6649 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6650 const SelectionDAG *G, VisitedSDNodeSet &once) {
6651 if (!once.insert(N)) // If we've been here before, return now.
6654 // Dump the current SDNode, but don't end the line yet.
6658 // Having printed this SDNode, walk the children:
6659 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6660 const SDNode *child = N->getOperand(i).getNode();
6665 if (child->getNumOperands() == 0) {
6666 // This child has no grandchildren; print it inline right here.
6667 child->printr(OS, G);
6669 } else { // Just the address. FIXME: also print the child's opcode.
6671 if (unsigned RN = N->getOperand(i).getResNo())
6678 // Dump children that have grandchildren on their own line(s).
6679 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6680 const SDNode *child = N->getOperand(i).getNode();
6681 DumpNodesr(OS, child, indent+2, G, once);
6685 void SDNode::dumpr() const {
6686 VisitedSDNodeSet once;
6687 DumpNodesr(dbgs(), this, 0, 0, once);
6690 void SDNode::dumpr(const SelectionDAG *G) const {
6691 VisitedSDNodeSet once;
6692 DumpNodesr(dbgs(), this, 0, G, once);
6696 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6697 unsigned GlobalAddressSDNode::getAddressSpace() const {
6698 return getGlobal()->getType()->getAddressSpace();
6702 Type *ConstantPoolSDNode::getType() const {
6703 if (isMachineConstantPoolEntry())
6704 return Val.MachineCPVal->getType();
6705 return Val.ConstVal->getType();
6708 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6710 unsigned &SplatBitSize,
6712 unsigned MinSplatBits,
6714 EVT VT = getValueType(0);
6715 assert(VT.isVector() && "Expected a vector type");
6716 unsigned sz = VT.getSizeInBits();
6717 if (MinSplatBits > sz)
6720 SplatValue = APInt(sz, 0);
6721 SplatUndef = APInt(sz, 0);
6723 // Get the bits. Bits with undefined values (when the corresponding element
6724 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6725 // in SplatValue. If any of the values are not constant, give up and return
6727 unsigned int nOps = getNumOperands();
6728 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6729 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6731 for (unsigned j = 0; j < nOps; ++j) {
6732 unsigned i = isBigEndian ? nOps-1-j : j;
6733 SDValue OpVal = getOperand(i);
6734 unsigned BitPos = j * EltBitSize;
6736 if (OpVal.getOpcode() == ISD::UNDEF)
6737 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6738 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6739 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6740 zextOrTrunc(sz) << BitPos;
6741 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6742 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6747 // The build_vector is all constants or undefs. Find the smallest element
6748 // size that splats the vector.
6750 HasAnyUndefs = (SplatUndef != 0);
6753 unsigned HalfSize = sz / 2;
6754 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6755 APInt LowValue = SplatValue.trunc(HalfSize);
6756 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6757 APInt LowUndef = SplatUndef.trunc(HalfSize);
6759 // If the two halves do not match (ignoring undef bits), stop here.
6760 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6761 MinSplatBits > HalfSize)
6764 SplatValue = HighValue | LowValue;
6765 SplatUndef = HighUndef & LowUndef;
6774 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6775 // Find the first non-undef value in the shuffle mask.
6777 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6780 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6782 // Make sure all remaining elements are either undef or the same as the first
6784 for (int Idx = Mask[i]; i != e; ++i)
6785 if (Mask[i] >= 0 && Mask[i] != Idx)
6791 static void checkForCyclesHelper(const SDNode *N,
6792 SmallPtrSet<const SDNode*, 32> &Visited,
6793 SmallPtrSet<const SDNode*, 32> &Checked) {
6794 // If this node has already been checked, don't check it again.
6795 if (Checked.count(N))
6798 // If a node has already been visited on this depth-first walk, reject it as
6800 if (!Visited.insert(N)) {
6801 dbgs() << "Offending node:\n";
6803 errs() << "Detected cycle in SelectionDAG\n";
6807 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6808 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6815 void llvm::checkForCycles(const llvm::SDNode *N) {
6817 assert(N && "Checking nonexistant SDNode");
6818 SmallPtrSet<const SDNode*, 32> visited;
6819 SmallPtrSet<const SDNode*, 32> checked;
6820 checkForCyclesHelper(N, visited, checked);
6824 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6825 checkForCycles(DAG->getRoot().getNode());