1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/ValueTracking.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalAlias.h"
21 #include "llvm/GlobalVariable.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CallingConv.h"
26 #include "llvm/CodeGen/MachineBasicBlock.h"
27 #include "llvm/CodeGen/MachineConstantPool.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineModuleInfo.h"
30 #include "llvm/CodeGen/PseudoSourceValue.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetFrameInfo.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/System/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BIT_CONVERT)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BIT_CONVERT)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
200 for (unsigned i = 1; i < NumElems; ++i) {
201 SDValue V = N->getOperand(i);
202 if (V.getOpcode() != ISD::UNDEF)
208 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
209 /// when given the operation for (X op Y).
210 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
211 // To perform this operation, we just need to swap the L and G bits of the
213 unsigned OldL = (Operation >> 2) & 1;
214 unsigned OldG = (Operation >> 1) & 1;
215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
216 (OldL << 1) | // New G bit
217 (OldG << 2)); // New L bit.
220 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
221 /// 'op' is a valid SetCC operation.
222 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
223 unsigned Operation = Op;
225 Operation ^= 7; // Flip L, G, E bits, but not U.
227 Operation ^= 15; // Flip all of the condition bits.
229 if (Operation > ISD::SETTRUE2)
230 Operation &= ~8; // Don't let N and U bits get set.
232 return ISD::CondCode(Operation);
236 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
237 /// signed operation and 2 if the result is an unsigned comparison. Return zero
238 /// if the operation does not depend on the sign of the input (setne and seteq).
239 static int isSignedOp(ISD::CondCode Opcode) {
241 default: llvm_unreachable("Illegal integer setcc operation!");
243 case ISD::SETNE: return 0;
247 case ISD::SETGE: return 1;
251 case ISD::SETUGE: return 2;
255 /// getSetCCOrOperation - Return the result of a logical OR between different
256 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
257 /// returns SETCC_INVALID if it is not possible to represent the resultant
259 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
262 // Cannot fold a signed integer setcc with an unsigned integer setcc.
263 return ISD::SETCC_INVALID;
265 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
267 // If the N and U bits get set then the resultant comparison DOES suddenly
268 // care about orderedness, and is true when ordered.
269 if (Op > ISD::SETTRUE2)
270 Op &= ~16; // Clear the U bit if the N bit is set.
272 // Canonicalize illegal integer setcc's.
273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
276 return ISD::CondCode(Op);
279 /// getSetCCAndOperation - Return the result of a logical AND between different
280 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
281 /// function returns zero if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed setcc with an unsigned setcc.
287 return ISD::SETCC_INVALID;
289 // Combine all of the condition bits.
290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
292 // Canonicalize illegal integer setcc's.
296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
297 case ISD::SETOEQ: // SETEQ & SETU[LG]E
298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
307 const TargetMachine &SelectionDAG::getTarget() const {
308 return MF->getTarget();
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
749 void SelectionDAG::VerifyNode(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// getEVTAlignment - Compute the default alignment value for the
786 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
787 const Type *Ty = VT == MVT::iPTR ?
788 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
789 VT.getTypeForEVT(*getContext());
791 return TLI.getTargetData()->getABITypeAlignment(Ty);
794 // EntryNode could meaningfully have debug info if we can find it...
795 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
796 : TLI(tli), FLI(fli),
797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
798 Root(getEntryNode()), Ordering(0) {
799 AllNodes.push_back(&EntryNode);
800 Ordering = new SDNodeOrdering();
801 DbgInfo = new SDDbgInfo();
804 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
807 Context = &mf.getFunction()->getContext();
810 SelectionDAG::~SelectionDAG() {
817 void SelectionDAG::allnodes_clear() {
818 assert(&*AllNodes.begin() == &EntryNode);
819 AllNodes.remove(AllNodes.begin());
820 while (!AllNodes.empty())
821 DeallocateNode(AllNodes.begin());
824 void SelectionDAG::clear() {
826 OperandAllocator.Reset();
829 ExtendedValueTypeNodes.clear();
830 ExternalSymbols.clear();
831 TargetExternalSymbols.clear();
832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
833 static_cast<CondCodeSDNode*>(0));
834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
835 static_cast<SDNode*>(0));
837 EntryNode.UseList = 0;
838 AllNodes.push_back(&EntryNode);
839 Root = getEntryNode();
841 Ordering = new SDNodeOrdering();
844 DbgInfo = new SDDbgInfo();
847 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
848 return VT.bitsGT(Op.getValueType()) ?
849 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
850 getNode(ISD::TRUNCATE, DL, VT, Op);
853 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
854 return VT.bitsGT(Op.getValueType()) ?
855 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
856 getNode(ISD::TRUNCATE, DL, VT, Op);
859 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
860 assert(!VT.isVector() &&
861 "getZeroExtendInReg should use the vector element type instead of "
863 if (Op.getValueType() == VT) return Op;
864 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
865 APInt Imm = APInt::getLowBitsSet(BitWidth,
867 return getNode(ISD::AND, DL, Op.getValueType(), Op,
868 getConstant(Imm, Op.getValueType()));
871 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
873 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
874 EVT EltVT = VT.getScalarType();
876 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
877 return getNode(ISD::XOR, DL, VT, Val, NegOne);
880 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
881 EVT EltVT = VT.getScalarType();
882 assert((EltVT.getSizeInBits() >= 64 ||
883 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
884 "getConstant with a uint64_t value that doesn't fit in the type!");
885 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
888 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
889 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
892 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
893 assert(VT.isInteger() && "Cannot create FP integer constant!");
895 EVT EltVT = VT.getScalarType();
896 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
897 "APInt size does not match type size!");
899 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
901 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
905 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
907 return SDValue(N, 0);
910 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
911 CSEMap.InsertNode(N, IP);
912 AllNodes.push_back(N);
915 SDValue Result(N, 0);
917 SmallVector<SDValue, 8> Ops;
918 Ops.assign(VT.getVectorNumElements(), Result);
919 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
924 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
925 return getConstant(Val, TLI.getPointerTy(), isTarget);
929 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
930 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
933 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
934 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
936 EVT EltVT = VT.getScalarType();
938 // Do the map lookup using the actual bit pattern for the floating point
939 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
940 // we don't have issues with SNANs.
941 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
943 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
947 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
949 return SDValue(N, 0);
952 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
953 CSEMap.InsertNode(N, IP);
954 AllNodes.push_back(N);
957 SDValue Result(N, 0);
959 SmallVector<SDValue, 8> Ops;
960 Ops.assign(VT.getVectorNumElements(), Result);
961 // FIXME DebugLoc info might be appropriate here
962 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
967 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
968 EVT EltVT = VT.getScalarType();
970 return getConstantFP(APFloat((float)Val), VT, isTarget);
972 return getConstantFP(APFloat(Val), VT, isTarget);
975 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
976 EVT VT, int64_t Offset,
978 unsigned char TargetFlags) {
979 assert((TargetFlags == 0 || isTargetGA) &&
980 "Cannot set target flags on target-independent globals");
982 // Truncate (with sign-extension) the offset value to the pointer size.
983 EVT PTy = TLI.getPointerTy();
984 unsigned BitWidth = PTy.getSizeInBits();
986 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
988 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
990 // If GV is an alias then use the aliasee for determining thread-localness.
991 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
992 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
996 if (GVar && GVar->isThreadLocal())
997 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
999 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1001 FoldingSetNodeID ID;
1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1004 ID.AddInteger(Offset);
1005 ID.AddInteger(TargetFlags);
1007 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1008 return SDValue(E, 0);
1010 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1011 Offset, TargetFlags);
1012 CSEMap.InsertNode(N, IP);
1013 AllNodes.push_back(N);
1014 return SDValue(N, 0);
1017 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1018 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1019 FoldingSetNodeID ID;
1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1023 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1024 return SDValue(E, 0);
1026 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1027 CSEMap.InsertNode(N, IP);
1028 AllNodes.push_back(N);
1029 return SDValue(N, 0);
1032 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1033 unsigned char TargetFlags) {
1034 assert((TargetFlags == 0 || isTarget) &&
1035 "Cannot set target flags on target-independent jump tables");
1036 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1037 FoldingSetNodeID ID;
1038 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1040 ID.AddInteger(TargetFlags);
1042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1043 return SDValue(E, 0);
1045 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1047 CSEMap.InsertNode(N, IP);
1048 AllNodes.push_back(N);
1049 return SDValue(N, 0);
1052 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1053 unsigned Alignment, int Offset,
1055 unsigned char TargetFlags) {
1056 assert((TargetFlags == 0 || isTarget) &&
1057 "Cannot set target flags on target-independent globals");
1059 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1060 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1061 FoldingSetNodeID ID;
1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1063 ID.AddInteger(Alignment);
1064 ID.AddInteger(Offset);
1066 ID.AddInteger(TargetFlags);
1068 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1069 return SDValue(E, 0);
1071 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1072 Alignment, TargetFlags);
1073 CSEMap.InsertNode(N, IP);
1074 AllNodes.push_back(N);
1075 return SDValue(N, 0);
1079 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1080 unsigned Alignment, int Offset,
1082 unsigned char TargetFlags) {
1083 assert((TargetFlags == 0 || isTarget) &&
1084 "Cannot set target flags on target-independent globals");
1086 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1087 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1088 FoldingSetNodeID ID;
1089 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1090 ID.AddInteger(Alignment);
1091 ID.AddInteger(Offset);
1092 C->AddSelectionDAGCSEId(ID);
1093 ID.AddInteger(TargetFlags);
1095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1096 return SDValue(E, 0);
1098 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1099 Alignment, TargetFlags);
1100 CSEMap.InsertNode(N, IP);
1101 AllNodes.push_back(N);
1102 return SDValue(N, 0);
1105 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1106 FoldingSetNodeID ID;
1107 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1111 return SDValue(E, 0);
1113 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1114 CSEMap.InsertNode(N, IP);
1115 AllNodes.push_back(N);
1116 return SDValue(N, 0);
1119 SDValue SelectionDAG::getValueType(EVT VT) {
1120 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1121 ValueTypeNodes.size())
1122 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1124 SDNode *&N = VT.isExtended() ?
1125 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1127 if (N) return SDValue(N, 0);
1128 N = new (NodeAllocator) VTSDNode(VT);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1134 SDNode *&N = ExternalSymbols[Sym];
1135 if (N) return SDValue(N, 0);
1136 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1142 unsigned char TargetFlags) {
1144 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1146 if (N) return SDValue(N, 0);
1147 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1148 AllNodes.push_back(N);
1149 return SDValue(N, 0);
1152 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1153 if ((unsigned)Cond >= CondCodeNodes.size())
1154 CondCodeNodes.resize(Cond+1);
1156 if (CondCodeNodes[Cond] == 0) {
1157 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1158 CondCodeNodes[Cond] = N;
1159 AllNodes.push_back(N);
1162 return SDValue(CondCodeNodes[Cond], 0);
1165 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1166 // the shuffle mask M that point at N1 to point at N2, and indices that point
1167 // N2 to point at N1.
1168 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1170 int NElts = M.size();
1171 for (int i = 0; i != NElts; ++i) {
1179 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1180 SDValue N2, const int *Mask) {
1181 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1182 assert(VT.isVector() && N1.getValueType().isVector() &&
1183 "Vector Shuffle VTs must be a vectors");
1184 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1185 && "Vector Shuffle VTs must have same element type");
1187 // Canonicalize shuffle undef, undef -> undef
1188 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1189 return getUNDEF(VT);
1191 // Validate that all indices in Mask are within the range of the elements
1192 // input to the shuffle.
1193 unsigned NElts = VT.getVectorNumElements();
1194 SmallVector<int, 8> MaskVec;
1195 for (unsigned i = 0; i != NElts; ++i) {
1196 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1197 MaskVec.push_back(Mask[i]);
1200 // Canonicalize shuffle v, v -> v, undef
1203 for (unsigned i = 0; i != NElts; ++i)
1204 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1207 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1208 if (N1.getOpcode() == ISD::UNDEF)
1209 commuteShuffle(N1, N2, MaskVec);
1211 // Canonicalize all index into lhs, -> shuffle lhs, undef
1212 // Canonicalize all index into rhs, -> shuffle rhs, undef
1213 bool AllLHS = true, AllRHS = true;
1214 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1215 for (unsigned i = 0; i != NElts; ++i) {
1216 if (MaskVec[i] >= (int)NElts) {
1221 } else if (MaskVec[i] >= 0) {
1225 if (AllLHS && AllRHS)
1226 return getUNDEF(VT);
1227 if (AllLHS && !N2Undef)
1231 commuteShuffle(N1, N2, MaskVec);
1234 // If Identity shuffle, or all shuffle in to undef, return that node.
1235 bool AllUndef = true;
1236 bool Identity = true;
1237 for (unsigned i = 0; i != NElts; ++i) {
1238 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1239 if (MaskVec[i] >= 0) AllUndef = false;
1241 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1244 return getUNDEF(VT);
1246 FoldingSetNodeID ID;
1247 SDValue Ops[2] = { N1, N2 };
1248 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1249 for (unsigned i = 0; i != NElts; ++i)
1250 ID.AddInteger(MaskVec[i]);
1253 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1254 return SDValue(E, 0);
1256 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1257 // SDNode doesn't have access to it. This memory will be "leaked" when
1258 // the node is deallocated, but recovered when the NodeAllocator is released.
1259 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1260 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1262 ShuffleVectorSDNode *N =
1263 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1264 CSEMap.InsertNode(N, IP);
1265 AllNodes.push_back(N);
1266 return SDValue(N, 0);
1269 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1270 SDValue Val, SDValue DTy,
1271 SDValue STy, SDValue Rnd, SDValue Sat,
1272 ISD::CvtCode Code) {
1273 // If the src and dest types are the same and the conversion is between
1274 // integer types of the same sign or two floats, no conversion is necessary.
1276 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1279 FoldingSetNodeID ID;
1280 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1281 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1288 CSEMap.InsertNode(N, IP);
1289 AllNodes.push_back(N);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1294 FoldingSetNodeID ID;
1295 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1296 ID.AddInteger(RegNo);
1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1299 return SDValue(E, 0);
1301 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1302 CSEMap.InsertNode(N, IP);
1303 AllNodes.push_back(N);
1304 return SDValue(N, 0);
1307 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1308 FoldingSetNodeID ID;
1309 SDValue Ops[] = { Root };
1310 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1311 ID.AddPointer(Label);
1313 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1314 return SDValue(E, 0);
1316 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1317 CSEMap.InsertNode(N, IP);
1318 AllNodes.push_back(N);
1319 return SDValue(N, 0);
1323 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1325 unsigned char TargetFlags) {
1326 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1328 FoldingSetNodeID ID;
1329 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1331 ID.AddInteger(TargetFlags);
1333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1334 return SDValue(E, 0);
1336 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1337 CSEMap.InsertNode(N, IP);
1338 AllNodes.push_back(N);
1339 return SDValue(N, 0);
1342 SDValue SelectionDAG::getSrcValue(const Value *V) {
1343 assert((!V || V->getType()->isPointerTy()) &&
1344 "SrcValue is not a pointer?");
1346 FoldingSetNodeID ID;
1347 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1351 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1352 return SDValue(E, 0);
1354 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1355 CSEMap.InsertNode(N, IP);
1356 AllNodes.push_back(N);
1357 return SDValue(N, 0);
1360 /// getShiftAmountOperand - Return the specified value casted to
1361 /// the target's desired shift amount type.
1362 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1363 EVT OpTy = Op.getValueType();
1364 MVT ShTy = TLI.getShiftAmountTy();
1365 if (OpTy == ShTy || OpTy.isVector()) return Op;
1367 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1368 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1371 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1372 /// specified value type.
1373 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1374 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1375 unsigned ByteSize = VT.getStoreSize();
1376 const Type *Ty = VT.getTypeForEVT(*getContext());
1377 unsigned StackAlign =
1378 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1380 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1381 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1384 /// CreateStackTemporary - Create a stack temporary suitable for holding
1385 /// either of the specified value types.
1386 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1387 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1388 VT2.getStoreSizeInBits())/8;
1389 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1390 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1391 const TargetData *TD = TLI.getTargetData();
1392 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1393 TD->getPrefTypeAlignment(Ty2));
1395 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1396 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1397 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1400 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1401 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1402 // These setcc operations always fold.
1406 case ISD::SETFALSE2: return getConstant(0, VT);
1408 case ISD::SETTRUE2: return getConstant(1, VT);
1420 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1424 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1425 const APInt &C2 = N2C->getAPIntValue();
1426 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1427 const APInt &C1 = N1C->getAPIntValue();
1430 default: llvm_unreachable("Unknown integer setcc!");
1431 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1432 case ISD::SETNE: return getConstant(C1 != C2, VT);
1433 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1434 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1435 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1436 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1437 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1438 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1439 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1440 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1444 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1445 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1446 // No compile time operations on this type yet.
1447 if (N1C->getValueType(0) == MVT::ppcf128)
1450 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1453 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1454 return getUNDEF(VT);
1456 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1457 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1458 return getUNDEF(VT);
1460 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1461 R==APFloat::cmpLessThan, VT);
1462 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1466 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1467 return getUNDEF(VT);
1469 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1470 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1471 return getUNDEF(VT);
1473 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1474 R==APFloat::cmpEqual, VT);
1475 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1476 return getUNDEF(VT);
1478 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1479 R==APFloat::cmpEqual, VT);
1480 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1481 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1482 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1483 R==APFloat::cmpEqual, VT);
1484 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1485 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1486 R==APFloat::cmpLessThan, VT);
1487 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1488 R==APFloat::cmpUnordered, VT);
1489 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1490 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1493 // Ensure that the constant occurs on the RHS.
1494 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1498 // Could not fold it.
1502 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1503 /// use this predicate to simplify operations downstream.
1504 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1505 // This predicate is not safe for vector operations.
1506 if (Op.getValueType().isVector())
1509 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1510 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1513 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1514 /// this predicate to simplify operations downstream. Mask is known to be zero
1515 /// for bits that V cannot have.
1516 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1517 unsigned Depth) const {
1518 APInt KnownZero, KnownOne;
1519 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1520 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1521 return (KnownZero & Mask) == Mask;
1524 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1525 /// known to be either zero or one and return them in the KnownZero/KnownOne
1526 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1528 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1529 APInt &KnownZero, APInt &KnownOne,
1530 unsigned Depth) const {
1531 unsigned BitWidth = Mask.getBitWidth();
1532 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1533 "Mask size mismatches value type size!");
1535 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1536 if (Depth == 6 || Mask == 0)
1537 return; // Limit search depth.
1539 APInt KnownZero2, KnownOne2;
1541 switch (Op.getOpcode()) {
1543 // We know all of the bits for a constant!
1544 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1545 KnownZero = ~KnownOne & Mask;
1548 // If either the LHS or the RHS are Zero, the result is zero.
1549 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1550 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1551 KnownZero2, KnownOne2, Depth+1);
1552 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1553 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1555 // Output known-1 bits are only known if set in both the LHS & RHS.
1556 KnownOne &= KnownOne2;
1557 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1558 KnownZero |= KnownZero2;
1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1562 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1563 KnownZero2, KnownOne2, Depth+1);
1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1567 // Output known-0 bits are only known if clear in both the LHS & RHS.
1568 KnownZero &= KnownZero2;
1569 // Output known-1 are known to be set if set in either the LHS | RHS.
1570 KnownOne |= KnownOne2;
1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1574 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1575 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1576 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1578 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1579 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1580 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1581 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1582 KnownZero = KnownZeroOut;
1586 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1587 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1588 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1590 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1592 // If low bits are zero in either operand, output low known-0 bits.
1593 // Also compute a conserative estimate for high known-0 bits.
1594 // More trickiness is possible, but this is sufficient for the
1595 // interesting case of alignment computation.
1597 unsigned TrailZ = KnownZero.countTrailingOnes() +
1598 KnownZero2.countTrailingOnes();
1599 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1600 KnownZero2.countLeadingOnes(),
1601 BitWidth) - BitWidth;
1603 TrailZ = std::min(TrailZ, BitWidth);
1604 LeadZ = std::min(LeadZ, BitWidth);
1605 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1606 APInt::getHighBitsSet(BitWidth, LeadZ);
1611 // For the purposes of computing leading zeros we can conservatively
1612 // treat a udiv as a logical right shift by the power of 2 known to
1613 // be less than the denominator.
1614 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1615 ComputeMaskedBits(Op.getOperand(0),
1616 AllOnes, KnownZero2, KnownOne2, Depth+1);
1617 unsigned LeadZ = KnownZero2.countLeadingOnes();
1621 ComputeMaskedBits(Op.getOperand(1),
1622 AllOnes, KnownZero2, KnownOne2, Depth+1);
1623 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1624 if (RHSUnknownLeadingOnes != BitWidth)
1625 LeadZ = std::min(BitWidth,
1626 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1628 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1632 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1633 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1637 // Only known if known in both the LHS and RHS.
1638 KnownOne &= KnownOne2;
1639 KnownZero &= KnownZero2;
1641 case ISD::SELECT_CC:
1642 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1643 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1644 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1645 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1647 // Only known if known in both the LHS and RHS.
1648 KnownOne &= KnownOne2;
1649 KnownZero &= KnownZero2;
1657 if (Op.getResNo() != 1)
1659 // The boolean result conforms to getBooleanContents. Fall through.
1661 // If we know the result of a setcc has the top bits zero, use this info.
1662 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1664 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1667 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1668 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1669 unsigned ShAmt = SA->getZExtValue();
1671 // If the shift count is an invalid immediate, don't do anything.
1672 if (ShAmt >= BitWidth)
1675 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1676 KnownZero, KnownOne, Depth+1);
1677 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1678 KnownZero <<= ShAmt;
1680 // low bits known zero.
1681 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1685 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1686 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1687 unsigned ShAmt = SA->getZExtValue();
1689 // If the shift count is an invalid immediate, don't do anything.
1690 if (ShAmt >= BitWidth)
1693 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1694 KnownZero, KnownOne, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 KnownZero = KnownZero.lshr(ShAmt);
1697 KnownOne = KnownOne.lshr(ShAmt);
1699 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1700 KnownZero |= HighBits; // High bits known zero.
1704 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1705 unsigned ShAmt = SA->getZExtValue();
1707 // If the shift count is an invalid immediate, don't do anything.
1708 if (ShAmt >= BitWidth)
1711 APInt InDemandedMask = (Mask << ShAmt);
1712 // If any of the demanded bits are produced by the sign extension, we also
1713 // demand the input sign bit.
1714 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1715 if (HighBits.getBoolValue())
1716 InDemandedMask |= APInt::getSignBit(BitWidth);
1718 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1720 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1721 KnownZero = KnownZero.lshr(ShAmt);
1722 KnownOne = KnownOne.lshr(ShAmt);
1724 // Handle the sign bits.
1725 APInt SignBit = APInt::getSignBit(BitWidth);
1726 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1728 if (KnownZero.intersects(SignBit)) {
1729 KnownZero |= HighBits; // New bits are known zero.
1730 } else if (KnownOne.intersects(SignBit)) {
1731 KnownOne |= HighBits; // New bits are known one.
1735 case ISD::SIGN_EXTEND_INREG: {
1736 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1737 unsigned EBits = EVT.getScalarType().getSizeInBits();
1739 // Sign extension. Compute the demanded bits in the result that are not
1740 // present in the input.
1741 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1743 APInt InSignBit = APInt::getSignBit(EBits);
1744 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1746 // If the sign extended bits are demanded, we know that the sign
1748 InSignBit.zext(BitWidth);
1749 if (NewBits.getBoolValue())
1750 InputDemandedBits |= InSignBit;
1752 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1753 KnownZero, KnownOne, Depth+1);
1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1756 // If the sign bit of the input is known set or clear, then we know the
1757 // top bits of the result.
1758 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1759 KnownZero |= NewBits;
1760 KnownOne &= ~NewBits;
1761 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1762 KnownOne |= NewBits;
1763 KnownZero &= ~NewBits;
1764 } else { // Input sign bit unknown
1765 KnownZero &= ~NewBits;
1766 KnownOne &= ~NewBits;
1773 unsigned LowBits = Log2_32(BitWidth)+1;
1774 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1779 if (ISD::isZEXTLoad(Op.getNode())) {
1780 LoadSDNode *LD = cast<LoadSDNode>(Op);
1781 EVT VT = LD->getMemoryVT();
1782 unsigned MemBits = VT.getScalarType().getSizeInBits();
1783 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1787 case ISD::ZERO_EXTEND: {
1788 EVT InVT = Op.getOperand(0).getValueType();
1789 unsigned InBits = InVT.getScalarType().getSizeInBits();
1790 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1791 APInt InMask = Mask;
1792 InMask.trunc(InBits);
1793 KnownZero.trunc(InBits);
1794 KnownOne.trunc(InBits);
1795 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1796 KnownZero.zext(BitWidth);
1797 KnownOne.zext(BitWidth);
1798 KnownZero |= NewBits;
1801 case ISD::SIGN_EXTEND: {
1802 EVT InVT = Op.getOperand(0).getValueType();
1803 unsigned InBits = InVT.getScalarType().getSizeInBits();
1804 APInt InSignBit = APInt::getSignBit(InBits);
1805 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1806 APInt InMask = Mask;
1807 InMask.trunc(InBits);
1809 // If any of the sign extended bits are demanded, we know that the sign
1810 // bit is demanded. Temporarily set this bit in the mask for our callee.
1811 if (NewBits.getBoolValue())
1812 InMask |= InSignBit;
1814 KnownZero.trunc(InBits);
1815 KnownOne.trunc(InBits);
1816 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1818 // Note if the sign bit is known to be zero or one.
1819 bool SignBitKnownZero = KnownZero.isNegative();
1820 bool SignBitKnownOne = KnownOne.isNegative();
1821 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1822 "Sign bit can't be known to be both zero and one!");
1824 // If the sign bit wasn't actually demanded by our caller, we don't
1825 // want it set in the KnownZero and KnownOne result values. Reset the
1826 // mask and reapply it to the result values.
1828 InMask.trunc(InBits);
1829 KnownZero &= InMask;
1832 KnownZero.zext(BitWidth);
1833 KnownOne.zext(BitWidth);
1835 // If the sign bit is known zero or one, the top bits match.
1836 if (SignBitKnownZero)
1837 KnownZero |= NewBits;
1838 else if (SignBitKnownOne)
1839 KnownOne |= NewBits;
1842 case ISD::ANY_EXTEND: {
1843 EVT InVT = Op.getOperand(0).getValueType();
1844 unsigned InBits = InVT.getScalarType().getSizeInBits();
1845 APInt InMask = Mask;
1846 InMask.trunc(InBits);
1847 KnownZero.trunc(InBits);
1848 KnownOne.trunc(InBits);
1849 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1850 KnownZero.zext(BitWidth);
1851 KnownOne.zext(BitWidth);
1854 case ISD::TRUNCATE: {
1855 EVT InVT = Op.getOperand(0).getValueType();
1856 unsigned InBits = InVT.getScalarType().getSizeInBits();
1857 APInt InMask = Mask;
1858 InMask.zext(InBits);
1859 KnownZero.zext(InBits);
1860 KnownOne.zext(InBits);
1861 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1862 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1863 KnownZero.trunc(BitWidth);
1864 KnownOne.trunc(BitWidth);
1867 case ISD::AssertZext: {
1868 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1869 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1870 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1872 KnownZero |= (~InMask) & Mask;
1876 // All bits are zero except the low bit.
1877 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1881 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1882 // We know that the top bits of C-X are clear if X contains less bits
1883 // than C (i.e. no wrap-around can happen). For example, 20-X is
1884 // positive if we can prove that X is >= 0 and < 16.
1885 if (CLHS->getAPIntValue().isNonNegative()) {
1886 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1887 // NLZ can't be BitWidth with no sign bit
1888 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1889 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1892 // If all of the MaskV bits are known to be zero, then we know the
1893 // output top bits are zero, because we now know that the output is
1895 if ((KnownZero2 & MaskV) == MaskV) {
1896 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1897 // Top bits known zero.
1898 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1905 // Output known-0 bits are known if clear or set in both the low clear bits
1906 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1907 // low 3 bits clear.
1908 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1909 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1910 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1911 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1913 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1914 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1915 KnownZeroOut = std::min(KnownZeroOut,
1916 KnownZero2.countTrailingOnes());
1918 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1922 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1923 const APInt &RA = Rem->getAPIntValue().abs();
1924 if (RA.isPowerOf2()) {
1925 APInt LowBits = RA - 1;
1926 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1927 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1929 // The low bits of the first operand are unchanged by the srem.
1930 KnownZero = KnownZero2 & LowBits;
1931 KnownOne = KnownOne2 & LowBits;
1933 // If the first operand is non-negative or has all low bits zero, then
1934 // the upper bits are all zero.
1935 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1936 KnownZero |= ~LowBits;
1938 // If the first operand is negative and not all low bits are zero, then
1939 // the upper bits are all one.
1940 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1941 KnownOne |= ~LowBits;
1946 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1951 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1952 const APInt &RA = Rem->getAPIntValue();
1953 if (RA.isPowerOf2()) {
1954 APInt LowBits = (RA - 1);
1955 APInt Mask2 = LowBits & Mask;
1956 KnownZero |= ~LowBits & Mask;
1957 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1958 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1963 // Since the result is less than or equal to either operand, any leading
1964 // zero bits in either operand must also exist in the result.
1965 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1966 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1968 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1971 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1972 KnownZero2.countLeadingOnes());
1974 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1978 // Allow the target to implement this method for its nodes.
1979 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1980 case ISD::INTRINSIC_WO_CHAIN:
1981 case ISD::INTRINSIC_W_CHAIN:
1982 case ISD::INTRINSIC_VOID:
1983 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1990 /// ComputeNumSignBits - Return the number of times the sign bit of the
1991 /// register is replicated into the other bits. We know that at least 1 bit
1992 /// is always equal to the sign bit (itself), but other cases can give us
1993 /// information. For example, immediately after an "SRA X, 2", we know that
1994 /// the top 3 bits are all equal to each other, so we return 3.
1995 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1996 EVT VT = Op.getValueType();
1997 assert(VT.isInteger() && "Invalid VT!");
1998 unsigned VTBits = VT.getScalarType().getSizeInBits();
2000 unsigned FirstAnswer = 1;
2003 return 1; // Limit search depth.
2005 switch (Op.getOpcode()) {
2007 case ISD::AssertSext:
2008 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2009 return VTBits-Tmp+1;
2010 case ISD::AssertZext:
2011 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2014 case ISD::Constant: {
2015 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2016 // If negative, return # leading ones.
2017 if (Val.isNegative())
2018 return Val.countLeadingOnes();
2020 // Return # leading zeros.
2021 return Val.countLeadingZeros();
2024 case ISD::SIGN_EXTEND:
2025 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2026 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2028 case ISD::SIGN_EXTEND_INREG:
2029 // Max of the input and what this extends.
2031 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2034 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2035 return std::max(Tmp, Tmp2);
2038 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2039 // SRA X, C -> adds C sign bits.
2040 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2041 Tmp += C->getZExtValue();
2042 if (Tmp > VTBits) Tmp = VTBits;
2046 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2047 // shl destroys sign bits.
2048 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2049 if (C->getZExtValue() >= VTBits || // Bad shift.
2050 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2051 return Tmp - C->getZExtValue();
2056 case ISD::XOR: // NOT is handled here.
2057 // Logical binary ops preserve the number of sign bits at the worst.
2058 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2060 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2061 FirstAnswer = std::min(Tmp, Tmp2);
2062 // We computed what we know about the sign bits as our first
2063 // answer. Now proceed to the generic code that uses
2064 // ComputeMaskedBits, and pick whichever answer is better.
2069 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2070 if (Tmp == 1) return 1; // Early out.
2071 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2072 return std::min(Tmp, Tmp2);
2080 if (Op.getResNo() != 1)
2082 // The boolean result conforms to getBooleanContents. Fall through.
2084 // If setcc returns 0/-1, all bits are sign bits.
2085 if (TLI.getBooleanContents() ==
2086 TargetLowering::ZeroOrNegativeOneBooleanContent)
2091 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2092 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2094 // Handle rotate right by N like a rotate left by 32-N.
2095 if (Op.getOpcode() == ISD::ROTR)
2096 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2098 // If we aren't rotating out all of the known-in sign bits, return the
2099 // number that are left. This handles rotl(sext(x), 1) for example.
2100 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2101 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2105 // Add can have at most one carry bit. Thus we know that the output
2106 // is, at worst, one more bit than the inputs.
2107 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2108 if (Tmp == 1) return 1; // Early out.
2110 // Special case decrementing a value (ADD X, -1):
2111 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2112 if (CRHS->isAllOnesValue()) {
2113 APInt KnownZero, KnownOne;
2114 APInt Mask = APInt::getAllOnesValue(VTBits);
2115 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2117 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2119 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2122 // If we are subtracting one from a positive number, there is no carry
2123 // out of the result.
2124 if (KnownZero.isNegative())
2128 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2129 if (Tmp2 == 1) return 1;
2130 return std::min(Tmp, Tmp2)-1;
2134 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2135 if (Tmp2 == 1) return 1;
2138 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2139 if (CLHS->isNullValue()) {
2140 APInt KnownZero, KnownOne;
2141 APInt Mask = APInt::getAllOnesValue(VTBits);
2142 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2143 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2145 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2148 // If the input is known to be positive (the sign bit is known clear),
2149 // the output of the NEG has the same number of sign bits as the input.
2150 if (KnownZero.isNegative())
2153 // Otherwise, we treat this like a SUB.
2156 // Sub can have at most one carry bit. Thus we know that the output
2157 // is, at worst, one more bit than the inputs.
2158 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2159 if (Tmp == 1) return 1; // Early out.
2160 return std::min(Tmp, Tmp2)-1;
2163 // FIXME: it's tricky to do anything useful for this, but it is an important
2164 // case for targets like X86.
2168 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2169 if (Op.getOpcode() == ISD::LOAD) {
2170 LoadSDNode *LD = cast<LoadSDNode>(Op);
2171 unsigned ExtType = LD->getExtensionType();
2174 case ISD::SEXTLOAD: // '17' bits known
2175 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2176 return VTBits-Tmp+1;
2177 case ISD::ZEXTLOAD: // '16' bits known
2178 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2183 // Allow the target to implement this method for its nodes.
2184 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2185 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2186 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2187 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2188 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2189 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2192 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2193 // use this information.
2194 APInt KnownZero, KnownOne;
2195 APInt Mask = APInt::getAllOnesValue(VTBits);
2196 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2198 if (KnownZero.isNegative()) { // sign bit is 0
2200 } else if (KnownOne.isNegative()) { // sign bit is 1;
2207 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2208 // the number of identical bits in the top of the input value.
2210 Mask <<= Mask.getBitWidth()-VTBits;
2211 // Return # leading zeros. We use 'min' here in case Val was zero before
2212 // shifting. We don't want to return '64' as for an i32 "0".
2213 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2216 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2217 // If we're told that NaNs won't happen, assume they won't.
2218 if (FiniteOnlyFPMath())
2221 // If the value is a constant, we can obviously see if it is a NaN or not.
2222 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2223 return !C->getValueAPF().isNaN();
2225 // TODO: Recognize more cases here.
2230 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2231 // If the value is a constant, we can obviously see if it is a zero or not.
2232 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2233 return !C->isZero();
2235 // TODO: Recognize more cases here.
2240 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2241 // Check the obvious case.
2242 if (A == B) return true;
2244 // For for negative and positive zero.
2245 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2246 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2247 if (CA->isZero() && CB->isZero()) return true;
2249 // Otherwise they may not be equal.
2253 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2254 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2255 if (!GA) return false;
2256 if (GA->getOffset() != 0) return false;
2257 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2258 if (!GV) return false;
2259 MachineModuleInfo *MMI = getMachineModuleInfo();
2260 return MMI && MMI->hasDebugInfo();
2264 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2265 /// element of the result of the vector shuffle.
2266 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2268 EVT VT = N->getValueType(0);
2269 DebugLoc dl = N->getDebugLoc();
2270 if (N->getMaskElt(i) < 0)
2271 return getUNDEF(VT.getVectorElementType());
2272 unsigned Index = N->getMaskElt(i);
2273 unsigned NumElems = VT.getVectorNumElements();
2274 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2277 if (V.getOpcode() == ISD::BIT_CONVERT) {
2278 V = V.getOperand(0);
2279 EVT VVT = V.getValueType();
2280 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2283 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2284 return (Index == 0) ? V.getOperand(0)
2285 : getUNDEF(VT.getVectorElementType());
2286 if (V.getOpcode() == ISD::BUILD_VECTOR)
2287 return V.getOperand(Index);
2288 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2289 return getShuffleScalarElt(SVN, Index);
2294 /// getNode - Gets or creates the specified node.
2296 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2297 FoldingSetNodeID ID;
2298 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2301 return SDValue(E, 0);
2303 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2304 CSEMap.InsertNode(N, IP);
2306 AllNodes.push_back(N);
2310 return SDValue(N, 0);
2313 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2314 EVT VT, SDValue Operand) {
2315 // Constant fold unary operations with an integer constant operand.
2316 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2317 const APInt &Val = C->getAPIntValue();
2320 case ISD::SIGN_EXTEND:
2321 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2322 case ISD::ANY_EXTEND:
2323 case ISD::ZERO_EXTEND:
2325 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2326 case ISD::UINT_TO_FP:
2327 case ISD::SINT_TO_FP: {
2328 const uint64_t zero[] = {0, 0};
2329 // No compile time operations on ppcf128.
2330 if (VT == MVT::ppcf128) break;
2331 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2332 (void)apf.convertFromAPInt(Val,
2333 Opcode==ISD::SINT_TO_FP,
2334 APFloat::rmNearestTiesToEven);
2335 return getConstantFP(apf, VT);
2337 case ISD::BIT_CONVERT:
2338 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2339 return getConstantFP(Val.bitsToFloat(), VT);
2340 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2341 return getConstantFP(Val.bitsToDouble(), VT);
2344 return getConstant(Val.byteSwap(), VT);
2346 return getConstant(Val.countPopulation(), VT);
2348 return getConstant(Val.countLeadingZeros(), VT);
2350 return getConstant(Val.countTrailingZeros(), VT);
2354 // Constant fold unary operations with a floating point constant operand.
2355 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2356 APFloat V = C->getValueAPF(); // make copy
2357 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2361 return getConstantFP(V, VT);
2364 return getConstantFP(V, VT);
2366 case ISD::FP_EXTEND: {
2368 // This can return overflow, underflow, or inexact; we don't care.
2369 // FIXME need to be more flexible about rounding mode.
2370 (void)V.convert(*EVTToAPFloatSemantics(VT),
2371 APFloat::rmNearestTiesToEven, &ignored);
2372 return getConstantFP(V, VT);
2374 case ISD::FP_TO_SINT:
2375 case ISD::FP_TO_UINT: {
2378 assert(integerPartWidth >= 64);
2379 // FIXME need to be more flexible about rounding mode.
2380 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2381 Opcode==ISD::FP_TO_SINT,
2382 APFloat::rmTowardZero, &ignored);
2383 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2385 APInt api(VT.getSizeInBits(), 2, x);
2386 return getConstant(api, VT);
2388 case ISD::BIT_CONVERT:
2389 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2390 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2391 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2392 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2398 unsigned OpOpcode = Operand.getNode()->getOpcode();
2400 case ISD::TokenFactor:
2401 case ISD::MERGE_VALUES:
2402 case ISD::CONCAT_VECTORS:
2403 return Operand; // Factor, merge or concat of one node? No need.
2404 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2405 case ISD::FP_EXTEND:
2406 assert(VT.isFloatingPoint() &&
2407 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2408 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2409 assert((!VT.isVector() ||
2410 VT.getVectorNumElements() ==
2411 Operand.getValueType().getVectorNumElements()) &&
2412 "Vector element count mismatch!");
2413 if (Operand.getOpcode() == ISD::UNDEF)
2414 return getUNDEF(VT);
2416 case ISD::SIGN_EXTEND:
2417 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2418 "Invalid SIGN_EXTEND!");
2419 if (Operand.getValueType() == VT) return Operand; // noop extension
2420 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2421 "Invalid sext node, dst < src!");
2422 assert((!VT.isVector() ||
2423 VT.getVectorNumElements() ==
2424 Operand.getValueType().getVectorNumElements()) &&
2425 "Vector element count mismatch!");
2426 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2427 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2429 case ISD::ZERO_EXTEND:
2430 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2431 "Invalid ZERO_EXTEND!");
2432 if (Operand.getValueType() == VT) return Operand; // noop extension
2433 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2434 "Invalid zext node, dst < src!");
2435 assert((!VT.isVector() ||
2436 VT.getVectorNumElements() ==
2437 Operand.getValueType().getVectorNumElements()) &&
2438 "Vector element count mismatch!");
2439 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2440 return getNode(ISD::ZERO_EXTEND, DL, VT,
2441 Operand.getNode()->getOperand(0));
2443 case ISD::ANY_EXTEND:
2444 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2445 "Invalid ANY_EXTEND!");
2446 if (Operand.getValueType() == VT) return Operand; // noop extension
2447 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2448 "Invalid anyext node, dst < src!");
2449 assert((!VT.isVector() ||
2450 VT.getVectorNumElements() ==
2451 Operand.getValueType().getVectorNumElements()) &&
2452 "Vector element count mismatch!");
2453 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2454 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2455 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2458 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2459 "Invalid TRUNCATE!");
2460 if (Operand.getValueType() == VT) return Operand; // noop truncate
2461 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2462 "Invalid truncate node, src < dst!");
2463 assert((!VT.isVector() ||
2464 VT.getVectorNumElements() ==
2465 Operand.getValueType().getVectorNumElements()) &&
2466 "Vector element count mismatch!");
2467 if (OpOpcode == ISD::TRUNCATE)
2468 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2469 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2470 OpOpcode == ISD::ANY_EXTEND) {
2471 // If the source is smaller than the dest, we still need an extend.
2472 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2473 .bitsLT(VT.getScalarType()))
2474 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2475 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2476 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2478 return Operand.getNode()->getOperand(0);
2481 case ISD::BIT_CONVERT:
2482 // Basic sanity checking.
2483 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2484 && "Cannot BIT_CONVERT between types of different sizes!");
2485 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2486 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2487 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2488 if (OpOpcode == ISD::UNDEF)
2489 return getUNDEF(VT);
2491 case ISD::SCALAR_TO_VECTOR:
2492 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2493 (VT.getVectorElementType() == Operand.getValueType() ||
2494 (VT.getVectorElementType().isInteger() &&
2495 Operand.getValueType().isInteger() &&
2496 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2497 "Illegal SCALAR_TO_VECTOR node!");
2498 if (OpOpcode == ISD::UNDEF)
2499 return getUNDEF(VT);
2500 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2501 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2502 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2503 Operand.getConstantOperandVal(1) == 0 &&
2504 Operand.getOperand(0).getValueType() == VT)
2505 return Operand.getOperand(0);
2508 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2509 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2510 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2511 Operand.getNode()->getOperand(0));
2512 if (OpOpcode == ISD::FNEG) // --X -> X
2513 return Operand.getNode()->getOperand(0);
2516 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2517 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2522 SDVTList VTs = getVTList(VT);
2523 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2524 FoldingSetNodeID ID;
2525 SDValue Ops[1] = { Operand };
2526 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2528 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2529 return SDValue(E, 0);
2531 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2532 CSEMap.InsertNode(N, IP);
2534 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2537 AllNodes.push_back(N);
2541 return SDValue(N, 0);
2544 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2546 ConstantSDNode *Cst1,
2547 ConstantSDNode *Cst2) {
2548 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2551 case ISD::ADD: return getConstant(C1 + C2, VT);
2552 case ISD::SUB: return getConstant(C1 - C2, VT);
2553 case ISD::MUL: return getConstant(C1 * C2, VT);
2555 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2558 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2561 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2564 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2566 case ISD::AND: return getConstant(C1 & C2, VT);
2567 case ISD::OR: return getConstant(C1 | C2, VT);
2568 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2569 case ISD::SHL: return getConstant(C1 << C2, VT);
2570 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2571 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2572 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2573 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2580 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2581 SDValue N1, SDValue N2) {
2582 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2583 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2586 case ISD::TokenFactor:
2587 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2588 N2.getValueType() == MVT::Other && "Invalid token factor!");
2589 // Fold trivial token factors.
2590 if (N1.getOpcode() == ISD::EntryToken) return N2;
2591 if (N2.getOpcode() == ISD::EntryToken) return N1;
2592 if (N1 == N2) return N1;
2594 case ISD::CONCAT_VECTORS:
2595 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2596 // one big BUILD_VECTOR.
2597 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2598 N2.getOpcode() == ISD::BUILD_VECTOR) {
2599 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2600 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2601 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2605 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2606 N1.getValueType() == VT && "Binary operator types must match!");
2607 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2608 // worth handling here.
2609 if (N2C && N2C->isNullValue())
2611 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2618 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2619 N1.getValueType() == VT && "Binary operator types must match!");
2620 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2621 // it's worth handling here.
2622 if (N2C && N2C->isNullValue())
2632 assert(VT.isInteger() && "This operator does not apply to FP types!");
2640 if (Opcode == ISD::FADD) {
2642 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2643 if (CFP->getValueAPF().isZero())
2646 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2647 if (CFP->getValueAPF().isZero())
2649 } else if (Opcode == ISD::FSUB) {
2651 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2652 if (CFP->getValueAPF().isZero())
2656 assert(N1.getValueType() == N2.getValueType() &&
2657 N1.getValueType() == VT && "Binary operator types must match!");
2659 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2660 assert(N1.getValueType() == VT &&
2661 N1.getValueType().isFloatingPoint() &&
2662 N2.getValueType().isFloatingPoint() &&
2663 "Invalid FCOPYSIGN!");
2670 assert(VT == N1.getValueType() &&
2671 "Shift operators return type must be the same as their first arg");
2672 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2673 "Shifts only work on integers");
2675 // Always fold shifts of i1 values so the code generator doesn't need to
2676 // handle them. Since we know the size of the shift has to be less than the
2677 // size of the value, the shift/rotate count is guaranteed to be zero.
2680 if (N2C && N2C->isNullValue())
2683 case ISD::FP_ROUND_INREG: {
2684 EVT EVT = cast<VTSDNode>(N2)->getVT();
2685 assert(VT == N1.getValueType() && "Not an inreg round!");
2686 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2687 "Cannot FP_ROUND_INREG integer types");
2688 assert(EVT.isVector() == VT.isVector() &&
2689 "FP_ROUND_INREG type should be vector iff the operand "
2691 assert((!EVT.isVector() ||
2692 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2693 "Vector element counts must match in FP_ROUND_INREG");
2694 assert(EVT.bitsLE(VT) && "Not rounding down!");
2695 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2699 assert(VT.isFloatingPoint() &&
2700 N1.getValueType().isFloatingPoint() &&
2701 VT.bitsLE(N1.getValueType()) &&
2702 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2703 if (N1.getValueType() == VT) return N1; // noop conversion.
2705 case ISD::AssertSext:
2706 case ISD::AssertZext: {
2707 EVT EVT = cast<VTSDNode>(N2)->getVT();
2708 assert(VT == N1.getValueType() && "Not an inreg extend!");
2709 assert(VT.isInteger() && EVT.isInteger() &&
2710 "Cannot *_EXTEND_INREG FP types");
2711 assert(!EVT.isVector() &&
2712 "AssertSExt/AssertZExt type should be the vector element type "
2713 "rather than the vector type!");
2714 assert(EVT.bitsLE(VT) && "Not extending!");
2715 if (VT == EVT) return N1; // noop assertion.
2718 case ISD::SIGN_EXTEND_INREG: {
2719 EVT EVT = cast<VTSDNode>(N2)->getVT();
2720 assert(VT == N1.getValueType() && "Not an inreg extend!");
2721 assert(VT.isInteger() && EVT.isInteger() &&
2722 "Cannot *_EXTEND_INREG FP types");
2723 assert(EVT.isVector() == VT.isVector() &&
2724 "SIGN_EXTEND_INREG type should be vector iff the operand "
2726 assert((!EVT.isVector() ||
2727 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2728 "Vector element counts must match in SIGN_EXTEND_INREG");
2729 assert(EVT.bitsLE(VT) && "Not extending!");
2730 if (EVT == VT) return N1; // Not actually extending
2733 APInt Val = N1C->getAPIntValue();
2734 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2735 Val <<= Val.getBitWidth()-FromBits;
2736 Val = Val.ashr(Val.getBitWidth()-FromBits);
2737 return getConstant(Val, VT);
2741 case ISD::EXTRACT_VECTOR_ELT:
2742 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2743 if (N1.getOpcode() == ISD::UNDEF)
2744 return getUNDEF(VT);
2746 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2747 // expanding copies of large vectors from registers.
2749 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2750 N1.getNumOperands() > 0) {
2752 N1.getOperand(0).getValueType().getVectorNumElements();
2753 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2754 N1.getOperand(N2C->getZExtValue() / Factor),
2755 getConstant(N2C->getZExtValue() % Factor,
2756 N2.getValueType()));
2759 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2760 // expanding large vector constants.
2761 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2762 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2763 EVT VEltTy = N1.getValueType().getVectorElementType();
2764 if (Elt.getValueType() != VEltTy) {
2765 // If the vector element type is not legal, the BUILD_VECTOR operands
2766 // are promoted and implicitly truncated. Make that explicit here.
2767 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2770 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2771 // result is implicitly extended.
2772 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2777 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2778 // operations are lowered to scalars.
2779 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2780 // If the indices are the same, return the inserted element else
2781 // if the indices are known different, extract the element from
2782 // the original vector.
2783 if (N1.getOperand(2) == N2) {
2784 if (VT == N1.getOperand(1).getValueType())
2785 return N1.getOperand(1);
2787 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2788 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2789 isa<ConstantSDNode>(N2))
2790 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2793 case ISD::EXTRACT_ELEMENT:
2794 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2795 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2796 (N1.getValueType().isInteger() == VT.isInteger()) &&
2797 "Wrong types for EXTRACT_ELEMENT!");
2799 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2800 // 64-bit integers into 32-bit parts. Instead of building the extract of
2801 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2802 if (N1.getOpcode() == ISD::BUILD_PAIR)
2803 return N1.getOperand(N2C->getZExtValue());
2805 // EXTRACT_ELEMENT of a constant int is also very common.
2806 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2807 unsigned ElementSize = VT.getSizeInBits();
2808 unsigned Shift = ElementSize * N2C->getZExtValue();
2809 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2810 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2813 case ISD::EXTRACT_SUBVECTOR:
2814 if (N1.getValueType() == VT) // Trivial extraction.
2821 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2822 if (SV.getNode()) return SV;
2823 } else { // Cannonicalize constant to RHS if commutative
2824 if (isCommutativeBinOp(Opcode)) {
2825 std::swap(N1C, N2C);
2831 // Constant fold FP operations.
2832 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2833 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2835 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2836 // Cannonicalize constant to RHS if commutative
2837 std::swap(N1CFP, N2CFP);
2839 } else if (N2CFP && VT != MVT::ppcf128) {
2840 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2841 APFloat::opStatus s;
2844 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2845 if (s != APFloat::opInvalidOp)
2846 return getConstantFP(V1, VT);
2849 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2850 if (s!=APFloat::opInvalidOp)
2851 return getConstantFP(V1, VT);
2854 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2855 if (s!=APFloat::opInvalidOp)
2856 return getConstantFP(V1, VT);
2859 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2860 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2861 return getConstantFP(V1, VT);
2864 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2865 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2866 return getConstantFP(V1, VT);
2868 case ISD::FCOPYSIGN:
2870 return getConstantFP(V1, VT);
2876 // Canonicalize an UNDEF to the RHS, even over a constant.
2877 if (N1.getOpcode() == ISD::UNDEF) {
2878 if (isCommutativeBinOp(Opcode)) {
2882 case ISD::FP_ROUND_INREG:
2883 case ISD::SIGN_EXTEND_INREG:
2889 return N1; // fold op(undef, arg2) -> undef
2897 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2898 // For vectors, we can't easily build an all zero vector, just return
2905 // Fold a bunch of operators when the RHS is undef.
2906 if (N2.getOpcode() == ISD::UNDEF) {
2909 if (N1.getOpcode() == ISD::UNDEF)
2910 // Handle undef ^ undef -> 0 special case. This is a common
2912 return getConstant(0, VT);
2922 return N2; // fold op(arg1, undef) -> undef
2936 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2937 // For vectors, we can't easily build an all zero vector, just return
2942 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2943 // For vectors, we can't easily build an all one vector, just return
2951 // Memoize this node if possible.
2953 SDVTList VTs = getVTList(VT);
2954 if (VT != MVT::Flag) {
2955 SDValue Ops[] = { N1, N2 };
2956 FoldingSetNodeID ID;
2957 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2959 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2960 return SDValue(E, 0);
2962 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2963 CSEMap.InsertNode(N, IP);
2965 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2968 AllNodes.push_back(N);
2972 return SDValue(N, 0);
2975 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2976 SDValue N1, SDValue N2, SDValue N3) {
2977 // Perform various simplifications.
2978 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2979 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2981 case ISD::CONCAT_VECTORS:
2982 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2983 // one big BUILD_VECTOR.
2984 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2985 N2.getOpcode() == ISD::BUILD_VECTOR &&
2986 N3.getOpcode() == ISD::BUILD_VECTOR) {
2987 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2988 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2989 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2990 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2994 // Use FoldSetCC to simplify SETCC's.
2995 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2996 if (Simp.getNode()) return Simp;
3001 if (N1C->getZExtValue())
3002 return N2; // select true, X, Y -> X
3004 return N3; // select false, X, Y -> Y
3007 if (N2 == N3) return N2; // select C, X, X -> X
3011 if (N2C->getZExtValue()) // Unconditional branch
3012 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3014 return N1; // Never-taken branch
3017 case ISD::VECTOR_SHUFFLE:
3018 llvm_unreachable("should use getVectorShuffle constructor!");
3020 case ISD::BIT_CONVERT:
3021 // Fold bit_convert nodes from a type to themselves.
3022 if (N1.getValueType() == VT)
3027 // Memoize node if it doesn't produce a flag.
3029 SDVTList VTs = getVTList(VT);
3030 if (VT != MVT::Flag) {
3031 SDValue Ops[] = { N1, N2, N3 };
3032 FoldingSetNodeID ID;
3033 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3036 return SDValue(E, 0);
3038 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3039 CSEMap.InsertNode(N, IP);
3041 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3044 AllNodes.push_back(N);
3048 return SDValue(N, 0);
3051 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3052 SDValue N1, SDValue N2, SDValue N3,
3054 SDValue Ops[] = { N1, N2, N3, N4 };
3055 return getNode(Opcode, DL, VT, Ops, 4);
3058 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3059 SDValue N1, SDValue N2, SDValue N3,
3060 SDValue N4, SDValue N5) {
3061 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3062 return getNode(Opcode, DL, VT, Ops, 5);
3065 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3066 /// the incoming stack arguments to be loaded from the stack.
3067 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3068 SmallVector<SDValue, 8> ArgChains;
3070 // Include the original chain at the beginning of the list. When this is
3071 // used by target LowerCall hooks, this helps legalize find the
3072 // CALLSEQ_BEGIN node.
3073 ArgChains.push_back(Chain);
3075 // Add a chain value for each stack argument.
3076 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3077 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3078 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3079 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3080 if (FI->getIndex() < 0)
3081 ArgChains.push_back(SDValue(L, 1));
3083 // Build a tokenfactor for all the chains.
3084 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3085 &ArgChains[0], ArgChains.size());
3088 /// getMemsetValue - Vectorized representation of the memset value
3090 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3092 assert(Value.getOpcode() != ISD::UNDEF);
3094 unsigned NumBits = VT.getScalarType().getSizeInBits();
3095 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3096 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3098 for (unsigned i = NumBits; i > 8; i >>= 1) {
3099 Val = (Val << Shift) | Val;
3103 return DAG.getConstant(Val, VT);
3104 return DAG.getConstantFP(APFloat(Val), VT);
3107 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3108 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3110 for (unsigned i = NumBits; i > 8; i >>= 1) {
3111 Value = DAG.getNode(ISD::OR, dl, VT,
3112 DAG.getNode(ISD::SHL, dl, VT, Value,
3113 DAG.getConstant(Shift,
3114 TLI.getShiftAmountTy())),
3122 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3123 /// used when a memcpy is turned into a memset when the source is a constant
3125 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3126 const TargetLowering &TLI,
3127 std::string &Str, unsigned Offset) {
3128 // Handle vector with all elements zero.
3131 return DAG.getConstant(0, VT);
3132 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3133 VT.getSimpleVT().SimpleTy == MVT::f64)
3134 return DAG.getConstantFP(0.0, VT);
3135 else if (VT.isVector()) {
3136 unsigned NumElts = VT.getVectorNumElements();
3137 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3138 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3139 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3142 llvm_unreachable("Expected type!");
3145 assert(!VT.isVector() && "Can't handle vector type here!");
3146 unsigned NumBits = VT.getSizeInBits();
3147 unsigned MSB = NumBits / 8;
3149 if (TLI.isLittleEndian())
3150 Offset = Offset + MSB - 1;
3151 for (unsigned i = 0; i != MSB; ++i) {
3152 Val = (Val << 8) | (unsigned char)Str[Offset];
3153 Offset += TLI.isLittleEndian() ? -1 : 1;
3155 return DAG.getConstant(Val, VT);
3158 /// getMemBasePlusOffset - Returns base and offset node for the
3160 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3161 SelectionDAG &DAG) {
3162 EVT VT = Base.getValueType();
3163 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3164 VT, Base, DAG.getConstant(Offset, VT));
3167 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3169 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3170 unsigned SrcDelta = 0;
3171 GlobalAddressSDNode *G = NULL;
3172 if (Src.getOpcode() == ISD::GlobalAddress)
3173 G = cast<GlobalAddressSDNode>(Src);
3174 else if (Src.getOpcode() == ISD::ADD &&
3175 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3176 Src.getOperand(1).getOpcode() == ISD::Constant) {
3177 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3178 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3183 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3184 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3190 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3191 /// to replace the memset / memcpy. Return true if the number of memory ops
3192 /// is below the threshold. It returns the types of the sequence of
3193 /// memory ops to perform memset / memcpy by reference.
3194 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3195 unsigned Limit, uint64_t Size,
3196 unsigned DstAlign, unsigned SrcAlign,
3197 bool NonScalarIntSafe,
3199 const TargetLowering &TLI) {
3200 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3201 "Expecting memcpy / memset source to meet alignment requirement!");
3202 // If 'SrcAlign' is zero, that means the memory operation does not need load
3203 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3204 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3205 // specified alignment of the memory operation. If it is zero, that means
3206 // it's possible to change the alignment of the destination.
3207 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3208 NonScalarIntSafe, DAG);
3210 if (VT == MVT::Other) {
3211 VT = TLI.getPointerTy();
3212 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3213 if (DstAlign >= TLI.getTargetData()->getABITypeAlignment(Ty) ||
3214 TLI.allowsUnalignedMemoryAccesses(VT)) {
3217 switch (DstAlign & 7) {
3218 case 0: VT = MVT::i64; break;
3219 case 4: VT = MVT::i32; break;
3220 case 2: VT = MVT::i16; break;
3221 default: VT = MVT::i8; break;
3226 while (!TLI.isTypeLegal(LVT))
3227 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3228 assert(LVT.isInteger());
3234 unsigned NumMemOps = 0;
3236 unsigned VTSize = VT.getSizeInBits() / 8;
3237 while (VTSize > Size) {
3238 // For now, only use non-vector load / store's for the left-over pieces.
3239 if (VT.isVector() || VT.isFloatingPoint()) {
3241 while (!TLI.isTypeLegal(VT))
3242 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3243 VTSize = VT.getSizeInBits() / 8;
3245 // This can result in a type that is not legal on the target, e.g.
3246 // 1 or 2 bytes on PPC.
3247 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3252 if (++NumMemOps > Limit)
3254 MemOps.push_back(VT);
3261 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3262 SDValue Chain, SDValue Dst,
3263 SDValue Src, uint64_t Size,
3264 unsigned Align, bool isVol,
3266 const Value *DstSV, uint64_t DstSVOff,
3267 const Value *SrcSV, uint64_t SrcSVOff) {
3268 // Turn a memcpy of undef to nop.
3269 if (Src.getOpcode() == ISD::UNDEF)
3272 // Expand memcpy to a series of load and store ops if the size operand falls
3273 // below a certain threshold.
3274 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3275 std::vector<EVT> MemOps;
3276 uint64_t Limit = -1ULL;
3278 Limit = TLI.getMaxStoresPerMemcpy();
3279 bool DstAlignCanChange = false;
3280 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3281 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3282 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3283 DstAlignCanChange = true;
3284 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3285 if (Align > SrcAlign)
3288 bool CopyFromStr = isMemSrcFromString(Src, Str);
3289 bool isZeroStr = CopyFromStr && Str.empty();
3290 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3291 (DstAlignCanChange ? 0 : Align),
3292 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI))
3295 if (DstAlignCanChange) {
3296 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3297 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3298 if (NewAlign > Align) {
3299 // Give the stack frame object a larger alignment if needed.
3300 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3301 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3306 SmallVector<SDValue, 8> OutChains;
3307 unsigned NumMemOps = MemOps.size();
3308 uint64_t SrcOff = 0, DstOff = 0;
3309 for (unsigned i = 0; i != NumMemOps; ++i) {
3311 unsigned VTSize = VT.getSizeInBits() / 8;
3312 SDValue Value, Store;
3315 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3316 // It's unlikely a store of a vector immediate can be done in a single
3317 // instruction. It would require a load from a constantpool first.
3318 // We only handle zero vectors here.
3319 // FIXME: Handle other cases where store of vector immediate is done in
3320 // a single instruction.
3321 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3322 Store = DAG.getStore(Chain, dl, Value,
3323 getMemBasePlusOffset(Dst, DstOff, DAG),
3324 DstSV, DstSVOff + DstOff, isVol, false, Align);
3326 // The type might not be legal for the target. This should only happen
3327 // if the type is smaller than a legal type, as on PPC, so the right
3328 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3329 // to Load/Store if NVT==VT.
3330 // FIXME does the case above also need this?
3331 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3332 assert(NVT.bitsGE(VT));
3333 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3334 getMemBasePlusOffset(Src, SrcOff, DAG),
3335 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3336 MinAlign(SrcAlign, SrcOff));
3337 Store = DAG.getTruncStore(Chain, dl, Value,
3338 getMemBasePlusOffset(Dst, DstOff, DAG),
3339 DstSV, DstSVOff + DstOff, VT, isVol, false,
3342 OutChains.push_back(Store);
3347 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3348 &OutChains[0], OutChains.size());
3351 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3352 SDValue Chain, SDValue Dst,
3353 SDValue Src, uint64_t Size,
3354 unsigned Align, bool isVol,
3356 const Value *DstSV, uint64_t DstSVOff,
3357 const Value *SrcSV, uint64_t SrcSVOff) {
3358 // Turn a memmove of undef to nop.
3359 if (Src.getOpcode() == ISD::UNDEF)
3362 // Expand memmove to a series of load and store ops if the size operand falls
3363 // below a certain threshold.
3364 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3365 std::vector<EVT> MemOps;
3366 uint64_t Limit = -1ULL;
3368 Limit = TLI.getMaxStoresPerMemmove();
3369 bool DstAlignCanChange = false;
3370 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3371 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3372 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3373 DstAlignCanChange = true;
3374 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3375 if (Align > SrcAlign)
3378 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3379 (DstAlignCanChange ? 0 : Align),
3380 SrcAlign, true, DAG, TLI))
3383 if (DstAlignCanChange) {
3384 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3385 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3386 if (NewAlign > Align) {
3387 // Give the stack frame object a larger alignment if needed.
3388 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3389 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3394 uint64_t SrcOff = 0, DstOff = 0;
3395 SmallVector<SDValue, 8> LoadValues;
3396 SmallVector<SDValue, 8> LoadChains;
3397 SmallVector<SDValue, 8> OutChains;
3398 unsigned NumMemOps = MemOps.size();
3399 for (unsigned i = 0; i < NumMemOps; i++) {
3401 unsigned VTSize = VT.getSizeInBits() / 8;
3402 SDValue Value, Store;
3404 Value = DAG.getLoad(VT, dl, Chain,
3405 getMemBasePlusOffset(Src, SrcOff, DAG),
3406 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3407 LoadValues.push_back(Value);
3408 LoadChains.push_back(Value.getValue(1));
3411 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3412 &LoadChains[0], LoadChains.size());
3414 for (unsigned i = 0; i < NumMemOps; i++) {
3416 unsigned VTSize = VT.getSizeInBits() / 8;
3417 SDValue Value, Store;
3419 Store = DAG.getStore(Chain, dl, LoadValues[i],
3420 getMemBasePlusOffset(Dst, DstOff, DAG),
3421 DstSV, DstSVOff + DstOff, isVol, false, Align);
3422 OutChains.push_back(Store);
3426 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3427 &OutChains[0], OutChains.size());
3430 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3431 SDValue Chain, SDValue Dst,
3432 SDValue Src, uint64_t Size,
3433 unsigned Align, bool isVol,
3434 const Value *DstSV, uint64_t DstSVOff) {
3435 // Turn a memset of undef to nop.
3436 if (Src.getOpcode() == ISD::UNDEF)
3439 // Expand memset to a series of load/store ops if the size operand
3440 // falls below a certain threshold.
3441 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3442 std::vector<EVT> MemOps;
3443 bool DstAlignCanChange = false;
3444 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3445 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3446 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3447 DstAlignCanChange = true;
3448 bool NonScalarIntSafe =
3449 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3450 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3451 Size, (DstAlignCanChange ? 0 : Align), 0,
3452 NonScalarIntSafe, DAG, TLI))
3455 if (DstAlignCanChange) {
3456 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3457 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3458 if (NewAlign > Align) {
3459 // Give the stack frame object a larger alignment if needed.
3460 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3461 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3466 SmallVector<SDValue, 8> OutChains;
3467 uint64_t DstOff = 0;
3468 unsigned NumMemOps = MemOps.size();
3469 for (unsigned i = 0; i < NumMemOps; i++) {
3471 unsigned VTSize = VT.getSizeInBits() / 8;
3472 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3473 SDValue Store = DAG.getStore(Chain, dl, Value,
3474 getMemBasePlusOffset(Dst, DstOff, DAG),
3475 DstSV, DstSVOff + DstOff, isVol, false, 0);
3476 OutChains.push_back(Store);
3480 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3481 &OutChains[0], OutChains.size());
3484 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3485 SDValue Src, SDValue Size,
3486 unsigned Align, bool isVol, bool AlwaysInline,
3487 const Value *DstSV, uint64_t DstSVOff,
3488 const Value *SrcSV, uint64_t SrcSVOff) {
3490 // Check to see if we should lower the memcpy to loads and stores first.
3491 // For cases within the target-specified limits, this is the best choice.
3492 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3494 // Memcpy with size zero? Just return the original chain.
3495 if (ConstantSize->isNullValue())
3498 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3499 ConstantSize->getZExtValue(),Align,
3500 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3501 if (Result.getNode())
3505 // Then check to see if we should lower the memcpy with target-specific
3506 // code. If the target chooses to do this, this is the next best.
3508 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3509 isVol, AlwaysInline,
3510 DstSV, DstSVOff, SrcSV, SrcSVOff);
3511 if (Result.getNode())
3514 // If we really need inline code and the target declined to provide it,
3515 // use a (potentially long) sequence of loads and stores.
3517 assert(ConstantSize && "AlwaysInline requires a constant size!");
3518 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3519 ConstantSize->getZExtValue(), Align, isVol,
3520 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3523 // Emit a library call.
3524 assert(!isVol && "library memcpy does not support volatile");
3525 TargetLowering::ArgListTy Args;
3526 TargetLowering::ArgListEntry Entry;
3527 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3528 Entry.Node = Dst; Args.push_back(Entry);
3529 Entry.Node = Src; Args.push_back(Entry);
3530 Entry.Node = Size; Args.push_back(Entry);
3531 // FIXME: pass in DebugLoc
3532 std::pair<SDValue,SDValue> CallResult =
3533 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3534 false, false, false, false, 0,
3535 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3536 /*isReturnValueUsed=*/false,
3537 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3538 TLI.getPointerTy()),
3540 return CallResult.second;
3543 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3544 SDValue Src, SDValue Size,
3545 unsigned Align, bool isVol,
3546 const Value *DstSV, uint64_t DstSVOff,
3547 const Value *SrcSV, uint64_t SrcSVOff) {
3549 // Check to see if we should lower the memmove to loads and stores first.
3550 // For cases within the target-specified limits, this is the best choice.
3551 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3553 // Memmove with size zero? Just return the original chain.
3554 if (ConstantSize->isNullValue())
3558 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3559 ConstantSize->getZExtValue(), Align, isVol,
3560 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3561 if (Result.getNode())
3565 // Then check to see if we should lower the memmove with target-specific
3566 // code. If the target chooses to do this, this is the next best.
3568 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3569 DstSV, DstSVOff, SrcSV, SrcSVOff);
3570 if (Result.getNode())
3573 // Emit a library call.
3574 assert(!isVol && "library memmove does not support volatile");
3575 TargetLowering::ArgListTy Args;
3576 TargetLowering::ArgListEntry Entry;
3577 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3578 Entry.Node = Dst; Args.push_back(Entry);
3579 Entry.Node = Src; Args.push_back(Entry);
3580 Entry.Node = Size; Args.push_back(Entry);
3581 // FIXME: pass in DebugLoc
3582 std::pair<SDValue,SDValue> CallResult =
3583 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3584 false, false, false, false, 0,
3585 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3586 /*isReturnValueUsed=*/false,
3587 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3588 TLI.getPointerTy()),
3590 return CallResult.second;
3593 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3594 SDValue Src, SDValue Size,
3595 unsigned Align, bool isVol,
3596 const Value *DstSV, uint64_t DstSVOff) {
3598 // Check to see if we should lower the memset to stores first.
3599 // For cases within the target-specified limits, this is the best choice.
3600 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3602 // Memset with size zero? Just return the original chain.
3603 if (ConstantSize->isNullValue())
3607 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3608 Align, isVol, DstSV, DstSVOff);
3610 if (Result.getNode())
3614 // Then check to see if we should lower the memset with target-specific
3615 // code. If the target chooses to do this, this is the next best.
3617 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3619 if (Result.getNode())
3622 // Emit a library call.
3623 assert(!isVol && "library memset does not support volatile");
3624 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3625 TargetLowering::ArgListTy Args;
3626 TargetLowering::ArgListEntry Entry;
3627 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3628 Args.push_back(Entry);
3629 // Extend or truncate the argument to be an i32 value for the call.
3630 if (Src.getValueType().bitsGT(MVT::i32))
3631 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3633 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3635 Entry.Ty = Type::getInt32Ty(*getContext());
3636 Entry.isSExt = true;
3637 Args.push_back(Entry);
3639 Entry.Ty = IntPtrTy;
3640 Entry.isSExt = false;
3641 Args.push_back(Entry);
3642 // FIXME: pass in DebugLoc
3643 std::pair<SDValue,SDValue> CallResult =
3644 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3645 false, false, false, false, 0,
3646 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3647 /*isReturnValueUsed=*/false,
3648 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3649 TLI.getPointerTy()),
3651 return CallResult.second;
3654 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3656 SDValue Ptr, SDValue Cmp,
3657 SDValue Swp, const Value* PtrVal,
3658 unsigned Alignment) {
3659 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3660 Alignment = getEVTAlignment(MemVT);
3662 // Check if the memory reference references a frame index
3664 if (const FrameIndexSDNode *FI =
3665 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3666 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3668 MachineFunction &MF = getMachineFunction();
3669 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3671 // For now, atomics are considered to be volatile always.
3672 Flags |= MachineMemOperand::MOVolatile;
3674 MachineMemOperand *MMO =
3675 MF.getMachineMemOperand(PtrVal, Flags, 0,
3676 MemVT.getStoreSize(), Alignment);
3678 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3681 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3683 SDValue Ptr, SDValue Cmp,
3684 SDValue Swp, MachineMemOperand *MMO) {
3685 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3686 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3688 EVT VT = Cmp.getValueType();
3690 SDVTList VTs = getVTList(VT, MVT::Other);
3691 FoldingSetNodeID ID;
3692 ID.AddInteger(MemVT.getRawBits());
3693 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3694 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3696 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3697 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3698 return SDValue(E, 0);
3700 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3701 Ptr, Cmp, Swp, MMO);
3702 CSEMap.InsertNode(N, IP);
3703 AllNodes.push_back(N);
3704 return SDValue(N, 0);
3707 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3709 SDValue Ptr, SDValue Val,
3710 const Value* PtrVal,
3711 unsigned Alignment) {
3712 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3713 Alignment = getEVTAlignment(MemVT);
3715 // Check if the memory reference references a frame index
3717 if (const FrameIndexSDNode *FI =
3718 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3719 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3721 MachineFunction &MF = getMachineFunction();
3722 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3724 // For now, atomics are considered to be volatile always.
3725 Flags |= MachineMemOperand::MOVolatile;
3727 MachineMemOperand *MMO =
3728 MF.getMachineMemOperand(PtrVal, Flags, 0,
3729 MemVT.getStoreSize(), Alignment);
3731 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3734 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3736 SDValue Ptr, SDValue Val,
3737 MachineMemOperand *MMO) {
3738 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3739 Opcode == ISD::ATOMIC_LOAD_SUB ||
3740 Opcode == ISD::ATOMIC_LOAD_AND ||
3741 Opcode == ISD::ATOMIC_LOAD_OR ||
3742 Opcode == ISD::ATOMIC_LOAD_XOR ||
3743 Opcode == ISD::ATOMIC_LOAD_NAND ||
3744 Opcode == ISD::ATOMIC_LOAD_MIN ||
3745 Opcode == ISD::ATOMIC_LOAD_MAX ||
3746 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3747 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3748 Opcode == ISD::ATOMIC_SWAP) &&
3749 "Invalid Atomic Op");
3751 EVT VT = Val.getValueType();
3753 SDVTList VTs = getVTList(VT, MVT::Other);
3754 FoldingSetNodeID ID;
3755 ID.AddInteger(MemVT.getRawBits());
3756 SDValue Ops[] = {Chain, Ptr, Val};
3757 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3759 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3760 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3761 return SDValue(E, 0);
3763 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3765 CSEMap.InsertNode(N, IP);
3766 AllNodes.push_back(N);
3767 return SDValue(N, 0);
3770 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3771 /// Allowed to return something different (and simpler) if Simplify is true.
3772 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3777 SmallVector<EVT, 4> VTs;
3778 VTs.reserve(NumOps);
3779 for (unsigned i = 0; i < NumOps; ++i)
3780 VTs.push_back(Ops[i].getValueType());
3781 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3786 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3787 const EVT *VTs, unsigned NumVTs,
3788 const SDValue *Ops, unsigned NumOps,
3789 EVT MemVT, const Value *srcValue, int SVOff,
3790 unsigned Align, bool Vol,
3791 bool ReadMem, bool WriteMem) {
3792 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3793 MemVT, srcValue, SVOff, Align, Vol,
3798 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3799 const SDValue *Ops, unsigned NumOps,
3800 EVT MemVT, const Value *srcValue, int SVOff,
3801 unsigned Align, bool Vol,
3802 bool ReadMem, bool WriteMem) {
3803 if (Align == 0) // Ensure that codegen never sees alignment 0
3804 Align = getEVTAlignment(MemVT);
3806 MachineFunction &MF = getMachineFunction();
3809 Flags |= MachineMemOperand::MOStore;
3811 Flags |= MachineMemOperand::MOLoad;
3813 Flags |= MachineMemOperand::MOVolatile;
3814 MachineMemOperand *MMO =
3815 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3816 MemVT.getStoreSize(), Align);
3818 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3822 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3823 const SDValue *Ops, unsigned NumOps,
3824 EVT MemVT, MachineMemOperand *MMO) {
3825 assert((Opcode == ISD::INTRINSIC_VOID ||
3826 Opcode == ISD::INTRINSIC_W_CHAIN ||
3827 (Opcode <= INT_MAX &&
3828 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3829 "Opcode is not a memory-accessing opcode!");
3831 // Memoize the node unless it returns a flag.
3832 MemIntrinsicSDNode *N;
3833 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3834 FoldingSetNodeID ID;
3835 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3837 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3838 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3839 return SDValue(E, 0);
3842 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3844 CSEMap.InsertNode(N, IP);
3846 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3849 AllNodes.push_back(N);
3850 return SDValue(N, 0);
3854 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3855 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3856 SDValue Ptr, SDValue Offset,
3857 const Value *SV, int SVOffset, EVT MemVT,
3858 bool isVolatile, bool isNonTemporal,
3859 unsigned Alignment) {
3860 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3861 Alignment = getEVTAlignment(VT);
3863 // Check if the memory reference references a frame index
3865 if (const FrameIndexSDNode *FI =
3866 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3867 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3869 MachineFunction &MF = getMachineFunction();
3870 unsigned Flags = MachineMemOperand::MOLoad;
3872 Flags |= MachineMemOperand::MOVolatile;
3874 Flags |= MachineMemOperand::MONonTemporal;
3875 MachineMemOperand *MMO =
3876 MF.getMachineMemOperand(SV, Flags, SVOffset,
3877 MemVT.getStoreSize(), Alignment);
3878 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3882 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3883 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3884 SDValue Ptr, SDValue Offset, EVT MemVT,
3885 MachineMemOperand *MMO) {
3887 ExtType = ISD::NON_EXTLOAD;
3888 } else if (ExtType == ISD::NON_EXTLOAD) {
3889 assert(VT == MemVT && "Non-extending load from different memory type!");
3892 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3893 "Should only be an extending load, not truncating!");
3894 assert(VT.isInteger() == MemVT.isInteger() &&
3895 "Cannot convert from FP to Int or Int -> FP!");
3896 assert(VT.isVector() == MemVT.isVector() &&
3897 "Cannot use trunc store to convert to or from a vector!");
3898 assert((!VT.isVector() ||
3899 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3900 "Cannot use trunc store to change the number of vector elements!");
3903 bool Indexed = AM != ISD::UNINDEXED;
3904 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3905 "Unindexed load with an offset!");
3907 SDVTList VTs = Indexed ?
3908 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3909 SDValue Ops[] = { Chain, Ptr, Offset };
3910 FoldingSetNodeID ID;
3911 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3912 ID.AddInteger(MemVT.getRawBits());
3913 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3914 MMO->isNonTemporal()));
3916 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3917 cast<LoadSDNode>(E)->refineAlignment(MMO);
3918 return SDValue(E, 0);
3920 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3922 CSEMap.InsertNode(N, IP);
3923 AllNodes.push_back(N);
3924 return SDValue(N, 0);
3927 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3928 SDValue Chain, SDValue Ptr,
3929 const Value *SV, int SVOffset,
3930 bool isVolatile, bool isNonTemporal,
3931 unsigned Alignment) {
3932 SDValue Undef = getUNDEF(Ptr.getValueType());
3933 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3934 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3937 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3938 SDValue Chain, SDValue Ptr,
3940 int SVOffset, EVT MemVT,
3941 bool isVolatile, bool isNonTemporal,
3942 unsigned Alignment) {
3943 SDValue Undef = getUNDEF(Ptr.getValueType());
3944 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3945 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3949 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3950 SDValue Offset, ISD::MemIndexedMode AM) {
3951 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3952 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3953 "Load is already a indexed load!");
3954 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3955 LD->getChain(), Base, Offset, LD->getSrcValue(),
3956 LD->getSrcValueOffset(), LD->getMemoryVT(),
3957 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3960 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3961 SDValue Ptr, const Value *SV, int SVOffset,
3962 bool isVolatile, bool isNonTemporal,
3963 unsigned Alignment) {
3964 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3965 Alignment = getEVTAlignment(Val.getValueType());
3967 // Check if the memory reference references a frame index
3969 if (const FrameIndexSDNode *FI =
3970 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3971 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3973 MachineFunction &MF = getMachineFunction();
3974 unsigned Flags = MachineMemOperand::MOStore;
3976 Flags |= MachineMemOperand::MOVolatile;
3978 Flags |= MachineMemOperand::MONonTemporal;
3979 MachineMemOperand *MMO =
3980 MF.getMachineMemOperand(SV, Flags, SVOffset,
3981 Val.getValueType().getStoreSize(), Alignment);
3983 return getStore(Chain, dl, Val, Ptr, MMO);
3986 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3987 SDValue Ptr, MachineMemOperand *MMO) {
3988 EVT VT = Val.getValueType();
3989 SDVTList VTs = getVTList(MVT::Other);
3990 SDValue Undef = getUNDEF(Ptr.getValueType());
3991 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3992 FoldingSetNodeID ID;
3993 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3994 ID.AddInteger(VT.getRawBits());
3995 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
3996 MMO->isNonTemporal()));
3998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3999 cast<StoreSDNode>(E)->refineAlignment(MMO);
4000 return SDValue(E, 0);
4002 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4004 CSEMap.InsertNode(N, IP);
4005 AllNodes.push_back(N);
4006 return SDValue(N, 0);
4009 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4010 SDValue Ptr, const Value *SV,
4011 int SVOffset, EVT SVT,
4012 bool isVolatile, bool isNonTemporal,
4013 unsigned Alignment) {
4014 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4015 Alignment = getEVTAlignment(SVT);
4017 // Check if the memory reference references a frame index
4019 if (const FrameIndexSDNode *FI =
4020 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4021 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4023 MachineFunction &MF = getMachineFunction();
4024 unsigned Flags = MachineMemOperand::MOStore;
4026 Flags |= MachineMemOperand::MOVolatile;
4028 Flags |= MachineMemOperand::MONonTemporal;
4029 MachineMemOperand *MMO =
4030 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4032 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4035 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4036 SDValue Ptr, EVT SVT,
4037 MachineMemOperand *MMO) {
4038 EVT VT = Val.getValueType();
4041 return getStore(Chain, dl, Val, Ptr, MMO);
4043 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4044 "Should only be a truncating store, not extending!");
4045 assert(VT.isInteger() == SVT.isInteger() &&
4046 "Can't do FP-INT conversion!");
4047 assert(VT.isVector() == SVT.isVector() &&
4048 "Cannot use trunc store to convert to or from a vector!");
4049 assert((!VT.isVector() ||
4050 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4051 "Cannot use trunc store to change the number of vector elements!");
4053 SDVTList VTs = getVTList(MVT::Other);
4054 SDValue Undef = getUNDEF(Ptr.getValueType());
4055 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4056 FoldingSetNodeID ID;
4057 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4058 ID.AddInteger(SVT.getRawBits());
4059 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4060 MMO->isNonTemporal()));
4062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4063 cast<StoreSDNode>(E)->refineAlignment(MMO);
4064 return SDValue(E, 0);
4066 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4068 CSEMap.InsertNode(N, IP);
4069 AllNodes.push_back(N);
4070 return SDValue(N, 0);
4074 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4075 SDValue Offset, ISD::MemIndexedMode AM) {
4076 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4077 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4078 "Store is already a indexed store!");
4079 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4080 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4081 FoldingSetNodeID ID;
4082 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4083 ID.AddInteger(ST->getMemoryVT().getRawBits());
4084 ID.AddInteger(ST->getRawSubclassData());
4086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4087 return SDValue(E, 0);
4089 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4090 ST->isTruncatingStore(),
4092 ST->getMemOperand());
4093 CSEMap.InsertNode(N, IP);
4094 AllNodes.push_back(N);
4095 return SDValue(N, 0);
4098 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4099 SDValue Chain, SDValue Ptr,
4101 SDValue Ops[] = { Chain, Ptr, SV };
4102 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4105 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4106 const SDUse *Ops, unsigned NumOps) {
4108 case 0: return getNode(Opcode, DL, VT);
4109 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4110 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4111 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4115 // Copy from an SDUse array into an SDValue array for use with
4116 // the regular getNode logic.
4117 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4118 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4121 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4122 const SDValue *Ops, unsigned NumOps) {
4124 case 0: return getNode(Opcode, DL, VT);
4125 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4126 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4127 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4133 case ISD::SELECT_CC: {
4134 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4135 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4136 "LHS and RHS of condition must have same type!");
4137 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4138 "True and False arms of SelectCC must have same type!");
4139 assert(Ops[2].getValueType() == VT &&
4140 "select_cc node must be of same type as true and false value!");
4144 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4145 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4146 "LHS/RHS of comparison should match types!");
4153 SDVTList VTs = getVTList(VT);
4155 if (VT != MVT::Flag) {
4156 FoldingSetNodeID ID;
4157 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4161 return SDValue(E, 0);
4163 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4164 CSEMap.InsertNode(N, IP);
4166 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4169 AllNodes.push_back(N);
4173 return SDValue(N, 0);
4176 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4177 const std::vector<EVT> &ResultTys,
4178 const SDValue *Ops, unsigned NumOps) {
4179 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4183 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4184 const EVT *VTs, unsigned NumVTs,
4185 const SDValue *Ops, unsigned NumOps) {
4187 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4188 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4191 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4192 const SDValue *Ops, unsigned NumOps) {
4193 if (VTList.NumVTs == 1)
4194 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4198 // FIXME: figure out how to safely handle things like
4199 // int foo(int x) { return 1 << (x & 255); }
4200 // int bar() { return foo(256); }
4201 case ISD::SRA_PARTS:
4202 case ISD::SRL_PARTS:
4203 case ISD::SHL_PARTS:
4204 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4205 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4206 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4207 else if (N3.getOpcode() == ISD::AND)
4208 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4209 // If the and is only masking out bits that cannot effect the shift,
4210 // eliminate the and.
4211 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4212 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4213 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4219 // Memoize the node unless it returns a flag.
4221 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4222 FoldingSetNodeID ID;
4223 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4226 return SDValue(E, 0);
4229 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4230 } else if (NumOps == 2) {
4231 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4232 } else if (NumOps == 3) {
4233 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4236 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4238 CSEMap.InsertNode(N, IP);
4241 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4242 } else if (NumOps == 2) {
4243 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4244 } else if (NumOps == 3) {
4245 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4248 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4251 AllNodes.push_back(N);
4255 return SDValue(N, 0);
4258 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4259 return getNode(Opcode, DL, VTList, 0, 0);
4262 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4264 SDValue Ops[] = { N1 };
4265 return getNode(Opcode, DL, VTList, Ops, 1);
4268 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4269 SDValue N1, SDValue N2) {
4270 SDValue Ops[] = { N1, N2 };
4271 return getNode(Opcode, DL, VTList, Ops, 2);
4274 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4275 SDValue N1, SDValue N2, SDValue N3) {
4276 SDValue Ops[] = { N1, N2, N3 };
4277 return getNode(Opcode, DL, VTList, Ops, 3);
4280 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4281 SDValue N1, SDValue N2, SDValue N3,
4283 SDValue Ops[] = { N1, N2, N3, N4 };
4284 return getNode(Opcode, DL, VTList, Ops, 4);
4287 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4288 SDValue N1, SDValue N2, SDValue N3,
4289 SDValue N4, SDValue N5) {
4290 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4291 return getNode(Opcode, DL, VTList, Ops, 5);
4294 SDVTList SelectionDAG::getVTList(EVT VT) {
4295 return makeVTList(SDNode::getValueTypeList(VT), 1);
4298 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4299 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4300 E = VTList.rend(); I != E; ++I)
4301 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4304 EVT *Array = Allocator.Allocate<EVT>(2);
4307 SDVTList Result = makeVTList(Array, 2);
4308 VTList.push_back(Result);
4312 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4313 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4314 E = VTList.rend(); I != E; ++I)
4315 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4319 EVT *Array = Allocator.Allocate<EVT>(3);
4323 SDVTList Result = makeVTList(Array, 3);
4324 VTList.push_back(Result);
4328 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4329 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4330 E = VTList.rend(); I != E; ++I)
4331 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4332 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4335 EVT *Array = Allocator.Allocate<EVT>(4);
4340 SDVTList Result = makeVTList(Array, 4);
4341 VTList.push_back(Result);
4345 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4347 case 0: llvm_unreachable("Cannot have nodes without results!");
4348 case 1: return getVTList(VTs[0]);
4349 case 2: return getVTList(VTs[0], VTs[1]);
4350 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4351 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4355 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4356 E = VTList.rend(); I != E; ++I) {
4357 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4360 bool NoMatch = false;
4361 for (unsigned i = 2; i != NumVTs; ++i)
4362 if (VTs[i] != I->VTs[i]) {
4370 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4371 std::copy(VTs, VTs+NumVTs, Array);
4372 SDVTList Result = makeVTList(Array, NumVTs);
4373 VTList.push_back(Result);
4378 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4379 /// specified operands. If the resultant node already exists in the DAG,
4380 /// this does not modify the specified node, instead it returns the node that
4381 /// already exists. If the resultant node does not exist in the DAG, the
4382 /// input node is returned. As a degenerate case, if you specify the same
4383 /// input operands as the node already has, the input node is returned.
4384 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4385 SDNode *N = InN.getNode();
4386 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4388 // Check to see if there is no change.
4389 if (Op == N->getOperand(0)) return InN;
4391 // See if the modified node already exists.
4392 void *InsertPos = 0;
4393 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4394 return SDValue(Existing, InN.getResNo());
4396 // Nope it doesn't. Remove the node from its current place in the maps.
4398 if (!RemoveNodeFromCSEMaps(N))
4401 // Now we update the operands.
4402 N->OperandList[0].set(Op);
4404 // If this gets put into a CSE map, add it.
4405 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4409 SDValue SelectionDAG::
4410 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4411 SDNode *N = InN.getNode();
4412 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4414 // Check to see if there is no change.
4415 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4416 return InN; // No operands changed, just return the input node.
4418 // See if the modified node already exists.
4419 void *InsertPos = 0;
4420 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4421 return SDValue(Existing, InN.getResNo());
4423 // Nope it doesn't. Remove the node from its current place in the maps.
4425 if (!RemoveNodeFromCSEMaps(N))
4428 // Now we update the operands.
4429 if (N->OperandList[0] != Op1)
4430 N->OperandList[0].set(Op1);
4431 if (N->OperandList[1] != Op2)
4432 N->OperandList[1].set(Op2);
4434 // If this gets put into a CSE map, add it.
4435 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4439 SDValue SelectionDAG::
4440 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4441 SDValue Ops[] = { Op1, Op2, Op3 };
4442 return UpdateNodeOperands(N, Ops, 3);
4445 SDValue SelectionDAG::
4446 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4447 SDValue Op3, SDValue Op4) {
4448 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4449 return UpdateNodeOperands(N, Ops, 4);
4452 SDValue SelectionDAG::
4453 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4454 SDValue Op3, SDValue Op4, SDValue Op5) {
4455 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4456 return UpdateNodeOperands(N, Ops, 5);
4459 SDValue SelectionDAG::
4460 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4461 SDNode *N = InN.getNode();
4462 assert(N->getNumOperands() == NumOps &&
4463 "Update with wrong number of operands");
4465 // Check to see if there is no change.
4466 bool AnyChange = false;
4467 for (unsigned i = 0; i != NumOps; ++i) {
4468 if (Ops[i] != N->getOperand(i)) {
4474 // No operands changed, just return the input node.
4475 if (!AnyChange) return InN;
4477 // See if the modified node already exists.
4478 void *InsertPos = 0;
4479 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4480 return SDValue(Existing, InN.getResNo());
4482 // Nope it doesn't. Remove the node from its current place in the maps.
4484 if (!RemoveNodeFromCSEMaps(N))
4487 // Now we update the operands.
4488 for (unsigned i = 0; i != NumOps; ++i)
4489 if (N->OperandList[i] != Ops[i])
4490 N->OperandList[i].set(Ops[i]);
4492 // If this gets put into a CSE map, add it.
4493 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4497 /// DropOperands - Release the operands and set this node to have
4499 void SDNode::DropOperands() {
4500 // Unlike the code in MorphNodeTo that does this, we don't need to
4501 // watch for dead nodes here.
4502 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4508 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4511 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4513 SDVTList VTs = getVTList(VT);
4514 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4517 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4518 EVT VT, SDValue Op1) {
4519 SDVTList VTs = getVTList(VT);
4520 SDValue Ops[] = { Op1 };
4521 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4524 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4525 EVT VT, SDValue Op1,
4527 SDVTList VTs = getVTList(VT);
4528 SDValue Ops[] = { Op1, Op2 };
4529 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4532 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4533 EVT VT, SDValue Op1,
4534 SDValue Op2, SDValue Op3) {
4535 SDVTList VTs = getVTList(VT);
4536 SDValue Ops[] = { Op1, Op2, Op3 };
4537 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4540 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4541 EVT VT, const SDValue *Ops,
4543 SDVTList VTs = getVTList(VT);
4544 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4547 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4548 EVT VT1, EVT VT2, const SDValue *Ops,
4550 SDVTList VTs = getVTList(VT1, VT2);
4551 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4554 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4556 SDVTList VTs = getVTList(VT1, VT2);
4557 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4560 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4561 EVT VT1, EVT VT2, EVT VT3,
4562 const SDValue *Ops, unsigned NumOps) {
4563 SDVTList VTs = getVTList(VT1, VT2, VT3);
4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4567 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4568 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4569 const SDValue *Ops, unsigned NumOps) {
4570 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4571 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4574 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4577 SDVTList VTs = getVTList(VT1, VT2);
4578 SDValue Ops[] = { Op1 };
4579 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4582 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4584 SDValue Op1, SDValue Op2) {
4585 SDVTList VTs = getVTList(VT1, VT2);
4586 SDValue Ops[] = { Op1, Op2 };
4587 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4590 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4592 SDValue Op1, SDValue Op2,
4594 SDVTList VTs = getVTList(VT1, VT2);
4595 SDValue Ops[] = { Op1, Op2, Op3 };
4596 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4599 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4600 EVT VT1, EVT VT2, EVT VT3,
4601 SDValue Op1, SDValue Op2,
4603 SDVTList VTs = getVTList(VT1, VT2, VT3);
4604 SDValue Ops[] = { Op1, Op2, Op3 };
4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4608 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4609 SDVTList VTs, const SDValue *Ops,
4611 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4612 // Reset the NodeID to -1.
4617 /// MorphNodeTo - This *mutates* the specified node to have the specified
4618 /// return type, opcode, and operands.
4620 /// Note that MorphNodeTo returns the resultant node. If there is already a
4621 /// node of the specified opcode and operands, it returns that node instead of
4622 /// the current one. Note that the DebugLoc need not be the same.
4624 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4625 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4626 /// node, and because it doesn't require CSE recalculation for any of
4627 /// the node's users.
4629 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4630 SDVTList VTs, const SDValue *Ops,
4632 // If an identical node already exists, use it.
4634 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4635 FoldingSetNodeID ID;
4636 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4637 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4641 if (!RemoveNodeFromCSEMaps(N))
4644 // Start the morphing.
4646 N->ValueList = VTs.VTs;
4647 N->NumValues = VTs.NumVTs;
4649 // Clear the operands list, updating used nodes to remove this from their
4650 // use list. Keep track of any operands that become dead as a result.
4651 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4652 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4654 SDNode *Used = Use.getNode();
4656 if (Used->use_empty())
4657 DeadNodeSet.insert(Used);
4660 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4661 // Initialize the memory references information.
4662 MN->setMemRefs(0, 0);
4663 // If NumOps is larger than the # of operands we can have in a
4664 // MachineSDNode, reallocate the operand list.
4665 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4666 if (MN->OperandsNeedDelete)
4667 delete[] MN->OperandList;
4668 if (NumOps > array_lengthof(MN->LocalOperands))
4669 // We're creating a final node that will live unmorphed for the
4670 // remainder of the current SelectionDAG iteration, so we can allocate
4671 // the operands directly out of a pool with no recycling metadata.
4672 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4675 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4676 MN->OperandsNeedDelete = false;
4678 MN->InitOperands(MN->OperandList, Ops, NumOps);
4680 // If NumOps is larger than the # of operands we currently have, reallocate
4681 // the operand list.
4682 if (NumOps > N->NumOperands) {
4683 if (N->OperandsNeedDelete)
4684 delete[] N->OperandList;
4685 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4686 N->OperandsNeedDelete = true;
4688 N->InitOperands(N->OperandList, Ops, NumOps);
4691 // Delete any nodes that are still dead after adding the uses for the
4693 if (!DeadNodeSet.empty()) {
4694 SmallVector<SDNode *, 16> DeadNodes;
4695 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4696 E = DeadNodeSet.end(); I != E; ++I)
4697 if ((*I)->use_empty())
4698 DeadNodes.push_back(*I);
4699 RemoveDeadNodes(DeadNodes);
4703 CSEMap.InsertNode(N, IP); // Memoize the new node.
4708 /// getMachineNode - These are used for target selectors to create a new node
4709 /// with specified return type(s), MachineInstr opcode, and operands.
4711 /// Note that getMachineNode returns the resultant node. If there is already a
4712 /// node of the specified opcode and operands, it returns that node instead of
4713 /// the current one.
4715 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4716 SDVTList VTs = getVTList(VT);
4717 return getMachineNode(Opcode, dl, VTs, 0, 0);
4721 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4722 SDVTList VTs = getVTList(VT);
4723 SDValue Ops[] = { Op1 };
4724 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4728 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4729 SDValue Op1, SDValue Op2) {
4730 SDVTList VTs = getVTList(VT);
4731 SDValue Ops[] = { Op1, Op2 };
4732 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4736 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4737 SDValue Op1, SDValue Op2, SDValue Op3) {
4738 SDVTList VTs = getVTList(VT);
4739 SDValue Ops[] = { Op1, Op2, Op3 };
4740 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4744 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4745 const SDValue *Ops, unsigned NumOps) {
4746 SDVTList VTs = getVTList(VT);
4747 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4751 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4752 SDVTList VTs = getVTList(VT1, VT2);
4753 return getMachineNode(Opcode, dl, VTs, 0, 0);
4757 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4758 EVT VT1, EVT VT2, SDValue Op1) {
4759 SDVTList VTs = getVTList(VT1, VT2);
4760 SDValue Ops[] = { Op1 };
4761 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4765 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4766 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4767 SDVTList VTs = getVTList(VT1, VT2);
4768 SDValue Ops[] = { Op1, Op2 };
4769 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4773 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4774 EVT VT1, EVT VT2, SDValue Op1,
4775 SDValue Op2, SDValue Op3) {
4776 SDVTList VTs = getVTList(VT1, VT2);
4777 SDValue Ops[] = { Op1, Op2, Op3 };
4778 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4782 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4784 const SDValue *Ops, unsigned NumOps) {
4785 SDVTList VTs = getVTList(VT1, VT2);
4786 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4790 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4791 EVT VT1, EVT VT2, EVT VT3,
4792 SDValue Op1, SDValue Op2) {
4793 SDVTList VTs = getVTList(VT1, VT2, VT3);
4794 SDValue Ops[] = { Op1, Op2 };
4795 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4799 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4800 EVT VT1, EVT VT2, EVT VT3,
4801 SDValue Op1, SDValue Op2, SDValue Op3) {
4802 SDVTList VTs = getVTList(VT1, VT2, VT3);
4803 SDValue Ops[] = { Op1, Op2, Op3 };
4804 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4808 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4809 EVT VT1, EVT VT2, EVT VT3,
4810 const SDValue *Ops, unsigned NumOps) {
4811 SDVTList VTs = getVTList(VT1, VT2, VT3);
4812 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4816 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4817 EVT VT2, EVT VT3, EVT VT4,
4818 const SDValue *Ops, unsigned NumOps) {
4819 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4820 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4824 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4825 const std::vector<EVT> &ResultTys,
4826 const SDValue *Ops, unsigned NumOps) {
4827 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4828 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4832 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4833 const SDValue *Ops, unsigned NumOps) {
4834 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4839 FoldingSetNodeID ID;
4840 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4842 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4843 return cast<MachineSDNode>(E);
4846 // Allocate a new MachineSDNode.
4847 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4849 // Initialize the operands list.
4850 if (NumOps > array_lengthof(N->LocalOperands))
4851 // We're creating a final node that will live unmorphed for the
4852 // remainder of the current SelectionDAG iteration, so we can allocate
4853 // the operands directly out of a pool with no recycling metadata.
4854 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4857 N->InitOperands(N->LocalOperands, Ops, NumOps);
4858 N->OperandsNeedDelete = false;
4861 CSEMap.InsertNode(N, IP);
4863 AllNodes.push_back(N);
4870 /// getTargetExtractSubreg - A convenience function for creating
4871 /// TargetOpcode::EXTRACT_SUBREG nodes.
4873 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4875 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4876 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4877 VT, Operand, SRIdxVal);
4878 return SDValue(Subreg, 0);
4881 /// getTargetInsertSubreg - A convenience function for creating
4882 /// TargetOpcode::INSERT_SUBREG nodes.
4884 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4885 SDValue Operand, SDValue Subreg) {
4886 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4887 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4888 VT, Operand, Subreg, SRIdxVal);
4889 return SDValue(Result, 0);
4892 /// getNodeIfExists - Get the specified node if it's already available, or
4893 /// else return NULL.
4894 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4895 const SDValue *Ops, unsigned NumOps) {
4896 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4897 FoldingSetNodeID ID;
4898 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4900 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4906 /// getDbgValue - Creates a SDDbgValue node.
4909 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4910 DebugLoc DL, unsigned O) {
4911 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4915 SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off,
4916 DebugLoc DL, unsigned O) {
4917 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4921 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4922 DebugLoc DL, unsigned O) {
4923 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4928 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4929 /// pointed to by a use iterator is deleted, increment the use iterator
4930 /// so that it doesn't dangle.
4932 /// This class also manages a "downlink" DAGUpdateListener, to forward
4933 /// messages to ReplaceAllUsesWith's callers.
4935 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4936 SelectionDAG::DAGUpdateListener *DownLink;
4937 SDNode::use_iterator &UI;
4938 SDNode::use_iterator &UE;
4940 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4941 // Increment the iterator as needed.
4942 while (UI != UE && N == *UI)
4945 // Then forward the message.
4946 if (DownLink) DownLink->NodeDeleted(N, E);
4949 virtual void NodeUpdated(SDNode *N) {
4950 // Just forward the message.
4951 if (DownLink) DownLink->NodeUpdated(N);
4955 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4956 SDNode::use_iterator &ui,
4957 SDNode::use_iterator &ue)
4958 : DownLink(dl), UI(ui), UE(ue) {}
4963 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4964 /// This can cause recursive merging of nodes in the DAG.
4966 /// This version assumes From has a single result value.
4968 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4969 DAGUpdateListener *UpdateListener) {
4970 SDNode *From = FromN.getNode();
4971 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4972 "Cannot replace with this method!");
4973 assert(From != To.getNode() && "Cannot replace uses of with self");
4975 // Iterate over all the existing uses of From. New uses will be added
4976 // to the beginning of the use list, which we avoid visiting.
4977 // This specifically avoids visiting uses of From that arise while the
4978 // replacement is happening, because any such uses would be the result
4979 // of CSE: If an existing node looks like From after one of its operands
4980 // is replaced by To, we don't want to replace of all its users with To
4981 // too. See PR3018 for more info.
4982 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4983 RAUWUpdateListener Listener(UpdateListener, UI, UE);
4987 // This node is about to morph, remove its old self from the CSE maps.
4988 RemoveNodeFromCSEMaps(User);
4990 // A user can appear in a use list multiple times, and when this
4991 // happens the uses are usually next to each other in the list.
4992 // To help reduce the number of CSE recomputations, process all
4993 // the uses of this user that we can find this way.
4995 SDUse &Use = UI.getUse();
4998 } while (UI != UE && *UI == User);
5000 // Now that we have modified User, add it back to the CSE maps. If it
5001 // already exists there, recursively merge the results together.
5002 AddModifiedNodeToCSEMaps(User, &Listener);
5006 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5007 /// This can cause recursive merging of nodes in the DAG.
5009 /// This version assumes that for each value of From, there is a
5010 /// corresponding value in To in the same position with the same type.
5012 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5013 DAGUpdateListener *UpdateListener) {
5015 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5016 assert((!From->hasAnyUseOfValue(i) ||
5017 From->getValueType(i) == To->getValueType(i)) &&
5018 "Cannot use this version of ReplaceAllUsesWith!");
5021 // Handle the trivial case.
5025 // Iterate over just the existing users of From. See the comments in
5026 // the ReplaceAllUsesWith above.
5027 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5028 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5032 // This node is about to morph, remove its old self from the CSE maps.
5033 RemoveNodeFromCSEMaps(User);
5035 // A user can appear in a use list multiple times, and when this
5036 // happens the uses are usually next to each other in the list.
5037 // To help reduce the number of CSE recomputations, process all
5038 // the uses of this user that we can find this way.
5040 SDUse &Use = UI.getUse();
5043 } while (UI != UE && *UI == User);
5045 // Now that we have modified User, add it back to the CSE maps. If it
5046 // already exists there, recursively merge the results together.
5047 AddModifiedNodeToCSEMaps(User, &Listener);
5051 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5052 /// This can cause recursive merging of nodes in the DAG.
5054 /// This version can replace From with any result values. To must match the
5055 /// number and types of values returned by From.
5056 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5058 DAGUpdateListener *UpdateListener) {
5059 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5060 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5062 // Iterate over just the existing users of From. See the comments in
5063 // the ReplaceAllUsesWith above.
5064 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5065 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5069 // This node is about to morph, remove its old self from the CSE maps.
5070 RemoveNodeFromCSEMaps(User);
5072 // A user can appear in a use list multiple times, and when this
5073 // happens the uses are usually next to each other in the list.
5074 // To help reduce the number of CSE recomputations, process all
5075 // the uses of this user that we can find this way.
5077 SDUse &Use = UI.getUse();
5078 const SDValue &ToOp = To[Use.getResNo()];
5081 } while (UI != UE && *UI == User);
5083 // Now that we have modified User, add it back to the CSE maps. If it
5084 // already exists there, recursively merge the results together.
5085 AddModifiedNodeToCSEMaps(User, &Listener);
5089 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5090 /// uses of other values produced by From.getNode() alone. The Deleted
5091 /// vector is handled the same way as for ReplaceAllUsesWith.
5092 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5093 DAGUpdateListener *UpdateListener){
5094 // Handle the really simple, really trivial case efficiently.
5095 if (From == To) return;
5097 // Handle the simple, trivial, case efficiently.
5098 if (From.getNode()->getNumValues() == 1) {
5099 ReplaceAllUsesWith(From, To, UpdateListener);
5103 // Iterate over just the existing users of From. See the comments in
5104 // the ReplaceAllUsesWith above.
5105 SDNode::use_iterator UI = From.getNode()->use_begin(),
5106 UE = From.getNode()->use_end();
5107 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5110 bool UserRemovedFromCSEMaps = false;
5112 // A user can appear in a use list multiple times, and when this
5113 // happens the uses are usually next to each other in the list.
5114 // To help reduce the number of CSE recomputations, process all
5115 // the uses of this user that we can find this way.
5117 SDUse &Use = UI.getUse();
5119 // Skip uses of different values from the same node.
5120 if (Use.getResNo() != From.getResNo()) {
5125 // If this node hasn't been modified yet, it's still in the CSE maps,
5126 // so remove its old self from the CSE maps.
5127 if (!UserRemovedFromCSEMaps) {
5128 RemoveNodeFromCSEMaps(User);
5129 UserRemovedFromCSEMaps = true;
5134 } while (UI != UE && *UI == User);
5136 // We are iterating over all uses of the From node, so if a use
5137 // doesn't use the specific value, no changes are made.
5138 if (!UserRemovedFromCSEMaps)
5141 // Now that we have modified User, add it back to the CSE maps. If it
5142 // already exists there, recursively merge the results together.
5143 AddModifiedNodeToCSEMaps(User, &Listener);
5148 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5149 /// to record information about a use.
5156 /// operator< - Sort Memos by User.
5157 bool operator<(const UseMemo &L, const UseMemo &R) {
5158 return (intptr_t)L.User < (intptr_t)R.User;
5162 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5163 /// uses of other values produced by From.getNode() alone. The same value
5164 /// may appear in both the From and To list. The Deleted vector is
5165 /// handled the same way as for ReplaceAllUsesWith.
5166 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5169 DAGUpdateListener *UpdateListener){
5170 // Handle the simple, trivial case efficiently.
5172 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5174 // Read up all the uses and make records of them. This helps
5175 // processing new uses that are introduced during the
5176 // replacement process.
5177 SmallVector<UseMemo, 4> Uses;
5178 for (unsigned i = 0; i != Num; ++i) {
5179 unsigned FromResNo = From[i].getResNo();
5180 SDNode *FromNode = From[i].getNode();
5181 for (SDNode::use_iterator UI = FromNode->use_begin(),
5182 E = FromNode->use_end(); UI != E; ++UI) {
5183 SDUse &Use = UI.getUse();
5184 if (Use.getResNo() == FromResNo) {
5185 UseMemo Memo = { *UI, i, &Use };
5186 Uses.push_back(Memo);
5191 // Sort the uses, so that all the uses from a given User are together.
5192 std::sort(Uses.begin(), Uses.end());
5194 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5195 UseIndex != UseIndexEnd; ) {
5196 // We know that this user uses some value of From. If it is the right
5197 // value, update it.
5198 SDNode *User = Uses[UseIndex].User;
5200 // This node is about to morph, remove its old self from the CSE maps.
5201 RemoveNodeFromCSEMaps(User);
5203 // The Uses array is sorted, so all the uses for a given User
5204 // are next to each other in the list.
5205 // To help reduce the number of CSE recomputations, process all
5206 // the uses of this user that we can find this way.
5208 unsigned i = Uses[UseIndex].Index;
5209 SDUse &Use = *Uses[UseIndex].Use;
5213 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5215 // Now that we have modified User, add it back to the CSE maps. If it
5216 // already exists there, recursively merge the results together.
5217 AddModifiedNodeToCSEMaps(User, UpdateListener);
5221 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5222 /// based on their topological order. It returns the maximum id and a vector
5223 /// of the SDNodes* in assigned order by reference.
5224 unsigned SelectionDAG::AssignTopologicalOrder() {
5226 unsigned DAGSize = 0;
5228 // SortedPos tracks the progress of the algorithm. Nodes before it are
5229 // sorted, nodes after it are unsorted. When the algorithm completes
5230 // it is at the end of the list.
5231 allnodes_iterator SortedPos = allnodes_begin();
5233 // Visit all the nodes. Move nodes with no operands to the front of
5234 // the list immediately. Annotate nodes that do have operands with their
5235 // operand count. Before we do this, the Node Id fields of the nodes
5236 // may contain arbitrary values. After, the Node Id fields for nodes
5237 // before SortedPos will contain the topological sort index, and the
5238 // Node Id fields for nodes At SortedPos and after will contain the
5239 // count of outstanding operands.
5240 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5243 unsigned Degree = N->getNumOperands();
5245 // A node with no uses, add it to the result array immediately.
5246 N->setNodeId(DAGSize++);
5247 allnodes_iterator Q = N;
5249 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5250 assert(SortedPos != AllNodes.end() && "Overran node list");
5253 // Temporarily use the Node Id as scratch space for the degree count.
5254 N->setNodeId(Degree);
5258 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5259 // such that by the time the end is reached all nodes will be sorted.
5260 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5263 // N is in sorted position, so all its uses have one less operand
5264 // that needs to be sorted.
5265 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5268 unsigned Degree = P->getNodeId();
5269 assert(Degree != 0 && "Invalid node degree");
5272 // All of P's operands are sorted, so P may sorted now.
5273 P->setNodeId(DAGSize++);
5275 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5276 assert(SortedPos != AllNodes.end() && "Overran node list");
5279 // Update P's outstanding operand count.
5280 P->setNodeId(Degree);
5283 if (I == SortedPos) {
5286 dbgs() << "Overran sorted position:\n";
5289 llvm_unreachable(0);
5293 assert(SortedPos == AllNodes.end() &&
5294 "Topological sort incomplete!");
5295 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5296 "First node in topological sort is not the entry token!");
5297 assert(AllNodes.front().getNodeId() == 0 &&
5298 "First node in topological sort has non-zero id!");
5299 assert(AllNodes.front().getNumOperands() == 0 &&
5300 "First node in topological sort has operands!");
5301 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5302 "Last node in topologic sort has unexpected id!");
5303 assert(AllNodes.back().use_empty() &&
5304 "Last node in topologic sort has users!");
5305 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5309 /// AssignOrdering - Assign an order to the SDNode.
5310 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5311 assert(SD && "Trying to assign an order to a null node!");
5312 Ordering->add(SD, Order);
5315 /// GetOrdering - Get the order for the SDNode.
5316 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5317 assert(SD && "Trying to get the order of a null node!");
5318 return Ordering->getOrder(SD);
5321 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5322 /// value is produced by SD.
5323 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
5324 DbgInfo->add(DB, SD);
5326 SD->setHasDebugValue(true);
5329 //===----------------------------------------------------------------------===//
5331 //===----------------------------------------------------------------------===//
5333 HandleSDNode::~HandleSDNode() {
5337 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5338 EVT VT, int64_t o, unsigned char TF)
5339 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5340 TheGlobal = const_cast<GlobalValue*>(GA);
5343 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5344 MachineMemOperand *mmo)
5345 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5346 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5347 MMO->isNonTemporal());
5348 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5349 assert(isNonTemporal() == MMO->isNonTemporal() &&
5350 "Non-temporal encoding error!");
5351 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5354 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5355 const SDValue *Ops, unsigned NumOps, EVT memvt,
5356 MachineMemOperand *mmo)
5357 : SDNode(Opc, dl, VTs, Ops, NumOps),
5358 MemoryVT(memvt), MMO(mmo) {
5359 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5360 MMO->isNonTemporal());
5361 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5362 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5365 /// Profile - Gather unique data for the node.
5367 void SDNode::Profile(FoldingSetNodeID &ID) const {
5368 AddNodeIDNode(ID, this);
5373 std::vector<EVT> VTs;
5376 VTs.reserve(MVT::LAST_VALUETYPE);
5377 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5378 VTs.push_back(MVT((MVT::SimpleValueType)i));
5383 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5384 static ManagedStatic<EVTArray> SimpleVTArray;
5385 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5387 /// getValueTypeList - Return a pointer to the specified value type.
5389 const EVT *SDNode::getValueTypeList(EVT VT) {
5390 if (VT.isExtended()) {
5391 sys::SmartScopedLock<true> Lock(*VTMutex);
5392 return &(*EVTs->insert(VT).first);
5394 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5398 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5399 /// indicated value. This method ignores uses of other values defined by this
5401 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5402 assert(Value < getNumValues() && "Bad value!");
5404 // TODO: Only iterate over uses of a given value of the node
5405 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5406 if (UI.getUse().getResNo() == Value) {
5413 // Found exactly the right number of uses?
5418 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5419 /// value. This method ignores uses of other values defined by this operation.
5420 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5421 assert(Value < getNumValues() && "Bad value!");
5423 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5424 if (UI.getUse().getResNo() == Value)
5431 /// isOnlyUserOf - Return true if this node is the only use of N.
5433 bool SDNode::isOnlyUserOf(SDNode *N) const {
5435 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5446 /// isOperand - Return true if this node is an operand of N.
5448 bool SDValue::isOperandOf(SDNode *N) const {
5449 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5450 if (*this == N->getOperand(i))
5455 bool SDNode::isOperandOf(SDNode *N) const {
5456 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5457 if (this == N->OperandList[i].getNode())
5462 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5463 /// be a chain) reaches the specified operand without crossing any
5464 /// side-effecting instructions. In practice, this looks through token
5465 /// factors and non-volatile loads. In order to remain efficient, this only
5466 /// looks a couple of nodes in, it does not do an exhaustive search.
5467 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5468 unsigned Depth) const {
5469 if (*this == Dest) return true;
5471 // Don't search too deeply, we just want to be able to see through
5472 // TokenFactor's etc.
5473 if (Depth == 0) return false;
5475 // If this is a token factor, all inputs to the TF happen in parallel. If any
5476 // of the operands of the TF reach dest, then we can do the xform.
5477 if (getOpcode() == ISD::TokenFactor) {
5478 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5479 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5484 // Loads don't have side effects, look through them.
5485 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5486 if (!Ld->isVolatile())
5487 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5492 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5493 /// is either an operand of N or it can be reached by traversing up the operands.
5494 /// NOTE: this is an expensive method. Use it carefully.
5495 bool SDNode::isPredecessorOf(SDNode *N) const {
5496 SmallPtrSet<SDNode *, 32> Visited;
5497 SmallVector<SDNode *, 16> Worklist;
5498 Worklist.push_back(N);
5501 N = Worklist.pop_back_val();
5502 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5503 SDNode *Op = N->getOperand(i).getNode();
5506 if (Visited.insert(Op))
5507 Worklist.push_back(Op);
5509 } while (!Worklist.empty());
5514 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5515 assert(Num < NumOperands && "Invalid child # of SDNode!");
5516 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5519 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5520 switch (getOpcode()) {
5522 if (getOpcode() < ISD::BUILTIN_OP_END)
5523 return "<<Unknown DAG Node>>";
5524 if (isMachineOpcode()) {
5526 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5527 if (getMachineOpcode() < TII->getNumOpcodes())
5528 return TII->get(getMachineOpcode()).getName();
5529 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5532 const TargetLowering &TLI = G->getTargetLoweringInfo();
5533 const char *Name = TLI.getTargetNodeName(getOpcode());
5534 if (Name) return Name;
5535 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5537 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5540 case ISD::DELETED_NODE:
5541 return "<<Deleted Node!>>";
5543 case ISD::PREFETCH: return "Prefetch";
5544 case ISD::MEMBARRIER: return "MemBarrier";
5545 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5546 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5547 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5548 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5549 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5550 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5551 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5552 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5553 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5554 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5555 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5556 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5557 case ISD::PCMARKER: return "PCMarker";
5558 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5559 case ISD::SRCVALUE: return "SrcValue";
5560 case ISD::EntryToken: return "EntryToken";
5561 case ISD::TokenFactor: return "TokenFactor";
5562 case ISD::AssertSext: return "AssertSext";
5563 case ISD::AssertZext: return "AssertZext";
5565 case ISD::BasicBlock: return "BasicBlock";
5566 case ISD::VALUETYPE: return "ValueType";
5567 case ISD::Register: return "Register";
5569 case ISD::Constant: return "Constant";
5570 case ISD::ConstantFP: return "ConstantFP";
5571 case ISD::GlobalAddress: return "GlobalAddress";
5572 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5573 case ISD::FrameIndex: return "FrameIndex";
5574 case ISD::JumpTable: return "JumpTable";
5575 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5576 case ISD::RETURNADDR: return "RETURNADDR";
5577 case ISD::FRAMEADDR: return "FRAMEADDR";
5578 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5579 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5580 case ISD::LSDAADDR: return "LSDAADDR";
5581 case ISD::EHSELECTION: return "EHSELECTION";
5582 case ISD::EH_RETURN: return "EH_RETURN";
5583 case ISD::ConstantPool: return "ConstantPool";
5584 case ISD::ExternalSymbol: return "ExternalSymbol";
5585 case ISD::BlockAddress: return "BlockAddress";
5586 case ISD::INTRINSIC_WO_CHAIN:
5587 case ISD::INTRINSIC_VOID:
5588 case ISD::INTRINSIC_W_CHAIN: {
5589 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5590 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5591 if (IID < Intrinsic::num_intrinsics)
5592 return Intrinsic::getName((Intrinsic::ID)IID);
5593 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5594 return TII->getName(IID);
5595 llvm_unreachable("Invalid intrinsic ID");
5598 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5599 case ISD::TargetConstant: return "TargetConstant";
5600 case ISD::TargetConstantFP:return "TargetConstantFP";
5601 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5602 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5603 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5604 case ISD::TargetJumpTable: return "TargetJumpTable";
5605 case ISD::TargetConstantPool: return "TargetConstantPool";
5606 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5607 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5609 case ISD::CopyToReg: return "CopyToReg";
5610 case ISD::CopyFromReg: return "CopyFromReg";
5611 case ISD::UNDEF: return "undef";
5612 case ISD::MERGE_VALUES: return "merge_values";
5613 case ISD::INLINEASM: return "inlineasm";
5614 case ISD::EH_LABEL: return "eh_label";
5615 case ISD::HANDLENODE: return "handlenode";
5618 case ISD::FABS: return "fabs";
5619 case ISD::FNEG: return "fneg";
5620 case ISD::FSQRT: return "fsqrt";
5621 case ISD::FSIN: return "fsin";
5622 case ISD::FCOS: return "fcos";
5623 case ISD::FPOWI: return "fpowi";
5624 case ISD::FPOW: return "fpow";
5625 case ISD::FTRUNC: return "ftrunc";
5626 case ISD::FFLOOR: return "ffloor";
5627 case ISD::FCEIL: return "fceil";
5628 case ISD::FRINT: return "frint";
5629 case ISD::FNEARBYINT: return "fnearbyint";
5632 case ISD::ADD: return "add";
5633 case ISD::SUB: return "sub";
5634 case ISD::MUL: return "mul";
5635 case ISD::MULHU: return "mulhu";
5636 case ISD::MULHS: return "mulhs";
5637 case ISD::SDIV: return "sdiv";
5638 case ISD::UDIV: return "udiv";
5639 case ISD::SREM: return "srem";
5640 case ISD::UREM: return "urem";
5641 case ISD::SMUL_LOHI: return "smul_lohi";
5642 case ISD::UMUL_LOHI: return "umul_lohi";
5643 case ISD::SDIVREM: return "sdivrem";
5644 case ISD::UDIVREM: return "udivrem";
5645 case ISD::AND: return "and";
5646 case ISD::OR: return "or";
5647 case ISD::XOR: return "xor";
5648 case ISD::SHL: return "shl";
5649 case ISD::SRA: return "sra";
5650 case ISD::SRL: return "srl";
5651 case ISD::ROTL: return "rotl";
5652 case ISD::ROTR: return "rotr";
5653 case ISD::FADD: return "fadd";
5654 case ISD::FSUB: return "fsub";
5655 case ISD::FMUL: return "fmul";
5656 case ISD::FDIV: return "fdiv";
5657 case ISD::FREM: return "frem";
5658 case ISD::FCOPYSIGN: return "fcopysign";
5659 case ISD::FGETSIGN: return "fgetsign";
5661 case ISD::SETCC: return "setcc";
5662 case ISD::VSETCC: return "vsetcc";
5663 case ISD::SELECT: return "select";
5664 case ISD::SELECT_CC: return "select_cc";
5665 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5666 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5667 case ISD::CONCAT_VECTORS: return "concat_vectors";
5668 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5669 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5670 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5671 case ISD::CARRY_FALSE: return "carry_false";
5672 case ISD::ADDC: return "addc";
5673 case ISD::ADDE: return "adde";
5674 case ISD::SADDO: return "saddo";
5675 case ISD::UADDO: return "uaddo";
5676 case ISD::SSUBO: return "ssubo";
5677 case ISD::USUBO: return "usubo";
5678 case ISD::SMULO: return "smulo";
5679 case ISD::UMULO: return "umulo";
5680 case ISD::SUBC: return "subc";
5681 case ISD::SUBE: return "sube";
5682 case ISD::SHL_PARTS: return "shl_parts";
5683 case ISD::SRA_PARTS: return "sra_parts";
5684 case ISD::SRL_PARTS: return "srl_parts";
5686 // Conversion operators.
5687 case ISD::SIGN_EXTEND: return "sign_extend";
5688 case ISD::ZERO_EXTEND: return "zero_extend";
5689 case ISD::ANY_EXTEND: return "any_extend";
5690 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5691 case ISD::TRUNCATE: return "truncate";
5692 case ISD::FP_ROUND: return "fp_round";
5693 case ISD::FLT_ROUNDS_: return "flt_rounds";
5694 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5695 case ISD::FP_EXTEND: return "fp_extend";
5697 case ISD::SINT_TO_FP: return "sint_to_fp";
5698 case ISD::UINT_TO_FP: return "uint_to_fp";
5699 case ISD::FP_TO_SINT: return "fp_to_sint";
5700 case ISD::FP_TO_UINT: return "fp_to_uint";
5701 case ISD::BIT_CONVERT: return "bit_convert";
5702 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5703 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5705 case ISD::CONVERT_RNDSAT: {
5706 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5707 default: llvm_unreachable("Unknown cvt code!");
5708 case ISD::CVT_FF: return "cvt_ff";
5709 case ISD::CVT_FS: return "cvt_fs";
5710 case ISD::CVT_FU: return "cvt_fu";
5711 case ISD::CVT_SF: return "cvt_sf";
5712 case ISD::CVT_UF: return "cvt_uf";
5713 case ISD::CVT_SS: return "cvt_ss";
5714 case ISD::CVT_SU: return "cvt_su";
5715 case ISD::CVT_US: return "cvt_us";
5716 case ISD::CVT_UU: return "cvt_uu";
5720 // Control flow instructions
5721 case ISD::BR: return "br";
5722 case ISD::BRIND: return "brind";
5723 case ISD::BR_JT: return "br_jt";
5724 case ISD::BRCOND: return "brcond";
5725 case ISD::BR_CC: return "br_cc";
5726 case ISD::CALLSEQ_START: return "callseq_start";
5727 case ISD::CALLSEQ_END: return "callseq_end";
5730 case ISD::LOAD: return "load";
5731 case ISD::STORE: return "store";
5732 case ISD::VAARG: return "vaarg";
5733 case ISD::VACOPY: return "vacopy";
5734 case ISD::VAEND: return "vaend";
5735 case ISD::VASTART: return "vastart";
5736 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5737 case ISD::EXTRACT_ELEMENT: return "extract_element";
5738 case ISD::BUILD_PAIR: return "build_pair";
5739 case ISD::STACKSAVE: return "stacksave";
5740 case ISD::STACKRESTORE: return "stackrestore";
5741 case ISD::TRAP: return "trap";
5744 case ISD::BSWAP: return "bswap";
5745 case ISD::CTPOP: return "ctpop";
5746 case ISD::CTTZ: return "cttz";
5747 case ISD::CTLZ: return "ctlz";
5750 case ISD::TRAMPOLINE: return "trampoline";
5753 switch (cast<CondCodeSDNode>(this)->get()) {
5754 default: llvm_unreachable("Unknown setcc condition!");
5755 case ISD::SETOEQ: return "setoeq";
5756 case ISD::SETOGT: return "setogt";
5757 case ISD::SETOGE: return "setoge";
5758 case ISD::SETOLT: return "setolt";
5759 case ISD::SETOLE: return "setole";
5760 case ISD::SETONE: return "setone";
5762 case ISD::SETO: return "seto";
5763 case ISD::SETUO: return "setuo";
5764 case ISD::SETUEQ: return "setue";
5765 case ISD::SETUGT: return "setugt";
5766 case ISD::SETUGE: return "setuge";
5767 case ISD::SETULT: return "setult";
5768 case ISD::SETULE: return "setule";
5769 case ISD::SETUNE: return "setune";
5771 case ISD::SETEQ: return "seteq";
5772 case ISD::SETGT: return "setgt";
5773 case ISD::SETGE: return "setge";
5774 case ISD::SETLT: return "setlt";
5775 case ISD::SETLE: return "setle";
5776 case ISD::SETNE: return "setne";
5781 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5790 return "<post-inc>";
5792 return "<post-dec>";
5796 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5797 std::string S = "< ";
5811 if (getByValAlign())
5812 S += "byval-align:" + utostr(getByValAlign()) + " ";
5814 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5816 S += "byval-size:" + utostr(getByValSize()) + " ";
5820 void SDNode::dump() const { dump(0); }
5821 void SDNode::dump(const SelectionDAG *G) const {
5825 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5826 OS << (void*)this << ": ";
5828 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5830 if (getValueType(i) == MVT::Other)
5833 OS << getValueType(i).getEVTString();
5835 OS << " = " << getOperationName(G);
5838 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5839 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5840 if (!MN->memoperands_empty()) {
5843 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5844 e = MN->memoperands_end(); i != e; ++i) {
5851 } else if (const ShuffleVectorSDNode *SVN =
5852 dyn_cast<ShuffleVectorSDNode>(this)) {
5854 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5855 int Idx = SVN->getMaskElt(i);
5863 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5864 OS << '<' << CSDN->getAPIntValue() << '>';
5865 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5866 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5867 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5868 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5869 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5872 CSDN->getValueAPF().bitcastToAPInt().dump();
5875 } else if (const GlobalAddressSDNode *GADN =
5876 dyn_cast<GlobalAddressSDNode>(this)) {
5877 int64_t offset = GADN->getOffset();
5879 WriteAsOperand(OS, GADN->getGlobal());
5882 OS << " + " << offset;
5884 OS << " " << offset;
5885 if (unsigned int TF = GADN->getTargetFlags())
5886 OS << " [TF=" << TF << ']';
5887 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5888 OS << "<" << FIDN->getIndex() << ">";
5889 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5890 OS << "<" << JTDN->getIndex() << ">";
5891 if (unsigned int TF = JTDN->getTargetFlags())
5892 OS << " [TF=" << TF << ']';
5893 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5894 int offset = CP->getOffset();
5895 if (CP->isMachineConstantPoolEntry())
5896 OS << "<" << *CP->getMachineCPVal() << ">";
5898 OS << "<" << *CP->getConstVal() << ">";
5900 OS << " + " << offset;
5902 OS << " " << offset;
5903 if (unsigned int TF = CP->getTargetFlags())
5904 OS << " [TF=" << TF << ']';
5905 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5907 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5909 OS << LBB->getName() << " ";
5910 OS << (const void*)BBDN->getBasicBlock() << ">";
5911 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5912 if (G && R->getReg() &&
5913 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5914 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5916 OS << " %reg" << R->getReg();
5918 } else if (const ExternalSymbolSDNode *ES =
5919 dyn_cast<ExternalSymbolSDNode>(this)) {
5920 OS << "'" << ES->getSymbol() << "'";
5921 if (unsigned int TF = ES->getTargetFlags())
5922 OS << " [TF=" << TF << ']';
5923 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5925 OS << "<" << M->getValue() << ">";
5928 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5929 OS << ":" << N->getVT().getEVTString();
5931 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5932 OS << "<" << *LD->getMemOperand();
5935 switch (LD->getExtensionType()) {
5936 default: doExt = false; break;
5937 case ISD::EXTLOAD: OS << ", anyext"; break;
5938 case ISD::SEXTLOAD: OS << ", sext"; break;
5939 case ISD::ZEXTLOAD: OS << ", zext"; break;
5942 OS << " from " << LD->getMemoryVT().getEVTString();
5944 const char *AM = getIndexedModeName(LD->getAddressingMode());
5949 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5950 OS << "<" << *ST->getMemOperand();
5952 if (ST->isTruncatingStore())
5953 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5955 const char *AM = getIndexedModeName(ST->getAddressingMode());
5960 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5961 OS << "<" << *M->getMemOperand() << ">";
5962 } else if (const BlockAddressSDNode *BA =
5963 dyn_cast<BlockAddressSDNode>(this)) {
5965 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5967 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5969 if (unsigned int TF = BA->getTargetFlags())
5970 OS << " [TF=" << TF << ']';
5974 if (unsigned Order = G->GetOrdering(this))
5975 OS << " [ORD=" << Order << ']';
5977 if (getNodeId() != -1)
5978 OS << " [ID=" << getNodeId() << ']';
5981 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5983 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5984 if (i) OS << ", "; else OS << " ";
5985 OS << (void*)getOperand(i).getNode();
5986 if (unsigned RN = getOperand(i).getResNo())
5989 print_details(OS, G);
5992 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5993 const SelectionDAG *G, unsigned depth,
6006 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6008 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6012 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6013 unsigned depth) const {
6014 printrWithDepthHelper(OS, this, G, depth, 0);
6017 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6018 // Don't print impossibly deep things.
6019 printrWithDepth(OS, G, 100);
6022 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6023 printrWithDepth(dbgs(), G, depth);
6026 void SDNode::dumprFull(const SelectionDAG *G) const {
6027 // Don't print impossibly deep things.
6028 dumprWithDepth(G, 100);
6031 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6032 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6033 if (N->getOperand(i).getNode()->hasOneUse())
6034 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6036 dbgs() << "\n" << std::string(indent+2, ' ')
6037 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6041 dbgs().indent(indent);
6045 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6046 assert(N->getNumValues() == 1 &&
6047 "Can't unroll a vector with multiple results!");
6049 EVT VT = N->getValueType(0);
6050 unsigned NE = VT.getVectorNumElements();
6051 EVT EltVT = VT.getVectorElementType();
6052 DebugLoc dl = N->getDebugLoc();
6054 SmallVector<SDValue, 8> Scalars;
6055 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6057 // If ResNE is 0, fully unroll the vector op.
6060 else if (NE > ResNE)
6064 for (i= 0; i != NE; ++i) {
6065 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6066 SDValue Operand = N->getOperand(j);
6067 EVT OperandVT = Operand.getValueType();
6068 if (OperandVT.isVector()) {
6069 // A vector operand; extract a single element.
6070 EVT OperandEltVT = OperandVT.getVectorElementType();
6071 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6074 getConstant(i, MVT::i32));
6076 // A scalar operand; just use it as is.
6077 Operands[j] = Operand;
6081 switch (N->getOpcode()) {
6083 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6084 &Operands[0], Operands.size()));
6091 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6092 getShiftAmountOperand(Operands[1])));
6094 case ISD::SIGN_EXTEND_INREG:
6095 case ISD::FP_ROUND_INREG: {
6096 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6097 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6099 getValueType(ExtVT)));
6104 for (; i < ResNE; ++i)
6105 Scalars.push_back(getUNDEF(EltVT));
6107 return getNode(ISD::BUILD_VECTOR, dl,
6108 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6109 &Scalars[0], Scalars.size());
6113 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6114 /// location that is 'Dist' units away from the location that the 'Base' load
6115 /// is loading from.
6116 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6117 unsigned Bytes, int Dist) const {
6118 if (LD->getChain() != Base->getChain())
6120 EVT VT = LD->getValueType(0);
6121 if (VT.getSizeInBits() / 8 != Bytes)
6124 SDValue Loc = LD->getOperand(1);
6125 SDValue BaseLoc = Base->getOperand(1);
6126 if (Loc.getOpcode() == ISD::FrameIndex) {
6127 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6129 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6130 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6131 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6132 int FS = MFI->getObjectSize(FI);
6133 int BFS = MFI->getObjectSize(BFI);
6134 if (FS != BFS || FS != (int)Bytes) return false;
6135 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6137 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6138 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6139 if (V && (V->getSExtValue() == Dist*Bytes))
6143 GlobalValue *GV1 = NULL;
6144 GlobalValue *GV2 = NULL;
6145 int64_t Offset1 = 0;
6146 int64_t Offset2 = 0;
6147 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6148 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6149 if (isGA1 && isGA2 && GV1 == GV2)
6150 return Offset1 == (Offset2 + Dist*Bytes);
6155 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6156 /// it cannot be inferred.
6157 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6158 // If this is a GlobalAddress + cst, return the alignment.
6160 int64_t GVOffset = 0;
6161 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6162 // If GV has specified alignment, then use it. Otherwise, use the preferred
6164 unsigned Align = GV->getAlignment();
6166 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6167 if (GVar->hasInitializer()) {
6168 const TargetData *TD = TLI.getTargetData();
6169 Align = TD->getPreferredAlignment(GVar);
6173 return MinAlign(Align, GVOffset);
6176 // If this is a direct reference to a stack slot, use information about the
6177 // stack slot's alignment.
6178 int FrameIdx = 1 << 31;
6179 int64_t FrameOffset = 0;
6180 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6181 FrameIdx = FI->getIndex();
6182 } else if (Ptr.getOpcode() == ISD::ADD &&
6183 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6184 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6185 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6186 FrameOffset = Ptr.getConstantOperandVal(1);
6189 if (FrameIdx != (1 << 31)) {
6190 // FIXME: Handle FI+CST.
6191 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6192 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6194 if (MFI.isFixedObjectIndex(FrameIdx)) {
6195 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6197 // The alignment of the frame index can be determined from its offset from
6198 // the incoming frame position. If the frame object is at offset 32 and
6199 // the stack is guaranteed to be 16-byte aligned, then we know that the
6200 // object is 16-byte aligned.
6201 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6202 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6204 // Finally, the frame object itself may have a known alignment. Factor
6205 // the alignment + offset into a new alignment. For example, if we know
6206 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6207 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6208 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6209 return std::max(Align, FIInfoAlign);
6217 void SelectionDAG::dump() const {
6218 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6220 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6222 const SDNode *N = I;
6223 if (!N->hasOneUse() && N != getRoot().getNode())
6224 DumpNodes(N, 2, this);
6227 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6232 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6234 print_details(OS, G);
6237 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6238 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6239 const SelectionDAG *G, VisitedSDNodeSet &once) {
6240 if (!once.insert(N)) // If we've been here before, return now.
6243 // Dump the current SDNode, but don't end the line yet.
6244 OS << std::string(indent, ' ');
6247 // Having printed this SDNode, walk the children:
6248 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6249 const SDNode *child = N->getOperand(i).getNode();
6254 if (child->getNumOperands() == 0) {
6255 // This child has no grandchildren; print it inline right here.
6256 child->printr(OS, G);
6258 } else { // Just the address. FIXME: also print the child's opcode.
6260 if (unsigned RN = N->getOperand(i).getResNo())
6267 // Dump children that have grandchildren on their own line(s).
6268 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6269 const SDNode *child = N->getOperand(i).getNode();
6270 DumpNodesr(OS, child, indent+2, G, once);
6274 void SDNode::dumpr() const {
6275 VisitedSDNodeSet once;
6276 DumpNodesr(dbgs(), this, 0, 0, once);
6279 void SDNode::dumpr(const SelectionDAG *G) const {
6280 VisitedSDNodeSet once;
6281 DumpNodesr(dbgs(), this, 0, G, once);
6285 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6286 unsigned GlobalAddressSDNode::getAddressSpace() const {
6287 return getGlobal()->getType()->getAddressSpace();
6291 const Type *ConstantPoolSDNode::getType() const {
6292 if (isMachineConstantPoolEntry())
6293 return Val.MachineCPVal->getType();
6294 return Val.ConstVal->getType();
6297 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6299 unsigned &SplatBitSize,
6301 unsigned MinSplatBits,
6303 EVT VT = getValueType(0);
6304 assert(VT.isVector() && "Expected a vector type");
6305 unsigned sz = VT.getSizeInBits();
6306 if (MinSplatBits > sz)
6309 SplatValue = APInt(sz, 0);
6310 SplatUndef = APInt(sz, 0);
6312 // Get the bits. Bits with undefined values (when the corresponding element
6313 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6314 // in SplatValue. If any of the values are not constant, give up and return
6316 unsigned int nOps = getNumOperands();
6317 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6318 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6320 for (unsigned j = 0; j < nOps; ++j) {
6321 unsigned i = isBigEndian ? nOps-1-j : j;
6322 SDValue OpVal = getOperand(i);
6323 unsigned BitPos = j * EltBitSize;
6325 if (OpVal.getOpcode() == ISD::UNDEF)
6326 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6327 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6328 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6329 zextOrTrunc(sz) << BitPos);
6330 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6331 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6336 // The build_vector is all constants or undefs. Find the smallest element
6337 // size that splats the vector.
6339 HasAnyUndefs = (SplatUndef != 0);
6342 unsigned HalfSize = sz / 2;
6343 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6344 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6345 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6346 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6348 // If the two halves do not match (ignoring undef bits), stop here.
6349 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6350 MinSplatBits > HalfSize)
6353 SplatValue = HighValue | LowValue;
6354 SplatUndef = HighUndef & LowUndef;
6363 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6364 // Find the first non-undef value in the shuffle mask.
6366 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6369 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6371 // Make sure all remaining elements are either undef or the same as the first
6373 for (int Idx = Mask[i]; i != e; ++i)
6374 if (Mask[i] >= 0 && Mask[i] != Idx)
6380 static void checkForCyclesHelper(const SDNode *N,
6381 SmallPtrSet<const SDNode*, 32> &Visited,
6382 SmallPtrSet<const SDNode*, 32> &Checked) {
6383 // If this node has already been checked, don't check it again.
6384 if (Checked.count(N))
6387 // If a node has already been visited on this depth-first walk, reject it as
6389 if (!Visited.insert(N)) {
6390 dbgs() << "Offending node:\n";
6392 errs() << "Detected cycle in SelectionDAG\n";
6396 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6397 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6404 void llvm::checkForCycles(const llvm::SDNode *N) {
6406 assert(N && "Checking nonexistant SDNode");
6407 SmallPtrSet<const SDNode*, 32> visited;
6408 SmallPtrSet<const SDNode*, 32> checked;
6409 checkForCyclesHelper(N, visited, checked);
6413 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6414 checkForCycles(DAG->getRoot().getNode());