1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "llvm/Constants.h"
17 #include "llvm/Analysis/ValueTracking.h"
18 #include "llvm/Function.h"
19 #include "llvm/GlobalAlias.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Intrinsics.h"
22 #include "llvm/DerivedTypes.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetIntrinsicInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/System/Mutex.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallPtrSet.h"
47 #include "llvm/ADT/SmallSet.h"
48 #include "llvm/ADT/SmallVector.h"
49 #include "llvm/ADT/StringExtras.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
62 switch (VT.getSimpleVT().SimpleTy) {
63 default: llvm_unreachable("Unknown FP format");
64 case MVT::f32: return &APFloat::IEEEsingle;
65 case MVT::f64: return &APFloat::IEEEdouble;
66 case MVT::f80: return &APFloat::x87DoubleExtended;
67 case MVT::f128: return &APFloat::IEEEquad;
68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
72 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
74 //===----------------------------------------------------------------------===//
75 // ConstantFPSDNode Class
76 //===----------------------------------------------------------------------===//
78 /// isExactlyValue - We don't rely on operator== working on double values, as
79 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
80 /// As such, this method can be used to do an exact bit-for-bit comparison of
81 /// two floating point values.
82 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
83 return getValueAPF().bitwiseIsEqual(V);
86 bool ConstantFPSDNode::isValueValidForType(EVT VT,
88 assert(VT.isFloatingPoint() && "Can only convert between FP types");
90 // PPC long double cannot be converted to any other type.
91 if (VT == MVT::ppcf128 ||
92 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BIT_CONVERT)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
127 SDValue NotZero = N->getOperand(i);
128 if (isa<ConstantSDNode>(NotZero)) {
129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
131 } else if (isa<ConstantFPSDNode>(NotZero)) {
132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
133 bitcastToAPInt().isAllOnesValue())
138 // Okay, we have at least one ~0 value, check to see if the rest match or are
140 for (++i; i != e; ++i)
141 if (N->getOperand(i) != NotZero &&
142 N->getOperand(i).getOpcode() != ISD::UNDEF)
148 /// isBuildVectorAllZeros - Return true if the specified node is a
149 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
151 // Look through a bit convert.
152 if (N->getOpcode() == ISD::BIT_CONVERT)
153 N = N->getOperand(0).getNode();
155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
157 unsigned i = 0, e = N->getNumOperands();
159 // Skip over all of the undef values.
160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163 // Do not accept an all-undef vector.
164 if (i == e) return false;
166 // Do not accept build_vectors that aren't all constants or which have non-0
168 SDValue Zero = N->getOperand(i);
169 if (isa<ConstantSDNode>(Zero)) {
170 if (!cast<ConstantSDNode>(Zero)->isNullValue())
172 } else if (isa<ConstantFPSDNode>(Zero)) {
173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
178 // Okay, we have at least one 0 value, check to see if the rest match or are
180 for (++i; i != e; ++i)
181 if (N->getOperand(i) != Zero &&
182 N->getOperand(i).getOpcode() != ISD::UNDEF)
187 /// isScalarToVector - Return true if the specified node is a
188 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 /// element is not an undef.
190 bool ISD::isScalarToVector(const SDNode *N) {
191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194 if (N->getOpcode() != ISD::BUILD_VECTOR)
196 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
198 unsigned NumElems = N->getNumOperands();
199 for (unsigned i = 1; i < NumElems; ++i) {
200 SDValue V = N->getOperand(i);
201 if (V.getOpcode() != ISD::UNDEF)
207 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
208 /// when given the operation for (X op Y).
209 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
210 // To perform this operation, we just need to swap the L and G bits of the
212 unsigned OldL = (Operation >> 2) & 1;
213 unsigned OldG = (Operation >> 1) & 1;
214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
215 (OldL << 1) | // New G bit
216 (OldG << 2)); // New L bit.
219 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
220 /// 'op' is a valid SetCC operation.
221 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
222 unsigned Operation = Op;
224 Operation ^= 7; // Flip L, G, E bits, but not U.
226 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: llvm_unreachable("Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return MF->getTarget();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
485 //===----------------------------------------------------------------------===//
486 // SelectionDAG Class
487 //===----------------------------------------------------------------------===//
489 /// doNotCSE - Return true if CSE should not be performed for this node.
490 static bool doNotCSE(SDNode *N) {
491 if (N->getValueType(0) == MVT::Flag)
492 return true; // Never CSE anything that produces a flag.
494 switch (N->getOpcode()) {
496 case ISD::HANDLENODE:
498 return true; // Never CSE these nodes.
501 // Check that remaining values produced are not flags.
502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
503 if (N->getValueType(i) == MVT::Flag)
504 return true; // Never CSE anything that produces a flag.
509 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
511 void SelectionDAG::RemoveDeadNodes() {
512 // Create a dummy node (which is not added to allnodes), that adds a reference
513 // to the root node, preventing it from being deleted.
514 HandleSDNode Dummy(getRoot());
516 SmallVector<SDNode*, 128> DeadNodes;
518 // Add all obviously-dead nodes to the DeadNodes worklist.
519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
521 DeadNodes.push_back(I);
523 RemoveDeadNodes(DeadNodes);
525 // If the root changed (e.g. it was a dead load, update the root).
526 setRoot(Dummy.getValue());
529 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
530 /// given list, and any nodes that become unreachable as a result.
531 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
532 DAGUpdateListener *UpdateListener) {
534 // Process the worklist, deleting the nodes and adding their uses to the
536 while (!DeadNodes.empty()) {
537 SDNode *N = DeadNodes.pop_back_val();
540 UpdateListener->NodeDeleted(N, 0);
542 // Take the node out of the appropriate CSE map.
543 RemoveNodeFromCSEMaps(N);
545 // Next, brutally remove the operand list. This is safe to do, as there are
546 // no cycles in the graph.
547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
549 SDNode *Operand = Use.getNode();
552 // Now that we removed this operand, see if there are no uses of it left.
553 if (Operand->use_empty())
554 DeadNodes.push_back(Operand);
561 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
562 SmallVector<SDNode*, 16> DeadNodes(1, N);
563 RemoveDeadNodes(DeadNodes, UpdateListener);
566 void SelectionDAG::DeleteNode(SDNode *N) {
567 // First take this out of the appropriate CSE map.
568 RemoveNodeFromCSEMaps(N);
570 // Finally, remove uses due to operands of this node, remove from the
571 // AllNodes list, and delete the node.
572 DeleteNodeNotInCSEMaps(N);
575 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
576 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
577 assert(N->use_empty() && "Cannot delete a node that is not dead!");
579 // Drop all of the operands and decrement used node's use counts.
585 void SelectionDAG::DeallocateNode(SDNode *N) {
586 if (N->OperandsNeedDelete)
587 delete[] N->OperandList;
589 // Set the opcode to DELETED_NODE to help catch bugs when node
590 // memory is reallocated.
591 N->NodeType = ISD::DELETED_NODE;
593 NodeAllocator.Deallocate(AllNodes.remove(N));
595 // Remove the ordering of this node.
599 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
600 /// correspond to it. This is useful when we're about to delete or repurpose
601 /// the node. We don't want future request for structurally identical nodes
602 /// to return N anymore.
603 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
605 switch (N->getOpcode()) {
606 case ISD::EntryToken:
607 llvm_unreachable("EntryToken should not be in CSEMaps!");
609 case ISD::HANDLENODE: return false; // noop.
611 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
612 "Cond code doesn't exist!");
613 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
614 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
616 case ISD::ExternalSymbol:
617 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
619 case ISD::TargetExternalSymbol: {
620 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
621 Erased = TargetExternalSymbols.erase(
622 std::pair<std::string,unsigned char>(ESN->getSymbol(),
623 ESN->getTargetFlags()));
626 case ISD::VALUETYPE: {
627 EVT VT = cast<VTSDNode>(N)->getVT();
628 if (VT.isExtended()) {
629 Erased = ExtendedValueTypeNodes.erase(VT);
631 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
632 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
637 // Remove it from the CSE Map.
638 Erased = CSEMap.RemoveNode(N);
642 // Verify that the node was actually in one of the CSE maps, unless it has a
643 // flag result (which cannot be CSE'd) or is one of the special cases that are
644 // not subject to CSE.
645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
646 !N->isMachineOpcode() && !doNotCSE(N)) {
649 llvm_unreachable("Node is not in map!");
655 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
656 /// maps and modified in place. Add it back to the CSE maps, unless an identical
657 /// node already exists, in which case transfer all its users to the existing
658 /// node. This transfer can potentially trigger recursive merging.
661 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
662 DAGUpdateListener *UpdateListener) {
663 // For node types that aren't CSE'd, just act as if no identical node
666 SDNode *Existing = CSEMap.GetOrInsertNode(N);
668 // If there was already an existing matching node, use ReplaceAllUsesWith
669 // to replace the dead one with the existing one. This can cause
670 // recursive merging of other unrelated nodes down the line.
671 ReplaceAllUsesWith(N, Existing, UpdateListener);
673 // N is now dead. Inform the listener if it exists and delete it.
675 UpdateListener->NodeDeleted(N, Existing);
676 DeleteNodeNotInCSEMaps(N);
681 // If the node doesn't already exist, we updated it. Inform a listener if
684 UpdateListener->NodeUpdated(N);
687 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
688 /// were replaced with those specified. If this node is never memoized,
689 /// return null, otherwise return a pointer to the slot it would take. If a
690 /// node already exists with these operands, the slot will be non-null.
691 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
696 SDValue Ops[] = { Op };
698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
699 AddNodeIDCustom(ID, N);
700 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
704 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
705 /// were replaced with those specified. If this node is never memoized,
706 /// return null, otherwise return a pointer to the slot it would take. If a
707 /// node already exists with these operands, the slot will be non-null.
708 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
709 SDValue Op1, SDValue Op2,
714 SDValue Ops[] = { Op1, Op2 };
716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
717 AddNodeIDCustom(ID, N);
718 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
723 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
724 /// were replaced with those specified. If this node is never memoized,
725 /// return null, otherwise return a pointer to the slot it would take. If a
726 /// node already exists with these operands, the slot will be non-null.
727 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
728 const SDValue *Ops,unsigned NumOps,
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
735 AddNodeIDCustom(ID, N);
736 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
740 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
741 void SelectionDAG::VerifyNode(SDNode *N) {
742 switch (N->getOpcode()) {
745 case ISD::BUILD_PAIR: {
746 EVT VT = N->getValueType(0);
747 assert(N->getNumValues() == 1 && "Too many results!");
748 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
749 "Wrong return type!");
750 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
751 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
752 "Mismatched operand types!");
753 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
754 "Wrong operand type!");
755 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
756 "Wrong return type size");
759 case ISD::BUILD_VECTOR: {
760 assert(N->getNumValues() == 1 && "Too many results!");
761 assert(N->getValueType(0).isVector() && "Wrong return type!");
762 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
763 "Wrong number of operands!");
764 EVT EltVT = N->getValueType(0).getVectorElementType();
765 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
766 assert((I->getValueType() == EltVT ||
767 (EltVT.isInteger() && I->getValueType().isInteger() &&
768 EltVT.bitsLE(I->getValueType()))) &&
769 "Wrong operand type!");
775 /// getEVTAlignment - Compute the default alignment value for the
778 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
779 const Type *Ty = VT == MVT::iPTR ?
780 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
781 VT.getTypeForEVT(*getContext());
783 return TLI.getTargetData()->getABITypeAlignment(Ty);
786 // EntryNode could meaningfully have debug info if we can find it...
787 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
788 : TLI(tli), FLI(fli), DW(0),
789 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
790 getVTList(MVT::Other)),
791 Root(getEntryNode()), Ordering(0) {
792 AllNodes.push_back(&EntryNode);
793 Ordering = new SDNodeOrdering();
796 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
801 Context = &mf.getFunction()->getContext();
804 SelectionDAG::~SelectionDAG() {
809 void SelectionDAG::allnodes_clear() {
810 assert(&*AllNodes.begin() == &EntryNode);
811 AllNodes.remove(AllNodes.begin());
812 while (!AllNodes.empty())
813 DeallocateNode(AllNodes.begin());
816 void SelectionDAG::clear() {
818 OperandAllocator.Reset();
821 ExtendedValueTypeNodes.clear();
822 ExternalSymbols.clear();
823 TargetExternalSymbols.clear();
824 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
825 static_cast<CondCodeSDNode*>(0));
826 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
827 static_cast<SDNode*>(0));
829 EntryNode.UseList = 0;
830 AllNodes.push_back(&EntryNode);
831 Root = getEntryNode();
832 Ordering = new SDNodeOrdering();
835 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
836 return VT.bitsGT(Op.getValueType()) ?
837 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
838 getNode(ISD::TRUNCATE, DL, VT, Op);
841 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
842 return VT.bitsGT(Op.getValueType()) ?
843 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
844 getNode(ISD::TRUNCATE, DL, VT, Op);
847 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
848 assert(!VT.isVector() &&
849 "getZeroExtendInReg should use the vector element type instead of "
851 if (Op.getValueType() == VT) return Op;
852 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
853 APInt Imm = APInt::getLowBitsSet(BitWidth,
855 return getNode(ISD::AND, DL, Op.getValueType(), Op,
856 getConstant(Imm, Op.getValueType()));
859 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
861 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
862 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
864 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
865 return getNode(ISD::XOR, DL, VT, Val, NegOne);
868 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
869 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
870 assert((EltVT.getSizeInBits() >= 64 ||
871 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
872 "getConstant with a uint64_t value that doesn't fit in the type!");
873 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
876 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
877 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
880 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
881 assert(VT.isInteger() && "Cannot create FP integer constant!");
883 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
884 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
885 "APInt size does not match type size!");
887 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
889 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
893 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
895 return SDValue(N, 0);
898 N = NodeAllocator.Allocate<ConstantSDNode>();
899 new (N) ConstantSDNode(isT, &Val, EltVT);
900 CSEMap.InsertNode(N, IP);
901 AllNodes.push_back(N);
904 SDValue Result(N, 0);
906 SmallVector<SDValue, 8> Ops;
907 Ops.assign(VT.getVectorNumElements(), Result);
908 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
909 VT, &Ops[0], Ops.size());
914 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
915 return getConstant(Val, TLI.getPointerTy(), isTarget);
919 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
920 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
923 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
924 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
927 VT.isVector() ? VT.getVectorElementType() : VT;
929 // Do the map lookup using the actual bit pattern for the floating point
930 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
931 // we don't have issues with SNANs.
932 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
934 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
938 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
940 return SDValue(N, 0);
943 N = NodeAllocator.Allocate<ConstantFPSDNode>();
944 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 // FIXME DebugLoc info might be appropriate here
954 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
955 VT, &Ops[0], Ops.size());
960 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
962 VT.isVector() ? VT.getVectorElementType() : VT;
964 return getConstantFP(APFloat((float)Val), VT, isTarget);
966 return getConstantFP(APFloat(Val), VT, isTarget);
969 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
970 EVT VT, int64_t Offset,
972 unsigned char TargetFlags) {
973 assert((TargetFlags == 0 || isTargetGA) &&
974 "Cannot set target flags on target-independent globals");
976 // Truncate (with sign-extension) the offset value to the pointer size.
977 EVT PTy = TLI.getPointerTy();
978 unsigned BitWidth = PTy.getSizeInBits();
980 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
982 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
984 // If GV is an alias then use the aliasee for determining thread-localness.
985 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
986 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
990 if (GVar && GVar->isThreadLocal())
991 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
993 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
996 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
998 ID.AddInteger(Offset);
999 ID.AddInteger(TargetFlags);
1001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1002 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1005 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1012 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1013 FoldingSetNodeID ID;
1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1018 return SDValue(E, 0);
1020 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1021 new (N) FrameIndexSDNode(FI, VT, isTarget);
1022 CSEMap.InsertNode(N, IP);
1023 AllNodes.push_back(N);
1024 return SDValue(N, 0);
1027 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1028 unsigned char TargetFlags) {
1029 assert((TargetFlags == 0 || isTarget) &&
1030 "Cannot set target flags on target-independent jump tables");
1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1032 FoldingSetNodeID ID;
1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1035 ID.AddInteger(TargetFlags);
1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1038 return SDValue(E, 0);
1040 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1041 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1042 CSEMap.InsertNode(N, IP);
1043 AllNodes.push_back(N);
1044 return SDValue(N, 0);
1047 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1048 unsigned Alignment, int Offset,
1050 unsigned char TargetFlags) {
1051 assert((TargetFlags == 0 || isTarget) &&
1052 "Cannot set target flags on target-independent globals");
1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1056 FoldingSetNodeID ID;
1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1058 ID.AddInteger(Alignment);
1059 ID.AddInteger(Offset);
1061 ID.AddInteger(TargetFlags);
1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1064 return SDValue(E, 0);
1066 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1067 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1068 CSEMap.InsertNode(N, IP);
1069 AllNodes.push_back(N);
1070 return SDValue(N, 0);
1074 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1075 unsigned Alignment, int Offset,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent globals");
1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1083 FoldingSetNodeID ID;
1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1085 ID.AddInteger(Alignment);
1086 ID.AddInteger(Offset);
1087 C->AddSelectionDAGCSEId(ID);
1088 ID.AddInteger(TargetFlags);
1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1091 return SDValue(E, 0);
1093 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1094 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1095 CSEMap.InsertNode(N, IP);
1096 AllNodes.push_back(N);
1097 return SDValue(N, 0);
1100 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1101 FoldingSetNodeID ID;
1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1106 return SDValue(E, 0);
1108 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1109 new (N) BasicBlockSDNode(MBB);
1110 CSEMap.InsertNode(N, IP);
1111 AllNodes.push_back(N);
1112 return SDValue(N, 0);
1115 SDValue SelectionDAG::getValueType(EVT VT) {
1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1117 ValueTypeNodes.size())
1118 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1120 SDNode *&N = VT.isExtended() ?
1121 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1123 if (N) return SDValue(N, 0);
1124 N = NodeAllocator.Allocate<VTSDNode>();
1125 new (N) VTSDNode(VT);
1126 AllNodes.push_back(N);
1127 return SDValue(N, 0);
1130 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1131 SDNode *&N = ExternalSymbols[Sym];
1132 if (N) return SDValue(N, 0);
1133 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1134 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1135 AllNodes.push_back(N);
1136 return SDValue(N, 0);
1139 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1140 unsigned char TargetFlags) {
1142 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1144 if (N) return SDValue(N, 0);
1145 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1146 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1147 AllNodes.push_back(N);
1148 return SDValue(N, 0);
1151 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1152 if ((unsigned)Cond >= CondCodeNodes.size())
1153 CondCodeNodes.resize(Cond+1);
1155 if (CondCodeNodes[Cond] == 0) {
1156 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1157 new (N) CondCodeSDNode(Cond);
1158 CondCodeNodes[Cond] = N;
1159 AllNodes.push_back(N);
1162 return SDValue(CondCodeNodes[Cond], 0);
1165 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1166 // the shuffle mask M that point at N1 to point at N2, and indices that point
1167 // N2 to point at N1.
1168 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1170 int NElts = M.size();
1171 for (int i = 0; i != NElts; ++i) {
1179 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1180 SDValue N2, const int *Mask) {
1181 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1182 assert(VT.isVector() && N1.getValueType().isVector() &&
1183 "Vector Shuffle VTs must be a vectors");
1184 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1185 && "Vector Shuffle VTs must have same element type");
1187 // Canonicalize shuffle undef, undef -> undef
1188 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1189 return getUNDEF(VT);
1191 // Validate that all indices in Mask are within the range of the elements
1192 // input to the shuffle.
1193 unsigned NElts = VT.getVectorNumElements();
1194 SmallVector<int, 8> MaskVec;
1195 for (unsigned i = 0; i != NElts; ++i) {
1196 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1197 MaskVec.push_back(Mask[i]);
1200 // Canonicalize shuffle v, v -> v, undef
1203 for (unsigned i = 0; i != NElts; ++i)
1204 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1207 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1208 if (N1.getOpcode() == ISD::UNDEF)
1209 commuteShuffle(N1, N2, MaskVec);
1211 // Canonicalize all index into lhs, -> shuffle lhs, undef
1212 // Canonicalize all index into rhs, -> shuffle rhs, undef
1213 bool AllLHS = true, AllRHS = true;
1214 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1215 for (unsigned i = 0; i != NElts; ++i) {
1216 if (MaskVec[i] >= (int)NElts) {
1221 } else if (MaskVec[i] >= 0) {
1225 if (AllLHS && AllRHS)
1226 return getUNDEF(VT);
1227 if (AllLHS && !N2Undef)
1231 commuteShuffle(N1, N2, MaskVec);
1234 // If Identity shuffle, or all shuffle in to undef, return that node.
1235 bool AllUndef = true;
1236 bool Identity = true;
1237 for (unsigned i = 0; i != NElts; ++i) {
1238 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1239 if (MaskVec[i] >= 0) AllUndef = false;
1241 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1244 return getUNDEF(VT);
1246 FoldingSetNodeID ID;
1247 SDValue Ops[2] = { N1, N2 };
1248 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1249 for (unsigned i = 0; i != NElts; ++i)
1250 ID.AddInteger(MaskVec[i]);
1253 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1254 return SDValue(E, 0);
1256 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1257 // SDNode doesn't have access to it. This memory will be "leaked" when
1258 // the node is deallocated, but recovered when the NodeAllocator is released.
1259 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1260 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1262 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1263 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1264 CSEMap.InsertNode(N, IP);
1265 AllNodes.push_back(N);
1266 return SDValue(N, 0);
1269 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1270 SDValue Val, SDValue DTy,
1271 SDValue STy, SDValue Rnd, SDValue Sat,
1272 ISD::CvtCode Code) {
1273 // If the src and dest types are the same and the conversion is between
1274 // integer types of the same sign or two floats, no conversion is necessary.
1276 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1279 FoldingSetNodeID ID;
1280 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1281 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1287 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1288 CSEMap.InsertNode(N, IP);
1289 AllNodes.push_back(N);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1294 FoldingSetNodeID ID;
1295 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1296 ID.AddInteger(RegNo);
1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1299 return SDValue(E, 0);
1301 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1302 new (N) RegisterSDNode(RegNo, VT);
1303 CSEMap.InsertNode(N, IP);
1304 AllNodes.push_back(N);
1305 return SDValue(N, 0);
1308 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1311 FoldingSetNodeID ID;
1312 SDValue Ops[] = { Root };
1313 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1314 ID.AddInteger(LabelID);
1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1317 return SDValue(E, 0);
1319 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1320 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1321 CSEMap.InsertNode(N, IP);
1322 AllNodes.push_back(N);
1323 return SDValue(N, 0);
1326 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1328 unsigned char TargetFlags) {
1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1331 FoldingSetNodeID ID;
1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1334 ID.AddInteger(TargetFlags);
1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1337 return SDValue(E, 0);
1339 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1340 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1341 CSEMap.InsertNode(N, IP);
1342 AllNodes.push_back(N);
1343 return SDValue(N, 0);
1346 SDValue SelectionDAG::getSrcValue(const Value *V) {
1347 assert((!V || isa<PointerType>(V->getType())) &&
1348 "SrcValue is not a pointer?");
1350 FoldingSetNodeID ID;
1351 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1356 return SDValue(E, 0);
1358 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1359 new (N) SrcValueSDNode(V);
1360 CSEMap.InsertNode(N, IP);
1361 AllNodes.push_back(N);
1362 return SDValue(N, 0);
1365 /// getShiftAmountOperand - Return the specified value casted to
1366 /// the target's desired shift amount type.
1367 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1368 EVT OpTy = Op.getValueType();
1369 MVT ShTy = TLI.getShiftAmountTy();
1370 if (OpTy == ShTy || OpTy.isVector()) return Op;
1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1376 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1377 /// specified value type.
1378 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1380 unsigned ByteSize = VT.getStoreSize();
1381 const Type *Ty = VT.getTypeForEVT(*getContext());
1382 unsigned StackAlign =
1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1386 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1389 /// CreateStackTemporary - Create a stack temporary suitable for holding
1390 /// either of the specified value types.
1391 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1393 VT2.getStoreSizeInBits())/8;
1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1396 const TargetData *TD = TLI.getTargetData();
1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1398 TD->getPrefTypeAlignment(Ty2));
1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1402 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1405 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1407 // These setcc operations always fold.
1411 case ISD::SETFALSE2: return getConstant(0, VT);
1413 case ISD::SETTRUE2: return getConstant(1, VT);
1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1430 const APInt &C2 = N2C->getAPIntValue();
1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1432 const APInt &C1 = N1C->getAPIntValue();
1435 default: llvm_unreachable("Unknown integer setcc!");
1436 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1437 case ISD::SETNE: return getConstant(C1 != C2, VT);
1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1451 // No compile time operations on this type yet.
1452 if (N1C->getValueType(0) == MVT::ppcf128)
1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1459 return getUNDEF(VT);
1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1462 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1466 R==APFloat::cmpLessThan, VT);
1467 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1471 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1475 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1476 return getUNDEF(VT);
1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1479 R==APFloat::cmpEqual, VT);
1480 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1481 return getUNDEF(VT);
1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1484 R==APFloat::cmpEqual, VT);
1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1488 R==APFloat::cmpEqual, VT);
1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1491 R==APFloat::cmpLessThan, VT);
1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1493 R==APFloat::cmpUnordered, VT);
1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1498 // Ensure that the constant occurs on the RHS.
1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1503 // Could not fold it.
1507 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1508 /// use this predicate to simplify operations downstream.
1509 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1510 // This predicate is not safe for vector operations.
1511 if (Op.getValueType().isVector())
1514 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1518 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1519 /// this predicate to simplify operations downstream. Mask is known to be zero
1520 /// for bits that V cannot have.
1521 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1522 unsigned Depth) const {
1523 APInt KnownZero, KnownOne;
1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1526 return (KnownZero & Mask) == Mask;
1529 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1530 /// known to be either zero or one and return them in the KnownZero/KnownOne
1531 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1533 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1534 APInt &KnownZero, APInt &KnownOne,
1535 unsigned Depth) const {
1536 unsigned BitWidth = Mask.getBitWidth();
1537 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1538 "Mask size mismatches value type size!");
1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1541 if (Depth == 6 || Mask == 0)
1542 return; // Limit search depth.
1544 APInt KnownZero2, KnownOne2;
1546 switch (Op.getOpcode()) {
1548 // We know all of the bits for a constant!
1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1550 KnownZero = ~KnownOne & Mask;
1553 // If either the LHS or the RHS are Zero, the result is zero.
1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1556 KnownZero2, KnownOne2, Depth+1);
1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1560 // Output known-1 bits are only known if set in both the LHS & RHS.
1561 KnownOne &= KnownOne2;
1562 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1563 KnownZero |= KnownZero2;
1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1568 KnownZero2, KnownOne2, Depth+1);
1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1572 // Output known-0 bits are only known if clear in both the LHS & RHS.
1573 KnownZero &= KnownZero2;
1574 // Output known-1 are known to be set if set in either the LHS | RHS.
1575 KnownOne |= KnownOne2;
1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1583 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1585 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1587 KnownZero = KnownZeroOut;
1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1597 // If low bits are zero in either operand, output low known-0 bits.
1598 // Also compute a conserative estimate for high known-0 bits.
1599 // More trickiness is possible, but this is sufficient for the
1600 // interesting case of alignment computation.
1602 unsigned TrailZ = KnownZero.countTrailingOnes() +
1603 KnownZero2.countTrailingOnes();
1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1605 KnownZero2.countLeadingOnes(),
1606 BitWidth) - BitWidth;
1608 TrailZ = std::min(TrailZ, BitWidth);
1609 LeadZ = std::min(LeadZ, BitWidth);
1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1611 APInt::getHighBitsSet(BitWidth, LeadZ);
1616 // For the purposes of computing leading zeros we can conservatively
1617 // treat a udiv as a logical right shift by the power of 2 known to
1618 // be less than the denominator.
1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1620 ComputeMaskedBits(Op.getOperand(0),
1621 AllOnes, KnownZero2, KnownOne2, Depth+1);
1622 unsigned LeadZ = KnownZero2.countLeadingOnes();
1626 ComputeMaskedBits(Op.getOperand(1),
1627 AllOnes, KnownZero2, KnownOne2, Depth+1);
1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1629 if (RHSUnknownLeadingOnes != BitWidth)
1630 LeadZ = std::min(BitWidth,
1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 // Only known if known in both the LHS and RHS.
1643 KnownOne &= KnownOne2;
1644 KnownZero &= KnownZero2;
1646 case ISD::SELECT_CC:
1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1652 // Only known if known in both the LHS and RHS.
1653 KnownOne &= KnownOne2;
1654 KnownZero &= KnownZero2;
1662 if (Op.getResNo() != 1)
1664 // The boolean result conforms to getBooleanContents. Fall through.
1666 // If we know the result of a setcc has the top bits zero, use this info.
1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1674 unsigned ShAmt = SA->getZExtValue();
1676 // If the shift count is an invalid immediate, don't do anything.
1677 if (ShAmt >= BitWidth)
1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1681 KnownZero, KnownOne, Depth+1);
1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 KnownZero <<= ShAmt;
1685 // low bits known zero.
1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1692 unsigned ShAmt = SA->getZExtValue();
1694 // If the shift count is an invalid immediate, don't do anything.
1695 if (ShAmt >= BitWidth)
1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1699 KnownZero, KnownOne, Depth+1);
1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1701 KnownZero = KnownZero.lshr(ShAmt);
1702 KnownOne = KnownOne.lshr(ShAmt);
1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1705 KnownZero |= HighBits; // High bits known zero.
1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1710 unsigned ShAmt = SA->getZExtValue();
1712 // If the shift count is an invalid immediate, don't do anything.
1713 if (ShAmt >= BitWidth)
1716 APInt InDemandedMask = (Mask << ShAmt);
1717 // If any of the demanded bits are produced by the sign extension, we also
1718 // demand the input sign bit.
1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1720 if (HighBits.getBoolValue())
1721 InDemandedMask |= APInt::getSignBit(BitWidth);
1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1726 KnownZero = KnownZero.lshr(ShAmt);
1727 KnownOne = KnownOne.lshr(ShAmt);
1729 // Handle the sign bits.
1730 APInt SignBit = APInt::getSignBit(BitWidth);
1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1733 if (KnownZero.intersects(SignBit)) {
1734 KnownZero |= HighBits; // New bits are known zero.
1735 } else if (KnownOne.intersects(SignBit)) {
1736 KnownOne |= HighBits; // New bits are known one.
1740 case ISD::SIGN_EXTEND_INREG: {
1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1742 unsigned EBits = EVT.getScalarType().getSizeInBits();
1744 // Sign extension. Compute the demanded bits in the result that are not
1745 // present in the input.
1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1748 APInt InSignBit = APInt::getSignBit(EBits);
1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1751 // If the sign extended bits are demanded, we know that the sign
1753 InSignBit.zext(BitWidth);
1754 if (NewBits.getBoolValue())
1755 InputDemandedBits |= InSignBit;
1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1758 KnownZero, KnownOne, Depth+1);
1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1761 // If the sign bit of the input is known set or clear, then we know the
1762 // top bits of the result.
1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1764 KnownZero |= NewBits;
1765 KnownOne &= ~NewBits;
1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1767 KnownOne |= NewBits;
1768 KnownZero &= ~NewBits;
1769 } else { // Input sign bit unknown
1770 KnownZero &= ~NewBits;
1771 KnownOne &= ~NewBits;
1778 unsigned LowBits = Log2_32(BitWidth)+1;
1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1784 if (ISD::isZEXTLoad(Op.getNode())) {
1785 LoadSDNode *LD = cast<LoadSDNode>(Op);
1786 EVT VT = LD->getMemoryVT();
1787 unsigned MemBits = VT.getScalarType().getSizeInBits();
1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1792 case ISD::ZERO_EXTEND: {
1793 EVT InVT = Op.getOperand(0).getValueType();
1794 unsigned InBits = InVT.getScalarType().getSizeInBits();
1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1796 APInt InMask = Mask;
1797 InMask.trunc(InBits);
1798 KnownZero.trunc(InBits);
1799 KnownOne.trunc(InBits);
1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1801 KnownZero.zext(BitWidth);
1802 KnownOne.zext(BitWidth);
1803 KnownZero |= NewBits;
1806 case ISD::SIGN_EXTEND: {
1807 EVT InVT = Op.getOperand(0).getValueType();
1808 unsigned InBits = InVT.getScalarType().getSizeInBits();
1809 APInt InSignBit = APInt::getSignBit(InBits);
1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1811 APInt InMask = Mask;
1812 InMask.trunc(InBits);
1814 // If any of the sign extended bits are demanded, we know that the sign
1815 // bit is demanded. Temporarily set this bit in the mask for our callee.
1816 if (NewBits.getBoolValue())
1817 InMask |= InSignBit;
1819 KnownZero.trunc(InBits);
1820 KnownOne.trunc(InBits);
1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1823 // Note if the sign bit is known to be zero or one.
1824 bool SignBitKnownZero = KnownZero.isNegative();
1825 bool SignBitKnownOne = KnownOne.isNegative();
1826 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1827 "Sign bit can't be known to be both zero and one!");
1829 // If the sign bit wasn't actually demanded by our caller, we don't
1830 // want it set in the KnownZero and KnownOne result values. Reset the
1831 // mask and reapply it to the result values.
1833 InMask.trunc(InBits);
1834 KnownZero &= InMask;
1837 KnownZero.zext(BitWidth);
1838 KnownOne.zext(BitWidth);
1840 // If the sign bit is known zero or one, the top bits match.
1841 if (SignBitKnownZero)
1842 KnownZero |= NewBits;
1843 else if (SignBitKnownOne)
1844 KnownOne |= NewBits;
1847 case ISD::ANY_EXTEND: {
1848 EVT InVT = Op.getOperand(0).getValueType();
1849 unsigned InBits = InVT.getScalarType().getSizeInBits();
1850 APInt InMask = Mask;
1851 InMask.trunc(InBits);
1852 KnownZero.trunc(InBits);
1853 KnownOne.trunc(InBits);
1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1855 KnownZero.zext(BitWidth);
1856 KnownOne.zext(BitWidth);
1859 case ISD::TRUNCATE: {
1860 EVT InVT = Op.getOperand(0).getValueType();
1861 unsigned InBits = InVT.getScalarType().getSizeInBits();
1862 APInt InMask = Mask;
1863 InMask.zext(InBits);
1864 KnownZero.zext(InBits);
1865 KnownOne.zext(InBits);
1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1868 KnownZero.trunc(BitWidth);
1869 KnownOne.trunc(BitWidth);
1872 case ISD::AssertZext: {
1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1877 KnownZero |= (~InMask) & Mask;
1881 // All bits are zero except the low bit.
1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1887 // We know that the top bits of C-X are clear if X contains less bits
1888 // than C (i.e. no wrap-around can happen). For example, 20-X is
1889 // positive if we can prove that X is >= 0 and < 16.
1890 if (CLHS->getAPIntValue().isNonNegative()) {
1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1892 // NLZ can't be BitWidth with no sign bit
1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1897 // If all of the MaskV bits are known to be zero, then we know the
1898 // output top bits are zero, because we now know that the output is
1900 if ((KnownZero2 & MaskV) == MaskV) {
1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1902 // Top bits known zero.
1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1910 // Output known-0 bits are known if clear or set in both the low clear bits
1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1912 // low 3 bits clear.
1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1920 KnownZeroOut = std::min(KnownZeroOut,
1921 KnownZero2.countTrailingOnes());
1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1928 const APInt &RA = Rem->getAPIntValue();
1929 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1930 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1934 // If the sign bit of the first operand is zero, the sign bit of
1935 // the result is zero. If the first operand has no one bits below
1936 // the second operand's single 1 bit, its sign will be zero.
1937 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1938 KnownZero2 |= ~LowBits;
1940 KnownZero |= KnownZero2 & Mask;
1942 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1947 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1948 const APInt &RA = Rem->getAPIntValue();
1949 if (RA.isPowerOf2()) {
1950 APInt LowBits = (RA - 1);
1951 APInt Mask2 = LowBits & Mask;
1952 KnownZero |= ~LowBits & Mask;
1953 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1959 // Since the result is less than or equal to either operand, any leading
1960 // zero bits in either operand must also exist in the result.
1961 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1962 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1964 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1967 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1968 KnownZero2.countLeadingOnes());
1970 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1974 // Allow the target to implement this method for its nodes.
1975 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1976 case ISD::INTRINSIC_WO_CHAIN:
1977 case ISD::INTRINSIC_W_CHAIN:
1978 case ISD::INTRINSIC_VOID:
1979 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1986 /// ComputeNumSignBits - Return the number of times the sign bit of the
1987 /// register is replicated into the other bits. We know that at least 1 bit
1988 /// is always equal to the sign bit (itself), but other cases can give us
1989 /// information. For example, immediately after an "SRA X, 2", we know that
1990 /// the top 3 bits are all equal to each other, so we return 3.
1991 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1992 EVT VT = Op.getValueType();
1993 assert(VT.isInteger() && "Invalid VT!");
1994 unsigned VTBits = VT.getScalarType().getSizeInBits();
1996 unsigned FirstAnswer = 1;
1999 return 1; // Limit search depth.
2001 switch (Op.getOpcode()) {
2003 case ISD::AssertSext:
2004 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2005 return VTBits-Tmp+1;
2006 case ISD::AssertZext:
2007 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2010 case ISD::Constant: {
2011 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2012 // If negative, return # leading ones.
2013 if (Val.isNegative())
2014 return Val.countLeadingOnes();
2016 // Return # leading zeros.
2017 return Val.countLeadingZeros();
2020 case ISD::SIGN_EXTEND:
2021 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2022 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2024 case ISD::SIGN_EXTEND_INREG:
2025 // Max of the input and what this extends.
2027 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2030 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2031 return std::max(Tmp, Tmp2);
2034 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2035 // SRA X, C -> adds C sign bits.
2036 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2037 Tmp += C->getZExtValue();
2038 if (Tmp > VTBits) Tmp = VTBits;
2042 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2043 // shl destroys sign bits.
2044 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2045 if (C->getZExtValue() >= VTBits || // Bad shift.
2046 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2047 return Tmp - C->getZExtValue();
2052 case ISD::XOR: // NOT is handled here.
2053 // Logical binary ops preserve the number of sign bits at the worst.
2054 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2056 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2057 FirstAnswer = std::min(Tmp, Tmp2);
2058 // We computed what we know about the sign bits as our first
2059 // answer. Now proceed to the generic code that uses
2060 // ComputeMaskedBits, and pick whichever answer is better.
2065 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2066 if (Tmp == 1) return 1; // Early out.
2067 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2068 return std::min(Tmp, Tmp2);
2076 if (Op.getResNo() != 1)
2078 // The boolean result conforms to getBooleanContents. Fall through.
2080 // If setcc returns 0/-1, all bits are sign bits.
2081 if (TLI.getBooleanContents() ==
2082 TargetLowering::ZeroOrNegativeOneBooleanContent)
2087 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2088 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2090 // Handle rotate right by N like a rotate left by 32-N.
2091 if (Op.getOpcode() == ISD::ROTR)
2092 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2094 // If we aren't rotating out all of the known-in sign bits, return the
2095 // number that are left. This handles rotl(sext(x), 1) for example.
2096 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2097 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2101 // Add can have at most one carry bit. Thus we know that the output
2102 // is, at worst, one more bit than the inputs.
2103 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2104 if (Tmp == 1) return 1; // Early out.
2106 // Special case decrementing a value (ADD X, -1):
2107 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2108 if (CRHS->isAllOnesValue()) {
2109 APInt KnownZero, KnownOne;
2110 APInt Mask = APInt::getAllOnesValue(VTBits);
2111 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2113 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2115 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2118 // If we are subtracting one from a positive number, there is no carry
2119 // out of the result.
2120 if (KnownZero.isNegative())
2124 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2125 if (Tmp2 == 1) return 1;
2126 return std::min(Tmp, Tmp2)-1;
2130 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2131 if (Tmp2 == 1) return 1;
2134 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2135 if (CLHS->isNullValue()) {
2136 APInt KnownZero, KnownOne;
2137 APInt Mask = APInt::getAllOnesValue(VTBits);
2138 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2139 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2141 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2144 // If the input is known to be positive (the sign bit is known clear),
2145 // the output of the NEG has the same number of sign bits as the input.
2146 if (KnownZero.isNegative())
2149 // Otherwise, we treat this like a SUB.
2152 // Sub can have at most one carry bit. Thus we know that the output
2153 // is, at worst, one more bit than the inputs.
2154 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2155 if (Tmp == 1) return 1; // Early out.
2156 return std::min(Tmp, Tmp2)-1;
2159 // FIXME: it's tricky to do anything useful for this, but it is an important
2160 // case for targets like X86.
2164 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2165 if (Op.getOpcode() == ISD::LOAD) {
2166 LoadSDNode *LD = cast<LoadSDNode>(Op);
2167 unsigned ExtType = LD->getExtensionType();
2170 case ISD::SEXTLOAD: // '17' bits known
2171 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2172 return VTBits-Tmp+1;
2173 case ISD::ZEXTLOAD: // '16' bits known
2174 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2179 // Allow the target to implement this method for its nodes.
2180 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2181 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2182 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2183 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2184 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2185 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2188 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2189 // use this information.
2190 APInt KnownZero, KnownOne;
2191 APInt Mask = APInt::getAllOnesValue(VTBits);
2192 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2194 if (KnownZero.isNegative()) { // sign bit is 0
2196 } else if (KnownOne.isNegative()) { // sign bit is 1;
2203 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2204 // the number of identical bits in the top of the input value.
2206 Mask <<= Mask.getBitWidth()-VTBits;
2207 // Return # leading zeros. We use 'min' here in case Val was zero before
2208 // shifting. We don't want to return '64' as for an i32 "0".
2209 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2212 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2213 // If we're told that NaNs won't happen, assume they won't.
2214 if (FiniteOnlyFPMath())
2217 // If the value is a constant, we can obviously see if it is a NaN or not.
2218 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2219 return !C->getValueAPF().isNaN();
2221 // TODO: Recognize more cases here.
2226 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2227 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2228 if (!GA) return false;
2229 if (GA->getOffset() != 0) return false;
2230 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2231 if (!GV) return false;
2232 MachineModuleInfo *MMI = getMachineModuleInfo();
2233 return MMI && MMI->hasDebugInfo();
2237 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2238 /// element of the result of the vector shuffle.
2239 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2241 EVT VT = N->getValueType(0);
2242 DebugLoc dl = N->getDebugLoc();
2243 if (N->getMaskElt(i) < 0)
2244 return getUNDEF(VT.getVectorElementType());
2245 unsigned Index = N->getMaskElt(i);
2246 unsigned NumElems = VT.getVectorNumElements();
2247 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2250 if (V.getOpcode() == ISD::BIT_CONVERT) {
2251 V = V.getOperand(0);
2252 EVT VVT = V.getValueType();
2253 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2256 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2257 return (Index == 0) ? V.getOperand(0)
2258 : getUNDEF(VT.getVectorElementType());
2259 if (V.getOpcode() == ISD::BUILD_VECTOR)
2260 return V.getOperand(Index);
2261 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2262 return getShuffleScalarElt(SVN, Index);
2267 /// getNode - Gets or creates the specified node.
2269 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2270 FoldingSetNodeID ID;
2271 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2273 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2274 return SDValue(E, 0);
2276 SDNode *N = NodeAllocator.Allocate<SDNode>();
2277 new (N) SDNode(Opcode, DL, getVTList(VT));
2278 CSEMap.InsertNode(N, IP);
2280 AllNodes.push_back(N);
2284 return SDValue(N, 0);
2287 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2288 EVT VT, SDValue Operand) {
2289 // Constant fold unary operations with an integer constant operand.
2290 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2291 const APInt &Val = C->getAPIntValue();
2292 unsigned BitWidth = VT.getSizeInBits();
2295 case ISD::SIGN_EXTEND:
2296 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2297 case ISD::ANY_EXTEND:
2298 case ISD::ZERO_EXTEND:
2300 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2301 case ISD::UINT_TO_FP:
2302 case ISD::SINT_TO_FP: {
2303 const uint64_t zero[] = {0, 0};
2304 // No compile time operations on this type.
2305 if (VT==MVT::ppcf128)
2307 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2308 (void)apf.convertFromAPInt(Val,
2309 Opcode==ISD::SINT_TO_FP,
2310 APFloat::rmNearestTiesToEven);
2311 return getConstantFP(apf, VT);
2313 case ISD::BIT_CONVERT:
2314 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2315 return getConstantFP(Val.bitsToFloat(), VT);
2316 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2317 return getConstantFP(Val.bitsToDouble(), VT);
2320 return getConstant(Val.byteSwap(), VT);
2322 return getConstant(Val.countPopulation(), VT);
2324 return getConstant(Val.countLeadingZeros(), VT);
2326 return getConstant(Val.countTrailingZeros(), VT);
2330 // Constant fold unary operations with a floating point constant operand.
2331 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2332 APFloat V = C->getValueAPF(); // make copy
2333 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2337 return getConstantFP(V, VT);
2340 return getConstantFP(V, VT);
2342 case ISD::FP_EXTEND: {
2344 // This can return overflow, underflow, or inexact; we don't care.
2345 // FIXME need to be more flexible about rounding mode.
2346 (void)V.convert(*EVTToAPFloatSemantics(VT),
2347 APFloat::rmNearestTiesToEven, &ignored);
2348 return getConstantFP(V, VT);
2350 case ISD::FP_TO_SINT:
2351 case ISD::FP_TO_UINT: {
2354 assert(integerPartWidth >= 64);
2355 // FIXME need to be more flexible about rounding mode.
2356 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2357 Opcode==ISD::FP_TO_SINT,
2358 APFloat::rmTowardZero, &ignored);
2359 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2361 APInt api(VT.getSizeInBits(), 2, x);
2362 return getConstant(api, VT);
2364 case ISD::BIT_CONVERT:
2365 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2366 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2367 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2368 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2374 unsigned OpOpcode = Operand.getNode()->getOpcode();
2376 case ISD::TokenFactor:
2377 case ISD::MERGE_VALUES:
2378 case ISD::CONCAT_VECTORS:
2379 return Operand; // Factor, merge or concat of one node? No need.
2380 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2381 case ISD::FP_EXTEND:
2382 assert(VT.isFloatingPoint() &&
2383 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2384 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2385 assert((!VT.isVector() ||
2386 VT.getVectorNumElements() ==
2387 Operand.getValueType().getVectorNumElements()) &&
2388 "Vector element count mismatch!");
2389 if (Operand.getOpcode() == ISD::UNDEF)
2390 return getUNDEF(VT);
2392 case ISD::SIGN_EXTEND:
2393 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2394 "Invalid SIGN_EXTEND!");
2395 if (Operand.getValueType() == VT) return Operand; // noop extension
2396 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2397 "Invalid sext node, dst < src!");
2398 assert((!VT.isVector() ||
2399 VT.getVectorNumElements() ==
2400 Operand.getValueType().getVectorNumElements()) &&
2401 "Vector element count mismatch!");
2402 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2403 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2405 case ISD::ZERO_EXTEND:
2406 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2407 "Invalid ZERO_EXTEND!");
2408 if (Operand.getValueType() == VT) return Operand; // noop extension
2409 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2410 "Invalid zext node, dst < src!");
2411 assert((!VT.isVector() ||
2412 VT.getVectorNumElements() ==
2413 Operand.getValueType().getVectorNumElements()) &&
2414 "Vector element count mismatch!");
2415 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2416 return getNode(ISD::ZERO_EXTEND, DL, VT,
2417 Operand.getNode()->getOperand(0));
2419 case ISD::ANY_EXTEND:
2420 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2421 "Invalid ANY_EXTEND!");
2422 if (Operand.getValueType() == VT) return Operand; // noop extension
2423 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2424 "Invalid anyext node, dst < src!");
2425 assert((!VT.isVector() ||
2426 VT.getVectorNumElements() ==
2427 Operand.getValueType().getVectorNumElements()) &&
2428 "Vector element count mismatch!");
2429 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2430 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2431 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2434 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2435 "Invalid TRUNCATE!");
2436 if (Operand.getValueType() == VT) return Operand; // noop truncate
2437 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2438 "Invalid truncate node, src < dst!");
2439 assert((!VT.isVector() ||
2440 VT.getVectorNumElements() ==
2441 Operand.getValueType().getVectorNumElements()) &&
2442 "Vector element count mismatch!");
2443 if (OpOpcode == ISD::TRUNCATE)
2444 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2445 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2446 OpOpcode == ISD::ANY_EXTEND) {
2447 // If the source is smaller than the dest, we still need an extend.
2448 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2449 .bitsLT(VT.getScalarType()))
2450 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2451 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2452 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2454 return Operand.getNode()->getOperand(0);
2457 case ISD::BIT_CONVERT:
2458 // Basic sanity checking.
2459 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2460 && "Cannot BIT_CONVERT between types of different sizes!");
2461 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2462 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2463 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2464 if (OpOpcode == ISD::UNDEF)
2465 return getUNDEF(VT);
2467 case ISD::SCALAR_TO_VECTOR:
2468 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2469 (VT.getVectorElementType() == Operand.getValueType() ||
2470 (VT.getVectorElementType().isInteger() &&
2471 Operand.getValueType().isInteger() &&
2472 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2473 "Illegal SCALAR_TO_VECTOR node!");
2474 if (OpOpcode == ISD::UNDEF)
2475 return getUNDEF(VT);
2476 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2477 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2478 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2479 Operand.getConstantOperandVal(1) == 0 &&
2480 Operand.getOperand(0).getValueType() == VT)
2481 return Operand.getOperand(0);
2484 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2485 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2486 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2487 Operand.getNode()->getOperand(0));
2488 if (OpOpcode == ISD::FNEG) // --X -> X
2489 return Operand.getNode()->getOperand(0);
2492 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2493 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2498 SDVTList VTs = getVTList(VT);
2499 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2500 FoldingSetNodeID ID;
2501 SDValue Ops[1] = { Operand };
2502 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2504 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2505 return SDValue(E, 0);
2507 N = NodeAllocator.Allocate<UnarySDNode>();
2508 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2509 CSEMap.InsertNode(N, IP);
2511 N = NodeAllocator.Allocate<UnarySDNode>();
2512 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2515 AllNodes.push_back(N);
2519 return SDValue(N, 0);
2522 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2524 ConstantSDNode *Cst1,
2525 ConstantSDNode *Cst2) {
2526 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2529 case ISD::ADD: return getConstant(C1 + C2, VT);
2530 case ISD::SUB: return getConstant(C1 - C2, VT);
2531 case ISD::MUL: return getConstant(C1 * C2, VT);
2533 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2536 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2539 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2542 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2544 case ISD::AND: return getConstant(C1 & C2, VT);
2545 case ISD::OR: return getConstant(C1 | C2, VT);
2546 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2547 case ISD::SHL: return getConstant(C1 << C2, VT);
2548 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2549 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2550 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2551 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2558 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2559 SDValue N1, SDValue N2) {
2560 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2561 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2564 case ISD::TokenFactor:
2565 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2566 N2.getValueType() == MVT::Other && "Invalid token factor!");
2567 // Fold trivial token factors.
2568 if (N1.getOpcode() == ISD::EntryToken) return N2;
2569 if (N2.getOpcode() == ISD::EntryToken) return N1;
2570 if (N1 == N2) return N1;
2572 case ISD::CONCAT_VECTORS:
2573 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2574 // one big BUILD_VECTOR.
2575 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2576 N2.getOpcode() == ISD::BUILD_VECTOR) {
2577 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2578 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2579 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2583 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2584 N1.getValueType() == VT && "Binary operator types must match!");
2585 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2586 // worth handling here.
2587 if (N2C && N2C->isNullValue())
2589 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2596 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2597 N1.getValueType() == VT && "Binary operator types must match!");
2598 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2599 // it's worth handling here.
2600 if (N2C && N2C->isNullValue())
2610 assert(VT.isInteger() && "This operator does not apply to FP types!");
2618 if (Opcode == ISD::FADD) {
2620 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2621 if (CFP->getValueAPF().isZero())
2624 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2625 if (CFP->getValueAPF().isZero())
2627 } else if (Opcode == ISD::FSUB) {
2629 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2630 if (CFP->getValueAPF().isZero())
2634 assert(N1.getValueType() == N2.getValueType() &&
2635 N1.getValueType() == VT && "Binary operator types must match!");
2637 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2638 assert(N1.getValueType() == VT &&
2639 N1.getValueType().isFloatingPoint() &&
2640 N2.getValueType().isFloatingPoint() &&
2641 "Invalid FCOPYSIGN!");
2648 assert(VT == N1.getValueType() &&
2649 "Shift operators return type must be the same as their first arg");
2650 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2651 "Shifts only work on integers");
2653 // Always fold shifts of i1 values so the code generator doesn't need to
2654 // handle them. Since we know the size of the shift has to be less than the
2655 // size of the value, the shift/rotate count is guaranteed to be zero.
2658 if (N2C && N2C->isNullValue())
2661 case ISD::FP_ROUND_INREG: {
2662 EVT EVT = cast<VTSDNode>(N2)->getVT();
2663 assert(VT == N1.getValueType() && "Not an inreg round!");
2664 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2665 "Cannot FP_ROUND_INREG integer types");
2666 assert(EVT.isVector() == VT.isVector() &&
2667 "FP_ROUND_INREG type should be vector iff the operand "
2669 assert((!EVT.isVector() ||
2670 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2671 "Vector element counts must match in FP_ROUND_INREG");
2672 assert(EVT.bitsLE(VT) && "Not rounding down!");
2673 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2677 assert(VT.isFloatingPoint() &&
2678 N1.getValueType().isFloatingPoint() &&
2679 VT.bitsLE(N1.getValueType()) &&
2680 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2681 if (N1.getValueType() == VT) return N1; // noop conversion.
2683 case ISD::AssertSext:
2684 case ISD::AssertZext: {
2685 EVT EVT = cast<VTSDNode>(N2)->getVT();
2686 assert(VT == N1.getValueType() && "Not an inreg extend!");
2687 assert(VT.isInteger() && EVT.isInteger() &&
2688 "Cannot *_EXTEND_INREG FP types");
2689 assert(!EVT.isVector() &&
2690 "AssertSExt/AssertZExt type should be the vector element type "
2691 "rather than the vector type!");
2692 assert(EVT.bitsLE(VT) && "Not extending!");
2693 if (VT == EVT) return N1; // noop assertion.
2696 case ISD::SIGN_EXTEND_INREG: {
2697 EVT EVT = cast<VTSDNode>(N2)->getVT();
2698 assert(VT == N1.getValueType() && "Not an inreg extend!");
2699 assert(VT.isInteger() && EVT.isInteger() &&
2700 "Cannot *_EXTEND_INREG FP types");
2701 assert(EVT.isVector() == VT.isVector() &&
2702 "SIGN_EXTEND_INREG type should be vector iff the operand "
2704 assert((!EVT.isVector() ||
2705 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2706 "Vector element counts must match in SIGN_EXTEND_INREG");
2707 assert(EVT.bitsLE(VT) && "Not extending!");
2708 if (EVT == VT) return N1; // Not actually extending
2711 APInt Val = N1C->getAPIntValue();
2712 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2713 Val <<= Val.getBitWidth()-FromBits;
2714 Val = Val.ashr(Val.getBitWidth()-FromBits);
2715 return getConstant(Val, VT);
2719 case ISD::EXTRACT_VECTOR_ELT:
2720 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2721 if (N1.getOpcode() == ISD::UNDEF)
2722 return getUNDEF(VT);
2724 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2725 // expanding copies of large vectors from registers.
2727 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2728 N1.getNumOperands() > 0) {
2730 N1.getOperand(0).getValueType().getVectorNumElements();
2731 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2732 N1.getOperand(N2C->getZExtValue() / Factor),
2733 getConstant(N2C->getZExtValue() % Factor,
2734 N2.getValueType()));
2737 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2738 // expanding large vector constants.
2739 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2740 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2741 EVT VEltTy = N1.getValueType().getVectorElementType();
2742 if (Elt.getValueType() != VEltTy) {
2743 // If the vector element type is not legal, the BUILD_VECTOR operands
2744 // are promoted and implicitly truncated. Make that explicit here.
2745 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2748 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2749 // result is implicitly extended.
2750 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2755 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2756 // operations are lowered to scalars.
2757 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2758 // If the indices are the same, return the inserted element.
2759 if (N1.getOperand(2) == N2)
2760 return N1.getOperand(1);
2761 // If the indices are known different, extract the element from
2762 // the original vector.
2763 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2764 isa<ConstantSDNode>(N2))
2765 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2768 case ISD::EXTRACT_ELEMENT:
2769 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2770 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2771 (N1.getValueType().isInteger() == VT.isInteger()) &&
2772 "Wrong types for EXTRACT_ELEMENT!");
2774 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2775 // 64-bit integers into 32-bit parts. Instead of building the extract of
2776 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2777 if (N1.getOpcode() == ISD::BUILD_PAIR)
2778 return N1.getOperand(N2C->getZExtValue());
2780 // EXTRACT_ELEMENT of a constant int is also very common.
2781 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2782 unsigned ElementSize = VT.getSizeInBits();
2783 unsigned Shift = ElementSize * N2C->getZExtValue();
2784 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2785 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2788 case ISD::EXTRACT_SUBVECTOR:
2789 if (N1.getValueType() == VT) // Trivial extraction.
2796 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2797 if (SV.getNode()) return SV;
2798 } else { // Cannonicalize constant to RHS if commutative
2799 if (isCommutativeBinOp(Opcode)) {
2800 std::swap(N1C, N2C);
2806 // Constant fold FP operations.
2807 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2808 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2810 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2811 // Cannonicalize constant to RHS if commutative
2812 std::swap(N1CFP, N2CFP);
2814 } else if (N2CFP && VT != MVT::ppcf128) {
2815 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2816 APFloat::opStatus s;
2819 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2820 if (s != APFloat::opInvalidOp)
2821 return getConstantFP(V1, VT);
2824 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2825 if (s!=APFloat::opInvalidOp)
2826 return getConstantFP(V1, VT);
2829 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2830 if (s!=APFloat::opInvalidOp)
2831 return getConstantFP(V1, VT);
2834 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2835 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2836 return getConstantFP(V1, VT);
2839 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2840 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2841 return getConstantFP(V1, VT);
2843 case ISD::FCOPYSIGN:
2845 return getConstantFP(V1, VT);
2851 // Canonicalize an UNDEF to the RHS, even over a constant.
2852 if (N1.getOpcode() == ISD::UNDEF) {
2853 if (isCommutativeBinOp(Opcode)) {
2857 case ISD::FP_ROUND_INREG:
2858 case ISD::SIGN_EXTEND_INREG:
2864 return N1; // fold op(undef, arg2) -> undef
2872 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2873 // For vectors, we can't easily build an all zero vector, just return
2880 // Fold a bunch of operators when the RHS is undef.
2881 if (N2.getOpcode() == ISD::UNDEF) {
2884 if (N1.getOpcode() == ISD::UNDEF)
2885 // Handle undef ^ undef -> 0 special case. This is a common
2887 return getConstant(0, VT);
2897 return N2; // fold op(arg1, undef) -> undef
2911 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2912 // For vectors, we can't easily build an all zero vector, just return
2917 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2918 // For vectors, we can't easily build an all one vector, just return
2926 // Memoize this node if possible.
2928 SDVTList VTs = getVTList(VT);
2929 if (VT != MVT::Flag) {
2930 SDValue Ops[] = { N1, N2 };
2931 FoldingSetNodeID ID;
2932 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2934 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2935 return SDValue(E, 0);
2937 N = NodeAllocator.Allocate<BinarySDNode>();
2938 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2939 CSEMap.InsertNode(N, IP);
2941 N = NodeAllocator.Allocate<BinarySDNode>();
2942 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2945 AllNodes.push_back(N);
2949 return SDValue(N, 0);
2952 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2953 SDValue N1, SDValue N2, SDValue N3) {
2954 // Perform various simplifications.
2955 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2956 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2958 case ISD::CONCAT_VECTORS:
2959 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2960 // one big BUILD_VECTOR.
2961 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2962 N2.getOpcode() == ISD::BUILD_VECTOR &&
2963 N3.getOpcode() == ISD::BUILD_VECTOR) {
2964 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2965 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2966 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2967 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2971 // Use FoldSetCC to simplify SETCC's.
2972 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2973 if (Simp.getNode()) return Simp;
2978 if (N1C->getZExtValue())
2979 return N2; // select true, X, Y -> X
2981 return N3; // select false, X, Y -> Y
2984 if (N2 == N3) return N2; // select C, X, X -> X
2988 if (N2C->getZExtValue()) // Unconditional branch
2989 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2991 return N1; // Never-taken branch
2994 case ISD::VECTOR_SHUFFLE:
2995 llvm_unreachable("should use getVectorShuffle constructor!");
2997 case ISD::BIT_CONVERT:
2998 // Fold bit_convert nodes from a type to themselves.
2999 if (N1.getValueType() == VT)
3004 // Memoize node if it doesn't produce a flag.
3006 SDVTList VTs = getVTList(VT);
3007 if (VT != MVT::Flag) {
3008 SDValue Ops[] = { N1, N2, N3 };
3009 FoldingSetNodeID ID;
3010 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3013 return SDValue(E, 0);
3015 N = NodeAllocator.Allocate<TernarySDNode>();
3016 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3017 CSEMap.InsertNode(N, IP);
3019 N = NodeAllocator.Allocate<TernarySDNode>();
3020 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3023 AllNodes.push_back(N);
3027 return SDValue(N, 0);
3030 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3031 SDValue N1, SDValue N2, SDValue N3,
3033 SDValue Ops[] = { N1, N2, N3, N4 };
3034 return getNode(Opcode, DL, VT, Ops, 4);
3037 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3038 SDValue N1, SDValue N2, SDValue N3,
3039 SDValue N4, SDValue N5) {
3040 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3041 return getNode(Opcode, DL, VT, Ops, 5);
3044 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3045 /// the incoming stack arguments to be loaded from the stack.
3046 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3047 SmallVector<SDValue, 8> ArgChains;
3049 // Include the original chain at the beginning of the list. When this is
3050 // used by target LowerCall hooks, this helps legalize find the
3051 // CALLSEQ_BEGIN node.
3052 ArgChains.push_back(Chain);
3054 // Add a chain value for each stack argument.
3055 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3056 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3057 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3058 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3059 if (FI->getIndex() < 0)
3060 ArgChains.push_back(SDValue(L, 1));
3062 // Build a tokenfactor for all the chains.
3063 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3064 &ArgChains[0], ArgChains.size());
3067 /// getMemsetValue - Vectorized representation of the memset value
3069 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3071 unsigned NumBits = VT.isVector() ?
3072 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3073 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3074 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3076 for (unsigned i = NumBits; i > 8; i >>= 1) {
3077 Val = (Val << Shift) | Val;
3081 return DAG.getConstant(Val, VT);
3082 return DAG.getConstantFP(APFloat(Val), VT);
3085 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3086 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3088 for (unsigned i = NumBits; i > 8; i >>= 1) {
3089 Value = DAG.getNode(ISD::OR, dl, VT,
3090 DAG.getNode(ISD::SHL, dl, VT, Value,
3091 DAG.getConstant(Shift,
3092 TLI.getShiftAmountTy())),
3100 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3101 /// used when a memcpy is turned into a memset when the source is a constant
3103 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3104 const TargetLowering &TLI,
3105 std::string &Str, unsigned Offset) {
3106 // Handle vector with all elements zero.
3109 return DAG.getConstant(0, VT);
3110 unsigned NumElts = VT.getVectorNumElements();
3111 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3112 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3114 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3117 assert(!VT.isVector() && "Can't handle vector type here!");
3118 unsigned NumBits = VT.getSizeInBits();
3119 unsigned MSB = NumBits / 8;
3121 if (TLI.isLittleEndian())
3122 Offset = Offset + MSB - 1;
3123 for (unsigned i = 0; i != MSB; ++i) {
3124 Val = (Val << 8) | (unsigned char)Str[Offset];
3125 Offset += TLI.isLittleEndian() ? -1 : 1;
3127 return DAG.getConstant(Val, VT);
3130 /// getMemBasePlusOffset - Returns base and offset node for the
3132 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3133 SelectionDAG &DAG) {
3134 EVT VT = Base.getValueType();
3135 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3136 VT, Base, DAG.getConstant(Offset, VT));
3139 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3141 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3142 unsigned SrcDelta = 0;
3143 GlobalAddressSDNode *G = NULL;
3144 if (Src.getOpcode() == ISD::GlobalAddress)
3145 G = cast<GlobalAddressSDNode>(Src);
3146 else if (Src.getOpcode() == ISD::ADD &&
3147 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3148 Src.getOperand(1).getOpcode() == ISD::Constant) {
3149 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3150 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3155 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3156 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3162 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3163 /// to replace the memset / memcpy is below the threshold. It also returns the
3164 /// types of the sequence of memory ops to perform memset / memcpy.
3166 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3167 SDValue Dst, SDValue Src,
3168 unsigned Limit, uint64_t Size, unsigned &Align,
3169 std::string &Str, bool &isSrcStr,
3171 const TargetLowering &TLI) {
3172 isSrcStr = isMemSrcFromString(Src, Str);
3173 bool isSrcConst = isa<ConstantSDNode>(Src);
3174 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3175 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3176 if (VT != MVT::iAny) {
3177 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3178 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3179 // If source is a string constant, this will require an unaligned load.
3180 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3181 if (Dst.getOpcode() != ISD::FrameIndex) {
3182 // Can't change destination alignment. It requires a unaligned store.
3186 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3187 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3188 if (MFI->isFixedObjectIndex(FI)) {
3189 // Can't change destination alignment. It requires a unaligned store.
3193 // Give the stack frame object a larger alignment if needed.
3194 if (MFI->getObjectAlignment(FI) < NewAlign)
3195 MFI->setObjectAlignment(FI, NewAlign);
3202 if (VT == MVT::iAny) {
3203 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3206 switch (Align & 7) {
3207 case 0: VT = MVT::i64; break;
3208 case 4: VT = MVT::i32; break;
3209 case 2: VT = MVT::i16; break;
3210 default: VT = MVT::i8; break;
3215 while (!TLI.isTypeLegal(LVT))
3216 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3217 assert(LVT.isInteger());
3223 unsigned NumMemOps = 0;
3225 unsigned VTSize = VT.getSizeInBits() / 8;
3226 while (VTSize > Size) {
3227 // For now, only use non-vector load / store's for the left-over pieces.
3228 if (VT.isVector()) {
3230 while (!TLI.isTypeLegal(VT))
3231 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3232 VTSize = VT.getSizeInBits() / 8;
3234 // This can result in a type that is not legal on the target, e.g.
3235 // 1 or 2 bytes on PPC.
3236 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3241 if (++NumMemOps > Limit)
3243 MemOps.push_back(VT);
3250 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3251 SDValue Chain, SDValue Dst,
3252 SDValue Src, uint64_t Size,
3253 unsigned Align, bool AlwaysInline,
3254 const Value *DstSV, uint64_t DstSVOff,
3255 const Value *SrcSV, uint64_t SrcSVOff){
3256 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3258 // Expand memcpy to a series of load and store ops if the size operand falls
3259 // below a certain threshold.
3260 std::vector<EVT> MemOps;
3261 uint64_t Limit = -1ULL;
3263 Limit = TLI.getMaxStoresPerMemcpy();
3264 unsigned DstAlign = Align; // Destination alignment can change.
3267 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3268 Str, CopyFromStr, DAG, TLI))
3272 bool isZeroStr = CopyFromStr && Str.empty();
3273 SmallVector<SDValue, 8> OutChains;
3274 unsigned NumMemOps = MemOps.size();
3275 uint64_t SrcOff = 0, DstOff = 0;
3276 for (unsigned i = 0; i != NumMemOps; ++i) {
3278 unsigned VTSize = VT.getSizeInBits() / 8;
3279 SDValue Value, Store;
3281 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3282 // It's unlikely a store of a vector immediate can be done in a single
3283 // instruction. It would require a load from a constantpool first.
3284 // We also handle store a vector with all zero's.
3285 // FIXME: Handle other cases where store of vector immediate is done in
3286 // a single instruction.
3287 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3288 Store = DAG.getStore(Chain, dl, Value,
3289 getMemBasePlusOffset(Dst, DstOff, DAG),
3290 DstSV, DstSVOff + DstOff, false, DstAlign);
3292 // The type might not be legal for the target. This should only happen
3293 // if the type is smaller than a legal type, as on PPC, so the right
3294 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3295 // to Load/Store if NVT==VT.
3296 // FIXME does the case above also need this?
3297 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3298 assert(NVT.bitsGE(VT));
3299 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3300 getMemBasePlusOffset(Src, SrcOff, DAG),
3301 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3302 Store = DAG.getTruncStore(Chain, dl, Value,
3303 getMemBasePlusOffset(Dst, DstOff, DAG),
3304 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3306 OutChains.push_back(Store);
3311 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3312 &OutChains[0], OutChains.size());
3315 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3316 SDValue Chain, SDValue Dst,
3317 SDValue Src, uint64_t Size,
3318 unsigned Align, bool AlwaysInline,
3319 const Value *DstSV, uint64_t DstSVOff,
3320 const Value *SrcSV, uint64_t SrcSVOff){
3321 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3323 // Expand memmove to a series of load and store ops if the size operand falls
3324 // below a certain threshold.
3325 std::vector<EVT> MemOps;
3326 uint64_t Limit = -1ULL;
3328 Limit = TLI.getMaxStoresPerMemmove();
3329 unsigned DstAlign = Align; // Destination alignment can change.
3332 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3333 Str, CopyFromStr, DAG, TLI))
3336 uint64_t SrcOff = 0, DstOff = 0;
3338 SmallVector<SDValue, 8> LoadValues;
3339 SmallVector<SDValue, 8> LoadChains;
3340 SmallVector<SDValue, 8> OutChains;
3341 unsigned NumMemOps = MemOps.size();
3342 for (unsigned i = 0; i < NumMemOps; i++) {
3344 unsigned VTSize = VT.getSizeInBits() / 8;
3345 SDValue Value, Store;
3347 Value = DAG.getLoad(VT, dl, Chain,
3348 getMemBasePlusOffset(Src, SrcOff, DAG),
3349 SrcSV, SrcSVOff + SrcOff, false, Align);
3350 LoadValues.push_back(Value);
3351 LoadChains.push_back(Value.getValue(1));
3354 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3355 &LoadChains[0], LoadChains.size());
3357 for (unsigned i = 0; i < NumMemOps; i++) {
3359 unsigned VTSize = VT.getSizeInBits() / 8;
3360 SDValue Value, Store;
3362 Store = DAG.getStore(Chain, dl, LoadValues[i],
3363 getMemBasePlusOffset(Dst, DstOff, DAG),
3364 DstSV, DstSVOff + DstOff, false, DstAlign);
3365 OutChains.push_back(Store);
3369 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3370 &OutChains[0], OutChains.size());
3373 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3374 SDValue Chain, SDValue Dst,
3375 SDValue Src, uint64_t Size,
3377 const Value *DstSV, uint64_t DstSVOff) {
3378 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3380 // Expand memset to a series of load/store ops if the size operand
3381 // falls below a certain threshold.
3382 std::vector<EVT> MemOps;
3385 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3386 Size, Align, Str, CopyFromStr, DAG, TLI))
3389 SmallVector<SDValue, 8> OutChains;
3390 uint64_t DstOff = 0;
3392 unsigned NumMemOps = MemOps.size();
3393 for (unsigned i = 0; i < NumMemOps; i++) {
3395 unsigned VTSize = VT.getSizeInBits() / 8;
3396 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3397 SDValue Store = DAG.getStore(Chain, dl, Value,
3398 getMemBasePlusOffset(Dst, DstOff, DAG),
3399 DstSV, DstSVOff + DstOff);
3400 OutChains.push_back(Store);
3404 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3405 &OutChains[0], OutChains.size());
3408 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3409 SDValue Src, SDValue Size,
3410 unsigned Align, bool AlwaysInline,
3411 const Value *DstSV, uint64_t DstSVOff,
3412 const Value *SrcSV, uint64_t SrcSVOff) {
3414 // Check to see if we should lower the memcpy to loads and stores first.
3415 // For cases within the target-specified limits, this is the best choice.
3416 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3418 // Memcpy with size zero? Just return the original chain.
3419 if (ConstantSize->isNullValue())
3423 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3424 ConstantSize->getZExtValue(),
3425 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3426 if (Result.getNode())
3430 // Then check to see if we should lower the memcpy with target-specific
3431 // code. If the target chooses to do this, this is the next best.
3433 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3435 DstSV, DstSVOff, SrcSV, SrcSVOff);
3436 if (Result.getNode())
3439 // If we really need inline code and the target declined to provide it,
3440 // use a (potentially long) sequence of loads and stores.
3442 assert(ConstantSize && "AlwaysInline requires a constant size!");
3443 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3444 ConstantSize->getZExtValue(), Align, true,
3445 DstSV, DstSVOff, SrcSV, SrcSVOff);
3448 // Emit a library call.
3449 TargetLowering::ArgListTy Args;
3450 TargetLowering::ArgListEntry Entry;
3451 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3452 Entry.Node = Dst; Args.push_back(Entry);
3453 Entry.Node = Src; Args.push_back(Entry);
3454 Entry.Node = Size; Args.push_back(Entry);
3455 // FIXME: pass in DebugLoc
3456 std::pair<SDValue,SDValue> CallResult =
3457 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3458 false, false, false, false, 0,
3459 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3460 /*isReturnValueUsed=*/false,
3461 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3462 TLI.getPointerTy()),
3463 Args, *this, dl, GetOrdering(Chain.getNode()));
3464 return CallResult.second;
3467 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3468 SDValue Src, SDValue Size,
3470 const Value *DstSV, uint64_t DstSVOff,
3471 const Value *SrcSV, uint64_t SrcSVOff) {
3473 // Check to see if we should lower the memmove to loads and stores first.
3474 // For cases within the target-specified limits, this is the best choice.
3475 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3477 // Memmove with size zero? Just return the original chain.
3478 if (ConstantSize->isNullValue())
3482 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3483 ConstantSize->getZExtValue(),
3484 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3485 if (Result.getNode())
3489 // Then check to see if we should lower the memmove with target-specific
3490 // code. If the target chooses to do this, this is the next best.
3492 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3493 DstSV, DstSVOff, SrcSV, SrcSVOff);
3494 if (Result.getNode())
3497 // Emit a library call.
3498 TargetLowering::ArgListTy Args;
3499 TargetLowering::ArgListEntry Entry;
3500 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3501 Entry.Node = Dst; Args.push_back(Entry);
3502 Entry.Node = Src; Args.push_back(Entry);
3503 Entry.Node = Size; Args.push_back(Entry);
3504 // FIXME: pass in DebugLoc
3505 std::pair<SDValue,SDValue> CallResult =
3506 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3507 false, false, false, false, 0,
3508 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3509 /*isReturnValueUsed=*/false,
3510 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3511 TLI.getPointerTy()),
3512 Args, *this, dl, GetOrdering(Chain.getNode()));
3513 return CallResult.second;
3516 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3517 SDValue Src, SDValue Size,
3519 const Value *DstSV, uint64_t DstSVOff) {
3521 // Check to see if we should lower the memset to stores first.
3522 // For cases within the target-specified limits, this is the best choice.
3523 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3525 // Memset with size zero? Just return the original chain.
3526 if (ConstantSize->isNullValue())
3530 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3531 Align, DstSV, DstSVOff);
3532 if (Result.getNode())
3536 // Then check to see if we should lower the memset with target-specific
3537 // code. If the target chooses to do this, this is the next best.
3539 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3541 if (Result.getNode())
3544 // Emit a library call.
3545 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3546 TargetLowering::ArgListTy Args;
3547 TargetLowering::ArgListEntry Entry;
3548 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3549 Args.push_back(Entry);
3550 // Extend or truncate the argument to be an i32 value for the call.
3551 if (Src.getValueType().bitsGT(MVT::i32))
3552 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3554 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3556 Entry.Ty = Type::getInt32Ty(*getContext());
3557 Entry.isSExt = true;
3558 Args.push_back(Entry);
3560 Entry.Ty = IntPtrTy;
3561 Entry.isSExt = false;
3562 Args.push_back(Entry);
3563 // FIXME: pass in DebugLoc
3564 std::pair<SDValue,SDValue> CallResult =
3565 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3566 false, false, false, false, 0,
3567 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3568 /*isReturnValueUsed=*/false,
3569 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3570 TLI.getPointerTy()),
3571 Args, *this, dl, GetOrdering(Chain.getNode()));
3572 return CallResult.second;
3575 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3577 SDValue Ptr, SDValue Cmp,
3578 SDValue Swp, const Value* PtrVal,
3579 unsigned Alignment) {
3580 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3581 Alignment = getEVTAlignment(MemVT);
3583 // Check if the memory reference references a frame index
3585 if (const FrameIndexSDNode *FI =
3586 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3587 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3589 MachineFunction &MF = getMachineFunction();
3590 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3592 // For now, atomics are considered to be volatile always.
3593 Flags |= MachineMemOperand::MOVolatile;
3595 MachineMemOperand *MMO =
3596 MF.getMachineMemOperand(PtrVal, Flags, 0,
3597 MemVT.getStoreSize(), Alignment);
3599 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3602 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3604 SDValue Ptr, SDValue Cmp,
3605 SDValue Swp, MachineMemOperand *MMO) {
3606 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3607 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3609 EVT VT = Cmp.getValueType();
3611 SDVTList VTs = getVTList(VT, MVT::Other);
3612 FoldingSetNodeID ID;
3613 ID.AddInteger(MemVT.getRawBits());
3614 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3615 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3617 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3618 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3619 return SDValue(E, 0);
3621 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3622 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3623 CSEMap.InsertNode(N, IP);
3624 AllNodes.push_back(N);
3625 return SDValue(N, 0);
3628 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3630 SDValue Ptr, SDValue Val,
3631 const Value* PtrVal,
3632 unsigned Alignment) {
3633 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3634 Alignment = getEVTAlignment(MemVT);
3636 // Check if the memory reference references a frame index
3638 if (const FrameIndexSDNode *FI =
3639 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3640 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3642 MachineFunction &MF = getMachineFunction();
3643 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3645 // For now, atomics are considered to be volatile always.
3646 Flags |= MachineMemOperand::MOVolatile;
3648 MachineMemOperand *MMO =
3649 MF.getMachineMemOperand(PtrVal, Flags, 0,
3650 MemVT.getStoreSize(), Alignment);
3652 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3655 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3657 SDValue Ptr, SDValue Val,
3658 MachineMemOperand *MMO) {
3659 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3660 Opcode == ISD::ATOMIC_LOAD_SUB ||
3661 Opcode == ISD::ATOMIC_LOAD_AND ||
3662 Opcode == ISD::ATOMIC_LOAD_OR ||
3663 Opcode == ISD::ATOMIC_LOAD_XOR ||
3664 Opcode == ISD::ATOMIC_LOAD_NAND ||
3665 Opcode == ISD::ATOMIC_LOAD_MIN ||
3666 Opcode == ISD::ATOMIC_LOAD_MAX ||
3667 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3668 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3669 Opcode == ISD::ATOMIC_SWAP) &&
3670 "Invalid Atomic Op");
3672 EVT VT = Val.getValueType();
3674 SDVTList VTs = getVTList(VT, MVT::Other);
3675 FoldingSetNodeID ID;
3676 ID.AddInteger(MemVT.getRawBits());
3677 SDValue Ops[] = {Chain, Ptr, Val};
3678 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3680 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3681 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3682 return SDValue(E, 0);
3684 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3685 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3686 CSEMap.InsertNode(N, IP);
3687 AllNodes.push_back(N);
3688 return SDValue(N, 0);
3691 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3692 /// Allowed to return something different (and simpler) if Simplify is true.
3693 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3698 SmallVector<EVT, 4> VTs;
3699 VTs.reserve(NumOps);
3700 for (unsigned i = 0; i < NumOps; ++i)
3701 VTs.push_back(Ops[i].getValueType());
3702 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3707 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3708 const EVT *VTs, unsigned NumVTs,
3709 const SDValue *Ops, unsigned NumOps,
3710 EVT MemVT, const Value *srcValue, int SVOff,
3711 unsigned Align, bool Vol,
3712 bool ReadMem, bool WriteMem) {
3713 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3714 MemVT, srcValue, SVOff, Align, Vol,
3719 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3720 const SDValue *Ops, unsigned NumOps,
3721 EVT MemVT, const Value *srcValue, int SVOff,
3722 unsigned Align, bool Vol,
3723 bool ReadMem, bool WriteMem) {
3724 if (Align == 0) // Ensure that codegen never sees alignment 0
3725 Align = getEVTAlignment(MemVT);
3727 MachineFunction &MF = getMachineFunction();
3730 Flags |= MachineMemOperand::MOStore;
3732 Flags |= MachineMemOperand::MOLoad;
3734 Flags |= MachineMemOperand::MOVolatile;
3735 MachineMemOperand *MMO =
3736 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3737 MemVT.getStoreSize(), Align);
3739 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3743 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3744 const SDValue *Ops, unsigned NumOps,
3745 EVT MemVT, MachineMemOperand *MMO) {
3746 assert((Opcode == ISD::INTRINSIC_VOID ||
3747 Opcode == ISD::INTRINSIC_W_CHAIN ||
3748 (Opcode <= INT_MAX &&
3749 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3750 "Opcode is not a memory-accessing opcode!");
3752 // Memoize the node unless it returns a flag.
3753 MemIntrinsicSDNode *N;
3754 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3755 FoldingSetNodeID ID;
3756 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3758 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3759 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3760 return SDValue(E, 0);
3763 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3764 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3765 CSEMap.InsertNode(N, IP);
3767 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3768 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3770 AllNodes.push_back(N);
3771 return SDValue(N, 0);
3775 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3776 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3777 SDValue Ptr, SDValue Offset,
3778 const Value *SV, int SVOffset, EVT MemVT,
3779 bool isVolatile, unsigned Alignment) {
3780 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3781 Alignment = getEVTAlignment(VT);
3783 // Check if the memory reference references a frame index
3785 if (const FrameIndexSDNode *FI =
3786 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3787 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3789 MachineFunction &MF = getMachineFunction();
3790 unsigned Flags = MachineMemOperand::MOLoad;
3792 Flags |= MachineMemOperand::MOVolatile;
3793 MachineMemOperand *MMO =
3794 MF.getMachineMemOperand(SV, Flags, SVOffset,
3795 MemVT.getStoreSize(), Alignment);
3796 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3800 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3801 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3802 SDValue Ptr, SDValue Offset, EVT MemVT,
3803 MachineMemOperand *MMO) {
3805 ExtType = ISD::NON_EXTLOAD;
3806 } else if (ExtType == ISD::NON_EXTLOAD) {
3807 assert(VT == MemVT && "Non-extending load from different memory type!");
3810 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3811 "Should only be an extending load, not truncating!");
3812 assert(VT.isInteger() == MemVT.isInteger() &&
3813 "Cannot convert from FP to Int or Int -> FP!");
3814 assert(VT.isVector() == MemVT.isVector() &&
3815 "Cannot use trunc store to convert to or from a vector!");
3816 assert((!VT.isVector() ||
3817 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3818 "Cannot use trunc store to change the number of vector elements!");
3821 bool Indexed = AM != ISD::UNINDEXED;
3822 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3823 "Unindexed load with an offset!");
3825 SDVTList VTs = Indexed ?
3826 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3827 SDValue Ops[] = { Chain, Ptr, Offset };
3828 FoldingSetNodeID ID;
3829 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3830 ID.AddInteger(MemVT.getRawBits());
3831 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile()));
3833 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3834 cast<LoadSDNode>(E)->refineAlignment(MMO);
3835 return SDValue(E, 0);
3837 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3838 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3839 CSEMap.InsertNode(N, IP);
3840 AllNodes.push_back(N);
3841 return SDValue(N, 0);
3844 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3845 SDValue Chain, SDValue Ptr,
3846 const Value *SV, int SVOffset,
3847 bool isVolatile, unsigned Alignment) {
3848 SDValue Undef = getUNDEF(Ptr.getValueType());
3849 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3850 SV, SVOffset, VT, isVolatile, Alignment);
3853 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3854 SDValue Chain, SDValue Ptr,
3856 int SVOffset, EVT MemVT,
3857 bool isVolatile, unsigned Alignment) {
3858 SDValue Undef = getUNDEF(Ptr.getValueType());
3859 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3860 SV, SVOffset, MemVT, isVolatile, Alignment);
3864 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3865 SDValue Offset, ISD::MemIndexedMode AM) {
3866 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3867 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3868 "Load is already a indexed load!");
3869 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3870 LD->getChain(), Base, Offset, LD->getSrcValue(),
3871 LD->getSrcValueOffset(), LD->getMemoryVT(),
3872 LD->isVolatile(), LD->getAlignment());
3875 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3876 SDValue Ptr, const Value *SV, int SVOffset,
3877 bool isVolatile, unsigned Alignment) {
3878 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3879 Alignment = getEVTAlignment(Val.getValueType());
3881 // Check if the memory reference references a frame index
3883 if (const FrameIndexSDNode *FI =
3884 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3885 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3887 MachineFunction &MF = getMachineFunction();
3888 unsigned Flags = MachineMemOperand::MOStore;
3890 Flags |= MachineMemOperand::MOVolatile;
3891 MachineMemOperand *MMO =
3892 MF.getMachineMemOperand(SV, Flags, SVOffset,
3893 Val.getValueType().getStoreSize(), Alignment);
3895 return getStore(Chain, dl, Val, Ptr, MMO);
3898 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3899 SDValue Ptr, MachineMemOperand *MMO) {
3900 EVT VT = Val.getValueType();
3901 SDVTList VTs = getVTList(MVT::Other);
3902 SDValue Undef = getUNDEF(Ptr.getValueType());
3903 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3904 FoldingSetNodeID ID;
3905 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3906 ID.AddInteger(VT.getRawBits());
3907 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile()));
3909 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3910 cast<StoreSDNode>(E)->refineAlignment(MMO);
3911 return SDValue(E, 0);
3913 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3914 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3915 CSEMap.InsertNode(N, IP);
3916 AllNodes.push_back(N);
3917 return SDValue(N, 0);
3920 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3921 SDValue Ptr, const Value *SV,
3922 int SVOffset, EVT SVT,
3923 bool isVolatile, unsigned Alignment) {
3924 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3925 Alignment = getEVTAlignment(SVT);
3927 // Check if the memory reference references a frame index
3929 if (const FrameIndexSDNode *FI =
3930 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3931 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3933 MachineFunction &MF = getMachineFunction();
3934 unsigned Flags = MachineMemOperand::MOStore;
3936 Flags |= MachineMemOperand::MOVolatile;
3937 MachineMemOperand *MMO =
3938 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3940 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3943 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3944 SDValue Ptr, EVT SVT,
3945 MachineMemOperand *MMO) {
3946 EVT VT = Val.getValueType();
3949 return getStore(Chain, dl, Val, Ptr, MMO);
3951 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
3952 "Should only be a truncating store, not extending!");
3953 assert(VT.isInteger() == SVT.isInteger() &&
3954 "Can't do FP-INT conversion!");
3955 assert(VT.isVector() == SVT.isVector() &&
3956 "Cannot use trunc store to convert to or from a vector!");
3957 assert((!VT.isVector() ||
3958 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
3959 "Cannot use trunc store to change the number of vector elements!");
3961 SDVTList VTs = getVTList(MVT::Other);
3962 SDValue Undef = getUNDEF(Ptr.getValueType());
3963 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3964 FoldingSetNodeID ID;
3965 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3966 ID.AddInteger(SVT.getRawBits());
3967 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile()));
3969 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3970 cast<StoreSDNode>(E)->refineAlignment(MMO);
3971 return SDValue(E, 0);
3973 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3974 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
3975 CSEMap.InsertNode(N, IP);
3976 AllNodes.push_back(N);
3977 return SDValue(N, 0);
3981 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3982 SDValue Offset, ISD::MemIndexedMode AM) {
3983 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3984 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3985 "Store is already a indexed store!");
3986 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3987 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3988 FoldingSetNodeID ID;
3989 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3990 ID.AddInteger(ST->getMemoryVT().getRawBits());
3991 ID.AddInteger(ST->getRawSubclassData());
3993 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3994 return SDValue(E, 0);
3996 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3997 new (N) StoreSDNode(Ops, dl, VTs, AM,
3998 ST->isTruncatingStore(), ST->getMemoryVT(),
3999 ST->getMemOperand());
4000 CSEMap.InsertNode(N, IP);
4001 AllNodes.push_back(N);
4002 return SDValue(N, 0);
4005 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4006 SDValue Chain, SDValue Ptr,
4008 SDValue Ops[] = { Chain, Ptr, SV };
4009 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4012 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4013 const SDUse *Ops, unsigned NumOps) {
4015 case 0: return getNode(Opcode, DL, VT);
4016 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4017 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4018 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4022 // Copy from an SDUse array into an SDValue array for use with
4023 // the regular getNode logic.
4024 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4025 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4028 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4029 const SDValue *Ops, unsigned NumOps) {
4031 case 0: return getNode(Opcode, DL, VT);
4032 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4033 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4034 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4040 case ISD::SELECT_CC: {
4041 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4042 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4043 "LHS and RHS of condition must have same type!");
4044 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4045 "True and False arms of SelectCC must have same type!");
4046 assert(Ops[2].getValueType() == VT &&
4047 "select_cc node must be of same type as true and false value!");
4051 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4052 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4053 "LHS/RHS of comparison should match types!");
4060 SDVTList VTs = getVTList(VT);
4062 if (VT != MVT::Flag) {
4063 FoldingSetNodeID ID;
4064 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4068 return SDValue(E, 0);
4070 N = NodeAllocator.Allocate<SDNode>();
4071 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4072 CSEMap.InsertNode(N, IP);
4074 N = NodeAllocator.Allocate<SDNode>();
4075 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4078 AllNodes.push_back(N);
4082 return SDValue(N, 0);
4085 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4086 const std::vector<EVT> &ResultTys,
4087 const SDValue *Ops, unsigned NumOps) {
4088 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4092 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4093 const EVT *VTs, unsigned NumVTs,
4094 const SDValue *Ops, unsigned NumOps) {
4096 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4097 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4100 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4101 const SDValue *Ops, unsigned NumOps) {
4102 if (VTList.NumVTs == 1)
4103 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4107 // FIXME: figure out how to safely handle things like
4108 // int foo(int x) { return 1 << (x & 255); }
4109 // int bar() { return foo(256); }
4110 case ISD::SRA_PARTS:
4111 case ISD::SRL_PARTS:
4112 case ISD::SHL_PARTS:
4113 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4114 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4115 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4116 else if (N3.getOpcode() == ISD::AND)
4117 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4118 // If the and is only masking out bits that cannot effect the shift,
4119 // eliminate the and.
4120 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4121 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4122 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4128 // Memoize the node unless it returns a flag.
4130 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4131 FoldingSetNodeID ID;
4132 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4134 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4135 return SDValue(E, 0);
4138 N = NodeAllocator.Allocate<UnarySDNode>();
4139 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4140 } else if (NumOps == 2) {
4141 N = NodeAllocator.Allocate<BinarySDNode>();
4142 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4143 } else if (NumOps == 3) {
4144 N = NodeAllocator.Allocate<TernarySDNode>();
4145 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4147 N = NodeAllocator.Allocate<SDNode>();
4148 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4150 CSEMap.InsertNode(N, IP);
4153 N = NodeAllocator.Allocate<UnarySDNode>();
4154 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4155 } else if (NumOps == 2) {
4156 N = NodeAllocator.Allocate<BinarySDNode>();
4157 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4158 } else if (NumOps == 3) {
4159 N = NodeAllocator.Allocate<TernarySDNode>();
4160 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4162 N = NodeAllocator.Allocate<SDNode>();
4163 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4166 AllNodes.push_back(N);
4170 return SDValue(N, 0);
4173 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4174 return getNode(Opcode, DL, VTList, 0, 0);
4177 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4179 SDValue Ops[] = { N1 };
4180 return getNode(Opcode, DL, VTList, Ops, 1);
4183 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4184 SDValue N1, SDValue N2) {
4185 SDValue Ops[] = { N1, N2 };
4186 return getNode(Opcode, DL, VTList, Ops, 2);
4189 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4190 SDValue N1, SDValue N2, SDValue N3) {
4191 SDValue Ops[] = { N1, N2, N3 };
4192 return getNode(Opcode, DL, VTList, Ops, 3);
4195 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4196 SDValue N1, SDValue N2, SDValue N3,
4198 SDValue Ops[] = { N1, N2, N3, N4 };
4199 return getNode(Opcode, DL, VTList, Ops, 4);
4202 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4203 SDValue N1, SDValue N2, SDValue N3,
4204 SDValue N4, SDValue N5) {
4205 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4206 return getNode(Opcode, DL, VTList, Ops, 5);
4209 SDVTList SelectionDAG::getVTList(EVT VT) {
4210 return makeVTList(SDNode::getValueTypeList(VT), 1);
4213 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4214 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4215 E = VTList.rend(); I != E; ++I)
4216 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4219 EVT *Array = Allocator.Allocate<EVT>(2);
4222 SDVTList Result = makeVTList(Array, 2);
4223 VTList.push_back(Result);
4227 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4228 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4229 E = VTList.rend(); I != E; ++I)
4230 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4234 EVT *Array = Allocator.Allocate<EVT>(3);
4238 SDVTList Result = makeVTList(Array, 3);
4239 VTList.push_back(Result);
4243 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4244 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4245 E = VTList.rend(); I != E; ++I)
4246 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4247 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4250 EVT *Array = Allocator.Allocate<EVT>(4);
4255 SDVTList Result = makeVTList(Array, 4);
4256 VTList.push_back(Result);
4260 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4262 case 0: llvm_unreachable("Cannot have nodes without results!");
4263 case 1: return getVTList(VTs[0]);
4264 case 2: return getVTList(VTs[0], VTs[1]);
4265 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4266 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4270 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4271 E = VTList.rend(); I != E; ++I) {
4272 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4275 bool NoMatch = false;
4276 for (unsigned i = 2; i != NumVTs; ++i)
4277 if (VTs[i] != I->VTs[i]) {
4285 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4286 std::copy(VTs, VTs+NumVTs, Array);
4287 SDVTList Result = makeVTList(Array, NumVTs);
4288 VTList.push_back(Result);
4293 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4294 /// specified operands. If the resultant node already exists in the DAG,
4295 /// this does not modify the specified node, instead it returns the node that
4296 /// already exists. If the resultant node does not exist in the DAG, the
4297 /// input node is returned. As a degenerate case, if you specify the same
4298 /// input operands as the node already has, the input node is returned.
4299 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4300 SDNode *N = InN.getNode();
4301 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4303 // Check to see if there is no change.
4304 if (Op == N->getOperand(0)) return InN;
4306 // See if the modified node already exists.
4307 void *InsertPos = 0;
4308 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4309 return SDValue(Existing, InN.getResNo());
4311 // Nope it doesn't. Remove the node from its current place in the maps.
4313 if (!RemoveNodeFromCSEMaps(N))
4316 // Now we update the operands.
4317 N->OperandList[0].set(Op);
4319 // If this gets put into a CSE map, add it.
4320 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4324 SDValue SelectionDAG::
4325 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4326 SDNode *N = InN.getNode();
4327 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4329 // Check to see if there is no change.
4330 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4331 return InN; // No operands changed, just return the input node.
4333 // See if the modified node already exists.
4334 void *InsertPos = 0;
4335 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4336 return SDValue(Existing, InN.getResNo());
4338 // Nope it doesn't. Remove the node from its current place in the maps.
4340 if (!RemoveNodeFromCSEMaps(N))
4343 // Now we update the operands.
4344 if (N->OperandList[0] != Op1)
4345 N->OperandList[0].set(Op1);
4346 if (N->OperandList[1] != Op2)
4347 N->OperandList[1].set(Op2);
4349 // If this gets put into a CSE map, add it.
4350 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4354 SDValue SelectionDAG::
4355 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4356 SDValue Ops[] = { Op1, Op2, Op3 };
4357 return UpdateNodeOperands(N, Ops, 3);
4360 SDValue SelectionDAG::
4361 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4362 SDValue Op3, SDValue Op4) {
4363 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4364 return UpdateNodeOperands(N, Ops, 4);
4367 SDValue SelectionDAG::
4368 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4369 SDValue Op3, SDValue Op4, SDValue Op5) {
4370 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4371 return UpdateNodeOperands(N, Ops, 5);
4374 SDValue SelectionDAG::
4375 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4376 SDNode *N = InN.getNode();
4377 assert(N->getNumOperands() == NumOps &&
4378 "Update with wrong number of operands");
4380 // Check to see if there is no change.
4381 bool AnyChange = false;
4382 for (unsigned i = 0; i != NumOps; ++i) {
4383 if (Ops[i] != N->getOperand(i)) {
4389 // No operands changed, just return the input node.
4390 if (!AnyChange) return InN;
4392 // See if the modified node already exists.
4393 void *InsertPos = 0;
4394 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4395 return SDValue(Existing, InN.getResNo());
4397 // Nope it doesn't. Remove the node from its current place in the maps.
4399 if (!RemoveNodeFromCSEMaps(N))
4402 // Now we update the operands.
4403 for (unsigned i = 0; i != NumOps; ++i)
4404 if (N->OperandList[i] != Ops[i])
4405 N->OperandList[i].set(Ops[i]);
4407 // If this gets put into a CSE map, add it.
4408 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4412 /// DropOperands - Release the operands and set this node to have
4414 void SDNode::DropOperands() {
4415 // Unlike the code in MorphNodeTo that does this, we don't need to
4416 // watch for dead nodes here.
4417 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4423 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4426 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4428 SDVTList VTs = getVTList(VT);
4429 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4432 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4433 EVT VT, SDValue Op1) {
4434 SDVTList VTs = getVTList(VT);
4435 SDValue Ops[] = { Op1 };
4436 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4439 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4440 EVT VT, SDValue Op1,
4442 SDVTList VTs = getVTList(VT);
4443 SDValue Ops[] = { Op1, Op2 };
4444 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4447 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4448 EVT VT, SDValue Op1,
4449 SDValue Op2, SDValue Op3) {
4450 SDVTList VTs = getVTList(VT);
4451 SDValue Ops[] = { Op1, Op2, Op3 };
4452 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4455 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4456 EVT VT, const SDValue *Ops,
4458 SDVTList VTs = getVTList(VT);
4459 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4462 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4463 EVT VT1, EVT VT2, const SDValue *Ops,
4465 SDVTList VTs = getVTList(VT1, VT2);
4466 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4469 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4471 SDVTList VTs = getVTList(VT1, VT2);
4472 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4475 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4476 EVT VT1, EVT VT2, EVT VT3,
4477 const SDValue *Ops, unsigned NumOps) {
4478 SDVTList VTs = getVTList(VT1, VT2, VT3);
4479 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4482 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4483 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4484 const SDValue *Ops, unsigned NumOps) {
4485 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4486 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4489 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4492 SDVTList VTs = getVTList(VT1, VT2);
4493 SDValue Ops[] = { Op1 };
4494 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4497 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4499 SDValue Op1, SDValue Op2) {
4500 SDVTList VTs = getVTList(VT1, VT2);
4501 SDValue Ops[] = { Op1, Op2 };
4502 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4505 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4507 SDValue Op1, SDValue Op2,
4509 SDVTList VTs = getVTList(VT1, VT2);
4510 SDValue Ops[] = { Op1, Op2, Op3 };
4511 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4514 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4515 EVT VT1, EVT VT2, EVT VT3,
4516 SDValue Op1, SDValue Op2,
4518 SDVTList VTs = getVTList(VT1, VT2, VT3);
4519 SDValue Ops[] = { Op1, Op2, Op3 };
4520 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4523 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4524 SDVTList VTs, const SDValue *Ops,
4526 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4529 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4531 SDVTList VTs = getVTList(VT);
4532 return MorphNodeTo(N, Opc, VTs, 0, 0);
4535 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4536 EVT VT, SDValue Op1) {
4537 SDVTList VTs = getVTList(VT);
4538 SDValue Ops[] = { Op1 };
4539 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4542 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4543 EVT VT, SDValue Op1,
4545 SDVTList VTs = getVTList(VT);
4546 SDValue Ops[] = { Op1, Op2 };
4547 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4550 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4551 EVT VT, SDValue Op1,
4552 SDValue Op2, SDValue Op3) {
4553 SDVTList VTs = getVTList(VT);
4554 SDValue Ops[] = { Op1, Op2, Op3 };
4555 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4558 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4559 EVT VT, const SDValue *Ops,
4561 SDVTList VTs = getVTList(VT);
4562 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4565 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4566 EVT VT1, EVT VT2, const SDValue *Ops,
4568 SDVTList VTs = getVTList(VT1, VT2);
4569 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4572 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4574 SDVTList VTs = getVTList(VT1, VT2);
4575 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4578 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4579 EVT VT1, EVT VT2, EVT VT3,
4580 const SDValue *Ops, unsigned NumOps) {
4581 SDVTList VTs = getVTList(VT1, VT2, VT3);
4582 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4585 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4588 SDVTList VTs = getVTList(VT1, VT2);
4589 SDValue Ops[] = { Op1 };
4590 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4593 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4595 SDValue Op1, SDValue Op2) {
4596 SDVTList VTs = getVTList(VT1, VT2);
4597 SDValue Ops[] = { Op1, Op2 };
4598 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4601 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4603 SDValue Op1, SDValue Op2,
4605 SDVTList VTs = getVTList(VT1, VT2);
4606 SDValue Ops[] = { Op1, Op2, Op3 };
4607 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4610 /// MorphNodeTo - These *mutate* the specified node to have the specified
4611 /// return type, opcode, and operands.
4613 /// Note that MorphNodeTo returns the resultant node. If there is already a
4614 /// node of the specified opcode and operands, it returns that node instead of
4615 /// the current one. Note that the DebugLoc need not be the same.
4617 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4618 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4619 /// node, and because it doesn't require CSE recalculation for any of
4620 /// the node's users.
4622 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4623 SDVTList VTs, const SDValue *Ops,
4625 // If an identical node already exists, use it.
4627 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4628 FoldingSetNodeID ID;
4629 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4630 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4634 if (!RemoveNodeFromCSEMaps(N))
4637 // Start the morphing.
4639 N->ValueList = VTs.VTs;
4640 N->NumValues = VTs.NumVTs;
4642 // Clear the operands list, updating used nodes to remove this from their
4643 // use list. Keep track of any operands that become dead as a result.
4644 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4645 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4647 SDNode *Used = Use.getNode();
4649 if (Used->use_empty())
4650 DeadNodeSet.insert(Used);
4653 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4654 // Initialize the memory references information.
4655 MN->setMemRefs(0, 0);
4656 // If NumOps is larger than the # of operands we can have in a
4657 // MachineSDNode, reallocate the operand list.
4658 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4659 if (MN->OperandsNeedDelete)
4660 delete[] MN->OperandList;
4661 if (NumOps > array_lengthof(MN->LocalOperands))
4662 // We're creating a final node that will live unmorphed for the
4663 // remainder of the current SelectionDAG iteration, so we can allocate
4664 // the operands directly out of a pool with no recycling metadata.
4665 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4668 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4669 MN->OperandsNeedDelete = false;
4671 MN->InitOperands(MN->OperandList, Ops, NumOps);
4673 // If NumOps is larger than the # of operands we currently have, reallocate
4674 // the operand list.
4675 if (NumOps > N->NumOperands) {
4676 if (N->OperandsNeedDelete)
4677 delete[] N->OperandList;
4678 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4679 N->OperandsNeedDelete = true;
4681 N->InitOperands(N->OperandList, Ops, NumOps);
4684 // Delete any nodes that are still dead after adding the uses for the
4686 SmallVector<SDNode *, 16> DeadNodes;
4687 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4688 E = DeadNodeSet.end(); I != E; ++I)
4689 if ((*I)->use_empty())
4690 DeadNodes.push_back(*I);
4691 RemoveDeadNodes(DeadNodes);
4694 CSEMap.InsertNode(N, IP); // Memoize the new node.
4699 /// getMachineNode - These are used for target selectors to create a new node
4700 /// with specified return type(s), MachineInstr opcode, and operands.
4702 /// Note that getMachineNode returns the resultant node. If there is already a
4703 /// node of the specified opcode and operands, it returns that node instead of
4704 /// the current one.
4706 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4707 SDVTList VTs = getVTList(VT);
4708 return getMachineNode(Opcode, dl, VTs, 0, 0);
4712 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4713 SDVTList VTs = getVTList(VT);
4714 SDValue Ops[] = { Op1 };
4715 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4719 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4720 SDValue Op1, SDValue Op2) {
4721 SDVTList VTs = getVTList(VT);
4722 SDValue Ops[] = { Op1, Op2 };
4723 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4727 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4728 SDValue Op1, SDValue Op2, SDValue Op3) {
4729 SDVTList VTs = getVTList(VT);
4730 SDValue Ops[] = { Op1, Op2, Op3 };
4731 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4735 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4736 const SDValue *Ops, unsigned NumOps) {
4737 SDVTList VTs = getVTList(VT);
4738 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4742 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4743 SDVTList VTs = getVTList(VT1, VT2);
4744 return getMachineNode(Opcode, dl, VTs, 0, 0);
4748 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4749 EVT VT1, EVT VT2, SDValue Op1) {
4750 SDVTList VTs = getVTList(VT1, VT2);
4751 SDValue Ops[] = { Op1 };
4752 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4756 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4757 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4758 SDVTList VTs = getVTList(VT1, VT2);
4759 SDValue Ops[] = { Op1, Op2 };
4760 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4764 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4765 EVT VT1, EVT VT2, SDValue Op1,
4766 SDValue Op2, SDValue Op3) {
4767 SDVTList VTs = getVTList(VT1, VT2);
4768 SDValue Ops[] = { Op1, Op2, Op3 };
4769 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4773 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4775 const SDValue *Ops, unsigned NumOps) {
4776 SDVTList VTs = getVTList(VT1, VT2);
4777 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4781 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4782 EVT VT1, EVT VT2, EVT VT3,
4783 SDValue Op1, SDValue Op2) {
4784 SDVTList VTs = getVTList(VT1, VT2, VT3);
4785 SDValue Ops[] = { Op1, Op2 };
4786 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4790 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4791 EVT VT1, EVT VT2, EVT VT3,
4792 SDValue Op1, SDValue Op2, SDValue Op3) {
4793 SDVTList VTs = getVTList(VT1, VT2, VT3);
4794 SDValue Ops[] = { Op1, Op2, Op3 };
4795 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4799 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4800 EVT VT1, EVT VT2, EVT VT3,
4801 const SDValue *Ops, unsigned NumOps) {
4802 SDVTList VTs = getVTList(VT1, VT2, VT3);
4803 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4807 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4808 EVT VT2, EVT VT3, EVT VT4,
4809 const SDValue *Ops, unsigned NumOps) {
4810 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4811 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4815 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4816 const std::vector<EVT> &ResultTys,
4817 const SDValue *Ops, unsigned NumOps) {
4818 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4819 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4823 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4824 const SDValue *Ops, unsigned NumOps) {
4825 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4830 FoldingSetNodeID ID;
4831 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4833 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4834 return cast<MachineSDNode>(E);
4837 // Allocate a new MachineSDNode.
4838 N = NodeAllocator.Allocate<MachineSDNode>();
4839 new (N) MachineSDNode(~Opcode, DL, VTs);
4841 // Initialize the operands list.
4842 if (NumOps > array_lengthof(N->LocalOperands))
4843 // We're creating a final node that will live unmorphed for the
4844 // remainder of the current SelectionDAG iteration, so we can allocate
4845 // the operands directly out of a pool with no recycling metadata.
4846 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4849 N->InitOperands(N->LocalOperands, Ops, NumOps);
4850 N->OperandsNeedDelete = false;
4853 CSEMap.InsertNode(N, IP);
4855 AllNodes.push_back(N);
4862 /// getTargetExtractSubreg - A convenience function for creating
4863 /// TargetInstrInfo::EXTRACT_SUBREG nodes.
4865 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4867 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4868 SDNode *Subreg = getMachineNode(TargetInstrInfo::EXTRACT_SUBREG, DL,
4869 VT, Operand, SRIdxVal);
4870 return SDValue(Subreg, 0);
4873 /// getTargetInsertSubreg - A convenience function for creating
4874 /// TargetInstrInfo::INSERT_SUBREG nodes.
4876 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4877 SDValue Operand, SDValue Subreg) {
4878 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4879 SDNode *Result = getMachineNode(TargetInstrInfo::INSERT_SUBREG, DL,
4880 VT, Operand, Subreg, SRIdxVal);
4881 return SDValue(Result, 0);
4884 /// getNodeIfExists - Get the specified node if it's already available, or
4885 /// else return NULL.
4886 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4887 const SDValue *Ops, unsigned NumOps) {
4888 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4889 FoldingSetNodeID ID;
4890 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4892 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4898 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4899 /// This can cause recursive merging of nodes in the DAG.
4901 /// This version assumes From has a single result value.
4903 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4904 DAGUpdateListener *UpdateListener) {
4905 SDNode *From = FromN.getNode();
4906 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4907 "Cannot replace with this method!");
4908 assert(From != To.getNode() && "Cannot replace uses of with self");
4910 // Iterate over all the existing uses of From. New uses will be added
4911 // to the beginning of the use list, which we avoid visiting.
4912 // This specifically avoids visiting uses of From that arise while the
4913 // replacement is happening, because any such uses would be the result
4914 // of CSE: If an existing node looks like From after one of its operands
4915 // is replaced by To, we don't want to replace of all its users with To
4916 // too. See PR3018 for more info.
4917 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4921 // This node is about to morph, remove its old self from the CSE maps.
4922 RemoveNodeFromCSEMaps(User);
4924 // A user can appear in a use list multiple times, and when this
4925 // happens the uses are usually next to each other in the list.
4926 // To help reduce the number of CSE recomputations, process all
4927 // the uses of this user that we can find this way.
4929 SDUse &Use = UI.getUse();
4932 } while (UI != UE && *UI == User);
4934 // Now that we have modified User, add it back to the CSE maps. If it
4935 // already exists there, recursively merge the results together.
4936 AddModifiedNodeToCSEMaps(User, UpdateListener);
4940 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4941 /// This can cause recursive merging of nodes in the DAG.
4943 /// This version assumes that for each value of From, there is a
4944 /// corresponding value in To in the same position with the same type.
4946 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4947 DAGUpdateListener *UpdateListener) {
4949 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4950 assert((!From->hasAnyUseOfValue(i) ||
4951 From->getValueType(i) == To->getValueType(i)) &&
4952 "Cannot use this version of ReplaceAllUsesWith!");
4955 // Handle the trivial case.
4959 // Iterate over just the existing users of From. See the comments in
4960 // the ReplaceAllUsesWith above.
4961 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4965 // This node is about to morph, remove its old self from the CSE maps.
4966 RemoveNodeFromCSEMaps(User);
4968 // A user can appear in a use list multiple times, and when this
4969 // happens the uses are usually next to each other in the list.
4970 // To help reduce the number of CSE recomputations, process all
4971 // the uses of this user that we can find this way.
4973 SDUse &Use = UI.getUse();
4976 } while (UI != UE && *UI == User);
4978 // Now that we have modified User, add it back to the CSE maps. If it
4979 // already exists there, recursively merge the results together.
4980 AddModifiedNodeToCSEMaps(User, UpdateListener);
4984 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4985 /// This can cause recursive merging of nodes in the DAG.
4987 /// This version can replace From with any result values. To must match the
4988 /// number and types of values returned by From.
4989 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4991 DAGUpdateListener *UpdateListener) {
4992 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4993 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4995 // Iterate over just the existing users of From. See the comments in
4996 // the ReplaceAllUsesWith above.
4997 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5001 // This node is about to morph, remove its old self from the CSE maps.
5002 RemoveNodeFromCSEMaps(User);
5004 // A user can appear in a use list multiple times, and when this
5005 // happens the uses are usually next to each other in the list.
5006 // To help reduce the number of CSE recomputations, process all
5007 // the uses of this user that we can find this way.
5009 SDUse &Use = UI.getUse();
5010 const SDValue &ToOp = To[Use.getResNo()];
5013 } while (UI != UE && *UI == User);
5015 // Now that we have modified User, add it back to the CSE maps. If it
5016 // already exists there, recursively merge the results together.
5017 AddModifiedNodeToCSEMaps(User, UpdateListener);
5021 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5022 /// uses of other values produced by From.getNode() alone. The Deleted
5023 /// vector is handled the same way as for ReplaceAllUsesWith.
5024 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5025 DAGUpdateListener *UpdateListener){
5026 // Handle the really simple, really trivial case efficiently.
5027 if (From == To) return;
5029 // Handle the simple, trivial, case efficiently.
5030 if (From.getNode()->getNumValues() == 1) {
5031 ReplaceAllUsesWith(From, To, UpdateListener);
5035 // Iterate over just the existing users of From. See the comments in
5036 // the ReplaceAllUsesWith above.
5037 SDNode::use_iterator UI = From.getNode()->use_begin(),
5038 UE = From.getNode()->use_end();
5041 bool UserRemovedFromCSEMaps = false;
5043 // A user can appear in a use list multiple times, and when this
5044 // happens the uses are usually next to each other in the list.
5045 // To help reduce the number of CSE recomputations, process all
5046 // the uses of this user that we can find this way.
5048 SDUse &Use = UI.getUse();
5050 // Skip uses of different values from the same node.
5051 if (Use.getResNo() != From.getResNo()) {
5056 // If this node hasn't been modified yet, it's still in the CSE maps,
5057 // so remove its old self from the CSE maps.
5058 if (!UserRemovedFromCSEMaps) {
5059 RemoveNodeFromCSEMaps(User);
5060 UserRemovedFromCSEMaps = true;
5065 } while (UI != UE && *UI == User);
5067 // We are iterating over all uses of the From node, so if a use
5068 // doesn't use the specific value, no changes are made.
5069 if (!UserRemovedFromCSEMaps)
5072 // Now that we have modified User, add it back to the CSE maps. If it
5073 // already exists there, recursively merge the results together.
5074 AddModifiedNodeToCSEMaps(User, UpdateListener);
5079 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5080 /// to record information about a use.
5087 /// operator< - Sort Memos by User.
5088 bool operator<(const UseMemo &L, const UseMemo &R) {
5089 return (intptr_t)L.User < (intptr_t)R.User;
5093 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5094 /// uses of other values produced by From.getNode() alone. The same value
5095 /// may appear in both the From and To list. The Deleted vector is
5096 /// handled the same way as for ReplaceAllUsesWith.
5097 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5100 DAGUpdateListener *UpdateListener){
5101 // Handle the simple, trivial case efficiently.
5103 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5105 // Read up all the uses and make records of them. This helps
5106 // processing new uses that are introduced during the
5107 // replacement process.
5108 SmallVector<UseMemo, 4> Uses;
5109 for (unsigned i = 0; i != Num; ++i) {
5110 unsigned FromResNo = From[i].getResNo();
5111 SDNode *FromNode = From[i].getNode();
5112 for (SDNode::use_iterator UI = FromNode->use_begin(),
5113 E = FromNode->use_end(); UI != E; ++UI) {
5114 SDUse &Use = UI.getUse();
5115 if (Use.getResNo() == FromResNo) {
5116 UseMemo Memo = { *UI, i, &Use };
5117 Uses.push_back(Memo);
5122 // Sort the uses, so that all the uses from a given User are together.
5123 std::sort(Uses.begin(), Uses.end());
5125 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5126 UseIndex != UseIndexEnd; ) {
5127 // We know that this user uses some value of From. If it is the right
5128 // value, update it.
5129 SDNode *User = Uses[UseIndex].User;
5131 // This node is about to morph, remove its old self from the CSE maps.
5132 RemoveNodeFromCSEMaps(User);
5134 // The Uses array is sorted, so all the uses for a given User
5135 // are next to each other in the list.
5136 // To help reduce the number of CSE recomputations, process all
5137 // the uses of this user that we can find this way.
5139 unsigned i = Uses[UseIndex].Index;
5140 SDUse &Use = *Uses[UseIndex].Use;
5144 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5146 // Now that we have modified User, add it back to the CSE maps. If it
5147 // already exists there, recursively merge the results together.
5148 AddModifiedNodeToCSEMaps(User, UpdateListener);
5152 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5153 /// based on their topological order. It returns the maximum id and a vector
5154 /// of the SDNodes* in assigned order by reference.
5155 unsigned SelectionDAG::AssignTopologicalOrder() {
5157 unsigned DAGSize = 0;
5159 // SortedPos tracks the progress of the algorithm. Nodes before it are
5160 // sorted, nodes after it are unsorted. When the algorithm completes
5161 // it is at the end of the list.
5162 allnodes_iterator SortedPos = allnodes_begin();
5164 // Visit all the nodes. Move nodes with no operands to the front of
5165 // the list immediately. Annotate nodes that do have operands with their
5166 // operand count. Before we do this, the Node Id fields of the nodes
5167 // may contain arbitrary values. After, the Node Id fields for nodes
5168 // before SortedPos will contain the topological sort index, and the
5169 // Node Id fields for nodes At SortedPos and after will contain the
5170 // count of outstanding operands.
5171 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5174 unsigned Degree = N->getNumOperands();
5176 // A node with no uses, add it to the result array immediately.
5177 N->setNodeId(DAGSize++);
5178 allnodes_iterator Q = N;
5180 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5181 assert(SortedPos != AllNodes.end() && "Overran node list");
5184 // Temporarily use the Node Id as scratch space for the degree count.
5185 N->setNodeId(Degree);
5189 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5190 // such that by the time the end is reached all nodes will be sorted.
5191 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5194 // N is in sorted position, so all its uses have one less operand
5195 // that needs to be sorted.
5196 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5199 unsigned Degree = P->getNodeId();
5200 assert(Degree != 0 && "Invalid node degree");
5203 // All of P's operands are sorted, so P may sorted now.
5204 P->setNodeId(DAGSize++);
5206 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5207 assert(SortedPos != AllNodes.end() && "Overran node list");
5210 // Update P's outstanding operand count.
5211 P->setNodeId(Degree);
5214 if (I == SortedPos) {
5215 allnodes_iterator J = I;
5217 dbgs() << "Offending node:\n";
5219 assert(0 && "Overran sorted position");
5223 assert(SortedPos == AllNodes.end() &&
5224 "Topological sort incomplete!");
5225 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5226 "First node in topological sort is not the entry token!");
5227 assert(AllNodes.front().getNodeId() == 0 &&
5228 "First node in topological sort has non-zero id!");
5229 assert(AllNodes.front().getNumOperands() == 0 &&
5230 "First node in topological sort has operands!");
5231 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5232 "Last node in topologic sort has unexpected id!");
5233 assert(AllNodes.back().use_empty() &&
5234 "Last node in topologic sort has users!");
5235 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5239 /// AssignOrdering - Assign an order to the SDNode.
5240 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5241 assert(SD && "Trying to assign an order to a null node!");
5242 Ordering->add(SD, Order);
5245 /// GetOrdering - Get the order for the SDNode.
5246 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5247 assert(SD && "Trying to get the order of a null node!");
5248 return Ordering->getOrder(SD);
5252 //===----------------------------------------------------------------------===//
5254 //===----------------------------------------------------------------------===//
5256 HandleSDNode::~HandleSDNode() {
5260 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5261 EVT VT, int64_t o, unsigned char TF)
5262 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5263 Offset(o), TargetFlags(TF) {
5264 TheGlobal = const_cast<GlobalValue*>(GA);
5267 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5268 MachineMemOperand *mmo)
5269 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5270 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5271 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5272 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5275 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5276 const SDValue *Ops, unsigned NumOps, EVT memvt,
5277 MachineMemOperand *mmo)
5278 : SDNode(Opc, dl, VTs, Ops, NumOps),
5279 MemoryVT(memvt), MMO(mmo) {
5280 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5281 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5282 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5285 /// Profile - Gather unique data for the node.
5287 void SDNode::Profile(FoldingSetNodeID &ID) const {
5288 AddNodeIDNode(ID, this);
5293 std::vector<EVT> VTs;
5296 VTs.reserve(MVT::LAST_VALUETYPE);
5297 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5298 VTs.push_back(MVT((MVT::SimpleValueType)i));
5303 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5304 static ManagedStatic<EVTArray> SimpleVTArray;
5305 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5307 /// getValueTypeList - Return a pointer to the specified value type.
5309 const EVT *SDNode::getValueTypeList(EVT VT) {
5310 if (VT.isExtended()) {
5311 sys::SmartScopedLock<true> Lock(*VTMutex);
5312 return &(*EVTs->insert(VT).first);
5314 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5318 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5319 /// indicated value. This method ignores uses of other values defined by this
5321 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5322 assert(Value < getNumValues() && "Bad value!");
5324 // TODO: Only iterate over uses of a given value of the node
5325 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5326 if (UI.getUse().getResNo() == Value) {
5333 // Found exactly the right number of uses?
5338 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5339 /// value. This method ignores uses of other values defined by this operation.
5340 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5341 assert(Value < getNumValues() && "Bad value!");
5343 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5344 if (UI.getUse().getResNo() == Value)
5351 /// isOnlyUserOf - Return true if this node is the only use of N.
5353 bool SDNode::isOnlyUserOf(SDNode *N) const {
5355 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5366 /// isOperand - Return true if this node is an operand of N.
5368 bool SDValue::isOperandOf(SDNode *N) const {
5369 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5370 if (*this == N->getOperand(i))
5375 bool SDNode::isOperandOf(SDNode *N) const {
5376 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5377 if (this == N->OperandList[i].getNode())
5382 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5383 /// be a chain) reaches the specified operand without crossing any
5384 /// side-effecting instructions. In practice, this looks through token
5385 /// factors and non-volatile loads. In order to remain efficient, this only
5386 /// looks a couple of nodes in, it does not do an exhaustive search.
5387 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5388 unsigned Depth) const {
5389 if (*this == Dest) return true;
5391 // Don't search too deeply, we just want to be able to see through
5392 // TokenFactor's etc.
5393 if (Depth == 0) return false;
5395 // If this is a token factor, all inputs to the TF happen in parallel. If any
5396 // of the operands of the TF reach dest, then we can do the xform.
5397 if (getOpcode() == ISD::TokenFactor) {
5398 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5399 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5404 // Loads don't have side effects, look through them.
5405 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5406 if (!Ld->isVolatile())
5407 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5412 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5413 /// is either an operand of N or it can be reached by traversing up the operands.
5414 /// NOTE: this is an expensive method. Use it carefully.
5415 bool SDNode::isPredecessorOf(SDNode *N) const {
5416 SmallPtrSet<SDNode *, 32> Visited;
5417 SmallVector<SDNode *, 16> Worklist;
5418 Worklist.push_back(N);
5421 N = Worklist.pop_back_val();
5422 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5423 SDNode *Op = N->getOperand(i).getNode();
5426 if (Visited.insert(Op))
5427 Worklist.push_back(Op);
5429 } while (!Worklist.empty());
5434 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5435 assert(Num < NumOperands && "Invalid child # of SDNode!");
5436 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5439 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5440 switch (getOpcode()) {
5442 if (getOpcode() < ISD::BUILTIN_OP_END)
5443 return "<<Unknown DAG Node>>";
5444 if (isMachineOpcode()) {
5446 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5447 if (getMachineOpcode() < TII->getNumOpcodes())
5448 return TII->get(getMachineOpcode()).getName();
5449 return "<<Unknown Machine Node>>";
5452 const TargetLowering &TLI = G->getTargetLoweringInfo();
5453 const char *Name = TLI.getTargetNodeName(getOpcode());
5454 if (Name) return Name;
5455 return "<<Unknown Target Node>>";
5457 return "<<Unknown Node>>";
5460 case ISD::DELETED_NODE:
5461 return "<<Deleted Node!>>";
5463 case ISD::PREFETCH: return "Prefetch";
5464 case ISD::MEMBARRIER: return "MemBarrier";
5465 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5466 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5467 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5468 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5469 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5470 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5471 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5472 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5473 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5474 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5475 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5476 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5477 case ISD::PCMARKER: return "PCMarker";
5478 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5479 case ISD::SRCVALUE: return "SrcValue";
5480 case ISD::EntryToken: return "EntryToken";
5481 case ISD::TokenFactor: return "TokenFactor";
5482 case ISD::AssertSext: return "AssertSext";
5483 case ISD::AssertZext: return "AssertZext";
5485 case ISD::BasicBlock: return "BasicBlock";
5486 case ISD::VALUETYPE: return "ValueType";
5487 case ISD::Register: return "Register";
5489 case ISD::Constant: return "Constant";
5490 case ISD::ConstantFP: return "ConstantFP";
5491 case ISD::GlobalAddress: return "GlobalAddress";
5492 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5493 case ISD::FrameIndex: return "FrameIndex";
5494 case ISD::JumpTable: return "JumpTable";
5495 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5496 case ISD::RETURNADDR: return "RETURNADDR";
5497 case ISD::FRAMEADDR: return "FRAMEADDR";
5498 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5499 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5500 case ISD::LSDAADDR: return "LSDAADDR";
5501 case ISD::EHSELECTION: return "EHSELECTION";
5502 case ISD::EH_RETURN: return "EH_RETURN";
5503 case ISD::ConstantPool: return "ConstantPool";
5504 case ISD::ExternalSymbol: return "ExternalSymbol";
5505 case ISD::BlockAddress: return "BlockAddress";
5506 case ISD::INTRINSIC_WO_CHAIN:
5507 case ISD::INTRINSIC_VOID:
5508 case ISD::INTRINSIC_W_CHAIN: {
5509 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5510 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5511 if (IID < Intrinsic::num_intrinsics)
5512 return Intrinsic::getName((Intrinsic::ID)IID);
5513 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5514 return TII->getName(IID);
5515 llvm_unreachable("Invalid intrinsic ID");
5518 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5519 case ISD::TargetConstant: return "TargetConstant";
5520 case ISD::TargetConstantFP:return "TargetConstantFP";
5521 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5522 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5523 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5524 case ISD::TargetJumpTable: return "TargetJumpTable";
5525 case ISD::TargetConstantPool: return "TargetConstantPool";
5526 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5527 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5529 case ISD::CopyToReg: return "CopyToReg";
5530 case ISD::CopyFromReg: return "CopyFromReg";
5531 case ISD::UNDEF: return "undef";
5532 case ISD::MERGE_VALUES: return "merge_values";
5533 case ISD::INLINEASM: return "inlineasm";
5534 case ISD::EH_LABEL: return "eh_label";
5535 case ISD::HANDLENODE: return "handlenode";
5538 case ISD::FABS: return "fabs";
5539 case ISD::FNEG: return "fneg";
5540 case ISD::FSQRT: return "fsqrt";
5541 case ISD::FSIN: return "fsin";
5542 case ISD::FCOS: return "fcos";
5543 case ISD::FPOWI: return "fpowi";
5544 case ISD::FPOW: return "fpow";
5545 case ISD::FTRUNC: return "ftrunc";
5546 case ISD::FFLOOR: return "ffloor";
5547 case ISD::FCEIL: return "fceil";
5548 case ISD::FRINT: return "frint";
5549 case ISD::FNEARBYINT: return "fnearbyint";
5552 case ISD::ADD: return "add";
5553 case ISD::SUB: return "sub";
5554 case ISD::MUL: return "mul";
5555 case ISD::MULHU: return "mulhu";
5556 case ISD::MULHS: return "mulhs";
5557 case ISD::SDIV: return "sdiv";
5558 case ISD::UDIV: return "udiv";
5559 case ISD::SREM: return "srem";
5560 case ISD::UREM: return "urem";
5561 case ISD::SMUL_LOHI: return "smul_lohi";
5562 case ISD::UMUL_LOHI: return "umul_lohi";
5563 case ISD::SDIVREM: return "sdivrem";
5564 case ISD::UDIVREM: return "udivrem";
5565 case ISD::AND: return "and";
5566 case ISD::OR: return "or";
5567 case ISD::XOR: return "xor";
5568 case ISD::SHL: return "shl";
5569 case ISD::SRA: return "sra";
5570 case ISD::SRL: return "srl";
5571 case ISD::ROTL: return "rotl";
5572 case ISD::ROTR: return "rotr";
5573 case ISD::FADD: return "fadd";
5574 case ISD::FSUB: return "fsub";
5575 case ISD::FMUL: return "fmul";
5576 case ISD::FDIV: return "fdiv";
5577 case ISD::FREM: return "frem";
5578 case ISD::FCOPYSIGN: return "fcopysign";
5579 case ISD::FGETSIGN: return "fgetsign";
5581 case ISD::SETCC: return "setcc";
5582 case ISD::VSETCC: return "vsetcc";
5583 case ISD::SELECT: return "select";
5584 case ISD::SELECT_CC: return "select_cc";
5585 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5586 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5587 case ISD::CONCAT_VECTORS: return "concat_vectors";
5588 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5589 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5590 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5591 case ISD::CARRY_FALSE: return "carry_false";
5592 case ISD::ADDC: return "addc";
5593 case ISD::ADDE: return "adde";
5594 case ISD::SADDO: return "saddo";
5595 case ISD::UADDO: return "uaddo";
5596 case ISD::SSUBO: return "ssubo";
5597 case ISD::USUBO: return "usubo";
5598 case ISD::SMULO: return "smulo";
5599 case ISD::UMULO: return "umulo";
5600 case ISD::SUBC: return "subc";
5601 case ISD::SUBE: return "sube";
5602 case ISD::SHL_PARTS: return "shl_parts";
5603 case ISD::SRA_PARTS: return "sra_parts";
5604 case ISD::SRL_PARTS: return "srl_parts";
5606 // Conversion operators.
5607 case ISD::SIGN_EXTEND: return "sign_extend";
5608 case ISD::ZERO_EXTEND: return "zero_extend";
5609 case ISD::ANY_EXTEND: return "any_extend";
5610 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5611 case ISD::TRUNCATE: return "truncate";
5612 case ISD::FP_ROUND: return "fp_round";
5613 case ISD::FLT_ROUNDS_: return "flt_rounds";
5614 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5615 case ISD::FP_EXTEND: return "fp_extend";
5617 case ISD::SINT_TO_FP: return "sint_to_fp";
5618 case ISD::UINT_TO_FP: return "uint_to_fp";
5619 case ISD::FP_TO_SINT: return "fp_to_sint";
5620 case ISD::FP_TO_UINT: return "fp_to_uint";
5621 case ISD::BIT_CONVERT: return "bit_convert";
5623 case ISD::CONVERT_RNDSAT: {
5624 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5625 default: llvm_unreachable("Unknown cvt code!");
5626 case ISD::CVT_FF: return "cvt_ff";
5627 case ISD::CVT_FS: return "cvt_fs";
5628 case ISD::CVT_FU: return "cvt_fu";
5629 case ISD::CVT_SF: return "cvt_sf";
5630 case ISD::CVT_UF: return "cvt_uf";
5631 case ISD::CVT_SS: return "cvt_ss";
5632 case ISD::CVT_SU: return "cvt_su";
5633 case ISD::CVT_US: return "cvt_us";
5634 case ISD::CVT_UU: return "cvt_uu";
5638 // Control flow instructions
5639 case ISD::BR: return "br";
5640 case ISD::BRIND: return "brind";
5641 case ISD::BR_JT: return "br_jt";
5642 case ISD::BRCOND: return "brcond";
5643 case ISD::BR_CC: return "br_cc";
5644 case ISD::CALLSEQ_START: return "callseq_start";
5645 case ISD::CALLSEQ_END: return "callseq_end";
5648 case ISD::LOAD: return "load";
5649 case ISD::STORE: return "store";
5650 case ISD::VAARG: return "vaarg";
5651 case ISD::VACOPY: return "vacopy";
5652 case ISD::VAEND: return "vaend";
5653 case ISD::VASTART: return "vastart";
5654 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5655 case ISD::EXTRACT_ELEMENT: return "extract_element";
5656 case ISD::BUILD_PAIR: return "build_pair";
5657 case ISD::STACKSAVE: return "stacksave";
5658 case ISD::STACKRESTORE: return "stackrestore";
5659 case ISD::TRAP: return "trap";
5662 case ISD::BSWAP: return "bswap";
5663 case ISD::CTPOP: return "ctpop";
5664 case ISD::CTTZ: return "cttz";
5665 case ISD::CTLZ: return "ctlz";
5668 case ISD::TRAMPOLINE: return "trampoline";
5671 switch (cast<CondCodeSDNode>(this)->get()) {
5672 default: llvm_unreachable("Unknown setcc condition!");
5673 case ISD::SETOEQ: return "setoeq";
5674 case ISD::SETOGT: return "setogt";
5675 case ISD::SETOGE: return "setoge";
5676 case ISD::SETOLT: return "setolt";
5677 case ISD::SETOLE: return "setole";
5678 case ISD::SETONE: return "setone";
5680 case ISD::SETO: return "seto";
5681 case ISD::SETUO: return "setuo";
5682 case ISD::SETUEQ: return "setue";
5683 case ISD::SETUGT: return "setugt";
5684 case ISD::SETUGE: return "setuge";
5685 case ISD::SETULT: return "setult";
5686 case ISD::SETULE: return "setule";
5687 case ISD::SETUNE: return "setune";
5689 case ISD::SETEQ: return "seteq";
5690 case ISD::SETGT: return "setgt";
5691 case ISD::SETGE: return "setge";
5692 case ISD::SETLT: return "setlt";
5693 case ISD::SETLE: return "setle";
5694 case ISD::SETNE: return "setne";
5699 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5708 return "<post-inc>";
5710 return "<post-dec>";
5714 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5715 std::string S = "< ";
5729 if (getByValAlign())
5730 S += "byval-align:" + utostr(getByValAlign()) + " ";
5732 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5734 S += "byval-size:" + utostr(getByValSize()) + " ";
5738 void SDNode::dump() const { dump(0); }
5739 void SDNode::dump(const SelectionDAG *G) const {
5743 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5744 OS << (void*)this << ": ";
5746 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5748 if (getValueType(i) == MVT::Other)
5751 OS << getValueType(i).getEVTString();
5753 OS << " = " << getOperationName(G);
5756 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5757 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5758 if (!MN->memoperands_empty()) {
5761 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5762 e = MN->memoperands_end(); i != e; ++i) {
5769 } else if (const ShuffleVectorSDNode *SVN =
5770 dyn_cast<ShuffleVectorSDNode>(this)) {
5772 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5773 int Idx = SVN->getMaskElt(i);
5781 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5782 OS << '<' << CSDN->getAPIntValue() << '>';
5783 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5784 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5785 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5786 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5787 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5790 CSDN->getValueAPF().bitcastToAPInt().dump();
5793 } else if (const GlobalAddressSDNode *GADN =
5794 dyn_cast<GlobalAddressSDNode>(this)) {
5795 int64_t offset = GADN->getOffset();
5797 WriteAsOperand(OS, GADN->getGlobal());
5800 OS << " + " << offset;
5802 OS << " " << offset;
5803 if (unsigned int TF = GADN->getTargetFlags())
5804 OS << " [TF=" << TF << ']';
5805 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5806 OS << "<" << FIDN->getIndex() << ">";
5807 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5808 OS << "<" << JTDN->getIndex() << ">";
5809 if (unsigned int TF = JTDN->getTargetFlags())
5810 OS << " [TF=" << TF << ']';
5811 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5812 int offset = CP->getOffset();
5813 if (CP->isMachineConstantPoolEntry())
5814 OS << "<" << *CP->getMachineCPVal() << ">";
5816 OS << "<" << *CP->getConstVal() << ">";
5818 OS << " + " << offset;
5820 OS << " " << offset;
5821 if (unsigned int TF = CP->getTargetFlags())
5822 OS << " [TF=" << TF << ']';
5823 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5825 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5827 OS << LBB->getName() << " ";
5828 OS << (const void*)BBDN->getBasicBlock() << ">";
5829 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5830 if (G && R->getReg() &&
5831 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5832 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5834 OS << " %reg" << R->getReg();
5836 } else if (const ExternalSymbolSDNode *ES =
5837 dyn_cast<ExternalSymbolSDNode>(this)) {
5838 OS << "'" << ES->getSymbol() << "'";
5839 if (unsigned int TF = ES->getTargetFlags())
5840 OS << " [TF=" << TF << ']';
5841 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5843 OS << "<" << M->getValue() << ">";
5846 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5847 OS << ":" << N->getVT().getEVTString();
5849 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5850 OS << "<" << *LD->getMemOperand();
5853 switch (LD->getExtensionType()) {
5854 default: doExt = false; break;
5855 case ISD::EXTLOAD: OS << ", anyext"; break;
5856 case ISD::SEXTLOAD: OS << ", sext"; break;
5857 case ISD::ZEXTLOAD: OS << ", zext"; break;
5860 OS << " from " << LD->getMemoryVT().getEVTString();
5862 const char *AM = getIndexedModeName(LD->getAddressingMode());
5867 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5868 OS << "<" << *ST->getMemOperand();
5870 if (ST->isTruncatingStore())
5871 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5873 const char *AM = getIndexedModeName(ST->getAddressingMode());
5878 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5879 OS << "<" << *M->getMemOperand() << ">";
5880 } else if (const BlockAddressSDNode *BA =
5881 dyn_cast<BlockAddressSDNode>(this)) {
5883 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5885 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5887 if (unsigned int TF = BA->getTargetFlags())
5888 OS << " [TF=" << TF << ']';
5892 if (unsigned Order = G->GetOrdering(this))
5893 OS << " [ORD=" << Order << ']';
5896 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5898 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5899 if (i) OS << ", "; else OS << " ";
5900 OS << (void*)getOperand(i).getNode();
5901 if (unsigned RN = getOperand(i).getResNo())
5904 print_details(OS, G);
5907 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5908 const SelectionDAG *G, unsigned depth,
5921 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5923 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
5927 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
5928 unsigned depth) const {
5929 printrWithDepthHelper(OS, this, G, depth, 0);
5932 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
5933 // Don't print impossibly deep things.
5934 printrWithDepth(OS, G, 100);
5937 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
5938 printrWithDepth(dbgs(), G, depth);
5941 void SDNode::dumprFull(const SelectionDAG *G) const {
5942 // Don't print impossibly deep things.
5943 dumprWithDepth(G, 100);
5946 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5947 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5948 if (N->getOperand(i).getNode()->hasOneUse())
5949 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5951 dbgs() << "\n" << std::string(indent+2, ' ')
5952 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5956 dbgs().indent(indent);
5960 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5961 assert(N->getNumValues() == 1 &&
5962 "Can't unroll a vector with multiple results!");
5964 EVT VT = N->getValueType(0);
5965 unsigned NE = VT.getVectorNumElements();
5966 EVT EltVT = VT.getVectorElementType();
5967 DebugLoc dl = N->getDebugLoc();
5969 SmallVector<SDValue, 8> Scalars;
5970 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5972 // If ResNE is 0, fully unroll the vector op.
5975 else if (NE > ResNE)
5979 for (i= 0; i != NE; ++i) {
5980 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
5981 SDValue Operand = N->getOperand(j);
5982 EVT OperandVT = Operand.getValueType();
5983 if (OperandVT.isVector()) {
5984 // A vector operand; extract a single element.
5985 EVT OperandEltVT = OperandVT.getVectorElementType();
5986 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5989 getConstant(i, MVT::i32));
5991 // A scalar operand; just use it as is.
5992 Operands[j] = Operand;
5996 switch (N->getOpcode()) {
5998 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5999 &Operands[0], Operands.size()));
6006 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6007 getShiftAmountOperand(Operands[1])));
6009 case ISD::SIGN_EXTEND_INREG:
6010 case ISD::FP_ROUND_INREG: {
6011 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6012 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6014 getValueType(ExtVT)));
6019 for (; i < ResNE; ++i)
6020 Scalars.push_back(getUNDEF(EltVT));
6022 return getNode(ISD::BUILD_VECTOR, dl,
6023 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6024 &Scalars[0], Scalars.size());
6028 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6029 /// location that is 'Dist' units away from the location that the 'Base' load
6030 /// is loading from.
6031 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6032 unsigned Bytes, int Dist) const {
6033 if (LD->getChain() != Base->getChain())
6035 EVT VT = LD->getValueType(0);
6036 if (VT.getSizeInBits() / 8 != Bytes)
6039 SDValue Loc = LD->getOperand(1);
6040 SDValue BaseLoc = Base->getOperand(1);
6041 if (Loc.getOpcode() == ISD::FrameIndex) {
6042 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6044 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6045 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6046 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6047 int FS = MFI->getObjectSize(FI);
6048 int BFS = MFI->getObjectSize(BFI);
6049 if (FS != BFS || FS != (int)Bytes) return false;
6050 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6052 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6053 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6054 if (V && (V->getSExtValue() == Dist*Bytes))
6058 GlobalValue *GV1 = NULL;
6059 GlobalValue *GV2 = NULL;
6060 int64_t Offset1 = 0;
6061 int64_t Offset2 = 0;
6062 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6063 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6064 if (isGA1 && isGA2 && GV1 == GV2)
6065 return Offset1 == (Offset2 + Dist*Bytes);
6070 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6071 /// it cannot be inferred.
6072 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6073 // If this is a GlobalAddress + cst, return the alignment.
6075 int64_t GVOffset = 0;
6076 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
6077 return MinAlign(GV->getAlignment(), GVOffset);
6079 // If this is a direct reference to a stack slot, use information about the
6080 // stack slot's alignment.
6081 int FrameIdx = 1 << 31;
6082 int64_t FrameOffset = 0;
6083 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6084 FrameIdx = FI->getIndex();
6085 } else if (Ptr.getOpcode() == ISD::ADD &&
6086 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6087 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6088 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6089 FrameOffset = Ptr.getConstantOperandVal(1);
6092 if (FrameIdx != (1 << 31)) {
6093 // FIXME: Handle FI+CST.
6094 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6095 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6097 if (MFI.isFixedObjectIndex(FrameIdx)) {
6098 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6100 // The alignment of the frame index can be determined from its offset from
6101 // the incoming frame position. If the frame object is at offset 32 and
6102 // the stack is guaranteed to be 16-byte aligned, then we know that the
6103 // object is 16-byte aligned.
6104 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6105 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6107 // Finally, the frame object itself may have a known alignment. Factor
6108 // the alignment + offset into a new alignment. For example, if we know
6109 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6110 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6111 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6112 return std::max(Align, FIInfoAlign);
6120 void SelectionDAG::dump() const {
6121 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6123 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6125 const SDNode *N = I;
6126 if (!N->hasOneUse() && N != getRoot().getNode())
6127 DumpNodes(N, 2, this);
6130 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6135 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6137 print_details(OS, G);
6140 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6141 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6142 const SelectionDAG *G, VisitedSDNodeSet &once) {
6143 if (!once.insert(N)) // If we've been here before, return now.
6146 // Dump the current SDNode, but don't end the line yet.
6147 OS << std::string(indent, ' ');
6150 // Having printed this SDNode, walk the children:
6151 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6152 const SDNode *child = N->getOperand(i).getNode();
6157 if (child->getNumOperands() == 0) {
6158 // This child has no grandchildren; print it inline right here.
6159 child->printr(OS, G);
6161 } else { // Just the address. FIXME: also print the child's opcode.
6163 if (unsigned RN = N->getOperand(i).getResNo())
6170 // Dump children that have grandchildren on their own line(s).
6171 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6172 const SDNode *child = N->getOperand(i).getNode();
6173 DumpNodesr(OS, child, indent+2, G, once);
6177 void SDNode::dumpr() const {
6178 VisitedSDNodeSet once;
6179 DumpNodesr(dbgs(), this, 0, 0, once);
6182 void SDNode::dumpr(const SelectionDAG *G) const {
6183 VisitedSDNodeSet once;
6184 DumpNodesr(dbgs(), this, 0, G, once);
6188 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6189 unsigned GlobalAddressSDNode::getAddressSpace() const {
6190 return getGlobal()->getType()->getAddressSpace();
6194 const Type *ConstantPoolSDNode::getType() const {
6195 if (isMachineConstantPoolEntry())
6196 return Val.MachineCPVal->getType();
6197 return Val.ConstVal->getType();
6200 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6202 unsigned &SplatBitSize,
6204 unsigned MinSplatBits,
6206 EVT VT = getValueType(0);
6207 assert(VT.isVector() && "Expected a vector type");
6208 unsigned sz = VT.getSizeInBits();
6209 if (MinSplatBits > sz)
6212 SplatValue = APInt(sz, 0);
6213 SplatUndef = APInt(sz, 0);
6215 // Get the bits. Bits with undefined values (when the corresponding element
6216 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6217 // in SplatValue. If any of the values are not constant, give up and return
6219 unsigned int nOps = getNumOperands();
6220 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6221 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6223 for (unsigned j = 0; j < nOps; ++j) {
6224 unsigned i = isBigEndian ? nOps-1-j : j;
6225 SDValue OpVal = getOperand(i);
6226 unsigned BitPos = j * EltBitSize;
6228 if (OpVal.getOpcode() == ISD::UNDEF)
6229 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6230 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6231 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6232 zextOrTrunc(sz) << BitPos);
6233 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6234 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6239 // The build_vector is all constants or undefs. Find the smallest element
6240 // size that splats the vector.
6242 HasAnyUndefs = (SplatUndef != 0);
6245 unsigned HalfSize = sz / 2;
6246 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6247 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6248 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6249 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6251 // If the two halves do not match (ignoring undef bits), stop here.
6252 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6253 MinSplatBits > HalfSize)
6256 SplatValue = HighValue | LowValue;
6257 SplatUndef = HighUndef & LowUndef;
6266 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6267 // Find the first non-undef value in the shuffle mask.
6269 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6272 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6274 // Make sure all remaining elements are either undef or the same as the first
6276 for (int Idx = Mask[i]; i != e; ++i)
6277 if (Mask[i] >= 0 && Mask[i] != Idx)
6282 static void checkForCyclesHelper(const SDNode *N,
6283 std::set<const SDNode *> &visited) {
6284 if (visited.find(N) != visited.end()) {
6285 dbgs() << "Offending node:\n";
6287 assert(0 && "Detected cycle in SelectionDAG");
6290 std::set<const SDNode*>::iterator i;
6293 tie(i, inserted) = visited.insert(N);
6294 assert(inserted && "Missed cycle");
6296 for(unsigned i = 0; i < N->getNumOperands(); ++i) {
6297 checkForCyclesHelper(N->getOperand(i).getNode(), visited);
6302 void llvm::checkForCycles(const llvm::SDNode *N) {
6304 assert(N && "Checking nonexistant SDNode");
6305 std::set<const SDNode *> visited;
6306 checkForCyclesHelper(N, visited);
6310 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6311 checkForCycles(DAG->getRoot().getNode());