1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/Constants.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/Support/MathExtras.h"
20 #include "llvm/Target/MRegisterInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
30 static bool isCommutativeBinOp(unsigned Opcode) {
36 case ISD::XOR: return true;
37 default: return false; // FIXME: Need commutative info for user ops!
41 static bool isAssociativeBinOp(unsigned Opcode) {
47 case ISD::XOR: return true;
48 default: return false; // FIXME: Need associative info for user ops!
52 // isInvertibleForFree - Return true if there is no cost to emitting the logical
53 // inverse of this node.
54 static bool isInvertibleForFree(SDOperand N) {
55 if (isa<ConstantSDNode>(N.Val)) return true;
56 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
61 //===----------------------------------------------------------------------===//
62 // ConstantFPSDNode Class
63 //===----------------------------------------------------------------------===//
65 /// isExactlyValue - We don't rely on operator== working on double values, as
66 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
67 /// As such, this method can be used to do an exact bit-for-bit comparison of
68 /// two floating point values.
69 bool ConstantFPSDNode::isExactlyValue(double V) const {
70 return DoubleToBits(V) == DoubleToBits(Value);
73 //===----------------------------------------------------------------------===//
75 //===----------------------------------------------------------------------===//
77 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
78 /// when given the operation for (X op Y).
79 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
80 // To perform this operation, we just need to swap the L and G bits of the
82 unsigned OldL = (Operation >> 2) & 1;
83 unsigned OldG = (Operation >> 1) & 1;
84 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
85 (OldL << 1) | // New G bit
86 (OldG << 2)); // New L bit.
89 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
90 /// 'op' is a valid SetCC operation.
91 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
92 unsigned Operation = Op;
94 Operation ^= 7; // Flip L, G, E bits, but not U.
96 Operation ^= 15; // Flip all of the condition bits.
97 if (Operation > ISD::SETTRUE2)
98 Operation &= ~8; // Don't let N and U bits get set.
99 return ISD::CondCode(Operation);
103 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
104 /// signed operation and 2 if the result is an unsigned comparison. Return zero
105 /// if the operation does not depend on the sign of the input (setne and seteq).
106 static int isSignedOp(ISD::CondCode Opcode) {
108 default: assert(0 && "Illegal integer setcc operation!");
110 case ISD::SETNE: return 0;
114 case ISD::SETGE: return 1;
118 case ISD::SETUGE: return 2;
122 /// getSetCCOrOperation - Return the result of a logical OR between different
123 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
124 /// returns SETCC_INVALID if it is not possible to represent the resultant
126 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
128 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
129 // Cannot fold a signed integer setcc with an unsigned integer setcc.
130 return ISD::SETCC_INVALID;
132 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
134 // If the N and U bits get set then the resultant comparison DOES suddenly
135 // care about orderedness, and is true when ordered.
136 if (Op > ISD::SETTRUE2)
137 Op &= ~16; // Clear the N bit.
138 return ISD::CondCode(Op);
141 /// getSetCCAndOperation - Return the result of a logical AND between different
142 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
143 /// function returns zero if it is not possible to represent the resultant
145 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
147 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
148 // Cannot fold a signed setcc with an unsigned setcc.
149 return ISD::SETCC_INVALID;
151 // Combine all of the condition bits.
152 return ISD::CondCode(Op1 & Op2);
155 const TargetMachine &SelectionDAG::getTarget() const {
156 return TLI.getTargetMachine();
159 //===----------------------------------------------------------------------===//
160 // SelectionDAG Class
161 //===----------------------------------------------------------------------===//
163 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
164 /// SelectionDAG, including nodes (like loads) that have uses of their token
165 /// chain but no other uses and no side effect. If a node is passed in as an
166 /// argument, it is used as the seed for node deletion.
167 void SelectionDAG::RemoveDeadNodes(SDNode *N) {
168 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
170 // Create a dummy node (which is not added to allnodes), that adds a reference
171 // to the root node, preventing it from being deleted.
172 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot());
174 // If we have a hint to start from, use it.
175 if (N) DeleteNodeIfDead(N, &AllNodeSet);
178 unsigned NumNodes = AllNodeSet.size();
179 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
181 // Try to delete this node.
182 DeleteNodeIfDead(*I, &AllNodeSet);
184 // If we actually deleted any nodes, do not use invalid iterators in
186 if (AllNodeSet.size() != NumNodes)
191 if (AllNodes.size() != NumNodes)
192 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
194 // If the root changed (e.g. it was a dead load, update the root).
195 setRoot(DummyNode->getOperand(0));
197 // Now that we are done with the dummy node, delete it.
198 DummyNode->getOperand(0).Val->removeUser(DummyNode);
203 void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
207 // Okay, we really are going to delete this node. First take this out of the
208 // appropriate CSE map.
209 RemoveNodeFromCSEMaps(N);
211 // Next, brutally remove the operand list. This is safe to do, as there are
212 // no cycles in the graph.
213 while (!N->Operands.empty()) {
214 SDNode *O = N->Operands.back().Val;
215 N->Operands.pop_back();
218 // Now that we removed this operand, see if there are no uses of it left.
219 DeleteNodeIfDead(O, NodeSet);
222 // Remove the node from the nodes set and delete it.
223 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
226 // Now that the node is gone, check to see if any of the operands of this node
231 void SelectionDAG::DeleteNode(SDNode *N) {
232 assert(N->use_empty() && "Cannot delete a node that is not dead!");
234 // First take this out of the appropriate CSE map.
235 RemoveNodeFromCSEMaps(N);
237 // Remove it from the AllNodes list.
238 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) {
239 assert(I != AllNodes.end() && "Node not in AllNodes list??");
241 // Erase from the vector, which is not ordered.
242 std::swap(*I, AllNodes.back());
248 // Drop all of the operands and decrement used nodes use counts.
249 while (!N->Operands.empty()) {
250 SDNode *O = N->Operands.back().Val;
251 N->Operands.pop_back();
258 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
259 /// correspond to it. This is useful when we're about to delete or repurpose
260 /// the node. We don't want future request for structurally identical nodes
261 /// to return N anymore.
262 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
264 switch (N->getOpcode()) {
266 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
267 N->getValueType(0)));
269 case ISD::TargetConstant:
270 Erased = TargetConstants.erase(std::make_pair(
271 cast<ConstantSDNode>(N)->getValue(),
272 N->getValueType(0)));
274 case ISD::ConstantFP: {
275 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue());
276 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0)));
280 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
281 "Cond code doesn't exist!");
282 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
283 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
285 case ISD::GlobalAddress:
286 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
288 case ISD::TargetGlobalAddress:
289 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
291 case ISD::FrameIndex:
292 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
294 case ISD::TargetFrameIndex:
295 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
297 case ISD::ConstantPool:
298 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
300 case ISD::TargetConstantPool:
301 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
303 case ISD::BasicBlock:
304 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
306 case ISD::ExternalSymbol:
307 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
310 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0;
311 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0;
314 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(),
315 N->getValueType(0)));
317 case ISD::SRCVALUE: {
318 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N);
319 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset()));
323 Erased = Loads.erase(std::make_pair(N->getOperand(1),
324 std::make_pair(N->getOperand(0),
325 N->getValueType(0))));
328 if (N->getNumValues() == 1) {
329 if (N->getNumOperands() == 1) {
331 UnaryOps.erase(std::make_pair(N->getOpcode(),
332 std::make_pair(N->getOperand(0),
333 N->getValueType(0))));
334 } else if (N->getNumOperands() == 2) {
336 BinaryOps.erase(std::make_pair(N->getOpcode(),
337 std::make_pair(N->getOperand(0),
340 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
342 OneResultNodes.erase(std::make_pair(N->getOpcode(),
343 std::make_pair(N->getValueType(0),
347 // Remove the node from the ArbitraryNodes map.
348 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
349 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
351 ArbitraryNodes.erase(std::make_pair(N->getOpcode(),
352 std::make_pair(RV, Ops)));
357 // Verify that the node was actually in one of the CSE maps, unless it has a
358 // flag result (which cannot be CSE'd) or is one of the special cases that are
359 // not subject to CSE.
360 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
361 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START &&
362 N->getOpcode() != ISD::CALLSEQ_END) {
365 assert(0 && "Node is not in map!");
370 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
371 /// has been taken out and modified in some way. If the specified node already
372 /// exists in the CSE maps, do not modify the maps, but return the existing node
373 /// instead. If it doesn't exist, add it and return null.
375 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
376 assert(N->getNumOperands() && "This is a leaf node!");
377 if (N->getOpcode() == ISD::LOAD) {
378 SDNode *&L = Loads[std::make_pair(N->getOperand(1),
379 std::make_pair(N->getOperand(0),
380 N->getValueType(0)))];
383 } else if (N->getNumOperands() == 1) {
384 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(),
385 std::make_pair(N->getOperand(0),
386 N->getValueType(0)))];
389 } else if (N->getNumOperands() == 2) {
390 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(),
391 std::make_pair(N->getOperand(0),
395 } else if (N->getNumValues() == 1) {
396 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
397 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(),
398 std::make_pair(N->getValueType(0), Ops))];
402 // Remove the node from the ArbitraryNodes map.
403 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
404 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
405 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(),
406 std::make_pair(RV, Ops))];
416 SelectionDAG::~SelectionDAG() {
417 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
421 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
422 if (Op.getValueType() == VT) return Op;
423 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT));
424 return getNode(ISD::AND, Op.getValueType(), Op,
425 getConstant(Imm, Op.getValueType()));
428 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
429 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
430 // Mask out any bits that are not valid for this constant.
432 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
434 SDNode *&N = Constants[std::make_pair(Val, VT)];
435 if (N) return SDOperand(N, 0);
436 N = new ConstantSDNode(false, Val, VT);
437 AllNodes.push_back(N);
438 return SDOperand(N, 0);
441 SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) {
442 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
443 // Mask out any bits that are not valid for this constant.
445 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
447 SDNode *&N = TargetConstants[std::make_pair(Val, VT)];
448 if (N) return SDOperand(N, 0);
449 N = new ConstantSDNode(true, Val, VT);
450 AllNodes.push_back(N);
451 return SDOperand(N, 0);
454 SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
455 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
457 Val = (float)Val; // Mask out extra precision.
459 // Do the map lookup using the actual bit pattern for the floating point
460 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
461 // we don't have issues with SNANs.
462 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)];
463 if (N) return SDOperand(N, 0);
464 N = new ConstantFPSDNode(Val, VT);
465 AllNodes.push_back(N);
466 return SDOperand(N, 0);
471 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
473 SDNode *&N = GlobalValues[GV];
474 if (N) return SDOperand(N, 0);
475 N = new GlobalAddressSDNode(false, GV, VT);
476 AllNodes.push_back(N);
477 return SDOperand(N, 0);
480 SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV,
482 SDNode *&N = TargetGlobalValues[GV];
483 if (N) return SDOperand(N, 0);
484 N = new GlobalAddressSDNode(true, GV, VT);
485 AllNodes.push_back(N);
486 return SDOperand(N, 0);
489 SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
490 SDNode *&N = FrameIndices[FI];
491 if (N) return SDOperand(N, 0);
492 N = new FrameIndexSDNode(FI, VT, false);
493 AllNodes.push_back(N);
494 return SDOperand(N, 0);
497 SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) {
498 SDNode *&N = TargetFrameIndices[FI];
499 if (N) return SDOperand(N, 0);
500 N = new FrameIndexSDNode(FI, VT, true);
501 AllNodes.push_back(N);
502 return SDOperand(N, 0);
505 SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) {
506 SDNode *&N = ConstantPoolIndices[C];
507 if (N) return SDOperand(N, 0);
508 N = new ConstantPoolSDNode(C, VT, false);
509 AllNodes.push_back(N);
510 return SDOperand(N, 0);
513 SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) {
514 SDNode *&N = TargetConstantPoolIndices[C];
515 if (N) return SDOperand(N, 0);
516 N = new ConstantPoolSDNode(C, VT, true);
517 AllNodes.push_back(N);
518 return SDOperand(N, 0);
521 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
522 SDNode *&N = BBNodes[MBB];
523 if (N) return SDOperand(N, 0);
524 N = new BasicBlockSDNode(MBB);
525 AllNodes.push_back(N);
526 return SDOperand(N, 0);
529 SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
530 if ((unsigned)VT >= ValueTypeNodes.size())
531 ValueTypeNodes.resize(VT+1);
532 if (ValueTypeNodes[VT] == 0) {
533 ValueTypeNodes[VT] = new VTSDNode(VT);
534 AllNodes.push_back(ValueTypeNodes[VT]);
537 return SDOperand(ValueTypeNodes[VT], 0);
540 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
541 SDNode *&N = ExternalSymbols[Sym];
542 if (N) return SDOperand(N, 0);
543 N = new ExternalSymbolSDNode(Sym, VT);
544 AllNodes.push_back(N);
545 return SDOperand(N, 0);
548 SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
549 if ((unsigned)Cond >= CondCodeNodes.size())
550 CondCodeNodes.resize(Cond+1);
552 if (CondCodeNodes[Cond] == 0) {
553 CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
554 AllNodes.push_back(CondCodeNodes[Cond]);
556 return SDOperand(CondCodeNodes[Cond], 0);
559 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
560 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)];
562 Reg = new RegisterSDNode(RegNo, VT);
563 AllNodes.push_back(Reg);
565 return SDOperand(Reg, 0);
568 SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
569 SDOperand N2, ISD::CondCode Cond) {
570 // These setcc operations always fold.
574 case ISD::SETFALSE2: return getConstant(0, VT);
576 case ISD::SETTRUE2: return getConstant(1, VT);
579 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
580 uint64_t C2 = N2C->getValue();
581 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
582 uint64_t C1 = N1C->getValue();
584 // Sign extend the operands if required
585 if (ISD::isSignedIntSetCC(Cond)) {
586 C1 = N1C->getSignExtended();
587 C2 = N2C->getSignExtended();
591 default: assert(0 && "Unknown integer setcc!");
592 case ISD::SETEQ: return getConstant(C1 == C2, VT);
593 case ISD::SETNE: return getConstant(C1 != C2, VT);
594 case ISD::SETULT: return getConstant(C1 < C2, VT);
595 case ISD::SETUGT: return getConstant(C1 > C2, VT);
596 case ISD::SETULE: return getConstant(C1 <= C2, VT);
597 case ISD::SETUGE: return getConstant(C1 >= C2, VT);
598 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
599 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
600 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
601 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
604 // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
605 if (N1.getOpcode() == ISD::ZERO_EXTEND) {
606 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
608 // If the comparison constant has bits in the upper part, the
609 // zero-extended value could never match.
610 if (C2 & (~0ULL << InSize)) {
611 unsigned VSize = MVT::getSizeInBits(N1.getValueType());
615 case ISD::SETEQ: return getConstant(0, VT);
618 case ISD::SETNE: return getConstant(1, VT);
621 // True if the sign bit of C2 is set.
622 return getConstant((C2 & (1ULL << VSize)) != 0, VT);
625 // True if the sign bit of C2 isn't set.
626 return getConstant((C2 & (1ULL << VSize)) == 0, VT);
632 // Otherwise, we can perform the comparison with the low bits.
640 return getSetCC(VT, N1.getOperand(0),
641 getConstant(C2, N1.getOperand(0).getValueType()),
644 break; // todo, be more careful with signed comparisons
646 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
647 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
648 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT();
649 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
650 MVT::ValueType ExtDstTy = N1.getValueType();
651 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
653 // If the extended part has any inconsistent bits, it cannot ever
654 // compare equal. In other words, they have to be all ones or all
657 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
658 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits)
659 return getConstant(Cond == ISD::SETNE, VT);
661 // Otherwise, make this a use of a zext.
662 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy),
663 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy),
667 uint64_t MinVal, MaxVal;
668 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
669 if (ISD::isSignedIntSetCC(Cond)) {
670 MinVal = 1ULL << (OperandBitSize-1);
671 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
672 MaxVal = ~0ULL >> (65-OperandBitSize);
677 MaxVal = ~0ULL >> (64-OperandBitSize);
680 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
681 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
682 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
683 --C2; // X >= C1 --> X > (C1-1)
684 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
685 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
688 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
689 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
690 ++C2; // X <= C1 --> X < (C1+1)
691 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
692 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
695 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
696 return getConstant(0, VT); // X < MIN --> false
698 // Canonicalize setgt X, Min --> setne X, Min
699 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
700 return getSetCC(VT, N1, N2, ISD::SETNE);
702 // If we have setult X, 1, turn it into seteq X, 0
703 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
704 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()),
706 // If we have setugt X, Max-1, turn it into seteq X, Max
707 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
708 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()),
711 // If we have "setcc X, C1", check to see if we can shrink the immediate
714 // SETUGT X, SINTMAX -> SETLT X, 0
715 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
716 C2 == (~0ULL >> (65-OperandBitSize)))
717 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT);
719 // FIXME: Implement the rest of these.
722 // Fold bit comparisons when we can.
723 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
724 VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
725 if (ConstantSDNode *AndRHS =
726 dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
727 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
728 // Perform the xform if the AND RHS is a single bit.
729 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
730 return getNode(ISD::SRL, VT, N1,
731 getConstant(Log2_64(AndRHS->getValue()),
732 TLI.getShiftAmountTy()));
734 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
735 // (X & 8) == 8 --> (X & 8) >> 3
736 // Perform the xform if C2 is a single bit.
737 if ((C2 & (C2-1)) == 0) {
738 return getNode(ISD::SRL, VT, N1,
739 getConstant(Log2_64(C2),TLI.getShiftAmountTy()));
744 } else if (isa<ConstantSDNode>(N1.Val)) {
745 // Ensure that the constant occurs on the RHS.
746 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
749 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
750 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
751 double C1 = N1C->getValue(), C2 = N2C->getValue();
754 default: break; // FIXME: Implement the rest of these!
755 case ISD::SETEQ: return getConstant(C1 == C2, VT);
756 case ISD::SETNE: return getConstant(C1 != C2, VT);
757 case ISD::SETLT: return getConstant(C1 < C2, VT);
758 case ISD::SETGT: return getConstant(C1 > C2, VT);
759 case ISD::SETLE: return getConstant(C1 <= C2, VT);
760 case ISD::SETGE: return getConstant(C1 >= C2, VT);
763 // Ensure that the constant occurs on the RHS.
764 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
768 // We can always fold X == Y for integer setcc's.
769 if (MVT::isInteger(N1.getValueType()))
770 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
771 unsigned UOF = ISD::getUnorderedFlavor(Cond);
772 if (UOF == 2) // FP operators that are undefined on NaNs.
773 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
774 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
775 return getConstant(UOF, VT);
776 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
777 // if it is not already.
778 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO;
780 return getSetCC(VT, N1, N2, NewCond);
783 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
784 MVT::isInteger(N1.getValueType())) {
785 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
786 N1.getOpcode() == ISD::XOR) {
787 // Simplify (X+Y) == (X+Z) --> Y == Z
788 if (N1.getOpcode() == N2.getOpcode()) {
789 if (N1.getOperand(0) == N2.getOperand(0))
790 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
791 if (N1.getOperand(1) == N2.getOperand(1))
792 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond);
793 if (isCommutativeBinOp(N1.getOpcode())) {
794 // If X op Y == Y op X, try other combinations.
795 if (N1.getOperand(0) == N2.getOperand(1))
796 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond);
797 if (N1.getOperand(1) == N2.getOperand(0))
798 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
802 // FIXME: move this stuff to the DAG Combiner when it exists!
804 // Simplify (X+Z) == X --> Z == 0
805 if (N1.getOperand(0) == N2)
806 return getSetCC(VT, N1.getOperand(1),
807 getConstant(0, N1.getValueType()), Cond);
808 if (N1.getOperand(1) == N2) {
809 if (isCommutativeBinOp(N1.getOpcode()))
810 return getSetCC(VT, N1.getOperand(0),
811 getConstant(0, N1.getValueType()), Cond);
813 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
814 // (Z-X) == X --> Z == X<<1
815 return getSetCC(VT, N1.getOperand(0),
816 getNode(ISD::SHL, N2.getValueType(),
817 N2, getConstant(1, TLI.getShiftAmountTy())),
823 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
824 N2.getOpcode() == ISD::XOR) {
825 // Simplify X == (X+Z) --> Z == 0
826 if (N2.getOperand(0) == N1) {
827 return getSetCC(VT, N2.getOperand(1),
828 getConstant(0, N2.getValueType()), Cond);
829 } else if (N2.getOperand(1) == N1) {
830 if (isCommutativeBinOp(N2.getOpcode())) {
831 return getSetCC(VT, N2.getOperand(0),
832 getConstant(0, N2.getValueType()), Cond);
834 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
835 // X == (Z-X) --> X<<1 == Z
836 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1,
837 getConstant(1, TLI.getShiftAmountTy())),
838 N2.getOperand(0), Cond);
844 // Fold away ALL boolean setcc's.
845 if (N1.getValueType() == MVT::i1) {
847 default: assert(0 && "Unknown integer setcc!");
848 case ISD::SETEQ: // X == Y -> (X^Y)^1
849 N1 = getNode(ISD::XOR, MVT::i1,
850 getNode(ISD::XOR, MVT::i1, N1, N2),
851 getConstant(1, MVT::i1));
853 case ISD::SETNE: // X != Y --> (X^Y)
854 N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
856 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
857 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
858 N1 = getNode(ISD::AND, MVT::i1, N2,
859 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
861 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
862 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
863 N1 = getNode(ISD::AND, MVT::i1, N1,
864 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
866 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
867 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
868 N1 = getNode(ISD::OR, MVT::i1, N2,
869 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
871 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
872 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
873 N1 = getNode(ISD::OR, MVT::i1, N1,
874 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
878 N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
882 // Could not fold it.
886 SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
887 SDOperand N3, SDOperand N4,
889 MVT::ValueType VT = N3.getValueType();
890 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
891 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
892 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
893 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val);
895 // Check to see if we can simplify the select into an fabs node
896 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) {
897 // Allow either -0.0 or 0.0
898 if (CFP->getValue() == 0.0) {
899 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
900 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
901 N1 == N3 && N4.getOpcode() == ISD::FNEG &&
902 N1 == N4.getOperand(0))
903 return getNode(ISD::FABS, VT, N1);
905 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
906 if ((CC == ISD::SETLT || CC == ISD::SETLE) &&
907 N1 == N4 && N3.getOpcode() == ISD::FNEG &&
908 N3.getOperand(0) == N4)
909 return getNode(ISD::FABS, VT, N4);
913 // check to see if we're select_cc'ing a select_cc.
914 // this allows us to turn:
915 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false ->
916 // select_cc cc, lhs, rhs, true, false
917 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) ||
918 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) &&
919 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
920 SDOperand SCC = N1C ? N2 : N1;
921 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2));
922 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3));
923 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) {
924 if (CC == ISD::SETEQ) std::swap(N3, N4);
925 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0),
926 SCC.getOperand(1), N3, N4, SCC.getOperand(4));
930 // Check to see if we can perform the "gzip trick", transforming
931 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
932 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
933 MVT::isInteger(N1.getValueType()) &&
934 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) {
935 MVT::ValueType XType = N1.getValueType();
936 MVT::ValueType AType = N3.getValueType();
937 if (XType >= AType) {
938 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
939 // single-bit constant. FIXME: remove once the dag combiner
941 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) {
942 unsigned ShCtV = Log2_64(N3C->getValue());
943 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
944 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
945 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt);
947 Shift = getNode(ISD::TRUNCATE, AType, Shift);
948 return getNode(ISD::AND, AType, Shift, N3);
950 SDOperand Shift = getNode(ISD::SRA, XType, N1,
951 getConstant(MVT::getSizeInBits(XType)-1,
952 TLI.getShiftAmountTy()));
954 Shift = getNode(ISD::TRUNCATE, AType, Shift);
955 return getNode(ISD::AND, AType, Shift, N3);
959 // Check to see if this is the equivalent of setcc
960 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) {
961 MVT::ValueType XType = N1.getValueType();
962 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy()))
963 return getSetCC(TLI.getSetCCResultTy(), N1, N2, CC);
965 // seteq X, 0 -> srl (ctlz X, log2(size(X)))
966 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ &&
967 TLI.isOperationLegal(ISD::CTLZ, XType)) {
968 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
969 return getNode(ISD::SRL, XType, Ctlz,
970 getConstant(Log2_32(MVT::getSizeInBits(XType)),
971 TLI.getShiftAmountTy()));
973 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1)
974 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) {
975 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1);
976 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType));
977 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1),
978 getConstant(MVT::getSizeInBits(XType)-1,
979 TLI.getShiftAmountTy()));
981 // setgt X, -1 -> xor (srl (X, size(X)-1), 1)
982 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) {
983 SDOperand Sign = getNode(ISD::SRL, XType, N1,
984 getConstant(MVT::getSizeInBits(XType)-1,
985 TLI.getShiftAmountTy()));
986 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType));
990 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
991 // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
992 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&
993 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) {
994 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) {
995 MVT::ValueType XType = N1.getValueType();
996 if (SubC->isNullValue() && MVT::isInteger(XType)) {
997 SDOperand Shift = getNode(ISD::SRA, XType, N1,
998 getConstant(MVT::getSizeInBits(XType)-1,
999 TLI.getShiftAmountTy()));
1000 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift),
1006 // Could not fold it.
1010 /// getNode - Gets or creates the specified node.
1012 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
1013 SDNode *N = new SDNode(Opcode, VT);
1014 AllNodes.push_back(N);
1015 return SDOperand(N, 0);
1018 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1019 SDOperand Operand) {
1020 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1021 uint64_t Val = C->getValue();
1024 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
1025 case ISD::ANY_EXTEND:
1026 case ISD::ZERO_EXTEND: return getConstant(Val, VT);
1027 case ISD::TRUNCATE: return getConstant(Val, VT);
1028 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT);
1029 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT);
1033 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
1036 return getConstantFP(-C->getValue(), VT);
1038 case ISD::FP_EXTEND:
1039 return getConstantFP(C->getValue(), VT);
1040 case ISD::FP_TO_SINT:
1041 return getConstant((int64_t)C->getValue(), VT);
1042 case ISD::FP_TO_UINT:
1043 return getConstant((uint64_t)C->getValue(), VT);
1046 unsigned OpOpcode = Operand.Val->getOpcode();
1048 case ISD::TokenFactor:
1049 return Operand; // Factor of one node? No factor.
1050 case ISD::SIGN_EXTEND:
1051 if (Operand.getValueType() == VT) return Operand; // noop extension
1052 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
1053 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1055 case ISD::ZERO_EXTEND:
1056 if (Operand.getValueType() == VT) return Operand; // noop extension
1057 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
1058 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
1060 case ISD::ANY_EXTEND:
1061 if (Operand.getValueType() == VT) return Operand; // noop extension
1062 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
1063 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
1064 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1067 if (Operand.getValueType() == VT) return Operand; // noop truncate
1068 if (OpOpcode == ISD::TRUNCATE)
1069 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1070 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
1071 OpOpcode == ISD::ANY_EXTEND) {
1072 // If the source is smaller than the dest, we still need an extend.
1073 if (Operand.Val->getOperand(0).getValueType() < VT)
1074 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1075 else if (Operand.Val->getOperand(0).getValueType() > VT)
1076 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1078 return Operand.Val->getOperand(0);
1082 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X)
1083 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1),
1084 Operand.Val->getOperand(0));
1085 if (OpOpcode == ISD::FNEG) // --X -> X
1086 return Operand.Val->getOperand(0);
1089 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
1090 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
1095 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
1096 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
1097 if (E) return SDOperand(E, 0);
1098 E = N = new SDNode(Opcode, Operand);
1100 N = new SDNode(Opcode, Operand);
1102 N->setValueTypes(VT);
1103 AllNodes.push_back(N);
1104 return SDOperand(N, 0);
1107 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1108 /// this predicate to simplify operations downstream. V and Mask are known to
1109 /// be the same type.
1110 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
1111 const TargetLowering &TLI) {
1113 if (Mask == 0) return true;
1115 // If we know the result of a setcc has the top bits zero, use this info.
1116 switch (Op.getOpcode()) {
1118 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
1121 return ((Mask & 1) == 0) &&
1122 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
1125 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
1126 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1127 case ISD::ZERO_EXTEND:
1128 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
1129 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
1130 case ISD::AssertZext:
1131 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
1132 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1134 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
1135 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1136 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
1141 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
1142 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
1144 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
1145 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
1146 case ISD::SELECT_CC:
1147 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
1148 MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
1150 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
1151 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1152 uint64_t NewVal = Mask << ShAmt->getValue();
1153 SrcBits = MVT::getSizeInBits(Op.getValueType());
1154 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
1155 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1159 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
1160 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1161 uint64_t NewVal = Mask >> ShAmt->getValue();
1162 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1168 // Bit counting instructions can not set the high bits of the result
1169 // register. The max number of bits sets depends on the input.
1170 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
1172 // TODO we could handle some SRA cases here.
1181 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1182 SDOperand N1, SDOperand N2) {
1185 case ISD::TokenFactor:
1186 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
1187 N2.getValueType() == MVT::Other && "Invalid token factor!");
1196 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
1203 assert(N1.getValueType() == N2.getValueType() &&
1204 N1.getValueType() == VT && "Binary operator types must match!");
1210 assert(VT == N1.getValueType() &&
1211 "Shift operators return type must be the same as their first arg");
1212 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
1213 VT != MVT::i1 && "Shifts only work on integers");
1215 case ISD::FP_ROUND_INREG: {
1216 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1217 assert(VT == N1.getValueType() && "Not an inreg round!");
1218 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1219 "Cannot FP_ROUND_INREG integer types");
1220 assert(EVT <= VT && "Not rounding down!");
1223 case ISD::AssertSext:
1224 case ISD::AssertZext:
1225 case ISD::SIGN_EXTEND_INREG: {
1226 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1227 assert(VT == N1.getValueType() && "Not an inreg extend!");
1228 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1229 "Cannot *_EXTEND_INREG FP types");
1230 assert(EVT <= VT && "Not extending!");
1237 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1238 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1241 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
1243 case ISD::ADD: return getConstant(C1 + C2, VT);
1244 case ISD::SUB: return getConstant(C1 - C2, VT);
1245 case ISD::MUL: return getConstant(C1 * C2, VT);
1247 if (C2) return getConstant(C1 / C2, VT);
1250 if (C2) return getConstant(C1 % C2, VT);
1253 if (C2) return getConstant(N1C->getSignExtended() /
1254 N2C->getSignExtended(), VT);
1257 if (C2) return getConstant(N1C->getSignExtended() %
1258 N2C->getSignExtended(), VT);
1260 case ISD::AND : return getConstant(C1 & C2, VT);
1261 case ISD::OR : return getConstant(C1 | C2, VT);
1262 case ISD::XOR : return getConstant(C1 ^ C2, VT);
1263 case ISD::SHL : return getConstant(C1 << C2, VT);
1264 case ISD::SRL : return getConstant(C1 >> C2, VT);
1265 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
1269 } else { // Cannonicalize constant to RHS if commutative
1270 if (isCommutativeBinOp(Opcode)) {
1271 std::swap(N1C, N2C);
1278 case ISD::SHL: // shl 0, X -> 0
1279 if (N1C->isNullValue()) return N1;
1281 case ISD::SRL: // srl 0, X -> 0
1282 if (N1C->isNullValue()) return N1;
1284 case ISD::SRA: // sra -1, X -> -1
1285 if (N1C->isAllOnesValue()) return N1;
1287 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT
1288 // Extending a constant? Just return the extended constant.
1289 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1);
1290 return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1295 uint64_t C2 = N2C->getValue();
1299 if (!C2) return N1; // add X, 0 -> X
1302 if (!C2) return N1; // sub X, 0 -> X
1303 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT));
1305 if (!C2) return N2; // mul X, 0 -> 0
1306 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
1307 return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
1309 // FIXME: Move this to the DAG combiner when it exists.
1310 if ((C2 & C2-1) == 0) {
1311 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1312 return getNode(ISD::SHL, VT, N1, ShAmt);
1318 if (!C2) return N2; // mul X, 0 -> 0
1320 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0
1321 return getConstant(0, VT);
1323 // Many others could be handled here, including -1, powers of 2, etc.
1327 // FIXME: Move this to the DAG combiner when it exists.
1328 if ((C2 & C2-1) == 0 && C2) {
1329 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1330 return getNode(ISD::SRL, VT, N1, ShAmt);
1337 // If the shift amount is bigger than the size of the data, then all the
1338 // bits are shifted out. Simplify to undef.
1339 if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
1340 return getNode(ISD::UNDEF, N1.getValueType());
1342 if (C2 == 0) return N1;
1344 if (Opcode == ISD::SRA) {
1345 // If the sign bit is known to be zero, switch this to a SRL.
1346 if (MaskedValueIsZero(N1,
1347 1ULL << (MVT::getSizeInBits(N1.getValueType())-1),
1349 return getNode(ISD::SRL, N1.getValueType(), N1, N2);
1351 // If the part left over is known to be zero, the whole thing is zero.
1352 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType()));
1353 if (Opcode == ISD::SRL) {
1354 if (MaskedValueIsZero(N1, TypeMask << C2, TLI))
1355 return getConstant(0, N1.getValueType());
1356 } else if (Opcode == ISD::SHL) {
1357 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI))
1358 return getConstant(0, N1.getValueType());
1362 if (Opcode == ISD::SHL && N1.getNumOperands() == 2)
1363 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1364 unsigned OpSAC = OpSA->getValue();
1365 if (N1.getOpcode() == ISD::SHL) {
1366 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType()))
1367 return getConstant(0, N1.getValueType());
1368 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0),
1369 getConstant(C2+OpSAC, N2.getValueType()));
1370 } else if (N1.getOpcode() == ISD::SRL) {
1371 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1)
1372 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0),
1373 getConstant(~0ULL << OpSAC, VT));
1375 return getNode(ISD::SHL, VT, Mask,
1376 getConstant(C2-OpSAC, N2.getValueType()));
1378 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2)
1379 return getNode(ISD::SRL, VT, Mask,
1380 getConstant(OpSAC-C2, N2.getValueType()));
1382 } else if (N1.getOpcode() == ISD::SRA) {
1383 // if C1 == C2, just mask out low bits.
1385 return getNode(ISD::AND, VT, N1.getOperand(0),
1386 getConstant(~0ULL << C2, VT));
1392 if (!C2) return N2; // X and 0 -> 0
1393 if (N2C->isAllOnesValue())
1394 return N1; // X and -1 -> X
1396 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0
1397 return getConstant(0, VT);
1400 uint64_t NotC2 = ~C2;
1402 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
1404 if (MaskedValueIsZero(N1, NotC2, TLI))
1405 return N1; // if (X & ~C2) -> 0, the and is redundant
1408 // FIXME: Should add a corresponding version of this for
1409 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
1410 // we don't have yet.
1411 // FIXME: NOW WE DO, add this.
1413 // and (sign_extend_inreg x:16:32), 1 -> and x, 1
1414 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
1415 // If we are masking out the part of our input that was extended, just
1416 // mask the input to the extension directly.
1417 unsigned ExtendBits =
1418 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT());
1419 if ((C2 & (~0ULL << ExtendBits)) == 0)
1420 return getNode(ISD::AND, VT, N1.getOperand(0), N2);
1421 } else if (N1.getOpcode() == ISD::OR) {
1422 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
1423 if ((ORI->getValue() & C2) == C2) {
1424 // If the 'or' is setting all of the bits that we are masking for,
1425 // we know the result of the AND will be the AND mask itself.
1431 if (!C2)return N1; // X or 0 -> X
1432 if (N2C->isAllOnesValue())
1433 return N2; // X or -1 -> -1
1436 if (!C2) return N1; // X xor 0 -> X
1437 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) {
1438 SDNode *SetCC = N1.Val;
1439 // !(X op Y) -> (X !op Y)
1440 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
1441 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
1442 return getSetCC(SetCC->getValueType(0),
1443 SetCC->getOperand(0), SetCC->getOperand(1),
1444 ISD::getSetCCInverse(CC, isInteger));
1445 } else if (N2C->isAllOnesValue()) {
1446 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
1447 SDNode *Op = N1.Val;
1448 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
1449 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1450 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1451 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1452 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS
1453 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS
1454 if (Op->getOpcode() == ISD::AND)
1455 return getNode(ISD::OR, VT, LHS, RHS);
1456 return getNode(ISD::AND, VT, LHS, RHS);
1459 // X xor -1 -> not(x) ?
1464 // Reassociate ((X op C1) op C2) if possible.
1465 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1466 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1467 return getNode(Opcode, VT, N1.Val->getOperand(0),
1468 getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1471 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1472 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1475 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1477 case ISD::ADD: return getConstantFP(C1 + C2, VT);
1478 case ISD::SUB: return getConstantFP(C1 - C2, VT);
1479 case ISD::MUL: return getConstantFP(C1 * C2, VT);
1481 if (C2) return getConstantFP(C1 / C2, VT);
1484 if (C2) return getConstantFP(fmod(C1, C2), VT);
1489 } else { // Cannonicalize constant to RHS if commutative
1490 if (isCommutativeBinOp(Opcode)) {
1491 std::swap(N1CFP, N2CFP);
1496 if (Opcode == ISD::FP_ROUND_INREG)
1497 return getNode(ISD::FP_EXTEND, VT,
1498 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1));
1501 // Finally, fold operations that do not require constants.
1503 case ISD::TokenFactor:
1504 if (N1.getOpcode() == ISD::EntryToken)
1506 if (N2.getOpcode() == ISD::EntryToken)
1512 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){
1513 SDNode *LHS = N1.Val, *RHS = N2.Val;
1514 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1515 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1516 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get();
1517 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get();
1519 if (LR == RR && isa<ConstantSDNode>(LR) &&
1520 Op2 == Op1 && MVT::isInteger(LL.getValueType())) {
1521 // (X != 0) | (Y != 0) -> (X|Y != 0)
1522 // (X == 0) & (Y == 0) -> (X|Y == 0)
1523 // (X < 0) | (Y < 0) -> (X|Y < 0)
1524 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1525 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1526 (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1527 (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1528 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR,
1531 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1532 // (X == -1) & (Y == -1) -> (X&Y == -1)
1533 // (X != -1) | (Y != -1) -> (X&Y != -1)
1534 // (X > -1) | (Y > -1) -> (X&Y > -1)
1535 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1536 (Opcode == ISD::OR && Op2 == ISD::SETNE) ||
1537 (Opcode == ISD::OR && Op2 == ISD::SETGT))
1538 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL),
1540 // (X > -1) & (Y > -1) -> (X|Y > -1)
1541 if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1542 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL),
1547 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1548 if (LL == RR && LR == RL) {
1549 Op2 = ISD::getSetCCSwappedOperands(Op2);
1550 goto MatchedBackwards;
1553 if (LL == RL && LR == RR) {
1555 ISD::CondCode Result;
1556 bool isInteger = MVT::isInteger(LL.getValueType());
1557 if (Opcode == ISD::OR)
1558 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger);
1560 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger);
1562 if (Result != ISD::SETCC_INVALID)
1563 return getSetCC(LHS->getValueType(0), LL, LR, Result);
1567 // and/or zext(a), zext(b) -> zext(and/or a, b)
1568 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1569 N2.getOpcode() == ISD::ZERO_EXTEND &&
1570 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1571 return getNode(ISD::ZERO_EXTEND, VT,
1572 getNode(Opcode, N1.getOperand(0).getValueType(),
1573 N1.getOperand(0), N2.getOperand(0)));
1576 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
1579 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B
1580 return getNode(ISD::SUB, VT, N1, N2.getOperand(0));
1581 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A
1582 return getNode(ISD::SUB, VT, N2, N1.getOperand(0));
1583 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1584 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1585 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1586 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1587 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1588 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1589 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) &&
1590 !MVT::isFloatingPoint(N2.getValueType()))
1591 return N2.Val->getOperand(0); // A+(B-A) -> B
1594 if (N1.getOpcode() == ISD::ADD) {
1595 if (N1.Val->getOperand(0) == N2 &&
1596 !MVT::isFloatingPoint(N2.getValueType()))
1597 return N1.Val->getOperand(1); // (A+B)-A == B
1598 if (N1.Val->getOperand(1) == N2 &&
1599 !MVT::isFloatingPoint(N2.getValueType()))
1600 return N1.Val->getOperand(0); // (A+B)-B == A
1602 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B
1603 return getNode(ISD::ADD, VT, N1, N2.getOperand(0));
1605 case ISD::FP_ROUND_INREG:
1606 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
1608 case ISD::SIGN_EXTEND_INREG: {
1609 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1610 if (EVT == VT) return N1; // Not actually extending
1612 // If we are sign extending an extension, use the original source.
1613 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG ||
1614 N1.getOpcode() == ISD::AssertSext)
1615 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT)
1618 // If we are sign extending a sextload, return just the load.
1619 if (N1.getOpcode() == ISD::SEXTLOAD)
1620 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT)
1623 // If we are extending the result of a setcc, and we already know the
1624 // contents of the top bits, eliminate the extension.
1625 if (N1.getOpcode() == ISD::SETCC &&
1626 TLI.getSetCCResultContents() ==
1627 TargetLowering::ZeroOrNegativeOneSetCCResult)
1630 // If we are sign extending the result of an (and X, C) operation, and we
1631 // know the extended bits are zeros already, don't do the extend.
1632 if (N1.getOpcode() == ISD::AND)
1633 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1634 uint64_t Mask = N1C->getValue();
1635 unsigned NumBits = MVT::getSizeInBits(EVT);
1636 if ((Mask & (~0ULL << (NumBits-1))) == 0)
1642 // FIXME: figure out how to safely handle things like
1643 // int foo(int x) { return 1 << (x & 255); }
1644 // int bar() { return foo(256); }
1649 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1650 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1)
1651 return getNode(Opcode, VT, N1, N2.getOperand(0));
1652 else if (N2.getOpcode() == ISD::AND)
1653 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1654 // If the and is only masking out bits that cannot effect the shift,
1655 // eliminate the and.
1656 unsigned NumBits = MVT::getSizeInBits(VT);
1657 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1658 return getNode(Opcode, VT, N1, N2.getOperand(0));
1664 // Memoize this node if possible.
1666 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END &&
1668 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1669 if (BON) return SDOperand(BON, 0);
1671 BON = N = new SDNode(Opcode, N1, N2);
1673 N = new SDNode(Opcode, N1, N2);
1676 N->setValueTypes(VT);
1677 AllNodes.push_back(N);
1678 return SDOperand(N, 0);
1681 // setAdjCallChain - This method changes the token chain of an
1682 // CALLSEQ_START/END node to be the specified operand.
1683 void SDNode::setAdjCallChain(SDOperand N) {
1684 assert(N.getValueType() == MVT::Other);
1685 assert((getOpcode() == ISD::CALLSEQ_START ||
1686 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!");
1688 Operands[0].Val->removeUser(this);
1690 N.Val->Uses.push_back(this);
1695 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1696 SDOperand Chain, SDOperand Ptr,
1698 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1699 if (N) return SDOperand(N, 0);
1700 N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1702 // Loads have a token chain.
1703 N->setValueTypes(VT, MVT::Other);
1704 AllNodes.push_back(N);
1705 return SDOperand(N, 0);
1709 SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT,
1710 SDOperand Chain, SDOperand Ptr, SDOperand SV,
1711 MVT::ValueType EVT) {
1712 std::vector<SDOperand> Ops;
1714 Ops.push_back(Chain);
1717 Ops.push_back(getValueType(EVT));
1718 std::vector<MVT::ValueType> VTs;
1720 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain.
1721 return getNode(Opcode, VTs, Ops);
1724 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1725 SDOperand N1, SDOperand N2, SDOperand N3) {
1726 // Perform various simplifications.
1727 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1728 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1729 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1732 // Use SimplifySetCC to simplify SETCC's.
1733 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
1734 if (Simp.Val) return Simp;
1739 if (N1C->getValue())
1740 return N2; // select true, X, Y -> X
1742 return N3; // select false, X, Y -> Y
1744 if (N2 == N3) return N2; // select C, X, X -> X
1746 if (VT == MVT::i1) { // Boolean SELECT
1748 if (N2C->getValue()) // select C, 1, X -> C | X
1749 return getNode(ISD::OR, VT, N1, N3);
1750 else // select C, 0, X -> ~C & X
1751 return getNode(ISD::AND, VT,
1752 getNode(ISD::XOR, N1.getValueType(), N1,
1753 getConstant(1, N1.getValueType())), N3);
1755 if (N3C->getValue()) // select C, X, 1 -> ~C | X
1756 return getNode(ISD::OR, VT,
1757 getNode(ISD::XOR, N1.getValueType(), N1,
1758 getConstant(1, N1.getValueType())), N2);
1759 else // select C, X, 0 -> C & X
1760 return getNode(ISD::AND, VT, N1, N2);
1763 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y
1764 return getNode(ISD::OR, VT, N1, N3);
1765 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y
1766 return getNode(ISD::AND, VT, N1, N2);
1768 if (N1.getOpcode() == ISD::SETCC) {
1769 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2,
1770 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get());
1771 if (Simp.Val) return Simp;
1776 if (N2C->getValue()) // Unconditional branch
1777 return getNode(ISD::BR, MVT::Other, N1, N3);
1779 return N1; // Never-taken branch
1783 std::vector<SDOperand> Ops;
1789 // Memoize node if it doesn't produce a flag.
1791 if (VT != MVT::Flag) {
1792 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))];
1793 if (E) return SDOperand(E, 0);
1794 E = N = new SDNode(Opcode, N1, N2, N3);
1796 N = new SDNode(Opcode, N1, N2, N3);
1798 N->setValueTypes(VT);
1799 AllNodes.push_back(N);
1800 return SDOperand(N, 0);
1803 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1804 SDOperand N1, SDOperand N2, SDOperand N3,
1806 std::vector<SDOperand> Ops;
1812 return getNode(Opcode, VT, Ops);
1815 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1816 SDOperand N1, SDOperand N2, SDOperand N3,
1817 SDOperand N4, SDOperand N5) {
1818 std::vector<SDOperand> Ops;
1825 return getNode(Opcode, VT, Ops);
1829 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
1830 assert((!V || isa<PointerType>(V->getType())) &&
1831 "SrcValue is not a pointer?");
1832 SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
1833 if (N) return SDOperand(N, 0);
1835 N = new SrcValueSDNode(V, Offset);
1836 AllNodes.push_back(N);
1837 return SDOperand(N, 0);
1840 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1841 std::vector<SDOperand> &Ops) {
1842 switch (Ops.size()) {
1843 case 0: return getNode(Opcode, VT);
1844 case 1: return getNode(Opcode, VT, Ops[0]);
1845 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
1846 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
1850 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val);
1853 case ISD::BRCONDTWOWAY:
1855 if (N1C->getValue()) // Unconditional branch to true dest.
1856 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]);
1857 else // Unconditional branch to false dest.
1858 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]);
1860 case ISD::BRTWOWAY_CC:
1861 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!");
1862 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1863 "LHS and RHS of comparison must have same type!");
1865 case ISD::TRUNCSTORE: {
1866 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1867 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
1868 #if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1869 // If this is a truncating store of a constant, convert to the desired type
1870 // and store it instead.
1871 if (isa<Constant>(Ops[0])) {
1872 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1873 if (isa<Constant>(Op))
1876 // Also for ConstantFP?
1878 if (Ops[0].getValueType() == EVT) // Normal store?
1879 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]);
1880 assert(Ops[1].getValueType() > EVT && "Not a truncation?");
1881 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) &&
1882 "Can't do FP-INT conversion!");
1885 case ISD::SELECT_CC: {
1886 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1887 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
1888 "LHS and RHS of condition must have same type!");
1889 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1890 "True and False arms of SelectCC must have same type!");
1891 assert(Ops[2].getValueType() == VT &&
1892 "select_cc node must be of same type as true and false value!");
1893 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3],
1894 cast<CondCodeSDNode>(Ops[4])->get());
1895 if (Simp.Val) return Simp;
1899 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1900 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1901 "LHS/RHS of comparison should match types!");
1902 // Use SimplifySetCC to simplify SETCC's.
1903 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3],
1904 cast<CondCodeSDNode>(Ops[1])->get());
1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) {
1907 if (C->getValue() & 1) // Unconditional branch
1908 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]);
1910 return Ops[0]; // Unconditional Fall through
1911 } else if (Simp.Val->getOpcode() == ISD::SETCC) {
1912 Ops[2] = Simp.getOperand(0);
1913 Ops[3] = Simp.getOperand(1);
1914 Ops[1] = Simp.getOperand(2);
1923 if (VT != MVT::Flag) {
1925 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))];
1926 if (E) return SDOperand(E, 0);
1927 E = N = new SDNode(Opcode, Ops);
1929 N = new SDNode(Opcode, Ops);
1931 N->setValueTypes(VT);
1932 AllNodes.push_back(N);
1933 return SDOperand(N, 0);
1936 SDOperand SelectionDAG::getNode(unsigned Opcode,
1937 std::vector<MVT::ValueType> &ResultTys,
1938 std::vector<SDOperand> &Ops) {
1939 if (ResultTys.size() == 1)
1940 return getNode(Opcode, ResultTys[0], Ops);
1945 case ISD::ZEXTLOAD: {
1946 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT();
1947 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
1948 // If they are asking for an extending load from/to the same thing, return a
1950 if (ResultTys[0] == EVT)
1951 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]);
1952 assert(EVT < ResultTys[0] &&
1953 "Should only be an extending load, not truncating!");
1954 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) &&
1955 "Cannot sign/zero extend a FP load!");
1956 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) &&
1957 "Cannot convert from FP to Int or Int -> FP!");
1961 // FIXME: figure out how to safely handle things like
1962 // int foo(int x) { return 1 << (x & 255); }
1963 // int bar() { return foo(256); }
1965 case ISD::SRA_PARTS:
1966 case ISD::SRL_PARTS:
1967 case ISD::SHL_PARTS:
1968 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1969 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
1970 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1971 else if (N3.getOpcode() == ISD::AND)
1972 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
1973 // If the and is only masking out bits that cannot effect the shift,
1974 // eliminate the and.
1975 unsigned NumBits = MVT::getSizeInBits(VT)*2;
1976 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1977 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1983 // Memoize the node unless it returns a flag.
1985 if (ResultTys.back() != MVT::Flag) {
1987 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))];
1988 if (E) return SDOperand(E, 0);
1989 E = N = new SDNode(Opcode, Ops);
1991 N = new SDNode(Opcode, Ops);
1993 N->setValueTypes(ResultTys);
1994 AllNodes.push_back(N);
1995 return SDOperand(N, 0);
1999 /// SelectNodeTo - These are used for target selectors to *mutate* the
2000 /// specified node to have the specified return type, Target opcode, and
2001 /// operands. Note that target opcodes are stored as
2002 /// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
2003 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2004 MVT::ValueType VT) {
2005 RemoveNodeFromCSEMaps(N);
2006 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2007 N->setValueTypes(VT);
2009 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2010 MVT::ValueType VT, SDOperand Op1) {
2011 RemoveNodeFromCSEMaps(N);
2012 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2013 N->setValueTypes(VT);
2014 N->setOperands(Op1);
2016 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2017 MVT::ValueType VT, SDOperand Op1,
2019 RemoveNodeFromCSEMaps(N);
2020 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2021 N->setValueTypes(VT);
2022 N->setOperands(Op1, Op2);
2024 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2025 MVT::ValueType VT1, MVT::ValueType VT2,
2026 SDOperand Op1, SDOperand Op2) {
2027 RemoveNodeFromCSEMaps(N);
2028 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2029 N->setValueTypes(VT1, VT2);
2030 N->setOperands(Op1, Op2);
2032 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2033 MVT::ValueType VT, SDOperand Op1,
2034 SDOperand Op2, SDOperand Op3) {
2035 RemoveNodeFromCSEMaps(N);
2036 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2037 N->setValueTypes(VT);
2038 N->setOperands(Op1, Op2, Op3);
2040 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2041 MVT::ValueType VT1, MVT::ValueType VT2,
2042 SDOperand Op1, SDOperand Op2, SDOperand Op3) {
2043 RemoveNodeFromCSEMaps(N);
2044 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2045 N->setValueTypes(VT1, VT2);
2046 N->setOperands(Op1, Op2, Op3);
2049 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2050 MVT::ValueType VT, SDOperand Op1,
2051 SDOperand Op2, SDOperand Op3, SDOperand Op4) {
2052 RemoveNodeFromCSEMaps(N);
2053 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2054 N->setValueTypes(VT);
2055 N->setOperands(Op1, Op2, Op3, Op4);
2057 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2058 MVT::ValueType VT, SDOperand Op1,
2059 SDOperand Op2, SDOperand Op3, SDOperand Op4,
2061 RemoveNodeFromCSEMaps(N);
2062 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2063 N->setValueTypes(VT);
2064 N->setOperands(Op1, Op2, Op3, Op4, Op5);
2067 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2068 /// This can cause recursive merging of nodes in the DAG.
2070 /// This version assumes From/To have a single result value.
2072 void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN) {
2073 SDNode *From = FromN.Val, *To = ToN.Val;
2074 assert(From->getNumValues() == 1 && To->getNumValues() == 1 &&
2075 "Cannot replace with this method!");
2076 assert(From != To && "Cannot replace uses of with self");
2078 while (!From->use_empty()) {
2079 // Process users until they are all gone.
2080 SDNode *U = *From->use_begin();
2082 // This node is about to morph, remove its old self from the CSE maps.
2083 RemoveNodeFromCSEMaps(U);
2085 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2086 if (U->getOperand(i).Val == From) {
2087 From->removeUser(U);
2088 U->Operands[i].Val = To;
2092 // Now that we have modified U, add it back to the CSE maps. If it already
2093 // exists there, recursively merge the results together.
2094 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2095 ReplaceAllUsesWith(U, Existing);
2100 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2101 /// This can cause recursive merging of nodes in the DAG.
2103 /// This version assumes From/To have matching types and numbers of result
2106 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
2107 assert(From != To && "Cannot replace uses of with self");
2108 assert(From->getNumValues() == To->getNumValues() &&
2109 "Cannot use this version of ReplaceAllUsesWith!");
2110 if (From->getNumValues() == 1) { // If possible, use the faster version.
2111 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0));
2115 while (!From->use_empty()) {
2116 // Process users until they are all gone.
2117 SDNode *U = *From->use_begin();
2119 // This node is about to morph, remove its old self from the CSE maps.
2120 RemoveNodeFromCSEMaps(U);
2122 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2123 if (U->getOperand(i).Val == From) {
2124 From->removeUser(U);
2125 U->Operands[i].Val = To;
2129 // Now that we have modified U, add it back to the CSE maps. If it already
2130 // exists there, recursively merge the results together.
2131 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2132 ReplaceAllUsesWith(U, Existing);
2137 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2138 /// This can cause recursive merging of nodes in the DAG.
2140 /// This version can replace From with any result values. To must match the
2141 /// number and types of values returned by From.
2142 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
2143 const std::vector<SDOperand> &To) {
2144 assert(From->getNumValues() == To.size() &&
2145 "Incorrect number of values to replace with!");
2146 if (To.size() == 1 && To[0].Val->getNumValues() == 1) {
2147 // Degenerate case handled above.
2148 ReplaceAllUsesWith(SDOperand(From, 0), To[0]);
2152 while (!From->use_empty()) {
2153 // Process users until they are all gone.
2154 SDNode *U = *From->use_begin();
2156 // This node is about to morph, remove its old self from the CSE maps.
2157 RemoveNodeFromCSEMaps(U);
2159 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2160 if (U->getOperand(i).Val == From) {
2161 const SDOperand &ToOp = To[U->getOperand(i).ResNo];
2162 From->removeUser(U);
2163 U->Operands[i] = ToOp;
2164 ToOp.Val->addUser(U);
2167 // Now that we have modified U, add it back to the CSE maps. If it already
2168 // exists there, recursively merge the results together.
2169 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2170 ReplaceAllUsesWith(U, Existing);
2176 //===----------------------------------------------------------------------===//
2178 //===----------------------------------------------------------------------===//
2180 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
2181 /// indicated value. This method ignores uses of other values defined by this
2183 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
2184 assert(Value < getNumValues() && "Bad value!");
2186 // If there is only one value, this is easy.
2187 if (getNumValues() == 1)
2188 return use_size() == NUses;
2189 if (Uses.size() < NUses) return false;
2191 SDOperand TheValue(this, Value);
2193 std::set<SDNode*> UsersHandled;
2195 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
2198 if (User->getNumOperands() == 1 ||
2199 UsersHandled.insert(User).second) // First time we've seen this?
2200 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
2201 if (User->getOperand(i) == TheValue) {
2203 return false; // too many uses
2208 // Found exactly the right number of uses?
2213 const char *SDNode::getOperationName(const SelectionDAG *G) const {
2214 switch (getOpcode()) {
2216 if (getOpcode() < ISD::BUILTIN_OP_END)
2217 return "<<Unknown DAG Node>>";
2220 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
2221 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END);
2222 return "<<Unknown Target Node>>";
2225 case ISD::PCMARKER: return "PCMarker";
2226 case ISD::SRCVALUE: return "SrcValue";
2227 case ISD::VALUETYPE: return "ValueType";
2228 case ISD::EntryToken: return "EntryToken";
2229 case ISD::TokenFactor: return "TokenFactor";
2230 case ISD::AssertSext: return "AssertSext";
2231 case ISD::AssertZext: return "AssertZext";
2232 case ISD::Constant: return "Constant";
2233 case ISD::TargetConstant: return "TargetConstant";
2234 case ISD::ConstantFP: return "ConstantFP";
2235 case ISD::GlobalAddress: return "GlobalAddress";
2236 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
2237 case ISD::FrameIndex: return "FrameIndex";
2238 case ISD::TargetFrameIndex: return "TargetFrameIndex";
2239 case ISD::BasicBlock: return "BasicBlock";
2240 case ISD::Register: return "Register";
2241 case ISD::ExternalSymbol: return "ExternalSymbol";
2242 case ISD::ConstantPool: return "ConstantPool";
2243 case ISD::TargetConstantPool: return "TargetConstantPool";
2244 case ISD::CopyToReg: return "CopyToReg";
2245 case ISD::CopyFromReg: return "CopyFromReg";
2246 case ISD::ImplicitDef: return "ImplicitDef";
2247 case ISD::UNDEF: return "undef";
2250 case ISD::FABS: return "fabs";
2251 case ISD::FNEG: return "fneg";
2252 case ISD::FSQRT: return "fsqrt";
2253 case ISD::FSIN: return "fsin";
2254 case ISD::FCOS: return "fcos";
2257 case ISD::ADD: return "add";
2258 case ISD::SUB: return "sub";
2259 case ISD::MUL: return "mul";
2260 case ISD::MULHU: return "mulhu";
2261 case ISD::MULHS: return "mulhs";
2262 case ISD::SDIV: return "sdiv";
2263 case ISD::UDIV: return "udiv";
2264 case ISD::SREM: return "srem";
2265 case ISD::UREM: return "urem";
2266 case ISD::AND: return "and";
2267 case ISD::OR: return "or";
2268 case ISD::XOR: return "xor";
2269 case ISD::SHL: return "shl";
2270 case ISD::SRA: return "sra";
2271 case ISD::SRL: return "srl";
2273 case ISD::SETCC: return "setcc";
2274 case ISD::SELECT: return "select";
2275 case ISD::SELECT_CC: return "select_cc";
2276 case ISD::ADD_PARTS: return "add_parts";
2277 case ISD::SUB_PARTS: return "sub_parts";
2278 case ISD::SHL_PARTS: return "shl_parts";
2279 case ISD::SRA_PARTS: return "sra_parts";
2280 case ISD::SRL_PARTS: return "srl_parts";
2282 // Conversion operators.
2283 case ISD::SIGN_EXTEND: return "sign_extend";
2284 case ISD::ZERO_EXTEND: return "zero_extend";
2285 case ISD::ANY_EXTEND: return "any_extend";
2286 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
2287 case ISD::TRUNCATE: return "truncate";
2288 case ISD::FP_ROUND: return "fp_round";
2289 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
2290 case ISD::FP_EXTEND: return "fp_extend";
2292 case ISD::SINT_TO_FP: return "sint_to_fp";
2293 case ISD::UINT_TO_FP: return "uint_to_fp";
2294 case ISD::FP_TO_SINT: return "fp_to_sint";
2295 case ISD::FP_TO_UINT: return "fp_to_uint";
2297 // Control flow instructions
2298 case ISD::BR: return "br";
2299 case ISD::BRCOND: return "brcond";
2300 case ISD::BRCONDTWOWAY: return "brcondtwoway";
2301 case ISD::BR_CC: return "br_cc";
2302 case ISD::BRTWOWAY_CC: return "brtwoway_cc";
2303 case ISD::RET: return "ret";
2304 case ISD::CALL: return "call";
2305 case ISD::TAILCALL:return "tailcall";
2306 case ISD::CALLSEQ_START: return "callseq_start";
2307 case ISD::CALLSEQ_END: return "callseq_end";
2310 case ISD::LOAD: return "load";
2311 case ISD::STORE: return "store";
2312 case ISD::EXTLOAD: return "extload";
2313 case ISD::SEXTLOAD: return "sextload";
2314 case ISD::ZEXTLOAD: return "zextload";
2315 case ISD::TRUNCSTORE: return "truncstore";
2317 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
2318 case ISD::EXTRACT_ELEMENT: return "extract_element";
2319 case ISD::BUILD_PAIR: return "build_pair";
2320 case ISD::MEMSET: return "memset";
2321 case ISD::MEMCPY: return "memcpy";
2322 case ISD::MEMMOVE: return "memmove";
2325 case ISD::CTPOP: return "ctpop";
2326 case ISD::CTTZ: return "cttz";
2327 case ISD::CTLZ: return "ctlz";
2330 case ISD::READPORT: return "readport";
2331 case ISD::WRITEPORT: return "writeport";
2332 case ISD::READIO: return "readio";
2333 case ISD::WRITEIO: return "writeio";
2336 switch (cast<CondCodeSDNode>(this)->get()) {
2337 default: assert(0 && "Unknown setcc condition!");
2338 case ISD::SETOEQ: return "setoeq";
2339 case ISD::SETOGT: return "setogt";
2340 case ISD::SETOGE: return "setoge";
2341 case ISD::SETOLT: return "setolt";
2342 case ISD::SETOLE: return "setole";
2343 case ISD::SETONE: return "setone";
2345 case ISD::SETO: return "seto";
2346 case ISD::SETUO: return "setuo";
2347 case ISD::SETUEQ: return "setue";
2348 case ISD::SETUGT: return "setugt";
2349 case ISD::SETUGE: return "setuge";
2350 case ISD::SETULT: return "setult";
2351 case ISD::SETULE: return "setule";
2352 case ISD::SETUNE: return "setune";
2354 case ISD::SETEQ: return "seteq";
2355 case ISD::SETGT: return "setgt";
2356 case ISD::SETGE: return "setge";
2357 case ISD::SETLT: return "setlt";
2358 case ISD::SETLE: return "setle";
2359 case ISD::SETNE: return "setne";
2364 void SDNode::dump() const { dump(0); }
2365 void SDNode::dump(const SelectionDAG *G) const {
2366 std::cerr << (void*)this << ": ";
2368 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
2369 if (i) std::cerr << ",";
2370 if (getValueType(i) == MVT::Other)
2373 std::cerr << MVT::getValueTypeString(getValueType(i));
2375 std::cerr << " = " << getOperationName(G);
2378 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
2379 if (i) std::cerr << ", ";
2380 std::cerr << (void*)getOperand(i).Val;
2381 if (unsigned RN = getOperand(i).ResNo)
2382 std::cerr << ":" << RN;
2385 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
2386 std::cerr << "<" << CSDN->getValue() << ">";
2387 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
2388 std::cerr << "<" << CSDN->getValue() << ">";
2389 } else if (const GlobalAddressSDNode *GADN =
2390 dyn_cast<GlobalAddressSDNode>(this)) {
2392 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
2393 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
2394 std::cerr << "<" << FIDN->getIndex() << ">";
2395 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
2396 std::cerr << "<" << *CP->get() << ">";
2397 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
2399 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
2401 std::cerr << LBB->getName() << " ";
2402 std::cerr << (const void*)BBDN->getBasicBlock() << ">";
2403 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
2404 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) {
2405 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
2407 std::cerr << " #" << R->getReg();
2409 } else if (const ExternalSymbolSDNode *ES =
2410 dyn_cast<ExternalSymbolSDNode>(this)) {
2411 std::cerr << "'" << ES->getSymbol() << "'";
2412 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
2414 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
2416 std::cerr << "<null:" << M->getOffset() << ">";
2417 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
2418 std::cerr << ":" << getValueTypeString(N->getVT());
2422 static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) {
2423 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
2424 if (N->getOperand(i).Val->hasOneUse())
2425 DumpNodes(N->getOperand(i).Val, indent+2, G);
2427 std::cerr << "\n" << std::string(indent+2, ' ')
2428 << (void*)N->getOperand(i).Val << ": <multiple use>";
2431 std::cerr << "\n" << std::string(indent, ' ');
2435 void SelectionDAG::dump() const {
2436 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
2437 std::vector<SDNode*> Nodes(AllNodes);
2438 std::sort(Nodes.begin(), Nodes.end());
2440 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
2441 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
2442 DumpNodes(Nodes[i], 2, this);
2445 DumpNodes(getRoot().Val, 2, this);
2447 std::cerr << "\n\n";