1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getAddressingMode());
433 ID.AddInteger(LD->getExtensionType());
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawFlags());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getAddressingMode());
441 ID.AddInteger(ST->isTruncatingStore());
442 ID.AddInteger(ST->getMemoryVT().getRawBits());
443 ID.AddInteger(ST->getRawFlags());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX: {
458 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
459 ID.AddInteger(AT->getRawFlags());
462 } // end switch (N->getOpcode())
465 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
467 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
468 AddNodeIDOpcode(ID, N->getOpcode());
469 // Add the return value info.
470 AddNodeIDValueTypes(ID, N->getVTList());
471 // Add the operand info.
472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
474 // Handle SDNode leafs with special info.
475 AddNodeIDCustom(ID, N);
478 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
479 /// the CSE map that carries both alignment and volatility information.
481 static inline unsigned
482 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
483 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 case ISD::DBG_STOPPOINT:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Flag)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
600 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
601 /// correspond to it. This is useful when we're about to delete or repurpose
602 /// the node. We don't want future request for structurally identical nodes
603 /// to return N anymore.
604 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
606 switch (N->getOpcode()) {
607 case ISD::EntryToken:
608 assert(0 && "EntryToken should not be in CSEMaps!");
610 case ISD::HANDLENODE: return false; // noop.
612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
613 "Cond code doesn't exist!");
614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
617 case ISD::ExternalSymbol:
618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
620 case ISD::TargetExternalSymbol:
622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624 case ISD::VALUETYPE: {
625 MVT VT = cast<VTSDNode>(N)->getVT();
626 if (VT.isExtended()) {
627 Erased = ExtendedValueTypeNodes.erase(VT);
629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
630 ValueTypeNodes[VT.getSimpleVT()] = 0;
635 // Remove it from the CSE Map.
636 Erased = CSEMap.RemoveNode(N);
640 // Verify that the node was actually in one of the CSE maps, unless it has a
641 // flag result (which cannot be CSE'd) or is one of the special cases that are
642 // not subject to CSE.
643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
644 !N->isMachineOpcode() && !doNotCSE(N)) {
647 assert(0 && "Node is not in map!");
653 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
654 /// maps and modified in place. Add it back to the CSE maps, unless an identical
655 /// node already exists, in which case transfer all its users to the existing
656 /// node. This transfer can potentially trigger recursive merging.
659 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
660 DAGUpdateListener *UpdateListener) {
661 // For node types that aren't CSE'd, just act as if no identical node
664 SDNode *Existing = CSEMap.GetOrInsertNode(N);
666 // If there was already an existing matching node, use ReplaceAllUsesWith
667 // to replace the dead one with the existing one. This can cause
668 // recursive merging of other unrelated nodes down the line.
669 ReplaceAllUsesWith(N, Existing, UpdateListener);
671 // N is now dead. Inform the listener if it exists and delete it.
673 UpdateListener->NodeDeleted(N, Existing);
674 DeleteNodeNotInCSEMaps(N);
679 // If the node doesn't already exist, we updated it. Inform a listener if
682 UpdateListener->NodeUpdated(N);
685 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
686 /// were replaced with those specified. If this node is never memoized,
687 /// return null, otherwise return a pointer to the slot it would take. If a
688 /// node already exists with these operands, the slot will be non-null.
689 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
694 SDValue Ops[] = { Op };
696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
697 AddNodeIDCustom(ID, N);
698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
706 SDValue Op1, SDValue Op2,
711 SDValue Ops[] = { Op1, Op2 };
713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
714 AddNodeIDCustom(ID, N);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
720 /// were replaced with those specified. If this node is never memoized,
721 /// return null, otherwise return a pointer to the slot it would take. If a
722 /// node already exists with these operands, the slot will be non-null.
723 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
724 const SDValue *Ops,unsigned NumOps,
730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
731 AddNodeIDCustom(ID, N);
732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
736 void SelectionDAG::VerifyNode(SDNode *N) {
737 switch (N->getOpcode()) {
740 case ISD::BUILD_PAIR: {
741 MVT VT = N->getValueType(0);
742 assert(N->getNumValues() == 1 && "Too many results!");
743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
744 "Wrong return type!");
745 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
747 "Mismatched operand types!");
748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
749 "Wrong operand type!");
750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
751 "Wrong return type size");
754 case ISD::BUILD_VECTOR: {
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(N->getValueType(0).isVector() && "Wrong return type!");
757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
758 "Wrong number of operands!");
759 // FIXME: Change vector_shuffle to a variadic node with mask elements being
760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
761 // operand, and it is not always possible to legalize it. Turning off the
762 // following checks at least makes it possible to legalize most of the time.
763 // MVT EltVT = N->getValueType(0).getVectorElementType();
764 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
765 // assert(I->getValueType() == EltVT &&
766 // "Wrong operand type!");
772 /// getMVTAlignment - Compute the default alignment value for the
775 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
776 const Type *Ty = VT == MVT::iPTR ?
777 PointerType::get(Type::Int8Ty, 0) :
780 return TLI.getTargetData()->getABITypeAlignment(Ty);
783 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
784 : TLI(tli), FLI(fli),
785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
786 Root(getEntryNode()) {
787 AllNodes.push_back(&EntryNode);
790 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
797 SelectionDAG::~SelectionDAG() {
801 void SelectionDAG::allnodes_clear() {
802 assert(&*AllNodes.begin() == &EntryNode);
803 AllNodes.remove(AllNodes.begin());
804 while (!AllNodes.empty())
805 DeallocateNode(AllNodes.begin());
808 void SelectionDAG::clear() {
810 OperandAllocator.Reset();
813 ExtendedValueTypeNodes.clear();
814 ExternalSymbols.clear();
815 TargetExternalSymbols.clear();
816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
817 static_cast<CondCodeSDNode*>(0));
818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
819 static_cast<SDNode*>(0));
821 EntryNode.UseList = 0;
822 AllNodes.push_back(&EntryNode);
823 Root = getEntryNode();
826 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
827 if (Op.getValueType() == VT) return Op;
828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
830 return getNode(ISD::AND, Op.getValueType(), Op,
831 getConstant(Imm, Op.getValueType()));
834 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
835 if (Op.getValueType() == VT) return Op;
836 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
838 return getNode(ISD::AND, DL, Op.getValueType(), Op,
839 getConstant(Imm, Op.getValueType()));
842 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
844 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
847 MVT EltVT = VT.getVectorElementType();
849 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
850 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
851 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT,
852 &NegOnes[0], NegOnes.size());
854 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
857 return getNode(ISD::XOR, DL, VT, Val, NegOne);
860 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
861 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
862 assert((EltVT.getSizeInBits() >= 64 ||
863 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
864 "getConstant with a uint64_t value that doesn't fit in the type!");
865 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
868 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
869 return getConstant(*ConstantInt::get(Val), VT, isT);
872 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
873 assert(VT.isInteger() && "Cannot create FP integer constant!");
875 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
876 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
877 "APInt size does not match type size!");
879 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
881 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
885 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
887 return SDValue(N, 0);
889 N = NodeAllocator.Allocate<ConstantSDNode>();
890 new (N) ConstantSDNode(isT, &Val, EltVT);
891 CSEMap.InsertNode(N, IP);
892 AllNodes.push_back(N);
895 SDValue Result(N, 0);
897 SmallVector<SDValue, 8> Ops;
898 Ops.assign(VT.getVectorNumElements(), Result);
899 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
904 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
905 return getConstant(Val, TLI.getPointerTy(), isTarget);
909 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
910 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
913 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
917 VT.isVector() ? VT.getVectorElementType() : VT;
919 // Do the map lookup using the actual bit pattern for the floating point
920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
921 // we don't have issues with SNANs.
922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
930 return SDValue(N, 0);
932 N = NodeAllocator.Allocate<ConstantFPSDNode>();
933 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
934 CSEMap.InsertNode(N, IP);
935 AllNodes.push_back(N);
938 SDValue Result(N, 0);
940 SmallVector<SDValue, 8> Ops;
941 Ops.assign(VT.getVectorNumElements(), Result);
942 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
947 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
949 VT.isVector() ? VT.getVectorElementType() : VT;
951 return getConstantFP(APFloat((float)Val), VT, isTarget);
953 return getConstantFP(APFloat(Val), VT, isTarget);
956 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
957 MVT VT, int64_t Offset,
961 // Truncate (with sign-extension) the offset value to the pointer size.
962 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
964 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
966 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
968 // If GV is an alias then use the aliasee for determining thread-localness.
969 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
970 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
973 if (GVar && GVar->isThreadLocal())
974 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
976 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
979 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
981 ID.AddInteger(Offset);
983 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
984 return SDValue(E, 0);
985 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
986 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
989 return SDValue(N, 0);
992 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
993 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
995 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
999 return SDValue(E, 0);
1000 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1001 new (N) FrameIndexSDNode(FI, VT, isTarget);
1002 CSEMap.InsertNode(N, IP);
1003 AllNodes.push_back(N);
1004 return SDValue(N, 0);
1007 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1008 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1014 return SDValue(E, 0);
1015 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1016 new (N) JumpTableSDNode(JTI, VT, isTarget);
1017 CSEMap.InsertNode(N, IP);
1018 AllNodes.push_back(N);
1019 return SDValue(N, 0);
1022 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1023 unsigned Alignment, int Offset,
1027 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1028 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1029 FoldingSetNodeID ID;
1030 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1031 ID.AddInteger(Alignment);
1032 ID.AddInteger(Offset);
1035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1036 return SDValue(E, 0);
1037 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1038 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1039 CSEMap.InsertNode(N, IP);
1040 AllNodes.push_back(N);
1041 return SDValue(N, 0);
1045 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1046 unsigned Alignment, int Offset,
1050 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1051 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1052 FoldingSetNodeID ID;
1053 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1054 ID.AddInteger(Alignment);
1055 ID.AddInteger(Offset);
1056 C->AddSelectionDAGCSEId(ID);
1058 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1059 return SDValue(E, 0);
1060 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1061 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1062 CSEMap.InsertNode(N, IP);
1063 AllNodes.push_back(N);
1064 return SDValue(N, 0);
1068 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1069 FoldingSetNodeID ID;
1070 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1074 return SDValue(E, 0);
1075 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1076 new (N) BasicBlockSDNode(MBB);
1077 CSEMap.InsertNode(N, IP);
1078 AllNodes.push_back(N);
1079 return SDValue(N, 0);
1082 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1083 FoldingSetNodeID ID;
1084 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1088 return SDValue(E, 0);
1089 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1090 new (N) BasicBlockSDNode(MBB, dl);
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1097 FoldingSetNodeID ID;
1098 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1099 ID.AddInteger(Flags.getRawBits());
1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1102 return SDValue(E, 0);
1103 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1104 new (N) ARG_FLAGSSDNode(Flags);
1105 CSEMap.InsertNode(N, IP);
1106 AllNodes.push_back(N);
1107 return SDValue(N, 0);
1110 SDValue SelectionDAG::getValueType(MVT VT) {
1111 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1112 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1114 SDNode *&N = VT.isExtended() ?
1115 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1117 if (N) return SDValue(N, 0);
1118 N = NodeAllocator.Allocate<VTSDNode>();
1119 new (N) VTSDNode(VT);
1120 AllNodes.push_back(N);
1121 return SDValue(N, 0);
1124 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1125 SDNode *&N = ExternalSymbols[Sym];
1126 if (N) return SDValue(N, 0);
1127 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1128 new (N) ExternalSymbolSDNode(false, Sym, VT);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1134 SDNode *&N = ExternalSymbols[Sym];
1135 if (N) return SDValue(N, 0);
1136 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1137 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1138 AllNodes.push_back(N);
1139 return SDValue(N, 0);
1142 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1143 SDNode *&N = TargetExternalSymbols[Sym];
1144 if (N) return SDValue(N, 0);
1145 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1146 new (N) ExternalSymbolSDNode(true, Sym, VT);
1147 AllNodes.push_back(N);
1148 return SDValue(N, 0);
1151 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1153 SDNode *&N = TargetExternalSymbols[Sym];
1154 if (N) return SDValue(N, 0);
1155 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1156 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1157 AllNodes.push_back(N);
1158 return SDValue(N, 0);
1161 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1162 if ((unsigned)Cond >= CondCodeNodes.size())
1163 CondCodeNodes.resize(Cond+1);
1165 if (CondCodeNodes[Cond] == 0) {
1166 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1167 new (N) CondCodeSDNode(Cond);
1168 CondCodeNodes[Cond] = N;
1169 AllNodes.push_back(N);
1171 return SDValue(CondCodeNodes[Cond], 0);
1174 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1175 SDValue STy, SDValue Rnd, SDValue Sat,
1176 ISD::CvtCode Code) {
1177 // If the src and dest types are the same, no conversion is necessary.
1181 FoldingSetNodeID ID;
1183 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1184 return SDValue(E, 0);
1185 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1186 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1187 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1188 CSEMap.InsertNode(N, IP);
1189 AllNodes.push_back(N);
1190 return SDValue(N, 0);
1193 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1194 FoldingSetNodeID ID;
1195 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1196 ID.AddInteger(RegNo);
1198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1199 return SDValue(E, 0);
1200 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1201 new (N) RegisterSDNode(RegNo, VT);
1202 CSEMap.InsertNode(N, IP);
1203 AllNodes.push_back(N);
1204 return SDValue(N, 0);
1207 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1208 unsigned Line, unsigned Col,
1210 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1211 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1212 AllNodes.push_back(N);
1213 return SDValue(N, 0);
1216 SDValue SelectionDAG::getLabel(unsigned Opcode,
1219 FoldingSetNodeID ID;
1220 SDValue Ops[] = { Root };
1221 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1222 ID.AddInteger(LabelID);
1224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1225 return SDValue(E, 0);
1226 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1227 new (N) LabelSDNode(Opcode, Root, LabelID);
1228 CSEMap.InsertNode(N, IP);
1229 AllNodes.push_back(N);
1230 return SDValue(N, 0);
1233 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1236 FoldingSetNodeID ID;
1237 SDValue Ops[] = { Root };
1238 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1239 ID.AddInteger(LabelID);
1241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1242 return SDValue(E, 0);
1243 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1244 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1245 CSEMap.InsertNode(N, IP);
1246 AllNodes.push_back(N);
1247 return SDValue(N, 0);
1250 SDValue SelectionDAG::getSrcValue(const Value *V) {
1251 assert((!V || isa<PointerType>(V->getType())) &&
1252 "SrcValue is not a pointer?");
1254 FoldingSetNodeID ID;
1255 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1259 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1260 return SDValue(E, 0);
1262 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1263 new (N) SrcValueSDNode(V);
1264 CSEMap.InsertNode(N, IP);
1265 AllNodes.push_back(N);
1266 return SDValue(N, 0);
1269 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1271 const Value *v = MO.getValue();
1272 assert((!v || isa<PointerType>(v->getType())) &&
1273 "SrcValue is not a pointer?");
1276 FoldingSetNodeID ID;
1277 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1281 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1282 return SDValue(E, 0);
1284 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1285 new (N) MemOperandSDNode(MO);
1286 CSEMap.InsertNode(N, IP);
1287 AllNodes.push_back(N);
1288 return SDValue(N, 0);
1291 /// getShiftAmountOperand - Return the specified value casted to
1292 /// the target's desired shift amount type.
1293 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1294 MVT OpTy = Op.getValueType();
1295 MVT ShTy = TLI.getShiftAmountTy();
1296 if (OpTy == ShTy || OpTy.isVector()) return Op;
1298 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1299 return getNode(Opcode, ShTy, Op);
1302 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1303 /// specified value type.
1304 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1305 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1306 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1307 const Type *Ty = VT.getTypeForMVT();
1308 unsigned StackAlign =
1309 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1311 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1312 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1315 /// CreateStackTemporary - Create a stack temporary suitable for holding
1316 /// either of the specified value types.
1317 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1318 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1319 VT2.getStoreSizeInBits())/8;
1320 const Type *Ty1 = VT1.getTypeForMVT();
1321 const Type *Ty2 = VT2.getTypeForMVT();
1322 const TargetData *TD = TLI.getTargetData();
1323 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1324 TD->getPrefTypeAlignment(Ty2));
1326 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1327 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1328 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1331 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1332 SDValue N2, ISD::CondCode Cond) {
1333 // These setcc operations always fold.
1337 case ISD::SETFALSE2: return getConstant(0, VT);
1339 case ISD::SETTRUE2: return getConstant(1, VT);
1351 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1355 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1356 const APInt &C2 = N2C->getAPIntValue();
1357 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1358 const APInt &C1 = N1C->getAPIntValue();
1361 default: assert(0 && "Unknown integer setcc!");
1362 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1363 case ISD::SETNE: return getConstant(C1 != C2, VT);
1364 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1365 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1366 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1367 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1368 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1369 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1370 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1371 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1375 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1376 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1377 // No compile time operations on this type yet.
1378 if (N1C->getValueType(0) == MVT::ppcf128)
1381 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1384 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1385 return getNode(ISD::UNDEF, VT);
1387 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1388 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1389 return getNode(ISD::UNDEF, VT);
1391 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1392 R==APFloat::cmpLessThan, VT);
1393 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1394 return getNode(ISD::UNDEF, VT);
1396 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1397 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1398 return getNode(ISD::UNDEF, VT);
1400 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1401 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1402 return getNode(ISD::UNDEF, VT);
1404 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1405 R==APFloat::cmpEqual, VT);
1406 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1407 return getNode(ISD::UNDEF, VT);
1409 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1410 R==APFloat::cmpEqual, VT);
1411 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1412 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1413 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1414 R==APFloat::cmpEqual, VT);
1415 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1416 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1417 R==APFloat::cmpLessThan, VT);
1418 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1419 R==APFloat::cmpUnordered, VT);
1420 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1421 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1424 // Ensure that the constant occurs on the RHS.
1425 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1429 // Could not fold it.
1433 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1434 /// use this predicate to simplify operations downstream.
1435 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1436 unsigned BitWidth = Op.getValueSizeInBits();
1437 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1440 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1441 /// this predicate to simplify operations downstream. Mask is known to be zero
1442 /// for bits that V cannot have.
1443 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1444 unsigned Depth) const {
1445 APInt KnownZero, KnownOne;
1446 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1447 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1448 return (KnownZero & Mask) == Mask;
1451 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1452 /// known to be either zero or one and return them in the KnownZero/KnownOne
1453 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1455 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1456 APInt &KnownZero, APInt &KnownOne,
1457 unsigned Depth) const {
1458 unsigned BitWidth = Mask.getBitWidth();
1459 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1460 "Mask size mismatches value type size!");
1462 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1463 if (Depth == 6 || Mask == 0)
1464 return; // Limit search depth.
1466 APInt KnownZero2, KnownOne2;
1468 switch (Op.getOpcode()) {
1470 // We know all of the bits for a constant!
1471 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1472 KnownZero = ~KnownOne & Mask;
1475 // If either the LHS or the RHS are Zero, the result is zero.
1476 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1477 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1478 KnownZero2, KnownOne2, Depth+1);
1479 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1480 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1482 // Output known-1 bits are only known if set in both the LHS & RHS.
1483 KnownOne &= KnownOne2;
1484 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1485 KnownZero |= KnownZero2;
1488 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1489 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1490 KnownZero2, KnownOne2, Depth+1);
1491 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1492 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1494 // Output known-0 bits are only known if clear in both the LHS & RHS.
1495 KnownZero &= KnownZero2;
1496 // Output known-1 are known to be set if set in either the LHS | RHS.
1497 KnownOne |= KnownOne2;
1500 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1501 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1502 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1503 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1505 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1506 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1507 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1508 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1509 KnownZero = KnownZeroOut;
1513 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1514 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1515 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1517 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1519 // If low bits are zero in either operand, output low known-0 bits.
1520 // Also compute a conserative estimate for high known-0 bits.
1521 // More trickiness is possible, but this is sufficient for the
1522 // interesting case of alignment computation.
1524 unsigned TrailZ = KnownZero.countTrailingOnes() +
1525 KnownZero2.countTrailingOnes();
1526 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1527 KnownZero2.countLeadingOnes(),
1528 BitWidth) - BitWidth;
1530 TrailZ = std::min(TrailZ, BitWidth);
1531 LeadZ = std::min(LeadZ, BitWidth);
1532 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1533 APInt::getHighBitsSet(BitWidth, LeadZ);
1538 // For the purposes of computing leading zeros we can conservatively
1539 // treat a udiv as a logical right shift by the power of 2 known to
1540 // be less than the denominator.
1541 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1542 ComputeMaskedBits(Op.getOperand(0),
1543 AllOnes, KnownZero2, KnownOne2, Depth+1);
1544 unsigned LeadZ = KnownZero2.countLeadingOnes();
1548 ComputeMaskedBits(Op.getOperand(1),
1549 AllOnes, KnownZero2, KnownOne2, Depth+1);
1550 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1551 if (RHSUnknownLeadingOnes != BitWidth)
1552 LeadZ = std::min(BitWidth,
1553 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1555 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1559 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1560 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1561 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1562 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1564 // Only known if known in both the LHS and RHS.
1565 KnownOne &= KnownOne2;
1566 KnownZero &= KnownZero2;
1568 case ISD::SELECT_CC:
1569 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1570 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1571 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1572 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1574 // Only known if known in both the LHS and RHS.
1575 KnownOne &= KnownOne2;
1576 KnownZero &= KnownZero2;
1584 if (Op.getResNo() != 1)
1586 // The boolean result conforms to getBooleanContents. Fall through.
1588 // If we know the result of a setcc has the top bits zero, use this info.
1589 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1591 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1594 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1595 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1596 unsigned ShAmt = SA->getZExtValue();
1598 // If the shift count is an invalid immediate, don't do anything.
1599 if (ShAmt >= BitWidth)
1602 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1603 KnownZero, KnownOne, Depth+1);
1604 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1605 KnownZero <<= ShAmt;
1607 // low bits known zero.
1608 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1612 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1613 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1614 unsigned ShAmt = SA->getZExtValue();
1616 // If the shift count is an invalid immediate, don't do anything.
1617 if (ShAmt >= BitWidth)
1620 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1621 KnownZero, KnownOne, Depth+1);
1622 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1623 KnownZero = KnownZero.lshr(ShAmt);
1624 KnownOne = KnownOne.lshr(ShAmt);
1626 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1627 KnownZero |= HighBits; // High bits known zero.
1631 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1632 unsigned ShAmt = SA->getZExtValue();
1634 // If the shift count is an invalid immediate, don't do anything.
1635 if (ShAmt >= BitWidth)
1638 APInt InDemandedMask = (Mask << ShAmt);
1639 // If any of the demanded bits are produced by the sign extension, we also
1640 // demand the input sign bit.
1641 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1642 if (HighBits.getBoolValue())
1643 InDemandedMask |= APInt::getSignBit(BitWidth);
1645 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1647 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1648 KnownZero = KnownZero.lshr(ShAmt);
1649 KnownOne = KnownOne.lshr(ShAmt);
1651 // Handle the sign bits.
1652 APInt SignBit = APInt::getSignBit(BitWidth);
1653 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1655 if (KnownZero.intersects(SignBit)) {
1656 KnownZero |= HighBits; // New bits are known zero.
1657 } else if (KnownOne.intersects(SignBit)) {
1658 KnownOne |= HighBits; // New bits are known one.
1662 case ISD::SIGN_EXTEND_INREG: {
1663 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1664 unsigned EBits = EVT.getSizeInBits();
1666 // Sign extension. Compute the demanded bits in the result that are not
1667 // present in the input.
1668 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1670 APInt InSignBit = APInt::getSignBit(EBits);
1671 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1673 // If the sign extended bits are demanded, we know that the sign
1675 InSignBit.zext(BitWidth);
1676 if (NewBits.getBoolValue())
1677 InputDemandedBits |= InSignBit;
1679 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1680 KnownZero, KnownOne, Depth+1);
1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 // If the sign bit of the input is known set or clear, then we know the
1684 // top bits of the result.
1685 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1686 KnownZero |= NewBits;
1687 KnownOne &= ~NewBits;
1688 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1689 KnownOne |= NewBits;
1690 KnownZero &= ~NewBits;
1691 } else { // Input sign bit unknown
1692 KnownZero &= ~NewBits;
1693 KnownOne &= ~NewBits;
1700 unsigned LowBits = Log2_32(BitWidth)+1;
1701 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1706 if (ISD::isZEXTLoad(Op.getNode())) {
1707 LoadSDNode *LD = cast<LoadSDNode>(Op);
1708 MVT VT = LD->getMemoryVT();
1709 unsigned MemBits = VT.getSizeInBits();
1710 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1714 case ISD::ZERO_EXTEND: {
1715 MVT InVT = Op.getOperand(0).getValueType();
1716 unsigned InBits = InVT.getSizeInBits();
1717 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1718 APInt InMask = Mask;
1719 InMask.trunc(InBits);
1720 KnownZero.trunc(InBits);
1721 KnownOne.trunc(InBits);
1722 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1723 KnownZero.zext(BitWidth);
1724 KnownOne.zext(BitWidth);
1725 KnownZero |= NewBits;
1728 case ISD::SIGN_EXTEND: {
1729 MVT InVT = Op.getOperand(0).getValueType();
1730 unsigned InBits = InVT.getSizeInBits();
1731 APInt InSignBit = APInt::getSignBit(InBits);
1732 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1733 APInt InMask = Mask;
1734 InMask.trunc(InBits);
1736 // If any of the sign extended bits are demanded, we know that the sign
1737 // bit is demanded. Temporarily set this bit in the mask for our callee.
1738 if (NewBits.getBoolValue())
1739 InMask |= InSignBit;
1741 KnownZero.trunc(InBits);
1742 KnownOne.trunc(InBits);
1743 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1745 // Note if the sign bit is known to be zero or one.
1746 bool SignBitKnownZero = KnownZero.isNegative();
1747 bool SignBitKnownOne = KnownOne.isNegative();
1748 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1749 "Sign bit can't be known to be both zero and one!");
1751 // If the sign bit wasn't actually demanded by our caller, we don't
1752 // want it set in the KnownZero and KnownOne result values. Reset the
1753 // mask and reapply it to the result values.
1755 InMask.trunc(InBits);
1756 KnownZero &= InMask;
1759 KnownZero.zext(BitWidth);
1760 KnownOne.zext(BitWidth);
1762 // If the sign bit is known zero or one, the top bits match.
1763 if (SignBitKnownZero)
1764 KnownZero |= NewBits;
1765 else if (SignBitKnownOne)
1766 KnownOne |= NewBits;
1769 case ISD::ANY_EXTEND: {
1770 MVT InVT = Op.getOperand(0).getValueType();
1771 unsigned InBits = InVT.getSizeInBits();
1772 APInt InMask = Mask;
1773 InMask.trunc(InBits);
1774 KnownZero.trunc(InBits);
1775 KnownOne.trunc(InBits);
1776 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1777 KnownZero.zext(BitWidth);
1778 KnownOne.zext(BitWidth);
1781 case ISD::TRUNCATE: {
1782 MVT InVT = Op.getOperand(0).getValueType();
1783 unsigned InBits = InVT.getSizeInBits();
1784 APInt InMask = Mask;
1785 InMask.zext(InBits);
1786 KnownZero.zext(InBits);
1787 KnownOne.zext(InBits);
1788 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1789 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1790 KnownZero.trunc(BitWidth);
1791 KnownOne.trunc(BitWidth);
1794 case ISD::AssertZext: {
1795 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1796 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1797 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1799 KnownZero |= (~InMask) & Mask;
1803 // All bits are zero except the low bit.
1804 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1808 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1809 // We know that the top bits of C-X are clear if X contains less bits
1810 // than C (i.e. no wrap-around can happen). For example, 20-X is
1811 // positive if we can prove that X is >= 0 and < 16.
1812 if (CLHS->getAPIntValue().isNonNegative()) {
1813 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1814 // NLZ can't be BitWidth with no sign bit
1815 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1816 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1819 // If all of the MaskV bits are known to be zero, then we know the
1820 // output top bits are zero, because we now know that the output is
1822 if ((KnownZero2 & MaskV) == MaskV) {
1823 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1824 // Top bits known zero.
1825 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1832 // Output known-0 bits are known if clear or set in both the low clear bits
1833 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1834 // low 3 bits clear.
1835 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1836 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1837 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1838 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1840 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1841 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1842 KnownZeroOut = std::min(KnownZeroOut,
1843 KnownZero2.countTrailingOnes());
1845 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1849 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1850 const APInt &RA = Rem->getAPIntValue();
1851 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1852 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1853 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1854 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1856 // If the sign bit of the first operand is zero, the sign bit of
1857 // the result is zero. If the first operand has no one bits below
1858 // the second operand's single 1 bit, its sign will be zero.
1859 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1860 KnownZero2 |= ~LowBits;
1862 KnownZero |= KnownZero2 & Mask;
1864 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1869 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1870 const APInt &RA = Rem->getAPIntValue();
1871 if (RA.isPowerOf2()) {
1872 APInt LowBits = (RA - 1);
1873 APInt Mask2 = LowBits & Mask;
1874 KnownZero |= ~LowBits & Mask;
1875 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1876 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1881 // Since the result is less than or equal to either operand, any leading
1882 // zero bits in either operand must also exist in the result.
1883 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1884 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1886 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1889 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1890 KnownZero2.countLeadingOnes());
1892 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1896 // Allow the target to implement this method for its nodes.
1897 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1898 case ISD::INTRINSIC_WO_CHAIN:
1899 case ISD::INTRINSIC_W_CHAIN:
1900 case ISD::INTRINSIC_VOID:
1901 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1907 /// ComputeNumSignBits - Return the number of times the sign bit of the
1908 /// register is replicated into the other bits. We know that at least 1 bit
1909 /// is always equal to the sign bit (itself), but other cases can give us
1910 /// information. For example, immediately after an "SRA X, 2", we know that
1911 /// the top 3 bits are all equal to each other, so we return 3.
1912 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1913 MVT VT = Op.getValueType();
1914 assert(VT.isInteger() && "Invalid VT!");
1915 unsigned VTBits = VT.getSizeInBits();
1917 unsigned FirstAnswer = 1;
1920 return 1; // Limit search depth.
1922 switch (Op.getOpcode()) {
1924 case ISD::AssertSext:
1925 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1926 return VTBits-Tmp+1;
1927 case ISD::AssertZext:
1928 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1931 case ISD::Constant: {
1932 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1933 // If negative, return # leading ones.
1934 if (Val.isNegative())
1935 return Val.countLeadingOnes();
1937 // Return # leading zeros.
1938 return Val.countLeadingZeros();
1941 case ISD::SIGN_EXTEND:
1942 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1943 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1945 case ISD::SIGN_EXTEND_INREG:
1946 // Max of the input and what this extends.
1947 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1950 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1951 return std::max(Tmp, Tmp2);
1954 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1955 // SRA X, C -> adds C sign bits.
1956 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1957 Tmp += C->getZExtValue();
1958 if (Tmp > VTBits) Tmp = VTBits;
1962 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1963 // shl destroys sign bits.
1964 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1965 if (C->getZExtValue() >= VTBits || // Bad shift.
1966 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1967 return Tmp - C->getZExtValue();
1972 case ISD::XOR: // NOT is handled here.
1973 // Logical binary ops preserve the number of sign bits at the worst.
1974 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1976 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1977 FirstAnswer = std::min(Tmp, Tmp2);
1978 // We computed what we know about the sign bits as our first
1979 // answer. Now proceed to the generic code that uses
1980 // ComputeMaskedBits, and pick whichever answer is better.
1985 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1986 if (Tmp == 1) return 1; // Early out.
1987 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1988 return std::min(Tmp, Tmp2);
1996 if (Op.getResNo() != 1)
1998 // The boolean result conforms to getBooleanContents. Fall through.
2000 // If setcc returns 0/-1, all bits are sign bits.
2001 if (TLI.getBooleanContents() ==
2002 TargetLowering::ZeroOrNegativeOneBooleanContent)
2007 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2008 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2010 // Handle rotate right by N like a rotate left by 32-N.
2011 if (Op.getOpcode() == ISD::ROTR)
2012 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2014 // If we aren't rotating out all of the known-in sign bits, return the
2015 // number that are left. This handles rotl(sext(x), 1) for example.
2016 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2017 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2021 // Add can have at most one carry bit. Thus we know that the output
2022 // is, at worst, one more bit than the inputs.
2023 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2024 if (Tmp == 1) return 1; // Early out.
2026 // Special case decrementing a value (ADD X, -1):
2027 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2028 if (CRHS->isAllOnesValue()) {
2029 APInt KnownZero, KnownOne;
2030 APInt Mask = APInt::getAllOnesValue(VTBits);
2031 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2033 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2035 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2038 // If we are subtracting one from a positive number, there is no carry
2039 // out of the result.
2040 if (KnownZero.isNegative())
2044 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2045 if (Tmp2 == 1) return 1;
2046 return std::min(Tmp, Tmp2)-1;
2050 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2051 if (Tmp2 == 1) return 1;
2054 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2055 if (CLHS->isNullValue()) {
2056 APInt KnownZero, KnownOne;
2057 APInt Mask = APInt::getAllOnesValue(VTBits);
2058 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2059 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2061 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2064 // If the input is known to be positive (the sign bit is known clear),
2065 // the output of the NEG has the same number of sign bits as the input.
2066 if (KnownZero.isNegative())
2069 // Otherwise, we treat this like a SUB.
2072 // Sub can have at most one carry bit. Thus we know that the output
2073 // is, at worst, one more bit than the inputs.
2074 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2075 if (Tmp == 1) return 1; // Early out.
2076 return std::min(Tmp, Tmp2)-1;
2079 // FIXME: it's tricky to do anything useful for this, but it is an important
2080 // case for targets like X86.
2084 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2085 if (Op.getOpcode() == ISD::LOAD) {
2086 LoadSDNode *LD = cast<LoadSDNode>(Op);
2087 unsigned ExtType = LD->getExtensionType();
2090 case ISD::SEXTLOAD: // '17' bits known
2091 Tmp = LD->getMemoryVT().getSizeInBits();
2092 return VTBits-Tmp+1;
2093 case ISD::ZEXTLOAD: // '16' bits known
2094 Tmp = LD->getMemoryVT().getSizeInBits();
2099 // Allow the target to implement this method for its nodes.
2100 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2101 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2102 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2103 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2104 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2105 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2108 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2109 // use this information.
2110 APInt KnownZero, KnownOne;
2111 APInt Mask = APInt::getAllOnesValue(VTBits);
2112 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2114 if (KnownZero.isNegative()) { // sign bit is 0
2116 } else if (KnownOne.isNegative()) { // sign bit is 1;
2123 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2124 // the number of identical bits in the top of the input value.
2126 Mask <<= Mask.getBitWidth()-VTBits;
2127 // Return # leading zeros. We use 'min' here in case Val was zero before
2128 // shifting. We don't want to return '64' as for an i32 "0".
2129 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2133 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2134 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2135 if (!GA) return false;
2136 if (GA->getOffset() != 0) return false;
2137 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2138 if (!GV) return false;
2139 MachineModuleInfo *MMI = getMachineModuleInfo();
2140 return MMI && MMI->hasDebugInfo();
2144 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2145 /// element of the result of the vector shuffle.
2146 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2147 MVT VT = N->getValueType(0);
2148 SDValue PermMask = N->getOperand(2);
2149 SDValue Idx = PermMask.getOperand(i);
2150 if (Idx.getOpcode() == ISD::UNDEF)
2151 return getNode(ISD::UNDEF, VT.getVectorElementType());
2152 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2153 unsigned NumElems = PermMask.getNumOperands();
2154 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2157 if (V.getOpcode() == ISD::BIT_CONVERT) {
2158 V = V.getOperand(0);
2159 MVT VVT = V.getValueType();
2160 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2163 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2164 return (Index == 0) ? V.getOperand(0)
2165 : getNode(ISD::UNDEF, VT.getVectorElementType());
2166 if (V.getOpcode() == ISD::BUILD_VECTOR)
2167 return V.getOperand(Index);
2168 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2169 return getShuffleScalarElt(V.getNode(), Index);
2174 /// getNode - Gets or creates the specified node.
2176 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2177 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2180 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2181 FoldingSetNodeID ID;
2182 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2184 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2185 return SDValue(E, 0);
2186 SDNode *N = NodeAllocator.Allocate<SDNode>();
2187 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2188 CSEMap.InsertNode(N, IP);
2190 AllNodes.push_back(N);
2194 return SDValue(N, 0);
2197 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2198 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2202 MVT VT, SDValue Operand) {
2203 // Constant fold unary operations with an integer constant operand.
2204 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2205 const APInt &Val = C->getAPIntValue();
2206 unsigned BitWidth = VT.getSizeInBits();
2209 case ISD::SIGN_EXTEND:
2210 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2211 case ISD::ANY_EXTEND:
2212 case ISD::ZERO_EXTEND:
2214 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2215 case ISD::UINT_TO_FP:
2216 case ISD::SINT_TO_FP: {
2217 const uint64_t zero[] = {0, 0};
2218 // No compile time operations on this type.
2219 if (VT==MVT::ppcf128)
2221 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2222 (void)apf.convertFromAPInt(Val,
2223 Opcode==ISD::SINT_TO_FP,
2224 APFloat::rmNearestTiesToEven);
2225 return getConstantFP(apf, VT);
2227 case ISD::BIT_CONVERT:
2228 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2229 return getConstantFP(Val.bitsToFloat(), VT);
2230 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2231 return getConstantFP(Val.bitsToDouble(), VT);
2234 return getConstant(Val.byteSwap(), VT);
2236 return getConstant(Val.countPopulation(), VT);
2238 return getConstant(Val.countLeadingZeros(), VT);
2240 return getConstant(Val.countTrailingZeros(), VT);
2244 // Constant fold unary operations with a floating point constant operand.
2245 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2246 APFloat V = C->getValueAPF(); // make copy
2247 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2251 return getConstantFP(V, VT);
2254 return getConstantFP(V, VT);
2256 case ISD::FP_EXTEND: {
2258 // This can return overflow, underflow, or inexact; we don't care.
2259 // FIXME need to be more flexible about rounding mode.
2260 (void)V.convert(*MVTToAPFloatSemantics(VT),
2261 APFloat::rmNearestTiesToEven, &ignored);
2262 return getConstantFP(V, VT);
2264 case ISD::FP_TO_SINT:
2265 case ISD::FP_TO_UINT: {
2268 assert(integerPartWidth >= 64);
2269 // FIXME need to be more flexible about rounding mode.
2270 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2271 Opcode==ISD::FP_TO_SINT,
2272 APFloat::rmTowardZero, &ignored);
2273 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2275 return getConstant(x, VT);
2277 case ISD::BIT_CONVERT:
2278 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2279 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2280 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2281 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2287 unsigned OpOpcode = Operand.getNode()->getOpcode();
2289 case ISD::TokenFactor:
2290 case ISD::MERGE_VALUES:
2291 case ISD::CONCAT_VECTORS:
2292 return Operand; // Factor, merge or concat of one node? No need.
2293 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2294 case ISD::FP_EXTEND:
2295 assert(VT.isFloatingPoint() &&
2296 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2297 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2298 if (Operand.getOpcode() == ISD::UNDEF)
2299 return getNode(ISD::UNDEF, VT);
2301 case ISD::SIGN_EXTEND:
2302 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2303 "Invalid SIGN_EXTEND!");
2304 if (Operand.getValueType() == VT) return Operand; // noop extension
2305 assert(Operand.getValueType().bitsLT(VT)
2306 && "Invalid sext node, dst < src!");
2307 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2308 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2310 case ISD::ZERO_EXTEND:
2311 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2312 "Invalid ZERO_EXTEND!");
2313 if (Operand.getValueType() == VT) return Operand; // noop extension
2314 assert(Operand.getValueType().bitsLT(VT)
2315 && "Invalid zext node, dst < src!");
2316 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2317 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2319 case ISD::ANY_EXTEND:
2320 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2321 "Invalid ANY_EXTEND!");
2322 if (Operand.getValueType() == VT) return Operand; // noop extension
2323 assert(Operand.getValueType().bitsLT(VT)
2324 && "Invalid anyext node, dst < src!");
2325 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2326 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2327 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2330 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2331 "Invalid TRUNCATE!");
2332 if (Operand.getValueType() == VT) return Operand; // noop truncate
2333 assert(Operand.getValueType().bitsGT(VT)
2334 && "Invalid truncate node, src < dst!");
2335 if (OpOpcode == ISD::TRUNCATE)
2336 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2337 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2338 OpOpcode == ISD::ANY_EXTEND) {
2339 // If the source is smaller than the dest, we still need an extend.
2340 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2341 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2342 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2343 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2345 return Operand.getNode()->getOperand(0);
2348 case ISD::BIT_CONVERT:
2349 // Basic sanity checking.
2350 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2351 && "Cannot BIT_CONVERT between types of different sizes!");
2352 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2353 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2354 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2355 if (OpOpcode == ISD::UNDEF)
2356 return getNode(ISD::UNDEF, VT);
2358 case ISD::SCALAR_TO_VECTOR:
2359 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2360 VT.getVectorElementType() == Operand.getValueType() &&
2361 "Illegal SCALAR_TO_VECTOR node!");
2362 if (OpOpcode == ISD::UNDEF)
2363 return getNode(ISD::UNDEF, VT);
2364 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2365 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2366 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2367 Operand.getConstantOperandVal(1) == 0 &&
2368 Operand.getOperand(0).getValueType() == VT)
2369 return Operand.getOperand(0);
2372 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2373 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2374 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2375 Operand.getNode()->getOperand(0));
2376 if (OpOpcode == ISD::FNEG) // --X -> X
2377 return Operand.getNode()->getOperand(0);
2380 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2381 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2386 SDVTList VTs = getVTList(VT);
2387 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2388 FoldingSetNodeID ID;
2389 SDValue Ops[1] = { Operand };
2390 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2392 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2393 return SDValue(E, 0);
2394 N = NodeAllocator.Allocate<UnarySDNode>();
2395 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2396 CSEMap.InsertNode(N, IP);
2398 N = NodeAllocator.Allocate<UnarySDNode>();
2399 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2402 AllNodes.push_back(N);
2406 return SDValue(N, 0);
2409 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2411 ConstantSDNode *Cst1,
2412 ConstantSDNode *Cst2) {
2413 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2416 case ISD::ADD: return getConstant(C1 + C2, VT);
2417 case ISD::SUB: return getConstant(C1 - C2, VT);
2418 case ISD::MUL: return getConstant(C1 * C2, VT);
2420 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2423 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2426 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2429 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2431 case ISD::AND: return getConstant(C1 & C2, VT);
2432 case ISD::OR: return getConstant(C1 | C2, VT);
2433 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2434 case ISD::SHL: return getConstant(C1 << C2, VT);
2435 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2436 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2437 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2438 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2445 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2446 SDValue N1, SDValue N2) {
2447 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2450 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2451 SDValue N1, SDValue N2) {
2452 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2453 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2456 case ISD::TokenFactor:
2457 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2458 N2.getValueType() == MVT::Other && "Invalid token factor!");
2459 // Fold trivial token factors.
2460 if (N1.getOpcode() == ISD::EntryToken) return N2;
2461 if (N2.getOpcode() == ISD::EntryToken) return N1;
2462 if (N1 == N2) return N1;
2464 case ISD::CONCAT_VECTORS:
2465 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2466 // one big BUILD_VECTOR.
2467 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2468 N2.getOpcode() == ISD::BUILD_VECTOR) {
2469 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2470 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2471 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2475 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2476 N1.getValueType() == VT && "Binary operator types must match!");
2477 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2478 // worth handling here.
2479 if (N2C && N2C->isNullValue())
2481 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2488 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2489 N1.getValueType() == VT && "Binary operator types must match!");
2490 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2491 // it's worth handling here.
2492 if (N2C && N2C->isNullValue())
2502 assert(VT.isInteger() && "This operator does not apply to FP types!");
2510 if (Opcode == ISD::FADD) {
2512 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2513 if (CFP->getValueAPF().isZero())
2516 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2517 if (CFP->getValueAPF().isZero())
2519 } else if (Opcode == ISD::FSUB) {
2521 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2522 if (CFP->getValueAPF().isZero())
2526 assert(N1.getValueType() == N2.getValueType() &&
2527 N1.getValueType() == VT && "Binary operator types must match!");
2529 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2530 assert(N1.getValueType() == VT &&
2531 N1.getValueType().isFloatingPoint() &&
2532 N2.getValueType().isFloatingPoint() &&
2533 "Invalid FCOPYSIGN!");
2540 assert(VT == N1.getValueType() &&
2541 "Shift operators return type must be the same as their first arg");
2542 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2543 "Shifts only work on integers");
2545 // Always fold shifts of i1 values so the code generator doesn't need to
2546 // handle them. Since we know the size of the shift has to be less than the
2547 // size of the value, the shift/rotate count is guaranteed to be zero.
2551 case ISD::FP_ROUND_INREG: {
2552 MVT EVT = cast<VTSDNode>(N2)->getVT();
2553 assert(VT == N1.getValueType() && "Not an inreg round!");
2554 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2555 "Cannot FP_ROUND_INREG integer types");
2556 assert(EVT.bitsLE(VT) && "Not rounding down!");
2557 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2561 assert(VT.isFloatingPoint() &&
2562 N1.getValueType().isFloatingPoint() &&
2563 VT.bitsLE(N1.getValueType()) &&
2564 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2565 if (N1.getValueType() == VT) return N1; // noop conversion.
2567 case ISD::AssertSext:
2568 case ISD::AssertZext: {
2569 MVT EVT = cast<VTSDNode>(N2)->getVT();
2570 assert(VT == N1.getValueType() && "Not an inreg extend!");
2571 assert(VT.isInteger() && EVT.isInteger() &&
2572 "Cannot *_EXTEND_INREG FP types");
2573 assert(EVT.bitsLE(VT) && "Not extending!");
2574 if (VT == EVT) return N1; // noop assertion.
2577 case ISD::SIGN_EXTEND_INREG: {
2578 MVT EVT = cast<VTSDNode>(N2)->getVT();
2579 assert(VT == N1.getValueType() && "Not an inreg extend!");
2580 assert(VT.isInteger() && EVT.isInteger() &&
2581 "Cannot *_EXTEND_INREG FP types");
2582 assert(EVT.bitsLE(VT) && "Not extending!");
2583 if (EVT == VT) return N1; // Not actually extending
2586 APInt Val = N1C->getAPIntValue();
2587 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2588 Val <<= Val.getBitWidth()-FromBits;
2589 Val = Val.ashr(Val.getBitWidth()-FromBits);
2590 return getConstant(Val, VT);
2594 case ISD::EXTRACT_VECTOR_ELT:
2595 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2596 if (N1.getOpcode() == ISD::UNDEF)
2597 return getNode(ISD::UNDEF, VT);
2599 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2600 // expanding copies of large vectors from registers.
2602 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2603 N1.getNumOperands() > 0) {
2605 N1.getOperand(0).getValueType().getVectorNumElements();
2606 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2607 N1.getOperand(N2C->getZExtValue() / Factor),
2608 getConstant(N2C->getZExtValue() % Factor,
2609 N2.getValueType()));
2612 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2613 // expanding large vector constants.
2614 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2615 return N1.getOperand(N2C->getZExtValue());
2617 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2618 // operations are lowered to scalars.
2619 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2620 // If the indices are the same, return the inserted element.
2621 if (N1.getOperand(2) == N2)
2622 return N1.getOperand(1);
2623 // If the indices are known different, extract the element from
2624 // the original vector.
2625 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2626 isa<ConstantSDNode>(N2))
2627 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2630 case ISD::EXTRACT_ELEMENT:
2631 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2632 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2633 (N1.getValueType().isInteger() == VT.isInteger()) &&
2634 "Wrong types for EXTRACT_ELEMENT!");
2636 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2637 // 64-bit integers into 32-bit parts. Instead of building the extract of
2638 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2639 if (N1.getOpcode() == ISD::BUILD_PAIR)
2640 return N1.getOperand(N2C->getZExtValue());
2642 // EXTRACT_ELEMENT of a constant int is also very common.
2643 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2644 unsigned ElementSize = VT.getSizeInBits();
2645 unsigned Shift = ElementSize * N2C->getZExtValue();
2646 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2647 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2650 case ISD::EXTRACT_SUBVECTOR:
2651 if (N1.getValueType() == VT) // Trivial extraction.
2658 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2659 if (SV.getNode()) return SV;
2660 } else { // Cannonicalize constant to RHS if commutative
2661 if (isCommutativeBinOp(Opcode)) {
2662 std::swap(N1C, N2C);
2668 // Constant fold FP operations.
2669 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2670 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2672 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2673 // Cannonicalize constant to RHS if commutative
2674 std::swap(N1CFP, N2CFP);
2676 } else if (N2CFP && VT != MVT::ppcf128) {
2677 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2678 APFloat::opStatus s;
2681 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2682 if (s != APFloat::opInvalidOp)
2683 return getConstantFP(V1, VT);
2686 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2687 if (s!=APFloat::opInvalidOp)
2688 return getConstantFP(V1, VT);
2691 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2692 if (s!=APFloat::opInvalidOp)
2693 return getConstantFP(V1, VT);
2696 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2697 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2698 return getConstantFP(V1, VT);
2701 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2702 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2703 return getConstantFP(V1, VT);
2705 case ISD::FCOPYSIGN:
2707 return getConstantFP(V1, VT);
2713 // Canonicalize an UNDEF to the RHS, even over a constant.
2714 if (N1.getOpcode() == ISD::UNDEF) {
2715 if (isCommutativeBinOp(Opcode)) {
2719 case ISD::FP_ROUND_INREG:
2720 case ISD::SIGN_EXTEND_INREG:
2726 return N1; // fold op(undef, arg2) -> undef
2734 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2735 // For vectors, we can't easily build an all zero vector, just return
2742 // Fold a bunch of operators when the RHS is undef.
2743 if (N2.getOpcode() == ISD::UNDEF) {
2746 if (N1.getOpcode() == ISD::UNDEF)
2747 // Handle undef ^ undef -> 0 special case. This is a common
2749 return getConstant(0, VT);
2764 return N2; // fold op(arg1, undef) -> undef
2770 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2771 // For vectors, we can't easily build an all zero vector, just return
2776 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2777 // For vectors, we can't easily build an all one vector, just return
2785 // Memoize this node if possible.
2787 SDVTList VTs = getVTList(VT);
2788 if (VT != MVT::Flag) {
2789 SDValue Ops[] = { N1, N2 };
2790 FoldingSetNodeID ID;
2791 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2793 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2794 return SDValue(E, 0);
2795 N = NodeAllocator.Allocate<BinarySDNode>();
2796 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2797 CSEMap.InsertNode(N, IP);
2799 N = NodeAllocator.Allocate<BinarySDNode>();
2800 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2803 AllNodes.push_back(N);
2807 return SDValue(N, 0);
2810 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2811 SDValue N1, SDValue N2, SDValue N3) {
2812 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2815 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2816 SDValue N1, SDValue N2, SDValue N3) {
2817 // Perform various simplifications.
2818 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2819 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2821 case ISD::CONCAT_VECTORS:
2822 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2823 // one big BUILD_VECTOR.
2824 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2825 N2.getOpcode() == ISD::BUILD_VECTOR &&
2826 N3.getOpcode() == ISD::BUILD_VECTOR) {
2827 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2828 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2829 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2830 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2834 // Use FoldSetCC to simplify SETCC's.
2835 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2836 if (Simp.getNode()) return Simp;
2841 if (N1C->getZExtValue())
2842 return N2; // select true, X, Y -> X
2844 return N3; // select false, X, Y -> Y
2847 if (N2 == N3) return N2; // select C, X, X -> X
2851 if (N2C->getZExtValue()) // Unconditional branch
2852 return getNode(ISD::BR, MVT::Other, N1, N3);
2854 return N1; // Never-taken branch
2857 case ISD::VECTOR_SHUFFLE:
2858 assert(N1.getValueType() == N2.getValueType() &&
2859 N1.getValueType().isVector() &&
2860 VT.isVector() && N3.getValueType().isVector() &&
2861 N3.getOpcode() == ISD::BUILD_VECTOR &&
2862 VT.getVectorNumElements() == N3.getNumOperands() &&
2863 "Illegal VECTOR_SHUFFLE node!");
2865 case ISD::BIT_CONVERT:
2866 // Fold bit_convert nodes from a type to themselves.
2867 if (N1.getValueType() == VT)
2872 // Memoize node if it doesn't produce a flag.
2874 SDVTList VTs = getVTList(VT);
2875 if (VT != MVT::Flag) {
2876 SDValue Ops[] = { N1, N2, N3 };
2877 FoldingSetNodeID ID;
2878 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2880 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2881 return SDValue(E, 0);
2882 N = NodeAllocator.Allocate<TernarySDNode>();
2883 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2884 CSEMap.InsertNode(N, IP);
2886 N = NodeAllocator.Allocate<TernarySDNode>();
2887 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2889 AllNodes.push_back(N);
2893 return SDValue(N, 0);
2896 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2897 SDValue N1, SDValue N2, SDValue N3,
2899 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2902 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2903 SDValue N1, SDValue N2, SDValue N3,
2905 SDValue Ops[] = { N1, N2, N3, N4 };
2906 return getNode(Opcode, DL, VT, Ops, 4);
2909 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2910 SDValue N1, SDValue N2, SDValue N3,
2911 SDValue N4, SDValue N5) {
2912 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2915 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2916 SDValue N1, SDValue N2, SDValue N3,
2917 SDValue N4, SDValue N5) {
2918 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2919 return getNode(Opcode, DL, VT, Ops, 5);
2922 /// getMemsetValue - Vectorized representation of the memset value
2924 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2925 unsigned NumBits = VT.isVector() ?
2926 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2927 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2928 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2930 for (unsigned i = NumBits; i > 8; i >>= 1) {
2931 Val = (Val << Shift) | Val;
2935 return DAG.getConstant(Val, VT);
2936 return DAG.getConstantFP(APFloat(Val), VT);
2939 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2940 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2942 for (unsigned i = NumBits; i > 8; i >>= 1) {
2943 Value = DAG.getNode(ISD::OR, VT,
2944 DAG.getNode(ISD::SHL, VT, Value,
2945 DAG.getConstant(Shift,
2946 TLI.getShiftAmountTy())),
2954 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2955 /// used when a memcpy is turned into a memset when the source is a constant
2957 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2958 const TargetLowering &TLI,
2959 std::string &Str, unsigned Offset) {
2960 // Handle vector with all elements zero.
2963 return DAG.getConstant(0, VT);
2964 unsigned NumElts = VT.getVectorNumElements();
2965 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2966 return DAG.getNode(ISD::BIT_CONVERT, VT,
2967 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2970 assert(!VT.isVector() && "Can't handle vector type here!");
2971 unsigned NumBits = VT.getSizeInBits();
2972 unsigned MSB = NumBits / 8;
2974 if (TLI.isLittleEndian())
2975 Offset = Offset + MSB - 1;
2976 for (unsigned i = 0; i != MSB; ++i) {
2977 Val = (Val << 8) | (unsigned char)Str[Offset];
2978 Offset += TLI.isLittleEndian() ? -1 : 1;
2980 return DAG.getConstant(Val, VT);
2983 /// getMemBasePlusOffset - Returns base and offset node for the
2985 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2986 SelectionDAG &DAG) {
2987 MVT VT = Base.getValueType();
2988 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2991 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2993 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2994 unsigned SrcDelta = 0;
2995 GlobalAddressSDNode *G = NULL;
2996 if (Src.getOpcode() == ISD::GlobalAddress)
2997 G = cast<GlobalAddressSDNode>(Src);
2998 else if (Src.getOpcode() == ISD::ADD &&
2999 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3000 Src.getOperand(1).getOpcode() == ISD::Constant) {
3001 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3002 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3007 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3008 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3014 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3015 /// to replace the memset / memcpy is below the threshold. It also returns the
3016 /// types of the sequence of memory ops to perform memset / memcpy.
3018 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3019 SDValue Dst, SDValue Src,
3020 unsigned Limit, uint64_t Size, unsigned &Align,
3021 std::string &Str, bool &isSrcStr,
3023 const TargetLowering &TLI) {
3024 isSrcStr = isMemSrcFromString(Src, Str);
3025 bool isSrcConst = isa<ConstantSDNode>(Src);
3026 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3027 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3028 if (VT != MVT::iAny) {
3029 unsigned NewAlign = (unsigned)
3030 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3031 // If source is a string constant, this will require an unaligned load.
3032 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3033 if (Dst.getOpcode() != ISD::FrameIndex) {
3034 // Can't change destination alignment. It requires a unaligned store.
3038 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3039 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3040 if (MFI->isFixedObjectIndex(FI)) {
3041 // Can't change destination alignment. It requires a unaligned store.
3045 // Give the stack frame object a larger alignment if needed.
3046 if (MFI->getObjectAlignment(FI) < NewAlign)
3047 MFI->setObjectAlignment(FI, NewAlign);
3054 if (VT == MVT::iAny) {
3058 switch (Align & 7) {
3059 case 0: VT = MVT::i64; break;
3060 case 4: VT = MVT::i32; break;
3061 case 2: VT = MVT::i16; break;
3062 default: VT = MVT::i8; break;
3067 while (!TLI.isTypeLegal(LVT))
3068 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3069 assert(LVT.isInteger());
3075 unsigned NumMemOps = 0;
3077 unsigned VTSize = VT.getSizeInBits() / 8;
3078 while (VTSize > Size) {
3079 // For now, only use non-vector load / store's for the left-over pieces.
3080 if (VT.isVector()) {
3082 while (!TLI.isTypeLegal(VT))
3083 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3084 VTSize = VT.getSizeInBits() / 8;
3086 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3091 if (++NumMemOps > Limit)
3093 MemOps.push_back(VT);
3100 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
3101 SDValue Chain, SDValue Dst,
3102 SDValue Src, uint64_t Size,
3103 unsigned Align, bool AlwaysInline,
3104 const Value *DstSV, uint64_t DstSVOff,
3105 const Value *SrcSV, uint64_t SrcSVOff){
3106 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3108 // Expand memcpy to a series of load and store ops if the size operand falls
3109 // below a certain threshold.
3110 std::vector<MVT> MemOps;
3111 uint64_t Limit = -1ULL;
3113 Limit = TLI.getMaxStoresPerMemcpy();
3114 unsigned DstAlign = Align; // Destination alignment can change.
3117 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3118 Str, CopyFromStr, DAG, TLI))
3122 bool isZeroStr = CopyFromStr && Str.empty();
3123 SmallVector<SDValue, 8> OutChains;
3124 unsigned NumMemOps = MemOps.size();
3125 uint64_t SrcOff = 0, DstOff = 0;
3126 for (unsigned i = 0; i < NumMemOps; i++) {
3128 unsigned VTSize = VT.getSizeInBits() / 8;
3129 SDValue Value, Store;
3131 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3132 // It's unlikely a store of a vector immediate can be done in a single
3133 // instruction. It would require a load from a constantpool first.
3134 // We also handle store a vector with all zero's.
3135 // FIXME: Handle other cases where store of vector immediate is done in
3136 // a single instruction.
3137 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3138 Store = DAG.getStore(Chain, Value,
3139 getMemBasePlusOffset(Dst, DstOff, DAG),
3140 DstSV, DstSVOff + DstOff, false, DstAlign);
3142 Value = DAG.getLoad(VT, Chain,
3143 getMemBasePlusOffset(Src, SrcOff, DAG),
3144 SrcSV, SrcSVOff + SrcOff, false, Align);
3145 Store = DAG.getStore(Chain, Value,
3146 getMemBasePlusOffset(Dst, DstOff, DAG),
3147 DstSV, DstSVOff + DstOff, false, DstAlign);
3149 OutChains.push_back(Store);
3154 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3155 &OutChains[0], OutChains.size());
3158 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3159 SDValue Chain, SDValue Dst,
3160 SDValue Src, uint64_t Size,
3161 unsigned Align, bool AlwaysInline,
3162 const Value *DstSV, uint64_t DstSVOff,
3163 const Value *SrcSV, uint64_t SrcSVOff){
3164 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3166 // Expand memmove to a series of load and store ops if the size operand falls
3167 // below a certain threshold.
3168 std::vector<MVT> MemOps;
3169 uint64_t Limit = -1ULL;
3171 Limit = TLI.getMaxStoresPerMemmove();
3172 unsigned DstAlign = Align; // Destination alignment can change.
3175 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3176 Str, CopyFromStr, DAG, TLI))
3179 uint64_t SrcOff = 0, DstOff = 0;
3181 SmallVector<SDValue, 8> LoadValues;
3182 SmallVector<SDValue, 8> LoadChains;
3183 SmallVector<SDValue, 8> OutChains;
3184 unsigned NumMemOps = MemOps.size();
3185 for (unsigned i = 0; i < NumMemOps; i++) {
3187 unsigned VTSize = VT.getSizeInBits() / 8;
3188 SDValue Value, Store;
3190 Value = DAG.getLoad(VT, Chain,
3191 getMemBasePlusOffset(Src, SrcOff, DAG),
3192 SrcSV, SrcSVOff + SrcOff, false, Align);
3193 LoadValues.push_back(Value);
3194 LoadChains.push_back(Value.getValue(1));
3197 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3198 &LoadChains[0], LoadChains.size());
3200 for (unsigned i = 0; i < NumMemOps; i++) {
3202 unsigned VTSize = VT.getSizeInBits() / 8;
3203 SDValue Value, Store;
3205 Store = DAG.getStore(Chain, LoadValues[i],
3206 getMemBasePlusOffset(Dst, DstOff, DAG),
3207 DstSV, DstSVOff + DstOff, false, DstAlign);
3208 OutChains.push_back(Store);
3212 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3213 &OutChains[0], OutChains.size());
3216 static SDValue getMemsetStores(SelectionDAG &DAG,
3217 SDValue Chain, SDValue Dst,
3218 SDValue Src, uint64_t Size,
3220 const Value *DstSV, uint64_t DstSVOff) {
3221 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3223 // Expand memset to a series of load/store ops if the size operand
3224 // falls below a certain threshold.
3225 std::vector<MVT> MemOps;
3228 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3229 Size, Align, Str, CopyFromStr, DAG, TLI))
3232 SmallVector<SDValue, 8> OutChains;
3233 uint64_t DstOff = 0;
3235 unsigned NumMemOps = MemOps.size();
3236 for (unsigned i = 0; i < NumMemOps; i++) {
3238 unsigned VTSize = VT.getSizeInBits() / 8;
3239 SDValue Value = getMemsetValue(Src, VT, DAG);
3240 SDValue Store = DAG.getStore(Chain, Value,
3241 getMemBasePlusOffset(Dst, DstOff, DAG),
3242 DstSV, DstSVOff + DstOff);
3243 OutChains.push_back(Store);
3247 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3248 &OutChains[0], OutChains.size());
3251 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3252 SDValue Src, SDValue Size,
3253 unsigned Align, bool AlwaysInline,
3254 const Value *DstSV, uint64_t DstSVOff,
3255 const Value *SrcSV, uint64_t SrcSVOff) {
3257 // Check to see if we should lower the memcpy to loads and stores first.
3258 // For cases within the target-specified limits, this is the best choice.
3259 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3261 // Memcpy with size zero? Just return the original chain.
3262 if (ConstantSize->isNullValue())
3266 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3267 ConstantSize->getZExtValue(),
3268 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3269 if (Result.getNode())
3273 // Then check to see if we should lower the memcpy with target-specific
3274 // code. If the target chooses to do this, this is the next best.
3276 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3278 DstSV, DstSVOff, SrcSV, SrcSVOff);
3279 if (Result.getNode())
3282 // If we really need inline code and the target declined to provide it,
3283 // use a (potentially long) sequence of loads and stores.
3285 assert(ConstantSize && "AlwaysInline requires a constant size!");
3286 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3287 ConstantSize->getZExtValue(), Align, true,
3288 DstSV, DstSVOff, SrcSV, SrcSVOff);
3291 // Emit a library call.
3292 TargetLowering::ArgListTy Args;
3293 TargetLowering::ArgListEntry Entry;
3294 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3295 Entry.Node = Dst; Args.push_back(Entry);
3296 Entry.Node = Src; Args.push_back(Entry);
3297 Entry.Node = Size; Args.push_back(Entry);
3298 // FIXME: pass in DebugLoc
3299 std::pair<SDValue,SDValue> CallResult =
3300 TLI.LowerCallTo(Chain, Type::VoidTy,
3301 false, false, false, false, CallingConv::C, false,
3302 getExternalSymbol("memcpy", TLI.getPointerTy()),
3303 Args, *this, DebugLoc::getUnknownLoc());
3304 return CallResult.second;
3307 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3308 SDValue Src, SDValue Size,
3310 const Value *DstSV, uint64_t DstSVOff,
3311 const Value *SrcSV, uint64_t SrcSVOff) {
3313 // Check to see if we should lower the memmove to loads and stores first.
3314 // For cases within the target-specified limits, this is the best choice.
3315 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3317 // Memmove with size zero? Just return the original chain.
3318 if (ConstantSize->isNullValue())
3322 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3323 ConstantSize->getZExtValue(),
3324 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3325 if (Result.getNode())
3329 // Then check to see if we should lower the memmove with target-specific
3330 // code. If the target chooses to do this, this is the next best.
3332 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3333 DstSV, DstSVOff, SrcSV, SrcSVOff);
3334 if (Result.getNode())
3337 // Emit a library call.
3338 TargetLowering::ArgListTy Args;
3339 TargetLowering::ArgListEntry Entry;
3340 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3341 Entry.Node = Dst; Args.push_back(Entry);
3342 Entry.Node = Src; Args.push_back(Entry);
3343 Entry.Node = Size; Args.push_back(Entry);
3344 // FIXME: pass in DebugLoc
3345 std::pair<SDValue,SDValue> CallResult =
3346 TLI.LowerCallTo(Chain, Type::VoidTy,
3347 false, false, false, false, CallingConv::C, false,
3348 getExternalSymbol("memmove", TLI.getPointerTy()),
3349 Args, *this, DebugLoc::getUnknownLoc());
3350 return CallResult.second;
3353 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3354 SDValue Src, SDValue Size,
3356 const Value *DstSV, uint64_t DstSVOff) {
3358 // Check to see if we should lower the memset to stores first.
3359 // For cases within the target-specified limits, this is the best choice.
3360 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3362 // Memset with size zero? Just return the original chain.
3363 if (ConstantSize->isNullValue())
3367 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3368 Align, DstSV, DstSVOff);
3369 if (Result.getNode())
3373 // Then check to see if we should lower the memset with target-specific
3374 // code. If the target chooses to do this, this is the next best.
3376 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3378 if (Result.getNode())
3381 // Emit a library call.
3382 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3383 TargetLowering::ArgListTy Args;
3384 TargetLowering::ArgListEntry Entry;
3385 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3386 Args.push_back(Entry);
3387 // Extend or truncate the argument to be an i32 value for the call.
3388 if (Src.getValueType().bitsGT(MVT::i32))
3389 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3391 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3392 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3393 Args.push_back(Entry);
3394 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3395 Args.push_back(Entry);
3396 // FIXME: pass in DebugLoc
3397 std::pair<SDValue,SDValue> CallResult =
3398 TLI.LowerCallTo(Chain, Type::VoidTy,
3399 false, false, false, false, CallingConv::C, false,
3400 getExternalSymbol("memset", TLI.getPointerTy()),
3401 Args, *this, DebugLoc::getUnknownLoc());
3402 return CallResult.second;
3405 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3407 SDValue Ptr, SDValue Cmp,
3408 SDValue Swp, const Value* PtrVal,
3409 unsigned Alignment) {
3410 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3411 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3413 MVT VT = Cmp.getValueType();
3415 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3416 Alignment = getMVTAlignment(MemVT);
3418 SDVTList VTs = getVTList(VT, MVT::Other);
3419 FoldingSetNodeID ID;
3420 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3421 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3423 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3424 return SDValue(E, 0);
3425 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3426 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3427 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3428 CSEMap.InsertNode(N, IP);
3429 AllNodes.push_back(N);
3430 return SDValue(N, 0);
3433 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3435 SDValue Ptr, SDValue Cmp,
3436 SDValue Swp, const Value* PtrVal,
3437 unsigned Alignment) {
3438 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3439 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3441 MVT VT = Cmp.getValueType();
3443 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3444 Alignment = getMVTAlignment(MemVT);
3446 SDVTList VTs = getVTList(VT, MVT::Other);
3447 FoldingSetNodeID ID;
3448 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3449 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3452 return SDValue(E, 0);
3453 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3454 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3455 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3456 CSEMap.InsertNode(N, IP);
3457 AllNodes.push_back(N);
3458 return SDValue(N, 0);
3461 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3463 SDValue Ptr, SDValue Val,
3464 const Value* PtrVal,
3465 unsigned Alignment) {
3466 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3467 Opcode == ISD::ATOMIC_LOAD_SUB ||
3468 Opcode == ISD::ATOMIC_LOAD_AND ||
3469 Opcode == ISD::ATOMIC_LOAD_OR ||
3470 Opcode == ISD::ATOMIC_LOAD_XOR ||
3471 Opcode == ISD::ATOMIC_LOAD_NAND ||
3472 Opcode == ISD::ATOMIC_LOAD_MIN ||
3473 Opcode == ISD::ATOMIC_LOAD_MAX ||
3474 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3475 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3476 Opcode == ISD::ATOMIC_SWAP) &&
3477 "Invalid Atomic Op");
3479 MVT VT = Val.getValueType();
3481 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3482 Alignment = getMVTAlignment(MemVT);
3484 SDVTList VTs = getVTList(VT, MVT::Other);
3485 FoldingSetNodeID ID;
3486 SDValue Ops[] = {Chain, Ptr, Val};
3487 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3489 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3490 return SDValue(E, 0);
3491 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3492 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3493 Chain, Ptr, Val, PtrVal, Alignment);
3494 CSEMap.InsertNode(N, IP);
3495 AllNodes.push_back(N);
3496 return SDValue(N, 0);
3499 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3501 SDValue Ptr, SDValue Val,
3502 const Value* PtrVal,
3503 unsigned Alignment) {
3504 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3505 Opcode == ISD::ATOMIC_LOAD_SUB ||
3506 Opcode == ISD::ATOMIC_LOAD_AND ||
3507 Opcode == ISD::ATOMIC_LOAD_OR ||
3508 Opcode == ISD::ATOMIC_LOAD_XOR ||
3509 Opcode == ISD::ATOMIC_LOAD_NAND ||
3510 Opcode == ISD::ATOMIC_LOAD_MIN ||
3511 Opcode == ISD::ATOMIC_LOAD_MAX ||
3512 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3513 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3514 Opcode == ISD::ATOMIC_SWAP) &&
3515 "Invalid Atomic Op");
3517 MVT VT = Val.getValueType();
3519 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3520 Alignment = getMVTAlignment(MemVT);
3522 SDVTList VTs = getVTList(VT, MVT::Other);
3523 FoldingSetNodeID ID;
3524 SDValue Ops[] = {Chain, Ptr, Val};
3525 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3528 return SDValue(E, 0);
3529 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3530 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3531 Chain, Ptr, Val, PtrVal, Alignment);
3532 CSEMap.InsertNode(N, IP);
3533 AllNodes.push_back(N);
3534 return SDValue(N, 0);
3537 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3538 /// Allowed to return something different (and simpler) if Simplify is true.
3539 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3543 SmallVector<MVT, 4> VTs;
3544 VTs.reserve(NumOps);
3545 for (unsigned i = 0; i < NumOps; ++i)
3546 VTs.push_back(Ops[i].getValueType());
3547 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3551 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3552 const MVT *VTs, unsigned NumVTs,
3553 const SDValue *Ops, unsigned NumOps,
3554 MVT MemVT, const Value *srcValue, int SVOff,
3555 unsigned Align, bool Vol,
3556 bool ReadMem, bool WriteMem) {
3557 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3558 MemVT, srcValue, SVOff, Align, Vol,
3563 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3564 const MVT *VTs, unsigned NumVTs,
3565 const SDValue *Ops, unsigned NumOps,
3566 MVT MemVT, const Value *srcValue, int SVOff,
3567 unsigned Align, bool Vol,
3568 bool ReadMem, bool WriteMem) {
3569 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3570 MemVT, srcValue, SVOff, Align, Vol,
3575 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3576 const SDValue *Ops, unsigned NumOps,
3577 MVT MemVT, const Value *srcValue, int SVOff,
3578 unsigned Align, bool Vol,
3579 bool ReadMem, bool WriteMem) {
3580 // Memoize the node unless it returns a flag.
3581 MemIntrinsicSDNode *N;
3582 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3583 FoldingSetNodeID ID;
3584 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3586 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3587 return SDValue(E, 0);
3589 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3590 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3591 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3592 CSEMap.InsertNode(N, IP);
3594 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3595 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3596 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3598 AllNodes.push_back(N);
3599 return SDValue(N, 0);
3603 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3604 const SDValue *Ops, unsigned NumOps,
3605 MVT MemVT, const Value *srcValue, int SVOff,
3606 unsigned Align, bool Vol,
3607 bool ReadMem, bool WriteMem) {
3608 // Memoize the node unless it returns a flag.
3609 MemIntrinsicSDNode *N;
3610 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3611 FoldingSetNodeID ID;
3612 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3615 return SDValue(E, 0);
3617 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3618 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3619 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3620 CSEMap.InsertNode(N, IP);
3622 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3623 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3624 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3626 AllNodes.push_back(N);
3627 return SDValue(N, 0);
3631 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3632 bool IsInreg, SDVTList VTs,
3633 const SDValue *Operands, unsigned NumOperands) {
3634 // Do not include isTailCall in the folding set profile.
3635 FoldingSetNodeID ID;
3636 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3637 ID.AddInteger(CallingConv);
3638 ID.AddInteger(IsVarArgs);
3640 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3641 // Instead of including isTailCall in the folding set, we just
3642 // set the flag of the existing node.
3644 cast<CallSDNode>(E)->setNotTailCall();
3645 return SDValue(E, 0);
3647 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3648 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3649 VTs, Operands, NumOperands);
3650 CSEMap.InsertNode(N, IP);
3651 AllNodes.push_back(N);
3652 return SDValue(N, 0);
3656 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3657 bool IsTailCall, bool IsInreg, SDVTList VTs,
3658 const SDValue *Operands, unsigned NumOperands) {
3659 // Do not include isTailCall in the folding set profile.
3660 FoldingSetNodeID ID;
3661 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3662 ID.AddInteger(CallingConv);
3663 ID.AddInteger(IsVarArgs);
3665 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3666 // Instead of including isTailCall in the folding set, we just
3667 // set the flag of the existing node.
3669 cast<CallSDNode>(E)->setNotTailCall();
3670 return SDValue(E, 0);
3672 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3673 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3674 VTs, Operands, NumOperands);
3675 CSEMap.InsertNode(N, IP);
3676 AllNodes.push_back(N);
3677 return SDValue(N, 0);
3681 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3682 MVT VT, SDValue Chain,
3683 SDValue Ptr, SDValue Offset,
3684 const Value *SV, int SVOffset, MVT EVT,
3685 bool isVolatile, unsigned Alignment) {
3686 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3687 Alignment = getMVTAlignment(VT);
3690 ExtType = ISD::NON_EXTLOAD;
3691 } else if (ExtType == ISD::NON_EXTLOAD) {
3692 assert(VT == EVT && "Non-extending load from different memory type!");
3696 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3697 "Invalid vector extload!");
3699 assert(EVT.bitsLT(VT) &&
3700 "Should only be an extending load, not truncating!");
3701 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3702 "Cannot sign/zero extend a FP/Vector load!");
3703 assert(VT.isInteger() == EVT.isInteger() &&
3704 "Cannot convert from FP to Int or Int -> FP!");
3707 bool Indexed = AM != ISD::UNINDEXED;
3708 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3709 "Unindexed load with an offset!");
3711 SDVTList VTs = Indexed ?
3712 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3713 SDValue Ops[] = { Chain, Ptr, Offset };
3714 FoldingSetNodeID ID;
3715 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3717 ID.AddInteger(ExtType);
3718 ID.AddInteger(EVT.getRawBits());
3719 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3722 return SDValue(E, 0);
3723 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3724 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3725 Alignment, isVolatile);
3726 CSEMap.InsertNode(N, IP);
3727 AllNodes.push_back(N);
3728 return SDValue(N, 0);
3732 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3733 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3734 SDValue Ptr, SDValue Offset,
3735 const Value *SV, int SVOffset, MVT EVT,
3736 bool isVolatile, unsigned Alignment) {
3737 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3738 Alignment = getMVTAlignment(VT);
3741 ExtType = ISD::NON_EXTLOAD;
3742 } else if (ExtType == ISD::NON_EXTLOAD) {
3743 assert(VT == EVT && "Non-extending load from different memory type!");
3747 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3748 "Invalid vector extload!");
3750 assert(EVT.bitsLT(VT) &&
3751 "Should only be an extending load, not truncating!");
3752 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3753 "Cannot sign/zero extend a FP/Vector load!");
3754 assert(VT.isInteger() == EVT.isInteger() &&
3755 "Cannot convert from FP to Int or Int -> FP!");
3758 bool Indexed = AM != ISD::UNINDEXED;
3759 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3760 "Unindexed load with an offset!");
3762 SDVTList VTs = Indexed ?
3763 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3764 SDValue Ops[] = { Chain, Ptr, Offset };
3765 FoldingSetNodeID ID;
3766 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3768 ID.AddInteger(ExtType);
3769 ID.AddInteger(EVT.getRawBits());
3770 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3772 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3773 return SDValue(E, 0);
3774 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3775 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3776 Alignment, isVolatile);
3777 CSEMap.InsertNode(N, IP);
3778 AllNodes.push_back(N);
3779 return SDValue(N, 0);
3782 SDValue SelectionDAG::getLoad(MVT VT,
3783 SDValue Chain, SDValue Ptr,
3784 const Value *SV, int SVOffset,
3785 bool isVolatile, unsigned Alignment) {
3786 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3787 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3788 SV, SVOffset, VT, isVolatile, Alignment);
3791 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3792 SDValue Chain, SDValue Ptr,
3793 const Value *SV, int SVOffset,
3794 bool isVolatile, unsigned Alignment) {
3795 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3796 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3797 SV, SVOffset, VT, isVolatile, Alignment);
3800 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3801 SDValue Chain, SDValue Ptr,
3803 int SVOffset, MVT EVT,
3804 bool isVolatile, unsigned Alignment) {
3805 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3806 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3807 SV, SVOffset, EVT, isVolatile, Alignment);
3810 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3811 SDValue Chain, SDValue Ptr,
3813 int SVOffset, MVT EVT,
3814 bool isVolatile, unsigned Alignment) {
3815 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3816 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3817 SV, SVOffset, EVT, isVolatile, Alignment);
3821 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3822 SDValue Offset, ISD::MemIndexedMode AM) {
3823 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3824 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3825 "Load is already a indexed load!");
3826 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3827 LD->getChain(), Base, Offset, LD->getSrcValue(),
3828 LD->getSrcValueOffset(), LD->getMemoryVT(),
3829 LD->isVolatile(), LD->getAlignment());
3833 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3834 SDValue Offset, ISD::MemIndexedMode AM) {
3835 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3836 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3837 "Load is already a indexed load!");
3838 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3839 LD->getChain(), Base, Offset, LD->getSrcValue(),
3840 LD->getSrcValueOffset(), LD->getMemoryVT(),
3841 LD->isVolatile(), LD->getAlignment());
3844 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3845 SDValue Ptr, const Value *SV, int SVOffset,
3846 bool isVolatile, unsigned Alignment) {
3847 MVT VT = Val.getValueType();
3849 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3850 Alignment = getMVTAlignment(VT);
3852 SDVTList VTs = getVTList(MVT::Other);
3853 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3854 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3855 FoldingSetNodeID ID;
3856 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3857 ID.AddInteger(ISD::UNINDEXED);
3858 ID.AddInteger(false);
3859 ID.AddInteger(VT.getRawBits());
3860 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3862 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3863 return SDValue(E, 0);
3864 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3865 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3866 VT, SV, SVOffset, Alignment, isVolatile);
3867 CSEMap.InsertNode(N, IP);
3868 AllNodes.push_back(N);
3869 return SDValue(N, 0);
3872 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3873 SDValue Ptr, const Value *SV, int SVOffset,
3874 bool isVolatile, unsigned Alignment) {
3875 MVT VT = Val.getValueType();
3877 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3878 Alignment = getMVTAlignment(VT);
3880 SDVTList VTs = getVTList(MVT::Other);
3881 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3882 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3883 FoldingSetNodeID ID;
3884 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3885 ID.AddInteger(ISD::UNINDEXED);
3886 ID.AddInteger(false);
3887 ID.AddInteger(VT.getRawBits());
3888 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3890 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3891 return SDValue(E, 0);
3892 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3893 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3894 VT, SV, SVOffset, Alignment, isVolatile);
3895 CSEMap.InsertNode(N, IP);
3896 AllNodes.push_back(N);
3897 return SDValue(N, 0);
3900 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3901 SDValue Ptr, const Value *SV,
3902 int SVOffset, MVT SVT,
3903 bool isVolatile, unsigned Alignment) {
3904 MVT VT = Val.getValueType();
3907 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3909 assert(VT.bitsGT(SVT) && "Not a truncation?");
3910 assert(VT.isInteger() == SVT.isInteger() &&
3911 "Can't do FP-INT conversion!");
3913 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3914 Alignment = getMVTAlignment(VT);
3916 SDVTList VTs = getVTList(MVT::Other);
3917 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3918 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3919 FoldingSetNodeID ID;
3920 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3921 ID.AddInteger(ISD::UNINDEXED);
3923 ID.AddInteger(SVT.getRawBits());
3924 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3926 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3927 return SDValue(E, 0);
3928 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3929 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3930 SVT, SV, SVOffset, Alignment, isVolatile);
3931 CSEMap.InsertNode(N, IP);
3932 AllNodes.push_back(N);
3933 return SDValue(N, 0);
3936 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3937 SDValue Ptr, const Value *SV,
3938 int SVOffset, MVT SVT,
3939 bool isVolatile, unsigned Alignment) {
3940 MVT VT = Val.getValueType();
3943 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3945 assert(VT.bitsGT(SVT) && "Not a truncation?");
3946 assert(VT.isInteger() == SVT.isInteger() &&
3947 "Can't do FP-INT conversion!");
3949 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3950 Alignment = getMVTAlignment(VT);
3952 SDVTList VTs = getVTList(MVT::Other);
3953 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3954 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3955 FoldingSetNodeID ID;
3956 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3957 ID.AddInteger(ISD::UNINDEXED);
3959 ID.AddInteger(SVT.getRawBits());
3960 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3962 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3963 return SDValue(E, 0);
3964 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3965 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3966 SVT, SV, SVOffset, Alignment, isVolatile);
3967 CSEMap.InsertNode(N, IP);
3968 AllNodes.push_back(N);
3969 return SDValue(N, 0);
3973 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3974 SDValue Offset, ISD::MemIndexedMode AM) {
3975 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3976 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3977 "Store is already a indexed store!");
3978 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3979 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3980 FoldingSetNodeID ID;
3981 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3983 ID.AddInteger(ST->isTruncatingStore());
3984 ID.AddInteger(ST->getMemoryVT().getRawBits());
3985 ID.AddInteger(ST->getRawFlags());
3987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3988 return SDValue(E, 0);
3989 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3990 new (N) StoreSDNode(Ops, VTs, AM,
3991 ST->isTruncatingStore(), ST->getMemoryVT(),
3992 ST->getSrcValue(), ST->getSrcValueOffset(),
3993 ST->getAlignment(), ST->isVolatile());
3994 CSEMap.InsertNode(N, IP);
3995 AllNodes.push_back(N);
3996 return SDValue(N, 0);
4000 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4001 SDValue Offset, ISD::MemIndexedMode AM) {
4002 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4003 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4004 "Store is already a indexed store!");
4005 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4006 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4007 FoldingSetNodeID ID;
4008 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4010 ID.AddInteger(ST->isTruncatingStore());
4011 ID.AddInteger(ST->getMemoryVT().getRawBits());
4012 ID.AddInteger(ST->getRawFlags());
4014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4015 return SDValue(E, 0);
4016 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4017 new (N) StoreSDNode(Ops, dl, VTs, AM,
4018 ST->isTruncatingStore(), ST->getMemoryVT(),
4019 ST->getSrcValue(), ST->getSrcValueOffset(),
4020 ST->getAlignment(), ST->isVolatile());
4021 CSEMap.InsertNode(N, IP);
4022 AllNodes.push_back(N);
4023 return SDValue(N, 0);
4026 SDValue SelectionDAG::getVAArg(MVT VT,
4027 SDValue Chain, SDValue Ptr,
4029 SDValue Ops[] = { Chain, Ptr, SV };
4030 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
4033 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4034 const SDUse *Ops, unsigned NumOps) {
4035 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4038 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4039 const SDUse *Ops, unsigned NumOps) {
4041 case 0: return getNode(Opcode, DL, VT);
4042 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4043 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4044 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4048 // Copy from an SDUse array into an SDValue array for use with
4049 // the regular getNode logic.
4050 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4051 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4054 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4055 const SDValue *Ops, unsigned NumOps) {
4056 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4059 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4060 const SDValue *Ops, unsigned NumOps) {
4062 case 0: return getNode(Opcode, DL, VT);
4063 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4064 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4065 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4071 case ISD::SELECT_CC: {
4072 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4073 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4074 "LHS and RHS of condition must have same type!");
4075 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4076 "True and False arms of SelectCC must have same type!");
4077 assert(Ops[2].getValueType() == VT &&
4078 "select_cc node must be of same type as true and false value!");
4082 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4083 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4084 "LHS/RHS of comparison should match types!");
4091 SDVTList VTs = getVTList(VT);
4093 if (VT != MVT::Flag) {
4094 FoldingSetNodeID ID;
4095 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4099 return SDValue(E, 0);
4101 N = NodeAllocator.Allocate<SDNode>();
4102 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4103 CSEMap.InsertNode(N, IP);
4105 N = NodeAllocator.Allocate<SDNode>();
4106 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4109 AllNodes.push_back(N);
4113 return SDValue(N, 0);
4116 SDValue SelectionDAG::getNode(unsigned Opcode,
4117 const std::vector<MVT> &ResultTys,
4118 const SDValue *Ops, unsigned NumOps) {
4119 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
4122 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4123 const std::vector<MVT> &ResultTys,
4124 const SDValue *Ops, unsigned NumOps) {
4125 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
4129 SDValue SelectionDAG::getNode(unsigned Opcode,
4130 const MVT *VTs, unsigned NumVTs,
4131 const SDValue *Ops, unsigned NumOps) {
4132 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
4135 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4136 const MVT *VTs, unsigned NumVTs,
4137 const SDValue *Ops, unsigned NumOps) {
4139 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4140 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4143 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4144 const SDValue *Ops, unsigned NumOps) {
4145 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
4148 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4149 const SDValue *Ops, unsigned NumOps) {
4150 if (VTList.NumVTs == 1)
4151 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4154 // FIXME: figure out how to safely handle things like
4155 // int foo(int x) { return 1 << (x & 255); }
4156 // int bar() { return foo(256); }
4158 case ISD::SRA_PARTS:
4159 case ISD::SRL_PARTS:
4160 case ISD::SHL_PARTS:
4161 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4162 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4163 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4164 else if (N3.getOpcode() == ISD::AND)
4165 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4166 // If the and is only masking out bits that cannot effect the shift,
4167 // eliminate the and.
4168 unsigned NumBits = VT.getSizeInBits()*2;
4169 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4170 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4176 // Memoize the node unless it returns a flag.
4178 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4179 FoldingSetNodeID ID;
4180 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4182 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4183 return SDValue(E, 0);
4185 N = NodeAllocator.Allocate<UnarySDNode>();
4186 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4187 } else if (NumOps == 2) {
4188 N = NodeAllocator.Allocate<BinarySDNode>();
4189 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4190 } else if (NumOps == 3) {
4191 N = NodeAllocator.Allocate<TernarySDNode>();
4192 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4194 N = NodeAllocator.Allocate<SDNode>();
4195 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4197 CSEMap.InsertNode(N, IP);
4200 N = NodeAllocator.Allocate<UnarySDNode>();
4201 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4202 } else if (NumOps == 2) {
4203 N = NodeAllocator.Allocate<BinarySDNode>();
4204 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4205 } else if (NumOps == 3) {
4206 N = NodeAllocator.Allocate<TernarySDNode>();
4207 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4209 N = NodeAllocator.Allocate<SDNode>();
4210 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4213 AllNodes.push_back(N);
4217 return SDValue(N, 0);
4220 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
4221 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList);
4224 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4225 return getNode(Opcode, DL, VTList, 0, 0);
4228 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4230 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1);
4233 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4235 SDValue Ops[] = { N1 };
4236 return getNode(Opcode, DL, VTList, Ops, 1);
4239 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4240 SDValue N1, SDValue N2) {
4241 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2);
4244 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4245 SDValue N1, SDValue N2) {
4246 SDValue Ops[] = { N1, N2 };
4247 return getNode(Opcode, DL, VTList, Ops, 2);
4250 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4251 SDValue N1, SDValue N2, SDValue N3) {
4252 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3);
4255 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4256 SDValue N1, SDValue N2, SDValue N3) {
4257 SDValue Ops[] = { N1, N2, N3 };
4258 return getNode(Opcode, DL, VTList, Ops, 3);
4261 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4262 SDValue N1, SDValue N2, SDValue N3,
4264 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4);
4267 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4268 SDValue N1, SDValue N2, SDValue N3,
4270 SDValue Ops[] = { N1, N2, N3, N4 };
4271 return getNode(Opcode, DL, VTList, Ops, 4);
4274 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4275 SDValue N1, SDValue N2, SDValue N3,
4276 SDValue N4, SDValue N5) {
4277 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5);
4280 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4281 SDValue N1, SDValue N2, SDValue N3,
4282 SDValue N4, SDValue N5) {
4283 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4284 return getNode(Opcode, DL, VTList, Ops, 5);
4287 SDVTList SelectionDAG::getVTList(MVT VT) {
4288 return makeVTList(SDNode::getValueTypeList(VT), 1);
4291 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4292 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4293 E = VTList.rend(); I != E; ++I)
4294 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4297 MVT *Array = Allocator.Allocate<MVT>(2);
4300 SDVTList Result = makeVTList(Array, 2);
4301 VTList.push_back(Result);
4305 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4306 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4307 E = VTList.rend(); I != E; ++I)
4308 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4312 MVT *Array = Allocator.Allocate<MVT>(3);
4316 SDVTList Result = makeVTList(Array, 3);
4317 VTList.push_back(Result);
4321 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4322 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4323 E = VTList.rend(); I != E; ++I)
4324 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4325 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4328 MVT *Array = Allocator.Allocate<MVT>(3);
4333 SDVTList Result = makeVTList(Array, 4);
4334 VTList.push_back(Result);
4338 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4340 case 0: assert(0 && "Cannot have nodes without results!");
4341 case 1: return getVTList(VTs[0]);
4342 case 2: return getVTList(VTs[0], VTs[1]);
4343 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4347 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4348 E = VTList.rend(); I != E; ++I) {
4349 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4352 bool NoMatch = false;
4353 for (unsigned i = 2; i != NumVTs; ++i)
4354 if (VTs[i] != I->VTs[i]) {
4362 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4363 std::copy(VTs, VTs+NumVTs, Array);
4364 SDVTList Result = makeVTList(Array, NumVTs);
4365 VTList.push_back(Result);
4370 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4371 /// specified operands. If the resultant node already exists in the DAG,
4372 /// this does not modify the specified node, instead it returns the node that
4373 /// already exists. If the resultant node does not exist in the DAG, the
4374 /// input node is returned. As a degenerate case, if you specify the same
4375 /// input operands as the node already has, the input node is returned.
4376 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4377 SDNode *N = InN.getNode();
4378 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4380 // Check to see if there is no change.
4381 if (Op == N->getOperand(0)) return InN;
4383 // See if the modified node already exists.
4384 void *InsertPos = 0;
4385 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4386 return SDValue(Existing, InN.getResNo());
4388 // Nope it doesn't. Remove the node from its current place in the maps.
4390 if (!RemoveNodeFromCSEMaps(N))
4393 // Now we update the operands.
4394 N->OperandList[0].set(Op);
4396 // If this gets put into a CSE map, add it.
4397 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4401 SDValue SelectionDAG::
4402 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4403 SDNode *N = InN.getNode();
4404 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4406 // Check to see if there is no change.
4407 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4408 return InN; // No operands changed, just return the input node.
4410 // See if the modified node already exists.
4411 void *InsertPos = 0;
4412 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4413 return SDValue(Existing, InN.getResNo());
4415 // Nope it doesn't. Remove the node from its current place in the maps.
4417 if (!RemoveNodeFromCSEMaps(N))
4420 // Now we update the operands.
4421 if (N->OperandList[0] != Op1)
4422 N->OperandList[0].set(Op1);
4423 if (N->OperandList[1] != Op2)
4424 N->OperandList[1].set(Op2);
4426 // If this gets put into a CSE map, add it.
4427 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4431 SDValue SelectionDAG::
4432 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4433 SDValue Ops[] = { Op1, Op2, Op3 };
4434 return UpdateNodeOperands(N, Ops, 3);
4437 SDValue SelectionDAG::
4438 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4439 SDValue Op3, SDValue Op4) {
4440 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4441 return UpdateNodeOperands(N, Ops, 4);
4444 SDValue SelectionDAG::
4445 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4446 SDValue Op3, SDValue Op4, SDValue Op5) {
4447 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4448 return UpdateNodeOperands(N, Ops, 5);
4451 SDValue SelectionDAG::
4452 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4453 SDNode *N = InN.getNode();
4454 assert(N->getNumOperands() == NumOps &&
4455 "Update with wrong number of operands");
4457 // Check to see if there is no change.
4458 bool AnyChange = false;
4459 for (unsigned i = 0; i != NumOps; ++i) {
4460 if (Ops[i] != N->getOperand(i)) {
4466 // No operands changed, just return the input node.
4467 if (!AnyChange) return InN;
4469 // See if the modified node already exists.
4470 void *InsertPos = 0;
4471 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4472 return SDValue(Existing, InN.getResNo());
4474 // Nope it doesn't. Remove the node from its current place in the maps.
4476 if (!RemoveNodeFromCSEMaps(N))
4479 // Now we update the operands.
4480 for (unsigned i = 0; i != NumOps; ++i)
4481 if (N->OperandList[i] != Ops[i])
4482 N->OperandList[i].set(Ops[i]);
4484 // If this gets put into a CSE map, add it.
4485 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4489 /// DropOperands - Release the operands and set this node to have
4491 void SDNode::DropOperands() {
4492 // Unlike the code in MorphNodeTo that does this, we don't need to
4493 // watch for dead nodes here.
4494 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4500 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4503 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4505 SDVTList VTs = getVTList(VT);
4506 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4509 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4510 MVT VT, SDValue Op1) {
4511 SDVTList VTs = getVTList(VT);
4512 SDValue Ops[] = { Op1 };
4513 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4516 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4517 MVT VT, SDValue Op1,
4519 SDVTList VTs = getVTList(VT);
4520 SDValue Ops[] = { Op1, Op2 };
4521 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4524 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4525 MVT VT, SDValue Op1,
4526 SDValue Op2, SDValue Op3) {
4527 SDVTList VTs = getVTList(VT);
4528 SDValue Ops[] = { Op1, Op2, Op3 };
4529 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4532 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4533 MVT VT, const SDValue *Ops,
4535 SDVTList VTs = getVTList(VT);
4536 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4539 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4540 MVT VT1, MVT VT2, const SDValue *Ops,
4542 SDVTList VTs = getVTList(VT1, VT2);
4543 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4546 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4548 SDVTList VTs = getVTList(VT1, VT2);
4549 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4552 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4553 MVT VT1, MVT VT2, MVT VT3,
4554 const SDValue *Ops, unsigned NumOps) {
4555 SDVTList VTs = getVTList(VT1, VT2, VT3);
4556 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4559 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4560 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4561 const SDValue *Ops, unsigned NumOps) {
4562 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4563 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4566 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4569 SDVTList VTs = getVTList(VT1, VT2);
4570 SDValue Ops[] = { Op1 };
4571 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4574 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4576 SDValue Op1, SDValue Op2) {
4577 SDVTList VTs = getVTList(VT1, VT2);
4578 SDValue Ops[] = { Op1, Op2 };
4579 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4582 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4584 SDValue Op1, SDValue Op2,
4586 SDVTList VTs = getVTList(VT1, VT2);
4587 SDValue Ops[] = { Op1, Op2, Op3 };
4588 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4591 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4592 MVT VT1, MVT VT2, MVT VT3,
4593 SDValue Op1, SDValue Op2,
4595 SDVTList VTs = getVTList(VT1, VT2, VT3);
4596 SDValue Ops[] = { Op1, Op2, Op3 };
4597 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4600 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4601 SDVTList VTs, const SDValue *Ops,
4603 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4606 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4608 SDVTList VTs = getVTList(VT);
4609 return MorphNodeTo(N, Opc, VTs, 0, 0);
4612 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4613 MVT VT, SDValue Op1) {
4614 SDVTList VTs = getVTList(VT);
4615 SDValue Ops[] = { Op1 };
4616 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4619 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4620 MVT VT, SDValue Op1,
4622 SDVTList VTs = getVTList(VT);
4623 SDValue Ops[] = { Op1, Op2 };
4624 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4627 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4628 MVT VT, SDValue Op1,
4629 SDValue Op2, SDValue Op3) {
4630 SDVTList VTs = getVTList(VT);
4631 SDValue Ops[] = { Op1, Op2, Op3 };
4632 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4635 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4636 MVT VT, const SDValue *Ops,
4638 SDVTList VTs = getVTList(VT);
4639 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4642 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4643 MVT VT1, MVT VT2, const SDValue *Ops,
4645 SDVTList VTs = getVTList(VT1, VT2);
4646 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4649 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4651 SDVTList VTs = getVTList(VT1, VT2);
4652 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4655 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4656 MVT VT1, MVT VT2, MVT VT3,
4657 const SDValue *Ops, unsigned NumOps) {
4658 SDVTList VTs = getVTList(VT1, VT2, VT3);
4659 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4662 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4665 SDVTList VTs = getVTList(VT1, VT2);
4666 SDValue Ops[] = { Op1 };
4667 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4670 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4672 SDValue Op1, SDValue Op2) {
4673 SDVTList VTs = getVTList(VT1, VT2);
4674 SDValue Ops[] = { Op1, Op2 };
4675 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4678 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4680 SDValue Op1, SDValue Op2,
4682 SDVTList VTs = getVTList(VT1, VT2);
4683 SDValue Ops[] = { Op1, Op2, Op3 };
4684 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4687 /// MorphNodeTo - These *mutate* the specified node to have the specified
4688 /// return type, opcode, and operands.
4690 /// Note that MorphNodeTo returns the resultant node. If there is already a
4691 /// node of the specified opcode and operands, it returns that node instead of
4692 /// the current one.
4694 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4695 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4696 /// node, and because it doesn't require CSE recalculation for any of
4697 /// the node's users.
4699 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4700 SDVTList VTs, const SDValue *Ops,
4702 // If an identical node already exists, use it.
4704 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4705 FoldingSetNodeID ID;
4706 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4707 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4711 if (!RemoveNodeFromCSEMaps(N))
4714 // Start the morphing.
4716 N->ValueList = VTs.VTs;
4717 N->NumValues = VTs.NumVTs;
4719 // Clear the operands list, updating used nodes to remove this from their
4720 // use list. Keep track of any operands that become dead as a result.
4721 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4722 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4724 SDNode *Used = Use.getNode();
4726 if (Used->use_empty())
4727 DeadNodeSet.insert(Used);
4730 // If NumOps is larger than the # of operands we currently have, reallocate
4731 // the operand list.
4732 if (NumOps > N->NumOperands) {
4733 if (N->OperandsNeedDelete)
4734 delete[] N->OperandList;
4736 if (N->isMachineOpcode()) {
4737 // We're creating a final node that will live unmorphed for the
4738 // remainder of the current SelectionDAG iteration, so we can allocate
4739 // the operands directly out of a pool with no recycling metadata.
4740 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4741 N->OperandsNeedDelete = false;
4743 N->OperandList = new SDUse[NumOps];
4744 N->OperandsNeedDelete = true;
4748 // Assign the new operands.
4749 N->NumOperands = NumOps;
4750 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4751 N->OperandList[i].setUser(N);
4752 N->OperandList[i].setInitial(Ops[i]);
4755 // Delete any nodes that are still dead after adding the uses for the
4757 SmallVector<SDNode *, 16> DeadNodes;
4758 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4759 E = DeadNodeSet.end(); I != E; ++I)
4760 if ((*I)->use_empty())
4761 DeadNodes.push_back(*I);
4762 RemoveDeadNodes(DeadNodes);
4765 CSEMap.InsertNode(N, IP); // Memoize the new node.
4770 /// getTargetNode - These are used for target selectors to create a new node
4771 /// with specified return type(s), target opcode, and operands.
4773 /// Note that getTargetNode returns the resultant node. If there is already a
4774 /// node of the specified opcode and operands, it returns that node instead of
4775 /// the current one.
4776 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4777 return getNode(~Opcode, VT).getNode();
4779 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4780 return getNode(~Opcode, dl, VT).getNode();
4783 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4784 return getNode(~Opcode, VT, Op1).getNode();
4786 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4788 return getNode(~Opcode, dl, VT, Op1).getNode();
4791 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4792 SDValue Op1, SDValue Op2) {
4793 return getNode(~Opcode, VT, Op1, Op2).getNode();
4795 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4796 SDValue Op1, SDValue Op2) {
4797 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4800 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4801 SDValue Op1, SDValue Op2,
4803 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4805 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4806 SDValue Op1, SDValue Op2,
4808 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4811 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4812 const SDValue *Ops, unsigned NumOps) {
4813 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4815 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4816 const SDValue *Ops, unsigned NumOps) {
4817 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4820 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4821 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4823 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4825 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4827 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4829 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4832 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4833 MVT VT2, SDValue Op1) {
4834 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4835 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4837 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4838 MVT VT2, SDValue Op1) {
4839 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4840 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4843 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4844 MVT VT2, SDValue Op1,
4846 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4847 SDValue Ops[] = { Op1, Op2 };
4848 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4850 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4851 MVT VT2, SDValue Op1,
4853 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4854 SDValue Ops[] = { Op1, Op2 };
4855 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4858 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4859 MVT VT2, SDValue Op1,
4860 SDValue Op2, SDValue Op3) {
4861 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4862 SDValue Ops[] = { Op1, Op2, Op3 };
4863 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4865 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4866 MVT VT2, SDValue Op1,
4867 SDValue Op2, SDValue Op3) {
4868 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4869 SDValue Ops[] = { Op1, Op2, Op3 };
4870 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4873 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4874 const SDValue *Ops, unsigned NumOps) {
4875 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4876 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4878 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4880 const SDValue *Ops, unsigned NumOps) {
4881 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4882 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4885 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4886 SDValue Op1, SDValue Op2) {
4887 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4888 SDValue Ops[] = { Op1, Op2 };
4889 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4891 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4892 MVT VT1, MVT VT2, MVT VT3,
4893 SDValue Op1, SDValue Op2) {
4894 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4895 SDValue Ops[] = { Op1, Op2 };
4896 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4899 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4900 SDValue Op1, SDValue Op2,
4902 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4903 SDValue Ops[] = { Op1, Op2, Op3 };
4904 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4906 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4907 MVT VT1, MVT VT2, MVT VT3,
4908 SDValue Op1, SDValue Op2,
4910 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4911 SDValue Ops[] = { Op1, Op2, Op3 };
4912 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4915 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4916 const SDValue *Ops, unsigned NumOps) {
4917 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4918 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4920 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4921 MVT VT1, MVT VT2, MVT VT3,
4922 const SDValue *Ops, unsigned NumOps) {
4923 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4924 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4927 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4928 MVT VT2, MVT VT3, MVT VT4,
4929 const SDValue *Ops, unsigned NumOps) {
4930 std::vector<MVT> VTList;
4931 VTList.push_back(VT1);
4932 VTList.push_back(VT2);
4933 VTList.push_back(VT3);
4934 VTList.push_back(VT4);
4935 const MVT *VTs = getNodeValueTypes(VTList);
4936 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4938 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4939 MVT VT2, MVT VT3, MVT VT4,
4940 const SDValue *Ops, unsigned NumOps) {
4941 std::vector<MVT> VTList;
4942 VTList.push_back(VT1);
4943 VTList.push_back(VT2);
4944 VTList.push_back(VT3);
4945 VTList.push_back(VT4);
4946 const MVT *VTs = getNodeValueTypes(VTList);
4947 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4950 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4951 const std::vector<MVT> &ResultTys,
4952 const SDValue *Ops, unsigned NumOps) {
4953 const MVT *VTs = getNodeValueTypes(ResultTys);
4954 return getNode(~Opcode, VTs, ResultTys.size(),
4955 Ops, NumOps).getNode();
4957 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4958 const std::vector<MVT> &ResultTys,
4959 const SDValue *Ops, unsigned NumOps) {
4960 const MVT *VTs = getNodeValueTypes(ResultTys);
4961 return getNode(~Opcode, dl, VTs, ResultTys.size(),
4962 Ops, NumOps).getNode();
4965 /// getNodeIfExists - Get the specified node if it's already available, or
4966 /// else return NULL.
4967 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4968 const SDValue *Ops, unsigned NumOps) {
4969 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4970 FoldingSetNodeID ID;
4971 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4973 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4979 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4980 /// This can cause recursive merging of nodes in the DAG.
4982 /// This version assumes From has a single result value.
4984 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4985 DAGUpdateListener *UpdateListener) {
4986 SDNode *From = FromN.getNode();
4987 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4988 "Cannot replace with this method!");
4989 assert(From != To.getNode() && "Cannot replace uses of with self");
4991 // Iterate over all the existing uses of From. New uses will be added
4992 // to the beginning of the use list, which we avoid visiting.
4993 // This specifically avoids visiting uses of From that arise while the
4994 // replacement is happening, because any such uses would be the result
4995 // of CSE: If an existing node looks like From after one of its operands
4996 // is replaced by To, we don't want to replace of all its users with To
4997 // too. See PR3018 for more info.
4998 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5002 // This node is about to morph, remove its old self from the CSE maps.
5003 RemoveNodeFromCSEMaps(User);
5005 // A user can appear in a use list multiple times, and when this
5006 // happens the uses are usually next to each other in the list.
5007 // To help reduce the number of CSE recomputations, process all
5008 // the uses of this user that we can find this way.
5010 SDUse &Use = UI.getUse();
5013 } while (UI != UE && *UI == User);
5015 // Now that we have modified User, add it back to the CSE maps. If it
5016 // already exists there, recursively merge the results together.
5017 AddModifiedNodeToCSEMaps(User, UpdateListener);
5021 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5022 /// This can cause recursive merging of nodes in the DAG.
5024 /// This version assumes From/To have matching types and numbers of result
5027 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5028 DAGUpdateListener *UpdateListener) {
5029 assert(From->getVTList().VTs == To->getVTList().VTs &&
5030 From->getNumValues() == To->getNumValues() &&
5031 "Cannot use this version of ReplaceAllUsesWith!");
5033 // Handle the trivial case.
5037 // Iterate over just the existing users of From. See the comments in
5038 // the ReplaceAllUsesWith above.
5039 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5043 // This node is about to morph, remove its old self from the CSE maps.
5044 RemoveNodeFromCSEMaps(User);
5046 // A user can appear in a use list multiple times, and when this
5047 // happens the uses are usually next to each other in the list.
5048 // To help reduce the number of CSE recomputations, process all
5049 // the uses of this user that we can find this way.
5051 SDUse &Use = UI.getUse();
5054 } while (UI != UE && *UI == User);
5056 // Now that we have modified User, add it back to the CSE maps. If it
5057 // already exists there, recursively merge the results together.
5058 AddModifiedNodeToCSEMaps(User, UpdateListener);
5062 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5063 /// This can cause recursive merging of nodes in the DAG.
5065 /// This version can replace From with any result values. To must match the
5066 /// number and types of values returned by From.
5067 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5069 DAGUpdateListener *UpdateListener) {
5070 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5071 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5073 // Iterate over just the existing users of From. See the comments in
5074 // the ReplaceAllUsesWith above.
5075 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5079 // This node is about to morph, remove its old self from the CSE maps.
5080 RemoveNodeFromCSEMaps(User);
5082 // A user can appear in a use list multiple times, and when this
5083 // happens the uses are usually next to each other in the list.
5084 // To help reduce the number of CSE recomputations, process all
5085 // the uses of this user that we can find this way.
5087 SDUse &Use = UI.getUse();
5088 const SDValue &ToOp = To[Use.getResNo()];
5091 } while (UI != UE && *UI == User);
5093 // Now that we have modified User, add it back to the CSE maps. If it
5094 // already exists there, recursively merge the results together.
5095 AddModifiedNodeToCSEMaps(User, UpdateListener);
5099 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5100 /// uses of other values produced by From.getNode() alone. The Deleted
5101 /// vector is handled the same way as for ReplaceAllUsesWith.
5102 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5103 DAGUpdateListener *UpdateListener){
5104 // Handle the really simple, really trivial case efficiently.
5105 if (From == To) return;
5107 // Handle the simple, trivial, case efficiently.
5108 if (From.getNode()->getNumValues() == 1) {
5109 ReplaceAllUsesWith(From, To, UpdateListener);
5113 // Iterate over just the existing users of From. See the comments in
5114 // the ReplaceAllUsesWith above.
5115 SDNode::use_iterator UI = From.getNode()->use_begin(),
5116 UE = From.getNode()->use_end();
5119 bool UserRemovedFromCSEMaps = false;
5121 // A user can appear in a use list multiple times, and when this
5122 // happens the uses are usually next to each other in the list.
5123 // To help reduce the number of CSE recomputations, process all
5124 // the uses of this user that we can find this way.
5126 SDUse &Use = UI.getUse();
5128 // Skip uses of different values from the same node.
5129 if (Use.getResNo() != From.getResNo()) {
5134 // If this node hasn't been modified yet, it's still in the CSE maps,
5135 // so remove its old self from the CSE maps.
5136 if (!UserRemovedFromCSEMaps) {
5137 RemoveNodeFromCSEMaps(User);
5138 UserRemovedFromCSEMaps = true;
5143 } while (UI != UE && *UI == User);
5145 // We are iterating over all uses of the From node, so if a use
5146 // doesn't use the specific value, no changes are made.
5147 if (!UserRemovedFromCSEMaps)
5150 // Now that we have modified User, add it back to the CSE maps. If it
5151 // already exists there, recursively merge the results together.
5152 AddModifiedNodeToCSEMaps(User, UpdateListener);
5157 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5158 /// to record information about a use.
5165 /// operator< - Sort Memos by User.
5166 bool operator<(const UseMemo &L, const UseMemo &R) {
5167 return (intptr_t)L.User < (intptr_t)R.User;
5171 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5172 /// uses of other values produced by From.getNode() alone. The same value
5173 /// may appear in both the From and To list. The Deleted vector is
5174 /// handled the same way as for ReplaceAllUsesWith.
5175 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5178 DAGUpdateListener *UpdateListener){
5179 // Handle the simple, trivial case efficiently.
5181 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5183 // Read up all the uses and make records of them. This helps
5184 // processing new uses that are introduced during the
5185 // replacement process.
5186 SmallVector<UseMemo, 4> Uses;
5187 for (unsigned i = 0; i != Num; ++i) {
5188 unsigned FromResNo = From[i].getResNo();
5189 SDNode *FromNode = From[i].getNode();
5190 for (SDNode::use_iterator UI = FromNode->use_begin(),
5191 E = FromNode->use_end(); UI != E; ++UI) {
5192 SDUse &Use = UI.getUse();
5193 if (Use.getResNo() == FromResNo) {
5194 UseMemo Memo = { *UI, i, &Use };
5195 Uses.push_back(Memo);
5200 // Sort the uses, so that all the uses from a given User are together.
5201 std::sort(Uses.begin(), Uses.end());
5203 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5204 UseIndex != UseIndexEnd; ) {
5205 // We know that this user uses some value of From. If it is the right
5206 // value, update it.
5207 SDNode *User = Uses[UseIndex].User;
5209 // This node is about to morph, remove its old self from the CSE maps.
5210 RemoveNodeFromCSEMaps(User);
5212 // The Uses array is sorted, so all the uses for a given User
5213 // are next to each other in the list.
5214 // To help reduce the number of CSE recomputations, process all
5215 // the uses of this user that we can find this way.
5217 unsigned i = Uses[UseIndex].Index;
5218 SDUse &Use = *Uses[UseIndex].Use;
5222 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5224 // Now that we have modified User, add it back to the CSE maps. If it
5225 // already exists there, recursively merge the results together.
5226 AddModifiedNodeToCSEMaps(User, UpdateListener);
5230 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5231 /// based on their topological order. It returns the maximum id and a vector
5232 /// of the SDNodes* in assigned order by reference.
5233 unsigned SelectionDAG::AssignTopologicalOrder() {
5235 unsigned DAGSize = 0;
5237 // SortedPos tracks the progress of the algorithm. Nodes before it are
5238 // sorted, nodes after it are unsorted. When the algorithm completes
5239 // it is at the end of the list.
5240 allnodes_iterator SortedPos = allnodes_begin();
5242 // Visit all the nodes. Move nodes with no operands to the front of
5243 // the list immediately. Annotate nodes that do have operands with their
5244 // operand count. Before we do this, the Node Id fields of the nodes
5245 // may contain arbitrary values. After, the Node Id fields for nodes
5246 // before SortedPos will contain the topological sort index, and the
5247 // Node Id fields for nodes At SortedPos and after will contain the
5248 // count of outstanding operands.
5249 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5251 unsigned Degree = N->getNumOperands();
5253 // A node with no uses, add it to the result array immediately.
5254 N->setNodeId(DAGSize++);
5255 allnodes_iterator Q = N;
5257 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5260 // Temporarily use the Node Id as scratch space for the degree count.
5261 N->setNodeId(Degree);
5265 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5266 // such that by the time the end is reached all nodes will be sorted.
5267 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5269 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5272 unsigned Degree = P->getNodeId();
5275 // All of P's operands are sorted, so P may sorted now.
5276 P->setNodeId(DAGSize++);
5278 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5281 // Update P's outstanding operand count.
5282 P->setNodeId(Degree);
5287 assert(SortedPos == AllNodes.end() &&
5288 "Topological sort incomplete!");
5289 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5290 "First node in topological sort is not the entry token!");
5291 assert(AllNodes.front().getNodeId() == 0 &&
5292 "First node in topological sort has non-zero id!");
5293 assert(AllNodes.front().getNumOperands() == 0 &&
5294 "First node in topological sort has operands!");
5295 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5296 "Last node in topologic sort has unexpected id!");
5297 assert(AllNodes.back().use_empty() &&
5298 "Last node in topologic sort has users!");
5299 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5305 //===----------------------------------------------------------------------===//
5307 //===----------------------------------------------------------------------===//
5309 HandleSDNode::~HandleSDNode() {
5313 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
5315 : SDNode(isa<GlobalVariable>(GA) &&
5316 cast<GlobalVariable>(GA)->isThreadLocal() ?
5318 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
5320 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
5321 getSDVTList(VT)), Offset(o) {
5322 TheGlobal = const_cast<GlobalValue*>(GA);
5325 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
5326 const Value *srcValue, int SVO,
5327 unsigned alignment, bool vol)
5328 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5329 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5331 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5332 assert(getAlignment() == alignment && "Alignment representation error!");
5333 assert(isVolatile() == vol && "Volatile representation error!");
5336 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
5337 unsigned NumOps, MVT memvt, const Value *srcValue,
5338 int SVO, unsigned alignment, bool vol)
5339 : SDNode(Opc, VTs, Ops, NumOps),
5340 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5341 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5342 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5343 assert(getAlignment() == alignment && "Alignment representation error!");
5344 assert(isVolatile() == vol && "Volatile representation error!");
5347 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
5348 const Value *srcValue, int SVO,
5349 unsigned alignment, bool vol)
5350 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5351 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5353 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5354 assert(getAlignment() == alignment && "Alignment representation error!");
5355 assert(isVolatile() == vol && "Volatile representation error!");
5358 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5360 unsigned NumOps, MVT memvt, const Value *srcValue,
5361 int SVO, unsigned alignment, bool vol)
5362 : SDNode(Opc, dl, VTs, Ops, NumOps),
5363 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5364 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5365 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5366 assert(getAlignment() == alignment && "Alignment representation error!");
5367 assert(isVolatile() == vol && "Volatile representation error!");
5370 /// getMemOperand - Return a MachineMemOperand object describing the memory
5371 /// reference performed by this memory reference.
5372 MachineMemOperand MemSDNode::getMemOperand() const {
5374 if (isa<LoadSDNode>(this))
5375 Flags = MachineMemOperand::MOLoad;
5376 else if (isa<StoreSDNode>(this))
5377 Flags = MachineMemOperand::MOStore;
5378 else if (isa<AtomicSDNode>(this)) {
5379 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5382 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5383 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5384 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5385 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5388 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5389 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5391 // Check if the memory reference references a frame index
5392 const FrameIndexSDNode *FI =
5393 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5394 if (!getSrcValue() && FI)
5395 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5396 Flags, 0, Size, getAlignment());
5398 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5399 Size, getAlignment());
5402 /// Profile - Gather unique data for the node.
5404 void SDNode::Profile(FoldingSetNodeID &ID) const {
5405 AddNodeIDNode(ID, this);
5408 /// getValueTypeList - Return a pointer to the specified value type.
5410 const MVT *SDNode::getValueTypeList(MVT VT) {
5411 if (VT.isExtended()) {
5412 static std::set<MVT, MVT::compareRawBits> EVTs;
5413 return &(*EVTs.insert(VT).first);
5415 static MVT VTs[MVT::LAST_VALUETYPE];
5416 VTs[VT.getSimpleVT()] = VT;
5417 return &VTs[VT.getSimpleVT()];
5421 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5422 /// indicated value. This method ignores uses of other values defined by this
5424 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5425 assert(Value < getNumValues() && "Bad value!");
5427 // TODO: Only iterate over uses of a given value of the node
5428 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5429 if (UI.getUse().getResNo() == Value) {
5436 // Found exactly the right number of uses?
5441 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5442 /// value. This method ignores uses of other values defined by this operation.
5443 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5444 assert(Value < getNumValues() && "Bad value!");
5446 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5447 if (UI.getUse().getResNo() == Value)
5454 /// isOnlyUserOf - Return true if this node is the only use of N.
5456 bool SDNode::isOnlyUserOf(SDNode *N) const {
5458 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5469 /// isOperand - Return true if this node is an operand of N.
5471 bool SDValue::isOperandOf(SDNode *N) const {
5472 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5473 if (*this == N->getOperand(i))
5478 bool SDNode::isOperandOf(SDNode *N) const {
5479 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5480 if (this == N->OperandList[i].getNode())
5485 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5486 /// be a chain) reaches the specified operand without crossing any
5487 /// side-effecting instructions. In practice, this looks through token
5488 /// factors and non-volatile loads. In order to remain efficient, this only
5489 /// looks a couple of nodes in, it does not do an exhaustive search.
5490 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5491 unsigned Depth) const {
5492 if (*this == Dest) return true;
5494 // Don't search too deeply, we just want to be able to see through
5495 // TokenFactor's etc.
5496 if (Depth == 0) return false;
5498 // If this is a token factor, all inputs to the TF happen in parallel. If any
5499 // of the operands of the TF reach dest, then we can do the xform.
5500 if (getOpcode() == ISD::TokenFactor) {
5501 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5502 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5507 // Loads don't have side effects, look through them.
5508 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5509 if (!Ld->isVolatile())
5510 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5516 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5517 SmallPtrSet<SDNode *, 32> &Visited) {
5518 if (found || !Visited.insert(N))
5521 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5522 SDNode *Op = N->getOperand(i).getNode();
5527 findPredecessor(Op, P, found, Visited);
5531 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5532 /// is either an operand of N or it can be reached by recursively traversing
5533 /// up the operands.
5534 /// NOTE: this is an expensive method. Use it carefully.
5535 bool SDNode::isPredecessorOf(SDNode *N) const {
5536 SmallPtrSet<SDNode *, 32> Visited;
5538 findPredecessor(N, this, found, Visited);
5542 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5543 assert(Num < NumOperands && "Invalid child # of SDNode!");
5544 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5547 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5548 switch (getOpcode()) {
5550 if (getOpcode() < ISD::BUILTIN_OP_END)
5551 return "<<Unknown DAG Node>>";
5552 if (isMachineOpcode()) {
5554 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5555 if (getMachineOpcode() < TII->getNumOpcodes())
5556 return TII->get(getMachineOpcode()).getName();
5557 return "<<Unknown Machine Node>>";
5560 const TargetLowering &TLI = G->getTargetLoweringInfo();
5561 const char *Name = TLI.getTargetNodeName(getOpcode());
5562 if (Name) return Name;
5563 return "<<Unknown Target Node>>";
5565 return "<<Unknown Node>>";
5568 case ISD::DELETED_NODE:
5569 return "<<Deleted Node!>>";
5571 case ISD::PREFETCH: return "Prefetch";
5572 case ISD::MEMBARRIER: return "MemBarrier";
5573 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5574 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5575 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5576 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5577 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5578 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5579 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5580 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5581 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5582 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5583 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5584 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5585 case ISD::PCMARKER: return "PCMarker";
5586 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5587 case ISD::SRCVALUE: return "SrcValue";
5588 case ISD::MEMOPERAND: return "MemOperand";
5589 case ISD::EntryToken: return "EntryToken";
5590 case ISD::TokenFactor: return "TokenFactor";
5591 case ISD::AssertSext: return "AssertSext";
5592 case ISD::AssertZext: return "AssertZext";
5594 case ISD::BasicBlock: return "BasicBlock";
5595 case ISD::ARG_FLAGS: return "ArgFlags";
5596 case ISD::VALUETYPE: return "ValueType";
5597 case ISD::Register: return "Register";
5599 case ISD::Constant: return "Constant";
5600 case ISD::ConstantFP: return "ConstantFP";
5601 case ISD::GlobalAddress: return "GlobalAddress";
5602 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5603 case ISD::FrameIndex: return "FrameIndex";
5604 case ISD::JumpTable: return "JumpTable";
5605 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5606 case ISD::RETURNADDR: return "RETURNADDR";
5607 case ISD::FRAMEADDR: return "FRAMEADDR";
5608 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5609 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5610 case ISD::EHSELECTION: return "EHSELECTION";
5611 case ISD::EH_RETURN: return "EH_RETURN";
5612 case ISD::ConstantPool: return "ConstantPool";
5613 case ISD::ExternalSymbol: return "ExternalSymbol";
5614 case ISD::INTRINSIC_WO_CHAIN: {
5615 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5616 return Intrinsic::getName((Intrinsic::ID)IID);
5618 case ISD::INTRINSIC_VOID:
5619 case ISD::INTRINSIC_W_CHAIN: {
5620 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5621 return Intrinsic::getName((Intrinsic::ID)IID);
5624 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5625 case ISD::TargetConstant: return "TargetConstant";
5626 case ISD::TargetConstantFP:return "TargetConstantFP";
5627 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5628 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5629 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5630 case ISD::TargetJumpTable: return "TargetJumpTable";
5631 case ISD::TargetConstantPool: return "TargetConstantPool";
5632 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5634 case ISD::CopyToReg: return "CopyToReg";
5635 case ISD::CopyFromReg: return "CopyFromReg";
5636 case ISD::UNDEF: return "undef";
5637 case ISD::MERGE_VALUES: return "merge_values";
5638 case ISD::INLINEASM: return "inlineasm";
5639 case ISD::DBG_LABEL: return "dbg_label";
5640 case ISD::EH_LABEL: return "eh_label";
5641 case ISD::DECLARE: return "declare";
5642 case ISD::HANDLENODE: return "handlenode";
5643 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5644 case ISD::CALL: return "call";
5647 case ISD::FABS: return "fabs";
5648 case ISD::FNEG: return "fneg";
5649 case ISD::FSQRT: return "fsqrt";
5650 case ISD::FSIN: return "fsin";
5651 case ISD::FCOS: return "fcos";
5652 case ISD::FPOWI: return "fpowi";
5653 case ISD::FPOW: return "fpow";
5654 case ISD::FTRUNC: return "ftrunc";
5655 case ISD::FFLOOR: return "ffloor";
5656 case ISD::FCEIL: return "fceil";
5657 case ISD::FRINT: return "frint";
5658 case ISD::FNEARBYINT: return "fnearbyint";
5661 case ISD::ADD: return "add";
5662 case ISD::SUB: return "sub";
5663 case ISD::MUL: return "mul";
5664 case ISD::MULHU: return "mulhu";
5665 case ISD::MULHS: return "mulhs";
5666 case ISD::SDIV: return "sdiv";
5667 case ISD::UDIV: return "udiv";
5668 case ISD::SREM: return "srem";
5669 case ISD::UREM: return "urem";
5670 case ISD::SMUL_LOHI: return "smul_lohi";
5671 case ISD::UMUL_LOHI: return "umul_lohi";
5672 case ISD::SDIVREM: return "sdivrem";
5673 case ISD::UDIVREM: return "udivrem";
5674 case ISD::AND: return "and";
5675 case ISD::OR: return "or";
5676 case ISD::XOR: return "xor";
5677 case ISD::SHL: return "shl";
5678 case ISD::SRA: return "sra";
5679 case ISD::SRL: return "srl";
5680 case ISD::ROTL: return "rotl";
5681 case ISD::ROTR: return "rotr";
5682 case ISD::FADD: return "fadd";
5683 case ISD::FSUB: return "fsub";
5684 case ISD::FMUL: return "fmul";
5685 case ISD::FDIV: return "fdiv";
5686 case ISD::FREM: return "frem";
5687 case ISD::FCOPYSIGN: return "fcopysign";
5688 case ISD::FGETSIGN: return "fgetsign";
5690 case ISD::SETCC: return "setcc";
5691 case ISD::VSETCC: return "vsetcc";
5692 case ISD::SELECT: return "select";
5693 case ISD::SELECT_CC: return "select_cc";
5694 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5695 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5696 case ISD::CONCAT_VECTORS: return "concat_vectors";
5697 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5698 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5699 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5700 case ISD::CARRY_FALSE: return "carry_false";
5701 case ISD::ADDC: return "addc";
5702 case ISD::ADDE: return "adde";
5703 case ISD::SADDO: return "saddo";
5704 case ISD::UADDO: return "uaddo";
5705 case ISD::SSUBO: return "ssubo";
5706 case ISD::USUBO: return "usubo";
5707 case ISD::SMULO: return "smulo";
5708 case ISD::UMULO: return "umulo";
5709 case ISD::SUBC: return "subc";
5710 case ISD::SUBE: return "sube";
5711 case ISD::SHL_PARTS: return "shl_parts";
5712 case ISD::SRA_PARTS: return "sra_parts";
5713 case ISD::SRL_PARTS: return "srl_parts";
5715 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5716 case ISD::INSERT_SUBREG: return "insert_subreg";
5718 // Conversion operators.
5719 case ISD::SIGN_EXTEND: return "sign_extend";
5720 case ISD::ZERO_EXTEND: return "zero_extend";
5721 case ISD::ANY_EXTEND: return "any_extend";
5722 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5723 case ISD::TRUNCATE: return "truncate";
5724 case ISD::FP_ROUND: return "fp_round";
5725 case ISD::FLT_ROUNDS_: return "flt_rounds";
5726 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5727 case ISD::FP_EXTEND: return "fp_extend";
5729 case ISD::SINT_TO_FP: return "sint_to_fp";
5730 case ISD::UINT_TO_FP: return "uint_to_fp";
5731 case ISD::FP_TO_SINT: return "fp_to_sint";
5732 case ISD::FP_TO_UINT: return "fp_to_uint";
5733 case ISD::BIT_CONVERT: return "bit_convert";
5735 case ISD::CONVERT_RNDSAT: {
5736 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5737 default: assert(0 && "Unknown cvt code!");
5738 case ISD::CVT_FF: return "cvt_ff";
5739 case ISD::CVT_FS: return "cvt_fs";
5740 case ISD::CVT_FU: return "cvt_fu";
5741 case ISD::CVT_SF: return "cvt_sf";
5742 case ISD::CVT_UF: return "cvt_uf";
5743 case ISD::CVT_SS: return "cvt_ss";
5744 case ISD::CVT_SU: return "cvt_su";
5745 case ISD::CVT_US: return "cvt_us";
5746 case ISD::CVT_UU: return "cvt_uu";
5750 // Control flow instructions
5751 case ISD::BR: return "br";
5752 case ISD::BRIND: return "brind";
5753 case ISD::BR_JT: return "br_jt";
5754 case ISD::BRCOND: return "brcond";
5755 case ISD::BR_CC: return "br_cc";
5756 case ISD::RET: return "ret";
5757 case ISD::CALLSEQ_START: return "callseq_start";
5758 case ISD::CALLSEQ_END: return "callseq_end";
5761 case ISD::LOAD: return "load";
5762 case ISD::STORE: return "store";
5763 case ISD::VAARG: return "vaarg";
5764 case ISD::VACOPY: return "vacopy";
5765 case ISD::VAEND: return "vaend";
5766 case ISD::VASTART: return "vastart";
5767 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5768 case ISD::EXTRACT_ELEMENT: return "extract_element";
5769 case ISD::BUILD_PAIR: return "build_pair";
5770 case ISD::STACKSAVE: return "stacksave";
5771 case ISD::STACKRESTORE: return "stackrestore";
5772 case ISD::TRAP: return "trap";
5775 case ISD::BSWAP: return "bswap";
5776 case ISD::CTPOP: return "ctpop";
5777 case ISD::CTTZ: return "cttz";
5778 case ISD::CTLZ: return "ctlz";
5781 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5782 case ISD::DEBUG_LOC: return "debug_loc";
5785 case ISD::TRAMPOLINE: return "trampoline";
5788 switch (cast<CondCodeSDNode>(this)->get()) {
5789 default: assert(0 && "Unknown setcc condition!");
5790 case ISD::SETOEQ: return "setoeq";
5791 case ISD::SETOGT: return "setogt";
5792 case ISD::SETOGE: return "setoge";
5793 case ISD::SETOLT: return "setolt";
5794 case ISD::SETOLE: return "setole";
5795 case ISD::SETONE: return "setone";
5797 case ISD::SETO: return "seto";
5798 case ISD::SETUO: return "setuo";
5799 case ISD::SETUEQ: return "setue";
5800 case ISD::SETUGT: return "setugt";
5801 case ISD::SETUGE: return "setuge";
5802 case ISD::SETULT: return "setult";
5803 case ISD::SETULE: return "setule";
5804 case ISD::SETUNE: return "setune";
5806 case ISD::SETEQ: return "seteq";
5807 case ISD::SETGT: return "setgt";
5808 case ISD::SETGE: return "setge";
5809 case ISD::SETLT: return "setlt";
5810 case ISD::SETLE: return "setle";
5811 case ISD::SETNE: return "setne";
5816 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5825 return "<post-inc>";
5827 return "<post-dec>";
5831 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5832 std::string S = "< ";
5846 if (getByValAlign())
5847 S += "byval-align:" + utostr(getByValAlign()) + " ";
5849 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5851 S += "byval-size:" + utostr(getByValSize()) + " ";
5855 void SDNode::dump() const { dump(0); }
5856 void SDNode::dump(const SelectionDAG *G) const {
5861 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5862 OS << (void*)this << ": ";
5864 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5866 if (getValueType(i) == MVT::Other)
5869 OS << getValueType(i).getMVTString();
5871 OS << " = " << getOperationName(G);
5874 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5876 OS << (void*)getOperand(i).getNode();
5877 if (unsigned RN = getOperand(i).getResNo())
5881 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5882 SDNode *Mask = getOperand(2).getNode();
5884 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5886 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5889 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5894 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5895 OS << '<' << CSDN->getAPIntValue() << '>';
5896 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5897 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5898 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5899 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5900 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5903 CSDN->getValueAPF().bitcastToAPInt().dump();
5906 } else if (const GlobalAddressSDNode *GADN =
5907 dyn_cast<GlobalAddressSDNode>(this)) {
5908 int64_t offset = GADN->getOffset();
5910 WriteAsOperand(OS, GADN->getGlobal());
5913 OS << " + " << offset;
5915 OS << " " << offset;
5916 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5917 OS << "<" << FIDN->getIndex() << ">";
5918 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5919 OS << "<" << JTDN->getIndex() << ">";
5920 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5921 int offset = CP->getOffset();
5922 if (CP->isMachineConstantPoolEntry())
5923 OS << "<" << *CP->getMachineCPVal() << ">";
5925 OS << "<" << *CP->getConstVal() << ">";
5927 OS << " + " << offset;
5929 OS << " " << offset;
5930 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5932 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5934 OS << LBB->getName() << " ";
5935 OS << (const void*)BBDN->getBasicBlock() << ">";
5936 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5937 if (G && R->getReg() &&
5938 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5939 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5941 OS << " #" << R->getReg();
5943 } else if (const ExternalSymbolSDNode *ES =
5944 dyn_cast<ExternalSymbolSDNode>(this)) {
5945 OS << "'" << ES->getSymbol() << "'";
5946 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5948 OS << "<" << M->getValue() << ">";
5951 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5952 if (M->MO.getValue())
5953 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5955 OS << "<null:" << M->MO.getOffset() << ">";
5956 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5957 OS << N->getArgFlags().getArgFlagsString();
5958 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5959 OS << ":" << N->getVT().getMVTString();
5961 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5962 const Value *SrcValue = LD->getSrcValue();
5963 int SrcOffset = LD->getSrcValueOffset();
5969 OS << ":" << SrcOffset << ">";
5972 switch (LD->getExtensionType()) {
5973 default: doExt = false; break;
5974 case ISD::EXTLOAD: OS << " <anyext "; break;
5975 case ISD::SEXTLOAD: OS << " <sext "; break;
5976 case ISD::ZEXTLOAD: OS << " <zext "; break;
5979 OS << LD->getMemoryVT().getMVTString() << ">";
5981 const char *AM = getIndexedModeName(LD->getAddressingMode());
5984 if (LD->isVolatile())
5985 OS << " <volatile>";
5986 OS << " alignment=" << LD->getAlignment();
5987 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5988 const Value *SrcValue = ST->getSrcValue();
5989 int SrcOffset = ST->getSrcValueOffset();
5995 OS << ":" << SrcOffset << ">";
5997 if (ST->isTruncatingStore())
5998 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
6000 const char *AM = getIndexedModeName(ST->getAddressingMode());
6003 if (ST->isVolatile())
6004 OS << " <volatile>";
6005 OS << " alignment=" << ST->getAlignment();
6006 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
6007 const Value *SrcValue = AT->getSrcValue();
6008 int SrcOffset = AT->getSrcValueOffset();
6014 OS << ":" << SrcOffset << ">";
6015 if (AT->isVolatile())
6016 OS << " <volatile>";
6017 OS << " alignment=" << AT->getAlignment();
6021 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6022 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6023 if (N->getOperand(i).getNode()->hasOneUse())
6024 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6026 cerr << "\n" << std::string(indent+2, ' ')
6027 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6030 cerr << "\n" << std::string(indent, ' ');
6034 void SelectionDAG::dump() const {
6035 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
6037 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6039 const SDNode *N = I;
6040 if (!N->hasOneUse() && N != getRoot().getNode())
6041 DumpNodes(N, 2, this);
6044 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6049 const Type *ConstantPoolSDNode::getType() const {
6050 if (isMachineConstantPoolEntry())
6051 return Val.MachineCPVal->getType();
6052 return Val.ConstVal->getType();