1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "llvm/Constants.h"
17 #include "llvm/Analysis/ValueTracking.h"
18 #include "llvm/Function.h"
19 #include "llvm/GlobalAlias.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Intrinsics.h"
22 #include "llvm/DerivedTypes.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetIntrinsicInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/System/Mutex.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallPtrSet.h"
47 #include "llvm/ADT/SmallSet.h"
48 #include "llvm/ADT/SmallVector.h"
49 #include "llvm/ADT/StringExtras.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
62 switch (VT.getSimpleVT().SimpleTy) {
63 default: llvm_unreachable("Unknown FP format");
64 case MVT::f32: return &APFloat::IEEEsingle;
65 case MVT::f64: return &APFloat::IEEEdouble;
66 case MVT::f80: return &APFloat::x87DoubleExtended;
67 case MVT::f128: return &APFloat::IEEEquad;
68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
72 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
74 //===----------------------------------------------------------------------===//
75 // ConstantFPSDNode Class
76 //===----------------------------------------------------------------------===//
78 /// isExactlyValue - We don't rely on operator== working on double values, as
79 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
80 /// As such, this method can be used to do an exact bit-for-bit comparison of
81 /// two floating point values.
82 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
83 return getValueAPF().bitwiseIsEqual(V);
86 bool ConstantFPSDNode::isValueValidForType(EVT VT,
88 assert(VT.isFloatingPoint() && "Can only convert between FP types");
90 // PPC long double cannot be converted to any other type.
91 if (VT == MVT::ppcf128 ||
92 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BIT_CONVERT)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
127 SDValue NotZero = N->getOperand(i);
128 if (isa<ConstantSDNode>(NotZero)) {
129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
131 } else if (isa<ConstantFPSDNode>(NotZero)) {
132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
133 bitcastToAPInt().isAllOnesValue())
138 // Okay, we have at least one ~0 value, check to see if the rest match or are
140 for (++i; i != e; ++i)
141 if (N->getOperand(i) != NotZero &&
142 N->getOperand(i).getOpcode() != ISD::UNDEF)
148 /// isBuildVectorAllZeros - Return true if the specified node is a
149 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
151 // Look through a bit convert.
152 if (N->getOpcode() == ISD::BIT_CONVERT)
153 N = N->getOperand(0).getNode();
155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
157 unsigned i = 0, e = N->getNumOperands();
159 // Skip over all of the undef values.
160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163 // Do not accept an all-undef vector.
164 if (i == e) return false;
166 // Do not accept build_vectors that aren't all constants or which have non-0
168 SDValue Zero = N->getOperand(i);
169 if (isa<ConstantSDNode>(Zero)) {
170 if (!cast<ConstantSDNode>(Zero)->isNullValue())
172 } else if (isa<ConstantFPSDNode>(Zero)) {
173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
178 // Okay, we have at least one 0 value, check to see if the rest match or are
180 for (++i; i != e; ++i)
181 if (N->getOperand(i) != Zero &&
182 N->getOperand(i).getOpcode() != ISD::UNDEF)
187 /// isScalarToVector - Return true if the specified node is a
188 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 /// element is not an undef.
190 bool ISD::isScalarToVector(const SDNode *N) {
191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194 if (N->getOpcode() != ISD::BUILD_VECTOR)
196 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
198 unsigned NumElems = N->getNumOperands();
199 for (unsigned i = 1; i < NumElems; ++i) {
200 SDValue V = N->getOperand(i);
201 if (V.getOpcode() != ISD::UNDEF)
207 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
208 /// when given the operation for (X op Y).
209 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
210 // To perform this operation, we just need to swap the L and G bits of the
212 unsigned OldL = (Operation >> 2) & 1;
213 unsigned OldG = (Operation >> 1) & 1;
214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
215 (OldL << 1) | // New G bit
216 (OldG << 2)); // New L bit.
219 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
220 /// 'op' is a valid SetCC operation.
221 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
222 unsigned Operation = Op;
224 Operation ^= 7; // Flip L, G, E bits, but not U.
226 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: llvm_unreachable("Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return MF->getTarget();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
485 //===----------------------------------------------------------------------===//
486 // SelectionDAG Class
487 //===----------------------------------------------------------------------===//
489 /// doNotCSE - Return true if CSE should not be performed for this node.
490 static bool doNotCSE(SDNode *N) {
491 if (N->getValueType(0) == MVT::Flag)
492 return true; // Never CSE anything that produces a flag.
494 switch (N->getOpcode()) {
496 case ISD::HANDLENODE:
498 return true; // Never CSE these nodes.
501 // Check that remaining values produced are not flags.
502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
503 if (N->getValueType(i) == MVT::Flag)
504 return true; // Never CSE anything that produces a flag.
509 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
511 void SelectionDAG::RemoveDeadNodes() {
512 // Create a dummy node (which is not added to allnodes), that adds a reference
513 // to the root node, preventing it from being deleted.
514 HandleSDNode Dummy(getRoot());
516 SmallVector<SDNode*, 128> DeadNodes;
518 // Add all obviously-dead nodes to the DeadNodes worklist.
519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
521 DeadNodes.push_back(I);
523 RemoveDeadNodes(DeadNodes);
525 // If the root changed (e.g. it was a dead load, update the root).
526 setRoot(Dummy.getValue());
529 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
530 /// given list, and any nodes that become unreachable as a result.
531 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
532 DAGUpdateListener *UpdateListener) {
534 // Process the worklist, deleting the nodes and adding their uses to the
536 while (!DeadNodes.empty()) {
537 SDNode *N = DeadNodes.pop_back_val();
540 UpdateListener->NodeDeleted(N, 0);
542 // Take the node out of the appropriate CSE map.
543 RemoveNodeFromCSEMaps(N);
545 // Next, brutally remove the operand list. This is safe to do, as there are
546 // no cycles in the graph.
547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
549 SDNode *Operand = Use.getNode();
552 // Now that we removed this operand, see if there are no uses of it left.
553 if (Operand->use_empty())
554 DeadNodes.push_back(Operand);
561 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
562 SmallVector<SDNode*, 16> DeadNodes(1, N);
563 RemoveDeadNodes(DeadNodes, UpdateListener);
566 void SelectionDAG::DeleteNode(SDNode *N) {
567 // First take this out of the appropriate CSE map.
568 RemoveNodeFromCSEMaps(N);
570 // Finally, remove uses due to operands of this node, remove from the
571 // AllNodes list, and delete the node.
572 DeleteNodeNotInCSEMaps(N);
575 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
576 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
577 assert(N->use_empty() && "Cannot delete a node that is not dead!");
579 // Drop all of the operands and decrement used node's use counts.
585 void SelectionDAG::DeallocateNode(SDNode *N) {
586 if (N->OperandsNeedDelete)
587 delete[] N->OperandList;
589 // Set the opcode to DELETED_NODE to help catch bugs when node
590 // memory is reallocated.
591 N->NodeType = ISD::DELETED_NODE;
593 NodeAllocator.Deallocate(AllNodes.remove(N));
595 // Remove the ordering of this node.
596 if (Ordering) Ordering->remove(N);
599 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
600 /// correspond to it. This is useful when we're about to delete or repurpose
601 /// the node. We don't want future request for structurally identical nodes
602 /// to return N anymore.
603 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
605 switch (N->getOpcode()) {
606 case ISD::EntryToken:
607 llvm_unreachable("EntryToken should not be in CSEMaps!");
609 case ISD::HANDLENODE: return false; // noop.
611 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
612 "Cond code doesn't exist!");
613 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
614 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
616 case ISD::ExternalSymbol:
617 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
619 case ISD::TargetExternalSymbol: {
620 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
621 Erased = TargetExternalSymbols.erase(
622 std::pair<std::string,unsigned char>(ESN->getSymbol(),
623 ESN->getTargetFlags()));
626 case ISD::VALUETYPE: {
627 EVT VT = cast<VTSDNode>(N)->getVT();
628 if (VT.isExtended()) {
629 Erased = ExtendedValueTypeNodes.erase(VT);
631 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
632 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
637 // Remove it from the CSE Map.
638 Erased = CSEMap.RemoveNode(N);
642 // Verify that the node was actually in one of the CSE maps, unless it has a
643 // flag result (which cannot be CSE'd) or is one of the special cases that are
644 // not subject to CSE.
645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
646 !N->isMachineOpcode() && !doNotCSE(N)) {
649 llvm_unreachable("Node is not in map!");
655 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
656 /// maps and modified in place. Add it back to the CSE maps, unless an identical
657 /// node already exists, in which case transfer all its users to the existing
658 /// node. This transfer can potentially trigger recursive merging.
661 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
662 DAGUpdateListener *UpdateListener) {
663 // For node types that aren't CSE'd, just act as if no identical node
666 SDNode *Existing = CSEMap.GetOrInsertNode(N);
668 // If there was already an existing matching node, use ReplaceAllUsesWith
669 // to replace the dead one with the existing one. This can cause
670 // recursive merging of other unrelated nodes down the line.
671 ReplaceAllUsesWith(N, Existing, UpdateListener);
673 // N is now dead. Inform the listener if it exists and delete it.
675 UpdateListener->NodeDeleted(N, Existing);
676 DeleteNodeNotInCSEMaps(N);
681 // If the node doesn't already exist, we updated it. Inform a listener if
684 UpdateListener->NodeUpdated(N);
687 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
688 /// were replaced with those specified. If this node is never memoized,
689 /// return null, otherwise return a pointer to the slot it would take. If a
690 /// node already exists with these operands, the slot will be non-null.
691 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
696 SDValue Ops[] = { Op };
698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
699 AddNodeIDCustom(ID, N);
700 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
704 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
705 /// were replaced with those specified. If this node is never memoized,
706 /// return null, otherwise return a pointer to the slot it would take. If a
707 /// node already exists with these operands, the slot will be non-null.
708 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
709 SDValue Op1, SDValue Op2,
714 SDValue Ops[] = { Op1, Op2 };
716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
717 AddNodeIDCustom(ID, N);
718 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
723 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
724 /// were replaced with those specified. If this node is never memoized,
725 /// return null, otherwise return a pointer to the slot it would take. If a
726 /// node already exists with these operands, the slot will be non-null.
727 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
728 const SDValue *Ops,unsigned NumOps,
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
735 AddNodeIDCustom(ID, N);
736 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
740 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
741 void SelectionDAG::VerifyNode(SDNode *N) {
742 switch (N->getOpcode()) {
745 case ISD::BUILD_PAIR: {
746 EVT VT = N->getValueType(0);
747 assert(N->getNumValues() == 1 && "Too many results!");
748 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
749 "Wrong return type!");
750 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
751 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
752 "Mismatched operand types!");
753 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
754 "Wrong operand type!");
755 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
756 "Wrong return type size");
759 case ISD::BUILD_VECTOR: {
760 assert(N->getNumValues() == 1 && "Too many results!");
761 assert(N->getValueType(0).isVector() && "Wrong return type!");
762 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
763 "Wrong number of operands!");
764 EVT EltVT = N->getValueType(0).getVectorElementType();
765 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
766 assert((I->getValueType() == EltVT ||
767 (EltVT.isInteger() && I->getValueType().isInteger() &&
768 EltVT.bitsLE(I->getValueType()))) &&
769 "Wrong operand type!");
775 /// getEVTAlignment - Compute the default alignment value for the
778 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
779 const Type *Ty = VT == MVT::iPTR ?
780 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
781 VT.getTypeForEVT(*getContext());
783 return TLI.getTargetData()->getABITypeAlignment(Ty);
786 // EntryNode could meaningfully have debug info if we can find it...
787 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
788 : TLI(tli), FLI(fli), DW(0),
789 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
790 getVTList(MVT::Other)),
791 Root(getEntryNode()), Ordering(0) {
792 AllNodes.push_back(&EntryNode);
793 if (DisableScheduling)
794 Ordering = new SDNodeOrdering();
797 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
802 Context = &mf.getFunction()->getContext();
805 SelectionDAG::~SelectionDAG() {
810 void SelectionDAG::allnodes_clear() {
811 assert(&*AllNodes.begin() == &EntryNode);
812 AllNodes.remove(AllNodes.begin());
813 while (!AllNodes.empty())
814 DeallocateNode(AllNodes.begin());
817 void SelectionDAG::clear() {
819 OperandAllocator.Reset();
822 ExtendedValueTypeNodes.clear();
823 ExternalSymbols.clear();
824 TargetExternalSymbols.clear();
825 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
826 static_cast<CondCodeSDNode*>(0));
827 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
828 static_cast<SDNode*>(0));
830 EntryNode.UseList = 0;
831 AllNodes.push_back(&EntryNode);
832 Root = getEntryNode();
833 if (DisableScheduling)
834 Ordering = new SDNodeOrdering();
837 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
838 return VT.bitsGT(Op.getValueType()) ?
839 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
840 getNode(ISD::TRUNCATE, DL, VT, Op);
843 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
844 return VT.bitsGT(Op.getValueType()) ?
845 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
846 getNode(ISD::TRUNCATE, DL, VT, Op);
849 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
850 assert(!VT.isVector() &&
851 "getZeroExtendInReg should use the vector element type instead of "
853 if (Op.getValueType() == VT) return Op;
854 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
855 APInt Imm = APInt::getLowBitsSet(BitWidth,
857 return getNode(ISD::AND, DL, Op.getValueType(), Op,
858 getConstant(Imm, Op.getValueType()));
861 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
863 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
864 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
866 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
867 return getNode(ISD::XOR, DL, VT, Val, NegOne);
870 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
871 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
872 assert((EltVT.getSizeInBits() >= 64 ||
873 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
874 "getConstant with a uint64_t value that doesn't fit in the type!");
875 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
878 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
879 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
882 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
883 assert(VT.isInteger() && "Cannot create FP integer constant!");
885 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
886 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
887 "APInt size does not match type size!");
889 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
891 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
895 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
897 return SDValue(N, 0);
900 N = NodeAllocator.Allocate<ConstantSDNode>();
901 new (N) ConstantSDNode(isT, &Val, EltVT);
902 CSEMap.InsertNode(N, IP);
903 AllNodes.push_back(N);
906 SDValue Result(N, 0);
908 SmallVector<SDValue, 8> Ops;
909 Ops.assign(VT.getVectorNumElements(), Result);
910 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
911 VT, &Ops[0], Ops.size());
916 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
917 return getConstant(Val, TLI.getPointerTy(), isTarget);
921 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
922 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
925 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
926 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
929 VT.isVector() ? VT.getVectorElementType() : VT;
931 // Do the map lookup using the actual bit pattern for the floating point
932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
933 // we don't have issues with SNANs.
934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
942 return SDValue(N, 0);
945 N = NodeAllocator.Allocate<ConstantFPSDNode>();
946 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
947 CSEMap.InsertNode(N, IP);
948 AllNodes.push_back(N);
951 SDValue Result(N, 0);
953 SmallVector<SDValue, 8> Ops;
954 Ops.assign(VT.getVectorNumElements(), Result);
955 // FIXME DebugLoc info might be appropriate here
956 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
957 VT, &Ops[0], Ops.size());
962 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
964 VT.isVector() ? VT.getVectorElementType() : VT;
966 return getConstantFP(APFloat((float)Val), VT, isTarget);
968 return getConstantFP(APFloat(Val), VT, isTarget);
971 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
972 EVT VT, int64_t Offset,
974 unsigned char TargetFlags) {
975 assert((TargetFlags == 0 || isTargetGA) &&
976 "Cannot set target flags on target-independent globals");
978 // Truncate (with sign-extension) the offset value to the pointer size.
979 EVT PTy = TLI.getPointerTy();
980 unsigned BitWidth = PTy.getSizeInBits();
982 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
984 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
986 // If GV is an alias then use the aliasee for determining thread-localness.
987 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
988 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
992 if (GVar && GVar->isThreadLocal())
993 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
995 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
998 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1000 ID.AddInteger(Offset);
1001 ID.AddInteger(TargetFlags);
1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1004 return SDValue(E, 0);
1006 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1007 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1008 CSEMap.InsertNode(N, IP);
1009 AllNodes.push_back(N);
1010 return SDValue(N, 0);
1013 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1014 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1015 FoldingSetNodeID ID;
1016 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1019 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1020 return SDValue(E, 0);
1022 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1023 new (N) FrameIndexSDNode(FI, VT, isTarget);
1024 CSEMap.InsertNode(N, IP);
1025 AllNodes.push_back(N);
1026 return SDValue(N, 0);
1029 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1030 unsigned char TargetFlags) {
1031 assert((TargetFlags == 0 || isTarget) &&
1032 "Cannot set target flags on target-independent jump tables");
1033 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1034 FoldingSetNodeID ID;
1035 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1037 ID.AddInteger(TargetFlags);
1039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1040 return SDValue(E, 0);
1042 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1043 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1044 CSEMap.InsertNode(N, IP);
1045 AllNodes.push_back(N);
1046 return SDValue(N, 0);
1049 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1050 unsigned Alignment, int Offset,
1052 unsigned char TargetFlags) {
1053 assert((TargetFlags == 0 || isTarget) &&
1054 "Cannot set target flags on target-independent globals");
1056 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1057 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1058 FoldingSetNodeID ID;
1059 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1060 ID.AddInteger(Alignment);
1061 ID.AddInteger(Offset);
1063 ID.AddInteger(TargetFlags);
1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1066 return SDValue(E, 0);
1068 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1069 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1070 CSEMap.InsertNode(N, IP);
1071 AllNodes.push_back(N);
1072 return SDValue(N, 0);
1076 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1077 unsigned Alignment, int Offset,
1079 unsigned char TargetFlags) {
1080 assert((TargetFlags == 0 || isTarget) &&
1081 "Cannot set target flags on target-independent globals");
1083 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1084 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1085 FoldingSetNodeID ID;
1086 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1087 ID.AddInteger(Alignment);
1088 ID.AddInteger(Offset);
1089 C->AddSelectionDAGCSEId(ID);
1090 ID.AddInteger(TargetFlags);
1092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1093 return SDValue(E, 0);
1095 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1096 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1097 CSEMap.InsertNode(N, IP);
1098 AllNodes.push_back(N);
1099 return SDValue(N, 0);
1102 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1103 FoldingSetNodeID ID;
1104 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1108 return SDValue(E, 0);
1110 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1111 new (N) BasicBlockSDNode(MBB);
1112 CSEMap.InsertNode(N, IP);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getValueType(EVT VT) {
1118 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1119 ValueTypeNodes.size())
1120 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1122 SDNode *&N = VT.isExtended() ?
1123 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1125 if (N) return SDValue(N, 0);
1126 N = NodeAllocator.Allocate<VTSDNode>();
1127 new (N) VTSDNode(VT);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1133 SDNode *&N = ExternalSymbols[Sym];
1134 if (N) return SDValue(N, 0);
1135 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1136 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1142 unsigned char TargetFlags) {
1144 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1146 if (N) return SDValue(N, 0);
1147 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1148 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1149 AllNodes.push_back(N);
1150 return SDValue(N, 0);
1153 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1154 if ((unsigned)Cond >= CondCodeNodes.size())
1155 CondCodeNodes.resize(Cond+1);
1157 if (CondCodeNodes[Cond] == 0) {
1158 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1159 new (N) CondCodeSDNode(Cond);
1160 CondCodeNodes[Cond] = N;
1161 AllNodes.push_back(N);
1164 return SDValue(CondCodeNodes[Cond], 0);
1167 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1168 // the shuffle mask M that point at N1 to point at N2, and indices that point
1169 // N2 to point at N1.
1170 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1172 int NElts = M.size();
1173 for (int i = 0; i != NElts; ++i) {
1181 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1182 SDValue N2, const int *Mask) {
1183 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1184 assert(VT.isVector() && N1.getValueType().isVector() &&
1185 "Vector Shuffle VTs must be a vectors");
1186 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1187 && "Vector Shuffle VTs must have same element type");
1189 // Canonicalize shuffle undef, undef -> undef
1190 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1191 return getUNDEF(VT);
1193 // Validate that all indices in Mask are within the range of the elements
1194 // input to the shuffle.
1195 unsigned NElts = VT.getVectorNumElements();
1196 SmallVector<int, 8> MaskVec;
1197 for (unsigned i = 0; i != NElts; ++i) {
1198 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1199 MaskVec.push_back(Mask[i]);
1202 // Canonicalize shuffle v, v -> v, undef
1205 for (unsigned i = 0; i != NElts; ++i)
1206 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1209 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1210 if (N1.getOpcode() == ISD::UNDEF)
1211 commuteShuffle(N1, N2, MaskVec);
1213 // Canonicalize all index into lhs, -> shuffle lhs, undef
1214 // Canonicalize all index into rhs, -> shuffle rhs, undef
1215 bool AllLHS = true, AllRHS = true;
1216 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1217 for (unsigned i = 0; i != NElts; ++i) {
1218 if (MaskVec[i] >= (int)NElts) {
1223 } else if (MaskVec[i] >= 0) {
1227 if (AllLHS && AllRHS)
1228 return getUNDEF(VT);
1229 if (AllLHS && !N2Undef)
1233 commuteShuffle(N1, N2, MaskVec);
1236 // If Identity shuffle, or all shuffle in to undef, return that node.
1237 bool AllUndef = true;
1238 bool Identity = true;
1239 for (unsigned i = 0; i != NElts; ++i) {
1240 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1241 if (MaskVec[i] >= 0) AllUndef = false;
1243 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1246 return getUNDEF(VT);
1248 FoldingSetNodeID ID;
1249 SDValue Ops[2] = { N1, N2 };
1250 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1251 for (unsigned i = 0; i != NElts; ++i)
1252 ID.AddInteger(MaskVec[i]);
1255 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1256 return SDValue(E, 0);
1258 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1259 // SDNode doesn't have access to it. This memory will be "leaked" when
1260 // the node is deallocated, but recovered when the NodeAllocator is released.
1261 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1262 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1264 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1265 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1266 CSEMap.InsertNode(N, IP);
1267 AllNodes.push_back(N);
1268 return SDValue(N, 0);
1271 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1272 SDValue Val, SDValue DTy,
1273 SDValue STy, SDValue Rnd, SDValue Sat,
1274 ISD::CvtCode Code) {
1275 // If the src and dest types are the same and the conversion is between
1276 // integer types of the same sign or two floats, no conversion is necessary.
1278 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1281 FoldingSetNodeID ID;
1282 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1283 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1285 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1286 return SDValue(E, 0);
1288 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1289 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1290 CSEMap.InsertNode(N, IP);
1291 AllNodes.push_back(N);
1292 return SDValue(N, 0);
1295 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1296 FoldingSetNodeID ID;
1297 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1298 ID.AddInteger(RegNo);
1300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1301 return SDValue(E, 0);
1303 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1304 new (N) RegisterSDNode(RegNo, VT);
1305 CSEMap.InsertNode(N, IP);
1306 AllNodes.push_back(N);
1307 return SDValue(N, 0);
1310 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1313 FoldingSetNodeID ID;
1314 SDValue Ops[] = { Root };
1315 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1316 ID.AddInteger(LabelID);
1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1319 return SDValue(E, 0);
1321 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1322 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1323 CSEMap.InsertNode(N, IP);
1324 AllNodes.push_back(N);
1325 return SDValue(N, 0);
1328 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1330 unsigned char TargetFlags) {
1331 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1333 FoldingSetNodeID ID;
1334 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1336 ID.AddInteger(TargetFlags);
1338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1339 return SDValue(E, 0);
1341 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1342 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1343 CSEMap.InsertNode(N, IP);
1344 AllNodes.push_back(N);
1345 return SDValue(N, 0);
1348 SDValue SelectionDAG::getSrcValue(const Value *V) {
1349 assert((!V || isa<PointerType>(V->getType())) &&
1350 "SrcValue is not a pointer?");
1352 FoldingSetNodeID ID;
1353 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1358 return SDValue(E, 0);
1360 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1361 new (N) SrcValueSDNode(V);
1362 CSEMap.InsertNode(N, IP);
1363 AllNodes.push_back(N);
1364 return SDValue(N, 0);
1367 /// getShiftAmountOperand - Return the specified value casted to
1368 /// the target's desired shift amount type.
1369 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1370 EVT OpTy = Op.getValueType();
1371 MVT ShTy = TLI.getShiftAmountTy();
1372 if (OpTy == ShTy || OpTy.isVector()) return Op;
1374 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1375 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1378 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1379 /// specified value type.
1380 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1381 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1382 unsigned ByteSize = VT.getStoreSize();
1383 const Type *Ty = VT.getTypeForEVT(*getContext());
1384 unsigned StackAlign =
1385 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1387 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1388 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1391 /// CreateStackTemporary - Create a stack temporary suitable for holding
1392 /// either of the specified value types.
1393 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1394 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1395 VT2.getStoreSizeInBits())/8;
1396 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1397 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1398 const TargetData *TD = TLI.getTargetData();
1399 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1400 TD->getPrefTypeAlignment(Ty2));
1402 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1403 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1404 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1407 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1408 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1409 // These setcc operations always fold.
1413 case ISD::SETFALSE2: return getConstant(0, VT);
1415 case ISD::SETTRUE2: return getConstant(1, VT);
1427 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1431 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1432 const APInt &C2 = N2C->getAPIntValue();
1433 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1434 const APInt &C1 = N1C->getAPIntValue();
1437 default: llvm_unreachable("Unknown integer setcc!");
1438 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1439 case ISD::SETNE: return getConstant(C1 != C2, VT);
1440 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1441 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1442 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1443 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1444 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1445 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1446 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1447 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1451 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1452 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1453 // No compile time operations on this type yet.
1454 if (N1C->getValueType(0) == MVT::ppcf128)
1457 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1460 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1461 return getUNDEF(VT);
1463 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1464 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1465 return getUNDEF(VT);
1467 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1468 R==APFloat::cmpLessThan, VT);
1469 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1470 return getUNDEF(VT);
1472 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1473 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1474 return getUNDEF(VT);
1476 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1477 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1478 return getUNDEF(VT);
1480 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1481 R==APFloat::cmpEqual, VT);
1482 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1483 return getUNDEF(VT);
1485 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1486 R==APFloat::cmpEqual, VT);
1487 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1488 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1489 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1490 R==APFloat::cmpEqual, VT);
1491 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1492 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1493 R==APFloat::cmpLessThan, VT);
1494 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1495 R==APFloat::cmpUnordered, VT);
1496 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1497 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1500 // Ensure that the constant occurs on the RHS.
1501 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1505 // Could not fold it.
1509 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1510 /// use this predicate to simplify operations downstream.
1511 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1512 // This predicate is not safe for vector operations.
1513 if (Op.getValueType().isVector())
1516 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1517 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1520 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1521 /// this predicate to simplify operations downstream. Mask is known to be zero
1522 /// for bits that V cannot have.
1523 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1524 unsigned Depth) const {
1525 APInt KnownZero, KnownOne;
1526 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1527 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1528 return (KnownZero & Mask) == Mask;
1531 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1532 /// known to be either zero or one and return them in the KnownZero/KnownOne
1533 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1535 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1536 APInt &KnownZero, APInt &KnownOne,
1537 unsigned Depth) const {
1538 unsigned BitWidth = Mask.getBitWidth();
1539 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1540 "Mask size mismatches value type size!");
1542 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1543 if (Depth == 6 || Mask == 0)
1544 return; // Limit search depth.
1546 APInt KnownZero2, KnownOne2;
1548 switch (Op.getOpcode()) {
1550 // We know all of the bits for a constant!
1551 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1552 KnownZero = ~KnownOne & Mask;
1555 // If either the LHS or the RHS are Zero, the result is zero.
1556 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1557 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1558 KnownZero2, KnownOne2, Depth+1);
1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1560 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1562 // Output known-1 bits are only known if set in both the LHS & RHS.
1563 KnownOne &= KnownOne2;
1564 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1565 KnownZero |= KnownZero2;
1568 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1569 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1570 KnownZero2, KnownOne2, Depth+1);
1571 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1572 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1574 // Output known-0 bits are only known if clear in both the LHS & RHS.
1575 KnownZero &= KnownZero2;
1576 // Output known-1 are known to be set if set in either the LHS | RHS.
1577 KnownOne |= KnownOne2;
1580 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1581 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1582 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1583 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1585 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1586 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1587 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1588 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1589 KnownZero = KnownZeroOut;
1593 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1594 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1595 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1596 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1597 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1599 // If low bits are zero in either operand, output low known-0 bits.
1600 // Also compute a conserative estimate for high known-0 bits.
1601 // More trickiness is possible, but this is sufficient for the
1602 // interesting case of alignment computation.
1604 unsigned TrailZ = KnownZero.countTrailingOnes() +
1605 KnownZero2.countTrailingOnes();
1606 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1607 KnownZero2.countLeadingOnes(),
1608 BitWidth) - BitWidth;
1610 TrailZ = std::min(TrailZ, BitWidth);
1611 LeadZ = std::min(LeadZ, BitWidth);
1612 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1613 APInt::getHighBitsSet(BitWidth, LeadZ);
1618 // For the purposes of computing leading zeros we can conservatively
1619 // treat a udiv as a logical right shift by the power of 2 known to
1620 // be less than the denominator.
1621 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1622 ComputeMaskedBits(Op.getOperand(0),
1623 AllOnes, KnownZero2, KnownOne2, Depth+1);
1624 unsigned LeadZ = KnownZero2.countLeadingOnes();
1628 ComputeMaskedBits(Op.getOperand(1),
1629 AllOnes, KnownZero2, KnownOne2, Depth+1);
1630 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1631 if (RHSUnknownLeadingOnes != BitWidth)
1632 LeadZ = std::min(BitWidth,
1633 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1635 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1639 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1640 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1641 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1642 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1644 // Only known if known in both the LHS and RHS.
1645 KnownOne &= KnownOne2;
1646 KnownZero &= KnownZero2;
1648 case ISD::SELECT_CC:
1649 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1650 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1651 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1652 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1654 // Only known if known in both the LHS and RHS.
1655 KnownOne &= KnownOne2;
1656 KnownZero &= KnownZero2;
1664 if (Op.getResNo() != 1)
1666 // The boolean result conforms to getBooleanContents. Fall through.
1668 // If we know the result of a setcc has the top bits zero, use this info.
1669 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1671 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1674 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1675 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1676 unsigned ShAmt = SA->getZExtValue();
1678 // If the shift count is an invalid immediate, don't do anything.
1679 if (ShAmt >= BitWidth)
1682 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1683 KnownZero, KnownOne, Depth+1);
1684 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1685 KnownZero <<= ShAmt;
1687 // low bits known zero.
1688 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1692 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1693 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1694 unsigned ShAmt = SA->getZExtValue();
1696 // If the shift count is an invalid immediate, don't do anything.
1697 if (ShAmt >= BitWidth)
1700 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1701 KnownZero, KnownOne, Depth+1);
1702 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1703 KnownZero = KnownZero.lshr(ShAmt);
1704 KnownOne = KnownOne.lshr(ShAmt);
1706 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1707 KnownZero |= HighBits; // High bits known zero.
1711 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1712 unsigned ShAmt = SA->getZExtValue();
1714 // If the shift count is an invalid immediate, don't do anything.
1715 if (ShAmt >= BitWidth)
1718 APInt InDemandedMask = (Mask << ShAmt);
1719 // If any of the demanded bits are produced by the sign extension, we also
1720 // demand the input sign bit.
1721 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1722 if (HighBits.getBoolValue())
1723 InDemandedMask |= APInt::getSignBit(BitWidth);
1725 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1727 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1728 KnownZero = KnownZero.lshr(ShAmt);
1729 KnownOne = KnownOne.lshr(ShAmt);
1731 // Handle the sign bits.
1732 APInt SignBit = APInt::getSignBit(BitWidth);
1733 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1735 if (KnownZero.intersects(SignBit)) {
1736 KnownZero |= HighBits; // New bits are known zero.
1737 } else if (KnownOne.intersects(SignBit)) {
1738 KnownOne |= HighBits; // New bits are known one.
1742 case ISD::SIGN_EXTEND_INREG: {
1743 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1744 unsigned EBits = EVT.getSizeInBits();
1746 // Sign extension. Compute the demanded bits in the result that are not
1747 // present in the input.
1748 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1750 APInt InSignBit = APInt::getSignBit(EBits);
1751 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1753 // If the sign extended bits are demanded, we know that the sign
1755 InSignBit.zext(BitWidth);
1756 if (NewBits.getBoolValue())
1757 InputDemandedBits |= InSignBit;
1759 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1760 KnownZero, KnownOne, Depth+1);
1761 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1763 // If the sign bit of the input is known set or clear, then we know the
1764 // top bits of the result.
1765 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1766 KnownZero |= NewBits;
1767 KnownOne &= ~NewBits;
1768 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1769 KnownOne |= NewBits;
1770 KnownZero &= ~NewBits;
1771 } else { // Input sign bit unknown
1772 KnownZero &= ~NewBits;
1773 KnownOne &= ~NewBits;
1780 unsigned LowBits = Log2_32(BitWidth)+1;
1781 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1786 if (ISD::isZEXTLoad(Op.getNode())) {
1787 LoadSDNode *LD = cast<LoadSDNode>(Op);
1788 EVT VT = LD->getMemoryVT();
1789 unsigned MemBits = VT.getSizeInBits();
1790 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1794 case ISD::ZERO_EXTEND: {
1795 EVT InVT = Op.getOperand(0).getValueType();
1796 unsigned InBits = InVT.getScalarType().getSizeInBits();
1797 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1798 APInt InMask = Mask;
1799 InMask.trunc(InBits);
1800 KnownZero.trunc(InBits);
1801 KnownOne.trunc(InBits);
1802 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1803 KnownZero.zext(BitWidth);
1804 KnownOne.zext(BitWidth);
1805 KnownZero |= NewBits;
1808 case ISD::SIGN_EXTEND: {
1809 EVT InVT = Op.getOperand(0).getValueType();
1810 unsigned InBits = InVT.getScalarType().getSizeInBits();
1811 APInt InSignBit = APInt::getSignBit(InBits);
1812 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1813 APInt InMask = Mask;
1814 InMask.trunc(InBits);
1816 // If any of the sign extended bits are demanded, we know that the sign
1817 // bit is demanded. Temporarily set this bit in the mask for our callee.
1818 if (NewBits.getBoolValue())
1819 InMask |= InSignBit;
1821 KnownZero.trunc(InBits);
1822 KnownOne.trunc(InBits);
1823 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1825 // Note if the sign bit is known to be zero or one.
1826 bool SignBitKnownZero = KnownZero.isNegative();
1827 bool SignBitKnownOne = KnownOne.isNegative();
1828 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1829 "Sign bit can't be known to be both zero and one!");
1831 // If the sign bit wasn't actually demanded by our caller, we don't
1832 // want it set in the KnownZero and KnownOne result values. Reset the
1833 // mask and reapply it to the result values.
1835 InMask.trunc(InBits);
1836 KnownZero &= InMask;
1839 KnownZero.zext(BitWidth);
1840 KnownOne.zext(BitWidth);
1842 // If the sign bit is known zero or one, the top bits match.
1843 if (SignBitKnownZero)
1844 KnownZero |= NewBits;
1845 else if (SignBitKnownOne)
1846 KnownOne |= NewBits;
1849 case ISD::ANY_EXTEND: {
1850 EVT InVT = Op.getOperand(0).getValueType();
1851 unsigned InBits = InVT.getScalarType().getSizeInBits();
1852 APInt InMask = Mask;
1853 InMask.trunc(InBits);
1854 KnownZero.trunc(InBits);
1855 KnownOne.trunc(InBits);
1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1857 KnownZero.zext(BitWidth);
1858 KnownOne.zext(BitWidth);
1861 case ISD::TRUNCATE: {
1862 EVT InVT = Op.getOperand(0).getValueType();
1863 unsigned InBits = InVT.getScalarType().getSizeInBits();
1864 APInt InMask = Mask;
1865 InMask.zext(InBits);
1866 KnownZero.zext(InBits);
1867 KnownOne.zext(InBits);
1868 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1869 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1870 KnownZero.trunc(BitWidth);
1871 KnownOne.trunc(BitWidth);
1874 case ISD::AssertZext: {
1875 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1876 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1877 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1879 KnownZero |= (~InMask) & Mask;
1883 // All bits are zero except the low bit.
1884 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1888 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1889 // We know that the top bits of C-X are clear if X contains less bits
1890 // than C (i.e. no wrap-around can happen). For example, 20-X is
1891 // positive if we can prove that X is >= 0 and < 16.
1892 if (CLHS->getAPIntValue().isNonNegative()) {
1893 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1894 // NLZ can't be BitWidth with no sign bit
1895 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1896 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1899 // If all of the MaskV bits are known to be zero, then we know the
1900 // output top bits are zero, because we now know that the output is
1902 if ((KnownZero2 & MaskV) == MaskV) {
1903 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1904 // Top bits known zero.
1905 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1912 // Output known-0 bits are known if clear or set in both the low clear bits
1913 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1914 // low 3 bits clear.
1915 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1916 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1917 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1918 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1920 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1921 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1922 KnownZeroOut = std::min(KnownZeroOut,
1923 KnownZero2.countTrailingOnes());
1925 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1929 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1930 const APInt &RA = Rem->getAPIntValue();
1931 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1932 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1933 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1934 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1936 // If the sign bit of the first operand is zero, the sign bit of
1937 // the result is zero. If the first operand has no one bits below
1938 // the second operand's single 1 bit, its sign will be zero.
1939 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1940 KnownZero2 |= ~LowBits;
1942 KnownZero |= KnownZero2 & Mask;
1944 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1949 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1950 const APInt &RA = Rem->getAPIntValue();
1951 if (RA.isPowerOf2()) {
1952 APInt LowBits = (RA - 1);
1953 APInt Mask2 = LowBits & Mask;
1954 KnownZero |= ~LowBits & Mask;
1955 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1956 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1961 // Since the result is less than or equal to either operand, any leading
1962 // zero bits in either operand must also exist in the result.
1963 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1964 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1966 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1969 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1970 KnownZero2.countLeadingOnes());
1972 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1976 // Allow the target to implement this method for its nodes.
1977 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1978 case ISD::INTRINSIC_WO_CHAIN:
1979 case ISD::INTRINSIC_W_CHAIN:
1980 case ISD::INTRINSIC_VOID:
1981 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1988 /// ComputeNumSignBits - Return the number of times the sign bit of the
1989 /// register is replicated into the other bits. We know that at least 1 bit
1990 /// is always equal to the sign bit (itself), but other cases can give us
1991 /// information. For example, immediately after an "SRA X, 2", we know that
1992 /// the top 3 bits are all equal to each other, so we return 3.
1993 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1994 EVT VT = Op.getValueType();
1995 assert(VT.isInteger() && "Invalid VT!");
1996 unsigned VTBits = VT.getScalarType().getSizeInBits();
1998 unsigned FirstAnswer = 1;
2001 return 1; // Limit search depth.
2003 switch (Op.getOpcode()) {
2005 case ISD::AssertSext:
2006 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2007 return VTBits-Tmp+1;
2008 case ISD::AssertZext:
2009 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2012 case ISD::Constant: {
2013 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2014 // If negative, return # leading ones.
2015 if (Val.isNegative())
2016 return Val.countLeadingOnes();
2018 // Return # leading zeros.
2019 return Val.countLeadingZeros();
2022 case ISD::SIGN_EXTEND:
2023 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2024 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2026 case ISD::SIGN_EXTEND_INREG:
2027 // Max of the input and what this extends.
2028 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2031 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2032 return std::max(Tmp, Tmp2);
2035 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2036 // SRA X, C -> adds C sign bits.
2037 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2038 Tmp += C->getZExtValue();
2039 if (Tmp > VTBits) Tmp = VTBits;
2043 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2044 // shl destroys sign bits.
2045 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2046 if (C->getZExtValue() >= VTBits || // Bad shift.
2047 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2048 return Tmp - C->getZExtValue();
2053 case ISD::XOR: // NOT is handled here.
2054 // Logical binary ops preserve the number of sign bits at the worst.
2055 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2057 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2058 FirstAnswer = std::min(Tmp, Tmp2);
2059 // We computed what we know about the sign bits as our first
2060 // answer. Now proceed to the generic code that uses
2061 // ComputeMaskedBits, and pick whichever answer is better.
2066 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2067 if (Tmp == 1) return 1; // Early out.
2068 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2069 return std::min(Tmp, Tmp2);
2077 if (Op.getResNo() != 1)
2079 // The boolean result conforms to getBooleanContents. Fall through.
2081 // If setcc returns 0/-1, all bits are sign bits.
2082 if (TLI.getBooleanContents() ==
2083 TargetLowering::ZeroOrNegativeOneBooleanContent)
2088 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2089 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2091 // Handle rotate right by N like a rotate left by 32-N.
2092 if (Op.getOpcode() == ISD::ROTR)
2093 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2095 // If we aren't rotating out all of the known-in sign bits, return the
2096 // number that are left. This handles rotl(sext(x), 1) for example.
2097 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2098 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2102 // Add can have at most one carry bit. Thus we know that the output
2103 // is, at worst, one more bit than the inputs.
2104 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2105 if (Tmp == 1) return 1; // Early out.
2107 // Special case decrementing a value (ADD X, -1):
2108 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2109 if (CRHS->isAllOnesValue()) {
2110 APInt KnownZero, KnownOne;
2111 APInt Mask = APInt::getAllOnesValue(VTBits);
2112 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2114 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2116 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2119 // If we are subtracting one from a positive number, there is no carry
2120 // out of the result.
2121 if (KnownZero.isNegative())
2125 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2126 if (Tmp2 == 1) return 1;
2127 return std::min(Tmp, Tmp2)-1;
2131 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2132 if (Tmp2 == 1) return 1;
2135 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2136 if (CLHS->isNullValue()) {
2137 APInt KnownZero, KnownOne;
2138 APInt Mask = APInt::getAllOnesValue(VTBits);
2139 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2140 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2142 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2145 // If the input is known to be positive (the sign bit is known clear),
2146 // the output of the NEG has the same number of sign bits as the input.
2147 if (KnownZero.isNegative())
2150 // Otherwise, we treat this like a SUB.
2153 // Sub can have at most one carry bit. Thus we know that the output
2154 // is, at worst, one more bit than the inputs.
2155 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2156 if (Tmp == 1) return 1; // Early out.
2157 return std::min(Tmp, Tmp2)-1;
2160 // FIXME: it's tricky to do anything useful for this, but it is an important
2161 // case for targets like X86.
2165 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2166 if (Op.getOpcode() == ISD::LOAD) {
2167 LoadSDNode *LD = cast<LoadSDNode>(Op);
2168 unsigned ExtType = LD->getExtensionType();
2171 case ISD::SEXTLOAD: // '17' bits known
2172 Tmp = LD->getMemoryVT().getSizeInBits();
2173 return VTBits-Tmp+1;
2174 case ISD::ZEXTLOAD: // '16' bits known
2175 Tmp = LD->getMemoryVT().getSizeInBits();
2180 // Allow the target to implement this method for its nodes.
2181 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2182 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2183 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2184 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2185 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2186 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2189 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2190 // use this information.
2191 APInt KnownZero, KnownOne;
2192 APInt Mask = APInt::getAllOnesValue(VTBits);
2193 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2195 if (KnownZero.isNegative()) { // sign bit is 0
2197 } else if (KnownOne.isNegative()) { // sign bit is 1;
2204 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2205 // the number of identical bits in the top of the input value.
2207 Mask <<= Mask.getBitWidth()-VTBits;
2208 // Return # leading zeros. We use 'min' here in case Val was zero before
2209 // shifting. We don't want to return '64' as for an i32 "0".
2210 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2213 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2214 // If we're told that NaNs won't happen, assume they won't.
2215 if (FiniteOnlyFPMath())
2218 // If the value is a constant, we can obviously see if it is a NaN or not.
2219 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2220 return !C->getValueAPF().isNaN();
2222 // TODO: Recognize more cases here.
2227 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2228 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2229 if (!GA) return false;
2230 if (GA->getOffset() != 0) return false;
2231 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2232 if (!GV) return false;
2233 MachineModuleInfo *MMI = getMachineModuleInfo();
2234 return MMI && MMI->hasDebugInfo();
2238 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2239 /// element of the result of the vector shuffle.
2240 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2242 EVT VT = N->getValueType(0);
2243 DebugLoc dl = N->getDebugLoc();
2244 if (N->getMaskElt(i) < 0)
2245 return getUNDEF(VT.getVectorElementType());
2246 unsigned Index = N->getMaskElt(i);
2247 unsigned NumElems = VT.getVectorNumElements();
2248 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2251 if (V.getOpcode() == ISD::BIT_CONVERT) {
2252 V = V.getOperand(0);
2253 EVT VVT = V.getValueType();
2254 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2257 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2258 return (Index == 0) ? V.getOperand(0)
2259 : getUNDEF(VT.getVectorElementType());
2260 if (V.getOpcode() == ISD::BUILD_VECTOR)
2261 return V.getOperand(Index);
2262 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2263 return getShuffleScalarElt(SVN, Index);
2268 /// getNode - Gets or creates the specified node.
2270 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2271 FoldingSetNodeID ID;
2272 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2274 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2275 return SDValue(E, 0);
2277 SDNode *N = NodeAllocator.Allocate<SDNode>();
2278 new (N) SDNode(Opcode, DL, getVTList(VT));
2279 CSEMap.InsertNode(N, IP);
2281 AllNodes.push_back(N);
2285 return SDValue(N, 0);
2288 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2289 EVT VT, SDValue Operand) {
2290 // Constant fold unary operations with an integer constant operand.
2291 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2292 const APInt &Val = C->getAPIntValue();
2293 unsigned BitWidth = VT.getSizeInBits();
2296 case ISD::SIGN_EXTEND:
2297 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2298 case ISD::ANY_EXTEND:
2299 case ISD::ZERO_EXTEND:
2301 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2302 case ISD::UINT_TO_FP:
2303 case ISD::SINT_TO_FP: {
2304 const uint64_t zero[] = {0, 0};
2305 // No compile time operations on this type.
2306 if (VT==MVT::ppcf128)
2308 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2309 (void)apf.convertFromAPInt(Val,
2310 Opcode==ISD::SINT_TO_FP,
2311 APFloat::rmNearestTiesToEven);
2312 return getConstantFP(apf, VT);
2314 case ISD::BIT_CONVERT:
2315 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2316 return getConstantFP(Val.bitsToFloat(), VT);
2317 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2318 return getConstantFP(Val.bitsToDouble(), VT);
2321 return getConstant(Val.byteSwap(), VT);
2323 return getConstant(Val.countPopulation(), VT);
2325 return getConstant(Val.countLeadingZeros(), VT);
2327 return getConstant(Val.countTrailingZeros(), VT);
2331 // Constant fold unary operations with a floating point constant operand.
2332 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2333 APFloat V = C->getValueAPF(); // make copy
2334 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2338 return getConstantFP(V, VT);
2341 return getConstantFP(V, VT);
2343 case ISD::FP_EXTEND: {
2345 // This can return overflow, underflow, or inexact; we don't care.
2346 // FIXME need to be more flexible about rounding mode.
2347 (void)V.convert(*EVTToAPFloatSemantics(VT),
2348 APFloat::rmNearestTiesToEven, &ignored);
2349 return getConstantFP(V, VT);
2351 case ISD::FP_TO_SINT:
2352 case ISD::FP_TO_UINT: {
2355 assert(integerPartWidth >= 64);
2356 // FIXME need to be more flexible about rounding mode.
2357 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2358 Opcode==ISD::FP_TO_SINT,
2359 APFloat::rmTowardZero, &ignored);
2360 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2362 APInt api(VT.getSizeInBits(), 2, x);
2363 return getConstant(api, VT);
2365 case ISD::BIT_CONVERT:
2366 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2367 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2368 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2369 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2375 unsigned OpOpcode = Operand.getNode()->getOpcode();
2377 case ISD::TokenFactor:
2378 case ISD::MERGE_VALUES:
2379 case ISD::CONCAT_VECTORS:
2380 return Operand; // Factor, merge or concat of one node? No need.
2381 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2382 case ISD::FP_EXTEND:
2383 assert(VT.isFloatingPoint() &&
2384 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2385 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2386 assert((!VT.isVector() ||
2387 VT.getVectorNumElements() ==
2388 Operand.getValueType().getVectorNumElements()) &&
2389 "Vector element count mismatch!");
2390 if (Operand.getOpcode() == ISD::UNDEF)
2391 return getUNDEF(VT);
2393 case ISD::SIGN_EXTEND:
2394 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2395 "Invalid SIGN_EXTEND!");
2396 if (Operand.getValueType() == VT) return Operand; // noop extension
2397 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2398 "Invalid sext node, dst < src!");
2399 assert((!VT.isVector() ||
2400 VT.getVectorNumElements() ==
2401 Operand.getValueType().getVectorNumElements()) &&
2402 "Vector element count mismatch!");
2403 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2404 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2406 case ISD::ZERO_EXTEND:
2407 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2408 "Invalid ZERO_EXTEND!");
2409 if (Operand.getValueType() == VT) return Operand; // noop extension
2410 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2411 "Invalid zext node, dst < src!");
2412 assert((!VT.isVector() ||
2413 VT.getVectorNumElements() ==
2414 Operand.getValueType().getVectorNumElements()) &&
2415 "Vector element count mismatch!");
2416 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2417 return getNode(ISD::ZERO_EXTEND, DL, VT,
2418 Operand.getNode()->getOperand(0));
2420 case ISD::ANY_EXTEND:
2421 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2422 "Invalid ANY_EXTEND!");
2423 if (Operand.getValueType() == VT) return Operand; // noop extension
2424 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2425 "Invalid anyext node, dst < src!");
2426 assert((!VT.isVector() ||
2427 VT.getVectorNumElements() ==
2428 Operand.getValueType().getVectorNumElements()) &&
2429 "Vector element count mismatch!");
2430 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2431 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2432 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2435 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2436 "Invalid TRUNCATE!");
2437 if (Operand.getValueType() == VT) return Operand; // noop truncate
2438 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2439 "Invalid truncate node, src < dst!");
2440 assert((!VT.isVector() ||
2441 VT.getVectorNumElements() ==
2442 Operand.getValueType().getVectorNumElements()) &&
2443 "Vector element count mismatch!");
2444 if (OpOpcode == ISD::TRUNCATE)
2445 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2446 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2447 OpOpcode == ISD::ANY_EXTEND) {
2448 // If the source is smaller than the dest, we still need an extend.
2449 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2450 .bitsLT(VT.getScalarType()))
2451 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2452 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2453 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2455 return Operand.getNode()->getOperand(0);
2458 case ISD::BIT_CONVERT:
2459 // Basic sanity checking.
2460 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2461 && "Cannot BIT_CONVERT between types of different sizes!");
2462 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2463 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2464 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2465 if (OpOpcode == ISD::UNDEF)
2466 return getUNDEF(VT);
2468 case ISD::SCALAR_TO_VECTOR:
2469 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2470 (VT.getVectorElementType() == Operand.getValueType() ||
2471 (VT.getVectorElementType().isInteger() &&
2472 Operand.getValueType().isInteger() &&
2473 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2474 "Illegal SCALAR_TO_VECTOR node!");
2475 if (OpOpcode == ISD::UNDEF)
2476 return getUNDEF(VT);
2477 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2478 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2479 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2480 Operand.getConstantOperandVal(1) == 0 &&
2481 Operand.getOperand(0).getValueType() == VT)
2482 return Operand.getOperand(0);
2485 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2486 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2487 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2488 Operand.getNode()->getOperand(0));
2489 if (OpOpcode == ISD::FNEG) // --X -> X
2490 return Operand.getNode()->getOperand(0);
2493 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2494 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2499 SDVTList VTs = getVTList(VT);
2500 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2501 FoldingSetNodeID ID;
2502 SDValue Ops[1] = { Operand };
2503 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2505 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2506 return SDValue(E, 0);
2508 N = NodeAllocator.Allocate<UnarySDNode>();
2509 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2510 CSEMap.InsertNode(N, IP);
2512 N = NodeAllocator.Allocate<UnarySDNode>();
2513 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2516 AllNodes.push_back(N);
2520 return SDValue(N, 0);
2523 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2525 ConstantSDNode *Cst1,
2526 ConstantSDNode *Cst2) {
2527 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2530 case ISD::ADD: return getConstant(C1 + C2, VT);
2531 case ISD::SUB: return getConstant(C1 - C2, VT);
2532 case ISD::MUL: return getConstant(C1 * C2, VT);
2534 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2537 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2540 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2543 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2545 case ISD::AND: return getConstant(C1 & C2, VT);
2546 case ISD::OR: return getConstant(C1 | C2, VT);
2547 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2548 case ISD::SHL: return getConstant(C1 << C2, VT);
2549 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2550 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2551 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2552 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2559 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2560 SDValue N1, SDValue N2) {
2561 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2562 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2565 case ISD::TokenFactor:
2566 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2567 N2.getValueType() == MVT::Other && "Invalid token factor!");
2568 // Fold trivial token factors.
2569 if (N1.getOpcode() == ISD::EntryToken) return N2;
2570 if (N2.getOpcode() == ISD::EntryToken) return N1;
2571 if (N1 == N2) return N1;
2573 case ISD::CONCAT_VECTORS:
2574 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2575 // one big BUILD_VECTOR.
2576 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2577 N2.getOpcode() == ISD::BUILD_VECTOR) {
2578 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2579 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2580 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2584 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2585 N1.getValueType() == VT && "Binary operator types must match!");
2586 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2587 // worth handling here.
2588 if (N2C && N2C->isNullValue())
2590 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2597 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2598 N1.getValueType() == VT && "Binary operator types must match!");
2599 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2600 // it's worth handling here.
2601 if (N2C && N2C->isNullValue())
2611 assert(VT.isInteger() && "This operator does not apply to FP types!");
2619 if (Opcode == ISD::FADD) {
2621 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2622 if (CFP->getValueAPF().isZero())
2625 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2626 if (CFP->getValueAPF().isZero())
2628 } else if (Opcode == ISD::FSUB) {
2630 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2631 if (CFP->getValueAPF().isZero())
2635 assert(N1.getValueType() == N2.getValueType() &&
2636 N1.getValueType() == VT && "Binary operator types must match!");
2638 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2639 assert(N1.getValueType() == VT &&
2640 N1.getValueType().isFloatingPoint() &&
2641 N2.getValueType().isFloatingPoint() &&
2642 "Invalid FCOPYSIGN!");
2649 assert(VT == N1.getValueType() &&
2650 "Shift operators return type must be the same as their first arg");
2651 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2652 "Shifts only work on integers");
2654 // Always fold shifts of i1 values so the code generator doesn't need to
2655 // handle them. Since we know the size of the shift has to be less than the
2656 // size of the value, the shift/rotate count is guaranteed to be zero.
2660 case ISD::FP_ROUND_INREG: {
2661 EVT EVT = cast<VTSDNode>(N2)->getVT();
2662 assert(VT == N1.getValueType() && "Not an inreg round!");
2663 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2664 "Cannot FP_ROUND_INREG integer types");
2665 assert(EVT.bitsLE(VT) && "Not rounding down!");
2666 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2670 assert(VT.isFloatingPoint() &&
2671 N1.getValueType().isFloatingPoint() &&
2672 VT.bitsLE(N1.getValueType()) &&
2673 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2674 if (N1.getValueType() == VT) return N1; // noop conversion.
2676 case ISD::AssertSext:
2677 case ISD::AssertZext: {
2678 EVT EVT = cast<VTSDNode>(N2)->getVT();
2679 assert(VT == N1.getValueType() && "Not an inreg extend!");
2680 assert(VT.isInteger() && EVT.isInteger() &&
2681 "Cannot *_EXTEND_INREG FP types");
2682 assert(!EVT.isVector() &&
2683 "AssertSExt/AssertZExt type should be the vector element type "
2684 "rather than the vector type!");
2685 assert(EVT.bitsLE(VT) && "Not extending!");
2686 if (VT == EVT) return N1; // noop assertion.
2689 case ISD::SIGN_EXTEND_INREG: {
2690 EVT EVT = cast<VTSDNode>(N2)->getVT();
2691 assert(VT == N1.getValueType() && "Not an inreg extend!");
2692 assert(VT.isInteger() && EVT.isInteger() &&
2693 "Cannot *_EXTEND_INREG FP types");
2694 assert(!EVT.isVector() &&
2695 "SIGN_EXTEND_INREG type should be the vector element type rather "
2696 "than the vector type!");
2697 assert(EVT.bitsLE(VT.getScalarType()) && "Not extending!");
2698 if (EVT == VT) return N1; // Not actually extending
2701 APInt Val = N1C->getAPIntValue();
2702 unsigned FromBits = EVT.getSizeInBits();
2703 Val <<= Val.getBitWidth()-FromBits;
2704 Val = Val.ashr(Val.getBitWidth()-FromBits);
2705 return getConstant(Val, VT);
2709 case ISD::EXTRACT_VECTOR_ELT:
2710 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2711 if (N1.getOpcode() == ISD::UNDEF)
2712 return getUNDEF(VT);
2714 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2715 // expanding copies of large vectors from registers.
2717 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2718 N1.getNumOperands() > 0) {
2720 N1.getOperand(0).getValueType().getVectorNumElements();
2721 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2722 N1.getOperand(N2C->getZExtValue() / Factor),
2723 getConstant(N2C->getZExtValue() % Factor,
2724 N2.getValueType()));
2727 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2728 // expanding large vector constants.
2729 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2730 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2731 EVT VEltTy = N1.getValueType().getVectorElementType();
2732 if (Elt.getValueType() != VEltTy) {
2733 // If the vector element type is not legal, the BUILD_VECTOR operands
2734 // are promoted and implicitly truncated. Make that explicit here.
2735 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2738 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2739 // result is implicitly extended.
2740 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2745 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2746 // operations are lowered to scalars.
2747 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2748 // If the indices are the same, return the inserted element.
2749 if (N1.getOperand(2) == N2)
2750 return N1.getOperand(1);
2751 // If the indices are known different, extract the element from
2752 // the original vector.
2753 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2754 isa<ConstantSDNode>(N2))
2755 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2758 case ISD::EXTRACT_ELEMENT:
2759 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2760 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2761 (N1.getValueType().isInteger() == VT.isInteger()) &&
2762 "Wrong types for EXTRACT_ELEMENT!");
2764 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2765 // 64-bit integers into 32-bit parts. Instead of building the extract of
2766 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2767 if (N1.getOpcode() == ISD::BUILD_PAIR)
2768 return N1.getOperand(N2C->getZExtValue());
2770 // EXTRACT_ELEMENT of a constant int is also very common.
2771 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2772 unsigned ElementSize = VT.getSizeInBits();
2773 unsigned Shift = ElementSize * N2C->getZExtValue();
2774 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2775 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2778 case ISD::EXTRACT_SUBVECTOR:
2779 if (N1.getValueType() == VT) // Trivial extraction.
2786 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2787 if (SV.getNode()) return SV;
2788 } else { // Cannonicalize constant to RHS if commutative
2789 if (isCommutativeBinOp(Opcode)) {
2790 std::swap(N1C, N2C);
2796 // Constant fold FP operations.
2797 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2798 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2800 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2801 // Cannonicalize constant to RHS if commutative
2802 std::swap(N1CFP, N2CFP);
2804 } else if (N2CFP && VT != MVT::ppcf128) {
2805 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2806 APFloat::opStatus s;
2809 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2810 if (s != APFloat::opInvalidOp)
2811 return getConstantFP(V1, VT);
2814 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2815 if (s!=APFloat::opInvalidOp)
2816 return getConstantFP(V1, VT);
2819 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2820 if (s!=APFloat::opInvalidOp)
2821 return getConstantFP(V1, VT);
2824 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2825 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2826 return getConstantFP(V1, VT);
2829 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2830 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2831 return getConstantFP(V1, VT);
2833 case ISD::FCOPYSIGN:
2835 return getConstantFP(V1, VT);
2841 // Canonicalize an UNDEF to the RHS, even over a constant.
2842 if (N1.getOpcode() == ISD::UNDEF) {
2843 if (isCommutativeBinOp(Opcode)) {
2847 case ISD::FP_ROUND_INREG:
2848 case ISD::SIGN_EXTEND_INREG:
2854 return N1; // fold op(undef, arg2) -> undef
2862 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2863 // For vectors, we can't easily build an all zero vector, just return
2870 // Fold a bunch of operators when the RHS is undef.
2871 if (N2.getOpcode() == ISD::UNDEF) {
2874 if (N1.getOpcode() == ISD::UNDEF)
2875 // Handle undef ^ undef -> 0 special case. This is a common
2877 return getConstant(0, VT);
2887 return N2; // fold op(arg1, undef) -> undef
2901 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2902 // For vectors, we can't easily build an all zero vector, just return
2907 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2908 // For vectors, we can't easily build an all one vector, just return
2916 // Memoize this node if possible.
2918 SDVTList VTs = getVTList(VT);
2919 if (VT != MVT::Flag) {
2920 SDValue Ops[] = { N1, N2 };
2921 FoldingSetNodeID ID;
2922 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2924 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2925 return SDValue(E, 0);
2927 N = NodeAllocator.Allocate<BinarySDNode>();
2928 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2929 CSEMap.InsertNode(N, IP);
2931 N = NodeAllocator.Allocate<BinarySDNode>();
2932 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2935 AllNodes.push_back(N);
2939 return SDValue(N, 0);
2942 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2943 SDValue N1, SDValue N2, SDValue N3) {
2944 // Perform various simplifications.
2945 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2946 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2948 case ISD::CONCAT_VECTORS:
2949 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2950 // one big BUILD_VECTOR.
2951 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2952 N2.getOpcode() == ISD::BUILD_VECTOR &&
2953 N3.getOpcode() == ISD::BUILD_VECTOR) {
2954 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2955 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2956 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2957 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2961 // Use FoldSetCC to simplify SETCC's.
2962 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2963 if (Simp.getNode()) return Simp;
2968 if (N1C->getZExtValue())
2969 return N2; // select true, X, Y -> X
2971 return N3; // select false, X, Y -> Y
2974 if (N2 == N3) return N2; // select C, X, X -> X
2978 if (N2C->getZExtValue()) // Unconditional branch
2979 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2981 return N1; // Never-taken branch
2984 case ISD::VECTOR_SHUFFLE:
2985 llvm_unreachable("should use getVectorShuffle constructor!");
2987 case ISD::BIT_CONVERT:
2988 // Fold bit_convert nodes from a type to themselves.
2989 if (N1.getValueType() == VT)
2994 // Memoize node if it doesn't produce a flag.
2996 SDVTList VTs = getVTList(VT);
2997 if (VT != MVT::Flag) {
2998 SDValue Ops[] = { N1, N2, N3 };
2999 FoldingSetNodeID ID;
3000 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3003 return SDValue(E, 0);
3005 N = NodeAllocator.Allocate<TernarySDNode>();
3006 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3007 CSEMap.InsertNode(N, IP);
3009 N = NodeAllocator.Allocate<TernarySDNode>();
3010 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3013 AllNodes.push_back(N);
3017 return SDValue(N, 0);
3020 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3021 SDValue N1, SDValue N2, SDValue N3,
3023 SDValue Ops[] = { N1, N2, N3, N4 };
3024 return getNode(Opcode, DL, VT, Ops, 4);
3027 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3028 SDValue N1, SDValue N2, SDValue N3,
3029 SDValue N4, SDValue N5) {
3030 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3031 return getNode(Opcode, DL, VT, Ops, 5);
3034 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3035 /// the incoming stack arguments to be loaded from the stack.
3036 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3037 SmallVector<SDValue, 8> ArgChains;
3039 // Include the original chain at the beginning of the list. When this is
3040 // used by target LowerCall hooks, this helps legalize find the
3041 // CALLSEQ_BEGIN node.
3042 ArgChains.push_back(Chain);
3044 // Add a chain value for each stack argument.
3045 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3046 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3047 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3048 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3049 if (FI->getIndex() < 0)
3050 ArgChains.push_back(SDValue(L, 1));
3052 // Build a tokenfactor for all the chains.
3053 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3054 &ArgChains[0], ArgChains.size());
3057 /// getMemsetValue - Vectorized representation of the memset value
3059 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3061 unsigned NumBits = VT.isVector() ?
3062 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3064 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3066 for (unsigned i = NumBits; i > 8; i >>= 1) {
3067 Val = (Val << Shift) | Val;
3071 return DAG.getConstant(Val, VT);
3072 return DAG.getConstantFP(APFloat(Val), VT);
3075 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3076 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3078 for (unsigned i = NumBits; i > 8; i >>= 1) {
3079 Value = DAG.getNode(ISD::OR, dl, VT,
3080 DAG.getNode(ISD::SHL, dl, VT, Value,
3081 DAG.getConstant(Shift,
3082 TLI.getShiftAmountTy())),
3090 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3091 /// used when a memcpy is turned into a memset when the source is a constant
3093 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3094 const TargetLowering &TLI,
3095 std::string &Str, unsigned Offset) {
3096 // Handle vector with all elements zero.
3099 return DAG.getConstant(0, VT);
3100 unsigned NumElts = VT.getVectorNumElements();
3101 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3102 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3104 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3107 assert(!VT.isVector() && "Can't handle vector type here!");
3108 unsigned NumBits = VT.getSizeInBits();
3109 unsigned MSB = NumBits / 8;
3111 if (TLI.isLittleEndian())
3112 Offset = Offset + MSB - 1;
3113 for (unsigned i = 0; i != MSB; ++i) {
3114 Val = (Val << 8) | (unsigned char)Str[Offset];
3115 Offset += TLI.isLittleEndian() ? -1 : 1;
3117 return DAG.getConstant(Val, VT);
3120 /// getMemBasePlusOffset - Returns base and offset node for the
3122 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3123 SelectionDAG &DAG) {
3124 EVT VT = Base.getValueType();
3125 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3126 VT, Base, DAG.getConstant(Offset, VT));
3129 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3131 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3132 unsigned SrcDelta = 0;
3133 GlobalAddressSDNode *G = NULL;
3134 if (Src.getOpcode() == ISD::GlobalAddress)
3135 G = cast<GlobalAddressSDNode>(Src);
3136 else if (Src.getOpcode() == ISD::ADD &&
3137 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3138 Src.getOperand(1).getOpcode() == ISD::Constant) {
3139 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3140 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3145 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3146 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3152 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3153 /// to replace the memset / memcpy is below the threshold. It also returns the
3154 /// types of the sequence of memory ops to perform memset / memcpy.
3156 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3157 SDValue Dst, SDValue Src,
3158 unsigned Limit, uint64_t Size, unsigned &Align,
3159 std::string &Str, bool &isSrcStr,
3161 const TargetLowering &TLI) {
3162 isSrcStr = isMemSrcFromString(Src, Str);
3163 bool isSrcConst = isa<ConstantSDNode>(Src);
3164 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3165 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3166 if (VT != MVT::iAny) {
3167 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3168 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3169 // If source is a string constant, this will require an unaligned load.
3170 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3171 if (Dst.getOpcode() != ISD::FrameIndex) {
3172 // Can't change destination alignment. It requires a unaligned store.
3176 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3177 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3178 if (MFI->isFixedObjectIndex(FI)) {
3179 // Can't change destination alignment. It requires a unaligned store.
3183 // Give the stack frame object a larger alignment if needed.
3184 if (MFI->getObjectAlignment(FI) < NewAlign)
3185 MFI->setObjectAlignment(FI, NewAlign);
3192 if (VT == MVT::iAny) {
3193 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3196 switch (Align & 7) {
3197 case 0: VT = MVT::i64; break;
3198 case 4: VT = MVT::i32; break;
3199 case 2: VT = MVT::i16; break;
3200 default: VT = MVT::i8; break;
3205 while (!TLI.isTypeLegal(LVT))
3206 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3207 assert(LVT.isInteger());
3213 unsigned NumMemOps = 0;
3215 unsigned VTSize = VT.getSizeInBits() / 8;
3216 while (VTSize > Size) {
3217 // For now, only use non-vector load / store's for the left-over pieces.
3218 if (VT.isVector()) {
3220 while (!TLI.isTypeLegal(VT))
3221 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3222 VTSize = VT.getSizeInBits() / 8;
3224 // This can result in a type that is not legal on the target, e.g.
3225 // 1 or 2 bytes on PPC.
3226 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3231 if (++NumMemOps > Limit)
3233 MemOps.push_back(VT);
3240 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3241 SDValue Chain, SDValue Dst,
3242 SDValue Src, uint64_t Size,
3243 unsigned Align, bool AlwaysInline,
3244 const Value *DstSV, uint64_t DstSVOff,
3245 const Value *SrcSV, uint64_t SrcSVOff){
3246 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3248 // Expand memcpy to a series of load and store ops if the size operand falls
3249 // below a certain threshold.
3250 std::vector<EVT> MemOps;
3251 uint64_t Limit = -1ULL;
3253 Limit = TLI.getMaxStoresPerMemcpy();
3254 unsigned DstAlign = Align; // Destination alignment can change.
3257 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3258 Str, CopyFromStr, DAG, TLI))
3262 bool isZeroStr = CopyFromStr && Str.empty();
3263 SmallVector<SDValue, 8> OutChains;
3264 unsigned NumMemOps = MemOps.size();
3265 uint64_t SrcOff = 0, DstOff = 0;
3266 for (unsigned i = 0; i != NumMemOps; ++i) {
3268 unsigned VTSize = VT.getSizeInBits() / 8;
3269 SDValue Value, Store;
3271 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3272 // It's unlikely a store of a vector immediate can be done in a single
3273 // instruction. It would require a load from a constantpool first.
3274 // We also handle store a vector with all zero's.
3275 // FIXME: Handle other cases where store of vector immediate is done in
3276 // a single instruction.
3277 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3278 Store = DAG.getStore(Chain, dl, Value,
3279 getMemBasePlusOffset(Dst, DstOff, DAG),
3280 DstSV, DstSVOff + DstOff, false, DstAlign);
3282 // The type might not be legal for the target. This should only happen
3283 // if the type is smaller than a legal type, as on PPC, so the right
3284 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3285 // to Load/Store if NVT==VT.
3286 // FIXME does the case above also need this?
3287 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3288 assert(NVT.bitsGE(VT));
3289 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3290 getMemBasePlusOffset(Src, SrcOff, DAG),
3291 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3292 Store = DAG.getTruncStore(Chain, dl, Value,
3293 getMemBasePlusOffset(Dst, DstOff, DAG),
3294 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3296 OutChains.push_back(Store);
3301 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3302 &OutChains[0], OutChains.size());
3305 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3306 SDValue Chain, SDValue Dst,
3307 SDValue Src, uint64_t Size,
3308 unsigned Align, bool AlwaysInline,
3309 const Value *DstSV, uint64_t DstSVOff,
3310 const Value *SrcSV, uint64_t SrcSVOff){
3311 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3313 // Expand memmove to a series of load and store ops if the size operand falls
3314 // below a certain threshold.
3315 std::vector<EVT> MemOps;
3316 uint64_t Limit = -1ULL;
3318 Limit = TLI.getMaxStoresPerMemmove();
3319 unsigned DstAlign = Align; // Destination alignment can change.
3322 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3323 Str, CopyFromStr, DAG, TLI))
3326 uint64_t SrcOff = 0, DstOff = 0;
3328 SmallVector<SDValue, 8> LoadValues;
3329 SmallVector<SDValue, 8> LoadChains;
3330 SmallVector<SDValue, 8> OutChains;
3331 unsigned NumMemOps = MemOps.size();
3332 for (unsigned i = 0; i < NumMemOps; i++) {
3334 unsigned VTSize = VT.getSizeInBits() / 8;
3335 SDValue Value, Store;
3337 Value = DAG.getLoad(VT, dl, Chain,
3338 getMemBasePlusOffset(Src, SrcOff, DAG),
3339 SrcSV, SrcSVOff + SrcOff, false, Align);
3340 LoadValues.push_back(Value);
3341 LoadChains.push_back(Value.getValue(1));
3344 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3345 &LoadChains[0], LoadChains.size());
3347 for (unsigned i = 0; i < NumMemOps; i++) {
3349 unsigned VTSize = VT.getSizeInBits() / 8;
3350 SDValue Value, Store;
3352 Store = DAG.getStore(Chain, dl, LoadValues[i],
3353 getMemBasePlusOffset(Dst, DstOff, DAG),
3354 DstSV, DstSVOff + DstOff, false, DstAlign);
3355 OutChains.push_back(Store);
3359 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3360 &OutChains[0], OutChains.size());
3363 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3364 SDValue Chain, SDValue Dst,
3365 SDValue Src, uint64_t Size,
3367 const Value *DstSV, uint64_t DstSVOff) {
3368 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3370 // Expand memset to a series of load/store ops if the size operand
3371 // falls below a certain threshold.
3372 std::vector<EVT> MemOps;
3375 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3376 Size, Align, Str, CopyFromStr, DAG, TLI))
3379 SmallVector<SDValue, 8> OutChains;
3380 uint64_t DstOff = 0;
3382 unsigned NumMemOps = MemOps.size();
3383 for (unsigned i = 0; i < NumMemOps; i++) {
3385 unsigned VTSize = VT.getSizeInBits() / 8;
3386 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3387 SDValue Store = DAG.getStore(Chain, dl, Value,
3388 getMemBasePlusOffset(Dst, DstOff, DAG),
3389 DstSV, DstSVOff + DstOff);
3390 OutChains.push_back(Store);
3394 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3395 &OutChains[0], OutChains.size());
3398 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3399 SDValue Src, SDValue Size,
3400 unsigned Align, bool AlwaysInline,
3401 const Value *DstSV, uint64_t DstSVOff,
3402 const Value *SrcSV, uint64_t SrcSVOff) {
3404 // Check to see if we should lower the memcpy to loads and stores first.
3405 // For cases within the target-specified limits, this is the best choice.
3406 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3408 // Memcpy with size zero? Just return the original chain.
3409 if (ConstantSize->isNullValue())
3413 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3414 ConstantSize->getZExtValue(),
3415 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3416 if (Result.getNode())
3420 // Then check to see if we should lower the memcpy with target-specific
3421 // code. If the target chooses to do this, this is the next best.
3423 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3425 DstSV, DstSVOff, SrcSV, SrcSVOff);
3426 if (Result.getNode())
3429 // If we really need inline code and the target declined to provide it,
3430 // use a (potentially long) sequence of loads and stores.
3432 assert(ConstantSize && "AlwaysInline requires a constant size!");
3433 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3434 ConstantSize->getZExtValue(), Align, true,
3435 DstSV, DstSVOff, SrcSV, SrcSVOff);
3438 // Emit a library call.
3439 TargetLowering::ArgListTy Args;
3440 TargetLowering::ArgListEntry Entry;
3441 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3442 Entry.Node = Dst; Args.push_back(Entry);
3443 Entry.Node = Src; Args.push_back(Entry);
3444 Entry.Node = Size; Args.push_back(Entry);
3445 // FIXME: pass in DebugLoc
3446 std::pair<SDValue,SDValue> CallResult =
3447 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3448 false, false, false, false, 0,
3449 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3450 /*isReturnValueUsed=*/false,
3451 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3452 TLI.getPointerTy()),
3453 Args, *this, dl, GetOrdering(Chain.getNode()));
3454 return CallResult.second;
3457 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3458 SDValue Src, SDValue Size,
3460 const Value *DstSV, uint64_t DstSVOff,
3461 const Value *SrcSV, uint64_t SrcSVOff) {
3463 // Check to see if we should lower the memmove to loads and stores first.
3464 // For cases within the target-specified limits, this is the best choice.
3465 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3467 // Memmove with size zero? Just return the original chain.
3468 if (ConstantSize->isNullValue())
3472 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3473 ConstantSize->getZExtValue(),
3474 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3475 if (Result.getNode())
3479 // Then check to see if we should lower the memmove with target-specific
3480 // code. If the target chooses to do this, this is the next best.
3482 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3483 DstSV, DstSVOff, SrcSV, SrcSVOff);
3484 if (Result.getNode())
3487 // Emit a library call.
3488 TargetLowering::ArgListTy Args;
3489 TargetLowering::ArgListEntry Entry;
3490 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3491 Entry.Node = Dst; Args.push_back(Entry);
3492 Entry.Node = Src; Args.push_back(Entry);
3493 Entry.Node = Size; Args.push_back(Entry);
3494 // FIXME: pass in DebugLoc
3495 std::pair<SDValue,SDValue> CallResult =
3496 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3497 false, false, false, false, 0,
3498 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3499 /*isReturnValueUsed=*/false,
3500 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3501 TLI.getPointerTy()),
3502 Args, *this, dl, GetOrdering(Chain.getNode()));
3503 return CallResult.second;
3506 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3507 SDValue Src, SDValue Size,
3509 const Value *DstSV, uint64_t DstSVOff) {
3511 // Check to see if we should lower the memset to stores first.
3512 // For cases within the target-specified limits, this is the best choice.
3513 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3515 // Memset with size zero? Just return the original chain.
3516 if (ConstantSize->isNullValue())
3520 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3521 Align, DstSV, DstSVOff);
3522 if (Result.getNode())
3526 // Then check to see if we should lower the memset with target-specific
3527 // code. If the target chooses to do this, this is the next best.
3529 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3531 if (Result.getNode())
3534 // Emit a library call.
3535 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3536 TargetLowering::ArgListTy Args;
3537 TargetLowering::ArgListEntry Entry;
3538 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3539 Args.push_back(Entry);
3540 // Extend or truncate the argument to be an i32 value for the call.
3541 if (Src.getValueType().bitsGT(MVT::i32))
3542 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3544 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3546 Entry.Ty = Type::getInt32Ty(*getContext());
3547 Entry.isSExt = true;
3548 Args.push_back(Entry);
3550 Entry.Ty = IntPtrTy;
3551 Entry.isSExt = false;
3552 Args.push_back(Entry);
3553 // FIXME: pass in DebugLoc
3554 std::pair<SDValue,SDValue> CallResult =
3555 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3556 false, false, false, false, 0,
3557 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3558 /*isReturnValueUsed=*/false,
3559 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3560 TLI.getPointerTy()),
3561 Args, *this, dl, GetOrdering(Chain.getNode()));
3562 return CallResult.second;
3565 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3567 SDValue Ptr, SDValue Cmp,
3568 SDValue Swp, const Value* PtrVal,
3569 unsigned Alignment) {
3570 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3571 Alignment = getEVTAlignment(MemVT);
3573 // Check if the memory reference references a frame index
3575 if (const FrameIndexSDNode *FI =
3576 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3577 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3579 MachineFunction &MF = getMachineFunction();
3580 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3582 // For now, atomics are considered to be volatile always.
3583 Flags |= MachineMemOperand::MOVolatile;
3585 MachineMemOperand *MMO =
3586 MF.getMachineMemOperand(PtrVal, Flags, 0,
3587 MemVT.getStoreSize(), Alignment);
3589 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3592 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3594 SDValue Ptr, SDValue Cmp,
3595 SDValue Swp, MachineMemOperand *MMO) {
3596 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3597 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3599 EVT VT = Cmp.getValueType();
3601 SDVTList VTs = getVTList(VT, MVT::Other);
3602 FoldingSetNodeID ID;
3603 ID.AddInteger(MemVT.getRawBits());
3604 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3605 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3607 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3608 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3609 return SDValue(E, 0);
3611 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3612 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3613 CSEMap.InsertNode(N, IP);
3614 AllNodes.push_back(N);
3615 return SDValue(N, 0);
3618 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3620 SDValue Ptr, SDValue Val,
3621 const Value* PtrVal,
3622 unsigned Alignment) {
3623 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3624 Alignment = getEVTAlignment(MemVT);
3626 // Check if the memory reference references a frame index
3628 if (const FrameIndexSDNode *FI =
3629 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3630 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3632 MachineFunction &MF = getMachineFunction();
3633 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3635 // For now, atomics are considered to be volatile always.
3636 Flags |= MachineMemOperand::MOVolatile;
3638 MachineMemOperand *MMO =
3639 MF.getMachineMemOperand(PtrVal, Flags, 0,
3640 MemVT.getStoreSize(), Alignment);
3642 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3645 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3647 SDValue Ptr, SDValue Val,
3648 MachineMemOperand *MMO) {
3649 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3650 Opcode == ISD::ATOMIC_LOAD_SUB ||
3651 Opcode == ISD::ATOMIC_LOAD_AND ||
3652 Opcode == ISD::ATOMIC_LOAD_OR ||
3653 Opcode == ISD::ATOMIC_LOAD_XOR ||
3654 Opcode == ISD::ATOMIC_LOAD_NAND ||
3655 Opcode == ISD::ATOMIC_LOAD_MIN ||
3656 Opcode == ISD::ATOMIC_LOAD_MAX ||
3657 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3658 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3659 Opcode == ISD::ATOMIC_SWAP) &&
3660 "Invalid Atomic Op");
3662 EVT VT = Val.getValueType();
3664 SDVTList VTs = getVTList(VT, MVT::Other);
3665 FoldingSetNodeID ID;
3666 ID.AddInteger(MemVT.getRawBits());
3667 SDValue Ops[] = {Chain, Ptr, Val};
3668 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3670 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3671 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3672 return SDValue(E, 0);
3674 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3675 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3676 CSEMap.InsertNode(N, IP);
3677 AllNodes.push_back(N);
3678 return SDValue(N, 0);
3681 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3682 /// Allowed to return something different (and simpler) if Simplify is true.
3683 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3688 SmallVector<EVT, 4> VTs;
3689 VTs.reserve(NumOps);
3690 for (unsigned i = 0; i < NumOps; ++i)
3691 VTs.push_back(Ops[i].getValueType());
3692 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3697 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3698 const EVT *VTs, unsigned NumVTs,
3699 const SDValue *Ops, unsigned NumOps,
3700 EVT MemVT, const Value *srcValue, int SVOff,
3701 unsigned Align, bool Vol,
3702 bool ReadMem, bool WriteMem) {
3703 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3704 MemVT, srcValue, SVOff, Align, Vol,
3709 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3710 const SDValue *Ops, unsigned NumOps,
3711 EVT MemVT, const Value *srcValue, int SVOff,
3712 unsigned Align, bool Vol,
3713 bool ReadMem, bool WriteMem) {
3714 if (Align == 0) // Ensure that codegen never sees alignment 0
3715 Align = getEVTAlignment(MemVT);
3717 MachineFunction &MF = getMachineFunction();
3720 Flags |= MachineMemOperand::MOStore;
3722 Flags |= MachineMemOperand::MOLoad;
3724 Flags |= MachineMemOperand::MOVolatile;
3725 MachineMemOperand *MMO =
3726 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3727 MemVT.getStoreSize(), Align);
3729 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3733 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3734 const SDValue *Ops, unsigned NumOps,
3735 EVT MemVT, MachineMemOperand *MMO) {
3736 assert((Opcode == ISD::INTRINSIC_VOID ||
3737 Opcode == ISD::INTRINSIC_W_CHAIN ||
3738 (Opcode <= INT_MAX &&
3739 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3740 "Opcode is not a memory-accessing opcode!");
3742 // Memoize the node unless it returns a flag.
3743 MemIntrinsicSDNode *N;
3744 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3745 FoldingSetNodeID ID;
3746 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3748 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3749 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3750 return SDValue(E, 0);
3753 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3754 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3755 CSEMap.InsertNode(N, IP);
3757 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3758 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3760 AllNodes.push_back(N);
3761 return SDValue(N, 0);
3765 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3766 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3767 SDValue Ptr, SDValue Offset,
3768 const Value *SV, int SVOffset, EVT MemVT,
3769 bool isVolatile, unsigned Alignment) {
3770 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3771 Alignment = getEVTAlignment(VT);
3773 // Check if the memory reference references a frame index
3775 if (const FrameIndexSDNode *FI =
3776 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3777 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3779 MachineFunction &MF = getMachineFunction();
3780 unsigned Flags = MachineMemOperand::MOLoad;
3782 Flags |= MachineMemOperand::MOVolatile;
3783 MachineMemOperand *MMO =
3784 MF.getMachineMemOperand(SV, Flags, SVOffset,
3785 MemVT.getStoreSize(), Alignment);
3786 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3790 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3791 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3792 SDValue Ptr, SDValue Offset, EVT MemVT,
3793 MachineMemOperand *MMO) {
3795 ExtType = ISD::NON_EXTLOAD;
3796 } else if (ExtType == ISD::NON_EXTLOAD) {
3797 assert(VT == MemVT && "Non-extending load from different memory type!");
3800 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3801 "Should only be an extending load, not truncating!");
3802 assert(VT.isInteger() == MemVT.isInteger() &&
3803 "Cannot convert from FP to Int or Int -> FP!");
3804 assert(VT.isVector() == MemVT.isVector() &&
3805 "Cannot use trunc store to convert to or from a vector!");
3806 assert((!VT.isVector() ||
3807 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3808 "Cannot use trunc store to change the number of vector elements!");
3811 bool Indexed = AM != ISD::UNINDEXED;
3812 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3813 "Unindexed load with an offset!");
3815 SDVTList VTs = Indexed ?
3816 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3817 SDValue Ops[] = { Chain, Ptr, Offset };
3818 FoldingSetNodeID ID;
3819 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3820 ID.AddInteger(MemVT.getRawBits());
3821 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile()));
3823 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3824 cast<LoadSDNode>(E)->refineAlignment(MMO);
3825 return SDValue(E, 0);
3827 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3828 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3829 CSEMap.InsertNode(N, IP);
3830 AllNodes.push_back(N);
3831 return SDValue(N, 0);
3834 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3835 SDValue Chain, SDValue Ptr,
3836 const Value *SV, int SVOffset,
3837 bool isVolatile, unsigned Alignment) {
3838 SDValue Undef = getUNDEF(Ptr.getValueType());
3839 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3840 SV, SVOffset, VT, isVolatile, Alignment);
3843 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3844 SDValue Chain, SDValue Ptr,
3846 int SVOffset, EVT MemVT,
3847 bool isVolatile, unsigned Alignment) {
3848 SDValue Undef = getUNDEF(Ptr.getValueType());
3849 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3850 SV, SVOffset, MemVT, isVolatile, Alignment);
3854 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3855 SDValue Offset, ISD::MemIndexedMode AM) {
3856 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3857 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3858 "Load is already a indexed load!");
3859 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3860 LD->getChain(), Base, Offset, LD->getSrcValue(),
3861 LD->getSrcValueOffset(), LD->getMemoryVT(),
3862 LD->isVolatile(), LD->getAlignment());
3865 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3866 SDValue Ptr, const Value *SV, int SVOffset,
3867 bool isVolatile, unsigned Alignment) {
3868 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3869 Alignment = getEVTAlignment(Val.getValueType());
3871 // Check if the memory reference references a frame index
3873 if (const FrameIndexSDNode *FI =
3874 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3875 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3877 MachineFunction &MF = getMachineFunction();
3878 unsigned Flags = MachineMemOperand::MOStore;
3880 Flags |= MachineMemOperand::MOVolatile;
3881 MachineMemOperand *MMO =
3882 MF.getMachineMemOperand(SV, Flags, SVOffset,
3883 Val.getValueType().getStoreSize(), Alignment);
3885 return getStore(Chain, dl, Val, Ptr, MMO);
3888 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3889 SDValue Ptr, MachineMemOperand *MMO) {
3890 EVT VT = Val.getValueType();
3891 SDVTList VTs = getVTList(MVT::Other);
3892 SDValue Undef = getUNDEF(Ptr.getValueType());
3893 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3894 FoldingSetNodeID ID;
3895 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3896 ID.AddInteger(VT.getRawBits());
3897 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile()));
3899 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3900 cast<StoreSDNode>(E)->refineAlignment(MMO);
3901 return SDValue(E, 0);
3903 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3904 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3905 CSEMap.InsertNode(N, IP);
3906 AllNodes.push_back(N);
3907 return SDValue(N, 0);
3910 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3911 SDValue Ptr, const Value *SV,
3912 int SVOffset, EVT SVT,
3913 bool isVolatile, unsigned Alignment) {
3914 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3915 Alignment = getEVTAlignment(SVT);
3917 // Check if the memory reference references a frame index
3919 if (const FrameIndexSDNode *FI =
3920 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3921 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3923 MachineFunction &MF = getMachineFunction();
3924 unsigned Flags = MachineMemOperand::MOStore;
3926 Flags |= MachineMemOperand::MOVolatile;
3927 MachineMemOperand *MMO =
3928 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3930 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3933 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3934 SDValue Ptr, EVT SVT,
3935 MachineMemOperand *MMO) {
3936 EVT VT = Val.getValueType();
3939 return getStore(Chain, dl, Val, Ptr, MMO);
3941 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
3942 "Should only be a truncating store, not extending!");
3943 assert(VT.isInteger() == SVT.isInteger() &&
3944 "Can't do FP-INT conversion!");
3945 assert(VT.isVector() == SVT.isVector() &&
3946 "Cannot use trunc store to convert to or from a vector!");
3947 assert((!VT.isVector() ||
3948 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
3949 "Cannot use trunc store to change the number of vector elements!");
3951 SDVTList VTs = getVTList(MVT::Other);
3952 SDValue Undef = getUNDEF(Ptr.getValueType());
3953 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3954 FoldingSetNodeID ID;
3955 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3956 ID.AddInteger(SVT.getRawBits());
3957 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile()));
3959 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3960 cast<StoreSDNode>(E)->refineAlignment(MMO);
3961 return SDValue(E, 0);
3963 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3964 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
3965 CSEMap.InsertNode(N, IP);
3966 AllNodes.push_back(N);
3967 return SDValue(N, 0);
3971 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3972 SDValue Offset, ISD::MemIndexedMode AM) {
3973 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3974 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3975 "Store is already a indexed store!");
3976 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3977 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3978 FoldingSetNodeID ID;
3979 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3980 ID.AddInteger(ST->getMemoryVT().getRawBits());
3981 ID.AddInteger(ST->getRawSubclassData());
3983 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3984 return SDValue(E, 0);
3986 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3987 new (N) StoreSDNode(Ops, dl, VTs, AM,
3988 ST->isTruncatingStore(), ST->getMemoryVT(),
3989 ST->getMemOperand());
3990 CSEMap.InsertNode(N, IP);
3991 AllNodes.push_back(N);
3992 return SDValue(N, 0);
3995 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
3996 SDValue Chain, SDValue Ptr,
3998 SDValue Ops[] = { Chain, Ptr, SV };
3999 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4002 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4003 const SDUse *Ops, unsigned NumOps) {
4005 case 0: return getNode(Opcode, DL, VT);
4006 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4007 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4008 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4012 // Copy from an SDUse array into an SDValue array for use with
4013 // the regular getNode logic.
4014 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4015 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4018 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4019 const SDValue *Ops, unsigned NumOps) {
4021 case 0: return getNode(Opcode, DL, VT);
4022 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4023 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4024 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4030 case ISD::SELECT_CC: {
4031 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4032 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4033 "LHS and RHS of condition must have same type!");
4034 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4035 "True and False arms of SelectCC must have same type!");
4036 assert(Ops[2].getValueType() == VT &&
4037 "select_cc node must be of same type as true and false value!");
4041 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4042 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4043 "LHS/RHS of comparison should match types!");
4050 SDVTList VTs = getVTList(VT);
4052 if (VT != MVT::Flag) {
4053 FoldingSetNodeID ID;
4054 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4058 return SDValue(E, 0);
4060 N = NodeAllocator.Allocate<SDNode>();
4061 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4062 CSEMap.InsertNode(N, IP);
4064 N = NodeAllocator.Allocate<SDNode>();
4065 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4068 AllNodes.push_back(N);
4072 return SDValue(N, 0);
4075 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4076 const std::vector<EVT> &ResultTys,
4077 const SDValue *Ops, unsigned NumOps) {
4078 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4082 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4083 const EVT *VTs, unsigned NumVTs,
4084 const SDValue *Ops, unsigned NumOps) {
4086 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4087 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4090 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4091 const SDValue *Ops, unsigned NumOps) {
4092 if (VTList.NumVTs == 1)
4093 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4097 // FIXME: figure out how to safely handle things like
4098 // int foo(int x) { return 1 << (x & 255); }
4099 // int bar() { return foo(256); }
4100 case ISD::SRA_PARTS:
4101 case ISD::SRL_PARTS:
4102 case ISD::SHL_PARTS:
4103 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4104 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4105 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4106 else if (N3.getOpcode() == ISD::AND)
4107 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4108 // If the and is only masking out bits that cannot effect the shift,
4109 // eliminate the and.
4110 unsigned NumBits = VT.getSizeInBits()*2;
4111 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4112 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4118 // Memoize the node unless it returns a flag.
4120 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4121 FoldingSetNodeID ID;
4122 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4125 return SDValue(E, 0);
4128 N = NodeAllocator.Allocate<UnarySDNode>();
4129 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4130 } else if (NumOps == 2) {
4131 N = NodeAllocator.Allocate<BinarySDNode>();
4132 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4133 } else if (NumOps == 3) {
4134 N = NodeAllocator.Allocate<TernarySDNode>();
4135 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4137 N = NodeAllocator.Allocate<SDNode>();
4138 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4140 CSEMap.InsertNode(N, IP);
4143 N = NodeAllocator.Allocate<UnarySDNode>();
4144 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4145 } else if (NumOps == 2) {
4146 N = NodeAllocator.Allocate<BinarySDNode>();
4147 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4148 } else if (NumOps == 3) {
4149 N = NodeAllocator.Allocate<TernarySDNode>();
4150 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4152 N = NodeAllocator.Allocate<SDNode>();
4153 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4156 AllNodes.push_back(N);
4160 return SDValue(N, 0);
4163 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4164 return getNode(Opcode, DL, VTList, 0, 0);
4167 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4169 SDValue Ops[] = { N1 };
4170 return getNode(Opcode, DL, VTList, Ops, 1);
4173 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4174 SDValue N1, SDValue N2) {
4175 SDValue Ops[] = { N1, N2 };
4176 return getNode(Opcode, DL, VTList, Ops, 2);
4179 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4180 SDValue N1, SDValue N2, SDValue N3) {
4181 SDValue Ops[] = { N1, N2, N3 };
4182 return getNode(Opcode, DL, VTList, Ops, 3);
4185 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4186 SDValue N1, SDValue N2, SDValue N3,
4188 SDValue Ops[] = { N1, N2, N3, N4 };
4189 return getNode(Opcode, DL, VTList, Ops, 4);
4192 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4193 SDValue N1, SDValue N2, SDValue N3,
4194 SDValue N4, SDValue N5) {
4195 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4196 return getNode(Opcode, DL, VTList, Ops, 5);
4199 SDVTList SelectionDAG::getVTList(EVT VT) {
4200 return makeVTList(SDNode::getValueTypeList(VT), 1);
4203 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4204 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4205 E = VTList.rend(); I != E; ++I)
4206 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4209 EVT *Array = Allocator.Allocate<EVT>(2);
4212 SDVTList Result = makeVTList(Array, 2);
4213 VTList.push_back(Result);
4217 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4218 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4219 E = VTList.rend(); I != E; ++I)
4220 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4224 EVT *Array = Allocator.Allocate<EVT>(3);
4228 SDVTList Result = makeVTList(Array, 3);
4229 VTList.push_back(Result);
4233 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4234 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4235 E = VTList.rend(); I != E; ++I)
4236 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4237 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4240 EVT *Array = Allocator.Allocate<EVT>(4);
4245 SDVTList Result = makeVTList(Array, 4);
4246 VTList.push_back(Result);
4250 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4252 case 0: llvm_unreachable("Cannot have nodes without results!");
4253 case 1: return getVTList(VTs[0]);
4254 case 2: return getVTList(VTs[0], VTs[1]);
4255 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4256 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4260 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4261 E = VTList.rend(); I != E; ++I) {
4262 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4265 bool NoMatch = false;
4266 for (unsigned i = 2; i != NumVTs; ++i)
4267 if (VTs[i] != I->VTs[i]) {
4275 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4276 std::copy(VTs, VTs+NumVTs, Array);
4277 SDVTList Result = makeVTList(Array, NumVTs);
4278 VTList.push_back(Result);
4283 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4284 /// specified operands. If the resultant node already exists in the DAG,
4285 /// this does not modify the specified node, instead it returns the node that
4286 /// already exists. If the resultant node does not exist in the DAG, the
4287 /// input node is returned. As a degenerate case, if you specify the same
4288 /// input operands as the node already has, the input node is returned.
4289 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4290 SDNode *N = InN.getNode();
4291 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4293 // Check to see if there is no change.
4294 if (Op == N->getOperand(0)) return InN;
4296 // See if the modified node already exists.
4297 void *InsertPos = 0;
4298 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4299 return SDValue(Existing, InN.getResNo());
4301 // Nope it doesn't. Remove the node from its current place in the maps.
4303 if (!RemoveNodeFromCSEMaps(N))
4306 // Now we update the operands.
4307 N->OperandList[0].set(Op);
4309 // If this gets put into a CSE map, add it.
4310 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4314 SDValue SelectionDAG::
4315 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4316 SDNode *N = InN.getNode();
4317 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4319 // Check to see if there is no change.
4320 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4321 return InN; // No operands changed, just return the input node.
4323 // See if the modified node already exists.
4324 void *InsertPos = 0;
4325 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4326 return SDValue(Existing, InN.getResNo());
4328 // Nope it doesn't. Remove the node from its current place in the maps.
4330 if (!RemoveNodeFromCSEMaps(N))
4333 // Now we update the operands.
4334 if (N->OperandList[0] != Op1)
4335 N->OperandList[0].set(Op1);
4336 if (N->OperandList[1] != Op2)
4337 N->OperandList[1].set(Op2);
4339 // If this gets put into a CSE map, add it.
4340 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4344 SDValue SelectionDAG::
4345 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4346 SDValue Ops[] = { Op1, Op2, Op3 };
4347 return UpdateNodeOperands(N, Ops, 3);
4350 SDValue SelectionDAG::
4351 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4352 SDValue Op3, SDValue Op4) {
4353 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4354 return UpdateNodeOperands(N, Ops, 4);
4357 SDValue SelectionDAG::
4358 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4359 SDValue Op3, SDValue Op4, SDValue Op5) {
4360 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4361 return UpdateNodeOperands(N, Ops, 5);
4364 SDValue SelectionDAG::
4365 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4366 SDNode *N = InN.getNode();
4367 assert(N->getNumOperands() == NumOps &&
4368 "Update with wrong number of operands");
4370 // Check to see if there is no change.
4371 bool AnyChange = false;
4372 for (unsigned i = 0; i != NumOps; ++i) {
4373 if (Ops[i] != N->getOperand(i)) {
4379 // No operands changed, just return the input node.
4380 if (!AnyChange) return InN;
4382 // See if the modified node already exists.
4383 void *InsertPos = 0;
4384 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4385 return SDValue(Existing, InN.getResNo());
4387 // Nope it doesn't. Remove the node from its current place in the maps.
4389 if (!RemoveNodeFromCSEMaps(N))
4392 // Now we update the operands.
4393 for (unsigned i = 0; i != NumOps; ++i)
4394 if (N->OperandList[i] != Ops[i])
4395 N->OperandList[i].set(Ops[i]);
4397 // If this gets put into a CSE map, add it.
4398 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4402 /// DropOperands - Release the operands and set this node to have
4404 void SDNode::DropOperands() {
4405 // Unlike the code in MorphNodeTo that does this, we don't need to
4406 // watch for dead nodes here.
4407 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4413 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4416 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4418 SDVTList VTs = getVTList(VT);
4419 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4422 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4423 EVT VT, SDValue Op1) {
4424 SDVTList VTs = getVTList(VT);
4425 SDValue Ops[] = { Op1 };
4426 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4429 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4430 EVT VT, SDValue Op1,
4432 SDVTList VTs = getVTList(VT);
4433 SDValue Ops[] = { Op1, Op2 };
4434 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4437 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4438 EVT VT, SDValue Op1,
4439 SDValue Op2, SDValue Op3) {
4440 SDVTList VTs = getVTList(VT);
4441 SDValue Ops[] = { Op1, Op2, Op3 };
4442 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4445 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4446 EVT VT, const SDValue *Ops,
4448 SDVTList VTs = getVTList(VT);
4449 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4452 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4453 EVT VT1, EVT VT2, const SDValue *Ops,
4455 SDVTList VTs = getVTList(VT1, VT2);
4456 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4459 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4461 SDVTList VTs = getVTList(VT1, VT2);
4462 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4465 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4466 EVT VT1, EVT VT2, EVT VT3,
4467 const SDValue *Ops, unsigned NumOps) {
4468 SDVTList VTs = getVTList(VT1, VT2, VT3);
4469 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4472 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4473 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4474 const SDValue *Ops, unsigned NumOps) {
4475 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4476 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4479 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4482 SDVTList VTs = getVTList(VT1, VT2);
4483 SDValue Ops[] = { Op1 };
4484 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4487 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4489 SDValue Op1, SDValue Op2) {
4490 SDVTList VTs = getVTList(VT1, VT2);
4491 SDValue Ops[] = { Op1, Op2 };
4492 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4495 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4497 SDValue Op1, SDValue Op2,
4499 SDVTList VTs = getVTList(VT1, VT2);
4500 SDValue Ops[] = { Op1, Op2, Op3 };
4501 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4504 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4505 EVT VT1, EVT VT2, EVT VT3,
4506 SDValue Op1, SDValue Op2,
4508 SDVTList VTs = getVTList(VT1, VT2, VT3);
4509 SDValue Ops[] = { Op1, Op2, Op3 };
4510 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4513 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4514 SDVTList VTs, const SDValue *Ops,
4516 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4519 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4521 SDVTList VTs = getVTList(VT);
4522 return MorphNodeTo(N, Opc, VTs, 0, 0);
4525 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4526 EVT VT, SDValue Op1) {
4527 SDVTList VTs = getVTList(VT);
4528 SDValue Ops[] = { Op1 };
4529 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4532 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4533 EVT VT, SDValue Op1,
4535 SDVTList VTs = getVTList(VT);
4536 SDValue Ops[] = { Op1, Op2 };
4537 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4540 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4541 EVT VT, SDValue Op1,
4542 SDValue Op2, SDValue Op3) {
4543 SDVTList VTs = getVTList(VT);
4544 SDValue Ops[] = { Op1, Op2, Op3 };
4545 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4548 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4549 EVT VT, const SDValue *Ops,
4551 SDVTList VTs = getVTList(VT);
4552 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4555 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4556 EVT VT1, EVT VT2, const SDValue *Ops,
4558 SDVTList VTs = getVTList(VT1, VT2);
4559 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4562 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4564 SDVTList VTs = getVTList(VT1, VT2);
4565 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4568 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4569 EVT VT1, EVT VT2, EVT VT3,
4570 const SDValue *Ops, unsigned NumOps) {
4571 SDVTList VTs = getVTList(VT1, VT2, VT3);
4572 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4575 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4578 SDVTList VTs = getVTList(VT1, VT2);
4579 SDValue Ops[] = { Op1 };
4580 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4583 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4585 SDValue Op1, SDValue Op2) {
4586 SDVTList VTs = getVTList(VT1, VT2);
4587 SDValue Ops[] = { Op1, Op2 };
4588 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4591 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4593 SDValue Op1, SDValue Op2,
4595 SDVTList VTs = getVTList(VT1, VT2);
4596 SDValue Ops[] = { Op1, Op2, Op3 };
4597 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4600 /// MorphNodeTo - These *mutate* the specified node to have the specified
4601 /// return type, opcode, and operands.
4603 /// Note that MorphNodeTo returns the resultant node. If there is already a
4604 /// node of the specified opcode and operands, it returns that node instead of
4605 /// the current one. Note that the DebugLoc need not be the same.
4607 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4608 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4609 /// node, and because it doesn't require CSE recalculation for any of
4610 /// the node's users.
4612 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4613 SDVTList VTs, const SDValue *Ops,
4615 // If an identical node already exists, use it.
4617 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4618 FoldingSetNodeID ID;
4619 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4620 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4624 if (!RemoveNodeFromCSEMaps(N))
4627 // Start the morphing.
4629 N->ValueList = VTs.VTs;
4630 N->NumValues = VTs.NumVTs;
4632 // Clear the operands list, updating used nodes to remove this from their
4633 // use list. Keep track of any operands that become dead as a result.
4634 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4635 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4637 SDNode *Used = Use.getNode();
4639 if (Used->use_empty())
4640 DeadNodeSet.insert(Used);
4643 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4644 // Initialize the memory references information.
4645 MN->setMemRefs(0, 0);
4646 // If NumOps is larger than the # of operands we can have in a
4647 // MachineSDNode, reallocate the operand list.
4648 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4649 if (MN->OperandsNeedDelete)
4650 delete[] MN->OperandList;
4651 if (NumOps > array_lengthof(MN->LocalOperands))
4652 // We're creating a final node that will live unmorphed for the
4653 // remainder of the current SelectionDAG iteration, so we can allocate
4654 // the operands directly out of a pool with no recycling metadata.
4655 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4658 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4659 MN->OperandsNeedDelete = false;
4661 MN->InitOperands(MN->OperandList, Ops, NumOps);
4663 // If NumOps is larger than the # of operands we currently have, reallocate
4664 // the operand list.
4665 if (NumOps > N->NumOperands) {
4666 if (N->OperandsNeedDelete)
4667 delete[] N->OperandList;
4668 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4669 N->OperandsNeedDelete = true;
4671 N->InitOperands(N->OperandList, Ops, NumOps);
4674 // Delete any nodes that are still dead after adding the uses for the
4676 SmallVector<SDNode *, 16> DeadNodes;
4677 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4678 E = DeadNodeSet.end(); I != E; ++I)
4679 if ((*I)->use_empty())
4680 DeadNodes.push_back(*I);
4681 RemoveDeadNodes(DeadNodes);
4684 CSEMap.InsertNode(N, IP); // Memoize the new node.
4689 /// getMachineNode - These are used for target selectors to create a new node
4690 /// with specified return type(s), MachineInstr opcode, and operands.
4692 /// Note that getMachineNode returns the resultant node. If there is already a
4693 /// node of the specified opcode and operands, it returns that node instead of
4694 /// the current one.
4696 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4697 SDVTList VTs = getVTList(VT);
4698 return getMachineNode(Opcode, dl, VTs, 0, 0);
4702 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4703 SDVTList VTs = getVTList(VT);
4704 SDValue Ops[] = { Op1 };
4705 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4709 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4710 SDValue Op1, SDValue Op2) {
4711 SDVTList VTs = getVTList(VT);
4712 SDValue Ops[] = { Op1, Op2 };
4713 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4717 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4718 SDValue Op1, SDValue Op2, SDValue Op3) {
4719 SDVTList VTs = getVTList(VT);
4720 SDValue Ops[] = { Op1, Op2, Op3 };
4721 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4725 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4726 const SDValue *Ops, unsigned NumOps) {
4727 SDVTList VTs = getVTList(VT);
4728 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4732 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4733 SDVTList VTs = getVTList(VT1, VT2);
4734 return getMachineNode(Opcode, dl, VTs, 0, 0);
4738 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4739 EVT VT1, EVT VT2, SDValue Op1) {
4740 SDVTList VTs = getVTList(VT1, VT2);
4741 SDValue Ops[] = { Op1 };
4742 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4746 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4747 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4748 SDVTList VTs = getVTList(VT1, VT2);
4749 SDValue Ops[] = { Op1, Op2 };
4750 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4754 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4755 EVT VT1, EVT VT2, SDValue Op1,
4756 SDValue Op2, SDValue Op3) {
4757 SDVTList VTs = getVTList(VT1, VT2);
4758 SDValue Ops[] = { Op1, Op2, Op3 };
4759 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4763 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4765 const SDValue *Ops, unsigned NumOps) {
4766 SDVTList VTs = getVTList(VT1, VT2);
4767 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4771 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4772 EVT VT1, EVT VT2, EVT VT3,
4773 SDValue Op1, SDValue Op2) {
4774 SDVTList VTs = getVTList(VT1, VT2, VT3);
4775 SDValue Ops[] = { Op1, Op2 };
4776 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4780 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4781 EVT VT1, EVT VT2, EVT VT3,
4782 SDValue Op1, SDValue Op2, SDValue Op3) {
4783 SDVTList VTs = getVTList(VT1, VT2, VT3);
4784 SDValue Ops[] = { Op1, Op2, Op3 };
4785 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4789 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4790 EVT VT1, EVT VT2, EVT VT3,
4791 const SDValue *Ops, unsigned NumOps) {
4792 SDVTList VTs = getVTList(VT1, VT2, VT3);
4793 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4797 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4798 EVT VT2, EVT VT3, EVT VT4,
4799 const SDValue *Ops, unsigned NumOps) {
4800 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4801 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4805 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4806 const std::vector<EVT> &ResultTys,
4807 const SDValue *Ops, unsigned NumOps) {
4808 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4809 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4813 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4814 const SDValue *Ops, unsigned NumOps) {
4815 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4820 FoldingSetNodeID ID;
4821 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4823 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4824 return cast<MachineSDNode>(E);
4827 // Allocate a new MachineSDNode.
4828 N = NodeAllocator.Allocate<MachineSDNode>();
4829 new (N) MachineSDNode(~Opcode, DL, VTs);
4831 // Initialize the operands list.
4832 if (NumOps > array_lengthof(N->LocalOperands))
4833 // We're creating a final node that will live unmorphed for the
4834 // remainder of the current SelectionDAG iteration, so we can allocate
4835 // the operands directly out of a pool with no recycling metadata.
4836 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4839 N->InitOperands(N->LocalOperands, Ops, NumOps);
4840 N->OperandsNeedDelete = false;
4843 CSEMap.InsertNode(N, IP);
4845 AllNodes.push_back(N);
4852 /// getTargetExtractSubreg - A convenience function for creating
4853 /// TargetInstrInfo::EXTRACT_SUBREG nodes.
4855 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4857 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4858 SDNode *Subreg = getMachineNode(TargetInstrInfo::EXTRACT_SUBREG, DL,
4859 VT, Operand, SRIdxVal);
4860 return SDValue(Subreg, 0);
4863 /// getTargetInsertSubreg - A convenience function for creating
4864 /// TargetInstrInfo::INSERT_SUBREG nodes.
4866 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4867 SDValue Operand, SDValue Subreg) {
4868 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4869 SDNode *Result = getMachineNode(TargetInstrInfo::INSERT_SUBREG, DL,
4870 VT, Operand, Subreg, SRIdxVal);
4871 return SDValue(Result, 0);
4874 /// getNodeIfExists - Get the specified node if it's already available, or
4875 /// else return NULL.
4876 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4877 const SDValue *Ops, unsigned NumOps) {
4878 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4879 FoldingSetNodeID ID;
4880 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4882 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4888 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4889 /// This can cause recursive merging of nodes in the DAG.
4891 /// This version assumes From has a single result value.
4893 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4894 DAGUpdateListener *UpdateListener) {
4895 SDNode *From = FromN.getNode();
4896 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4897 "Cannot replace with this method!");
4898 assert(From != To.getNode() && "Cannot replace uses of with self");
4900 // Iterate over all the existing uses of From. New uses will be added
4901 // to the beginning of the use list, which we avoid visiting.
4902 // This specifically avoids visiting uses of From that arise while the
4903 // replacement is happening, because any such uses would be the result
4904 // of CSE: If an existing node looks like From after one of its operands
4905 // is replaced by To, we don't want to replace of all its users with To
4906 // too. See PR3018 for more info.
4907 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4911 // This node is about to morph, remove its old self from the CSE maps.
4912 RemoveNodeFromCSEMaps(User);
4914 // A user can appear in a use list multiple times, and when this
4915 // happens the uses are usually next to each other in the list.
4916 // To help reduce the number of CSE recomputations, process all
4917 // the uses of this user that we can find this way.
4919 SDUse &Use = UI.getUse();
4922 } while (UI != UE && *UI == User);
4924 // Now that we have modified User, add it back to the CSE maps. If it
4925 // already exists there, recursively merge the results together.
4926 AddModifiedNodeToCSEMaps(User, UpdateListener);
4930 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4931 /// This can cause recursive merging of nodes in the DAG.
4933 /// This version assumes that for each value of From, there is a
4934 /// corresponding value in To in the same position with the same type.
4936 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4937 DAGUpdateListener *UpdateListener) {
4939 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4940 assert((!From->hasAnyUseOfValue(i) ||
4941 From->getValueType(i) == To->getValueType(i)) &&
4942 "Cannot use this version of ReplaceAllUsesWith!");
4945 // Handle the trivial case.
4949 // Iterate over just the existing users of From. See the comments in
4950 // the ReplaceAllUsesWith above.
4951 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4955 // This node is about to morph, remove its old self from the CSE maps.
4956 RemoveNodeFromCSEMaps(User);
4958 // A user can appear in a use list multiple times, and when this
4959 // happens the uses are usually next to each other in the list.
4960 // To help reduce the number of CSE recomputations, process all
4961 // the uses of this user that we can find this way.
4963 SDUse &Use = UI.getUse();
4966 } while (UI != UE && *UI == User);
4968 // Now that we have modified User, add it back to the CSE maps. If it
4969 // already exists there, recursively merge the results together.
4970 AddModifiedNodeToCSEMaps(User, UpdateListener);
4974 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4975 /// This can cause recursive merging of nodes in the DAG.
4977 /// This version can replace From with any result values. To must match the
4978 /// number and types of values returned by From.
4979 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4981 DAGUpdateListener *UpdateListener) {
4982 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4983 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4985 // Iterate over just the existing users of From. See the comments in
4986 // the ReplaceAllUsesWith above.
4987 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4991 // This node is about to morph, remove its old self from the CSE maps.
4992 RemoveNodeFromCSEMaps(User);
4994 // A user can appear in a use list multiple times, and when this
4995 // happens the uses are usually next to each other in the list.
4996 // To help reduce the number of CSE recomputations, process all
4997 // the uses of this user that we can find this way.
4999 SDUse &Use = UI.getUse();
5000 const SDValue &ToOp = To[Use.getResNo()];
5003 } while (UI != UE && *UI == User);
5005 // Now that we have modified User, add it back to the CSE maps. If it
5006 // already exists there, recursively merge the results together.
5007 AddModifiedNodeToCSEMaps(User, UpdateListener);
5011 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5012 /// uses of other values produced by From.getNode() alone. The Deleted
5013 /// vector is handled the same way as for ReplaceAllUsesWith.
5014 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5015 DAGUpdateListener *UpdateListener){
5016 // Handle the really simple, really trivial case efficiently.
5017 if (From == To) return;
5019 // Handle the simple, trivial, case efficiently.
5020 if (From.getNode()->getNumValues() == 1) {
5021 ReplaceAllUsesWith(From, To, UpdateListener);
5025 // Iterate over just the existing users of From. See the comments in
5026 // the ReplaceAllUsesWith above.
5027 SDNode::use_iterator UI = From.getNode()->use_begin(),
5028 UE = From.getNode()->use_end();
5031 bool UserRemovedFromCSEMaps = false;
5033 // A user can appear in a use list multiple times, and when this
5034 // happens the uses are usually next to each other in the list.
5035 // To help reduce the number of CSE recomputations, process all
5036 // the uses of this user that we can find this way.
5038 SDUse &Use = UI.getUse();
5040 // Skip uses of different values from the same node.
5041 if (Use.getResNo() != From.getResNo()) {
5046 // If this node hasn't been modified yet, it's still in the CSE maps,
5047 // so remove its old self from the CSE maps.
5048 if (!UserRemovedFromCSEMaps) {
5049 RemoveNodeFromCSEMaps(User);
5050 UserRemovedFromCSEMaps = true;
5055 } while (UI != UE && *UI == User);
5057 // We are iterating over all uses of the From node, so if a use
5058 // doesn't use the specific value, no changes are made.
5059 if (!UserRemovedFromCSEMaps)
5062 // Now that we have modified User, add it back to the CSE maps. If it
5063 // already exists there, recursively merge the results together.
5064 AddModifiedNodeToCSEMaps(User, UpdateListener);
5069 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5070 /// to record information about a use.
5077 /// operator< - Sort Memos by User.
5078 bool operator<(const UseMemo &L, const UseMemo &R) {
5079 return (intptr_t)L.User < (intptr_t)R.User;
5083 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5084 /// uses of other values produced by From.getNode() alone. The same value
5085 /// may appear in both the From and To list. The Deleted vector is
5086 /// handled the same way as for ReplaceAllUsesWith.
5087 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5090 DAGUpdateListener *UpdateListener){
5091 // Handle the simple, trivial case efficiently.
5093 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5095 // Read up all the uses and make records of them. This helps
5096 // processing new uses that are introduced during the
5097 // replacement process.
5098 SmallVector<UseMemo, 4> Uses;
5099 for (unsigned i = 0; i != Num; ++i) {
5100 unsigned FromResNo = From[i].getResNo();
5101 SDNode *FromNode = From[i].getNode();
5102 for (SDNode::use_iterator UI = FromNode->use_begin(),
5103 E = FromNode->use_end(); UI != E; ++UI) {
5104 SDUse &Use = UI.getUse();
5105 if (Use.getResNo() == FromResNo) {
5106 UseMemo Memo = { *UI, i, &Use };
5107 Uses.push_back(Memo);
5112 // Sort the uses, so that all the uses from a given User are together.
5113 std::sort(Uses.begin(), Uses.end());
5115 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5116 UseIndex != UseIndexEnd; ) {
5117 // We know that this user uses some value of From. If it is the right
5118 // value, update it.
5119 SDNode *User = Uses[UseIndex].User;
5121 // This node is about to morph, remove its old self from the CSE maps.
5122 RemoveNodeFromCSEMaps(User);
5124 // The Uses array is sorted, so all the uses for a given User
5125 // are next to each other in the list.
5126 // To help reduce the number of CSE recomputations, process all
5127 // the uses of this user that we can find this way.
5129 unsigned i = Uses[UseIndex].Index;
5130 SDUse &Use = *Uses[UseIndex].Use;
5134 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5136 // Now that we have modified User, add it back to the CSE maps. If it
5137 // already exists there, recursively merge the results together.
5138 AddModifiedNodeToCSEMaps(User, UpdateListener);
5142 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5143 /// based on their topological order. It returns the maximum id and a vector
5144 /// of the SDNodes* in assigned order by reference.
5145 unsigned SelectionDAG::AssignTopologicalOrder() {
5147 unsigned DAGSize = 0;
5149 // SortedPos tracks the progress of the algorithm. Nodes before it are
5150 // sorted, nodes after it are unsorted. When the algorithm completes
5151 // it is at the end of the list.
5152 allnodes_iterator SortedPos = allnodes_begin();
5154 // Visit all the nodes. Move nodes with no operands to the front of
5155 // the list immediately. Annotate nodes that do have operands with their
5156 // operand count. Before we do this, the Node Id fields of the nodes
5157 // may contain arbitrary values. After, the Node Id fields for nodes
5158 // before SortedPos will contain the topological sort index, and the
5159 // Node Id fields for nodes At SortedPos and after will contain the
5160 // count of outstanding operands.
5161 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5163 unsigned Degree = N->getNumOperands();
5165 // A node with no uses, add it to the result array immediately.
5166 N->setNodeId(DAGSize++);
5167 allnodes_iterator Q = N;
5169 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5172 // Temporarily use the Node Id as scratch space for the degree count.
5173 N->setNodeId(Degree);
5177 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5178 // such that by the time the end is reached all nodes will be sorted.
5179 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5181 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5184 unsigned Degree = P->getNodeId();
5187 // All of P's operands are sorted, so P may sorted now.
5188 P->setNodeId(DAGSize++);
5190 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5193 // Update P's outstanding operand count.
5194 P->setNodeId(Degree);
5199 assert(SortedPos == AllNodes.end() &&
5200 "Topological sort incomplete!");
5201 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5202 "First node in topological sort is not the entry token!");
5203 assert(AllNodes.front().getNodeId() == 0 &&
5204 "First node in topological sort has non-zero id!");
5205 assert(AllNodes.front().getNumOperands() == 0 &&
5206 "First node in topological sort has operands!");
5207 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5208 "Last node in topologic sort has unexpected id!");
5209 assert(AllNodes.back().use_empty() &&
5210 "Last node in topologic sort has users!");
5211 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5215 /// AssignOrdering - Assign an order to the SDNode.
5216 void SelectionDAG::AssignOrdering(SDNode *SD, unsigned Order) {
5217 assert(SD && "Trying to assign an order to a null node!");
5219 Ordering->add(SD, Order);
5222 /// GetOrdering - Get the order for the SDNode.
5223 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5224 assert(SD && "Trying to get the order of a null node!");
5225 return Ordering ? Ordering->getOrder(SD) : 0;
5229 //===----------------------------------------------------------------------===//
5231 //===----------------------------------------------------------------------===//
5233 HandleSDNode::~HandleSDNode() {
5237 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5238 EVT VT, int64_t o, unsigned char TF)
5239 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5240 Offset(o), TargetFlags(TF) {
5241 TheGlobal = const_cast<GlobalValue*>(GA);
5244 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5245 MachineMemOperand *mmo)
5246 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5247 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5248 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5249 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5252 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5253 const SDValue *Ops, unsigned NumOps, EVT memvt,
5254 MachineMemOperand *mmo)
5255 : SDNode(Opc, dl, VTs, Ops, NumOps),
5256 MemoryVT(memvt), MMO(mmo) {
5257 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5258 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5259 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5262 /// Profile - Gather unique data for the node.
5264 void SDNode::Profile(FoldingSetNodeID &ID) const {
5265 AddNodeIDNode(ID, this);
5270 std::vector<EVT> VTs;
5273 VTs.reserve(MVT::LAST_VALUETYPE);
5274 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5275 VTs.push_back(MVT((MVT::SimpleValueType)i));
5280 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5281 static ManagedStatic<EVTArray> SimpleVTArray;
5282 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5284 /// getValueTypeList - Return a pointer to the specified value type.
5286 const EVT *SDNode::getValueTypeList(EVT VT) {
5287 if (VT.isExtended()) {
5288 sys::SmartScopedLock<true> Lock(*VTMutex);
5289 return &(*EVTs->insert(VT).first);
5291 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5295 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5296 /// indicated value. This method ignores uses of other values defined by this
5298 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5299 assert(Value < getNumValues() && "Bad value!");
5301 // TODO: Only iterate over uses of a given value of the node
5302 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5303 if (UI.getUse().getResNo() == Value) {
5310 // Found exactly the right number of uses?
5315 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5316 /// value. This method ignores uses of other values defined by this operation.
5317 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5318 assert(Value < getNumValues() && "Bad value!");
5320 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5321 if (UI.getUse().getResNo() == Value)
5328 /// isOnlyUserOf - Return true if this node is the only use of N.
5330 bool SDNode::isOnlyUserOf(SDNode *N) const {
5332 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5343 /// isOperand - Return true if this node is an operand of N.
5345 bool SDValue::isOperandOf(SDNode *N) const {
5346 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5347 if (*this == N->getOperand(i))
5352 bool SDNode::isOperandOf(SDNode *N) const {
5353 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5354 if (this == N->OperandList[i].getNode())
5359 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5360 /// be a chain) reaches the specified operand without crossing any
5361 /// side-effecting instructions. In practice, this looks through token
5362 /// factors and non-volatile loads. In order to remain efficient, this only
5363 /// looks a couple of nodes in, it does not do an exhaustive search.
5364 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5365 unsigned Depth) const {
5366 if (*this == Dest) return true;
5368 // Don't search too deeply, we just want to be able to see through
5369 // TokenFactor's etc.
5370 if (Depth == 0) return false;
5372 // If this is a token factor, all inputs to the TF happen in parallel. If any
5373 // of the operands of the TF reach dest, then we can do the xform.
5374 if (getOpcode() == ISD::TokenFactor) {
5375 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5376 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5381 // Loads don't have side effects, look through them.
5382 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5383 if (!Ld->isVolatile())
5384 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5389 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5390 /// is either an operand of N or it can be reached by traversing up the operands.
5391 /// NOTE: this is an expensive method. Use it carefully.
5392 bool SDNode::isPredecessorOf(SDNode *N) const {
5393 SmallPtrSet<SDNode *, 32> Visited;
5394 SmallVector<SDNode *, 16> Worklist;
5395 Worklist.push_back(N);
5398 N = Worklist.pop_back_val();
5399 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5400 SDNode *Op = N->getOperand(i).getNode();
5403 if (Visited.insert(Op))
5404 Worklist.push_back(Op);
5406 } while (!Worklist.empty());
5411 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5412 assert(Num < NumOperands && "Invalid child # of SDNode!");
5413 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5416 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5417 switch (getOpcode()) {
5419 if (getOpcode() < ISD::BUILTIN_OP_END)
5420 return "<<Unknown DAG Node>>";
5421 if (isMachineOpcode()) {
5423 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5424 if (getMachineOpcode() < TII->getNumOpcodes())
5425 return TII->get(getMachineOpcode()).getName();
5426 return "<<Unknown Machine Node>>";
5429 const TargetLowering &TLI = G->getTargetLoweringInfo();
5430 const char *Name = TLI.getTargetNodeName(getOpcode());
5431 if (Name) return Name;
5432 return "<<Unknown Target Node>>";
5434 return "<<Unknown Node>>";
5437 case ISD::DELETED_NODE:
5438 return "<<Deleted Node!>>";
5440 case ISD::PREFETCH: return "Prefetch";
5441 case ISD::MEMBARRIER: return "MemBarrier";
5442 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5443 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5444 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5445 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5446 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5447 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5448 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5449 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5450 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5451 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5452 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5453 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5454 case ISD::PCMARKER: return "PCMarker";
5455 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5456 case ISD::SRCVALUE: return "SrcValue";
5457 case ISD::EntryToken: return "EntryToken";
5458 case ISD::TokenFactor: return "TokenFactor";
5459 case ISD::AssertSext: return "AssertSext";
5460 case ISD::AssertZext: return "AssertZext";
5462 case ISD::BasicBlock: return "BasicBlock";
5463 case ISD::VALUETYPE: return "ValueType";
5464 case ISD::Register: return "Register";
5466 case ISD::Constant: return "Constant";
5467 case ISD::ConstantFP: return "ConstantFP";
5468 case ISD::GlobalAddress: return "GlobalAddress";
5469 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5470 case ISD::FrameIndex: return "FrameIndex";
5471 case ISD::JumpTable: return "JumpTable";
5472 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5473 case ISD::RETURNADDR: return "RETURNADDR";
5474 case ISD::FRAMEADDR: return "FRAMEADDR";
5475 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5476 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5477 case ISD::LSDAADDR: return "LSDAADDR";
5478 case ISD::EHSELECTION: return "EHSELECTION";
5479 case ISD::EH_RETURN: return "EH_RETURN";
5480 case ISD::ConstantPool: return "ConstantPool";
5481 case ISD::ExternalSymbol: return "ExternalSymbol";
5482 case ISD::BlockAddress: return "BlockAddress";
5483 case ISD::INTRINSIC_WO_CHAIN:
5484 case ISD::INTRINSIC_VOID:
5485 case ISD::INTRINSIC_W_CHAIN: {
5486 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5487 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5488 if (IID < Intrinsic::num_intrinsics)
5489 return Intrinsic::getName((Intrinsic::ID)IID);
5490 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5491 return TII->getName(IID);
5492 llvm_unreachable("Invalid intrinsic ID");
5495 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5496 case ISD::TargetConstant: return "TargetConstant";
5497 case ISD::TargetConstantFP:return "TargetConstantFP";
5498 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5499 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5500 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5501 case ISD::TargetJumpTable: return "TargetJumpTable";
5502 case ISD::TargetConstantPool: return "TargetConstantPool";
5503 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5504 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5506 case ISD::CopyToReg: return "CopyToReg";
5507 case ISD::CopyFromReg: return "CopyFromReg";
5508 case ISD::UNDEF: return "undef";
5509 case ISD::MERGE_VALUES: return "merge_values";
5510 case ISD::INLINEASM: return "inlineasm";
5511 case ISD::EH_LABEL: return "eh_label";
5512 case ISD::HANDLENODE: return "handlenode";
5515 case ISD::FABS: return "fabs";
5516 case ISD::FNEG: return "fneg";
5517 case ISD::FSQRT: return "fsqrt";
5518 case ISD::FSIN: return "fsin";
5519 case ISD::FCOS: return "fcos";
5520 case ISD::FPOWI: return "fpowi";
5521 case ISD::FPOW: return "fpow";
5522 case ISD::FTRUNC: return "ftrunc";
5523 case ISD::FFLOOR: return "ffloor";
5524 case ISD::FCEIL: return "fceil";
5525 case ISD::FRINT: return "frint";
5526 case ISD::FNEARBYINT: return "fnearbyint";
5529 case ISD::ADD: return "add";
5530 case ISD::SUB: return "sub";
5531 case ISD::MUL: return "mul";
5532 case ISD::MULHU: return "mulhu";
5533 case ISD::MULHS: return "mulhs";
5534 case ISD::SDIV: return "sdiv";
5535 case ISD::UDIV: return "udiv";
5536 case ISD::SREM: return "srem";
5537 case ISD::UREM: return "urem";
5538 case ISD::SMUL_LOHI: return "smul_lohi";
5539 case ISD::UMUL_LOHI: return "umul_lohi";
5540 case ISD::SDIVREM: return "sdivrem";
5541 case ISD::UDIVREM: return "udivrem";
5542 case ISD::AND: return "and";
5543 case ISD::OR: return "or";
5544 case ISD::XOR: return "xor";
5545 case ISD::SHL: return "shl";
5546 case ISD::SRA: return "sra";
5547 case ISD::SRL: return "srl";
5548 case ISD::ROTL: return "rotl";
5549 case ISD::ROTR: return "rotr";
5550 case ISD::FADD: return "fadd";
5551 case ISD::FSUB: return "fsub";
5552 case ISD::FMUL: return "fmul";
5553 case ISD::FDIV: return "fdiv";
5554 case ISD::FREM: return "frem";
5555 case ISD::FCOPYSIGN: return "fcopysign";
5556 case ISD::FGETSIGN: return "fgetsign";
5558 case ISD::SETCC: return "setcc";
5559 case ISD::VSETCC: return "vsetcc";
5560 case ISD::SELECT: return "select";
5561 case ISD::SELECT_CC: return "select_cc";
5562 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5563 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5564 case ISD::CONCAT_VECTORS: return "concat_vectors";
5565 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5566 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5567 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5568 case ISD::CARRY_FALSE: return "carry_false";
5569 case ISD::ADDC: return "addc";
5570 case ISD::ADDE: return "adde";
5571 case ISD::SADDO: return "saddo";
5572 case ISD::UADDO: return "uaddo";
5573 case ISD::SSUBO: return "ssubo";
5574 case ISD::USUBO: return "usubo";
5575 case ISD::SMULO: return "smulo";
5576 case ISD::UMULO: return "umulo";
5577 case ISD::SUBC: return "subc";
5578 case ISD::SUBE: return "sube";
5579 case ISD::SHL_PARTS: return "shl_parts";
5580 case ISD::SRA_PARTS: return "sra_parts";
5581 case ISD::SRL_PARTS: return "srl_parts";
5583 // Conversion operators.
5584 case ISD::SIGN_EXTEND: return "sign_extend";
5585 case ISD::ZERO_EXTEND: return "zero_extend";
5586 case ISD::ANY_EXTEND: return "any_extend";
5587 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5588 case ISD::TRUNCATE: return "truncate";
5589 case ISD::FP_ROUND: return "fp_round";
5590 case ISD::FLT_ROUNDS_: return "flt_rounds";
5591 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5592 case ISD::FP_EXTEND: return "fp_extend";
5594 case ISD::SINT_TO_FP: return "sint_to_fp";
5595 case ISD::UINT_TO_FP: return "uint_to_fp";
5596 case ISD::FP_TO_SINT: return "fp_to_sint";
5597 case ISD::FP_TO_UINT: return "fp_to_uint";
5598 case ISD::BIT_CONVERT: return "bit_convert";
5600 case ISD::CONVERT_RNDSAT: {
5601 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5602 default: llvm_unreachable("Unknown cvt code!");
5603 case ISD::CVT_FF: return "cvt_ff";
5604 case ISD::CVT_FS: return "cvt_fs";
5605 case ISD::CVT_FU: return "cvt_fu";
5606 case ISD::CVT_SF: return "cvt_sf";
5607 case ISD::CVT_UF: return "cvt_uf";
5608 case ISD::CVT_SS: return "cvt_ss";
5609 case ISD::CVT_SU: return "cvt_su";
5610 case ISD::CVT_US: return "cvt_us";
5611 case ISD::CVT_UU: return "cvt_uu";
5615 // Control flow instructions
5616 case ISD::BR: return "br";
5617 case ISD::BRIND: return "brind";
5618 case ISD::BR_JT: return "br_jt";
5619 case ISD::BRCOND: return "brcond";
5620 case ISD::BR_CC: return "br_cc";
5621 case ISD::CALLSEQ_START: return "callseq_start";
5622 case ISD::CALLSEQ_END: return "callseq_end";
5625 case ISD::LOAD: return "load";
5626 case ISD::STORE: return "store";
5627 case ISD::VAARG: return "vaarg";
5628 case ISD::VACOPY: return "vacopy";
5629 case ISD::VAEND: return "vaend";
5630 case ISD::VASTART: return "vastart";
5631 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5632 case ISD::EXTRACT_ELEMENT: return "extract_element";
5633 case ISD::BUILD_PAIR: return "build_pair";
5634 case ISD::STACKSAVE: return "stacksave";
5635 case ISD::STACKRESTORE: return "stackrestore";
5636 case ISD::TRAP: return "trap";
5639 case ISD::BSWAP: return "bswap";
5640 case ISD::CTPOP: return "ctpop";
5641 case ISD::CTTZ: return "cttz";
5642 case ISD::CTLZ: return "ctlz";
5645 case ISD::TRAMPOLINE: return "trampoline";
5648 switch (cast<CondCodeSDNode>(this)->get()) {
5649 default: llvm_unreachable("Unknown setcc condition!");
5650 case ISD::SETOEQ: return "setoeq";
5651 case ISD::SETOGT: return "setogt";
5652 case ISD::SETOGE: return "setoge";
5653 case ISD::SETOLT: return "setolt";
5654 case ISD::SETOLE: return "setole";
5655 case ISD::SETONE: return "setone";
5657 case ISD::SETO: return "seto";
5658 case ISD::SETUO: return "setuo";
5659 case ISD::SETUEQ: return "setue";
5660 case ISD::SETUGT: return "setugt";
5661 case ISD::SETUGE: return "setuge";
5662 case ISD::SETULT: return "setult";
5663 case ISD::SETULE: return "setule";
5664 case ISD::SETUNE: return "setune";
5666 case ISD::SETEQ: return "seteq";
5667 case ISD::SETGT: return "setgt";
5668 case ISD::SETGE: return "setge";
5669 case ISD::SETLT: return "setlt";
5670 case ISD::SETLE: return "setle";
5671 case ISD::SETNE: return "setne";
5676 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5685 return "<post-inc>";
5687 return "<post-dec>";
5691 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5692 std::string S = "< ";
5706 if (getByValAlign())
5707 S += "byval-align:" + utostr(getByValAlign()) + " ";
5709 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5711 S += "byval-size:" + utostr(getByValSize()) + " ";
5715 void SDNode::dump() const { dump(0); }
5716 void SDNode::dump(const SelectionDAG *G) const {
5720 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5721 OS << (void*)this << ": ";
5723 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5725 if (getValueType(i) == MVT::Other)
5728 OS << getValueType(i).getEVTString();
5730 OS << " = " << getOperationName(G);
5733 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5734 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5735 if (!MN->memoperands_empty()) {
5738 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5739 e = MN->memoperands_end(); i != e; ++i) {
5746 } else if (const ShuffleVectorSDNode *SVN =
5747 dyn_cast<ShuffleVectorSDNode>(this)) {
5749 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5750 int Idx = SVN->getMaskElt(i);
5758 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5759 OS << '<' << CSDN->getAPIntValue() << '>';
5760 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5761 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5762 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5763 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5764 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5767 CSDN->getValueAPF().bitcastToAPInt().dump();
5770 } else if (const GlobalAddressSDNode *GADN =
5771 dyn_cast<GlobalAddressSDNode>(this)) {
5772 int64_t offset = GADN->getOffset();
5774 WriteAsOperand(OS, GADN->getGlobal());
5777 OS << " + " << offset;
5779 OS << " " << offset;
5780 if (unsigned int TF = GADN->getTargetFlags())
5781 OS << " [TF=" << TF << ']';
5782 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5783 OS << "<" << FIDN->getIndex() << ">";
5784 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5785 OS << "<" << JTDN->getIndex() << ">";
5786 if (unsigned int TF = JTDN->getTargetFlags())
5787 OS << " [TF=" << TF << ']';
5788 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5789 int offset = CP->getOffset();
5790 if (CP->isMachineConstantPoolEntry())
5791 OS << "<" << *CP->getMachineCPVal() << ">";
5793 OS << "<" << *CP->getConstVal() << ">";
5795 OS << " + " << offset;
5797 OS << " " << offset;
5798 if (unsigned int TF = CP->getTargetFlags())
5799 OS << " [TF=" << TF << ']';
5800 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5802 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5804 OS << LBB->getName() << " ";
5805 OS << (const void*)BBDN->getBasicBlock() << ">";
5806 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5807 if (G && R->getReg() &&
5808 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5809 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5811 OS << " %reg" << R->getReg();
5813 } else if (const ExternalSymbolSDNode *ES =
5814 dyn_cast<ExternalSymbolSDNode>(this)) {
5815 OS << "'" << ES->getSymbol() << "'";
5816 if (unsigned int TF = ES->getTargetFlags())
5817 OS << " [TF=" << TF << ']';
5818 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5820 OS << "<" << M->getValue() << ">";
5823 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5824 OS << ":" << N->getVT().getEVTString();
5826 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5827 OS << "<" << *LD->getMemOperand();
5830 switch (LD->getExtensionType()) {
5831 default: doExt = false; break;
5832 case ISD::EXTLOAD: OS << ", anyext"; break;
5833 case ISD::SEXTLOAD: OS << ", sext"; break;
5834 case ISD::ZEXTLOAD: OS << ", zext"; break;
5837 OS << " from " << LD->getMemoryVT().getEVTString();
5839 const char *AM = getIndexedModeName(LD->getAddressingMode());
5844 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5845 OS << "<" << *ST->getMemOperand();
5847 if (ST->isTruncatingStore())
5848 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5850 const char *AM = getIndexedModeName(ST->getAddressingMode());
5855 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5856 OS << "<" << *M->getMemOperand() << ">";
5857 } else if (const BlockAddressSDNode *BA =
5858 dyn_cast<BlockAddressSDNode>(this)) {
5860 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5862 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5864 if (unsigned int TF = BA->getTargetFlags())
5865 OS << " [TF=" << TF << ']';
5869 if (unsigned Order = G->GetOrdering(this))
5870 OS << " [ORD=" << Order << ']';
5873 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5875 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5876 if (i) OS << ", "; else OS << " ";
5877 OS << (void*)getOperand(i).getNode();
5878 if (unsigned RN = getOperand(i).getResNo())
5881 print_details(OS, G);
5884 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5885 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5886 if (N->getOperand(i).getNode()->hasOneUse())
5887 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5889 dbgs() << "\n" << std::string(indent+2, ' ')
5890 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5894 dbgs().indent(indent);
5898 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5899 assert(N->getNumValues() == 1 &&
5900 "Can't unroll a vector with multiple results!");
5902 EVT VT = N->getValueType(0);
5903 unsigned NE = VT.getVectorNumElements();
5904 EVT EltVT = VT.getVectorElementType();
5905 DebugLoc dl = N->getDebugLoc();
5907 SmallVector<SDValue, 8> Scalars;
5908 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5910 // If ResNE is 0, fully unroll the vector op.
5913 else if (NE > ResNE)
5917 for (i= 0; i != NE; ++i) {
5918 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
5919 SDValue Operand = N->getOperand(j);
5920 EVT OperandVT = Operand.getValueType();
5921 if (OperandVT.isVector()) {
5922 // A vector operand; extract a single element.
5923 EVT OperandEltVT = OperandVT.getVectorElementType();
5924 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5927 getConstant(i, MVT::i32));
5929 // A scalar operand; just use it as is.
5930 Operands[j] = Operand;
5934 switch (N->getOpcode()) {
5936 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5937 &Operands[0], Operands.size()));
5944 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
5945 getShiftAmountOperand(Operands[1])));
5950 for (; i < ResNE; ++i)
5951 Scalars.push_back(getUNDEF(EltVT));
5953 return getNode(ISD::BUILD_VECTOR, dl,
5954 EVT::getVectorVT(*getContext(), EltVT, ResNE),
5955 &Scalars[0], Scalars.size());
5959 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
5960 /// location that is 'Dist' units away from the location that the 'Base' load
5961 /// is loading from.
5962 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
5963 unsigned Bytes, int Dist) const {
5964 if (LD->getChain() != Base->getChain())
5966 EVT VT = LD->getValueType(0);
5967 if (VT.getSizeInBits() / 8 != Bytes)
5970 SDValue Loc = LD->getOperand(1);
5971 SDValue BaseLoc = Base->getOperand(1);
5972 if (Loc.getOpcode() == ISD::FrameIndex) {
5973 if (BaseLoc.getOpcode() != ISD::FrameIndex)
5975 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
5976 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
5977 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
5978 int FS = MFI->getObjectSize(FI);
5979 int BFS = MFI->getObjectSize(BFI);
5980 if (FS != BFS || FS != (int)Bytes) return false;
5981 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
5983 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
5984 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
5985 if (V && (V->getSExtValue() == Dist*Bytes))
5989 GlobalValue *GV1 = NULL;
5990 GlobalValue *GV2 = NULL;
5991 int64_t Offset1 = 0;
5992 int64_t Offset2 = 0;
5993 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
5994 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
5995 if (isGA1 && isGA2 && GV1 == GV2)
5996 return Offset1 == (Offset2 + Dist*Bytes);
6001 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6002 /// it cannot be inferred.
6003 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6004 // If this is a GlobalAddress + cst, return the alignment.
6006 int64_t GVOffset = 0;
6007 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
6008 return MinAlign(GV->getAlignment(), GVOffset);
6010 // If this is a direct reference to a stack slot, use information about the
6011 // stack slot's alignment.
6012 int FrameIdx = 1 << 31;
6013 int64_t FrameOffset = 0;
6014 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6015 FrameIdx = FI->getIndex();
6016 } else if (Ptr.getOpcode() == ISD::ADD &&
6017 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6018 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6019 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6020 FrameOffset = Ptr.getConstantOperandVal(1);
6023 if (FrameIdx != (1 << 31)) {
6024 // FIXME: Handle FI+CST.
6025 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6026 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6028 if (MFI.isFixedObjectIndex(FrameIdx)) {
6029 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6031 // The alignment of the frame index can be determined from its offset from
6032 // the incoming frame position. If the frame object is at offset 32 and
6033 // the stack is guaranteed to be 16-byte aligned, then we know that the
6034 // object is 16-byte aligned.
6035 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6036 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6038 // Finally, the frame object itself may have a known alignment. Factor
6039 // the alignment + offset into a new alignment. For example, if we know
6040 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6041 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6042 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6043 return std::max(Align, FIInfoAlign);
6051 void SelectionDAG::dump() const {
6052 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6054 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6056 const SDNode *N = I;
6057 if (!N->hasOneUse() && N != getRoot().getNode())
6058 DumpNodes(N, 2, this);
6061 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6066 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6068 print_details(OS, G);
6071 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6072 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6073 const SelectionDAG *G, VisitedSDNodeSet &once) {
6074 if (!once.insert(N)) // If we've been here before, return now.
6077 // Dump the current SDNode, but don't end the line yet.
6078 OS << std::string(indent, ' ');
6081 // Having printed this SDNode, walk the children:
6082 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6083 const SDNode *child = N->getOperand(i).getNode();
6088 if (child->getNumOperands() == 0) {
6089 // This child has no grandchildren; print it inline right here.
6090 child->printr(OS, G);
6092 } else { // Just the address. FIXME: also print the child's opcode.
6094 if (unsigned RN = N->getOperand(i).getResNo())
6101 // Dump children that have grandchildren on their own line(s).
6102 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6103 const SDNode *child = N->getOperand(i).getNode();
6104 DumpNodesr(OS, child, indent+2, G, once);
6108 void SDNode::dumpr() const {
6109 VisitedSDNodeSet once;
6110 DumpNodesr(dbgs(), this, 0, 0, once);
6113 void SDNode::dumpr(const SelectionDAG *G) const {
6114 VisitedSDNodeSet once;
6115 DumpNodesr(dbgs(), this, 0, G, once);
6119 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6120 unsigned GlobalAddressSDNode::getAddressSpace() const {
6121 return getGlobal()->getType()->getAddressSpace();
6125 const Type *ConstantPoolSDNode::getType() const {
6126 if (isMachineConstantPoolEntry())
6127 return Val.MachineCPVal->getType();
6128 return Val.ConstVal->getType();
6131 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6133 unsigned &SplatBitSize,
6135 unsigned MinSplatBits,
6137 EVT VT = getValueType(0);
6138 assert(VT.isVector() && "Expected a vector type");
6139 unsigned sz = VT.getSizeInBits();
6140 if (MinSplatBits > sz)
6143 SplatValue = APInt(sz, 0);
6144 SplatUndef = APInt(sz, 0);
6146 // Get the bits. Bits with undefined values (when the corresponding element
6147 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6148 // in SplatValue. If any of the values are not constant, give up and return
6150 unsigned int nOps = getNumOperands();
6151 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6152 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6154 for (unsigned j = 0; j < nOps; ++j) {
6155 unsigned i = isBigEndian ? nOps-1-j : j;
6156 SDValue OpVal = getOperand(i);
6157 unsigned BitPos = j * EltBitSize;
6159 if (OpVal.getOpcode() == ISD::UNDEF)
6160 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6161 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6162 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6163 zextOrTrunc(sz) << BitPos);
6164 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6165 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6170 // The build_vector is all constants or undefs. Find the smallest element
6171 // size that splats the vector.
6173 HasAnyUndefs = (SplatUndef != 0);
6176 unsigned HalfSize = sz / 2;
6177 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6178 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6179 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6180 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6182 // If the two halves do not match (ignoring undef bits), stop here.
6183 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6184 MinSplatBits > HalfSize)
6187 SplatValue = HighValue | LowValue;
6188 SplatUndef = HighUndef & LowUndef;
6197 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6198 // Find the first non-undef value in the shuffle mask.
6200 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6203 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6205 // Make sure all remaining elements are either undef or the same as the first
6207 for (int Idx = Mask[i]; i != e; ++i)
6208 if (Mask[i] >= 0 && Mask[i] != Idx)