1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/Analysis/ValueTracking.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/DebugInfo.h"
30 #include "llvm/IR/CallingConv.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DataLayout.h"
33 #include "llvm/IR/DerivedTypes.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/GlobalAlias.h"
36 #include "llvm/IR/GlobalVariable.h"
37 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/Mutex.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Target/TargetInstrInfo.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetLowering.h"
48 #include "llvm/Target/TargetMachine.h"
49 #include "llvm/Target/TargetOptions.h"
50 #include "llvm/Target/TargetRegisterInfo.h"
51 #include "llvm/Target/TargetSelectionDAGInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 if (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 if (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 unsigned i = 0, e = N->getNumOperands();
155 // Skip over all of the undef values.
156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
159 // Do not accept an all-undef vector.
160 if (i == e) return false;
162 // Do not accept build_vectors that aren't all constants or which have non-0
164 SDValue Zero = N->getOperand(i);
165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
166 if (!CN->isNullValue())
168 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
169 if (!CFPN->getValueAPF().isPosZero())
174 // Okay, we have at least one 0 value, check to see if the rest match or are
176 for (++i; i != e; ++i)
177 if (N->getOperand(i) != Zero &&
178 N->getOperand(i).getOpcode() != ISD::UNDEF)
183 /// isScalarToVector - Return true if the specified node is a
184 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
185 /// element is not an undef.
186 bool ISD::isScalarToVector(const SDNode *N) {
187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
190 if (N->getOpcode() != ISD::BUILD_VECTOR)
192 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
194 unsigned NumElems = N->getNumOperands();
197 for (unsigned i = 1; i < NumElems; ++i) {
198 SDValue V = N->getOperand(i);
199 if (V.getOpcode() != ISD::UNDEF)
205 /// allOperandsUndef - Return true if the node has at least one operand
206 /// and all operands of the specified node are ISD::UNDEF.
207 bool ISD::allOperandsUndef(const SDNode *N) {
208 // Return false if the node has no operands.
209 // This is "logically inconsistent" with the definition of "all" but
210 // is probably the desired behavior.
211 if (N->getNumOperands() == 0)
214 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
215 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
221 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
222 /// when given the operation for (X op Y).
223 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
224 // To perform this operation, we just need to swap the L and G bits of the
226 unsigned OldL = (Operation >> 2) & 1;
227 unsigned OldG = (Operation >> 1) & 1;
228 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
229 (OldL << 1) | // New G bit
230 (OldG << 2)); // New L bit.
233 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
234 /// 'op' is a valid SetCC operation.
235 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
236 unsigned Operation = Op;
238 Operation ^= 7; // Flip L, G, E bits, but not U.
240 Operation ^= 15; // Flip all of the condition bits.
242 if (Operation > ISD::SETTRUE2)
243 Operation &= ~8; // Don't let N and U bits get set.
245 return ISD::CondCode(Operation);
249 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
250 /// signed operation and 2 if the result is an unsigned comparison. Return zero
251 /// if the operation does not depend on the sign of the input (setne and seteq).
252 static int isSignedOp(ISD::CondCode Opcode) {
254 default: llvm_unreachable("Illegal integer setcc operation!");
256 case ISD::SETNE: return 0;
260 case ISD::SETGE: return 1;
264 case ISD::SETUGE: return 2;
268 /// getSetCCOrOperation - Return the result of a logical OR between different
269 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
270 /// returns SETCC_INVALID if it is not possible to represent the resultant
272 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
274 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
275 // Cannot fold a signed integer setcc with an unsigned integer setcc.
276 return ISD::SETCC_INVALID;
278 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
280 // If the N and U bits get set then the resultant comparison DOES suddenly
281 // care about orderedness, and is true when ordered.
282 if (Op > ISD::SETTRUE2)
283 Op &= ~16; // Clear the U bit if the N bit is set.
285 // Canonicalize illegal integer setcc's.
286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
289 return ISD::CondCode(Op);
292 /// getSetCCAndOperation - Return the result of a logical AND between different
293 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
294 /// function returns zero if it is not possible to represent the resultant
296 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
299 // Cannot fold a signed setcc with an unsigned setcc.
300 return ISD::SETCC_INVALID;
302 // Combine all of the condition bits.
303 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
305 // Canonicalize illegal integer setcc's.
309 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
310 case ISD::SETOEQ: // SETEQ & SETU[LG]E
311 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
312 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
313 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
320 //===----------------------------------------------------------------------===//
321 // SDNode Profile Support
322 //===----------------------------------------------------------------------===//
324 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
326 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
330 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
331 /// solely with their pointer.
332 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
333 ID.AddPointer(VTList.VTs);
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDValue *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDUse *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 static void AddNodeIDNode(FoldingSetNodeID &ID,
357 unsigned short OpC, SDVTList VTList,
358 const SDValue *OpList, unsigned N) {
359 AddNodeIDOpcode(ID, OpC);
360 AddNodeIDValueTypes(ID, VTList);
361 AddNodeIDOperands(ID, OpList, N);
364 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
366 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
367 switch (N->getOpcode()) {
368 case ISD::TargetExternalSymbol:
369 case ISD::ExternalSymbol:
370 llvm_unreachable("Should only be used on nodes with operands");
371 default: break; // Normal nodes don't need extra info.
372 case ISD::TargetConstant:
374 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
376 case ISD::TargetConstantFP:
377 case ISD::ConstantFP: {
378 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
381 case ISD::TargetGlobalAddress:
382 case ISD::GlobalAddress:
383 case ISD::TargetGlobalTLSAddress:
384 case ISD::GlobalTLSAddress: {
385 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
386 ID.AddPointer(GA->getGlobal());
387 ID.AddInteger(GA->getOffset());
388 ID.AddInteger(GA->getTargetFlags());
389 ID.AddInteger(GA->getAddressSpace());
392 case ISD::BasicBlock:
393 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
396 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
398 case ISD::RegisterMask:
399 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
422 ID.AddInteger(CP->getTargetFlags());
425 case ISD::TargetIndex: {
426 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
427 ID.AddInteger(TI->getIndex());
428 ID.AddInteger(TI->getOffset());
429 ID.AddInteger(TI->getTargetFlags());
433 const LoadSDNode *LD = cast<LoadSDNode>(N);
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawSubclassData());
436 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
440 const StoreSDNode *ST = cast<StoreSDNode>(N);
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawSubclassData());
443 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX:
458 case ISD::ATOMIC_LOAD:
459 case ISD::ATOMIC_STORE: {
460 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
461 ID.AddInteger(AT->getMemoryVT().getRawBits());
462 ID.AddInteger(AT->getRawSubclassData());
463 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
466 case ISD::PREFETCH: {
467 const MemSDNode *PF = cast<MemSDNode>(N);
468 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
471 case ISD::VECTOR_SHUFFLE: {
472 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
475 ID.AddInteger(SVN->getMaskElt(i));
478 case ISD::TargetBlockAddress:
479 case ISD::BlockAddress: {
480 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
481 ID.AddPointer(BA->getBlockAddress());
482 ID.AddInteger(BA->getOffset());
483 ID.AddInteger(BA->getTargetFlags());
486 } // end switch (N->getOpcode())
488 // Target specific memory nodes could also have address spaces to check.
489 if (N->isTargetMemoryOpcode())
490 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
493 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
495 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
496 AddNodeIDOpcode(ID, N->getOpcode());
497 // Add the return value info.
498 AddNodeIDValueTypes(ID, N->getVTList());
499 // Add the operand info.
500 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
502 // Handle SDNode leafs with special info.
503 AddNodeIDCustom(ID, N);
506 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
507 /// the CSE map that carries volatility, temporalness, indexing mode, and
508 /// extension/truncation information.
510 static inline unsigned
511 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
512 bool isNonTemporal, bool isInvariant) {
513 assert((ConvType & 3) == ConvType &&
514 "ConvType may not require more than 2 bits!");
515 assert((AM & 7) == AM &&
516 "AM may not require more than 3 bits!");
520 (isNonTemporal << 6) |
524 //===----------------------------------------------------------------------===//
525 // SelectionDAG Class
526 //===----------------------------------------------------------------------===//
528 /// doNotCSE - Return true if CSE should not be performed for this node.
529 static bool doNotCSE(SDNode *N) {
530 if (N->getValueType(0) == MVT::Glue)
531 return true; // Never CSE anything that produces a flag.
533 switch (N->getOpcode()) {
535 case ISD::HANDLENODE:
537 return true; // Never CSE these nodes.
540 // Check that remaining values produced are not flags.
541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
542 if (N->getValueType(i) == MVT::Glue)
543 return true; // Never CSE anything that produces a flag.
548 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
550 void SelectionDAG::RemoveDeadNodes() {
551 // Create a dummy node (which is not added to allnodes), that adds a reference
552 // to the root node, preventing it from being deleted.
553 HandleSDNode Dummy(getRoot());
555 SmallVector<SDNode*, 128> DeadNodes;
557 // Add all obviously-dead nodes to the DeadNodes worklist.
558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
560 DeadNodes.push_back(I);
562 RemoveDeadNodes(DeadNodes);
564 // If the root changed (e.g. it was a dead load, update the root).
565 setRoot(Dummy.getValue());
568 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
569 /// given list, and any nodes that become unreachable as a result.
570 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
572 // Process the worklist, deleting the nodes and adding their uses to the
574 while (!DeadNodes.empty()) {
575 SDNode *N = DeadNodes.pop_back_val();
577 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
578 DUL->NodeDeleted(N, 0);
580 // Take the node out of the appropriate CSE map.
581 RemoveNodeFromCSEMaps(N);
583 // Next, brutally remove the operand list. This is safe to do, as there are
584 // no cycles in the graph.
585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
587 SDNode *Operand = Use.getNode();
590 // Now that we removed this operand, see if there are no uses of it left.
591 if (Operand->use_empty())
592 DeadNodes.push_back(Operand);
599 void SelectionDAG::RemoveDeadNode(SDNode *N){
600 SmallVector<SDNode*, 16> DeadNodes(1, N);
602 // Create a dummy node that adds a reference to the root node, preventing
603 // it from being deleted. (This matters if the root is an operand of the
605 HandleSDNode Dummy(getRoot());
607 RemoveDeadNodes(DeadNodes);
610 void SelectionDAG::DeleteNode(SDNode *N) {
611 // First take this out of the appropriate CSE map.
612 RemoveNodeFromCSEMaps(N);
614 // Finally, remove uses due to operands of this node, remove from the
615 // AllNodes list, and delete the node.
616 DeleteNodeNotInCSEMaps(N);
619 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
620 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
621 assert(N->use_empty() && "Cannot delete a node that is not dead!");
623 // Drop all of the operands and decrement used node's use counts.
629 void SelectionDAG::DeallocateNode(SDNode *N) {
630 if (N->OperandsNeedDelete)
631 delete[] N->OperandList;
633 // Set the opcode to DELETED_NODE to help catch bugs when node
634 // memory is reallocated.
635 N->NodeType = ISD::DELETED_NODE;
637 NodeAllocator.Deallocate(AllNodes.remove(N));
639 // Remove the ordering of this node.
642 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
643 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
644 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
645 DbgVals[i]->setIsInvalidated();
648 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
649 /// correspond to it. This is useful when we're about to delete or repurpose
650 /// the node. We don't want future request for structurally identical nodes
651 /// to return N anymore.
652 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
654 switch (N->getOpcode()) {
655 case ISD::HANDLENODE: return false; // noop.
657 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
658 "Cond code doesn't exist!");
659 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
660 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
662 case ISD::ExternalSymbol:
663 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
665 case ISD::TargetExternalSymbol: {
666 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
667 Erased = TargetExternalSymbols.erase(
668 std::pair<std::string,unsigned char>(ESN->getSymbol(),
669 ESN->getTargetFlags()));
672 case ISD::VALUETYPE: {
673 EVT VT = cast<VTSDNode>(N)->getVT();
674 if (VT.isExtended()) {
675 Erased = ExtendedValueTypeNodes.erase(VT);
677 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
678 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
683 // Remove it from the CSE Map.
684 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
685 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
686 Erased = CSEMap.RemoveNode(N);
690 // Verify that the node was actually in one of the CSE maps, unless it has a
691 // flag result (which cannot be CSE'd) or is one of the special cases that are
692 // not subject to CSE.
693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
694 !N->isMachineOpcode() && !doNotCSE(N)) {
697 llvm_unreachable("Node is not in map!");
703 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
704 /// maps and modified in place. Add it back to the CSE maps, unless an identical
705 /// node already exists, in which case transfer all its users to the existing
706 /// node. This transfer can potentially trigger recursive merging.
709 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
710 // For node types that aren't CSE'd, just act as if no identical node
713 SDNode *Existing = CSEMap.GetOrInsertNode(N);
715 // If there was already an existing matching node, use ReplaceAllUsesWith
716 // to replace the dead one with the existing one. This can cause
717 // recursive merging of other unrelated nodes down the line.
718 ReplaceAllUsesWith(N, Existing);
720 // N is now dead. Inform the listeners and delete it.
721 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
722 DUL->NodeDeleted(N, Existing);
723 DeleteNodeNotInCSEMaps(N);
728 // If the node doesn't already exist, we updated it. Inform listeners.
729 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
733 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
734 /// were replaced with those specified. If this node is never memoized,
735 /// return null, otherwise return a pointer to the slot it would take. If a
736 /// node already exists with these operands, the slot will be non-null.
737 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
742 SDValue Ops[] = { Op };
744 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
745 AddNodeIDCustom(ID, N);
746 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
750 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
751 /// were replaced with those specified. If this node is never memoized,
752 /// return null, otherwise return a pointer to the slot it would take. If a
753 /// node already exists with these operands, the slot will be non-null.
754 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
755 SDValue Op1, SDValue Op2,
760 SDValue Ops[] = { Op1, Op2 };
762 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
763 AddNodeIDCustom(ID, N);
764 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
769 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
770 /// were replaced with those specified. If this node is never memoized,
771 /// return null, otherwise return a pointer to the slot it would take. If a
772 /// node already exists with these operands, the slot will be non-null.
773 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
774 const SDValue *Ops,unsigned NumOps,
780 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
781 AddNodeIDCustom(ID, N);
782 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
787 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
788 static void VerifyNodeCommon(SDNode *N) {
789 switch (N->getOpcode()) {
792 case ISD::BUILD_PAIR: {
793 EVT VT = N->getValueType(0);
794 assert(N->getNumValues() == 1 && "Too many results!");
795 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
796 "Wrong return type!");
797 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
799 "Mismatched operand types!");
800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
801 "Wrong operand type!");
802 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
803 "Wrong return type size");
806 case ISD::BUILD_VECTOR: {
807 assert(N->getNumValues() == 1 && "Too many results!");
808 assert(N->getValueType(0).isVector() && "Wrong return type!");
809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
810 "Wrong number of operands!");
811 EVT EltVT = N->getValueType(0).getVectorElementType();
812 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
813 assert((I->getValueType() == EltVT ||
814 (EltVT.isInteger() && I->getValueType().isInteger() &&
815 EltVT.bitsLE(I->getValueType()))) &&
816 "Wrong operand type!");
817 assert(I->getValueType() == N->getOperand(0).getValueType() &&
818 "Operands must all have the same type");
825 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
826 static void VerifySDNode(SDNode *N) {
827 // The SDNode allocators cannot be used to allocate nodes with fields that are
828 // not present in an SDNode!
829 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
830 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
831 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
832 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
833 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
834 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
835 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
836 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
837 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
838 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
839 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
840 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
841 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
842 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
843 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
844 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
845 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
846 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
847 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
852 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
854 static void VerifyMachineNode(SDNode *N) {
855 // The MachineNode allocators cannot be used to allocate nodes with fields
856 // that are not present in a MachineNode!
857 // Currently there are no such nodes.
863 /// getEVTAlignment - Compute the default alignment value for the
866 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
867 Type *Ty = VT == MVT::iPTR ?
868 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
869 VT.getTypeForEVT(*getContext());
871 return TLI.getDataLayout()->getABITypeAlignment(Ty);
874 // EntryNode could meaningfully have debug info if we can find it...
875 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
876 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
877 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(),
878 getVTList(MVT::Other)),
879 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
880 AllNodes.push_back(&EntryNode);
881 Ordering = new SDNodeOrdering();
882 DbgInfo = new SDDbgInfo();
885 void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) {
888 Context = &mf.getFunction()->getContext();
891 SelectionDAG::~SelectionDAG() {
892 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
898 void SelectionDAG::allnodes_clear() {
899 assert(&*AllNodes.begin() == &EntryNode);
900 AllNodes.remove(AllNodes.begin());
901 while (!AllNodes.empty())
902 DeallocateNode(AllNodes.begin());
905 void SelectionDAG::clear() {
907 OperandAllocator.Reset();
910 ExtendedValueTypeNodes.clear();
911 ExternalSymbols.clear();
912 TargetExternalSymbols.clear();
913 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
914 static_cast<CondCodeSDNode*>(0));
915 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
916 static_cast<SDNode*>(0));
918 EntryNode.UseList = 0;
919 AllNodes.push_back(&EntryNode);
920 Root = getEntryNode();
925 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
926 return VT.bitsGT(Op.getValueType()) ?
927 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
928 getNode(ISD::TRUNCATE, DL, VT, Op);
931 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
932 return VT.bitsGT(Op.getValueType()) ?
933 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
934 getNode(ISD::TRUNCATE, DL, VT, Op);
937 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
938 return VT.bitsGT(Op.getValueType()) ?
939 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
940 getNode(ISD::TRUNCATE, DL, VT, Op);
943 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
944 assert(!VT.isVector() &&
945 "getZeroExtendInReg should use the vector element type instead of "
947 if (Op.getValueType() == VT) return Op;
948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
949 APInt Imm = APInt::getLowBitsSet(BitWidth,
951 return getNode(ISD::AND, DL, Op.getValueType(), Op,
952 getConstant(Imm, Op.getValueType()));
955 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
957 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
958 EVT EltVT = VT.getScalarType();
960 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
961 return getNode(ISD::XOR, DL, VT, Val, NegOne);
964 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
965 EVT EltVT = VT.getScalarType();
966 assert((EltVT.getSizeInBits() >= 64 ||
967 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
968 "getConstant with a uint64_t value that doesn't fit in the type!");
969 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
972 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
973 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
976 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
977 assert(VT.isInteger() && "Cannot create FP integer constant!");
979 EVT EltVT = VT.getScalarType();
980 const ConstantInt *Elt = &Val;
982 // In some cases the vector type is legal but the element type is illegal and
983 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
984 // inserted value (the type does not need to match the vector element type).
985 // Any extra bits introduced will be truncated away.
986 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
987 TargetLowering::TypePromoteInteger) {
988 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
989 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
990 Elt = ConstantInt::get(*getContext(), NewVal);
993 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
994 "APInt size does not match type size!");
995 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
997 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1001 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1003 return SDValue(N, 0);
1006 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1007 CSEMap.InsertNode(N, IP);
1008 AllNodes.push_back(N);
1011 SDValue Result(N, 0);
1012 if (VT.isVector()) {
1013 SmallVector<SDValue, 8> Ops;
1014 Ops.assign(VT.getVectorNumElements(), Result);
1015 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1020 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1021 return getConstant(Val, TLI.getPointerTy(), isTarget);
1025 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1026 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1029 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1030 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1032 EVT EltVT = VT.getScalarType();
1034 // Do the map lookup using the actual bit pattern for the floating point
1035 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1036 // we don't have issues with SNANs.
1037 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1038 FoldingSetNodeID ID;
1039 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1043 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1045 return SDValue(N, 0);
1048 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1049 CSEMap.InsertNode(N, IP);
1050 AllNodes.push_back(N);
1053 SDValue Result(N, 0);
1054 if (VT.isVector()) {
1055 SmallVector<SDValue, 8> Ops;
1056 Ops.assign(VT.getVectorNumElements(), Result);
1057 // FIXME DebugLoc info might be appropriate here
1058 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1063 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1064 EVT EltVT = VT.getScalarType();
1065 if (EltVT==MVT::f32)
1066 return getConstantFP(APFloat((float)Val), VT, isTarget);
1067 else if (EltVT==MVT::f64)
1068 return getConstantFP(APFloat(Val), VT, isTarget);
1069 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1072 APFloat apf = APFloat(Val);
1073 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1075 return getConstantFP(apf, VT, isTarget);
1077 llvm_unreachable("Unsupported type in getConstantFP");
1080 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1081 EVT VT, int64_t Offset,
1083 unsigned char TargetFlags) {
1084 assert((TargetFlags == 0 || isTargetGA) &&
1085 "Cannot set target flags on target-independent globals");
1087 // Truncate (with sign-extension) the offset value to the pointer size.
1088 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1090 Offset = SignExtend64(Offset, BitWidth);
1092 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1094 // If GV is an alias then use the aliasee for determining thread-localness.
1095 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1096 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1100 if (GVar && GVar->isThreadLocal())
1101 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1103 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1108 ID.AddInteger(Offset);
1109 ID.AddInteger(TargetFlags);
1110 ID.AddInteger(GV->getType()->getAddressSpace());
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1116 Offset, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1123 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1124 FoldingSetNodeID ID;
1125 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1129 return SDValue(E, 0);
1131 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1132 CSEMap.InsertNode(N, IP);
1133 AllNodes.push_back(N);
1134 return SDValue(N, 0);
1137 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1138 unsigned char TargetFlags) {
1139 assert((TargetFlags == 0 || isTarget) &&
1140 "Cannot set target flags on target-independent jump tables");
1141 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1142 FoldingSetNodeID ID;
1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1145 ID.AddInteger(TargetFlags);
1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1148 return SDValue(E, 0);
1150 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1152 CSEMap.InsertNode(N, IP);
1153 AllNodes.push_back(N);
1154 return SDValue(N, 0);
1157 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1158 unsigned Alignment, int Offset,
1160 unsigned char TargetFlags) {
1161 assert((TargetFlags == 0 || isTarget) &&
1162 "Cannot set target flags on target-independent globals");
1164 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1165 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1166 FoldingSetNodeID ID;
1167 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1168 ID.AddInteger(Alignment);
1169 ID.AddInteger(Offset);
1171 ID.AddInteger(TargetFlags);
1173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1174 return SDValue(E, 0);
1176 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1177 Alignment, TargetFlags);
1178 CSEMap.InsertNode(N, IP);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1184 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1185 unsigned Alignment, int Offset,
1187 unsigned char TargetFlags) {
1188 assert((TargetFlags == 0 || isTarget) &&
1189 "Cannot set target flags on target-independent globals");
1191 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1192 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1193 FoldingSetNodeID ID;
1194 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1195 ID.AddInteger(Alignment);
1196 ID.AddInteger(Offset);
1197 C->addSelectionDAGCSEId(ID);
1198 ID.AddInteger(TargetFlags);
1200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1201 return SDValue(E, 0);
1203 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1204 Alignment, TargetFlags);
1205 CSEMap.InsertNode(N, IP);
1206 AllNodes.push_back(N);
1207 return SDValue(N, 0);
1210 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1211 unsigned char TargetFlags) {
1212 FoldingSetNodeID ID;
1213 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1214 ID.AddInteger(Index);
1215 ID.AddInteger(Offset);
1216 ID.AddInteger(TargetFlags);
1218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1219 return SDValue(E, 0);
1221 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1223 CSEMap.InsertNode(N, IP);
1224 AllNodes.push_back(N);
1225 return SDValue(N, 0);
1228 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1229 FoldingSetNodeID ID;
1230 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1233 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1234 return SDValue(E, 0);
1236 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1237 CSEMap.InsertNode(N, IP);
1238 AllNodes.push_back(N);
1239 return SDValue(N, 0);
1242 SDValue SelectionDAG::getValueType(EVT VT) {
1243 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1244 ValueTypeNodes.size())
1245 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1247 SDNode *&N = VT.isExtended() ?
1248 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1250 if (N) return SDValue(N, 0);
1251 N = new (NodeAllocator) VTSDNode(VT);
1252 AllNodes.push_back(N);
1253 return SDValue(N, 0);
1256 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1257 SDNode *&N = ExternalSymbols[Sym];
1258 if (N) return SDValue(N, 0);
1259 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1260 AllNodes.push_back(N);
1261 return SDValue(N, 0);
1264 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1265 unsigned char TargetFlags) {
1267 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1269 if (N) return SDValue(N, 0);
1270 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1271 AllNodes.push_back(N);
1272 return SDValue(N, 0);
1275 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1276 if ((unsigned)Cond >= CondCodeNodes.size())
1277 CondCodeNodes.resize(Cond+1);
1279 if (CondCodeNodes[Cond] == 0) {
1280 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1281 CondCodeNodes[Cond] = N;
1282 AllNodes.push_back(N);
1285 return SDValue(CondCodeNodes[Cond], 0);
1288 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1289 // the shuffle mask M that point at N1 to point at N2, and indices that point
1290 // N2 to point at N1.
1291 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1293 int NElts = M.size();
1294 for (int i = 0; i != NElts; ++i) {
1302 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1303 SDValue N2, const int *Mask) {
1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1305 assert(VT.isVector() && N1.getValueType().isVector() &&
1306 "Vector Shuffle VTs must be a vectors");
1307 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1308 && "Vector Shuffle VTs must have same element type");
1310 // Canonicalize shuffle undef, undef -> undef
1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1312 return getUNDEF(VT);
1314 // Validate that all indices in Mask are within the range of the elements
1315 // input to the shuffle.
1316 unsigned NElts = VT.getVectorNumElements();
1317 SmallVector<int, 8> MaskVec;
1318 for (unsigned i = 0; i != NElts; ++i) {
1319 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1320 MaskVec.push_back(Mask[i]);
1323 // Canonicalize shuffle v, v -> v, undef
1326 for (unsigned i = 0; i != NElts; ++i)
1327 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1330 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1331 if (N1.getOpcode() == ISD::UNDEF)
1332 commuteShuffle(N1, N2, MaskVec);
1334 // Canonicalize all index into lhs, -> shuffle lhs, undef
1335 // Canonicalize all index into rhs, -> shuffle rhs, undef
1336 bool AllLHS = true, AllRHS = true;
1337 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1338 for (unsigned i = 0; i != NElts; ++i) {
1339 if (MaskVec[i] >= (int)NElts) {
1344 } else if (MaskVec[i] >= 0) {
1348 if (AllLHS && AllRHS)
1349 return getUNDEF(VT);
1350 if (AllLHS && !N2Undef)
1354 commuteShuffle(N1, N2, MaskVec);
1357 // If Identity shuffle, or all shuffle in to undef, return that node.
1358 bool AllUndef = true;
1359 bool Identity = true;
1360 for (unsigned i = 0; i != NElts; ++i) {
1361 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1362 if (MaskVec[i] >= 0) AllUndef = false;
1364 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1367 return getUNDEF(VT);
1369 FoldingSetNodeID ID;
1370 SDValue Ops[2] = { N1, N2 };
1371 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1372 for (unsigned i = 0; i != NElts; ++i)
1373 ID.AddInteger(MaskVec[i]);
1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1377 return SDValue(E, 0);
1379 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1380 // SDNode doesn't have access to it. This memory will be "leaked" when
1381 // the node is deallocated, but recovered when the NodeAllocator is released.
1382 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1383 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1385 ShuffleVectorSDNode *N =
1386 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1387 CSEMap.InsertNode(N, IP);
1388 AllNodes.push_back(N);
1389 return SDValue(N, 0);
1392 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1393 SDValue Val, SDValue DTy,
1394 SDValue STy, SDValue Rnd, SDValue Sat,
1395 ISD::CvtCode Code) {
1396 // If the src and dest types are the same and the conversion is between
1397 // integer types of the same sign or two floats, no conversion is necessary.
1399 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1402 FoldingSetNodeID ID;
1403 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1404 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1407 return SDValue(E, 0);
1409 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1416 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1417 FoldingSetNodeID ID;
1418 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1419 ID.AddInteger(RegNo);
1421 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1422 return SDValue(E, 0);
1424 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1425 CSEMap.InsertNode(N, IP);
1426 AllNodes.push_back(N);
1427 return SDValue(N, 0);
1430 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1431 FoldingSetNodeID ID;
1432 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1433 ID.AddPointer(RegMask);
1435 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1436 return SDValue(E, 0);
1438 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1439 CSEMap.InsertNode(N, IP);
1440 AllNodes.push_back(N);
1441 return SDValue(N, 0);
1444 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1445 FoldingSetNodeID ID;
1446 SDValue Ops[] = { Root };
1447 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1448 ID.AddPointer(Label);
1450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1451 return SDValue(E, 0);
1453 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1454 CSEMap.InsertNode(N, IP);
1455 AllNodes.push_back(N);
1456 return SDValue(N, 0);
1460 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1463 unsigned char TargetFlags) {
1464 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1466 FoldingSetNodeID ID;
1467 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1469 ID.AddInteger(Offset);
1470 ID.AddInteger(TargetFlags);
1472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1473 return SDValue(E, 0);
1475 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1477 CSEMap.InsertNode(N, IP);
1478 AllNodes.push_back(N);
1479 return SDValue(N, 0);
1482 SDValue SelectionDAG::getSrcValue(const Value *V) {
1483 assert((!V || V->getType()->isPointerTy()) &&
1484 "SrcValue is not a pointer?");
1486 FoldingSetNodeID ID;
1487 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1492 return SDValue(E, 0);
1494 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1495 CSEMap.InsertNode(N, IP);
1496 AllNodes.push_back(N);
1497 return SDValue(N, 0);
1500 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1501 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1502 FoldingSetNodeID ID;
1503 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1508 return SDValue(E, 0);
1510 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1511 CSEMap.InsertNode(N, IP);
1512 AllNodes.push_back(N);
1513 return SDValue(N, 0);
1517 /// getShiftAmountOperand - Return the specified value casted to
1518 /// the target's desired shift amount type.
1519 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1520 EVT OpTy = Op.getValueType();
1521 EVT ShTy = TLI.getShiftAmountTy(LHSTy);
1522 if (OpTy == ShTy || OpTy.isVector()) return Op;
1524 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1525 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1528 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1529 /// specified value type.
1530 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1531 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1532 unsigned ByteSize = VT.getStoreSize();
1533 Type *Ty = VT.getTypeForEVT(*getContext());
1534 unsigned StackAlign =
1535 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1537 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1538 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1541 /// CreateStackTemporary - Create a stack temporary suitable for holding
1542 /// either of the specified value types.
1543 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1544 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1545 VT2.getStoreSizeInBits())/8;
1546 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1547 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1548 const DataLayout *TD = TLI.getDataLayout();
1549 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1550 TD->getPrefTypeAlignment(Ty2));
1552 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1553 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1554 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1557 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1558 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1559 // These setcc operations always fold.
1563 case ISD::SETFALSE2: return getConstant(0, VT);
1565 case ISD::SETTRUE2: return getConstant(1, VT);
1577 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1581 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1582 const APInt &C2 = N2C->getAPIntValue();
1583 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1584 const APInt &C1 = N1C->getAPIntValue();
1587 default: llvm_unreachable("Unknown integer setcc!");
1588 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1589 case ISD::SETNE: return getConstant(C1 != C2, VT);
1590 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1591 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1592 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1593 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1594 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1595 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1596 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1597 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1601 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1602 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1603 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1606 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1607 return getUNDEF(VT);
1609 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1610 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1611 return getUNDEF(VT);
1613 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1614 R==APFloat::cmpLessThan, VT);
1615 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1616 return getUNDEF(VT);
1618 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1619 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1620 return getUNDEF(VT);
1622 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1623 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1624 return getUNDEF(VT);
1626 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1627 R==APFloat::cmpEqual, VT);
1628 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1629 return getUNDEF(VT);
1631 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1632 R==APFloat::cmpEqual, VT);
1633 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1634 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1635 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1636 R==APFloat::cmpEqual, VT);
1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1638 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1639 R==APFloat::cmpLessThan, VT);
1640 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1641 R==APFloat::cmpUnordered, VT);
1642 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1643 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1646 // Ensure that the constant occurs on the RHS.
1647 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1651 // Could not fold it.
1655 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1656 /// use this predicate to simplify operations downstream.
1657 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1658 // This predicate is not safe for vector operations.
1659 if (Op.getValueType().isVector())
1662 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1663 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1666 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1667 /// this predicate to simplify operations downstream. Mask is known to be zero
1668 /// for bits that V cannot have.
1669 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1670 unsigned Depth) const {
1671 APInt KnownZero, KnownOne;
1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1674 return (KnownZero & Mask) == Mask;
1677 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1678 /// known to be either zero or one and return them in the KnownZero/KnownOne
1679 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1681 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1682 APInt &KnownOne, unsigned Depth) const {
1683 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1687 return; // Limit search depth.
1689 APInt KnownZero2, KnownOne2;
1691 switch (Op.getOpcode()) {
1693 // We know all of the bits for a constant!
1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1695 KnownZero = ~KnownOne;
1698 // If either the LHS or the RHS are Zero, the result is zero.
1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1700 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1702 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1704 // Output known-1 bits are only known if set in both the LHS & RHS.
1705 KnownOne &= KnownOne2;
1706 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1707 KnownZero |= KnownZero2;
1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1715 // Output known-0 bits are only known if clear in both the LHS & RHS.
1716 KnownZero &= KnownZero2;
1717 // Output known-1 are known to be set if set in either the LHS | RHS.
1718 KnownOne |= KnownOne2;
1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1726 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1727 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1728 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1729 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1730 KnownZero = KnownZeroOut;
1734 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1735 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1739 // If low bits are zero in either operand, output low known-0 bits.
1740 // Also compute a conserative estimate for high known-0 bits.
1741 // More trickiness is possible, but this is sufficient for the
1742 // interesting case of alignment computation.
1743 KnownOne.clearAllBits();
1744 unsigned TrailZ = KnownZero.countTrailingOnes() +
1745 KnownZero2.countTrailingOnes();
1746 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1747 KnownZero2.countLeadingOnes(),
1748 BitWidth) - BitWidth;
1750 TrailZ = std::min(TrailZ, BitWidth);
1751 LeadZ = std::min(LeadZ, BitWidth);
1752 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1753 APInt::getHighBitsSet(BitWidth, LeadZ);
1757 // For the purposes of computing leading zeros we can conservatively
1758 // treat a udiv as a logical right shift by the power of 2 known to
1759 // be less than the denominator.
1760 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1761 unsigned LeadZ = KnownZero2.countLeadingOnes();
1763 KnownOne2.clearAllBits();
1764 KnownZero2.clearAllBits();
1765 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1766 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1767 if (RHSUnknownLeadingOnes != BitWidth)
1768 LeadZ = std::min(BitWidth,
1769 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1771 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1775 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1780 // Only known if known in both the LHS and RHS.
1781 KnownOne &= KnownOne2;
1782 KnownZero &= KnownZero2;
1784 case ISD::SELECT_CC:
1785 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1786 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1787 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1790 // Only known if known in both the LHS and RHS.
1791 KnownOne &= KnownOne2;
1792 KnownZero &= KnownZero2;
1800 if (Op.getResNo() != 1)
1802 // The boolean result conforms to getBooleanContents. Fall through.
1804 // If we know the result of a setcc has the top bits zero, use this info.
1805 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1806 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1810 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1811 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1812 unsigned ShAmt = SA->getZExtValue();
1814 // If the shift count is an invalid immediate, don't do anything.
1815 if (ShAmt >= BitWidth)
1818 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1819 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1820 KnownZero <<= ShAmt;
1822 // low bits known zero.
1823 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1827 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1828 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1829 unsigned ShAmt = SA->getZExtValue();
1831 // If the shift count is an invalid immediate, don't do anything.
1832 if (ShAmt >= BitWidth)
1835 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1837 KnownZero = KnownZero.lshr(ShAmt);
1838 KnownOne = KnownOne.lshr(ShAmt);
1840 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1841 KnownZero |= HighBits; // High bits known zero.
1845 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1846 unsigned ShAmt = SA->getZExtValue();
1848 // If the shift count is an invalid immediate, don't do anything.
1849 if (ShAmt >= BitWidth)
1852 // If any of the demanded bits are produced by the sign extension, we also
1853 // demand the input sign bit.
1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1856 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 KnownZero = KnownZero.lshr(ShAmt);
1859 KnownOne = KnownOne.lshr(ShAmt);
1861 // Handle the sign bits.
1862 APInt SignBit = APInt::getSignBit(BitWidth);
1863 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1865 if (KnownZero.intersects(SignBit)) {
1866 KnownZero |= HighBits; // New bits are known zero.
1867 } else if (KnownOne.intersects(SignBit)) {
1868 KnownOne |= HighBits; // New bits are known one.
1872 case ISD::SIGN_EXTEND_INREG: {
1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 unsigned EBits = EVT.getScalarType().getSizeInBits();
1876 // Sign extension. Compute the demanded bits in the result that are not
1877 // present in the input.
1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1880 APInt InSignBit = APInt::getSignBit(EBits);
1881 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1883 // If the sign extended bits are demanded, we know that the sign
1885 InSignBit = InSignBit.zext(BitWidth);
1886 if (NewBits.getBoolValue())
1887 InputDemandedBits |= InSignBit;
1889 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1890 KnownOne &= InputDemandedBits;
1891 KnownZero &= InputDemandedBits;
1892 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1894 // If the sign bit of the input is known set or clear, then we know the
1895 // top bits of the result.
1896 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1897 KnownZero |= NewBits;
1898 KnownOne &= ~NewBits;
1899 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1900 KnownOne |= NewBits;
1901 KnownZero &= ~NewBits;
1902 } else { // Input sign bit unknown
1903 KnownZero &= ~NewBits;
1904 KnownOne &= ~NewBits;
1909 case ISD::CTTZ_ZERO_UNDEF:
1911 case ISD::CTLZ_ZERO_UNDEF:
1913 unsigned LowBits = Log2_32(BitWidth)+1;
1914 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1915 KnownOne.clearAllBits();
1919 LoadSDNode *LD = cast<LoadSDNode>(Op);
1920 // If this is a ZEXTLoad and we are looking at the loaded value.
1921 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
1922 EVT VT = LD->getMemoryVT();
1923 unsigned MemBits = VT.getScalarType().getSizeInBits();
1924 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1925 } else if (const MDNode *Ranges = LD->getRanges()) {
1926 computeMaskedBitsLoad(*Ranges, KnownZero);
1930 case ISD::ZERO_EXTEND: {
1931 EVT InVT = Op.getOperand(0).getValueType();
1932 unsigned InBits = InVT.getScalarType().getSizeInBits();
1933 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1934 KnownZero = KnownZero.trunc(InBits);
1935 KnownOne = KnownOne.trunc(InBits);
1936 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1937 KnownZero = KnownZero.zext(BitWidth);
1938 KnownOne = KnownOne.zext(BitWidth);
1939 KnownZero |= NewBits;
1942 case ISD::SIGN_EXTEND: {
1943 EVT InVT = Op.getOperand(0).getValueType();
1944 unsigned InBits = InVT.getScalarType().getSizeInBits();
1945 APInt InSignBit = APInt::getSignBit(InBits);
1946 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1948 KnownZero = KnownZero.trunc(InBits);
1949 KnownOne = KnownOne.trunc(InBits);
1950 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1952 // Note if the sign bit is known to be zero or one.
1953 bool SignBitKnownZero = KnownZero.isNegative();
1954 bool SignBitKnownOne = KnownOne.isNegative();
1955 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1956 "Sign bit can't be known to be both zero and one!");
1958 KnownZero = KnownZero.zext(BitWidth);
1959 KnownOne = KnownOne.zext(BitWidth);
1961 // If the sign bit is known zero or one, the top bits match.
1962 if (SignBitKnownZero)
1963 KnownZero |= NewBits;
1964 else if (SignBitKnownOne)
1965 KnownOne |= NewBits;
1968 case ISD::ANY_EXTEND: {
1969 EVT InVT = Op.getOperand(0).getValueType();
1970 unsigned InBits = InVT.getScalarType().getSizeInBits();
1971 KnownZero = KnownZero.trunc(InBits);
1972 KnownOne = KnownOne.trunc(InBits);
1973 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1974 KnownZero = KnownZero.zext(BitWidth);
1975 KnownOne = KnownOne.zext(BitWidth);
1978 case ISD::TRUNCATE: {
1979 EVT InVT = Op.getOperand(0).getValueType();
1980 unsigned InBits = InVT.getScalarType().getSizeInBits();
1981 KnownZero = KnownZero.zext(InBits);
1982 KnownOne = KnownOne.zext(InBits);
1983 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1984 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1985 KnownZero = KnownZero.trunc(BitWidth);
1986 KnownOne = KnownOne.trunc(BitWidth);
1989 case ISD::AssertZext: {
1990 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1991 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1992 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1993 KnownZero |= (~InMask);
1994 KnownOne &= (~KnownZero);
1998 // All bits are zero except the low bit.
1999 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2003 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2004 // We know that the top bits of C-X are clear if X contains less bits
2005 // than C (i.e. no wrap-around can happen). For example, 20-X is
2006 // positive if we can prove that X is >= 0 and < 16.
2007 if (CLHS->getAPIntValue().isNonNegative()) {
2008 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2009 // NLZ can't be BitWidth with no sign bit
2010 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2011 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2013 // If all of the MaskV bits are known to be zero, then we know the
2014 // output top bits are zero, because we now know that the output is
2016 if ((KnownZero2 & MaskV) == MaskV) {
2017 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2018 // Top bits known zero.
2019 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2027 // Output known-0 bits are known if clear or set in both the low clear bits
2028 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2029 // low 3 bits clear.
2030 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2031 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2032 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2034 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2035 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2036 KnownZeroOut = std::min(KnownZeroOut,
2037 KnownZero2.countTrailingOnes());
2039 if (Op.getOpcode() == ISD::ADD) {
2040 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2044 // With ADDE, a carry bit may be added in, so we can only use this
2045 // information if we know (at least) that the low two bits are clear. We
2046 // then return to the caller that the low bit is unknown but that other bits
2048 if (KnownZeroOut >= 2) // ADDE
2049 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2053 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2054 const APInt &RA = Rem->getAPIntValue().abs();
2055 if (RA.isPowerOf2()) {
2056 APInt LowBits = RA - 1;
2057 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2058 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2060 // The low bits of the first operand are unchanged by the srem.
2061 KnownZero = KnownZero2 & LowBits;
2062 KnownOne = KnownOne2 & LowBits;
2064 // If the first operand is non-negative or has all low bits zero, then
2065 // the upper bits are all zero.
2066 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2067 KnownZero |= ~LowBits;
2069 // If the first operand is negative and not all low bits are zero, then
2070 // the upper bits are all one.
2071 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2072 KnownOne |= ~LowBits;
2073 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2078 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2079 const APInt &RA = Rem->getAPIntValue();
2080 if (RA.isPowerOf2()) {
2081 APInt LowBits = (RA - 1);
2082 KnownZero |= ~LowBits;
2083 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2084 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2089 // Since the result is less than or equal to either operand, any leading
2090 // zero bits in either operand must also exist in the result.
2091 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2092 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2094 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2095 KnownZero2.countLeadingOnes());
2096 KnownOne.clearAllBits();
2097 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2100 case ISD::FrameIndex:
2101 case ISD::TargetFrameIndex:
2102 if (unsigned Align = InferPtrAlignment(Op)) {
2103 // The low bits are known zero if the pointer is aligned.
2104 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2110 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2113 case ISD::INTRINSIC_WO_CHAIN:
2114 case ISD::INTRINSIC_W_CHAIN:
2115 case ISD::INTRINSIC_VOID:
2116 // Allow the target to implement this method for its nodes.
2117 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2122 /// ComputeNumSignBits - Return the number of times the sign bit of the
2123 /// register is replicated into the other bits. We know that at least 1 bit
2124 /// is always equal to the sign bit (itself), but other cases can give us
2125 /// information. For example, immediately after an "SRA X, 2", we know that
2126 /// the top 3 bits are all equal to each other, so we return 3.
2127 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2128 EVT VT = Op.getValueType();
2129 assert(VT.isInteger() && "Invalid VT!");
2130 unsigned VTBits = VT.getScalarType().getSizeInBits();
2132 unsigned FirstAnswer = 1;
2135 return 1; // Limit search depth.
2137 switch (Op.getOpcode()) {
2139 case ISD::AssertSext:
2140 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2141 return VTBits-Tmp+1;
2142 case ISD::AssertZext:
2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2146 case ISD::Constant: {
2147 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2148 return Val.getNumSignBits();
2151 case ISD::SIGN_EXTEND:
2152 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2153 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2155 case ISD::SIGN_EXTEND_INREG:
2156 // Max of the input and what this extends.
2158 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2161 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2162 return std::max(Tmp, Tmp2);
2165 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2166 // SRA X, C -> adds C sign bits.
2167 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2168 Tmp += C->getZExtValue();
2169 if (Tmp > VTBits) Tmp = VTBits;
2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2174 // shl destroys sign bits.
2175 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2176 if (C->getZExtValue() >= VTBits || // Bad shift.
2177 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2178 return Tmp - C->getZExtValue();
2183 case ISD::XOR: // NOT is handled here.
2184 // Logical binary ops preserve the number of sign bits at the worst.
2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2187 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2188 FirstAnswer = std::min(Tmp, Tmp2);
2189 // We computed what we know about the sign bits as our first
2190 // answer. Now proceed to the generic code that uses
2191 // ComputeMaskedBits, and pick whichever answer is better.
2196 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2197 if (Tmp == 1) return 1; // Early out.
2198 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2199 return std::min(Tmp, Tmp2);
2207 if (Op.getResNo() != 1)
2209 // The boolean result conforms to getBooleanContents. Fall through.
2211 // If setcc returns 0/-1, all bits are sign bits.
2212 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2213 TargetLowering::ZeroOrNegativeOneBooleanContent)
2218 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2219 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2221 // Handle rotate right by N like a rotate left by 32-N.
2222 if (Op.getOpcode() == ISD::ROTR)
2223 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2225 // If we aren't rotating out all of the known-in sign bits, return the
2226 // number that are left. This handles rotl(sext(x), 1) for example.
2227 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2228 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2232 // Add can have at most one carry bit. Thus we know that the output
2233 // is, at worst, one more bit than the inputs.
2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2235 if (Tmp == 1) return 1; // Early out.
2237 // Special case decrementing a value (ADD X, -1):
2238 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2239 if (CRHS->isAllOnesValue()) {
2240 APInt KnownZero, KnownOne;
2241 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2243 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2245 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2248 // If we are subtracting one from a positive number, there is no carry
2249 // out of the result.
2250 if (KnownZero.isNegative())
2254 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2255 if (Tmp2 == 1) return 1;
2256 return std::min(Tmp, Tmp2)-1;
2259 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2260 if (Tmp2 == 1) return 1;
2263 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2264 if (CLHS->isNullValue()) {
2265 APInt KnownZero, KnownOne;
2266 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2267 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2269 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2272 // If the input is known to be positive (the sign bit is known clear),
2273 // the output of the NEG has the same number of sign bits as the input.
2274 if (KnownZero.isNegative())
2277 // Otherwise, we treat this like a SUB.
2280 // Sub can have at most one carry bit. Thus we know that the output
2281 // is, at worst, one more bit than the inputs.
2282 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2283 if (Tmp == 1) return 1; // Early out.
2284 return std::min(Tmp, Tmp2)-1;
2286 // FIXME: it's tricky to do anything useful for this, but it is an important
2287 // case for targets like X86.
2291 // If we are looking at the loaded value of the SDNode.
2292 if (Op.getResNo() == 0) {
2293 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2294 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2295 unsigned ExtType = LD->getExtensionType();
2298 case ISD::SEXTLOAD: // '17' bits known
2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2300 return VTBits-Tmp+1;
2301 case ISD::ZEXTLOAD: // '16' bits known
2302 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2308 // Allow the target to implement this method for its nodes.
2309 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2310 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2311 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2312 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2313 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2314 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2317 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2318 // use this information.
2319 APInt KnownZero, KnownOne;
2320 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2323 if (KnownZero.isNegative()) { // sign bit is 0
2325 } else if (KnownOne.isNegative()) { // sign bit is 1;
2332 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2333 // the number of identical bits in the top of the input value.
2335 Mask <<= Mask.getBitWidth()-VTBits;
2336 // Return # leading zeros. We use 'min' here in case Val was zero before
2337 // shifting. We don't want to return '64' as for an i32 "0".
2338 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2341 /// isBaseWithConstantOffset - Return true if the specified operand is an
2342 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2343 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2344 /// semantics as an ADD. This handles the equivalence:
2345 /// X|Cst == X+Cst iff X&Cst = 0.
2346 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2347 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2348 !isa<ConstantSDNode>(Op.getOperand(1)))
2351 if (Op.getOpcode() == ISD::OR &&
2352 !MaskedValueIsZero(Op.getOperand(0),
2353 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2360 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2361 // If we're told that NaNs won't happen, assume they won't.
2362 if (getTarget().Options.NoNaNsFPMath)
2365 // If the value is a constant, we can obviously see if it is a NaN or not.
2366 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2367 return !C->getValueAPF().isNaN();
2369 // TODO: Recognize more cases here.
2374 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2375 // If the value is a constant, we can obviously see if it is a zero or not.
2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2377 return !C->isZero();
2379 // TODO: Recognize more cases here.
2380 switch (Op.getOpcode()) {
2383 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2384 return !C->isNullValue();
2391 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2392 // Check the obvious case.
2393 if (A == B) return true;
2395 // For for negative and positive zero.
2396 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2397 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2398 if (CA->isZero() && CB->isZero()) return true;
2400 // Otherwise they may not be equal.
2404 /// getNode - Gets or creates the specified node.
2406 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2407 FoldingSetNodeID ID;
2408 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2411 return SDValue(E, 0);
2413 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2414 CSEMap.InsertNode(N, IP);
2416 AllNodes.push_back(N);
2420 return SDValue(N, 0);
2423 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2424 EVT VT, SDValue Operand) {
2425 // Constant fold unary operations with an integer constant operand.
2426 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2427 const APInt &Val = C->getAPIntValue();
2430 case ISD::SIGN_EXTEND:
2431 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2432 case ISD::ANY_EXTEND:
2433 case ISD::ZERO_EXTEND:
2435 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2436 case ISD::UINT_TO_FP:
2437 case ISD::SINT_TO_FP: {
2438 APFloat apf(EVTToAPFloatSemantics(VT),
2439 APInt::getNullValue(VT.getSizeInBits()));
2440 (void)apf.convertFromAPInt(Val,
2441 Opcode==ISD::SINT_TO_FP,
2442 APFloat::rmNearestTiesToEven);
2443 return getConstantFP(apf, VT);
2446 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2447 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2448 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2449 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2452 return getConstant(Val.byteSwap(), VT);
2454 return getConstant(Val.countPopulation(), VT);
2456 case ISD::CTLZ_ZERO_UNDEF:
2457 return getConstant(Val.countLeadingZeros(), VT);
2459 case ISD::CTTZ_ZERO_UNDEF:
2460 return getConstant(Val.countTrailingZeros(), VT);
2464 // Constant fold unary operations with a floating point constant operand.
2465 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2466 APFloat V = C->getValueAPF(); // make copy
2470 return getConstantFP(V, VT);
2473 return getConstantFP(V, VT);
2475 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2476 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2477 return getConstantFP(V, VT);
2481 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2482 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2483 return getConstantFP(V, VT);
2487 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2488 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2489 return getConstantFP(V, VT);
2492 case ISD::FP_EXTEND: {
2494 // This can return overflow, underflow, or inexact; we don't care.
2495 // FIXME need to be more flexible about rounding mode.
2496 (void)V.convert(EVTToAPFloatSemantics(VT),
2497 APFloat::rmNearestTiesToEven, &ignored);
2498 return getConstantFP(V, VT);
2500 case ISD::FP_TO_SINT:
2501 case ISD::FP_TO_UINT: {
2504 assert(integerPartWidth >= 64);
2505 // FIXME need to be more flexible about rounding mode.
2506 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2507 Opcode==ISD::FP_TO_SINT,
2508 APFloat::rmTowardZero, &ignored);
2509 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2511 APInt api(VT.getSizeInBits(), x);
2512 return getConstant(api, VT);
2515 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2516 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2517 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2518 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2523 unsigned OpOpcode = Operand.getNode()->getOpcode();
2525 case ISD::TokenFactor:
2526 case ISD::MERGE_VALUES:
2527 case ISD::CONCAT_VECTORS:
2528 return Operand; // Factor, merge or concat of one node? No need.
2529 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2530 case ISD::FP_EXTEND:
2531 assert(VT.isFloatingPoint() &&
2532 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2533 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2534 assert((!VT.isVector() ||
2535 VT.getVectorNumElements() ==
2536 Operand.getValueType().getVectorNumElements()) &&
2537 "Vector element count mismatch!");
2538 if (Operand.getOpcode() == ISD::UNDEF)
2539 return getUNDEF(VT);
2541 case ISD::SIGN_EXTEND:
2542 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2543 "Invalid SIGN_EXTEND!");
2544 if (Operand.getValueType() == VT) return Operand; // noop extension
2545 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2546 "Invalid sext node, dst < src!");
2547 assert((!VT.isVector() ||
2548 VT.getVectorNumElements() ==
2549 Operand.getValueType().getVectorNumElements()) &&
2550 "Vector element count mismatch!");
2551 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2552 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2553 else if (OpOpcode == ISD::UNDEF)
2554 // sext(undef) = 0, because the top bits will all be the same.
2555 return getConstant(0, VT);
2557 case ISD::ZERO_EXTEND:
2558 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2559 "Invalid ZERO_EXTEND!");
2560 if (Operand.getValueType() == VT) return Operand; // noop extension
2561 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2562 "Invalid zext node, dst < src!");
2563 assert((!VT.isVector() ||
2564 VT.getVectorNumElements() ==
2565 Operand.getValueType().getVectorNumElements()) &&
2566 "Vector element count mismatch!");
2567 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2568 return getNode(ISD::ZERO_EXTEND, DL, VT,
2569 Operand.getNode()->getOperand(0));
2570 else if (OpOpcode == ISD::UNDEF)
2571 // zext(undef) = 0, because the top bits will be zero.
2572 return getConstant(0, VT);
2574 case ISD::ANY_EXTEND:
2575 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2576 "Invalid ANY_EXTEND!");
2577 if (Operand.getValueType() == VT) return Operand; // noop extension
2578 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2579 "Invalid anyext node, dst < src!");
2580 assert((!VT.isVector() ||
2581 VT.getVectorNumElements() ==
2582 Operand.getValueType().getVectorNumElements()) &&
2583 "Vector element count mismatch!");
2585 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2586 OpOpcode == ISD::ANY_EXTEND)
2587 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2588 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2589 else if (OpOpcode == ISD::UNDEF)
2590 return getUNDEF(VT);
2592 // (ext (trunx x)) -> x
2593 if (OpOpcode == ISD::TRUNCATE) {
2594 SDValue OpOp = Operand.getNode()->getOperand(0);
2595 if (OpOp.getValueType() == VT)
2600 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2601 "Invalid TRUNCATE!");
2602 if (Operand.getValueType() == VT) return Operand; // noop truncate
2603 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2604 "Invalid truncate node, src < dst!");
2605 assert((!VT.isVector() ||
2606 VT.getVectorNumElements() ==
2607 Operand.getValueType().getVectorNumElements()) &&
2608 "Vector element count mismatch!");
2609 if (OpOpcode == ISD::TRUNCATE)
2610 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2611 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2612 OpOpcode == ISD::ANY_EXTEND) {
2613 // If the source is smaller than the dest, we still need an extend.
2614 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2615 .bitsLT(VT.getScalarType()))
2616 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2617 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2618 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2619 return Operand.getNode()->getOperand(0);
2621 if (OpOpcode == ISD::UNDEF)
2622 return getUNDEF(VT);
2625 // Basic sanity checking.
2626 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2627 && "Cannot BITCAST between types of different sizes!");
2628 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2629 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2630 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2631 if (OpOpcode == ISD::UNDEF)
2632 return getUNDEF(VT);
2634 case ISD::SCALAR_TO_VECTOR:
2635 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2636 (VT.getVectorElementType() == Operand.getValueType() ||
2637 (VT.getVectorElementType().isInteger() &&
2638 Operand.getValueType().isInteger() &&
2639 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2640 "Illegal SCALAR_TO_VECTOR node!");
2641 if (OpOpcode == ISD::UNDEF)
2642 return getUNDEF(VT);
2643 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2644 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2645 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2646 Operand.getConstantOperandVal(1) == 0 &&
2647 Operand.getOperand(0).getValueType() == VT)
2648 return Operand.getOperand(0);
2651 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2652 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2653 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2654 Operand.getNode()->getOperand(0));
2655 if (OpOpcode == ISD::FNEG) // --X -> X
2656 return Operand.getNode()->getOperand(0);
2659 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2660 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2665 SDVTList VTs = getVTList(VT);
2666 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2667 FoldingSetNodeID ID;
2668 SDValue Ops[1] = { Operand };
2669 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2671 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2672 return SDValue(E, 0);
2674 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2675 CSEMap.InsertNode(N, IP);
2677 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2680 AllNodes.push_back(N);
2684 return SDValue(N, 0);
2687 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2688 SDNode *Cst1, SDNode *Cst2) {
2689 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2690 SmallVector<SDValue, 4> Outputs;
2691 EVT SVT = VT.getScalarType();
2693 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2694 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2695 if (Scalar1 && Scalar2) {
2696 // Scalar instruction.
2697 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2699 // For vectors extract each constant element into Inputs so we can constant
2700 // fold them individually.
2701 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2702 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2706 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2708 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2709 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2710 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2711 if (!V1 || !V2) // Not a constant, bail.
2714 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2715 // FIXME: This is valid and could be handled by truncating the APInts.
2716 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2719 Inputs.push_back(std::make_pair(V1, V2));
2723 // We have a number of constant values, constant fold them element by element.
2724 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
2725 const APInt &C1 = Inputs[I].first->getAPIntValue();
2726 const APInt &C2 = Inputs[I].second->getAPIntValue();
2730 Outputs.push_back(getConstant(C1 + C2, SVT));
2733 Outputs.push_back(getConstant(C1 - C2, SVT));
2736 Outputs.push_back(getConstant(C1 * C2, SVT));
2739 if (!C2.getBoolValue())
2741 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
2744 if (!C2.getBoolValue())
2746 Outputs.push_back(getConstant(C1.urem(C2), SVT));
2749 if (!C2.getBoolValue())
2751 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
2754 if (!C2.getBoolValue())
2756 Outputs.push_back(getConstant(C1.srem(C2), SVT));
2759 Outputs.push_back(getConstant(C1 & C2, SVT));
2762 Outputs.push_back(getConstant(C1 | C2, SVT));
2765 Outputs.push_back(getConstant(C1 ^ C2, SVT));
2768 Outputs.push_back(getConstant(C1 << C2, SVT));
2771 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
2774 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
2777 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
2780 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
2787 // Handle the scalar case first.
2788 if (Scalar1 && Scalar2)
2789 return Outputs.back();
2791 // Otherwise build a big vector out of the scalar elements we generated.
2792 return getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, Outputs.data(),
2796 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1,
2798 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2799 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2802 case ISD::TokenFactor:
2803 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2804 N2.getValueType() == MVT::Other && "Invalid token factor!");
2805 // Fold trivial token factors.
2806 if (N1.getOpcode() == ISD::EntryToken) return N2;
2807 if (N2.getOpcode() == ISD::EntryToken) return N1;
2808 if (N1 == N2) return N1;
2810 case ISD::CONCAT_VECTORS:
2811 // Concat of UNDEFs is UNDEF.
2812 if (N1.getOpcode() == ISD::UNDEF &&
2813 N2.getOpcode() == ISD::UNDEF)
2814 return getUNDEF(VT);
2816 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2817 // one big BUILD_VECTOR.
2818 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2819 N2.getOpcode() == ISD::BUILD_VECTOR) {
2820 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2821 N1.getNode()->op_end());
2822 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2823 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2827 assert(VT.isInteger() && "This operator does not apply to FP types!");
2828 assert(N1.getValueType() == N2.getValueType() &&
2829 N1.getValueType() == VT && "Binary operator types must match!");
2830 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2831 // worth handling here.
2832 if (N2C && N2C->isNullValue())
2834 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2841 assert(VT.isInteger() && "This operator does not apply to FP types!");
2842 assert(N1.getValueType() == N2.getValueType() &&
2843 N1.getValueType() == VT && "Binary operator types must match!");
2844 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2845 // it's worth handling here.
2846 if (N2C && N2C->isNullValue())
2856 assert(VT.isInteger() && "This operator does not apply to FP types!");
2857 assert(N1.getValueType() == N2.getValueType() &&
2858 N1.getValueType() == VT && "Binary operator types must match!");
2865 if (getTarget().Options.UnsafeFPMath) {
2866 if (Opcode == ISD::FADD) {
2868 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2869 if (CFP->getValueAPF().isZero())
2872 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2873 if (CFP->getValueAPF().isZero())
2875 } else if (Opcode == ISD::FSUB) {
2877 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2878 if (CFP->getValueAPF().isZero())
2880 } else if (Opcode == ISD::FMUL) {
2881 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2884 // If the first operand isn't the constant, try the second
2886 CFP = dyn_cast<ConstantFPSDNode>(N2);
2893 return SDValue(CFP,0);
2895 if (CFP->isExactlyValue(1.0))
2900 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2901 assert(N1.getValueType() == N2.getValueType() &&
2902 N1.getValueType() == VT && "Binary operator types must match!");
2904 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2905 assert(N1.getValueType() == VT &&
2906 N1.getValueType().isFloatingPoint() &&
2907 N2.getValueType().isFloatingPoint() &&
2908 "Invalid FCOPYSIGN!");
2915 assert(VT == N1.getValueType() &&
2916 "Shift operators return type must be the same as their first arg");
2917 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2918 "Shifts only work on integers");
2919 assert((!VT.isVector() || VT == N2.getValueType()) &&
2920 "Vector shift amounts must be in the same as their first arg");
2921 // Verify that the shift amount VT is bit enough to hold valid shift
2922 // amounts. This catches things like trying to shift an i1024 value by an
2923 // i8, which is easy to fall into in generic code that uses
2924 // TLI.getShiftAmount().
2925 assert(N2.getValueType().getSizeInBits() >=
2926 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2927 "Invalid use of small shift amount with oversized value!");
2929 // Always fold shifts of i1 values so the code generator doesn't need to
2930 // handle them. Since we know the size of the shift has to be less than the
2931 // size of the value, the shift/rotate count is guaranteed to be zero.
2934 if (N2C && N2C->isNullValue())
2937 case ISD::FP_ROUND_INREG: {
2938 EVT EVT = cast<VTSDNode>(N2)->getVT();
2939 assert(VT == N1.getValueType() && "Not an inreg round!");
2940 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2941 "Cannot FP_ROUND_INREG integer types");
2942 assert(EVT.isVector() == VT.isVector() &&
2943 "FP_ROUND_INREG type should be vector iff the operand "
2945 assert((!EVT.isVector() ||
2946 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2947 "Vector element counts must match in FP_ROUND_INREG");
2948 assert(EVT.bitsLE(VT) && "Not rounding down!");
2950 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2954 assert(VT.isFloatingPoint() &&
2955 N1.getValueType().isFloatingPoint() &&
2956 VT.bitsLE(N1.getValueType()) &&
2957 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2958 if (N1.getValueType() == VT) return N1; // noop conversion.
2960 case ISD::AssertSext:
2961 case ISD::AssertZext: {
2962 EVT EVT = cast<VTSDNode>(N2)->getVT();
2963 assert(VT == N1.getValueType() && "Not an inreg extend!");
2964 assert(VT.isInteger() && EVT.isInteger() &&
2965 "Cannot *_EXTEND_INREG FP types");
2966 assert(!EVT.isVector() &&
2967 "AssertSExt/AssertZExt type should be the vector element type "
2968 "rather than the vector type!");
2969 assert(EVT.bitsLE(VT) && "Not extending!");
2970 if (VT == EVT) return N1; // noop assertion.
2973 case ISD::SIGN_EXTEND_INREG: {
2974 EVT EVT = cast<VTSDNode>(N2)->getVT();
2975 assert(VT == N1.getValueType() && "Not an inreg extend!");
2976 assert(VT.isInteger() && EVT.isInteger() &&
2977 "Cannot *_EXTEND_INREG FP types");
2978 assert(EVT.isVector() == VT.isVector() &&
2979 "SIGN_EXTEND_INREG type should be vector iff the operand "
2981 assert((!EVT.isVector() ||
2982 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2983 "Vector element counts must match in SIGN_EXTEND_INREG");
2984 assert(EVT.bitsLE(VT) && "Not extending!");
2985 if (EVT == VT) return N1; // Not actually extending
2988 APInt Val = N1C->getAPIntValue();
2989 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2990 Val <<= Val.getBitWidth()-FromBits;
2991 Val = Val.ashr(Val.getBitWidth()-FromBits);
2992 return getConstant(Val, VT);
2996 case ISD::EXTRACT_VECTOR_ELT:
2997 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2998 if (N1.getOpcode() == ISD::UNDEF)
2999 return getUNDEF(VT);
3001 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3002 // expanding copies of large vectors from registers.
3004 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3005 N1.getNumOperands() > 0) {
3007 N1.getOperand(0).getValueType().getVectorNumElements();
3008 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3009 N1.getOperand(N2C->getZExtValue() / Factor),
3010 getConstant(N2C->getZExtValue() % Factor,
3011 N2.getValueType()));
3014 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3015 // expanding large vector constants.
3016 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3017 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3019 if (VT != Elt.getValueType())
3020 // If the vector element type is not legal, the BUILD_VECTOR operands
3021 // are promoted and implicitly truncated, and the result implicitly
3022 // extended. Make that explicit here.
3023 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3028 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3029 // operations are lowered to scalars.
3030 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3031 // If the indices are the same, return the inserted element else
3032 // if the indices are known different, extract the element from
3033 // the original vector.
3034 SDValue N1Op2 = N1.getOperand(2);
3035 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3037 if (N1Op2C && N2C) {
3038 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3039 if (VT == N1.getOperand(1).getValueType())
3040 return N1.getOperand(1);
3042 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3045 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3049 case ISD::EXTRACT_ELEMENT:
3050 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3051 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3052 (N1.getValueType().isInteger() == VT.isInteger()) &&
3053 N1.getValueType() != VT &&
3054 "Wrong types for EXTRACT_ELEMENT!");
3056 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3057 // 64-bit integers into 32-bit parts. Instead of building the extract of
3058 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3059 if (N1.getOpcode() == ISD::BUILD_PAIR)
3060 return N1.getOperand(N2C->getZExtValue());
3062 // EXTRACT_ELEMENT of a constant int is also very common.
3063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3064 unsigned ElementSize = VT.getSizeInBits();
3065 unsigned Shift = ElementSize * N2C->getZExtValue();
3066 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3067 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3070 case ISD::EXTRACT_SUBVECTOR: {
3072 if (VT.isSimple() && N1.getValueType().isSimple()) {
3073 assert(VT.isVector() && N1.getValueType().isVector() &&
3074 "Extract subvector VTs must be a vectors!");
3075 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3076 "Extract subvector VTs must have the same element type!");
3077 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3078 "Extract subvector must be from larger vector to smaller vector!");
3080 if (isa<ConstantSDNode>(Index.getNode())) {
3081 assert((VT.getVectorNumElements() +
3082 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3083 <= N1.getValueType().getVectorNumElements())
3084 && "Extract subvector overflow!");
3087 // Trivial extraction.
3088 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3095 // Perform trivial constant folding.
3096 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3097 if (SV.getNode()) return SV;
3099 // Canonicalize constant to RHS if commutative.
3100 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3101 std::swap(N1C, N2C);
3105 // Constant fold FP operations.
3106 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3107 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3109 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3110 // Canonicalize constant to RHS if commutative.
3111 std::swap(N1CFP, N2CFP);
3114 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3115 APFloat::opStatus s;
3118 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3119 if (s != APFloat::opInvalidOp)
3120 return getConstantFP(V1, VT);
3123 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3124 if (s!=APFloat::opInvalidOp)
3125 return getConstantFP(V1, VT);
3128 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3129 if (s!=APFloat::opInvalidOp)
3130 return getConstantFP(V1, VT);
3133 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3134 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3135 return getConstantFP(V1, VT);
3138 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3139 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3140 return getConstantFP(V1, VT);
3142 case ISD::FCOPYSIGN:
3144 return getConstantFP(V1, VT);
3149 if (Opcode == ISD::FP_ROUND) {
3150 APFloat V = N1CFP->getValueAPF(); // make copy
3152 // This can return overflow, underflow, or inexact; we don't care.
3153 // FIXME need to be more flexible about rounding mode.
3154 (void)V.convert(EVTToAPFloatSemantics(VT),
3155 APFloat::rmNearestTiesToEven, &ignored);
3156 return getConstantFP(V, VT);
3160 // Canonicalize an UNDEF to the RHS, even over a constant.
3161 if (N1.getOpcode() == ISD::UNDEF) {
3162 if (isCommutativeBinOp(Opcode)) {
3166 case ISD::FP_ROUND_INREG:
3167 case ISD::SIGN_EXTEND_INREG:
3173 return N1; // fold op(undef, arg2) -> undef
3181 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3182 // For vectors, we can't easily build an all zero vector, just return
3189 // Fold a bunch of operators when the RHS is undef.
3190 if (N2.getOpcode() == ISD::UNDEF) {
3193 if (N1.getOpcode() == ISD::UNDEF)
3194 // Handle undef ^ undef -> 0 special case. This is a common
3196 return getConstant(0, VT);
3206 return N2; // fold op(arg1, undef) -> undef
3212 if (getTarget().Options.UnsafeFPMath)
3220 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3221 // For vectors, we can't easily build an all zero vector, just return
3226 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3227 // For vectors, we can't easily build an all one vector, just return
3235 // Memoize this node if possible.
3237 SDVTList VTs = getVTList(VT);
3238 if (VT != MVT::Glue) {
3239 SDValue Ops[] = { N1, N2 };
3240 FoldingSetNodeID ID;
3241 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3243 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3244 return SDValue(E, 0);
3246 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3247 CSEMap.InsertNode(N, IP);
3249 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3252 AllNodes.push_back(N);
3256 return SDValue(N, 0);
3259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3260 SDValue N1, SDValue N2, SDValue N3) {
3261 // Perform various simplifications.
3262 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3265 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3266 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3267 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3268 if (N1CFP && N2CFP && N3CFP) {
3269 APFloat V1 = N1CFP->getValueAPF();
3270 const APFloat &V2 = N2CFP->getValueAPF();
3271 const APFloat &V3 = N3CFP->getValueAPF();
3272 APFloat::opStatus s =
3273 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3274 if (s != APFloat::opInvalidOp)
3275 return getConstantFP(V1, VT);
3279 case ISD::CONCAT_VECTORS:
3280 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3281 // one big BUILD_VECTOR.
3282 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3283 N2.getOpcode() == ISD::BUILD_VECTOR &&
3284 N3.getOpcode() == ISD::BUILD_VECTOR) {
3285 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3286 N1.getNode()->op_end());
3287 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3288 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3289 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3293 // Use FoldSetCC to simplify SETCC's.
3294 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3295 if (Simp.getNode()) return Simp;
3300 if (N1C->getZExtValue())
3301 return N2; // select true, X, Y -> X
3302 return N3; // select false, X, Y -> Y
3305 if (N2 == N3) return N2; // select C, X, X -> X
3307 case ISD::VECTOR_SHUFFLE:
3308 llvm_unreachable("should use getVectorShuffle constructor!");
3309 case ISD::INSERT_SUBVECTOR: {
3311 if (VT.isSimple() && N1.getValueType().isSimple()
3312 && N2.getValueType().isSimple()) {
3313 assert(VT.isVector() && N1.getValueType().isVector() &&
3314 N2.getValueType().isVector() &&
3315 "Insert subvector VTs must be a vectors");
3316 assert(VT == N1.getValueType() &&
3317 "Dest and insert subvector source types must match!");
3318 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3319 "Insert subvector must be from smaller vector to larger vector!");
3320 if (isa<ConstantSDNode>(Index.getNode())) {
3321 assert((N2.getValueType().getVectorNumElements() +
3322 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3323 <= VT.getVectorNumElements())
3324 && "Insert subvector overflow!");
3327 // Trivial insertion.
3328 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3334 // Fold bit_convert nodes from a type to themselves.
3335 if (N1.getValueType() == VT)
3340 // Memoize node if it doesn't produce a flag.
3342 SDVTList VTs = getVTList(VT);
3343 if (VT != MVT::Glue) {
3344 SDValue Ops[] = { N1, N2, N3 };
3345 FoldingSetNodeID ID;
3346 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3349 return SDValue(E, 0);
3351 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3352 CSEMap.InsertNode(N, IP);
3354 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3357 AllNodes.push_back(N);
3361 return SDValue(N, 0);
3364 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3365 SDValue N1, SDValue N2, SDValue N3,
3367 SDValue Ops[] = { N1, N2, N3, N4 };
3368 return getNode(Opcode, DL, VT, Ops, 4);
3371 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3372 SDValue N1, SDValue N2, SDValue N3,
3373 SDValue N4, SDValue N5) {
3374 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3375 return getNode(Opcode, DL, VT, Ops, 5);
3378 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3379 /// the incoming stack arguments to be loaded from the stack.
3380 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3381 SmallVector<SDValue, 8> ArgChains;
3383 // Include the original chain at the beginning of the list. When this is
3384 // used by target LowerCall hooks, this helps legalize find the
3385 // CALLSEQ_BEGIN node.
3386 ArgChains.push_back(Chain);
3388 // Add a chain value for each stack argument.
3389 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3390 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3391 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3392 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3393 if (FI->getIndex() < 0)
3394 ArgChains.push_back(SDValue(L, 1));
3396 // Build a tokenfactor for all the chains.
3397 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3398 &ArgChains[0], ArgChains.size());
3401 /// getMemsetValue - Vectorized representation of the memset value
3403 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3405 assert(Value.getOpcode() != ISD::UNDEF);
3407 unsigned NumBits = VT.getScalarType().getSizeInBits();
3408 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3409 assert(C->getAPIntValue().getBitWidth() == 8);
3410 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3412 return DAG.getConstant(Val, VT);
3413 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3416 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3418 // Use a multiplication with 0x010101... to extend the input to the
3420 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3421 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3427 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3428 /// used when a memcpy is turned into a memset when the source is a constant
3430 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3431 const TargetLowering &TLI, StringRef Str) {
3432 // Handle vector with all elements zero.
3435 return DAG.getConstant(0, VT);
3436 else if (VT == MVT::f32 || VT == MVT::f64)
3437 return DAG.getConstantFP(0.0, VT);
3438 else if (VT.isVector()) {
3439 unsigned NumElts = VT.getVectorNumElements();
3440 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3441 return DAG.getNode(ISD::BITCAST, dl, VT,
3442 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3445 llvm_unreachable("Expected type!");
3448 assert(!VT.isVector() && "Can't handle vector type here!");
3449 unsigned NumVTBits = VT.getSizeInBits();
3450 unsigned NumVTBytes = NumVTBits / 8;
3451 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3453 APInt Val(NumVTBits, 0);
3454 if (TLI.isLittleEndian()) {
3455 for (unsigned i = 0; i != NumBytes; ++i)
3456 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3458 for (unsigned i = 0; i != NumBytes; ++i)
3459 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3462 // If the "cost" of materializing the integer immediate is 1 or free, then
3463 // it is cost effective to turn the load into the immediate.
3464 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
3465 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3466 return DAG.getConstant(Val, VT);
3467 return SDValue(0, 0);
3470 /// getMemBasePlusOffset - Returns base and offset node for the
3472 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3473 SelectionDAG &DAG) {
3474 EVT VT = Base.getValueType();
3475 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3476 VT, Base, DAG.getConstant(Offset, VT));
3479 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3481 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3482 unsigned SrcDelta = 0;
3483 GlobalAddressSDNode *G = NULL;
3484 if (Src.getOpcode() == ISD::GlobalAddress)
3485 G = cast<GlobalAddressSDNode>(Src);
3486 else if (Src.getOpcode() == ISD::ADD &&
3487 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3488 Src.getOperand(1).getOpcode() == ISD::Constant) {
3489 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3490 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3495 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3498 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3499 /// to replace the memset / memcpy. Return true if the number of memory ops
3500 /// is below the threshold. It returns the types of the sequence of
3501 /// memory ops to perform memset / memcpy by reference.
3502 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3503 unsigned Limit, uint64_t Size,
3504 unsigned DstAlign, unsigned SrcAlign,
3510 const TargetLowering &TLI) {
3511 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3512 "Expecting memcpy / memset source to meet alignment requirement!");
3513 // If 'SrcAlign' is zero, that means the memory operation does not need to
3514 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3515 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3516 // is the specified alignment of the memory operation. If it is zero, that
3517 // means it's possible to change the alignment of the destination.
3518 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3519 // not need to be loaded.
3520 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3521 IsMemset, ZeroMemset, MemcpyStrSrc,
3522 DAG.getMachineFunction());
3524 if (VT == MVT::Other) {
3525 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3526 TLI.allowsUnalignedMemoryAccesses(VT)) {
3527 VT = TLI.getPointerTy();
3529 switch (DstAlign & 7) {
3530 case 0: VT = MVT::i64; break;
3531 case 4: VT = MVT::i32; break;
3532 case 2: VT = MVT::i16; break;
3533 default: VT = MVT::i8; break;
3538 while (!TLI.isTypeLegal(LVT))
3539 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3540 assert(LVT.isInteger());
3546 unsigned NumMemOps = 0;
3548 unsigned VTSize = VT.getSizeInBits() / 8;
3549 while (VTSize > Size) {
3550 // For now, only use non-vector load / store's for the left-over pieces.
3555 if (VT.isVector() || VT.isFloatingPoint()) {
3556 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3557 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3558 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3560 else if (NewVT == MVT::i64 &&
3561 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3562 TLI.isSafeMemOpType(MVT::f64)) {
3563 // i64 is usually not legal on 32-bit targets, but f64 may be.
3571 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3572 if (NewVT == MVT::i8)
3574 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3576 NewVTSize = NewVT.getSizeInBits() / 8;
3578 // If the new VT cannot cover all of the remaining bits, then consider
3579 // issuing a (or a pair of) unaligned and overlapping load / store.
3580 // FIXME: Only does this for 64-bit or more since we don't have proper
3581 // cost model for unaligned load / store.
3583 if (NumMemOps && AllowOverlap &&
3584 VTSize >= 8 && NewVTSize < Size &&
3585 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3593 if (++NumMemOps > Limit)
3596 MemOps.push_back(VT);
3603 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3604 SDValue Chain, SDValue Dst,
3605 SDValue Src, uint64_t Size,
3606 unsigned Align, bool isVol,
3608 MachinePointerInfo DstPtrInfo,
3609 MachinePointerInfo SrcPtrInfo) {
3610 // Turn a memcpy of undef to nop.
3611 if (Src.getOpcode() == ISD::UNDEF)
3614 // Expand memcpy to a series of load and store ops if the size operand falls
3615 // below a certain threshold.
3616 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3617 // rather than maybe a humongous number of loads and stores.
3618 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3619 std::vector<EVT> MemOps;
3620 bool DstAlignCanChange = false;
3621 MachineFunction &MF = DAG.getMachineFunction();
3622 MachineFrameInfo *MFI = MF.getFrameInfo();
3624 MF.getFunction()->getAttributes().
3625 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3626 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3627 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3628 DstAlignCanChange = true;
3629 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3630 if (Align > SrcAlign)
3633 bool CopyFromStr = isMemSrcFromString(Src, Str);
3634 bool isZeroStr = CopyFromStr && Str.empty();
3635 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3637 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3638 (DstAlignCanChange ? 0 : Align),
3639 (isZeroStr ? 0 : SrcAlign),
3640 false, false, CopyFromStr, true, DAG, TLI))
3643 if (DstAlignCanChange) {
3644 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3645 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3647 // Don't promote to an alignment that would require dynamic stack
3649 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3650 if (!TRI->needsStackRealignment(MF))
3651 while (NewAlign > Align &&
3652 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3655 if (NewAlign > Align) {
3656 // Give the stack frame object a larger alignment if needed.
3657 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3658 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3663 SmallVector<SDValue, 8> OutChains;
3664 unsigned NumMemOps = MemOps.size();
3665 uint64_t SrcOff = 0, DstOff = 0;
3666 for (unsigned i = 0; i != NumMemOps; ++i) {
3668 unsigned VTSize = VT.getSizeInBits() / 8;
3669 SDValue Value, Store;
3671 if (VTSize > Size) {
3672 // Issuing an unaligned load / store pair that overlaps with the previous
3673 // pair. Adjust the offset accordingly.
3674 assert(i == NumMemOps-1 && i != 0);
3675 SrcOff -= VTSize - Size;
3676 DstOff -= VTSize - Size;
3680 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3681 // It's unlikely a store of a vector immediate can be done in a single
3682 // instruction. It would require a load from a constantpool first.
3683 // We only handle zero vectors here.
3684 // FIXME: Handle other cases where store of vector immediate is done in
3685 // a single instruction.
3686 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3687 if (Value.getNode())
3688 Store = DAG.getStore(Chain, dl, Value,
3689 getMemBasePlusOffset(Dst, DstOff, DAG),
3690 DstPtrInfo.getWithOffset(DstOff), isVol,
3694 if (!Store.getNode()) {
3695 // The type might not be legal for the target. This should only happen
3696 // if the type is smaller than a legal type, as on PPC, so the right
3697 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3698 // to Load/Store if NVT==VT.
3699 // FIXME does the case above also need this?
3700 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3701 assert(NVT.bitsGE(VT));
3702 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3703 getMemBasePlusOffset(Src, SrcOff, DAG),
3704 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3705 MinAlign(SrcAlign, SrcOff));
3706 Store = DAG.getTruncStore(Chain, dl, Value,
3707 getMemBasePlusOffset(Dst, DstOff, DAG),
3708 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3711 OutChains.push_back(Store);
3717 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3718 &OutChains[0], OutChains.size());
3721 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3722 SDValue Chain, SDValue Dst,
3723 SDValue Src, uint64_t Size,
3724 unsigned Align, bool isVol,
3726 MachinePointerInfo DstPtrInfo,
3727 MachinePointerInfo SrcPtrInfo) {
3728 // Turn a memmove of undef to nop.
3729 if (Src.getOpcode() == ISD::UNDEF)
3732 // Expand memmove to a series of load and store ops if the size operand falls
3733 // below a certain threshold.
3734 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3735 std::vector<EVT> MemOps;
3736 bool DstAlignCanChange = false;
3737 MachineFunction &MF = DAG.getMachineFunction();
3738 MachineFrameInfo *MFI = MF.getFrameInfo();
3739 bool OptSize = MF.getFunction()->getAttributes().
3740 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3741 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3742 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3743 DstAlignCanChange = true;
3744 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3745 if (Align > SrcAlign)
3747 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3749 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3750 (DstAlignCanChange ? 0 : Align), SrcAlign,
3751 false, false, false, false, DAG, TLI))
3754 if (DstAlignCanChange) {
3755 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3756 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3757 if (NewAlign > Align) {
3758 // Give the stack frame object a larger alignment if needed.
3759 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3760 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3765 uint64_t SrcOff = 0, DstOff = 0;
3766 SmallVector<SDValue, 8> LoadValues;
3767 SmallVector<SDValue, 8> LoadChains;
3768 SmallVector<SDValue, 8> OutChains;
3769 unsigned NumMemOps = MemOps.size();
3770 for (unsigned i = 0; i < NumMemOps; i++) {
3772 unsigned VTSize = VT.getSizeInBits() / 8;
3773 SDValue Value, Store;
3775 Value = DAG.getLoad(VT, dl, Chain,
3776 getMemBasePlusOffset(Src, SrcOff, DAG),
3777 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3778 false, false, SrcAlign);
3779 LoadValues.push_back(Value);
3780 LoadChains.push_back(Value.getValue(1));
3783 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3784 &LoadChains[0], LoadChains.size());
3786 for (unsigned i = 0; i < NumMemOps; i++) {
3788 unsigned VTSize = VT.getSizeInBits() / 8;
3789 SDValue Value, Store;
3791 Store = DAG.getStore(Chain, dl, LoadValues[i],
3792 getMemBasePlusOffset(Dst, DstOff, DAG),
3793 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3794 OutChains.push_back(Store);
3798 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3799 &OutChains[0], OutChains.size());
3802 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3803 SDValue Chain, SDValue Dst,
3804 SDValue Src, uint64_t Size,
3805 unsigned Align, bool isVol,
3806 MachinePointerInfo DstPtrInfo) {
3807 // Turn a memset of undef to nop.
3808 if (Src.getOpcode() == ISD::UNDEF)
3811 // Expand memset to a series of load/store ops if the size operand
3812 // falls below a certain threshold.
3813 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3814 std::vector<EVT> MemOps;
3815 bool DstAlignCanChange = false;
3816 MachineFunction &MF = DAG.getMachineFunction();
3817 MachineFrameInfo *MFI = MF.getFrameInfo();
3818 bool OptSize = MF.getFunction()->getAttributes().
3819 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3820 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3821 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3822 DstAlignCanChange = true;
3824 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3825 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3826 Size, (DstAlignCanChange ? 0 : Align), 0,
3827 true, IsZeroVal, false, true, DAG, TLI))
3830 if (DstAlignCanChange) {
3831 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3832 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3833 if (NewAlign > Align) {
3834 // Give the stack frame object a larger alignment if needed.
3835 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3836 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3841 SmallVector<SDValue, 8> OutChains;
3842 uint64_t DstOff = 0;
3843 unsigned NumMemOps = MemOps.size();
3845 // Find the largest store and generate the bit pattern for it.
3846 EVT LargestVT = MemOps[0];
3847 for (unsigned i = 1; i < NumMemOps; i++)
3848 if (MemOps[i].bitsGT(LargestVT))
3849 LargestVT = MemOps[i];
3850 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3852 for (unsigned i = 0; i < NumMemOps; i++) {
3854 unsigned VTSize = VT.getSizeInBits() / 8;
3855 if (VTSize > Size) {
3856 // Issuing an unaligned load / store pair that overlaps with the previous
3857 // pair. Adjust the offset accordingly.
3858 assert(i == NumMemOps-1 && i != 0);
3859 DstOff -= VTSize - Size;
3862 // If this store is smaller than the largest store see whether we can get
3863 // the smaller value for free with a truncate.
3864 SDValue Value = MemSetValue;
3865 if (VT.bitsLT(LargestVT)) {
3866 if (!LargestVT.isVector() && !VT.isVector() &&
3867 TLI.isTruncateFree(LargestVT, VT))
3868 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3870 Value = getMemsetValue(Src, VT, DAG, dl);
3872 assert(Value.getValueType() == VT && "Value with wrong type.");
3873 SDValue Store = DAG.getStore(Chain, dl, Value,
3874 getMemBasePlusOffset(Dst, DstOff, DAG),
3875 DstPtrInfo.getWithOffset(DstOff),
3876 isVol, false, Align);
3877 OutChains.push_back(Store);
3878 DstOff += VT.getSizeInBits() / 8;
3882 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3883 &OutChains[0], OutChains.size());
3886 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3887 SDValue Src, SDValue Size,
3888 unsigned Align, bool isVol, bool AlwaysInline,
3889 MachinePointerInfo DstPtrInfo,
3890 MachinePointerInfo SrcPtrInfo) {
3891 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3893 // Check to see if we should lower the memcpy to loads and stores first.
3894 // For cases within the target-specified limits, this is the best choice.
3895 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3897 // Memcpy with size zero? Just return the original chain.
3898 if (ConstantSize->isNullValue())
3901 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3902 ConstantSize->getZExtValue(),Align,
3903 isVol, false, DstPtrInfo, SrcPtrInfo);
3904 if (Result.getNode())
3908 // Then check to see if we should lower the memcpy with target-specific
3909 // code. If the target chooses to do this, this is the next best.
3911 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3912 isVol, AlwaysInline,
3913 DstPtrInfo, SrcPtrInfo);
3914 if (Result.getNode())
3917 // If we really need inline code and the target declined to provide it,
3918 // use a (potentially long) sequence of loads and stores.
3920 assert(ConstantSize && "AlwaysInline requires a constant size!");
3921 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3922 ConstantSize->getZExtValue(), Align, isVol,
3923 true, DstPtrInfo, SrcPtrInfo);
3926 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3927 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3928 // respect volatile, so they may do things like read or write memory
3929 // beyond the given memory regions. But fixing this isn't easy, and most
3930 // people don't care.
3932 // Emit a library call.
3933 TargetLowering::ArgListTy Args;
3934 TargetLowering::ArgListEntry Entry;
3935 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3936 Entry.Node = Dst; Args.push_back(Entry);
3937 Entry.Node = Src; Args.push_back(Entry);
3938 Entry.Node = Size; Args.push_back(Entry);
3939 // FIXME: pass in DebugLoc
3941 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3942 false, false, false, false, 0,
3943 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3944 /*isTailCall=*/false,
3945 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3946 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3947 TLI.getPointerTy()),
3949 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3951 return CallResult.second;
3954 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3955 SDValue Src, SDValue Size,
3956 unsigned Align, bool isVol,
3957 MachinePointerInfo DstPtrInfo,
3958 MachinePointerInfo SrcPtrInfo) {
3959 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3961 // Check to see if we should lower the memmove to loads and stores first.
3962 // For cases within the target-specified limits, this is the best choice.
3963 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3965 // Memmove with size zero? Just return the original chain.
3966 if (ConstantSize->isNullValue())
3970 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3971 ConstantSize->getZExtValue(), Align, isVol,
3972 false, DstPtrInfo, SrcPtrInfo);
3973 if (Result.getNode())
3977 // Then check to see if we should lower the memmove with target-specific
3978 // code. If the target chooses to do this, this is the next best.
3980 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3981 DstPtrInfo, SrcPtrInfo);
3982 if (Result.getNode())
3985 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3986 // not be safe. See memcpy above for more details.
3988 // Emit a library call.
3989 TargetLowering::ArgListTy Args;
3990 TargetLowering::ArgListEntry Entry;
3991 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3992 Entry.Node = Dst; Args.push_back(Entry);
3993 Entry.Node = Src; Args.push_back(Entry);
3994 Entry.Node = Size; Args.push_back(Entry);
3995 // FIXME: pass in DebugLoc
3997 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3998 false, false, false, false, 0,
3999 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
4000 /*isTailCall=*/false,
4001 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
4002 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
4003 TLI.getPointerTy()),
4005 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
4007 return CallResult.second;
4010 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
4011 SDValue Src, SDValue Size,
4012 unsigned Align, bool isVol,
4013 MachinePointerInfo DstPtrInfo) {
4014 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4016 // Check to see if we should lower the memset to stores first.
4017 // For cases within the target-specified limits, this is the best choice.
4018 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4020 // Memset with size zero? Just return the original chain.
4021 if (ConstantSize->isNullValue())
4025 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4026 Align, isVol, DstPtrInfo);
4028 if (Result.getNode())
4032 // Then check to see if we should lower the memset with target-specific
4033 // code. If the target chooses to do this, this is the next best.
4035 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4037 if (Result.getNode())
4040 // Emit a library call.
4041 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
4042 TargetLowering::ArgListTy Args;
4043 TargetLowering::ArgListEntry Entry;
4044 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4045 Args.push_back(Entry);
4046 // Extend or truncate the argument to be an i32 value for the call.
4047 if (Src.getValueType().bitsGT(MVT::i32))
4048 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
4050 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
4052 Entry.Ty = Type::getInt32Ty(*getContext());
4053 Entry.isSExt = true;
4054 Args.push_back(Entry);
4056 Entry.Ty = IntPtrTy;
4057 Entry.isSExt = false;
4058 Args.push_back(Entry);
4059 // FIXME: pass in DebugLoc
4061 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
4062 false, false, false, false, 0,
4063 TLI.getLibcallCallingConv(RTLIB::MEMSET),
4064 /*isTailCall=*/false,
4065 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
4066 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
4067 TLI.getPointerTy()),
4069 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
4071 return CallResult.second;
4074 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4075 SDValue Chain, SDValue Ptr, SDValue Cmp,
4076 SDValue Swp, MachinePointerInfo PtrInfo,
4078 AtomicOrdering Ordering,
4079 SynchronizationScope SynchScope) {
4080 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4081 Alignment = getEVTAlignment(MemVT);
4083 MachineFunction &MF = getMachineFunction();
4085 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
4086 // For now, atomics are considered to be volatile always.
4087 // FIXME: Volatile isn't really correct; we should keep track of atomic
4088 // orderings in the memoperand.
4089 unsigned Flags = MachineMemOperand::MOVolatile;
4090 if (Opcode != ISD::ATOMIC_STORE)
4091 Flags |= MachineMemOperand::MOLoad;
4092 if (Opcode != ISD::ATOMIC_LOAD)
4093 Flags |= MachineMemOperand::MOStore;
4095 MachineMemOperand *MMO =
4096 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4098 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4099 Ordering, SynchScope);
4102 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4104 SDValue Ptr, SDValue Cmp,
4105 SDValue Swp, MachineMemOperand *MMO,
4106 AtomicOrdering Ordering,
4107 SynchronizationScope SynchScope) {
4108 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4109 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4111 EVT VT = Cmp.getValueType();
4113 SDVTList VTs = getVTList(VT, MVT::Other);
4114 FoldingSetNodeID ID;
4115 ID.AddInteger(MemVT.getRawBits());
4116 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4117 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4118 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4121 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4122 return SDValue(E, 0);
4124 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4125 Ptr, Cmp, Swp, MMO, Ordering,
4127 CSEMap.InsertNode(N, IP);
4128 AllNodes.push_back(N);
4129 return SDValue(N, 0);
4132 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4134 SDValue Ptr, SDValue Val,
4135 const Value* PtrVal,
4137 AtomicOrdering Ordering,
4138 SynchronizationScope SynchScope) {
4139 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4140 Alignment = getEVTAlignment(MemVT);
4142 MachineFunction &MF = getMachineFunction();
4143 // An atomic store does not load. An atomic load does not store.
4144 // (An atomicrmw obviously both loads and stores.)
4145 // For now, atomics are considered to be volatile always, and they are
4147 // FIXME: Volatile isn't really correct; we should keep track of atomic
4148 // orderings in the memoperand.
4149 unsigned Flags = MachineMemOperand::MOVolatile;
4150 if (Opcode != ISD::ATOMIC_STORE)
4151 Flags |= MachineMemOperand::MOLoad;
4152 if (Opcode != ISD::ATOMIC_LOAD)
4153 Flags |= MachineMemOperand::MOStore;
4155 MachineMemOperand *MMO =
4156 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4157 MemVT.getStoreSize(), Alignment);
4159 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4160 Ordering, SynchScope);
4163 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4165 SDValue Ptr, SDValue Val,
4166 MachineMemOperand *MMO,
4167 AtomicOrdering Ordering,
4168 SynchronizationScope SynchScope) {
4169 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4170 Opcode == ISD::ATOMIC_LOAD_SUB ||
4171 Opcode == ISD::ATOMIC_LOAD_AND ||
4172 Opcode == ISD::ATOMIC_LOAD_OR ||
4173 Opcode == ISD::ATOMIC_LOAD_XOR ||
4174 Opcode == ISD::ATOMIC_LOAD_NAND ||
4175 Opcode == ISD::ATOMIC_LOAD_MIN ||
4176 Opcode == ISD::ATOMIC_LOAD_MAX ||
4177 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4178 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4179 Opcode == ISD::ATOMIC_SWAP ||
4180 Opcode == ISD::ATOMIC_STORE) &&
4181 "Invalid Atomic Op");
4183 EVT VT = Val.getValueType();
4185 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4186 getVTList(VT, MVT::Other);
4187 FoldingSetNodeID ID;
4188 ID.AddInteger(MemVT.getRawBits());
4189 SDValue Ops[] = {Chain, Ptr, Val};
4190 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4191 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4193 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4194 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4195 return SDValue(E, 0);
4197 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4199 Ordering, SynchScope);
4200 CSEMap.InsertNode(N, IP);
4201 AllNodes.push_back(N);
4202 return SDValue(N, 0);
4205 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4206 EVT VT, SDValue Chain,
4208 const Value* PtrVal,
4210 AtomicOrdering Ordering,
4211 SynchronizationScope SynchScope) {
4212 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4213 Alignment = getEVTAlignment(MemVT);
4215 MachineFunction &MF = getMachineFunction();
4216 // An atomic store does not load. An atomic load does not store.
4217 // (An atomicrmw obviously both loads and stores.)
4218 // For now, atomics are considered to be volatile always, and they are
4220 // FIXME: Volatile isn't really correct; we should keep track of atomic
4221 // orderings in the memoperand.
4222 unsigned Flags = MachineMemOperand::MOVolatile;
4223 if (Opcode != ISD::ATOMIC_STORE)
4224 Flags |= MachineMemOperand::MOLoad;
4225 if (Opcode != ISD::ATOMIC_LOAD)
4226 Flags |= MachineMemOperand::MOStore;
4228 MachineMemOperand *MMO =
4229 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4230 MemVT.getStoreSize(), Alignment);
4232 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4233 Ordering, SynchScope);
4236 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4237 EVT VT, SDValue Chain,
4239 MachineMemOperand *MMO,
4240 AtomicOrdering Ordering,
4241 SynchronizationScope SynchScope) {
4242 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4244 SDVTList VTs = getVTList(VT, MVT::Other);
4245 FoldingSetNodeID ID;
4246 ID.AddInteger(MemVT.getRawBits());
4247 SDValue Ops[] = {Chain, Ptr};
4248 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4249 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4252 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4253 return SDValue(E, 0);
4255 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4256 Ptr, MMO, Ordering, SynchScope);
4257 CSEMap.InsertNode(N, IP);
4258 AllNodes.push_back(N);
4259 return SDValue(N, 0);
4262 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4263 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4268 SmallVector<EVT, 4> VTs;
4269 VTs.reserve(NumOps);
4270 for (unsigned i = 0; i < NumOps; ++i)
4271 VTs.push_back(Ops[i].getValueType());
4272 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4277 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4278 const EVT *VTs, unsigned NumVTs,
4279 const SDValue *Ops, unsigned NumOps,
4280 EVT MemVT, MachinePointerInfo PtrInfo,
4281 unsigned Align, bool Vol,
4282 bool ReadMem, bool WriteMem) {
4283 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4284 MemVT, PtrInfo, Align, Vol,
4289 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4290 const SDValue *Ops, unsigned NumOps,
4291 EVT MemVT, MachinePointerInfo PtrInfo,
4292 unsigned Align, bool Vol,
4293 bool ReadMem, bool WriteMem) {
4294 if (Align == 0) // Ensure that codegen never sees alignment 0
4295 Align = getEVTAlignment(MemVT);
4297 MachineFunction &MF = getMachineFunction();
4300 Flags |= MachineMemOperand::MOStore;
4302 Flags |= MachineMemOperand::MOLoad;
4304 Flags |= MachineMemOperand::MOVolatile;
4305 MachineMemOperand *MMO =
4306 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4308 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4312 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4313 const SDValue *Ops, unsigned NumOps,
4314 EVT MemVT, MachineMemOperand *MMO) {
4315 assert((Opcode == ISD::INTRINSIC_VOID ||
4316 Opcode == ISD::INTRINSIC_W_CHAIN ||
4317 Opcode == ISD::PREFETCH ||
4318 Opcode == ISD::LIFETIME_START ||
4319 Opcode == ISD::LIFETIME_END ||
4320 (Opcode <= INT_MAX &&
4321 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4322 "Opcode is not a memory-accessing opcode!");
4324 // Memoize the node unless it returns a flag.
4325 MemIntrinsicSDNode *N;
4326 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4327 FoldingSetNodeID ID;
4328 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4329 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4331 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4332 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4333 return SDValue(E, 0);
4336 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4338 CSEMap.InsertNode(N, IP);
4340 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4343 AllNodes.push_back(N);
4344 return SDValue(N, 0);
4347 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4348 /// MachinePointerInfo record from it. This is particularly useful because the
4349 /// code generator has many cases where it doesn't bother passing in a
4350 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4351 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4352 // If this is FI+Offset, we can model it.
4353 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4354 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4356 // If this is (FI+Offset1)+Offset2, we can model it.
4357 if (Ptr.getOpcode() != ISD::ADD ||
4358 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4359 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4360 return MachinePointerInfo();
4362 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4363 return MachinePointerInfo::getFixedStack(FI, Offset+
4364 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4367 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4368 /// MachinePointerInfo record from it. This is particularly useful because the
4369 /// code generator has many cases where it doesn't bother passing in a
4370 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4371 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4372 // If the 'Offset' value isn't a constant, we can't handle this.
4373 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4374 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4375 if (OffsetOp.getOpcode() == ISD::UNDEF)
4376 return InferPointerInfo(Ptr);
4377 return MachinePointerInfo();
4382 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4383 EVT VT, DebugLoc dl, SDValue Chain,
4384 SDValue Ptr, SDValue Offset,
4385 MachinePointerInfo PtrInfo, EVT MemVT,
4386 bool isVolatile, bool isNonTemporal, bool isInvariant,
4387 unsigned Alignment, const MDNode *TBAAInfo,
4388 const MDNode *Ranges) {
4389 assert(Chain.getValueType() == MVT::Other &&
4390 "Invalid chain type");
4391 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4392 Alignment = getEVTAlignment(VT);
4394 unsigned Flags = MachineMemOperand::MOLoad;
4396 Flags |= MachineMemOperand::MOVolatile;
4398 Flags |= MachineMemOperand::MONonTemporal;
4400 Flags |= MachineMemOperand::MOInvariant;
4402 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4405 PtrInfo = InferPointerInfo(Ptr, Offset);
4407 MachineFunction &MF = getMachineFunction();
4408 MachineMemOperand *MMO =
4409 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4411 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4415 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4416 EVT VT, DebugLoc dl, SDValue Chain,
4417 SDValue Ptr, SDValue Offset, EVT MemVT,
4418 MachineMemOperand *MMO) {
4420 ExtType = ISD::NON_EXTLOAD;
4421 } else if (ExtType == ISD::NON_EXTLOAD) {
4422 assert(VT == MemVT && "Non-extending load from different memory type!");
4425 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4426 "Should only be an extending load, not truncating!");
4427 assert(VT.isInteger() == MemVT.isInteger() &&
4428 "Cannot convert from FP to Int or Int -> FP!");
4429 assert(VT.isVector() == MemVT.isVector() &&
4430 "Cannot use trunc store to convert to or from a vector!");
4431 assert((!VT.isVector() ||
4432 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4433 "Cannot use trunc store to change the number of vector elements!");
4436 bool Indexed = AM != ISD::UNINDEXED;
4437 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4438 "Unindexed load with an offset!");
4440 SDVTList VTs = Indexed ?
4441 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4442 SDValue Ops[] = { Chain, Ptr, Offset };
4443 FoldingSetNodeID ID;
4444 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4445 ID.AddInteger(MemVT.getRawBits());
4446 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4447 MMO->isNonTemporal(),
4448 MMO->isInvariant()));
4449 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4452 cast<LoadSDNode>(E)->refineAlignment(MMO);
4453 return SDValue(E, 0);
4455 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4457 CSEMap.InsertNode(N, IP);
4458 AllNodes.push_back(N);
4459 return SDValue(N, 0);
4462 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4463 SDValue Chain, SDValue Ptr,
4464 MachinePointerInfo PtrInfo,
4465 bool isVolatile, bool isNonTemporal,
4466 bool isInvariant, unsigned Alignment,
4467 const MDNode *TBAAInfo,
4468 const MDNode *Ranges) {
4469 SDValue Undef = getUNDEF(Ptr.getValueType());
4470 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4471 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4475 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4476 SDValue Chain, SDValue Ptr,
4477 MachinePointerInfo PtrInfo, EVT MemVT,
4478 bool isVolatile, bool isNonTemporal,
4479 unsigned Alignment, const MDNode *TBAAInfo) {
4480 SDValue Undef = getUNDEF(Ptr.getValueType());
4481 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4482 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4488 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4489 SDValue Offset, ISD::MemIndexedMode AM) {
4490 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4491 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4492 "Load is already a indexed load!");
4493 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4494 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4495 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4496 false, LD->getAlignment());
4499 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4500 SDValue Ptr, MachinePointerInfo PtrInfo,
4501 bool isVolatile, bool isNonTemporal,
4502 unsigned Alignment, const MDNode *TBAAInfo) {
4503 assert(Chain.getValueType() == MVT::Other &&
4504 "Invalid chain type");
4505 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4506 Alignment = getEVTAlignment(Val.getValueType());
4508 unsigned Flags = MachineMemOperand::MOStore;
4510 Flags |= MachineMemOperand::MOVolatile;
4512 Flags |= MachineMemOperand::MONonTemporal;
4515 PtrInfo = InferPointerInfo(Ptr);
4517 MachineFunction &MF = getMachineFunction();
4518 MachineMemOperand *MMO =
4519 MF.getMachineMemOperand(PtrInfo, Flags,
4520 Val.getValueType().getStoreSize(), Alignment,
4523 return getStore(Chain, dl, Val, Ptr, MMO);
4526 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4527 SDValue Ptr, MachineMemOperand *MMO) {
4528 assert(Chain.getValueType() == MVT::Other &&
4529 "Invalid chain type");
4530 EVT VT = Val.getValueType();
4531 SDVTList VTs = getVTList(MVT::Other);
4532 SDValue Undef = getUNDEF(Ptr.getValueType());
4533 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4534 FoldingSetNodeID ID;
4535 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4536 ID.AddInteger(VT.getRawBits());
4537 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4538 MMO->isNonTemporal(), MMO->isInvariant()));
4539 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4541 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4542 cast<StoreSDNode>(E)->refineAlignment(MMO);
4543 return SDValue(E, 0);
4545 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4547 CSEMap.InsertNode(N, IP);
4548 AllNodes.push_back(N);
4549 return SDValue(N, 0);
4552 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4553 SDValue Ptr, MachinePointerInfo PtrInfo,
4554 EVT SVT,bool isVolatile, bool isNonTemporal,
4556 const MDNode *TBAAInfo) {
4557 assert(Chain.getValueType() == MVT::Other &&
4558 "Invalid chain type");
4559 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4560 Alignment = getEVTAlignment(SVT);
4562 unsigned Flags = MachineMemOperand::MOStore;
4564 Flags |= MachineMemOperand::MOVolatile;
4566 Flags |= MachineMemOperand::MONonTemporal;
4569 PtrInfo = InferPointerInfo(Ptr);
4571 MachineFunction &MF = getMachineFunction();
4572 MachineMemOperand *MMO =
4573 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4576 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4579 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4580 SDValue Ptr, EVT SVT,
4581 MachineMemOperand *MMO) {
4582 EVT VT = Val.getValueType();
4584 assert(Chain.getValueType() == MVT::Other &&
4585 "Invalid chain type");
4587 return getStore(Chain, dl, Val, Ptr, MMO);
4589 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4590 "Should only be a truncating store, not extending!");
4591 assert(VT.isInteger() == SVT.isInteger() &&
4592 "Can't do FP-INT conversion!");
4593 assert(VT.isVector() == SVT.isVector() &&
4594 "Cannot use trunc store to convert to or from a vector!");
4595 assert((!VT.isVector() ||
4596 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4597 "Cannot use trunc store to change the number of vector elements!");
4599 SDVTList VTs = getVTList(MVT::Other);
4600 SDValue Undef = getUNDEF(Ptr.getValueType());
4601 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4602 FoldingSetNodeID ID;
4603 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4604 ID.AddInteger(SVT.getRawBits());
4605 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4606 MMO->isNonTemporal(), MMO->isInvariant()));
4607 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4610 cast<StoreSDNode>(E)->refineAlignment(MMO);
4611 return SDValue(E, 0);
4613 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4615 CSEMap.InsertNode(N, IP);
4616 AllNodes.push_back(N);
4617 return SDValue(N, 0);
4621 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4622 SDValue Offset, ISD::MemIndexedMode AM) {
4623 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4624 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4625 "Store is already a indexed store!");
4626 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4627 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4628 FoldingSetNodeID ID;
4629 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4630 ID.AddInteger(ST->getMemoryVT().getRawBits());
4631 ID.AddInteger(ST->getRawSubclassData());
4632 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4634 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4635 return SDValue(E, 0);
4637 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4638 ST->isTruncatingStore(),
4640 ST->getMemOperand());
4641 CSEMap.InsertNode(N, IP);
4642 AllNodes.push_back(N);
4643 return SDValue(N, 0);
4646 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4647 SDValue Chain, SDValue Ptr,
4650 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4651 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4654 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4655 const SDUse *Ops, unsigned NumOps) {
4657 case 0: return getNode(Opcode, DL, VT);
4658 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4659 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4660 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4664 // Copy from an SDUse array into an SDValue array for use with
4665 // the regular getNode logic.
4666 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4667 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4670 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4671 const SDValue *Ops, unsigned NumOps) {
4673 case 0: return getNode(Opcode, DL, VT);
4674 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4675 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4676 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4682 case ISD::SELECT_CC: {
4683 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4684 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4685 "LHS and RHS of condition must have same type!");
4686 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4687 "True and False arms of SelectCC must have same type!");
4688 assert(Ops[2].getValueType() == VT &&
4689 "select_cc node must be of same type as true and false value!");
4693 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4694 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4695 "LHS/RHS of comparison should match types!");
4702 SDVTList VTs = getVTList(VT);
4704 if (VT != MVT::Glue) {
4705 FoldingSetNodeID ID;
4706 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4709 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4710 return SDValue(E, 0);
4712 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4713 CSEMap.InsertNode(N, IP);
4715 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4718 AllNodes.push_back(N);
4722 return SDValue(N, 0);
4725 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4726 ArrayRef<EVT> ResultTys,
4727 const SDValue *Ops, unsigned NumOps) {
4728 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4732 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4733 const EVT *VTs, unsigned NumVTs,
4734 const SDValue *Ops, unsigned NumOps) {
4736 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4737 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4740 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4741 const SDValue *Ops, unsigned NumOps) {
4742 if (VTList.NumVTs == 1)
4743 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4747 // FIXME: figure out how to safely handle things like
4748 // int foo(int x) { return 1 << (x & 255); }
4749 // int bar() { return foo(256); }
4750 case ISD::SRA_PARTS:
4751 case ISD::SRL_PARTS:
4752 case ISD::SHL_PARTS:
4753 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4754 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4755 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4756 else if (N3.getOpcode() == ISD::AND)
4757 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4758 // If the and is only masking out bits that cannot effect the shift,
4759 // eliminate the and.
4760 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4761 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4762 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4768 // Memoize the node unless it returns a flag.
4770 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4771 FoldingSetNodeID ID;
4772 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4774 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4775 return SDValue(E, 0);
4778 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4779 } else if (NumOps == 2) {
4780 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4781 } else if (NumOps == 3) {
4782 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4785 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4787 CSEMap.InsertNode(N, IP);
4790 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4791 } else if (NumOps == 2) {
4792 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4793 } else if (NumOps == 3) {
4794 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4797 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4800 AllNodes.push_back(N);
4804 return SDValue(N, 0);
4807 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4808 return getNode(Opcode, DL, VTList, 0, 0);
4811 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4813 SDValue Ops[] = { N1 };
4814 return getNode(Opcode, DL, VTList, Ops, 1);
4817 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4818 SDValue N1, SDValue N2) {
4819 SDValue Ops[] = { N1, N2 };
4820 return getNode(Opcode, DL, VTList, Ops, 2);
4823 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4824 SDValue N1, SDValue N2, SDValue N3) {
4825 SDValue Ops[] = { N1, N2, N3 };
4826 return getNode(Opcode, DL, VTList, Ops, 3);
4829 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4830 SDValue N1, SDValue N2, SDValue N3,
4832 SDValue Ops[] = { N1, N2, N3, N4 };
4833 return getNode(Opcode, DL, VTList, Ops, 4);
4836 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4837 SDValue N1, SDValue N2, SDValue N3,
4838 SDValue N4, SDValue N5) {
4839 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4840 return getNode(Opcode, DL, VTList, Ops, 5);
4843 SDVTList SelectionDAG::getVTList(EVT VT) {
4844 return makeVTList(SDNode::getValueTypeList(VT), 1);
4847 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4848 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4849 E = VTList.rend(); I != E; ++I)
4850 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4853 EVT *Array = Allocator.Allocate<EVT>(2);
4856 SDVTList Result = makeVTList(Array, 2);
4857 VTList.push_back(Result);
4861 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4862 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4863 E = VTList.rend(); I != E; ++I)
4864 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4868 EVT *Array = Allocator.Allocate<EVT>(3);
4872 SDVTList Result = makeVTList(Array, 3);
4873 VTList.push_back(Result);
4877 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4878 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4879 E = VTList.rend(); I != E; ++I)
4880 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4881 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4884 EVT *Array = Allocator.Allocate<EVT>(4);
4889 SDVTList Result = makeVTList(Array, 4);
4890 VTList.push_back(Result);
4894 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4896 case 0: llvm_unreachable("Cannot have nodes without results!");
4897 case 1: return getVTList(VTs[0]);
4898 case 2: return getVTList(VTs[0], VTs[1]);
4899 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4900 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4904 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4905 E = VTList.rend(); I != E; ++I) {
4906 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4909 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4913 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4914 std::copy(VTs, VTs+NumVTs, Array);
4915 SDVTList Result = makeVTList(Array, NumVTs);
4916 VTList.push_back(Result);
4921 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4922 /// specified operands. If the resultant node already exists in the DAG,
4923 /// this does not modify the specified node, instead it returns the node that
4924 /// already exists. If the resultant node does not exist in the DAG, the
4925 /// input node is returned. As a degenerate case, if you specify the same
4926 /// input operands as the node already has, the input node is returned.
4927 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4928 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4930 // Check to see if there is no change.
4931 if (Op == N->getOperand(0)) return N;
4933 // See if the modified node already exists.
4934 void *InsertPos = 0;
4935 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4938 // Nope it doesn't. Remove the node from its current place in the maps.
4940 if (!RemoveNodeFromCSEMaps(N))
4943 // Now we update the operands.
4944 N->OperandList[0].set(Op);
4946 // If this gets put into a CSE map, add it.
4947 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4951 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4952 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4954 // Check to see if there is no change.
4955 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4956 return N; // No operands changed, just return the input node.
4958 // See if the modified node already exists.
4959 void *InsertPos = 0;
4960 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4963 // Nope it doesn't. Remove the node from its current place in the maps.
4965 if (!RemoveNodeFromCSEMaps(N))
4968 // Now we update the operands.
4969 if (N->OperandList[0] != Op1)
4970 N->OperandList[0].set(Op1);
4971 if (N->OperandList[1] != Op2)
4972 N->OperandList[1].set(Op2);
4974 // If this gets put into a CSE map, add it.
4975 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4979 SDNode *SelectionDAG::
4980 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4981 SDValue Ops[] = { Op1, Op2, Op3 };
4982 return UpdateNodeOperands(N, Ops, 3);
4985 SDNode *SelectionDAG::
4986 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4987 SDValue Op3, SDValue Op4) {
4988 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4989 return UpdateNodeOperands(N, Ops, 4);
4992 SDNode *SelectionDAG::
4993 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4994 SDValue Op3, SDValue Op4, SDValue Op5) {
4995 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4996 return UpdateNodeOperands(N, Ops, 5);
4999 SDNode *SelectionDAG::
5000 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
5001 assert(N->getNumOperands() == NumOps &&
5002 "Update with wrong number of operands");
5004 // Check to see if there is no change.
5005 bool AnyChange = false;
5006 for (unsigned i = 0; i != NumOps; ++i) {
5007 if (Ops[i] != N->getOperand(i)) {
5013 // No operands changed, just return the input node.
5014 if (!AnyChange) return N;
5016 // See if the modified node already exists.
5017 void *InsertPos = 0;
5018 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
5021 // Nope it doesn't. Remove the node from its current place in the maps.
5023 if (!RemoveNodeFromCSEMaps(N))
5026 // Now we update the operands.
5027 for (unsigned i = 0; i != NumOps; ++i)
5028 if (N->OperandList[i] != Ops[i])
5029 N->OperandList[i].set(Ops[i]);
5031 // If this gets put into a CSE map, add it.
5032 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5036 /// DropOperands - Release the operands and set this node to have
5038 void SDNode::DropOperands() {
5039 // Unlike the code in MorphNodeTo that does this, we don't need to
5040 // watch for dead nodes here.
5041 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5047 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5050 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5052 SDVTList VTs = getVTList(VT);
5053 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
5056 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5057 EVT VT, SDValue Op1) {
5058 SDVTList VTs = getVTList(VT);
5059 SDValue Ops[] = { Op1 };
5060 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5063 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5064 EVT VT, SDValue Op1,
5066 SDVTList VTs = getVTList(VT);
5067 SDValue Ops[] = { Op1, Op2 };
5068 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5071 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5072 EVT VT, SDValue Op1,
5073 SDValue Op2, SDValue Op3) {
5074 SDVTList VTs = getVTList(VT);
5075 SDValue Ops[] = { Op1, Op2, Op3 };
5076 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5079 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5080 EVT VT, const SDValue *Ops,
5082 SDVTList VTs = getVTList(VT);
5083 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5086 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5087 EVT VT1, EVT VT2, const SDValue *Ops,
5089 SDVTList VTs = getVTList(VT1, VT2);
5090 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5093 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5095 SDVTList VTs = getVTList(VT1, VT2);
5096 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5099 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5100 EVT VT1, EVT VT2, EVT VT3,
5101 const SDValue *Ops, unsigned NumOps) {
5102 SDVTList VTs = getVTList(VT1, VT2, VT3);
5103 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5106 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5107 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5108 const SDValue *Ops, unsigned NumOps) {
5109 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5110 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5113 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5116 SDVTList VTs = getVTList(VT1, VT2);
5117 SDValue Ops[] = { Op1 };
5118 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5121 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5123 SDValue Op1, SDValue Op2) {
5124 SDVTList VTs = getVTList(VT1, VT2);
5125 SDValue Ops[] = { Op1, Op2 };
5126 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5129 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5131 SDValue Op1, SDValue Op2,
5133 SDVTList VTs = getVTList(VT1, VT2);
5134 SDValue Ops[] = { Op1, Op2, Op3 };
5135 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5138 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5139 EVT VT1, EVT VT2, EVT VT3,
5140 SDValue Op1, SDValue Op2,
5142 SDVTList VTs = getVTList(VT1, VT2, VT3);
5143 SDValue Ops[] = { Op1, Op2, Op3 };
5144 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5147 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5148 SDVTList VTs, const SDValue *Ops,
5150 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5151 // Reset the NodeID to -1.
5156 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5157 /// the line number information on the merged node since it is not possible to
5158 /// preserve the information that operation is associated with multiple lines.
5159 /// This will make the debugger working better at -O0, were there is a higher
5160 /// probability having other instructions associated with that line.
5162 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5163 DebugLoc NLoc = N->getDebugLoc();
5164 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5165 N->setDebugLoc(DebugLoc());
5170 /// MorphNodeTo - This *mutates* the specified node to have the specified
5171 /// return type, opcode, and operands.
5173 /// Note that MorphNodeTo returns the resultant node. If there is already a
5174 /// node of the specified opcode and operands, it returns that node instead of
5175 /// the current one. Note that the DebugLoc need not be the same.
5177 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5178 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5179 /// node, and because it doesn't require CSE recalculation for any of
5180 /// the node's users.
5182 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5183 SDVTList VTs, const SDValue *Ops,
5185 // If an identical node already exists, use it.
5187 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5188 FoldingSetNodeID ID;
5189 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5190 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5191 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5194 if (!RemoveNodeFromCSEMaps(N))
5197 // Start the morphing.
5199 N->ValueList = VTs.VTs;
5200 N->NumValues = VTs.NumVTs;
5202 // Clear the operands list, updating used nodes to remove this from their
5203 // use list. Keep track of any operands that become dead as a result.
5204 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5205 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5207 SDNode *Used = Use.getNode();
5209 if (Used->use_empty())
5210 DeadNodeSet.insert(Used);
5213 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5214 // Initialize the memory references information.
5215 MN->setMemRefs(0, 0);
5216 // If NumOps is larger than the # of operands we can have in a
5217 // MachineSDNode, reallocate the operand list.
5218 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5219 if (MN->OperandsNeedDelete)
5220 delete[] MN->OperandList;
5221 if (NumOps > array_lengthof(MN->LocalOperands))
5222 // We're creating a final node that will live unmorphed for the
5223 // remainder of the current SelectionDAG iteration, so we can allocate
5224 // the operands directly out of a pool with no recycling metadata.
5225 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5228 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5229 MN->OperandsNeedDelete = false;
5231 MN->InitOperands(MN->OperandList, Ops, NumOps);
5233 // If NumOps is larger than the # of operands we currently have, reallocate
5234 // the operand list.
5235 if (NumOps > N->NumOperands) {
5236 if (N->OperandsNeedDelete)
5237 delete[] N->OperandList;
5238 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5239 N->OperandsNeedDelete = true;
5241 N->InitOperands(N->OperandList, Ops, NumOps);
5244 // Delete any nodes that are still dead after adding the uses for the
5246 if (!DeadNodeSet.empty()) {
5247 SmallVector<SDNode *, 16> DeadNodes;
5248 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5249 E = DeadNodeSet.end(); I != E; ++I)
5250 if ((*I)->use_empty())
5251 DeadNodes.push_back(*I);
5252 RemoveDeadNodes(DeadNodes);
5256 CSEMap.InsertNode(N, IP); // Memoize the new node.
5261 /// getMachineNode - These are used for target selectors to create a new node
5262 /// with specified return type(s), MachineInstr opcode, and operands.
5264 /// Note that getMachineNode returns the resultant node. If there is already a
5265 /// node of the specified opcode and operands, it returns that node instead of
5266 /// the current one.
5268 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5269 SDVTList VTs = getVTList(VT);
5270 return getMachineNode(Opcode, dl, VTs, None);
5274 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5275 SDVTList VTs = getVTList(VT);
5276 SDValue Ops[] = { Op1 };
5277 return getMachineNode(Opcode, dl, VTs, Ops);
5281 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5282 SDValue Op1, SDValue Op2) {
5283 SDVTList VTs = getVTList(VT);
5284 SDValue Ops[] = { Op1, Op2 };
5285 return getMachineNode(Opcode, dl, VTs, Ops);
5289 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5290 SDValue Op1, SDValue Op2, SDValue Op3) {
5291 SDVTList VTs = getVTList(VT);
5292 SDValue Ops[] = { Op1, Op2, Op3 };
5293 return getMachineNode(Opcode, dl, VTs, Ops);
5297 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5298 ArrayRef<SDValue> Ops) {
5299 SDVTList VTs = getVTList(VT);
5300 return getMachineNode(Opcode, dl, VTs, Ops);
5304 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5305 SDVTList VTs = getVTList(VT1, VT2);
5306 return getMachineNode(Opcode, dl, VTs, None);
5310 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5311 EVT VT1, EVT VT2, SDValue Op1) {
5312 SDVTList VTs = getVTList(VT1, VT2);
5313 SDValue Ops[] = { Op1 };
5314 return getMachineNode(Opcode, dl, VTs, Ops);
5318 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5319 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5320 SDVTList VTs = getVTList(VT1, VT2);
5321 SDValue Ops[] = { Op1, Op2 };
5322 return getMachineNode(Opcode, dl, VTs, Ops);
5326 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5327 EVT VT1, EVT VT2, SDValue Op1,
5328 SDValue Op2, SDValue Op3) {
5329 SDVTList VTs = getVTList(VT1, VT2);
5330 SDValue Ops[] = { Op1, Op2, Op3 };
5331 return getMachineNode(Opcode, dl, VTs, Ops);
5335 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5337 ArrayRef<SDValue> Ops) {
5338 SDVTList VTs = getVTList(VT1, VT2);
5339 return getMachineNode(Opcode, dl, VTs, Ops);
5343 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5344 EVT VT1, EVT VT2, EVT VT3,
5345 SDValue Op1, SDValue Op2) {
5346 SDVTList VTs = getVTList(VT1, VT2, VT3);
5347 SDValue Ops[] = { Op1, Op2 };
5348 return getMachineNode(Opcode, dl, VTs, Ops);
5352 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5353 EVT VT1, EVT VT2, EVT VT3,
5354 SDValue Op1, SDValue Op2, SDValue Op3) {
5355 SDVTList VTs = getVTList(VT1, VT2, VT3);
5356 SDValue Ops[] = { Op1, Op2, Op3 };
5357 return getMachineNode(Opcode, dl, VTs, Ops);
5361 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5362 EVT VT1, EVT VT2, EVT VT3,
5363 ArrayRef<SDValue> Ops) {
5364 SDVTList VTs = getVTList(VT1, VT2, VT3);
5365 return getMachineNode(Opcode, dl, VTs, Ops);
5369 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5370 EVT VT2, EVT VT3, EVT VT4,
5371 ArrayRef<SDValue> Ops) {
5372 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5373 return getMachineNode(Opcode, dl, VTs, Ops);
5377 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5378 ArrayRef<EVT> ResultTys,
5379 ArrayRef<SDValue> Ops) {
5380 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5381 return getMachineNode(Opcode, dl, VTs, Ops);
5385 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5386 ArrayRef<SDValue> OpsArray) {
5387 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5390 const SDValue *Ops = OpsArray.data();
5391 unsigned NumOps = OpsArray.size();
5394 FoldingSetNodeID ID;
5395 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5398 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5402 // Allocate a new MachineSDNode.
5403 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5405 // Initialize the operands list.
5406 if (NumOps > array_lengthof(N->LocalOperands))
5407 // We're creating a final node that will live unmorphed for the
5408 // remainder of the current SelectionDAG iteration, so we can allocate
5409 // the operands directly out of a pool with no recycling metadata.
5410 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5413 N->InitOperands(N->LocalOperands, Ops, NumOps);
5414 N->OperandsNeedDelete = false;
5417 CSEMap.InsertNode(N, IP);
5419 AllNodes.push_back(N);
5421 VerifyMachineNode(N);
5426 /// getTargetExtractSubreg - A convenience function for creating
5427 /// TargetOpcode::EXTRACT_SUBREG nodes.
5429 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5431 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5432 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5433 VT, Operand, SRIdxVal);
5434 return SDValue(Subreg, 0);
5437 /// getTargetInsertSubreg - A convenience function for creating
5438 /// TargetOpcode::INSERT_SUBREG nodes.
5440 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5441 SDValue Operand, SDValue Subreg) {
5442 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5443 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5444 VT, Operand, Subreg, SRIdxVal);
5445 return SDValue(Result, 0);
5448 /// getNodeIfExists - Get the specified node if it's already available, or
5449 /// else return NULL.
5450 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5451 const SDValue *Ops, unsigned NumOps) {
5452 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5453 FoldingSetNodeID ID;
5454 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5462 /// getDbgValue - Creates a SDDbgValue node.
5465 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5466 DebugLoc DL, unsigned O) {
5467 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5471 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5472 DebugLoc DL, unsigned O) {
5473 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5477 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5478 DebugLoc DL, unsigned O) {
5479 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5484 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5485 /// pointed to by a use iterator is deleted, increment the use iterator
5486 /// so that it doesn't dangle.
5488 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5489 SDNode::use_iterator &UI;
5490 SDNode::use_iterator &UE;
5492 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5493 // Increment the iterator as needed.
5494 while (UI != UE && N == *UI)
5499 RAUWUpdateListener(SelectionDAG &d,
5500 SDNode::use_iterator &ui,
5501 SDNode::use_iterator &ue)
5502 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5507 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5508 /// This can cause recursive merging of nodes in the DAG.
5510 /// This version assumes From has a single result value.
5512 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5513 SDNode *From = FromN.getNode();
5514 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5515 "Cannot replace with this method!");
5516 assert(From != To.getNode() && "Cannot replace uses of with self");
5518 // Iterate over all the existing uses of From. New uses will be added
5519 // to the beginning of the use list, which we avoid visiting.
5520 // This specifically avoids visiting uses of From that arise while the
5521 // replacement is happening, because any such uses would be the result
5522 // of CSE: If an existing node looks like From after one of its operands
5523 // is replaced by To, we don't want to replace of all its users with To
5524 // too. See PR3018 for more info.
5525 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5526 RAUWUpdateListener Listener(*this, UI, UE);
5530 // This node is about to morph, remove its old self from the CSE maps.
5531 RemoveNodeFromCSEMaps(User);
5533 // A user can appear in a use list multiple times, and when this
5534 // happens the uses are usually next to each other in the list.
5535 // To help reduce the number of CSE recomputations, process all
5536 // the uses of this user that we can find this way.
5538 SDUse &Use = UI.getUse();
5541 } while (UI != UE && *UI == User);
5543 // Now that we have modified User, add it back to the CSE maps. If it
5544 // already exists there, recursively merge the results together.
5545 AddModifiedNodeToCSEMaps(User);
5548 // If we just RAUW'd the root, take note.
5549 if (FromN == getRoot())
5553 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5554 /// This can cause recursive merging of nodes in the DAG.
5556 /// This version assumes that for each value of From, there is a
5557 /// corresponding value in To in the same position with the same type.
5559 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5561 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5562 assert((!From->hasAnyUseOfValue(i) ||
5563 From->getValueType(i) == To->getValueType(i)) &&
5564 "Cannot use this version of ReplaceAllUsesWith!");
5567 // Handle the trivial case.
5571 // Iterate over just the existing users of From. See the comments in
5572 // the ReplaceAllUsesWith above.
5573 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5574 RAUWUpdateListener Listener(*this, UI, UE);
5578 // This node is about to morph, remove its old self from the CSE maps.
5579 RemoveNodeFromCSEMaps(User);
5581 // A user can appear in a use list multiple times, and when this
5582 // happens the uses are usually next to each other in the list.
5583 // To help reduce the number of CSE recomputations, process all
5584 // the uses of this user that we can find this way.
5586 SDUse &Use = UI.getUse();
5589 } while (UI != UE && *UI == User);
5591 // Now that we have modified User, add it back to the CSE maps. If it
5592 // already exists there, recursively merge the results together.
5593 AddModifiedNodeToCSEMaps(User);
5596 // If we just RAUW'd the root, take note.
5597 if (From == getRoot().getNode())
5598 setRoot(SDValue(To, getRoot().getResNo()));
5601 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5602 /// This can cause recursive merging of nodes in the DAG.
5604 /// This version can replace From with any result values. To must match the
5605 /// number and types of values returned by From.
5606 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5607 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5608 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5610 // Iterate over just the existing users of From. See the comments in
5611 // the ReplaceAllUsesWith above.
5612 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5613 RAUWUpdateListener Listener(*this, UI, UE);
5617 // This node is about to morph, remove its old self from the CSE maps.
5618 RemoveNodeFromCSEMaps(User);
5620 // A user can appear in a use list multiple times, and when this
5621 // happens the uses are usually next to each other in the list.
5622 // To help reduce the number of CSE recomputations, process all
5623 // the uses of this user that we can find this way.
5625 SDUse &Use = UI.getUse();
5626 const SDValue &ToOp = To[Use.getResNo()];
5629 } while (UI != UE && *UI == User);
5631 // Now that we have modified User, add it back to the CSE maps. If it
5632 // already exists there, recursively merge the results together.
5633 AddModifiedNodeToCSEMaps(User);
5636 // If we just RAUW'd the root, take note.
5637 if (From == getRoot().getNode())
5638 setRoot(SDValue(To[getRoot().getResNo()]));
5641 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5642 /// uses of other values produced by From.getNode() alone. The Deleted
5643 /// vector is handled the same way as for ReplaceAllUsesWith.
5644 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5645 // Handle the really simple, really trivial case efficiently.
5646 if (From == To) return;
5648 // Handle the simple, trivial, case efficiently.
5649 if (From.getNode()->getNumValues() == 1) {
5650 ReplaceAllUsesWith(From, To);
5654 // Iterate over just the existing users of From. See the comments in
5655 // the ReplaceAllUsesWith above.
5656 SDNode::use_iterator UI = From.getNode()->use_begin(),
5657 UE = From.getNode()->use_end();
5658 RAUWUpdateListener Listener(*this, UI, UE);
5661 bool UserRemovedFromCSEMaps = false;
5663 // A user can appear in a use list multiple times, and when this
5664 // happens the uses are usually next to each other in the list.
5665 // To help reduce the number of CSE recomputations, process all
5666 // the uses of this user that we can find this way.
5668 SDUse &Use = UI.getUse();
5670 // Skip uses of different values from the same node.
5671 if (Use.getResNo() != From.getResNo()) {
5676 // If this node hasn't been modified yet, it's still in the CSE maps,
5677 // so remove its old self from the CSE maps.
5678 if (!UserRemovedFromCSEMaps) {
5679 RemoveNodeFromCSEMaps(User);
5680 UserRemovedFromCSEMaps = true;
5685 } while (UI != UE && *UI == User);
5687 // We are iterating over all uses of the From node, so if a use
5688 // doesn't use the specific value, no changes are made.
5689 if (!UserRemovedFromCSEMaps)
5692 // Now that we have modified User, add it back to the CSE maps. If it
5693 // already exists there, recursively merge the results together.
5694 AddModifiedNodeToCSEMaps(User);
5697 // If we just RAUW'd the root, take note.
5698 if (From == getRoot())
5703 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5704 /// to record information about a use.
5711 /// operator< - Sort Memos by User.
5712 bool operator<(const UseMemo &L, const UseMemo &R) {
5713 return (intptr_t)L.User < (intptr_t)R.User;
5717 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5718 /// uses of other values produced by From.getNode() alone. The same value
5719 /// may appear in both the From and To list. The Deleted vector is
5720 /// handled the same way as for ReplaceAllUsesWith.
5721 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5724 // Handle the simple, trivial case efficiently.
5726 return ReplaceAllUsesOfValueWith(*From, *To);
5728 // Read up all the uses and make records of them. This helps
5729 // processing new uses that are introduced during the
5730 // replacement process.
5731 SmallVector<UseMemo, 4> Uses;
5732 for (unsigned i = 0; i != Num; ++i) {
5733 unsigned FromResNo = From[i].getResNo();
5734 SDNode *FromNode = From[i].getNode();
5735 for (SDNode::use_iterator UI = FromNode->use_begin(),
5736 E = FromNode->use_end(); UI != E; ++UI) {
5737 SDUse &Use = UI.getUse();
5738 if (Use.getResNo() == FromResNo) {
5739 UseMemo Memo = { *UI, i, &Use };
5740 Uses.push_back(Memo);
5745 // Sort the uses, so that all the uses from a given User are together.
5746 std::sort(Uses.begin(), Uses.end());
5748 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5749 UseIndex != UseIndexEnd; ) {
5750 // We know that this user uses some value of From. If it is the right
5751 // value, update it.
5752 SDNode *User = Uses[UseIndex].User;
5754 // This node is about to morph, remove its old self from the CSE maps.
5755 RemoveNodeFromCSEMaps(User);
5757 // The Uses array is sorted, so all the uses for a given User
5758 // are next to each other in the list.
5759 // To help reduce the number of CSE recomputations, process all
5760 // the uses of this user that we can find this way.
5762 unsigned i = Uses[UseIndex].Index;
5763 SDUse &Use = *Uses[UseIndex].Use;
5767 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5769 // Now that we have modified User, add it back to the CSE maps. If it
5770 // already exists there, recursively merge the results together.
5771 AddModifiedNodeToCSEMaps(User);
5775 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5776 /// based on their topological order. It returns the maximum id and a vector
5777 /// of the SDNodes* in assigned order by reference.
5778 unsigned SelectionDAG::AssignTopologicalOrder() {
5780 unsigned DAGSize = 0;
5782 // SortedPos tracks the progress of the algorithm. Nodes before it are
5783 // sorted, nodes after it are unsorted. When the algorithm completes
5784 // it is at the end of the list.
5785 allnodes_iterator SortedPos = allnodes_begin();
5787 // Visit all the nodes. Move nodes with no operands to the front of
5788 // the list immediately. Annotate nodes that do have operands with their
5789 // operand count. Before we do this, the Node Id fields of the nodes
5790 // may contain arbitrary values. After, the Node Id fields for nodes
5791 // before SortedPos will contain the topological sort index, and the
5792 // Node Id fields for nodes At SortedPos and after will contain the
5793 // count of outstanding operands.
5794 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5797 unsigned Degree = N->getNumOperands();
5799 // A node with no uses, add it to the result array immediately.
5800 N->setNodeId(DAGSize++);
5801 allnodes_iterator Q = N;
5803 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5804 assert(SortedPos != AllNodes.end() && "Overran node list");
5807 // Temporarily use the Node Id as scratch space for the degree count.
5808 N->setNodeId(Degree);
5812 // Visit all the nodes. As we iterate, move nodes into sorted order,
5813 // such that by the time the end is reached all nodes will be sorted.
5814 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5817 // N is in sorted position, so all its uses have one less operand
5818 // that needs to be sorted.
5819 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5822 unsigned Degree = P->getNodeId();
5823 assert(Degree != 0 && "Invalid node degree");
5826 // All of P's operands are sorted, so P may sorted now.
5827 P->setNodeId(DAGSize++);
5829 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5830 assert(SortedPos != AllNodes.end() && "Overran node list");
5833 // Update P's outstanding operand count.
5834 P->setNodeId(Degree);
5837 if (I == SortedPos) {
5840 dbgs() << "Overran sorted position:\n";
5843 llvm_unreachable(0);
5847 assert(SortedPos == AllNodes.end() &&
5848 "Topological sort incomplete!");
5849 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5850 "First node in topological sort is not the entry token!");
5851 assert(AllNodes.front().getNodeId() == 0 &&
5852 "First node in topological sort has non-zero id!");
5853 assert(AllNodes.front().getNumOperands() == 0 &&
5854 "First node in topological sort has operands!");
5855 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5856 "Last node in topologic sort has unexpected id!");
5857 assert(AllNodes.back().use_empty() &&
5858 "Last node in topologic sort has users!");
5859 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5863 /// AssignOrdering - Assign an order to the SDNode.
5864 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5865 assert(SD && "Trying to assign an order to a null node!");
5866 Ordering->add(SD, Order);
5869 /// GetOrdering - Get the order for the SDNode.
5870 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5871 assert(SD && "Trying to get the order of a null node!");
5872 return Ordering->getOrder(SD);
5875 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5876 /// value is produced by SD.
5877 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5878 DbgInfo->add(DB, SD, isParameter);
5880 SD->setHasDebugValue(true);
5883 /// TransferDbgValues - Transfer SDDbgValues.
5884 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5885 if (From == To || !From.getNode()->getHasDebugValue())
5887 SDNode *FromNode = From.getNode();
5888 SDNode *ToNode = To.getNode();
5889 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5890 SmallVector<SDDbgValue *, 2> ClonedDVs;
5891 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5893 SDDbgValue *Dbg = *I;
5894 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5895 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5896 Dbg->getOffset(), Dbg->getDebugLoc(),
5898 ClonedDVs.push_back(Clone);
5901 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5902 E = ClonedDVs.end(); I != E; ++I)
5903 AddDbgValue(*I, ToNode, false);
5906 //===----------------------------------------------------------------------===//
5908 //===----------------------------------------------------------------------===//
5910 HandleSDNode::~HandleSDNode() {
5914 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5915 const GlobalValue *GA,
5916 EVT VT, int64_t o, unsigned char TF)
5917 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5921 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5922 MachineMemOperand *mmo)
5923 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5924 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5925 MMO->isNonTemporal(), MMO->isInvariant());
5926 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5927 assert(isNonTemporal() == MMO->isNonTemporal() &&
5928 "Non-temporal encoding error!");
5929 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5932 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5933 const SDValue *Ops, unsigned NumOps, EVT memvt,
5934 MachineMemOperand *mmo)
5935 : SDNode(Opc, dl, VTs, Ops, NumOps),
5936 MemoryVT(memvt), MMO(mmo) {
5937 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5938 MMO->isNonTemporal(), MMO->isInvariant());
5939 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5940 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5943 /// Profile - Gather unique data for the node.
5945 void SDNode::Profile(FoldingSetNodeID &ID) const {
5946 AddNodeIDNode(ID, this);
5951 std::vector<EVT> VTs;
5954 VTs.reserve(MVT::LAST_VALUETYPE);
5955 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5956 VTs.push_back(MVT((MVT::SimpleValueType)i));
5961 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5962 static ManagedStatic<EVTArray> SimpleVTArray;
5963 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5965 /// getValueTypeList - Return a pointer to the specified value type.
5967 const EVT *SDNode::getValueTypeList(EVT VT) {
5968 if (VT.isExtended()) {
5969 sys::SmartScopedLock<true> Lock(*VTMutex);
5970 return &(*EVTs->insert(VT).first);
5972 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5973 "Value type out of range!");
5974 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5978 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5979 /// indicated value. This method ignores uses of other values defined by this
5981 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5982 assert(Value < getNumValues() && "Bad value!");
5984 // TODO: Only iterate over uses of a given value of the node
5985 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5986 if (UI.getUse().getResNo() == Value) {
5993 // Found exactly the right number of uses?
5998 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5999 /// value. This method ignores uses of other values defined by this operation.
6000 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6001 assert(Value < getNumValues() && "Bad value!");
6003 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6004 if (UI.getUse().getResNo() == Value)
6011 /// isOnlyUserOf - Return true if this node is the only use of N.
6013 bool SDNode::isOnlyUserOf(SDNode *N) const {
6015 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6026 /// isOperand - Return true if this node is an operand of N.
6028 bool SDValue::isOperandOf(SDNode *N) const {
6029 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6030 if (*this == N->getOperand(i))
6035 bool SDNode::isOperandOf(SDNode *N) const {
6036 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6037 if (this == N->OperandList[i].getNode())
6042 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6043 /// be a chain) reaches the specified operand without crossing any
6044 /// side-effecting instructions on any chain path. In practice, this looks
6045 /// through token factors and non-volatile loads. In order to remain efficient,
6046 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6047 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6048 unsigned Depth) const {
6049 if (*this == Dest) return true;
6051 // Don't search too deeply, we just want to be able to see through
6052 // TokenFactor's etc.
6053 if (Depth == 0) return false;
6055 // If this is a token factor, all inputs to the TF happen in parallel. If any
6056 // of the operands of the TF does not reach dest, then we cannot do the xform.
6057 if (getOpcode() == ISD::TokenFactor) {
6058 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6059 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6064 // Loads don't have side effects, look through them.
6065 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6066 if (!Ld->isVolatile())
6067 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6072 /// hasPredecessor - Return true if N is a predecessor of this node.
6073 /// N is either an operand of this node, or can be reached by recursively
6074 /// traversing up the operands.
6075 /// NOTE: This is an expensive method. Use it carefully.
6076 bool SDNode::hasPredecessor(const SDNode *N) const {
6077 SmallPtrSet<const SDNode *, 32> Visited;
6078 SmallVector<const SDNode *, 16> Worklist;
6079 return hasPredecessorHelper(N, Visited, Worklist);
6082 bool SDNode::hasPredecessorHelper(const SDNode *N,
6083 SmallPtrSet<const SDNode *, 32> &Visited,
6084 SmallVector<const SDNode *, 16> &Worklist) const {
6085 if (Visited.empty()) {
6086 Worklist.push_back(this);
6088 // Take a look in the visited set. If we've already encountered this node
6089 // we needn't search further.
6090 if (Visited.count(N))
6094 // Haven't visited N yet. Continue the search.
6095 while (!Worklist.empty()) {
6096 const SDNode *M = Worklist.pop_back_val();
6097 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6098 SDNode *Op = M->getOperand(i).getNode();
6099 if (Visited.insert(Op))
6100 Worklist.push_back(Op);
6109 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6110 assert(Num < NumOperands && "Invalid child # of SDNode!");
6111 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6114 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6115 assert(N->getNumValues() == 1 &&
6116 "Can't unroll a vector with multiple results!");
6118 EVT VT = N->getValueType(0);
6119 unsigned NE = VT.getVectorNumElements();
6120 EVT EltVT = VT.getVectorElementType();
6121 DebugLoc dl = N->getDebugLoc();
6123 SmallVector<SDValue, 8> Scalars;
6124 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6126 // If ResNE is 0, fully unroll the vector op.
6129 else if (NE > ResNE)
6133 for (i= 0; i != NE; ++i) {
6134 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6135 SDValue Operand = N->getOperand(j);
6136 EVT OperandVT = Operand.getValueType();
6137 if (OperandVT.isVector()) {
6138 // A vector operand; extract a single element.
6139 EVT OperandEltVT = OperandVT.getVectorElementType();
6140 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6143 getConstant(i, TLI.getPointerTy()));
6145 // A scalar operand; just use it as is.
6146 Operands[j] = Operand;
6150 switch (N->getOpcode()) {
6152 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6153 &Operands[0], Operands.size()));
6156 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6157 &Operands[0], Operands.size()));
6164 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6165 getShiftAmountOperand(Operands[0].getValueType(),
6168 case ISD::SIGN_EXTEND_INREG:
6169 case ISD::FP_ROUND_INREG: {
6170 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6171 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6173 getValueType(ExtVT)));
6178 for (; i < ResNE; ++i)
6179 Scalars.push_back(getUNDEF(EltVT));
6181 return getNode(ISD::BUILD_VECTOR, dl,
6182 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6183 &Scalars[0], Scalars.size());
6187 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6188 /// location that is 'Dist' units away from the location that the 'Base' load
6189 /// is loading from.
6190 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6191 unsigned Bytes, int Dist) const {
6192 if (LD->getChain() != Base->getChain())
6194 EVT VT = LD->getValueType(0);
6195 if (VT.getSizeInBits() / 8 != Bytes)
6198 SDValue Loc = LD->getOperand(1);
6199 SDValue BaseLoc = Base->getOperand(1);
6200 if (Loc.getOpcode() == ISD::FrameIndex) {
6201 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6203 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6204 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6205 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6206 int FS = MFI->getObjectSize(FI);
6207 int BFS = MFI->getObjectSize(BFI);
6208 if (FS != BFS || FS != (int)Bytes) return false;
6209 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6213 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6214 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6217 const GlobalValue *GV1 = NULL;
6218 const GlobalValue *GV2 = NULL;
6219 int64_t Offset1 = 0;
6220 int64_t Offset2 = 0;
6221 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6222 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6223 if (isGA1 && isGA2 && GV1 == GV2)
6224 return Offset1 == (Offset2 + Dist*Bytes);
6229 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6230 /// it cannot be inferred.
6231 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6232 // If this is a GlobalAddress + cst, return the alignment.
6233 const GlobalValue *GV;
6234 int64_t GVOffset = 0;
6235 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6236 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6237 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6238 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6239 TLI.getDataLayout());
6240 unsigned AlignBits = KnownZero.countTrailingOnes();
6241 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6243 return MinAlign(Align, GVOffset);
6246 // If this is a direct reference to a stack slot, use information about the
6247 // stack slot's alignment.
6248 int FrameIdx = 1 << 31;
6249 int64_t FrameOffset = 0;
6250 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6251 FrameIdx = FI->getIndex();
6252 } else if (isBaseWithConstantOffset(Ptr) &&
6253 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6255 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6256 FrameOffset = Ptr.getConstantOperandVal(1);
6259 if (FrameIdx != (1 << 31)) {
6260 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6261 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6269 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6270 unsigned GlobalAddressSDNode::getAddressSpace() const {
6271 return getGlobal()->getType()->getAddressSpace();
6275 Type *ConstantPoolSDNode::getType() const {
6276 if (isMachineConstantPoolEntry())
6277 return Val.MachineCPVal->getType();
6278 return Val.ConstVal->getType();
6281 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6283 unsigned &SplatBitSize,
6285 unsigned MinSplatBits,
6287 EVT VT = getValueType(0);
6288 assert(VT.isVector() && "Expected a vector type");
6289 unsigned sz = VT.getSizeInBits();
6290 if (MinSplatBits > sz)
6293 SplatValue = APInt(sz, 0);
6294 SplatUndef = APInt(sz, 0);
6296 // Get the bits. Bits with undefined values (when the corresponding element
6297 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6298 // in SplatValue. If any of the values are not constant, give up and return
6300 unsigned int nOps = getNumOperands();
6301 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6302 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6304 for (unsigned j = 0; j < nOps; ++j) {
6305 unsigned i = isBigEndian ? nOps-1-j : j;
6306 SDValue OpVal = getOperand(i);
6307 unsigned BitPos = j * EltBitSize;
6309 if (OpVal.getOpcode() == ISD::UNDEF)
6310 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6311 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6312 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6313 zextOrTrunc(sz) << BitPos;
6314 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6315 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6320 // The build_vector is all constants or undefs. Find the smallest element
6321 // size that splats the vector.
6323 HasAnyUndefs = (SplatUndef != 0);
6326 unsigned HalfSize = sz / 2;
6327 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6328 APInt LowValue = SplatValue.trunc(HalfSize);
6329 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6330 APInt LowUndef = SplatUndef.trunc(HalfSize);
6332 // If the two halves do not match (ignoring undef bits), stop here.
6333 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6334 MinSplatBits > HalfSize)
6337 SplatValue = HighValue | LowValue;
6338 SplatUndef = HighUndef & LowUndef;
6347 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6348 // Find the first non-undef value in the shuffle mask.
6350 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6353 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6355 // Make sure all remaining elements are either undef or the same as the first
6357 for (int Idx = Mask[i]; i != e; ++i)
6358 if (Mask[i] >= 0 && Mask[i] != Idx)
6364 static void checkForCyclesHelper(const SDNode *N,
6365 SmallPtrSet<const SDNode*, 32> &Visited,
6366 SmallPtrSet<const SDNode*, 32> &Checked) {
6367 // If this node has already been checked, don't check it again.
6368 if (Checked.count(N))
6371 // If a node has already been visited on this depth-first walk, reject it as
6373 if (!Visited.insert(N)) {
6374 dbgs() << "Offending node:\n";
6376 errs() << "Detected cycle in SelectionDAG\n";
6380 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6381 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6388 void llvm::checkForCycles(const llvm::SDNode *N) {
6390 assert(N && "Checking nonexistant SDNode");
6391 SmallPtrSet<const SDNode*, 32> visited;
6392 SmallPtrSet<const SDNode*, 32> checked;
6393 checkForCyclesHelper(N, visited, checked);
6397 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6398 checkForCycles(DAG->getRoot().getNode());