1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
76 //===----------------------------------------------------------------------===//
77 // ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85 return getValueAPF().bitwiseIsEqual(V);
88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
90 assert(VT.isFloatingPoint() && "Can only convert between FP types");
92 // PPC long double cannot be converted to any other type.
93 if (VT == MVT::ppcf128 ||
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 // convert modifies in place, so make a copy.
98 APFloat Val2 = APFloat(Val);
100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112 // Look through a bit convert.
113 if (N->getOpcode() == ISD::BITCAST)
114 N = N->getOperand(0).getNode();
116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
118 unsigned i = 0, e = N->getNumOperands();
120 // Skip over all of the undef values.
121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 // Do not accept an all-undef vector.
125 if (i == e) return false;
127 // Do not accept build_vectors that aren't all constants or which have non-~0
128 // elements. We have to be a bit careful here, as the type of the constant
129 // may not be the same as the type of the vector elements due to type
130 // legalization (the elements are promoted to a legal type for the target and
131 // a vector of a type may be legal when the base element type is not).
132 // We only want to check enough bits to cover the vector elements, because
133 // we care if the resultant vector is all ones, not whether the individual
135 SDValue NotZero = N->getOperand(i);
136 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
137 if (isa<ConstantSDNode>(NotZero)) {
138 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() <
141 } else if (isa<ConstantFPSDNode>(NotZero)) {
142 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF()
143 .bitcastToAPInt().countTrailingOnes() < EltSize)
148 // Okay, we have at least one ~0 value, check to see if the rest match or are
149 // undefs. Even with the above element type twiddling, this should be OK, as
150 // the same type legalization should have applied to all the elements.
151 for (++i; i != e; ++i)
152 if (N->getOperand(i) != NotZero &&
153 N->getOperand(i).getOpcode() != ISD::UNDEF)
159 /// isBuildVectorAllZeros - Return true if the specified node is a
160 /// BUILD_VECTOR where all of the elements are 0 or undef.
161 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
162 // Look through a bit convert.
163 if (N->getOpcode() == ISD::BITCAST)
164 N = N->getOperand(0).getNode();
166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
168 unsigned i = 0, e = N->getNumOperands();
170 // Skip over all of the undef values.
171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
174 // Do not accept an all-undef vector.
175 if (i == e) return false;
177 // Do not accept build_vectors that aren't all constants or which have non-0
179 SDValue Zero = N->getOperand(i);
180 if (isa<ConstantSDNode>(Zero)) {
181 if (!cast<ConstantSDNode>(Zero)->isNullValue())
183 } else if (isa<ConstantFPSDNode>(Zero)) {
184 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
189 // Okay, we have at least one 0 value, check to see if the rest match or are
191 for (++i; i != e; ++i)
192 if (N->getOperand(i) != Zero &&
193 N->getOperand(i).getOpcode() != ISD::UNDEF)
198 /// isScalarToVector - Return true if the specified node is a
199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
200 /// element is not an undef.
201 bool ISD::isScalarToVector(const SDNode *N) {
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
205 if (N->getOpcode() != ISD::BUILD_VECTOR)
207 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
209 unsigned NumElems = N->getNumOperands();
212 for (unsigned i = 1; i < NumElems; ++i) {
213 SDValue V = N->getOperand(i);
214 if (V.getOpcode() != ISD::UNDEF)
220 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
221 /// when given the operation for (X op Y).
222 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
223 // To perform this operation, we just need to swap the L and G bits of the
225 unsigned OldL = (Operation >> 2) & 1;
226 unsigned OldG = (Operation >> 1) & 1;
227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
228 (OldL << 1) | // New G bit
229 (OldG << 2)); // New L bit.
232 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
233 /// 'op' is a valid SetCC operation.
234 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
235 unsigned Operation = Op;
237 Operation ^= 7; // Flip L, G, E bits, but not U.
239 Operation ^= 15; // Flip all of the condition bits.
241 if (Operation > ISD::SETTRUE2)
242 Operation &= ~8; // Don't let N and U bits get set.
244 return ISD::CondCode(Operation);
248 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
249 /// signed operation and 2 if the result is an unsigned comparison. Return zero
250 /// if the operation does not depend on the sign of the input (setne and seteq).
251 static int isSignedOp(ISD::CondCode Opcode) {
253 default: llvm_unreachable("Illegal integer setcc operation!");
255 case ISD::SETNE: return 0;
259 case ISD::SETGE: return 1;
263 case ISD::SETUGE: return 2;
267 /// getSetCCOrOperation - Return the result of a logical OR between different
268 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
269 /// returns SETCC_INVALID if it is not possible to represent the resultant
271 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
274 // Cannot fold a signed integer setcc with an unsigned integer setcc.
275 return ISD::SETCC_INVALID;
277 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
279 // If the N and U bits get set then the resultant comparison DOES suddenly
280 // care about orderedness, and is true when ordered.
281 if (Op > ISD::SETTRUE2)
282 Op &= ~16; // Clear the U bit if the N bit is set.
284 // Canonicalize illegal integer setcc's.
285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
288 return ISD::CondCode(Op);
291 /// getSetCCAndOperation - Return the result of a logical AND between different
292 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
293 /// function returns zero if it is not possible to represent the resultant
295 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
298 // Cannot fold a signed setcc with an unsigned setcc.
299 return ISD::SETCC_INVALID;
301 // Combine all of the condition bits.
302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
304 // Canonicalize illegal integer setcc's.
308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
309 case ISD::SETOEQ: // SETEQ & SETU[LG]E
310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
319 //===----------------------------------------------------------------------===//
320 // SDNode Profile Support
321 //===----------------------------------------------------------------------===//
323 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
325 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
329 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
330 /// solely with their pointer.
331 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
332 ID.AddPointer(VTList.VTs);
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDValue *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
347 static void AddNodeIDOperands(FoldingSetNodeID &ID,
348 const SDUse *Ops, unsigned NumOps) {
349 for (; NumOps; --NumOps, ++Ops) {
350 ID.AddPointer(Ops->getNode());
351 ID.AddInteger(Ops->getResNo());
355 static void AddNodeIDNode(FoldingSetNodeID &ID,
356 unsigned short OpC, SDVTList VTList,
357 const SDValue *OpList, unsigned N) {
358 AddNodeIDOpcode(ID, OpC);
359 AddNodeIDValueTypes(ID, VTList);
360 AddNodeIDOperands(ID, OpList, N);
363 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
365 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
366 switch (N->getOpcode()) {
367 case ISD::TargetExternalSymbol:
368 case ISD::ExternalSymbol:
369 llvm_unreachable("Should only be used on nodes with operands");
370 default: break; // Normal nodes don't need extra info.
371 case ISD::TargetConstant:
373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
375 case ISD::TargetConstantFP:
376 case ISD::ConstantFP: {
377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
380 case ISD::TargetGlobalAddress:
381 case ISD::GlobalAddress:
382 case ISD::TargetGlobalTLSAddress:
383 case ISD::GlobalTLSAddress: {
384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
385 ID.AddPointer(GA->getGlobal());
386 ID.AddInteger(GA->getOffset());
387 ID.AddInteger(GA->getTargetFlags());
390 case ISD::BasicBlock:
391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
396 case ISD::RegisterMask:
397 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
400 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
402 case ISD::FrameIndex:
403 case ISD::TargetFrameIndex:
404 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
407 case ISD::TargetJumpTable:
408 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
409 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
411 case ISD::ConstantPool:
412 case ISD::TargetConstantPool: {
413 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
414 ID.AddInteger(CP->getAlignment());
415 ID.AddInteger(CP->getOffset());
416 if (CP->isMachineConstantPoolEntry())
417 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
419 ID.AddPointer(CP->getConstVal());
420 ID.AddInteger(CP->getTargetFlags());
424 const LoadSDNode *LD = cast<LoadSDNode>(N);
425 ID.AddInteger(LD->getMemoryVT().getRawBits());
426 ID.AddInteger(LD->getRawSubclassData());
430 const StoreSDNode *ST = cast<StoreSDNode>(N);
431 ID.AddInteger(ST->getMemoryVT().getRawBits());
432 ID.AddInteger(ST->getRawSubclassData());
435 case ISD::ATOMIC_CMP_SWAP:
436 case ISD::ATOMIC_SWAP:
437 case ISD::ATOMIC_LOAD_ADD:
438 case ISD::ATOMIC_LOAD_SUB:
439 case ISD::ATOMIC_LOAD_AND:
440 case ISD::ATOMIC_LOAD_OR:
441 case ISD::ATOMIC_LOAD_XOR:
442 case ISD::ATOMIC_LOAD_NAND:
443 case ISD::ATOMIC_LOAD_MIN:
444 case ISD::ATOMIC_LOAD_MAX:
445 case ISD::ATOMIC_LOAD_UMIN:
446 case ISD::ATOMIC_LOAD_UMAX:
447 case ISD::ATOMIC_LOAD:
448 case ISD::ATOMIC_STORE: {
449 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
450 ID.AddInteger(AT->getMemoryVT().getRawBits());
451 ID.AddInteger(AT->getRawSubclassData());
454 case ISD::VECTOR_SHUFFLE: {
455 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
456 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
458 ID.AddInteger(SVN->getMaskElt(i));
461 case ISD::TargetBlockAddress:
462 case ISD::BlockAddress: {
463 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
464 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
467 } // end switch (N->getOpcode())
470 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
472 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
473 AddNodeIDOpcode(ID, N->getOpcode());
474 // Add the return value info.
475 AddNodeIDValueTypes(ID, N->getVTList());
476 // Add the operand info.
477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
479 // Handle SDNode leafs with special info.
480 AddNodeIDCustom(ID, N);
483 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
484 /// the CSE map that carries volatility, temporalness, indexing mode, and
485 /// extension/truncation information.
487 static inline unsigned
488 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
489 bool isNonTemporal, bool isInvariant) {
490 assert((ConvType & 3) == ConvType &&
491 "ConvType may not require more than 2 bits!");
492 assert((AM & 7) == AM &&
493 "AM may not require more than 3 bits!");
497 (isNonTemporal << 6) |
501 //===----------------------------------------------------------------------===//
502 // SelectionDAG Class
503 //===----------------------------------------------------------------------===//
505 /// doNotCSE - Return true if CSE should not be performed for this node.
506 static bool doNotCSE(SDNode *N) {
507 if (N->getValueType(0) == MVT::Glue)
508 return true; // Never CSE anything that produces a flag.
510 switch (N->getOpcode()) {
512 case ISD::HANDLENODE:
514 return true; // Never CSE these nodes.
517 // Check that remaining values produced are not flags.
518 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
519 if (N->getValueType(i) == MVT::Glue)
520 return true; // Never CSE anything that produces a flag.
525 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
527 void SelectionDAG::RemoveDeadNodes() {
528 // Create a dummy node (which is not added to allnodes), that adds a reference
529 // to the root node, preventing it from being deleted.
530 HandleSDNode Dummy(getRoot());
532 SmallVector<SDNode*, 128> DeadNodes;
534 // Add all obviously-dead nodes to the DeadNodes worklist.
535 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
537 DeadNodes.push_back(I);
539 RemoveDeadNodes(DeadNodes);
541 // If the root changed (e.g. it was a dead load, update the root).
542 setRoot(Dummy.getValue());
545 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
546 /// given list, and any nodes that become unreachable as a result.
547 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
548 DAGUpdateListener *UpdateListener) {
550 // Process the worklist, deleting the nodes and adding their uses to the
552 while (!DeadNodes.empty()) {
553 SDNode *N = DeadNodes.pop_back_val();
556 UpdateListener->NodeDeleted(N, 0);
558 // Take the node out of the appropriate CSE map.
559 RemoveNodeFromCSEMaps(N);
561 // Next, brutally remove the operand list. This is safe to do, as there are
562 // no cycles in the graph.
563 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
565 SDNode *Operand = Use.getNode();
568 // Now that we removed this operand, see if there are no uses of it left.
569 if (Operand->use_empty())
570 DeadNodes.push_back(Operand);
577 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
578 SmallVector<SDNode*, 16> DeadNodes(1, N);
580 // Create a dummy node that adds a reference to the root node, preventing
581 // it from being deleted. (This matters if the root is an operand of the
583 HandleSDNode Dummy(getRoot());
585 RemoveDeadNodes(DeadNodes, UpdateListener);
588 void SelectionDAG::DeleteNode(SDNode *N) {
589 // First take this out of the appropriate CSE map.
590 RemoveNodeFromCSEMaps(N);
592 // Finally, remove uses due to operands of this node, remove from the
593 // AllNodes list, and delete the node.
594 DeleteNodeNotInCSEMaps(N);
597 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
598 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
599 assert(N->use_empty() && "Cannot delete a node that is not dead!");
601 // Drop all of the operands and decrement used node's use counts.
607 void SelectionDAG::DeallocateNode(SDNode *N) {
608 if (N->OperandsNeedDelete)
609 delete[] N->OperandList;
611 // Set the opcode to DELETED_NODE to help catch bugs when node
612 // memory is reallocated.
613 N->NodeType = ISD::DELETED_NODE;
615 NodeAllocator.Deallocate(AllNodes.remove(N));
617 // Remove the ordering of this node.
620 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
621 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
622 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
623 DbgVals[i]->setIsInvalidated();
626 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
627 /// correspond to it. This is useful when we're about to delete or repurpose
628 /// the node. We don't want future request for structurally identical nodes
629 /// to return N anymore.
630 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
632 switch (N->getOpcode()) {
633 case ISD::HANDLENODE: return false; // noop.
635 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
636 "Cond code doesn't exist!");
637 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
638 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
640 case ISD::ExternalSymbol:
641 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
643 case ISD::TargetExternalSymbol: {
644 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
645 Erased = TargetExternalSymbols.erase(
646 std::pair<std::string,unsigned char>(ESN->getSymbol(),
647 ESN->getTargetFlags()));
650 case ISD::VALUETYPE: {
651 EVT VT = cast<VTSDNode>(N)->getVT();
652 if (VT.isExtended()) {
653 Erased = ExtendedValueTypeNodes.erase(VT);
655 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
656 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
661 // Remove it from the CSE Map.
662 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
663 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
664 Erased = CSEMap.RemoveNode(N);
668 // Verify that the node was actually in one of the CSE maps, unless it has a
669 // flag result (which cannot be CSE'd) or is one of the special cases that are
670 // not subject to CSE.
671 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
672 !N->isMachineOpcode() && !doNotCSE(N)) {
675 llvm_unreachable("Node is not in map!");
681 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
682 /// maps and modified in place. Add it back to the CSE maps, unless an identical
683 /// node already exists, in which case transfer all its users to the existing
684 /// node. This transfer can potentially trigger recursive merging.
687 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
688 DAGUpdateListener *UpdateListener) {
689 // For node types that aren't CSE'd, just act as if no identical node
692 SDNode *Existing = CSEMap.GetOrInsertNode(N);
694 // If there was already an existing matching node, use ReplaceAllUsesWith
695 // to replace the dead one with the existing one. This can cause
696 // recursive merging of other unrelated nodes down the line.
697 ReplaceAllUsesWith(N, Existing, UpdateListener);
699 // N is now dead. Inform the listener if it exists and delete it.
701 UpdateListener->NodeDeleted(N, Existing);
702 DeleteNodeNotInCSEMaps(N);
707 // If the node doesn't already exist, we updated it. Inform a listener if
710 UpdateListener->NodeUpdated(N);
713 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
714 /// were replaced with those specified. If this node is never memoized,
715 /// return null, otherwise return a pointer to the slot it would take. If a
716 /// node already exists with these operands, the slot will be non-null.
717 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
722 SDValue Ops[] = { Op };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
730 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
731 /// were replaced with those specified. If this node is never memoized,
732 /// return null, otherwise return a pointer to the slot it would take. If a
733 /// node already exists with these operands, the slot will be non-null.
734 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
735 SDValue Op1, SDValue Op2,
740 SDValue Ops[] = { Op1, Op2 };
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
750 /// were replaced with those specified. If this node is never memoized,
751 /// return null, otherwise return a pointer to the slot it would take. If a
752 /// node already exists with these operands, the slot will be non-null.
753 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
754 const SDValue *Ops,unsigned NumOps,
760 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
761 AddNodeIDCustom(ID, N);
762 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
767 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
768 static void VerifyNodeCommon(SDNode *N) {
769 switch (N->getOpcode()) {
772 case ISD::BUILD_PAIR: {
773 EVT VT = N->getValueType(0);
774 assert(N->getNumValues() == 1 && "Too many results!");
775 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
776 "Wrong return type!");
777 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
778 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
779 "Mismatched operand types!");
780 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
781 "Wrong operand type!");
782 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
783 "Wrong return type size");
786 case ISD::BUILD_VECTOR: {
787 assert(N->getNumValues() == 1 && "Too many results!");
788 assert(N->getValueType(0).isVector() && "Wrong return type!");
789 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
790 "Wrong number of operands!");
791 EVT EltVT = N->getValueType(0).getVectorElementType();
792 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
793 assert((I->getValueType() == EltVT ||
794 (EltVT.isInteger() && I->getValueType().isInteger() &&
795 EltVT.bitsLE(I->getValueType()))) &&
796 "Wrong operand type!");
797 assert(I->getValueType() == N->getOperand(0).getValueType() &&
798 "Operands must all have the same type");
805 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
806 static void VerifySDNode(SDNode *N) {
807 // The SDNode allocators cannot be used to allocate nodes with fields that are
808 // not present in an SDNode!
809 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
810 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
811 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
812 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
813 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
814 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
815 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
816 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
817 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
818 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
819 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
820 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
821 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
822 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
823 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
824 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
825 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
826 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
827 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
832 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
834 static void VerifyMachineNode(SDNode *N) {
835 // The MachineNode allocators cannot be used to allocate nodes with fields
836 // that are not present in a MachineNode!
837 // Currently there are no such nodes.
843 /// getEVTAlignment - Compute the default alignment value for the
846 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
847 Type *Ty = VT == MVT::iPTR ?
848 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
849 VT.getTypeForEVT(*getContext());
851 return TLI.getTargetData()->getABITypeAlignment(Ty);
854 // EntryNode could meaningfully have debug info if we can find it...
855 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
856 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
857 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
858 Root(getEntryNode()), Ordering(0) {
859 AllNodes.push_back(&EntryNode);
860 Ordering = new SDNodeOrdering();
861 DbgInfo = new SDDbgInfo();
864 void SelectionDAG::init(MachineFunction &mf) {
866 Context = &mf.getFunction()->getContext();
869 SelectionDAG::~SelectionDAG() {
875 void SelectionDAG::allnodes_clear() {
876 assert(&*AllNodes.begin() == &EntryNode);
877 AllNodes.remove(AllNodes.begin());
878 while (!AllNodes.empty())
879 DeallocateNode(AllNodes.begin());
882 void SelectionDAG::clear() {
884 OperandAllocator.Reset();
887 ExtendedValueTypeNodes.clear();
888 ExternalSymbols.clear();
889 TargetExternalSymbols.clear();
890 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
891 static_cast<CondCodeSDNode*>(0));
892 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
893 static_cast<SDNode*>(0));
895 EntryNode.UseList = 0;
896 AllNodes.push_back(&EntryNode);
897 Root = getEntryNode();
902 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
903 return VT.bitsGT(Op.getValueType()) ?
904 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
905 getNode(ISD::TRUNCATE, DL, VT, Op);
908 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
909 return VT.bitsGT(Op.getValueType()) ?
910 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
911 getNode(ISD::TRUNCATE, DL, VT, Op);
914 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
915 return VT.bitsGT(Op.getValueType()) ?
916 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
917 getNode(ISD::TRUNCATE, DL, VT, Op);
920 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
921 assert(!VT.isVector() &&
922 "getZeroExtendInReg should use the vector element type instead of "
924 if (Op.getValueType() == VT) return Op;
925 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
926 APInt Imm = APInt::getLowBitsSet(BitWidth,
928 return getNode(ISD::AND, DL, Op.getValueType(), Op,
929 getConstant(Imm, Op.getValueType()));
932 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
934 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
935 EVT EltVT = VT.getScalarType();
937 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
938 return getNode(ISD::XOR, DL, VT, Val, NegOne);
941 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
942 EVT EltVT = VT.getScalarType();
943 assert((EltVT.getSizeInBits() >= 64 ||
944 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
945 "getConstant with a uint64_t value that doesn't fit in the type!");
946 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
949 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
950 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
953 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
954 assert(VT.isInteger() && "Cannot create FP integer constant!");
956 EVT EltVT = VT.getScalarType();
957 const ConstantInt *Elt = &Val;
959 // In some cases the vector type is legal but the element type is illegal and
960 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
961 // inserted value (the type does not need to match the vector element type).
962 // Any extra bits introduced will be truncated away.
963 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
964 TargetLowering::TypePromoteInteger) {
965 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
966 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
967 Elt = ConstantInt::get(*getContext(), NewVal);
970 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
971 "APInt size does not match type size!");
972 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
974 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
978 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
980 return SDValue(N, 0);
983 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
984 CSEMap.InsertNode(N, IP);
985 AllNodes.push_back(N);
988 SDValue Result(N, 0);
990 SmallVector<SDValue, 8> Ops;
991 Ops.assign(VT.getVectorNumElements(), Result);
992 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
997 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
998 return getConstant(Val, TLI.getPointerTy(), isTarget);
1002 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1003 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1006 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1007 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1009 EVT EltVT = VT.getScalarType();
1011 // Do the map lookup using the actual bit pattern for the floating point
1012 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1013 // we don't have issues with SNANs.
1014 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1015 FoldingSetNodeID ID;
1016 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1020 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1022 return SDValue(N, 0);
1025 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1026 CSEMap.InsertNode(N, IP);
1027 AllNodes.push_back(N);
1030 SDValue Result(N, 0);
1031 if (VT.isVector()) {
1032 SmallVector<SDValue, 8> Ops;
1033 Ops.assign(VT.getVectorNumElements(), Result);
1034 // FIXME DebugLoc info might be appropriate here
1035 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1040 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1041 EVT EltVT = VT.getScalarType();
1042 if (EltVT==MVT::f32)
1043 return getConstantFP(APFloat((float)Val), VT, isTarget);
1044 else if (EltVT==MVT::f64)
1045 return getConstantFP(APFloat(Val), VT, isTarget);
1046 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1048 APFloat apf = APFloat(Val);
1049 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1051 return getConstantFP(apf, VT, isTarget);
1053 llvm_unreachable("Unsupported type in getConstantFP");
1056 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1057 EVT VT, int64_t Offset,
1059 unsigned char TargetFlags) {
1060 assert((TargetFlags == 0 || isTargetGA) &&
1061 "Cannot set target flags on target-independent globals");
1063 // Truncate (with sign-extension) the offset value to the pointer size.
1064 EVT PTy = TLI.getPointerTy();
1065 unsigned BitWidth = PTy.getSizeInBits();
1067 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1069 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1071 // If GV is an alias then use the aliasee for determining thread-localness.
1072 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1073 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1077 if (GVar && GVar->isThreadLocal())
1078 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1080 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1082 FoldingSetNodeID ID;
1083 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1085 ID.AddInteger(Offset);
1086 ID.AddInteger(TargetFlags);
1088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1089 return SDValue(E, 0);
1091 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1092 Offset, TargetFlags);
1093 CSEMap.InsertNode(N, IP);
1094 AllNodes.push_back(N);
1095 return SDValue(N, 0);
1098 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1099 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1100 FoldingSetNodeID ID;
1101 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1104 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1105 return SDValue(E, 0);
1107 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1108 CSEMap.InsertNode(N, IP);
1109 AllNodes.push_back(N);
1110 return SDValue(N, 0);
1113 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1114 unsigned char TargetFlags) {
1115 assert((TargetFlags == 0 || isTarget) &&
1116 "Cannot set target flags on target-independent jump tables");
1117 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1118 FoldingSetNodeID ID;
1119 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1121 ID.AddInteger(TargetFlags);
1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1124 return SDValue(E, 0);
1126 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1128 CSEMap.InsertNode(N, IP);
1129 AllNodes.push_back(N);
1130 return SDValue(N, 0);
1133 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1134 unsigned Alignment, int Offset,
1136 unsigned char TargetFlags) {
1137 assert((TargetFlags == 0 || isTarget) &&
1138 "Cannot set target flags on target-independent globals");
1140 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1141 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1142 FoldingSetNodeID ID;
1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1144 ID.AddInteger(Alignment);
1145 ID.AddInteger(Offset);
1147 ID.AddInteger(TargetFlags);
1149 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1150 return SDValue(E, 0);
1152 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1153 Alignment, TargetFlags);
1154 CSEMap.InsertNode(N, IP);
1155 AllNodes.push_back(N);
1156 return SDValue(N, 0);
1160 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1161 unsigned Alignment, int Offset,
1163 unsigned char TargetFlags) {
1164 assert((TargetFlags == 0 || isTarget) &&
1165 "Cannot set target flags on target-independent globals");
1167 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1168 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1169 FoldingSetNodeID ID;
1170 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1171 ID.AddInteger(Alignment);
1172 ID.AddInteger(Offset);
1173 C->addSelectionDAGCSEId(ID);
1174 ID.AddInteger(TargetFlags);
1176 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1177 return SDValue(E, 0);
1179 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1180 Alignment, TargetFlags);
1181 CSEMap.InsertNode(N, IP);
1182 AllNodes.push_back(N);
1183 return SDValue(N, 0);
1186 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1187 FoldingSetNodeID ID;
1188 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1192 return SDValue(E, 0);
1194 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1195 CSEMap.InsertNode(N, IP);
1196 AllNodes.push_back(N);
1197 return SDValue(N, 0);
1200 SDValue SelectionDAG::getValueType(EVT VT) {
1201 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1202 ValueTypeNodes.size())
1203 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1205 SDNode *&N = VT.isExtended() ?
1206 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1208 if (N) return SDValue(N, 0);
1209 N = new (NodeAllocator) VTSDNode(VT);
1210 AllNodes.push_back(N);
1211 return SDValue(N, 0);
1214 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1215 SDNode *&N = ExternalSymbols[Sym];
1216 if (N) return SDValue(N, 0);
1217 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1218 AllNodes.push_back(N);
1219 return SDValue(N, 0);
1222 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1223 unsigned char TargetFlags) {
1225 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1227 if (N) return SDValue(N, 0);
1228 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1229 AllNodes.push_back(N);
1230 return SDValue(N, 0);
1233 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1234 if ((unsigned)Cond >= CondCodeNodes.size())
1235 CondCodeNodes.resize(Cond+1);
1237 if (CondCodeNodes[Cond] == 0) {
1238 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1239 CondCodeNodes[Cond] = N;
1240 AllNodes.push_back(N);
1243 return SDValue(CondCodeNodes[Cond], 0);
1246 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1247 // the shuffle mask M that point at N1 to point at N2, and indices that point
1248 // N2 to point at N1.
1249 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1251 int NElts = M.size();
1252 for (int i = 0; i != NElts; ++i) {
1260 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1261 SDValue N2, const int *Mask) {
1262 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1263 assert(VT.isVector() && N1.getValueType().isVector() &&
1264 "Vector Shuffle VTs must be a vectors");
1265 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1266 && "Vector Shuffle VTs must have same element type");
1268 // Canonicalize shuffle undef, undef -> undef
1269 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1270 return getUNDEF(VT);
1272 // Validate that all indices in Mask are within the range of the elements
1273 // input to the shuffle.
1274 unsigned NElts = VT.getVectorNumElements();
1275 SmallVector<int, 8> MaskVec;
1276 for (unsigned i = 0; i != NElts; ++i) {
1277 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1278 MaskVec.push_back(Mask[i]);
1281 // Canonicalize shuffle v, v -> v, undef
1284 for (unsigned i = 0; i != NElts; ++i)
1285 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1288 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1289 if (N1.getOpcode() == ISD::UNDEF)
1290 commuteShuffle(N1, N2, MaskVec);
1292 // Canonicalize all index into lhs, -> shuffle lhs, undef
1293 // Canonicalize all index into rhs, -> shuffle rhs, undef
1294 bool AllLHS = true, AllRHS = true;
1295 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1296 for (unsigned i = 0; i != NElts; ++i) {
1297 if (MaskVec[i] >= (int)NElts) {
1302 } else if (MaskVec[i] >= 0) {
1306 if (AllLHS && AllRHS)
1307 return getUNDEF(VT);
1308 if (AllLHS && !N2Undef)
1312 commuteShuffle(N1, N2, MaskVec);
1315 // If Identity shuffle, or all shuffle in to undef, return that node.
1316 bool AllUndef = true;
1317 bool Identity = true;
1318 for (unsigned i = 0; i != NElts; ++i) {
1319 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1320 if (MaskVec[i] >= 0) AllUndef = false;
1322 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1325 return getUNDEF(VT);
1327 FoldingSetNodeID ID;
1328 SDValue Ops[2] = { N1, N2 };
1329 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1330 for (unsigned i = 0; i != NElts; ++i)
1331 ID.AddInteger(MaskVec[i]);
1334 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1335 return SDValue(E, 0);
1337 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1338 // SDNode doesn't have access to it. This memory will be "leaked" when
1339 // the node is deallocated, but recovered when the NodeAllocator is released.
1340 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1341 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1343 ShuffleVectorSDNode *N =
1344 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1345 CSEMap.InsertNode(N, IP);
1346 AllNodes.push_back(N);
1347 return SDValue(N, 0);
1350 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1351 SDValue Val, SDValue DTy,
1352 SDValue STy, SDValue Rnd, SDValue Sat,
1353 ISD::CvtCode Code) {
1354 // If the src and dest types are the same and the conversion is between
1355 // integer types of the same sign or two floats, no conversion is necessary.
1357 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1360 FoldingSetNodeID ID;
1361 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1362 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1365 return SDValue(E, 0);
1367 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1369 CSEMap.InsertNode(N, IP);
1370 AllNodes.push_back(N);
1371 return SDValue(N, 0);
1374 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1375 FoldingSetNodeID ID;
1376 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1377 ID.AddInteger(RegNo);
1379 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1380 return SDValue(E, 0);
1382 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1383 CSEMap.InsertNode(N, IP);
1384 AllNodes.push_back(N);
1385 return SDValue(N, 0);
1388 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1389 FoldingSetNodeID ID;
1390 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1391 ID.AddPointer(RegMask);
1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1394 return SDValue(E, 0);
1396 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1397 CSEMap.InsertNode(N, IP);
1398 AllNodes.push_back(N);
1399 return SDValue(N, 0);
1402 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1403 FoldingSetNodeID ID;
1404 SDValue Ops[] = { Root };
1405 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1406 ID.AddPointer(Label);
1408 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1409 return SDValue(E, 0);
1411 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1412 CSEMap.InsertNode(N, IP);
1413 AllNodes.push_back(N);
1414 return SDValue(N, 0);
1418 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1420 unsigned char TargetFlags) {
1421 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1423 FoldingSetNodeID ID;
1424 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1426 ID.AddInteger(TargetFlags);
1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1429 return SDValue(E, 0);
1431 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1432 CSEMap.InsertNode(N, IP);
1433 AllNodes.push_back(N);
1434 return SDValue(N, 0);
1437 SDValue SelectionDAG::getSrcValue(const Value *V) {
1438 assert((!V || V->getType()->isPointerTy()) &&
1439 "SrcValue is not a pointer?");
1441 FoldingSetNodeID ID;
1442 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1446 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1447 return SDValue(E, 0);
1449 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1450 CSEMap.InsertNode(N, IP);
1451 AllNodes.push_back(N);
1452 return SDValue(N, 0);
1455 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1456 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1457 FoldingSetNodeID ID;
1458 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1463 return SDValue(E, 0);
1465 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1466 CSEMap.InsertNode(N, IP);
1467 AllNodes.push_back(N);
1468 return SDValue(N, 0);
1472 /// getShiftAmountOperand - Return the specified value casted to
1473 /// the target's desired shift amount type.
1474 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1475 EVT OpTy = Op.getValueType();
1476 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1477 if (OpTy == ShTy || OpTy.isVector()) return Op;
1479 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1480 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1483 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1484 /// specified value type.
1485 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1486 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1487 unsigned ByteSize = VT.getStoreSize();
1488 Type *Ty = VT.getTypeForEVT(*getContext());
1489 unsigned StackAlign =
1490 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1492 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1493 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1496 /// CreateStackTemporary - Create a stack temporary suitable for holding
1497 /// either of the specified value types.
1498 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1499 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1500 VT2.getStoreSizeInBits())/8;
1501 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1502 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1503 const TargetData *TD = TLI.getTargetData();
1504 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1505 TD->getPrefTypeAlignment(Ty2));
1507 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1508 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1509 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1512 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1513 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1514 // These setcc operations always fold.
1518 case ISD::SETFALSE2: return getConstant(0, VT);
1520 case ISD::SETTRUE2: return getConstant(1, VT);
1532 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1536 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1537 const APInt &C2 = N2C->getAPIntValue();
1538 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1539 const APInt &C1 = N1C->getAPIntValue();
1542 default: llvm_unreachable("Unknown integer setcc!");
1543 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1544 case ISD::SETNE: return getConstant(C1 != C2, VT);
1545 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1546 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1547 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1548 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1549 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1550 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1551 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1552 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1556 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1557 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1558 // No compile time operations on this type yet.
1559 if (N1C->getValueType(0) == MVT::ppcf128)
1562 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1565 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1566 return getUNDEF(VT);
1568 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1569 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1570 return getUNDEF(VT);
1572 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1573 R==APFloat::cmpLessThan, VT);
1574 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1575 return getUNDEF(VT);
1577 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1578 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1579 return getUNDEF(VT);
1581 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1582 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1583 return getUNDEF(VT);
1585 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1586 R==APFloat::cmpEqual, VT);
1587 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1588 return getUNDEF(VT);
1590 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1591 R==APFloat::cmpEqual, VT);
1592 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1593 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1594 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1595 R==APFloat::cmpEqual, VT);
1596 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1597 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1598 R==APFloat::cmpLessThan, VT);
1599 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1600 R==APFloat::cmpUnordered, VT);
1601 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1602 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1605 // Ensure that the constant occurs on the RHS.
1606 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1610 // Could not fold it.
1614 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1615 /// use this predicate to simplify operations downstream.
1616 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1617 // This predicate is not safe for vector operations.
1618 if (Op.getValueType().isVector())
1621 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1622 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1625 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1626 /// this predicate to simplify operations downstream. Mask is known to be zero
1627 /// for bits that V cannot have.
1628 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1629 unsigned Depth) const {
1630 APInt KnownZero, KnownOne;
1631 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1632 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1633 return (KnownZero & Mask) == Mask;
1636 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1637 /// known to be either zero or one and return them in the KnownZero/KnownOne
1638 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1640 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1641 APInt &KnownOne, unsigned Depth) const {
1642 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1644 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1646 return; // Limit search depth.
1648 APInt KnownZero2, KnownOne2;
1650 switch (Op.getOpcode()) {
1652 // We know all of the bits for a constant!
1653 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1654 KnownZero = ~KnownOne;
1657 // If either the LHS or the RHS are Zero, the result is zero.
1658 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1659 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1660 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1661 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1663 // Output known-1 bits are only known if set in both the LHS & RHS.
1664 KnownOne &= KnownOne2;
1665 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1666 KnownZero |= KnownZero2;
1669 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1670 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1671 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1672 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1674 // Output known-0 bits are only known if clear in both the LHS & RHS.
1675 KnownZero &= KnownZero2;
1676 // Output known-1 are known to be set if set in either the LHS | RHS.
1677 KnownOne |= KnownOne2;
1680 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1681 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1685 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1686 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1687 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1688 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1689 KnownZero = KnownZeroOut;
1693 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1694 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1698 // If low bits are zero in either operand, output low known-0 bits.
1699 // Also compute a conserative estimate for high known-0 bits.
1700 // More trickiness is possible, but this is sufficient for the
1701 // interesting case of alignment computation.
1702 KnownOne.clearAllBits();
1703 unsigned TrailZ = KnownZero.countTrailingOnes() +
1704 KnownZero2.countTrailingOnes();
1705 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1706 KnownZero2.countLeadingOnes(),
1707 BitWidth) - BitWidth;
1709 TrailZ = std::min(TrailZ, BitWidth);
1710 LeadZ = std::min(LeadZ, BitWidth);
1711 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1712 APInt::getHighBitsSet(BitWidth, LeadZ);
1716 // For the purposes of computing leading zeros we can conservatively
1717 // treat a udiv as a logical right shift by the power of 2 known to
1718 // be less than the denominator.
1719 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1720 unsigned LeadZ = KnownZero2.countLeadingOnes();
1722 KnownOne2.clearAllBits();
1723 KnownZero2.clearAllBits();
1724 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1725 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1726 if (RHSUnknownLeadingOnes != BitWidth)
1727 LeadZ = std::min(BitWidth,
1728 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1730 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1734 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1735 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1739 // Only known if known in both the LHS and RHS.
1740 KnownOne &= KnownOne2;
1741 KnownZero &= KnownZero2;
1743 case ISD::SELECT_CC:
1744 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1745 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1746 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1747 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1749 // Only known if known in both the LHS and RHS.
1750 KnownOne &= KnownOne2;
1751 KnownZero &= KnownZero2;
1759 if (Op.getResNo() != 1)
1761 // The boolean result conforms to getBooleanContents. Fall through.
1763 // If we know the result of a setcc has the top bits zero, use this info.
1764 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1765 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1766 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1769 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1770 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1771 unsigned ShAmt = SA->getZExtValue();
1773 // If the shift count is an invalid immediate, don't do anything.
1774 if (ShAmt >= BitWidth)
1777 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1778 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1779 KnownZero <<= ShAmt;
1781 // low bits known zero.
1782 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1786 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1787 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1788 unsigned ShAmt = SA->getZExtValue();
1790 // If the shift count is an invalid immediate, don't do anything.
1791 if (ShAmt >= BitWidth)
1794 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1795 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1796 KnownZero = KnownZero.lshr(ShAmt);
1797 KnownOne = KnownOne.lshr(ShAmt);
1799 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1800 KnownZero |= HighBits; // High bits known zero.
1804 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1805 unsigned ShAmt = SA->getZExtValue();
1807 // If the shift count is an invalid immediate, don't do anything.
1808 if (ShAmt >= BitWidth)
1811 // If any of the demanded bits are produced by the sign extension, we also
1812 // demand the input sign bit.
1813 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1815 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1816 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1817 KnownZero = KnownZero.lshr(ShAmt);
1818 KnownOne = KnownOne.lshr(ShAmt);
1820 // Handle the sign bits.
1821 APInt SignBit = APInt::getSignBit(BitWidth);
1822 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1824 if (KnownZero.intersects(SignBit)) {
1825 KnownZero |= HighBits; // New bits are known zero.
1826 } else if (KnownOne.intersects(SignBit)) {
1827 KnownOne |= HighBits; // New bits are known one.
1831 case ISD::SIGN_EXTEND_INREG: {
1832 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1833 unsigned EBits = EVT.getScalarType().getSizeInBits();
1835 // Sign extension. Compute the demanded bits in the result that are not
1836 // present in the input.
1837 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1839 APInt InSignBit = APInt::getSignBit(EBits);
1840 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1842 // If the sign extended bits are demanded, we know that the sign
1844 InSignBit = InSignBit.zext(BitWidth);
1845 if (NewBits.getBoolValue())
1846 InputDemandedBits |= InSignBit;
1848 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1849 KnownOne &= InputDemandedBits;
1850 KnownZero &= InputDemandedBits;
1851 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1853 // If the sign bit of the input is known set or clear, then we know the
1854 // top bits of the result.
1855 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1856 KnownZero |= NewBits;
1857 KnownOne &= ~NewBits;
1858 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1859 KnownOne |= NewBits;
1860 KnownZero &= ~NewBits;
1861 } else { // Input sign bit unknown
1862 KnownZero &= ~NewBits;
1863 KnownOne &= ~NewBits;
1868 case ISD::CTTZ_ZERO_UNDEF:
1870 case ISD::CTLZ_ZERO_UNDEF:
1872 unsigned LowBits = Log2_32(BitWidth)+1;
1873 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1874 KnownOne.clearAllBits();
1878 LoadSDNode *LD = cast<LoadSDNode>(Op);
1879 if (ISD::isZEXTLoad(Op.getNode())) {
1880 EVT VT = LD->getMemoryVT();
1881 unsigned MemBits = VT.getScalarType().getSizeInBits();
1882 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1883 } else if (const MDNode *Ranges = LD->getRanges()) {
1884 computeMaskedBitsLoad(*Ranges, KnownZero);
1888 case ISD::ZERO_EXTEND: {
1889 EVT InVT = Op.getOperand(0).getValueType();
1890 unsigned InBits = InVT.getScalarType().getSizeInBits();
1891 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1892 KnownZero = KnownZero.trunc(InBits);
1893 KnownOne = KnownOne.trunc(InBits);
1894 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1895 KnownZero = KnownZero.zext(BitWidth);
1896 KnownOne = KnownOne.zext(BitWidth);
1897 KnownZero |= NewBits;
1900 case ISD::SIGN_EXTEND: {
1901 EVT InVT = Op.getOperand(0).getValueType();
1902 unsigned InBits = InVT.getScalarType().getSizeInBits();
1903 APInt InSignBit = APInt::getSignBit(InBits);
1904 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1906 KnownZero = KnownZero.trunc(InBits);
1907 KnownOne = KnownOne.trunc(InBits);
1908 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1910 // Note if the sign bit is known to be zero or one.
1911 bool SignBitKnownZero = KnownZero.isNegative();
1912 bool SignBitKnownOne = KnownOne.isNegative();
1913 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1914 "Sign bit can't be known to be both zero and one!");
1916 KnownZero = KnownZero.zext(BitWidth);
1917 KnownOne = KnownOne.zext(BitWidth);
1919 // If the sign bit is known zero or one, the top bits match.
1920 if (SignBitKnownZero)
1921 KnownZero |= NewBits;
1922 else if (SignBitKnownOne)
1923 KnownOne |= NewBits;
1926 case ISD::ANY_EXTEND: {
1927 EVT InVT = Op.getOperand(0).getValueType();
1928 unsigned InBits = InVT.getScalarType().getSizeInBits();
1929 KnownZero = KnownZero.trunc(InBits);
1930 KnownOne = KnownOne.trunc(InBits);
1931 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1932 KnownZero = KnownZero.zext(BitWidth);
1933 KnownOne = KnownOne.zext(BitWidth);
1936 case ISD::TRUNCATE: {
1937 EVT InVT = Op.getOperand(0).getValueType();
1938 unsigned InBits = InVT.getScalarType().getSizeInBits();
1939 KnownZero = KnownZero.zext(InBits);
1940 KnownOne = KnownOne.zext(InBits);
1941 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1942 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1943 KnownZero = KnownZero.trunc(BitWidth);
1944 KnownOne = KnownOne.trunc(BitWidth);
1947 case ISD::AssertZext: {
1948 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1949 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1950 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1951 KnownZero |= (~InMask);
1955 // All bits are zero except the low bit.
1956 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1960 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1961 // We know that the top bits of C-X are clear if X contains less bits
1962 // than C (i.e. no wrap-around can happen). For example, 20-X is
1963 // positive if we can prove that X is >= 0 and < 16.
1964 if (CLHS->getAPIntValue().isNonNegative()) {
1965 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1966 // NLZ can't be BitWidth with no sign bit
1967 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1968 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1970 // If all of the MaskV bits are known to be zero, then we know the
1971 // output top bits are zero, because we now know that the output is
1973 if ((KnownZero2 & MaskV) == MaskV) {
1974 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1975 // Top bits known zero.
1976 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
1984 // Output known-0 bits are known if clear or set in both the low clear bits
1985 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1986 // low 3 bits clear.
1987 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1988 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1989 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1991 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1992 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1993 KnownZeroOut = std::min(KnownZeroOut,
1994 KnownZero2.countTrailingOnes());
1996 if (Op.getOpcode() == ISD::ADD) {
1997 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2001 // With ADDE, a carry bit may be added in, so we can only use this
2002 // information if we know (at least) that the low two bits are clear. We
2003 // then return to the caller that the low bit is unknown but that other bits
2005 if (KnownZeroOut >= 2) // ADDE
2006 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2010 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2011 const APInt &RA = Rem->getAPIntValue().abs();
2012 if (RA.isPowerOf2()) {
2013 APInt LowBits = RA - 1;
2014 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2015 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2017 // The low bits of the first operand are unchanged by the srem.
2018 KnownZero = KnownZero2 & LowBits;
2019 KnownOne = KnownOne2 & LowBits;
2021 // If the first operand is non-negative or has all low bits zero, then
2022 // the upper bits are all zero.
2023 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2024 KnownZero |= ~LowBits;
2026 // If the first operand is negative and not all low bits are zero, then
2027 // the upper bits are all one.
2028 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2029 KnownOne |= ~LowBits;
2030 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2035 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2036 const APInt &RA = Rem->getAPIntValue();
2037 if (RA.isPowerOf2()) {
2038 APInt LowBits = (RA - 1);
2039 KnownZero |= ~LowBits;
2040 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2041 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2046 // Since the result is less than or equal to either operand, any leading
2047 // zero bits in either operand must also exist in the result.
2048 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2049 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2051 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2052 KnownZero2.countLeadingOnes());
2053 KnownOne.clearAllBits();
2054 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2057 case ISD::FrameIndex:
2058 case ISD::TargetFrameIndex:
2059 if (unsigned Align = InferPtrAlignment(Op)) {
2060 // The low bits are known zero if the pointer is aligned.
2061 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2067 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2070 case ISD::INTRINSIC_WO_CHAIN:
2071 case ISD::INTRINSIC_W_CHAIN:
2072 case ISD::INTRINSIC_VOID:
2073 // Allow the target to implement this method for its nodes.
2074 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2079 /// ComputeNumSignBits - Return the number of times the sign bit of the
2080 /// register is replicated into the other bits. We know that at least 1 bit
2081 /// is always equal to the sign bit (itself), but other cases can give us
2082 /// information. For example, immediately after an "SRA X, 2", we know that
2083 /// the top 3 bits are all equal to each other, so we return 3.
2084 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2085 EVT VT = Op.getValueType();
2086 assert(VT.isInteger() && "Invalid VT!");
2087 unsigned VTBits = VT.getScalarType().getSizeInBits();
2089 unsigned FirstAnswer = 1;
2092 return 1; // Limit search depth.
2094 switch (Op.getOpcode()) {
2096 case ISD::AssertSext:
2097 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2098 return VTBits-Tmp+1;
2099 case ISD::AssertZext:
2100 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2103 case ISD::Constant: {
2104 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2105 return Val.getNumSignBits();
2108 case ISD::SIGN_EXTEND:
2109 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2110 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2112 case ISD::SIGN_EXTEND_INREG:
2113 // Max of the input and what this extends.
2115 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2118 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2119 return std::max(Tmp, Tmp2);
2122 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2123 // SRA X, C -> adds C sign bits.
2124 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2125 Tmp += C->getZExtValue();
2126 if (Tmp > VTBits) Tmp = VTBits;
2130 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2131 // shl destroys sign bits.
2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2133 if (C->getZExtValue() >= VTBits || // Bad shift.
2134 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2135 return Tmp - C->getZExtValue();
2140 case ISD::XOR: // NOT is handled here.
2141 // Logical binary ops preserve the number of sign bits at the worst.
2142 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2144 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2145 FirstAnswer = std::min(Tmp, Tmp2);
2146 // We computed what we know about the sign bits as our first
2147 // answer. Now proceed to the generic code that uses
2148 // ComputeMaskedBits, and pick whichever answer is better.
2153 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2154 if (Tmp == 1) return 1; // Early out.
2155 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2156 return std::min(Tmp, Tmp2);
2164 if (Op.getResNo() != 1)
2166 // The boolean result conforms to getBooleanContents. Fall through.
2168 // If setcc returns 0/-1, all bits are sign bits.
2169 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2170 TargetLowering::ZeroOrNegativeOneBooleanContent)
2175 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2176 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2178 // Handle rotate right by N like a rotate left by 32-N.
2179 if (Op.getOpcode() == ISD::ROTR)
2180 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2182 // If we aren't rotating out all of the known-in sign bits, return the
2183 // number that are left. This handles rotl(sext(x), 1) for example.
2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2185 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2189 // Add can have at most one carry bit. Thus we know that the output
2190 // is, at worst, one more bit than the inputs.
2191 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2192 if (Tmp == 1) return 1; // Early out.
2194 // Special case decrementing a value (ADD X, -1):
2195 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2196 if (CRHS->isAllOnesValue()) {
2197 APInt KnownZero, KnownOne;
2198 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2200 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2202 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2205 // If we are subtracting one from a positive number, there is no carry
2206 // out of the result.
2207 if (KnownZero.isNegative())
2211 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2212 if (Tmp2 == 1) return 1;
2213 return std::min(Tmp, Tmp2)-1;
2216 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2217 if (Tmp2 == 1) return 1;
2220 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2221 if (CLHS->isNullValue()) {
2222 APInt KnownZero, KnownOne;
2223 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2224 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2226 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2229 // If the input is known to be positive (the sign bit is known clear),
2230 // the output of the NEG has the same number of sign bits as the input.
2231 if (KnownZero.isNegative())
2234 // Otherwise, we treat this like a SUB.
2237 // Sub can have at most one carry bit. Thus we know that the output
2238 // is, at worst, one more bit than the inputs.
2239 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2240 if (Tmp == 1) return 1; // Early out.
2241 return std::min(Tmp, Tmp2)-1;
2243 // FIXME: it's tricky to do anything useful for this, but it is an important
2244 // case for targets like X86.
2248 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2249 if (Op.getOpcode() == ISD::LOAD) {
2250 LoadSDNode *LD = cast<LoadSDNode>(Op);
2251 unsigned ExtType = LD->getExtensionType();
2254 case ISD::SEXTLOAD: // '17' bits known
2255 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2256 return VTBits-Tmp+1;
2257 case ISD::ZEXTLOAD: // '16' bits known
2258 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2263 // Allow the target to implement this method for its nodes.
2264 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2265 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2266 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2267 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2268 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2269 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2272 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2273 // use this information.
2274 APInt KnownZero, KnownOne;
2275 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2278 if (KnownZero.isNegative()) { // sign bit is 0
2280 } else if (KnownOne.isNegative()) { // sign bit is 1;
2287 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2288 // the number of identical bits in the top of the input value.
2290 Mask <<= Mask.getBitWidth()-VTBits;
2291 // Return # leading zeros. We use 'min' here in case Val was zero before
2292 // shifting. We don't want to return '64' as for an i32 "0".
2293 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2296 /// isBaseWithConstantOffset - Return true if the specified operand is an
2297 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2298 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2299 /// semantics as an ADD. This handles the equivalence:
2300 /// X|Cst == X+Cst iff X&Cst = 0.
2301 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2302 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2303 !isa<ConstantSDNode>(Op.getOperand(1)))
2306 if (Op.getOpcode() == ISD::OR &&
2307 !MaskedValueIsZero(Op.getOperand(0),
2308 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2315 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2316 // If we're told that NaNs won't happen, assume they won't.
2317 if (getTarget().Options.NoNaNsFPMath)
2320 // If the value is a constant, we can obviously see if it is a NaN or not.
2321 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2322 return !C->getValueAPF().isNaN();
2324 // TODO: Recognize more cases here.
2329 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2330 // If the value is a constant, we can obviously see if it is a zero or not.
2331 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2332 return !C->isZero();
2334 // TODO: Recognize more cases here.
2335 switch (Op.getOpcode()) {
2338 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2339 return !C->isNullValue();
2346 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2347 // Check the obvious case.
2348 if (A == B) return true;
2350 // For for negative and positive zero.
2351 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2352 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2353 if (CA->isZero() && CB->isZero()) return true;
2355 // Otherwise they may not be equal.
2359 /// getNode - Gets or creates the specified node.
2361 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2362 FoldingSetNodeID ID;
2363 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2365 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2366 return SDValue(E, 0);
2368 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2369 CSEMap.InsertNode(N, IP);
2371 AllNodes.push_back(N);
2375 return SDValue(N, 0);
2378 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2379 EVT VT, SDValue Operand) {
2380 // Constant fold unary operations with an integer constant operand.
2381 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2382 const APInt &Val = C->getAPIntValue();
2385 case ISD::SIGN_EXTEND:
2386 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2387 case ISD::ANY_EXTEND:
2388 case ISD::ZERO_EXTEND:
2390 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2391 case ISD::UINT_TO_FP:
2392 case ISD::SINT_TO_FP: {
2393 // No compile time operations on ppcf128.
2394 if (VT == MVT::ppcf128) break;
2395 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2396 (void)apf.convertFromAPInt(Val,
2397 Opcode==ISD::SINT_TO_FP,
2398 APFloat::rmNearestTiesToEven);
2399 return getConstantFP(apf, VT);
2402 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2403 return getConstantFP(Val.bitsToFloat(), VT);
2404 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2405 return getConstantFP(Val.bitsToDouble(), VT);
2408 return getConstant(Val.byteSwap(), VT);
2410 return getConstant(Val.countPopulation(), VT);
2412 case ISD::CTLZ_ZERO_UNDEF:
2413 return getConstant(Val.countLeadingZeros(), VT);
2415 case ISD::CTTZ_ZERO_UNDEF:
2416 return getConstant(Val.countTrailingZeros(), VT);
2420 // Constant fold unary operations with a floating point constant operand.
2421 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2422 APFloat V = C->getValueAPF(); // make copy
2423 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2427 return getConstantFP(V, VT);
2430 return getConstantFP(V, VT);
2431 case ISD::FP_EXTEND: {
2433 // This can return overflow, underflow, or inexact; we don't care.
2434 // FIXME need to be more flexible about rounding mode.
2435 (void)V.convert(*EVTToAPFloatSemantics(VT),
2436 APFloat::rmNearestTiesToEven, &ignored);
2437 return getConstantFP(V, VT);
2439 case ISD::FP_TO_SINT:
2440 case ISD::FP_TO_UINT: {
2443 assert(integerPartWidth >= 64);
2444 // FIXME need to be more flexible about rounding mode.
2445 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2446 Opcode==ISD::FP_TO_SINT,
2447 APFloat::rmTowardZero, &ignored);
2448 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2450 APInt api(VT.getSizeInBits(), x);
2451 return getConstant(api, VT);
2454 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2455 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2456 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2457 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2463 unsigned OpOpcode = Operand.getNode()->getOpcode();
2465 case ISD::TokenFactor:
2466 case ISD::MERGE_VALUES:
2467 case ISD::CONCAT_VECTORS:
2468 return Operand; // Factor, merge or concat of one node? No need.
2469 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2470 case ISD::FP_EXTEND:
2471 assert(VT.isFloatingPoint() &&
2472 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2473 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2474 assert((!VT.isVector() ||
2475 VT.getVectorNumElements() ==
2476 Operand.getValueType().getVectorNumElements()) &&
2477 "Vector element count mismatch!");
2478 if (Operand.getOpcode() == ISD::UNDEF)
2479 return getUNDEF(VT);
2481 case ISD::SIGN_EXTEND:
2482 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2483 "Invalid SIGN_EXTEND!");
2484 if (Operand.getValueType() == VT) return Operand; // noop extension
2485 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2486 "Invalid sext node, dst < src!");
2487 assert((!VT.isVector() ||
2488 VT.getVectorNumElements() ==
2489 Operand.getValueType().getVectorNumElements()) &&
2490 "Vector element count mismatch!");
2491 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2492 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2493 else if (OpOpcode == ISD::UNDEF)
2494 // sext(undef) = 0, because the top bits will all be the same.
2495 return getConstant(0, VT);
2497 case ISD::ZERO_EXTEND:
2498 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2499 "Invalid ZERO_EXTEND!");
2500 if (Operand.getValueType() == VT) return Operand; // noop extension
2501 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2502 "Invalid zext node, dst < src!");
2503 assert((!VT.isVector() ||
2504 VT.getVectorNumElements() ==
2505 Operand.getValueType().getVectorNumElements()) &&
2506 "Vector element count mismatch!");
2507 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2508 return getNode(ISD::ZERO_EXTEND, DL, VT,
2509 Operand.getNode()->getOperand(0));
2510 else if (OpOpcode == ISD::UNDEF)
2511 // zext(undef) = 0, because the top bits will be zero.
2512 return getConstant(0, VT);
2514 case ISD::ANY_EXTEND:
2515 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2516 "Invalid ANY_EXTEND!");
2517 if (Operand.getValueType() == VT) return Operand; // noop extension
2518 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2519 "Invalid anyext node, dst < src!");
2520 assert((!VT.isVector() ||
2521 VT.getVectorNumElements() ==
2522 Operand.getValueType().getVectorNumElements()) &&
2523 "Vector element count mismatch!");
2525 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2526 OpOpcode == ISD::ANY_EXTEND)
2527 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2528 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2529 else if (OpOpcode == ISD::UNDEF)
2530 return getUNDEF(VT);
2532 // (ext (trunx x)) -> x
2533 if (OpOpcode == ISD::TRUNCATE) {
2534 SDValue OpOp = Operand.getNode()->getOperand(0);
2535 if (OpOp.getValueType() == VT)
2540 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2541 "Invalid TRUNCATE!");
2542 if (Operand.getValueType() == VT) return Operand; // noop truncate
2543 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2544 "Invalid truncate node, src < dst!");
2545 assert((!VT.isVector() ||
2546 VT.getVectorNumElements() ==
2547 Operand.getValueType().getVectorNumElements()) &&
2548 "Vector element count mismatch!");
2549 if (OpOpcode == ISD::TRUNCATE)
2550 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2551 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2552 OpOpcode == ISD::ANY_EXTEND) {
2553 // If the source is smaller than the dest, we still need an extend.
2554 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2555 .bitsLT(VT.getScalarType()))
2556 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2557 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2558 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2559 return Operand.getNode()->getOperand(0);
2561 if (OpOpcode == ISD::UNDEF)
2562 return getUNDEF(VT);
2565 // Basic sanity checking.
2566 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2567 && "Cannot BITCAST between types of different sizes!");
2568 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2569 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2570 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2571 if (OpOpcode == ISD::UNDEF)
2572 return getUNDEF(VT);
2574 case ISD::SCALAR_TO_VECTOR:
2575 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2576 (VT.getVectorElementType() == Operand.getValueType() ||
2577 (VT.getVectorElementType().isInteger() &&
2578 Operand.getValueType().isInteger() &&
2579 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2580 "Illegal SCALAR_TO_VECTOR node!");
2581 if (OpOpcode == ISD::UNDEF)
2582 return getUNDEF(VT);
2583 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2584 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2585 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2586 Operand.getConstantOperandVal(1) == 0 &&
2587 Operand.getOperand(0).getValueType() == VT)
2588 return Operand.getOperand(0);
2591 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2592 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2593 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2594 Operand.getNode()->getOperand(0));
2595 if (OpOpcode == ISD::FNEG) // --X -> X
2596 return Operand.getNode()->getOperand(0);
2599 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2600 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2605 SDVTList VTs = getVTList(VT);
2606 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2607 FoldingSetNodeID ID;
2608 SDValue Ops[1] = { Operand };
2609 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2611 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2612 return SDValue(E, 0);
2614 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2615 CSEMap.InsertNode(N, IP);
2617 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2620 AllNodes.push_back(N);
2624 return SDValue(N, 0);
2627 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2629 ConstantSDNode *Cst1,
2630 ConstantSDNode *Cst2) {
2631 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2634 case ISD::ADD: return getConstant(C1 + C2, VT);
2635 case ISD::SUB: return getConstant(C1 - C2, VT);
2636 case ISD::MUL: return getConstant(C1 * C2, VT);
2638 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2641 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2644 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2647 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2649 case ISD::AND: return getConstant(C1 & C2, VT);
2650 case ISD::OR: return getConstant(C1 | C2, VT);
2651 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2652 case ISD::SHL: return getConstant(C1 << C2, VT);
2653 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2654 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2655 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2656 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2663 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2664 SDValue N1, SDValue N2) {
2665 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2666 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2669 case ISD::TokenFactor:
2670 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2671 N2.getValueType() == MVT::Other && "Invalid token factor!");
2672 // Fold trivial token factors.
2673 if (N1.getOpcode() == ISD::EntryToken) return N2;
2674 if (N2.getOpcode() == ISD::EntryToken) return N1;
2675 if (N1 == N2) return N1;
2677 case ISD::CONCAT_VECTORS:
2678 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2679 // one big BUILD_VECTOR.
2680 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2681 N2.getOpcode() == ISD::BUILD_VECTOR) {
2682 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2683 N1.getNode()->op_end());
2684 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2685 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2689 assert(VT.isInteger() && "This operator does not apply to FP types!");
2690 assert(N1.getValueType() == N2.getValueType() &&
2691 N1.getValueType() == VT && "Binary operator types must match!");
2692 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2693 // worth handling here.
2694 if (N2C && N2C->isNullValue())
2696 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2703 assert(VT.isInteger() && "This operator does not apply to FP types!");
2704 assert(N1.getValueType() == N2.getValueType() &&
2705 N1.getValueType() == VT && "Binary operator types must match!");
2706 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2707 // it's worth handling here.
2708 if (N2C && N2C->isNullValue())
2718 assert(VT.isInteger() && "This operator does not apply to FP types!");
2719 assert(N1.getValueType() == N2.getValueType() &&
2720 N1.getValueType() == VT && "Binary operator types must match!");
2727 if (getTarget().Options.UnsafeFPMath) {
2728 if (Opcode == ISD::FADD) {
2730 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2731 if (CFP->getValueAPF().isZero())
2734 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2735 if (CFP->getValueAPF().isZero())
2737 } else if (Opcode == ISD::FSUB) {
2739 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2740 if (CFP->getValueAPF().isZero())
2744 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2745 assert(N1.getValueType() == N2.getValueType() &&
2746 N1.getValueType() == VT && "Binary operator types must match!");
2748 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2749 assert(N1.getValueType() == VT &&
2750 N1.getValueType().isFloatingPoint() &&
2751 N2.getValueType().isFloatingPoint() &&
2752 "Invalid FCOPYSIGN!");
2759 assert(VT == N1.getValueType() &&
2760 "Shift operators return type must be the same as their first arg");
2761 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2762 "Shifts only work on integers");
2763 // Verify that the shift amount VT is bit enough to hold valid shift
2764 // amounts. This catches things like trying to shift an i1024 value by an
2765 // i8, which is easy to fall into in generic code that uses
2766 // TLI.getShiftAmount().
2767 assert(N2.getValueType().getSizeInBits() >=
2768 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2769 "Invalid use of small shift amount with oversized value!");
2771 // Always fold shifts of i1 values so the code generator doesn't need to
2772 // handle them. Since we know the size of the shift has to be less than the
2773 // size of the value, the shift/rotate count is guaranteed to be zero.
2776 if (N2C && N2C->isNullValue())
2779 case ISD::FP_ROUND_INREG: {
2780 EVT EVT = cast<VTSDNode>(N2)->getVT();
2781 assert(VT == N1.getValueType() && "Not an inreg round!");
2782 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2783 "Cannot FP_ROUND_INREG integer types");
2784 assert(EVT.isVector() == VT.isVector() &&
2785 "FP_ROUND_INREG type should be vector iff the operand "
2787 assert((!EVT.isVector() ||
2788 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2789 "Vector element counts must match in FP_ROUND_INREG");
2790 assert(EVT.bitsLE(VT) && "Not rounding down!");
2792 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2796 assert(VT.isFloatingPoint() &&
2797 N1.getValueType().isFloatingPoint() &&
2798 VT.bitsLE(N1.getValueType()) &&
2799 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2800 if (N1.getValueType() == VT) return N1; // noop conversion.
2802 case ISD::AssertSext:
2803 case ISD::AssertZext: {
2804 EVT EVT = cast<VTSDNode>(N2)->getVT();
2805 assert(VT == N1.getValueType() && "Not an inreg extend!");
2806 assert(VT.isInteger() && EVT.isInteger() &&
2807 "Cannot *_EXTEND_INREG FP types");
2808 assert(!EVT.isVector() &&
2809 "AssertSExt/AssertZExt type should be the vector element type "
2810 "rather than the vector type!");
2811 assert(EVT.bitsLE(VT) && "Not extending!");
2812 if (VT == EVT) return N1; // noop assertion.
2815 case ISD::SIGN_EXTEND_INREG: {
2816 EVT EVT = cast<VTSDNode>(N2)->getVT();
2817 assert(VT == N1.getValueType() && "Not an inreg extend!");
2818 assert(VT.isInteger() && EVT.isInteger() &&
2819 "Cannot *_EXTEND_INREG FP types");
2820 assert(EVT.isVector() == VT.isVector() &&
2821 "SIGN_EXTEND_INREG type should be vector iff the operand "
2823 assert((!EVT.isVector() ||
2824 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2825 "Vector element counts must match in SIGN_EXTEND_INREG");
2826 assert(EVT.bitsLE(VT) && "Not extending!");
2827 if (EVT == VT) return N1; // Not actually extending
2830 APInt Val = N1C->getAPIntValue();
2831 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2832 Val <<= Val.getBitWidth()-FromBits;
2833 Val = Val.ashr(Val.getBitWidth()-FromBits);
2834 return getConstant(Val, VT);
2838 case ISD::EXTRACT_VECTOR_ELT:
2839 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2840 if (N1.getOpcode() == ISD::UNDEF)
2841 return getUNDEF(VT);
2843 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2844 // expanding copies of large vectors from registers.
2846 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2847 N1.getNumOperands() > 0) {
2849 N1.getOperand(0).getValueType().getVectorNumElements();
2850 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2851 N1.getOperand(N2C->getZExtValue() / Factor),
2852 getConstant(N2C->getZExtValue() % Factor,
2853 N2.getValueType()));
2856 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2857 // expanding large vector constants.
2858 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2859 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2860 EVT VEltTy = N1.getValueType().getVectorElementType();
2861 if (Elt.getValueType() != VEltTy) {
2862 // If the vector element type is not legal, the BUILD_VECTOR operands
2863 // are promoted and implicitly truncated. Make that explicit here.
2864 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2867 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2868 // result is implicitly extended.
2869 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2874 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2875 // operations are lowered to scalars.
2876 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2877 // If the indices are the same, return the inserted element else
2878 // if the indices are known different, extract the element from
2879 // the original vector.
2880 SDValue N1Op2 = N1.getOperand(2);
2881 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2883 if (N1Op2C && N2C) {
2884 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2885 if (VT == N1.getOperand(1).getValueType())
2886 return N1.getOperand(1);
2888 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2891 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2895 case ISD::EXTRACT_ELEMENT:
2896 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2897 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2898 (N1.getValueType().isInteger() == VT.isInteger()) &&
2899 N1.getValueType() != VT &&
2900 "Wrong types for EXTRACT_ELEMENT!");
2902 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2903 // 64-bit integers into 32-bit parts. Instead of building the extract of
2904 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2905 if (N1.getOpcode() == ISD::BUILD_PAIR)
2906 return N1.getOperand(N2C->getZExtValue());
2908 // EXTRACT_ELEMENT of a constant int is also very common.
2909 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2910 unsigned ElementSize = VT.getSizeInBits();
2911 unsigned Shift = ElementSize * N2C->getZExtValue();
2912 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2913 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2916 case ISD::EXTRACT_SUBVECTOR: {
2918 if (VT.isSimple() && N1.getValueType().isSimple()) {
2919 assert(VT.isVector() && N1.getValueType().isVector() &&
2920 "Extract subvector VTs must be a vectors!");
2921 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2922 "Extract subvector VTs must have the same element type!");
2923 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2924 "Extract subvector must be from larger vector to smaller vector!");
2926 if (isa<ConstantSDNode>(Index.getNode())) {
2927 assert((VT.getVectorNumElements() +
2928 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2929 <= N1.getValueType().getVectorNumElements())
2930 && "Extract subvector overflow!");
2933 // Trivial extraction.
2934 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2943 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2944 if (SV.getNode()) return SV;
2945 } else { // Cannonicalize constant to RHS if commutative
2946 if (isCommutativeBinOp(Opcode)) {
2947 std::swap(N1C, N2C);
2953 // Constant fold FP operations.
2954 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2955 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2957 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2958 // Cannonicalize constant to RHS if commutative
2959 std::swap(N1CFP, N2CFP);
2961 } else if (N2CFP && VT != MVT::ppcf128) {
2962 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2963 APFloat::opStatus s;
2966 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2967 if (s != APFloat::opInvalidOp)
2968 return getConstantFP(V1, VT);
2971 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2972 if (s!=APFloat::opInvalidOp)
2973 return getConstantFP(V1, VT);
2976 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2977 if (s!=APFloat::opInvalidOp)
2978 return getConstantFP(V1, VT);
2981 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2982 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2983 return getConstantFP(V1, VT);
2986 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2987 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2988 return getConstantFP(V1, VT);
2990 case ISD::FCOPYSIGN:
2992 return getConstantFP(V1, VT);
2997 if (Opcode == ISD::FP_ROUND) {
2998 APFloat V = N1CFP->getValueAPF(); // make copy
3000 // This can return overflow, underflow, or inexact; we don't care.
3001 // FIXME need to be more flexible about rounding mode.
3002 (void)V.convert(*EVTToAPFloatSemantics(VT),
3003 APFloat::rmNearestTiesToEven, &ignored);
3004 return getConstantFP(V, VT);
3008 // Canonicalize an UNDEF to the RHS, even over a constant.
3009 if (N1.getOpcode() == ISD::UNDEF) {
3010 if (isCommutativeBinOp(Opcode)) {
3014 case ISD::FP_ROUND_INREG:
3015 case ISD::SIGN_EXTEND_INREG:
3021 return N1; // fold op(undef, arg2) -> undef
3029 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3030 // For vectors, we can't easily build an all zero vector, just return
3037 // Fold a bunch of operators when the RHS is undef.
3038 if (N2.getOpcode() == ISD::UNDEF) {
3041 if (N1.getOpcode() == ISD::UNDEF)
3042 // Handle undef ^ undef -> 0 special case. This is a common
3044 return getConstant(0, VT);
3054 return N2; // fold op(arg1, undef) -> undef
3060 if (getTarget().Options.UnsafeFPMath)
3068 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3069 // For vectors, we can't easily build an all zero vector, just return
3074 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3075 // For vectors, we can't easily build an all one vector, just return
3083 // Memoize this node if possible.
3085 SDVTList VTs = getVTList(VT);
3086 if (VT != MVT::Glue) {
3087 SDValue Ops[] = { N1, N2 };
3088 FoldingSetNodeID ID;
3089 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3092 return SDValue(E, 0);
3094 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3095 CSEMap.InsertNode(N, IP);
3097 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3100 AllNodes.push_back(N);
3104 return SDValue(N, 0);
3107 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3108 SDValue N1, SDValue N2, SDValue N3) {
3109 // Perform various simplifications.
3110 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3112 case ISD::CONCAT_VECTORS:
3113 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3114 // one big BUILD_VECTOR.
3115 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3116 N2.getOpcode() == ISD::BUILD_VECTOR &&
3117 N3.getOpcode() == ISD::BUILD_VECTOR) {
3118 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3119 N1.getNode()->op_end());
3120 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3121 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3122 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3126 // Use FoldSetCC to simplify SETCC's.
3127 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3128 if (Simp.getNode()) return Simp;
3133 if (N1C->getZExtValue())
3134 return N2; // select true, X, Y -> X
3135 return N3; // select false, X, Y -> Y
3138 if (N2 == N3) return N2; // select C, X, X -> X
3140 case ISD::VECTOR_SHUFFLE:
3141 llvm_unreachable("should use getVectorShuffle constructor!");
3142 case ISD::INSERT_SUBVECTOR: {
3144 if (VT.isSimple() && N1.getValueType().isSimple()
3145 && N2.getValueType().isSimple()) {
3146 assert(VT.isVector() && N1.getValueType().isVector() &&
3147 N2.getValueType().isVector() &&
3148 "Insert subvector VTs must be a vectors");
3149 assert(VT == N1.getValueType() &&
3150 "Dest and insert subvector source types must match!");
3151 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3152 "Insert subvector must be from smaller vector to larger vector!");
3153 if (isa<ConstantSDNode>(Index.getNode())) {
3154 assert((N2.getValueType().getVectorNumElements() +
3155 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3156 <= VT.getVectorNumElements())
3157 && "Insert subvector overflow!");
3160 // Trivial insertion.
3161 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3167 // Fold bit_convert nodes from a type to themselves.
3168 if (N1.getValueType() == VT)
3173 // Memoize node if it doesn't produce a flag.
3175 SDVTList VTs = getVTList(VT);
3176 if (VT != MVT::Glue) {
3177 SDValue Ops[] = { N1, N2, N3 };
3178 FoldingSetNodeID ID;
3179 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3182 return SDValue(E, 0);
3184 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3185 CSEMap.InsertNode(N, IP);
3187 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3190 AllNodes.push_back(N);
3194 return SDValue(N, 0);
3197 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3198 SDValue N1, SDValue N2, SDValue N3,
3200 SDValue Ops[] = { N1, N2, N3, N4 };
3201 return getNode(Opcode, DL, VT, Ops, 4);
3204 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3205 SDValue N1, SDValue N2, SDValue N3,
3206 SDValue N4, SDValue N5) {
3207 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3208 return getNode(Opcode, DL, VT, Ops, 5);
3211 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3212 /// the incoming stack arguments to be loaded from the stack.
3213 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3214 SmallVector<SDValue, 8> ArgChains;
3216 // Include the original chain at the beginning of the list. When this is
3217 // used by target LowerCall hooks, this helps legalize find the
3218 // CALLSEQ_BEGIN node.
3219 ArgChains.push_back(Chain);
3221 // Add a chain value for each stack argument.
3222 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3223 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3224 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3225 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3226 if (FI->getIndex() < 0)
3227 ArgChains.push_back(SDValue(L, 1));
3229 // Build a tokenfactor for all the chains.
3230 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3231 &ArgChains[0], ArgChains.size());
3234 /// SplatByte - Distribute ByteVal over NumBits bits.
3235 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3236 APInt Val = APInt(NumBits, ByteVal);
3238 for (unsigned i = NumBits; i > 8; i >>= 1) {
3239 Val = (Val << Shift) | Val;
3245 /// getMemsetValue - Vectorized representation of the memset value
3247 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3249 assert(Value.getOpcode() != ISD::UNDEF);
3251 unsigned NumBits = VT.getScalarType().getSizeInBits();
3252 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3253 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3255 return DAG.getConstant(Val, VT);
3256 return DAG.getConstantFP(APFloat(Val), VT);
3259 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3261 // Use a multiplication with 0x010101... to extend the input to the
3263 APInt Magic = SplatByte(NumBits, 0x01);
3264 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3270 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3271 /// used when a memcpy is turned into a memset when the source is a constant
3273 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3274 const TargetLowering &TLI, StringRef Str) {
3275 // Handle vector with all elements zero.
3278 return DAG.getConstant(0, VT);
3279 else if (VT == MVT::f32 || VT == MVT::f64)
3280 return DAG.getConstantFP(0.0, VT);
3281 else if (VT.isVector()) {
3282 unsigned NumElts = VT.getVectorNumElements();
3283 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3284 return DAG.getNode(ISD::BITCAST, dl, VT,
3285 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3288 llvm_unreachable("Expected type!");
3291 assert(!VT.isVector() && "Can't handle vector type here!");
3292 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3293 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3296 if (TLI.isLittleEndian()) {
3297 for (unsigned i = 0; i != NumBytes; ++i)
3298 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3300 for (unsigned i = 0; i != NumBytes; ++i)
3301 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3304 return DAG.getConstant(Val, VT);
3307 /// getMemBasePlusOffset - Returns base and offset node for the
3309 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3310 SelectionDAG &DAG) {
3311 EVT VT = Base.getValueType();
3312 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3313 VT, Base, DAG.getConstant(Offset, VT));
3316 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3318 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3319 unsigned SrcDelta = 0;
3320 GlobalAddressSDNode *G = NULL;
3321 if (Src.getOpcode() == ISD::GlobalAddress)
3322 G = cast<GlobalAddressSDNode>(Src);
3323 else if (Src.getOpcode() == ISD::ADD &&
3324 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3325 Src.getOperand(1).getOpcode() == ISD::Constant) {
3326 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3327 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3332 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3335 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3336 /// to replace the memset / memcpy. Return true if the number of memory ops
3337 /// is below the threshold. It returns the types of the sequence of
3338 /// memory ops to perform memset / memcpy by reference.
3339 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3340 unsigned Limit, uint64_t Size,
3341 unsigned DstAlign, unsigned SrcAlign,
3345 const TargetLowering &TLI) {
3346 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3347 "Expecting memcpy / memset source to meet alignment requirement!");
3348 // If 'SrcAlign' is zero, that means the memory operation does not need to
3349 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3350 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3351 // is the specified alignment of the memory operation. If it is zero, that
3352 // means it's possible to change the alignment of the destination.
3353 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3354 // not need to be loaded.
3355 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3356 IsZeroVal, MemcpyStrSrc,
3357 DAG.getMachineFunction());
3359 if (VT == MVT::Other) {
3360 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3361 TLI.allowsUnalignedMemoryAccesses(VT)) {
3362 VT = TLI.getPointerTy();
3364 switch (DstAlign & 7) {
3365 case 0: VT = MVT::i64; break;
3366 case 4: VT = MVT::i32; break;
3367 case 2: VT = MVT::i16; break;
3368 default: VT = MVT::i8; break;
3373 while (!TLI.isTypeLegal(LVT))
3374 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3375 assert(LVT.isInteger());
3381 unsigned NumMemOps = 0;
3383 unsigned VTSize = VT.getSizeInBits() / 8;
3384 while (VTSize > Size) {
3385 // For now, only use non-vector load / store's for the left-over pieces.
3386 if (VT.isVector() || VT.isFloatingPoint()) {
3388 while (!TLI.isTypeLegal(VT))
3389 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3390 VTSize = VT.getSizeInBits() / 8;
3392 // This can result in a type that is not legal on the target, e.g.
3393 // 1 or 2 bytes on PPC.
3394 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3399 if (++NumMemOps > Limit)
3401 MemOps.push_back(VT);
3408 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3409 SDValue Chain, SDValue Dst,
3410 SDValue Src, uint64_t Size,
3411 unsigned Align, bool isVol,
3413 MachinePointerInfo DstPtrInfo,
3414 MachinePointerInfo SrcPtrInfo) {
3415 // Turn a memcpy of undef to nop.
3416 if (Src.getOpcode() == ISD::UNDEF)
3419 // Expand memcpy to a series of load and store ops if the size operand falls
3420 // below a certain threshold.
3421 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3422 // rather than maybe a humongous number of loads and stores.
3423 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3424 std::vector<EVT> MemOps;
3425 bool DstAlignCanChange = false;
3426 MachineFunction &MF = DAG.getMachineFunction();
3427 MachineFrameInfo *MFI = MF.getFrameInfo();
3428 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3429 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3430 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3431 DstAlignCanChange = true;
3432 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3433 if (Align > SrcAlign)
3436 bool CopyFromStr = isMemSrcFromString(Src, Str);
3437 bool isZeroStr = CopyFromStr && Str.empty();
3438 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3440 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3441 (DstAlignCanChange ? 0 : Align),
3442 (isZeroStr ? 0 : SrcAlign),
3443 true, CopyFromStr, DAG, TLI))
3446 if (DstAlignCanChange) {
3447 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3448 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3449 if (NewAlign > Align) {
3450 // Give the stack frame object a larger alignment if needed.
3451 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3452 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3457 SmallVector<SDValue, 8> OutChains;
3458 unsigned NumMemOps = MemOps.size();
3459 uint64_t SrcOff = 0, DstOff = 0;
3460 for (unsigned i = 0; i != NumMemOps; ++i) {
3462 unsigned VTSize = VT.getSizeInBits() / 8;
3463 SDValue Value, Store;
3466 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3467 // It's unlikely a store of a vector immediate can be done in a single
3468 // instruction. It would require a load from a constantpool first.
3469 // We only handle zero vectors here.
3470 // FIXME: Handle other cases where store of vector immediate is done in
3471 // a single instruction.
3472 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3473 Store = DAG.getStore(Chain, dl, Value,
3474 getMemBasePlusOffset(Dst, DstOff, DAG),
3475 DstPtrInfo.getWithOffset(DstOff), isVol,
3478 // The type might not be legal for the target. This should only happen
3479 // if the type is smaller than a legal type, as on PPC, so the right
3480 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3481 // to Load/Store if NVT==VT.
3482 // FIXME does the case above also need this?
3483 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3484 assert(NVT.bitsGE(VT));
3485 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3486 getMemBasePlusOffset(Src, SrcOff, DAG),
3487 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3488 MinAlign(SrcAlign, SrcOff));
3489 Store = DAG.getTruncStore(Chain, dl, Value,
3490 getMemBasePlusOffset(Dst, DstOff, DAG),
3491 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3494 OutChains.push_back(Store);
3499 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3500 &OutChains[0], OutChains.size());
3503 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3504 SDValue Chain, SDValue Dst,
3505 SDValue Src, uint64_t Size,
3506 unsigned Align, bool isVol,
3508 MachinePointerInfo DstPtrInfo,
3509 MachinePointerInfo SrcPtrInfo) {
3510 // Turn a memmove of undef to nop.
3511 if (Src.getOpcode() == ISD::UNDEF)
3514 // Expand memmove to a series of load and store ops if the size operand falls
3515 // below a certain threshold.
3516 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3517 std::vector<EVT> MemOps;
3518 bool DstAlignCanChange = false;
3519 MachineFunction &MF = DAG.getMachineFunction();
3520 MachineFrameInfo *MFI = MF.getFrameInfo();
3521 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3522 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3523 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3524 DstAlignCanChange = true;
3525 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3526 if (Align > SrcAlign)
3528 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3530 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3531 (DstAlignCanChange ? 0 : Align),
3532 SrcAlign, true, false, DAG, TLI))
3535 if (DstAlignCanChange) {
3536 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3537 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3538 if (NewAlign > Align) {
3539 // Give the stack frame object a larger alignment if needed.
3540 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3541 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3546 uint64_t SrcOff = 0, DstOff = 0;
3547 SmallVector<SDValue, 8> LoadValues;
3548 SmallVector<SDValue, 8> LoadChains;
3549 SmallVector<SDValue, 8> OutChains;
3550 unsigned NumMemOps = MemOps.size();
3551 for (unsigned i = 0; i < NumMemOps; i++) {
3553 unsigned VTSize = VT.getSizeInBits() / 8;
3554 SDValue Value, Store;
3556 Value = DAG.getLoad(VT, dl, Chain,
3557 getMemBasePlusOffset(Src, SrcOff, DAG),
3558 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3559 false, false, SrcAlign);
3560 LoadValues.push_back(Value);
3561 LoadChains.push_back(Value.getValue(1));
3564 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3565 &LoadChains[0], LoadChains.size());
3567 for (unsigned i = 0; i < NumMemOps; i++) {
3569 unsigned VTSize = VT.getSizeInBits() / 8;
3570 SDValue Value, Store;
3572 Store = DAG.getStore(Chain, dl, LoadValues[i],
3573 getMemBasePlusOffset(Dst, DstOff, DAG),
3574 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3575 OutChains.push_back(Store);
3579 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3580 &OutChains[0], OutChains.size());
3583 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3584 SDValue Chain, SDValue Dst,
3585 SDValue Src, uint64_t Size,
3586 unsigned Align, bool isVol,
3587 MachinePointerInfo DstPtrInfo) {
3588 // Turn a memset of undef to nop.
3589 if (Src.getOpcode() == ISD::UNDEF)
3592 // Expand memset to a series of load/store ops if the size operand
3593 // falls below a certain threshold.
3594 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3595 std::vector<EVT> MemOps;
3596 bool DstAlignCanChange = false;
3597 MachineFunction &MF = DAG.getMachineFunction();
3598 MachineFrameInfo *MFI = MF.getFrameInfo();
3599 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3600 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3601 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3602 DstAlignCanChange = true;
3604 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3605 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3606 Size, (DstAlignCanChange ? 0 : Align), 0,
3607 IsZeroVal, false, DAG, TLI))
3610 if (DstAlignCanChange) {
3611 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3612 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3613 if (NewAlign > Align) {
3614 // Give the stack frame object a larger alignment if needed.
3615 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3616 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3621 SmallVector<SDValue, 8> OutChains;
3622 uint64_t DstOff = 0;
3623 unsigned NumMemOps = MemOps.size();
3625 // Find the largest store and generate the bit pattern for it.
3626 EVT LargestVT = MemOps[0];
3627 for (unsigned i = 1; i < NumMemOps; i++)
3628 if (MemOps[i].bitsGT(LargestVT))
3629 LargestVT = MemOps[i];
3630 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3632 for (unsigned i = 0; i < NumMemOps; i++) {
3635 // If this store is smaller than the largest store see whether we can get
3636 // the smaller value for free with a truncate.
3637 SDValue Value = MemSetValue;
3638 if (VT.bitsLT(LargestVT)) {
3639 if (!LargestVT.isVector() && !VT.isVector() &&
3640 TLI.isTruncateFree(LargestVT, VT))
3641 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3643 Value = getMemsetValue(Src, VT, DAG, dl);
3645 assert(Value.getValueType() == VT && "Value with wrong type.");
3646 SDValue Store = DAG.getStore(Chain, dl, Value,
3647 getMemBasePlusOffset(Dst, DstOff, DAG),
3648 DstPtrInfo.getWithOffset(DstOff),
3649 isVol, false, Align);
3650 OutChains.push_back(Store);
3651 DstOff += VT.getSizeInBits() / 8;
3654 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3655 &OutChains[0], OutChains.size());
3658 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3659 SDValue Src, SDValue Size,
3660 unsigned Align, bool isVol, bool AlwaysInline,
3661 MachinePointerInfo DstPtrInfo,
3662 MachinePointerInfo SrcPtrInfo) {
3664 // Check to see if we should lower the memcpy to loads and stores first.
3665 // For cases within the target-specified limits, this is the best choice.
3666 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3668 // Memcpy with size zero? Just return the original chain.
3669 if (ConstantSize->isNullValue())
3672 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3673 ConstantSize->getZExtValue(),Align,
3674 isVol, false, DstPtrInfo, SrcPtrInfo);
3675 if (Result.getNode())
3679 // Then check to see if we should lower the memcpy with target-specific
3680 // code. If the target chooses to do this, this is the next best.
3682 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3683 isVol, AlwaysInline,
3684 DstPtrInfo, SrcPtrInfo);
3685 if (Result.getNode())
3688 // If we really need inline code and the target declined to provide it,
3689 // use a (potentially long) sequence of loads and stores.
3691 assert(ConstantSize && "AlwaysInline requires a constant size!");
3692 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3693 ConstantSize->getZExtValue(), Align, isVol,
3694 true, DstPtrInfo, SrcPtrInfo);
3697 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3698 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3699 // respect volatile, so they may do things like read or write memory
3700 // beyond the given memory regions. But fixing this isn't easy, and most
3701 // people don't care.
3703 // Emit a library call.
3704 TargetLowering::ArgListTy Args;
3705 TargetLowering::ArgListEntry Entry;
3706 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3707 Entry.Node = Dst; Args.push_back(Entry);
3708 Entry.Node = Src; Args.push_back(Entry);
3709 Entry.Node = Size; Args.push_back(Entry);
3710 // FIXME: pass in DebugLoc
3711 std::pair<SDValue,SDValue> CallResult =
3712 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3713 false, false, false, false, 0,
3714 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3715 /*isTailCall=*/false,
3716 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3717 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3718 TLI.getPointerTy()),
3720 return CallResult.second;
3723 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3724 SDValue Src, SDValue Size,
3725 unsigned Align, bool isVol,
3726 MachinePointerInfo DstPtrInfo,
3727 MachinePointerInfo SrcPtrInfo) {
3729 // Check to see if we should lower the memmove to loads and stores first.
3730 // For cases within the target-specified limits, this is the best choice.
3731 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3733 // Memmove with size zero? Just return the original chain.
3734 if (ConstantSize->isNullValue())
3738 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3739 ConstantSize->getZExtValue(), Align, isVol,
3740 false, DstPtrInfo, SrcPtrInfo);
3741 if (Result.getNode())
3745 // Then check to see if we should lower the memmove with target-specific
3746 // code. If the target chooses to do this, this is the next best.
3748 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3749 DstPtrInfo, SrcPtrInfo);
3750 if (Result.getNode())
3753 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3754 // not be safe. See memcpy above for more details.
3756 // Emit a library call.
3757 TargetLowering::ArgListTy Args;
3758 TargetLowering::ArgListEntry Entry;
3759 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3760 Entry.Node = Dst; Args.push_back(Entry);
3761 Entry.Node = Src; Args.push_back(Entry);
3762 Entry.Node = Size; Args.push_back(Entry);
3763 // FIXME: pass in DebugLoc
3764 std::pair<SDValue,SDValue> CallResult =
3765 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3766 false, false, false, false, 0,
3767 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3768 /*isTailCall=*/false,
3769 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3770 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3771 TLI.getPointerTy()),
3773 return CallResult.second;
3776 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3777 SDValue Src, SDValue Size,
3778 unsigned Align, bool isVol,
3779 MachinePointerInfo DstPtrInfo) {
3781 // Check to see if we should lower the memset to stores first.
3782 // For cases within the target-specified limits, this is the best choice.
3783 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3785 // Memset with size zero? Just return the original chain.
3786 if (ConstantSize->isNullValue())
3790 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3791 Align, isVol, DstPtrInfo);
3793 if (Result.getNode())
3797 // Then check to see if we should lower the memset with target-specific
3798 // code. If the target chooses to do this, this is the next best.
3800 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3802 if (Result.getNode())
3805 // Emit a library call.
3806 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3807 TargetLowering::ArgListTy Args;
3808 TargetLowering::ArgListEntry Entry;
3809 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3810 Args.push_back(Entry);
3811 // Extend or truncate the argument to be an i32 value for the call.
3812 if (Src.getValueType().bitsGT(MVT::i32))
3813 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3815 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3817 Entry.Ty = Type::getInt32Ty(*getContext());
3818 Entry.isSExt = true;
3819 Args.push_back(Entry);
3821 Entry.Ty = IntPtrTy;
3822 Entry.isSExt = false;
3823 Args.push_back(Entry);
3824 // FIXME: pass in DebugLoc
3825 std::pair<SDValue,SDValue> CallResult =
3826 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3827 false, false, false, false, 0,
3828 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3829 /*isTailCall=*/false,
3830 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3831 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3832 TLI.getPointerTy()),
3834 return CallResult.second;
3837 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3838 SDValue Chain, SDValue Ptr, SDValue Cmp,
3839 SDValue Swp, MachinePointerInfo PtrInfo,
3841 AtomicOrdering Ordering,
3842 SynchronizationScope SynchScope) {
3843 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3844 Alignment = getEVTAlignment(MemVT);
3846 MachineFunction &MF = getMachineFunction();
3847 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3849 // For now, atomics are considered to be volatile always.
3850 // FIXME: Volatile isn't really correct; we should keep track of atomic
3851 // orderings in the memoperand.
3852 Flags |= MachineMemOperand::MOVolatile;
3854 MachineMemOperand *MMO =
3855 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3857 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3858 Ordering, SynchScope);
3861 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3863 SDValue Ptr, SDValue Cmp,
3864 SDValue Swp, MachineMemOperand *MMO,
3865 AtomicOrdering Ordering,
3866 SynchronizationScope SynchScope) {
3867 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3868 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3870 EVT VT = Cmp.getValueType();
3872 SDVTList VTs = getVTList(VT, MVT::Other);
3873 FoldingSetNodeID ID;
3874 ID.AddInteger(MemVT.getRawBits());
3875 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3876 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3878 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3879 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3880 return SDValue(E, 0);
3882 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3883 Ptr, Cmp, Swp, MMO, Ordering,
3885 CSEMap.InsertNode(N, IP);
3886 AllNodes.push_back(N);
3887 return SDValue(N, 0);
3890 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3892 SDValue Ptr, SDValue Val,
3893 const Value* PtrVal,
3895 AtomicOrdering Ordering,
3896 SynchronizationScope SynchScope) {
3897 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3898 Alignment = getEVTAlignment(MemVT);
3900 MachineFunction &MF = getMachineFunction();
3901 // A monotonic store does not load; a release store "loads" in the sense
3902 // that other stores cannot be sunk past it.
3903 // (An atomicrmw obviously both loads and stores.)
3904 unsigned Flags = MachineMemOperand::MOStore;
3905 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3906 Flags |= MachineMemOperand::MOLoad;
3908 // For now, atomics are considered to be volatile always.
3909 // FIXME: Volatile isn't really correct; we should keep track of atomic
3910 // orderings in the memoperand.
3911 Flags |= MachineMemOperand::MOVolatile;
3913 MachineMemOperand *MMO =
3914 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3915 MemVT.getStoreSize(), Alignment);
3917 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3918 Ordering, SynchScope);
3921 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3923 SDValue Ptr, SDValue Val,
3924 MachineMemOperand *MMO,
3925 AtomicOrdering Ordering,
3926 SynchronizationScope SynchScope) {
3927 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3928 Opcode == ISD::ATOMIC_LOAD_SUB ||
3929 Opcode == ISD::ATOMIC_LOAD_AND ||
3930 Opcode == ISD::ATOMIC_LOAD_OR ||
3931 Opcode == ISD::ATOMIC_LOAD_XOR ||
3932 Opcode == ISD::ATOMIC_LOAD_NAND ||
3933 Opcode == ISD::ATOMIC_LOAD_MIN ||
3934 Opcode == ISD::ATOMIC_LOAD_MAX ||
3935 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3936 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3937 Opcode == ISD::ATOMIC_SWAP ||
3938 Opcode == ISD::ATOMIC_STORE) &&
3939 "Invalid Atomic Op");
3941 EVT VT = Val.getValueType();
3943 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3944 getVTList(VT, MVT::Other);
3945 FoldingSetNodeID ID;
3946 ID.AddInteger(MemVT.getRawBits());
3947 SDValue Ops[] = {Chain, Ptr, Val};
3948 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3951 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3952 return SDValue(E, 0);
3954 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3956 Ordering, SynchScope);
3957 CSEMap.InsertNode(N, IP);
3958 AllNodes.push_back(N);
3959 return SDValue(N, 0);
3962 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3963 EVT VT, SDValue Chain,
3965 const Value* PtrVal,
3967 AtomicOrdering Ordering,
3968 SynchronizationScope SynchScope) {
3969 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3970 Alignment = getEVTAlignment(MemVT);
3972 MachineFunction &MF = getMachineFunction();
3973 // A monotonic load does not store; an acquire load "stores" in the sense
3974 // that other loads cannot be hoisted past it.
3975 unsigned Flags = MachineMemOperand::MOLoad;
3976 if (Ordering > Monotonic)
3977 Flags |= MachineMemOperand::MOStore;
3979 // For now, atomics are considered to be volatile always.
3980 // FIXME: Volatile isn't really correct; we should keep track of atomic
3981 // orderings in the memoperand.
3982 Flags |= MachineMemOperand::MOVolatile;
3984 MachineMemOperand *MMO =
3985 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3986 MemVT.getStoreSize(), Alignment);
3988 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3989 Ordering, SynchScope);
3992 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3993 EVT VT, SDValue Chain,
3995 MachineMemOperand *MMO,
3996 AtomicOrdering Ordering,
3997 SynchronizationScope SynchScope) {
3998 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4000 SDVTList VTs = getVTList(VT, MVT::Other);
4001 FoldingSetNodeID ID;
4002 ID.AddInteger(MemVT.getRawBits());
4003 SDValue Ops[] = {Chain, Ptr};
4004 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4007 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4008 return SDValue(E, 0);
4010 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4011 Ptr, MMO, Ordering, SynchScope);
4012 CSEMap.InsertNode(N, IP);
4013 AllNodes.push_back(N);
4014 return SDValue(N, 0);
4017 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4018 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4023 SmallVector<EVT, 4> VTs;
4024 VTs.reserve(NumOps);
4025 for (unsigned i = 0; i < NumOps; ++i)
4026 VTs.push_back(Ops[i].getValueType());
4027 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4032 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4033 const EVT *VTs, unsigned NumVTs,
4034 const SDValue *Ops, unsigned NumOps,
4035 EVT MemVT, MachinePointerInfo PtrInfo,
4036 unsigned Align, bool Vol,
4037 bool ReadMem, bool WriteMem) {
4038 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4039 MemVT, PtrInfo, Align, Vol,
4044 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4045 const SDValue *Ops, unsigned NumOps,
4046 EVT MemVT, MachinePointerInfo PtrInfo,
4047 unsigned Align, bool Vol,
4048 bool ReadMem, bool WriteMem) {
4049 if (Align == 0) // Ensure that codegen never sees alignment 0
4050 Align = getEVTAlignment(MemVT);
4052 MachineFunction &MF = getMachineFunction();
4055 Flags |= MachineMemOperand::MOStore;
4057 Flags |= MachineMemOperand::MOLoad;
4059 Flags |= MachineMemOperand::MOVolatile;
4060 MachineMemOperand *MMO =
4061 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4063 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4067 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4068 const SDValue *Ops, unsigned NumOps,
4069 EVT MemVT, MachineMemOperand *MMO) {
4070 assert((Opcode == ISD::INTRINSIC_VOID ||
4071 Opcode == ISD::INTRINSIC_W_CHAIN ||
4072 Opcode == ISD::PREFETCH ||
4073 (Opcode <= INT_MAX &&
4074 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4075 "Opcode is not a memory-accessing opcode!");
4077 // Memoize the node unless it returns a flag.
4078 MemIntrinsicSDNode *N;
4079 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4080 FoldingSetNodeID ID;
4081 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4083 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4084 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4085 return SDValue(E, 0);
4088 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4090 CSEMap.InsertNode(N, IP);
4092 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4095 AllNodes.push_back(N);
4096 return SDValue(N, 0);
4099 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4100 /// MachinePointerInfo record from it. This is particularly useful because the
4101 /// code generator has many cases where it doesn't bother passing in a
4102 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4103 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4104 // If this is FI+Offset, we can model it.
4105 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4106 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4108 // If this is (FI+Offset1)+Offset2, we can model it.
4109 if (Ptr.getOpcode() != ISD::ADD ||
4110 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4111 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4112 return MachinePointerInfo();
4114 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4115 return MachinePointerInfo::getFixedStack(FI, Offset+
4116 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4119 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4120 /// MachinePointerInfo record from it. This is particularly useful because the
4121 /// code generator has many cases where it doesn't bother passing in a
4122 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4123 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4124 // If the 'Offset' value isn't a constant, we can't handle this.
4125 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4126 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4127 if (OffsetOp.getOpcode() == ISD::UNDEF)
4128 return InferPointerInfo(Ptr);
4129 return MachinePointerInfo();
4134 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4135 EVT VT, DebugLoc dl, SDValue Chain,
4136 SDValue Ptr, SDValue Offset,
4137 MachinePointerInfo PtrInfo, EVT MemVT,
4138 bool isVolatile, bool isNonTemporal, bool isInvariant,
4139 unsigned Alignment, const MDNode *TBAAInfo,
4140 const MDNode *Ranges) {
4141 assert(Chain.getValueType() == MVT::Other &&
4142 "Invalid chain type");
4143 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4144 Alignment = getEVTAlignment(VT);
4146 unsigned Flags = MachineMemOperand::MOLoad;
4148 Flags |= MachineMemOperand::MOVolatile;
4150 Flags |= MachineMemOperand::MONonTemporal;
4152 Flags |= MachineMemOperand::MOInvariant;
4154 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4157 PtrInfo = InferPointerInfo(Ptr, Offset);
4159 MachineFunction &MF = getMachineFunction();
4160 MachineMemOperand *MMO =
4161 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4163 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4167 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4168 EVT VT, DebugLoc dl, SDValue Chain,
4169 SDValue Ptr, SDValue Offset, EVT MemVT,
4170 MachineMemOperand *MMO) {
4172 ExtType = ISD::NON_EXTLOAD;
4173 } else if (ExtType == ISD::NON_EXTLOAD) {
4174 assert(VT == MemVT && "Non-extending load from different memory type!");
4177 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4178 "Should only be an extending load, not truncating!");
4179 assert(VT.isInteger() == MemVT.isInteger() &&
4180 "Cannot convert from FP to Int or Int -> FP!");
4181 assert(VT.isVector() == MemVT.isVector() &&
4182 "Cannot use trunc store to convert to or from a vector!");
4183 assert((!VT.isVector() ||
4184 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4185 "Cannot use trunc store to change the number of vector elements!");
4188 bool Indexed = AM != ISD::UNINDEXED;
4189 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4190 "Unindexed load with an offset!");
4192 SDVTList VTs = Indexed ?
4193 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4194 SDValue Ops[] = { Chain, Ptr, Offset };
4195 FoldingSetNodeID ID;
4196 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4197 ID.AddInteger(MemVT.getRawBits());
4198 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4199 MMO->isNonTemporal(),
4200 MMO->isInvariant()));
4202 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4203 cast<LoadSDNode>(E)->refineAlignment(MMO);
4204 return SDValue(E, 0);
4206 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4208 CSEMap.InsertNode(N, IP);
4209 AllNodes.push_back(N);
4210 return SDValue(N, 0);
4213 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4214 SDValue Chain, SDValue Ptr,
4215 MachinePointerInfo PtrInfo,
4216 bool isVolatile, bool isNonTemporal,
4217 bool isInvariant, unsigned Alignment,
4218 const MDNode *TBAAInfo,
4219 const MDNode *Ranges) {
4220 SDValue Undef = getUNDEF(Ptr.getValueType());
4221 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4222 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4226 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4227 SDValue Chain, SDValue Ptr,
4228 MachinePointerInfo PtrInfo, EVT MemVT,
4229 bool isVolatile, bool isNonTemporal,
4230 unsigned Alignment, const MDNode *TBAAInfo) {
4231 SDValue Undef = getUNDEF(Ptr.getValueType());
4232 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4233 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4239 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4240 SDValue Offset, ISD::MemIndexedMode AM) {
4241 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4242 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4243 "Load is already a indexed load!");
4244 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4245 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4246 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4247 false, LD->getAlignment());
4250 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4251 SDValue Ptr, MachinePointerInfo PtrInfo,
4252 bool isVolatile, bool isNonTemporal,
4253 unsigned Alignment, const MDNode *TBAAInfo) {
4254 assert(Chain.getValueType() == MVT::Other &&
4255 "Invalid chain type");
4256 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4257 Alignment = getEVTAlignment(Val.getValueType());
4259 unsigned Flags = MachineMemOperand::MOStore;
4261 Flags |= MachineMemOperand::MOVolatile;
4263 Flags |= MachineMemOperand::MONonTemporal;
4266 PtrInfo = InferPointerInfo(Ptr);
4268 MachineFunction &MF = getMachineFunction();
4269 MachineMemOperand *MMO =
4270 MF.getMachineMemOperand(PtrInfo, Flags,
4271 Val.getValueType().getStoreSize(), Alignment,
4274 return getStore(Chain, dl, Val, Ptr, MMO);
4277 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4278 SDValue Ptr, MachineMemOperand *MMO) {
4279 assert(Chain.getValueType() == MVT::Other &&
4280 "Invalid chain type");
4281 EVT VT = Val.getValueType();
4282 SDVTList VTs = getVTList(MVT::Other);
4283 SDValue Undef = getUNDEF(Ptr.getValueType());
4284 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4285 FoldingSetNodeID ID;
4286 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4287 ID.AddInteger(VT.getRawBits());
4288 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4289 MMO->isNonTemporal(), MMO->isInvariant()));
4291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4292 cast<StoreSDNode>(E)->refineAlignment(MMO);
4293 return SDValue(E, 0);
4295 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4297 CSEMap.InsertNode(N, IP);
4298 AllNodes.push_back(N);
4299 return SDValue(N, 0);
4302 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4303 SDValue Ptr, MachinePointerInfo PtrInfo,
4304 EVT SVT,bool isVolatile, bool isNonTemporal,
4306 const MDNode *TBAAInfo) {
4307 assert(Chain.getValueType() == MVT::Other &&
4308 "Invalid chain type");
4309 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4310 Alignment = getEVTAlignment(SVT);
4312 unsigned Flags = MachineMemOperand::MOStore;
4314 Flags |= MachineMemOperand::MOVolatile;
4316 Flags |= MachineMemOperand::MONonTemporal;
4319 PtrInfo = InferPointerInfo(Ptr);
4321 MachineFunction &MF = getMachineFunction();
4322 MachineMemOperand *MMO =
4323 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4326 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4329 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4330 SDValue Ptr, EVT SVT,
4331 MachineMemOperand *MMO) {
4332 EVT VT = Val.getValueType();
4334 assert(Chain.getValueType() == MVT::Other &&
4335 "Invalid chain type");
4337 return getStore(Chain, dl, Val, Ptr, MMO);
4339 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4340 "Should only be a truncating store, not extending!");
4341 assert(VT.isInteger() == SVT.isInteger() &&
4342 "Can't do FP-INT conversion!");
4343 assert(VT.isVector() == SVT.isVector() &&
4344 "Cannot use trunc store to convert to or from a vector!");
4345 assert((!VT.isVector() ||
4346 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4347 "Cannot use trunc store to change the number of vector elements!");
4349 SDVTList VTs = getVTList(MVT::Other);
4350 SDValue Undef = getUNDEF(Ptr.getValueType());
4351 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4352 FoldingSetNodeID ID;
4353 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4354 ID.AddInteger(SVT.getRawBits());
4355 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4356 MMO->isNonTemporal(), MMO->isInvariant()));
4358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4359 cast<StoreSDNode>(E)->refineAlignment(MMO);
4360 return SDValue(E, 0);
4362 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4364 CSEMap.InsertNode(N, IP);
4365 AllNodes.push_back(N);
4366 return SDValue(N, 0);
4370 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4371 SDValue Offset, ISD::MemIndexedMode AM) {
4372 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4373 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4374 "Store is already a indexed store!");
4375 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4376 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4377 FoldingSetNodeID ID;
4378 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4379 ID.AddInteger(ST->getMemoryVT().getRawBits());
4380 ID.AddInteger(ST->getRawSubclassData());
4382 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4383 return SDValue(E, 0);
4385 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4386 ST->isTruncatingStore(),
4388 ST->getMemOperand());
4389 CSEMap.InsertNode(N, IP);
4390 AllNodes.push_back(N);
4391 return SDValue(N, 0);
4394 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4395 SDValue Chain, SDValue Ptr,
4398 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4399 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4402 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4403 const SDUse *Ops, unsigned NumOps) {
4405 case 0: return getNode(Opcode, DL, VT);
4406 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4407 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4408 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4412 // Copy from an SDUse array into an SDValue array for use with
4413 // the regular getNode logic.
4414 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4415 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4418 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4419 const SDValue *Ops, unsigned NumOps) {
4421 case 0: return getNode(Opcode, DL, VT);
4422 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4423 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4424 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4430 case ISD::SELECT_CC: {
4431 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4432 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4433 "LHS and RHS of condition must have same type!");
4434 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4435 "True and False arms of SelectCC must have same type!");
4436 assert(Ops[2].getValueType() == VT &&
4437 "select_cc node must be of same type as true and false value!");
4441 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4442 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4443 "LHS/RHS of comparison should match types!");
4450 SDVTList VTs = getVTList(VT);
4452 if (VT != MVT::Glue) {
4453 FoldingSetNodeID ID;
4454 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4457 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4458 return SDValue(E, 0);
4460 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4461 CSEMap.InsertNode(N, IP);
4463 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4466 AllNodes.push_back(N);
4470 return SDValue(N, 0);
4473 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4474 const std::vector<EVT> &ResultTys,
4475 const SDValue *Ops, unsigned NumOps) {
4476 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4480 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4481 const EVT *VTs, unsigned NumVTs,
4482 const SDValue *Ops, unsigned NumOps) {
4484 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4485 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4488 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4489 const SDValue *Ops, unsigned NumOps) {
4490 if (VTList.NumVTs == 1)
4491 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4495 // FIXME: figure out how to safely handle things like
4496 // int foo(int x) { return 1 << (x & 255); }
4497 // int bar() { return foo(256); }
4498 case ISD::SRA_PARTS:
4499 case ISD::SRL_PARTS:
4500 case ISD::SHL_PARTS:
4501 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4502 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4503 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4504 else if (N3.getOpcode() == ISD::AND)
4505 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4506 // If the and is only masking out bits that cannot effect the shift,
4507 // eliminate the and.
4508 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4509 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4510 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4516 // Memoize the node unless it returns a flag.
4518 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4519 FoldingSetNodeID ID;
4520 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4522 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4523 return SDValue(E, 0);
4526 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4527 } else if (NumOps == 2) {
4528 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4529 } else if (NumOps == 3) {
4530 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4533 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4535 CSEMap.InsertNode(N, IP);
4538 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4539 } else if (NumOps == 2) {
4540 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4541 } else if (NumOps == 3) {
4542 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4545 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4548 AllNodes.push_back(N);
4552 return SDValue(N, 0);
4555 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4556 return getNode(Opcode, DL, VTList, 0, 0);
4559 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4561 SDValue Ops[] = { N1 };
4562 return getNode(Opcode, DL, VTList, Ops, 1);
4565 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4566 SDValue N1, SDValue N2) {
4567 SDValue Ops[] = { N1, N2 };
4568 return getNode(Opcode, DL, VTList, Ops, 2);
4571 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4572 SDValue N1, SDValue N2, SDValue N3) {
4573 SDValue Ops[] = { N1, N2, N3 };
4574 return getNode(Opcode, DL, VTList, Ops, 3);
4577 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4578 SDValue N1, SDValue N2, SDValue N3,
4580 SDValue Ops[] = { N1, N2, N3, N4 };
4581 return getNode(Opcode, DL, VTList, Ops, 4);
4584 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4585 SDValue N1, SDValue N2, SDValue N3,
4586 SDValue N4, SDValue N5) {
4587 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4588 return getNode(Opcode, DL, VTList, Ops, 5);
4591 SDVTList SelectionDAG::getVTList(EVT VT) {
4592 return makeVTList(SDNode::getValueTypeList(VT), 1);
4595 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4596 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4597 E = VTList.rend(); I != E; ++I)
4598 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4601 EVT *Array = Allocator.Allocate<EVT>(2);
4604 SDVTList Result = makeVTList(Array, 2);
4605 VTList.push_back(Result);
4609 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4610 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4611 E = VTList.rend(); I != E; ++I)
4612 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4616 EVT *Array = Allocator.Allocate<EVT>(3);
4620 SDVTList Result = makeVTList(Array, 3);
4621 VTList.push_back(Result);
4625 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4626 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4627 E = VTList.rend(); I != E; ++I)
4628 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4629 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4632 EVT *Array = Allocator.Allocate<EVT>(4);
4637 SDVTList Result = makeVTList(Array, 4);
4638 VTList.push_back(Result);
4642 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4644 case 0: llvm_unreachable("Cannot have nodes without results!");
4645 case 1: return getVTList(VTs[0]);
4646 case 2: return getVTList(VTs[0], VTs[1]);
4647 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4648 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4652 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4653 E = VTList.rend(); I != E; ++I) {
4654 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4657 bool NoMatch = false;
4658 for (unsigned i = 2; i != NumVTs; ++i)
4659 if (VTs[i] != I->VTs[i]) {
4667 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4668 std::copy(VTs, VTs+NumVTs, Array);
4669 SDVTList Result = makeVTList(Array, NumVTs);
4670 VTList.push_back(Result);
4675 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4676 /// specified operands. If the resultant node already exists in the DAG,
4677 /// this does not modify the specified node, instead it returns the node that
4678 /// already exists. If the resultant node does not exist in the DAG, the
4679 /// input node is returned. As a degenerate case, if you specify the same
4680 /// input operands as the node already has, the input node is returned.
4681 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4682 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4684 // Check to see if there is no change.
4685 if (Op == N->getOperand(0)) return N;
4687 // See if the modified node already exists.
4688 void *InsertPos = 0;
4689 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4692 // Nope it doesn't. Remove the node from its current place in the maps.
4694 if (!RemoveNodeFromCSEMaps(N))
4697 // Now we update the operands.
4698 N->OperandList[0].set(Op);
4700 // If this gets put into a CSE map, add it.
4701 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4705 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4706 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4708 // Check to see if there is no change.
4709 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4710 return N; // No operands changed, just return the input node.
4712 // See if the modified node already exists.
4713 void *InsertPos = 0;
4714 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4717 // Nope it doesn't. Remove the node from its current place in the maps.
4719 if (!RemoveNodeFromCSEMaps(N))
4722 // Now we update the operands.
4723 if (N->OperandList[0] != Op1)
4724 N->OperandList[0].set(Op1);
4725 if (N->OperandList[1] != Op2)
4726 N->OperandList[1].set(Op2);
4728 // If this gets put into a CSE map, add it.
4729 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4733 SDNode *SelectionDAG::
4734 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4735 SDValue Ops[] = { Op1, Op2, Op3 };
4736 return UpdateNodeOperands(N, Ops, 3);
4739 SDNode *SelectionDAG::
4740 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4741 SDValue Op3, SDValue Op4) {
4742 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4743 return UpdateNodeOperands(N, Ops, 4);
4746 SDNode *SelectionDAG::
4747 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4748 SDValue Op3, SDValue Op4, SDValue Op5) {
4749 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4750 return UpdateNodeOperands(N, Ops, 5);
4753 SDNode *SelectionDAG::
4754 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4755 assert(N->getNumOperands() == NumOps &&
4756 "Update with wrong number of operands");
4758 // Check to see if there is no change.
4759 bool AnyChange = false;
4760 for (unsigned i = 0; i != NumOps; ++i) {
4761 if (Ops[i] != N->getOperand(i)) {
4767 // No operands changed, just return the input node.
4768 if (!AnyChange) return N;
4770 // See if the modified node already exists.
4771 void *InsertPos = 0;
4772 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4775 // Nope it doesn't. Remove the node from its current place in the maps.
4777 if (!RemoveNodeFromCSEMaps(N))
4780 // Now we update the operands.
4781 for (unsigned i = 0; i != NumOps; ++i)
4782 if (N->OperandList[i] != Ops[i])
4783 N->OperandList[i].set(Ops[i]);
4785 // If this gets put into a CSE map, add it.
4786 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4790 /// DropOperands - Release the operands and set this node to have
4792 void SDNode::DropOperands() {
4793 // Unlike the code in MorphNodeTo that does this, we don't need to
4794 // watch for dead nodes here.
4795 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4801 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4804 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4806 SDVTList VTs = getVTList(VT);
4807 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4810 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4811 EVT VT, SDValue Op1) {
4812 SDVTList VTs = getVTList(VT);
4813 SDValue Ops[] = { Op1 };
4814 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4817 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4818 EVT VT, SDValue Op1,
4820 SDVTList VTs = getVTList(VT);
4821 SDValue Ops[] = { Op1, Op2 };
4822 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4825 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4826 EVT VT, SDValue Op1,
4827 SDValue Op2, SDValue Op3) {
4828 SDVTList VTs = getVTList(VT);
4829 SDValue Ops[] = { Op1, Op2, Op3 };
4830 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4833 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4834 EVT VT, const SDValue *Ops,
4836 SDVTList VTs = getVTList(VT);
4837 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4840 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4841 EVT VT1, EVT VT2, const SDValue *Ops,
4843 SDVTList VTs = getVTList(VT1, VT2);
4844 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4847 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4849 SDVTList VTs = getVTList(VT1, VT2);
4850 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4853 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4854 EVT VT1, EVT VT2, EVT VT3,
4855 const SDValue *Ops, unsigned NumOps) {
4856 SDVTList VTs = getVTList(VT1, VT2, VT3);
4857 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4860 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4861 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4862 const SDValue *Ops, unsigned NumOps) {
4863 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4864 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4867 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4870 SDVTList VTs = getVTList(VT1, VT2);
4871 SDValue Ops[] = { Op1 };
4872 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4875 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4877 SDValue Op1, SDValue Op2) {
4878 SDVTList VTs = getVTList(VT1, VT2);
4879 SDValue Ops[] = { Op1, Op2 };
4880 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4883 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4885 SDValue Op1, SDValue Op2,
4887 SDVTList VTs = getVTList(VT1, VT2);
4888 SDValue Ops[] = { Op1, Op2, Op3 };
4889 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4892 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4893 EVT VT1, EVT VT2, EVT VT3,
4894 SDValue Op1, SDValue Op2,
4896 SDVTList VTs = getVTList(VT1, VT2, VT3);
4897 SDValue Ops[] = { Op1, Op2, Op3 };
4898 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4901 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4902 SDVTList VTs, const SDValue *Ops,
4904 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4905 // Reset the NodeID to -1.
4910 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
4911 /// the line number information on the merged node since it is not possible to
4912 /// preserve the information that operation is associated with multiple lines.
4913 /// This will make the debugger working better at -O0, were there is a higher
4914 /// probability having other instructions associated with that line.
4916 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
4917 DebugLoc NLoc = N->getDebugLoc();
4918 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
4919 N->setDebugLoc(DebugLoc());
4924 /// MorphNodeTo - This *mutates* the specified node to have the specified
4925 /// return type, opcode, and operands.
4927 /// Note that MorphNodeTo returns the resultant node. If there is already a
4928 /// node of the specified opcode and operands, it returns that node instead of
4929 /// the current one. Note that the DebugLoc need not be the same.
4931 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4932 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4933 /// node, and because it doesn't require CSE recalculation for any of
4934 /// the node's users.
4936 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4937 SDVTList VTs, const SDValue *Ops,
4939 // If an identical node already exists, use it.
4941 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4942 FoldingSetNodeID ID;
4943 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4944 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4945 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
4948 if (!RemoveNodeFromCSEMaps(N))
4951 // Start the morphing.
4953 N->ValueList = VTs.VTs;
4954 N->NumValues = VTs.NumVTs;
4956 // Clear the operands list, updating used nodes to remove this from their
4957 // use list. Keep track of any operands that become dead as a result.
4958 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4959 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4961 SDNode *Used = Use.getNode();
4963 if (Used->use_empty())
4964 DeadNodeSet.insert(Used);
4967 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4968 // Initialize the memory references information.
4969 MN->setMemRefs(0, 0);
4970 // If NumOps is larger than the # of operands we can have in a
4971 // MachineSDNode, reallocate the operand list.
4972 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4973 if (MN->OperandsNeedDelete)
4974 delete[] MN->OperandList;
4975 if (NumOps > array_lengthof(MN->LocalOperands))
4976 // We're creating a final node that will live unmorphed for the
4977 // remainder of the current SelectionDAG iteration, so we can allocate
4978 // the operands directly out of a pool with no recycling metadata.
4979 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4982 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4983 MN->OperandsNeedDelete = false;
4985 MN->InitOperands(MN->OperandList, Ops, NumOps);
4987 // If NumOps is larger than the # of operands we currently have, reallocate
4988 // the operand list.
4989 if (NumOps > N->NumOperands) {
4990 if (N->OperandsNeedDelete)
4991 delete[] N->OperandList;
4992 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4993 N->OperandsNeedDelete = true;
4995 N->InitOperands(N->OperandList, Ops, NumOps);
4998 // Delete any nodes that are still dead after adding the uses for the
5000 if (!DeadNodeSet.empty()) {
5001 SmallVector<SDNode *, 16> DeadNodes;
5002 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5003 E = DeadNodeSet.end(); I != E; ++I)
5004 if ((*I)->use_empty())
5005 DeadNodes.push_back(*I);
5006 RemoveDeadNodes(DeadNodes);
5010 CSEMap.InsertNode(N, IP); // Memoize the new node.
5015 /// getMachineNode - These are used for target selectors to create a new node
5016 /// with specified return type(s), MachineInstr opcode, and operands.
5018 /// Note that getMachineNode returns the resultant node. If there is already a
5019 /// node of the specified opcode and operands, it returns that node instead of
5020 /// the current one.
5022 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5023 SDVTList VTs = getVTList(VT);
5024 return getMachineNode(Opcode, dl, VTs, 0, 0);
5028 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5029 SDVTList VTs = getVTList(VT);
5030 SDValue Ops[] = { Op1 };
5031 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5035 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5036 SDValue Op1, SDValue Op2) {
5037 SDVTList VTs = getVTList(VT);
5038 SDValue Ops[] = { Op1, Op2 };
5039 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5043 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5044 SDValue Op1, SDValue Op2, SDValue Op3) {
5045 SDVTList VTs = getVTList(VT);
5046 SDValue Ops[] = { Op1, Op2, Op3 };
5047 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5051 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5052 const SDValue *Ops, unsigned NumOps) {
5053 SDVTList VTs = getVTList(VT);
5054 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5058 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5059 SDVTList VTs = getVTList(VT1, VT2);
5060 return getMachineNode(Opcode, dl, VTs, 0, 0);
5064 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5065 EVT VT1, EVT VT2, SDValue Op1) {
5066 SDVTList VTs = getVTList(VT1, VT2);
5067 SDValue Ops[] = { Op1 };
5068 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5072 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5073 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5074 SDVTList VTs = getVTList(VT1, VT2);
5075 SDValue Ops[] = { Op1, Op2 };
5076 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5080 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5081 EVT VT1, EVT VT2, SDValue Op1,
5082 SDValue Op2, SDValue Op3) {
5083 SDVTList VTs = getVTList(VT1, VT2);
5084 SDValue Ops[] = { Op1, Op2, Op3 };
5085 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5089 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5091 const SDValue *Ops, unsigned NumOps) {
5092 SDVTList VTs = getVTList(VT1, VT2);
5093 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5097 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5098 EVT VT1, EVT VT2, EVT VT3,
5099 SDValue Op1, SDValue Op2) {
5100 SDVTList VTs = getVTList(VT1, VT2, VT3);
5101 SDValue Ops[] = { Op1, Op2 };
5102 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5106 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5107 EVT VT1, EVT VT2, EVT VT3,
5108 SDValue Op1, SDValue Op2, SDValue Op3) {
5109 SDVTList VTs = getVTList(VT1, VT2, VT3);
5110 SDValue Ops[] = { Op1, Op2, Op3 };
5111 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5115 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5116 EVT VT1, EVT VT2, EVT VT3,
5117 const SDValue *Ops, unsigned NumOps) {
5118 SDVTList VTs = getVTList(VT1, VT2, VT3);
5119 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5123 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5124 EVT VT2, EVT VT3, EVT VT4,
5125 const SDValue *Ops, unsigned NumOps) {
5126 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5127 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5131 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5132 const std::vector<EVT> &ResultTys,
5133 const SDValue *Ops, unsigned NumOps) {
5134 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5135 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5139 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5140 const SDValue *Ops, unsigned NumOps) {
5141 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5146 FoldingSetNodeID ID;
5147 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5149 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5150 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5154 // Allocate a new MachineSDNode.
5155 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5157 // Initialize the operands list.
5158 if (NumOps > array_lengthof(N->LocalOperands))
5159 // We're creating a final node that will live unmorphed for the
5160 // remainder of the current SelectionDAG iteration, so we can allocate
5161 // the operands directly out of a pool with no recycling metadata.
5162 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5165 N->InitOperands(N->LocalOperands, Ops, NumOps);
5166 N->OperandsNeedDelete = false;
5169 CSEMap.InsertNode(N, IP);
5171 AllNodes.push_back(N);
5173 VerifyMachineNode(N);
5178 /// getTargetExtractSubreg - A convenience function for creating
5179 /// TargetOpcode::EXTRACT_SUBREG nodes.
5181 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5183 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5184 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5185 VT, Operand, SRIdxVal);
5186 return SDValue(Subreg, 0);
5189 /// getTargetInsertSubreg - A convenience function for creating
5190 /// TargetOpcode::INSERT_SUBREG nodes.
5192 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5193 SDValue Operand, SDValue Subreg) {
5194 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5195 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5196 VT, Operand, Subreg, SRIdxVal);
5197 return SDValue(Result, 0);
5200 /// getNodeIfExists - Get the specified node if it's already available, or
5201 /// else return NULL.
5202 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5203 const SDValue *Ops, unsigned NumOps) {
5204 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5205 FoldingSetNodeID ID;
5206 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5214 /// getDbgValue - Creates a SDDbgValue node.
5217 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5218 DebugLoc DL, unsigned O) {
5219 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5223 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5224 DebugLoc DL, unsigned O) {
5225 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5229 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5230 DebugLoc DL, unsigned O) {
5231 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5236 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5237 /// pointed to by a use iterator is deleted, increment the use iterator
5238 /// so that it doesn't dangle.
5240 /// This class also manages a "downlink" DAGUpdateListener, to forward
5241 /// messages to ReplaceAllUsesWith's callers.
5243 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5244 SelectionDAG::DAGUpdateListener *DownLink;
5245 SDNode::use_iterator &UI;
5246 SDNode::use_iterator &UE;
5248 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5249 // Increment the iterator as needed.
5250 while (UI != UE && N == *UI)
5253 // Then forward the message.
5254 if (DownLink) DownLink->NodeDeleted(N, E);
5257 virtual void NodeUpdated(SDNode *N) {
5258 // Just forward the message.
5259 if (DownLink) DownLink->NodeUpdated(N);
5263 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5264 SDNode::use_iterator &ui,
5265 SDNode::use_iterator &ue)
5266 : DownLink(dl), UI(ui), UE(ue) {}
5271 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5272 /// This can cause recursive merging of nodes in the DAG.
5274 /// This version assumes From has a single result value.
5276 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5277 DAGUpdateListener *UpdateListener) {
5278 SDNode *From = FromN.getNode();
5279 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5280 "Cannot replace with this method!");
5281 assert(From != To.getNode() && "Cannot replace uses of with self");
5283 // Iterate over all the existing uses of From. New uses will be added
5284 // to the beginning of the use list, which we avoid visiting.
5285 // This specifically avoids visiting uses of From that arise while the
5286 // replacement is happening, because any such uses would be the result
5287 // of CSE: If an existing node looks like From after one of its operands
5288 // is replaced by To, we don't want to replace of all its users with To
5289 // too. See PR3018 for more info.
5290 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5291 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5295 // This node is about to morph, remove its old self from the CSE maps.
5296 RemoveNodeFromCSEMaps(User);
5298 // A user can appear in a use list multiple times, and when this
5299 // happens the uses are usually next to each other in the list.
5300 // To help reduce the number of CSE recomputations, process all
5301 // the uses of this user that we can find this way.
5303 SDUse &Use = UI.getUse();
5306 } while (UI != UE && *UI == User);
5308 // Now that we have modified User, add it back to the CSE maps. If it
5309 // already exists there, recursively merge the results together.
5310 AddModifiedNodeToCSEMaps(User, &Listener);
5313 // If we just RAUW'd the root, take note.
5314 if (FromN == getRoot())
5318 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5319 /// This can cause recursive merging of nodes in the DAG.
5321 /// This version assumes that for each value of From, there is a
5322 /// corresponding value in To in the same position with the same type.
5324 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5325 DAGUpdateListener *UpdateListener) {
5327 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5328 assert((!From->hasAnyUseOfValue(i) ||
5329 From->getValueType(i) == To->getValueType(i)) &&
5330 "Cannot use this version of ReplaceAllUsesWith!");
5333 // Handle the trivial case.
5337 // Iterate over just the existing users of From. See the comments in
5338 // the ReplaceAllUsesWith above.
5339 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5340 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5344 // This node is about to morph, remove its old self from the CSE maps.
5345 RemoveNodeFromCSEMaps(User);
5347 // A user can appear in a use list multiple times, and when this
5348 // happens the uses are usually next to each other in the list.
5349 // To help reduce the number of CSE recomputations, process all
5350 // the uses of this user that we can find this way.
5352 SDUse &Use = UI.getUse();
5355 } while (UI != UE && *UI == User);
5357 // Now that we have modified User, add it back to the CSE maps. If it
5358 // already exists there, recursively merge the results together.
5359 AddModifiedNodeToCSEMaps(User, &Listener);
5362 // If we just RAUW'd the root, take note.
5363 if (From == getRoot().getNode())
5364 setRoot(SDValue(To, getRoot().getResNo()));
5367 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5368 /// This can cause recursive merging of nodes in the DAG.
5370 /// This version can replace From with any result values. To must match the
5371 /// number and types of values returned by From.
5372 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5374 DAGUpdateListener *UpdateListener) {
5375 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5376 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5378 // Iterate over just the existing users of From. See the comments in
5379 // the ReplaceAllUsesWith above.
5380 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5381 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5385 // This node is about to morph, remove its old self from the CSE maps.
5386 RemoveNodeFromCSEMaps(User);
5388 // A user can appear in a use list multiple times, and when this
5389 // happens the uses are usually next to each other in the list.
5390 // To help reduce the number of CSE recomputations, process all
5391 // the uses of this user that we can find this way.
5393 SDUse &Use = UI.getUse();
5394 const SDValue &ToOp = To[Use.getResNo()];
5397 } while (UI != UE && *UI == User);
5399 // Now that we have modified User, add it back to the CSE maps. If it
5400 // already exists there, recursively merge the results together.
5401 AddModifiedNodeToCSEMaps(User, &Listener);
5404 // If we just RAUW'd the root, take note.
5405 if (From == getRoot().getNode())
5406 setRoot(SDValue(To[getRoot().getResNo()]));
5409 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5410 /// uses of other values produced by From.getNode() alone. The Deleted
5411 /// vector is handled the same way as for ReplaceAllUsesWith.
5412 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5413 DAGUpdateListener *UpdateListener){
5414 // Handle the really simple, really trivial case efficiently.
5415 if (From == To) return;
5417 // Handle the simple, trivial, case efficiently.
5418 if (From.getNode()->getNumValues() == 1) {
5419 ReplaceAllUsesWith(From, To, UpdateListener);
5423 // Iterate over just the existing users of From. See the comments in
5424 // the ReplaceAllUsesWith above.
5425 SDNode::use_iterator UI = From.getNode()->use_begin(),
5426 UE = From.getNode()->use_end();
5427 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5430 bool UserRemovedFromCSEMaps = false;
5432 // A user can appear in a use list multiple times, and when this
5433 // happens the uses are usually next to each other in the list.
5434 // To help reduce the number of CSE recomputations, process all
5435 // the uses of this user that we can find this way.
5437 SDUse &Use = UI.getUse();
5439 // Skip uses of different values from the same node.
5440 if (Use.getResNo() != From.getResNo()) {
5445 // If this node hasn't been modified yet, it's still in the CSE maps,
5446 // so remove its old self from the CSE maps.
5447 if (!UserRemovedFromCSEMaps) {
5448 RemoveNodeFromCSEMaps(User);
5449 UserRemovedFromCSEMaps = true;
5454 } while (UI != UE && *UI == User);
5456 // We are iterating over all uses of the From node, so if a use
5457 // doesn't use the specific value, no changes are made.
5458 if (!UserRemovedFromCSEMaps)
5461 // Now that we have modified User, add it back to the CSE maps. If it
5462 // already exists there, recursively merge the results together.
5463 AddModifiedNodeToCSEMaps(User, &Listener);
5466 // If we just RAUW'd the root, take note.
5467 if (From == getRoot())
5472 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5473 /// to record information about a use.
5480 /// operator< - Sort Memos by User.
5481 bool operator<(const UseMemo &L, const UseMemo &R) {
5482 return (intptr_t)L.User < (intptr_t)R.User;
5486 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5487 /// uses of other values produced by From.getNode() alone. The same value
5488 /// may appear in both the From and To list. The Deleted vector is
5489 /// handled the same way as for ReplaceAllUsesWith.
5490 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5493 DAGUpdateListener *UpdateListener){
5494 // Handle the simple, trivial case efficiently.
5496 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5498 // Read up all the uses and make records of them. This helps
5499 // processing new uses that are introduced during the
5500 // replacement process.
5501 SmallVector<UseMemo, 4> Uses;
5502 for (unsigned i = 0; i != Num; ++i) {
5503 unsigned FromResNo = From[i].getResNo();
5504 SDNode *FromNode = From[i].getNode();
5505 for (SDNode::use_iterator UI = FromNode->use_begin(),
5506 E = FromNode->use_end(); UI != E; ++UI) {
5507 SDUse &Use = UI.getUse();
5508 if (Use.getResNo() == FromResNo) {
5509 UseMemo Memo = { *UI, i, &Use };
5510 Uses.push_back(Memo);
5515 // Sort the uses, so that all the uses from a given User are together.
5516 std::sort(Uses.begin(), Uses.end());
5518 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5519 UseIndex != UseIndexEnd; ) {
5520 // We know that this user uses some value of From. If it is the right
5521 // value, update it.
5522 SDNode *User = Uses[UseIndex].User;
5524 // This node is about to morph, remove its old self from the CSE maps.
5525 RemoveNodeFromCSEMaps(User);
5527 // The Uses array is sorted, so all the uses for a given User
5528 // are next to each other in the list.
5529 // To help reduce the number of CSE recomputations, process all
5530 // the uses of this user that we can find this way.
5532 unsigned i = Uses[UseIndex].Index;
5533 SDUse &Use = *Uses[UseIndex].Use;
5537 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5539 // Now that we have modified User, add it back to the CSE maps. If it
5540 // already exists there, recursively merge the results together.
5541 AddModifiedNodeToCSEMaps(User, UpdateListener);
5545 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5546 /// based on their topological order. It returns the maximum id and a vector
5547 /// of the SDNodes* in assigned order by reference.
5548 unsigned SelectionDAG::AssignTopologicalOrder() {
5550 unsigned DAGSize = 0;
5552 // SortedPos tracks the progress of the algorithm. Nodes before it are
5553 // sorted, nodes after it are unsorted. When the algorithm completes
5554 // it is at the end of the list.
5555 allnodes_iterator SortedPos = allnodes_begin();
5557 // Visit all the nodes. Move nodes with no operands to the front of
5558 // the list immediately. Annotate nodes that do have operands with their
5559 // operand count. Before we do this, the Node Id fields of the nodes
5560 // may contain arbitrary values. After, the Node Id fields for nodes
5561 // before SortedPos will contain the topological sort index, and the
5562 // Node Id fields for nodes At SortedPos and after will contain the
5563 // count of outstanding operands.
5564 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5567 unsigned Degree = N->getNumOperands();
5569 // A node with no uses, add it to the result array immediately.
5570 N->setNodeId(DAGSize++);
5571 allnodes_iterator Q = N;
5573 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5574 assert(SortedPos != AllNodes.end() && "Overran node list");
5577 // Temporarily use the Node Id as scratch space for the degree count.
5578 N->setNodeId(Degree);
5582 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5583 // such that by the time the end is reached all nodes will be sorted.
5584 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5587 // N is in sorted position, so all its uses have one less operand
5588 // that needs to be sorted.
5589 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5592 unsigned Degree = P->getNodeId();
5593 assert(Degree != 0 && "Invalid node degree");
5596 // All of P's operands are sorted, so P may sorted now.
5597 P->setNodeId(DAGSize++);
5599 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5600 assert(SortedPos != AllNodes.end() && "Overran node list");
5603 // Update P's outstanding operand count.
5604 P->setNodeId(Degree);
5607 if (I == SortedPos) {
5610 dbgs() << "Overran sorted position:\n";
5613 llvm_unreachable(0);
5617 assert(SortedPos == AllNodes.end() &&
5618 "Topological sort incomplete!");
5619 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5620 "First node in topological sort is not the entry token!");
5621 assert(AllNodes.front().getNodeId() == 0 &&
5622 "First node in topological sort has non-zero id!");
5623 assert(AllNodes.front().getNumOperands() == 0 &&
5624 "First node in topological sort has operands!");
5625 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5626 "Last node in topologic sort has unexpected id!");
5627 assert(AllNodes.back().use_empty() &&
5628 "Last node in topologic sort has users!");
5629 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5633 /// AssignOrdering - Assign an order to the SDNode.
5634 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5635 assert(SD && "Trying to assign an order to a null node!");
5636 Ordering->add(SD, Order);
5639 /// GetOrdering - Get the order for the SDNode.
5640 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5641 assert(SD && "Trying to get the order of a null node!");
5642 return Ordering->getOrder(SD);
5645 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5646 /// value is produced by SD.
5647 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5648 DbgInfo->add(DB, SD, isParameter);
5650 SD->setHasDebugValue(true);
5653 /// TransferDbgValues - Transfer SDDbgValues.
5654 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5655 if (From == To || !From.getNode()->getHasDebugValue())
5657 SDNode *FromNode = From.getNode();
5658 SDNode *ToNode = To.getNode();
5659 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5660 SmallVector<SDDbgValue *, 2> ClonedDVs;
5661 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5663 SDDbgValue *Dbg = *I;
5664 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5665 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5666 Dbg->getOffset(), Dbg->getDebugLoc(),
5668 ClonedDVs.push_back(Clone);
5671 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5672 E = ClonedDVs.end(); I != E; ++I)
5673 AddDbgValue(*I, ToNode, false);
5676 //===----------------------------------------------------------------------===//
5678 //===----------------------------------------------------------------------===//
5680 HandleSDNode::~HandleSDNode() {
5684 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5685 const GlobalValue *GA,
5686 EVT VT, int64_t o, unsigned char TF)
5687 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5691 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5692 MachineMemOperand *mmo)
5693 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5694 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5695 MMO->isNonTemporal(), MMO->isInvariant());
5696 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5697 assert(isNonTemporal() == MMO->isNonTemporal() &&
5698 "Non-temporal encoding error!");
5699 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5702 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5703 const SDValue *Ops, unsigned NumOps, EVT memvt,
5704 MachineMemOperand *mmo)
5705 : SDNode(Opc, dl, VTs, Ops, NumOps),
5706 MemoryVT(memvt), MMO(mmo) {
5707 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5708 MMO->isNonTemporal(), MMO->isInvariant());
5709 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5710 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5713 /// Profile - Gather unique data for the node.
5715 void SDNode::Profile(FoldingSetNodeID &ID) const {
5716 AddNodeIDNode(ID, this);
5721 std::vector<EVT> VTs;
5724 VTs.reserve(MVT::LAST_VALUETYPE);
5725 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5726 VTs.push_back(MVT((MVT::SimpleValueType)i));
5731 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5732 static ManagedStatic<EVTArray> SimpleVTArray;
5733 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5735 /// getValueTypeList - Return a pointer to the specified value type.
5737 const EVT *SDNode::getValueTypeList(EVT VT) {
5738 if (VT.isExtended()) {
5739 sys::SmartScopedLock<true> Lock(*VTMutex);
5740 return &(*EVTs->insert(VT).first);
5742 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5743 "Value type out of range!");
5744 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5748 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5749 /// indicated value. This method ignores uses of other values defined by this
5751 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5752 assert(Value < getNumValues() && "Bad value!");
5754 // TODO: Only iterate over uses of a given value of the node
5755 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5756 if (UI.getUse().getResNo() == Value) {
5763 // Found exactly the right number of uses?
5768 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5769 /// value. This method ignores uses of other values defined by this operation.
5770 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5771 assert(Value < getNumValues() && "Bad value!");
5773 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5774 if (UI.getUse().getResNo() == Value)
5781 /// isOnlyUserOf - Return true if this node is the only use of N.
5783 bool SDNode::isOnlyUserOf(SDNode *N) const {
5785 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5796 /// isOperand - Return true if this node is an operand of N.
5798 bool SDValue::isOperandOf(SDNode *N) const {
5799 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5800 if (*this == N->getOperand(i))
5805 bool SDNode::isOperandOf(SDNode *N) const {
5806 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5807 if (this == N->OperandList[i].getNode())
5812 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5813 /// be a chain) reaches the specified operand without crossing any
5814 /// side-effecting instructions on any chain path. In practice, this looks
5815 /// through token factors and non-volatile loads. In order to remain efficient,
5816 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5817 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5818 unsigned Depth) const {
5819 if (*this == Dest) return true;
5821 // Don't search too deeply, we just want to be able to see through
5822 // TokenFactor's etc.
5823 if (Depth == 0) return false;
5825 // If this is a token factor, all inputs to the TF happen in parallel. If any
5826 // of the operands of the TF does not reach dest, then we cannot do the xform.
5827 if (getOpcode() == ISD::TokenFactor) {
5828 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5829 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5834 // Loads don't have side effects, look through them.
5835 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5836 if (!Ld->isVolatile())
5837 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5842 /// hasPredecessor - Return true if N is a predecessor of this node.
5843 /// N is either an operand of this node, or can be reached by recursively
5844 /// traversing up the operands.
5845 /// NOTE: This is an expensive method. Use it carefully.
5846 bool SDNode::hasPredecessor(const SDNode *N) const {
5847 SmallPtrSet<const SDNode *, 32> Visited;
5848 SmallVector<const SDNode *, 16> Worklist;
5849 return hasPredecessorHelper(N, Visited, Worklist);
5852 bool SDNode::hasPredecessorHelper(const SDNode *N,
5853 SmallPtrSet<const SDNode *, 32> &Visited,
5854 SmallVector<const SDNode *, 16> &Worklist) const {
5855 if (Visited.empty()) {
5856 Worklist.push_back(this);
5858 // Take a look in the visited set. If we've already encountered this node
5859 // we needn't search further.
5860 if (Visited.count(N))
5864 // Haven't visited N yet. Continue the search.
5865 while (!Worklist.empty()) {
5866 const SDNode *M = Worklist.pop_back_val();
5867 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5868 SDNode *Op = M->getOperand(i).getNode();
5869 if (Visited.insert(Op))
5870 Worklist.push_back(Op);
5879 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5880 assert(Num < NumOperands && "Invalid child # of SDNode!");
5881 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5884 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5885 assert(N->getNumValues() == 1 &&
5886 "Can't unroll a vector with multiple results!");
5888 EVT VT = N->getValueType(0);
5889 unsigned NE = VT.getVectorNumElements();
5890 EVT EltVT = VT.getVectorElementType();
5891 DebugLoc dl = N->getDebugLoc();
5893 SmallVector<SDValue, 8> Scalars;
5894 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5896 // If ResNE is 0, fully unroll the vector op.
5899 else if (NE > ResNE)
5903 for (i= 0; i != NE; ++i) {
5904 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
5905 SDValue Operand = N->getOperand(j);
5906 EVT OperandVT = Operand.getValueType();
5907 if (OperandVT.isVector()) {
5908 // A vector operand; extract a single element.
5909 EVT OperandEltVT = OperandVT.getVectorElementType();
5910 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5913 getConstant(i, TLI.getPointerTy()));
5915 // A scalar operand; just use it as is.
5916 Operands[j] = Operand;
5920 switch (N->getOpcode()) {
5922 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5923 &Operands[0], Operands.size()));
5926 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
5927 &Operands[0], Operands.size()));
5934 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
5935 getShiftAmountOperand(Operands[0].getValueType(),
5938 case ISD::SIGN_EXTEND_INREG:
5939 case ISD::FP_ROUND_INREG: {
5940 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
5941 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5943 getValueType(ExtVT)));
5948 for (; i < ResNE; ++i)
5949 Scalars.push_back(getUNDEF(EltVT));
5951 return getNode(ISD::BUILD_VECTOR, dl,
5952 EVT::getVectorVT(*getContext(), EltVT, ResNE),
5953 &Scalars[0], Scalars.size());
5957 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
5958 /// location that is 'Dist' units away from the location that the 'Base' load
5959 /// is loading from.
5960 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
5961 unsigned Bytes, int Dist) const {
5962 if (LD->getChain() != Base->getChain())
5964 EVT VT = LD->getValueType(0);
5965 if (VT.getSizeInBits() / 8 != Bytes)
5968 SDValue Loc = LD->getOperand(1);
5969 SDValue BaseLoc = Base->getOperand(1);
5970 if (Loc.getOpcode() == ISD::FrameIndex) {
5971 if (BaseLoc.getOpcode() != ISD::FrameIndex)
5973 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
5974 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
5975 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
5976 int FS = MFI->getObjectSize(FI);
5977 int BFS = MFI->getObjectSize(BFI);
5978 if (FS != BFS || FS != (int)Bytes) return false;
5979 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
5983 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
5984 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
5987 const GlobalValue *GV1 = NULL;
5988 const GlobalValue *GV2 = NULL;
5989 int64_t Offset1 = 0;
5990 int64_t Offset2 = 0;
5991 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
5992 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
5993 if (isGA1 && isGA2 && GV1 == GV2)
5994 return Offset1 == (Offset2 + Dist*Bytes);
5999 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6000 /// it cannot be inferred.
6001 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6002 // If this is a GlobalAddress + cst, return the alignment.
6003 const GlobalValue *GV;
6004 int64_t GVOffset = 0;
6005 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6006 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6007 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6008 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6009 TLI.getTargetData());
6010 unsigned AlignBits = KnownZero.countTrailingOnes();
6011 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6013 return MinAlign(Align, GVOffset);
6016 // If this is a direct reference to a stack slot, use information about the
6017 // stack slot's alignment.
6018 int FrameIdx = 1 << 31;
6019 int64_t FrameOffset = 0;
6020 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6021 FrameIdx = FI->getIndex();
6022 } else if (isBaseWithConstantOffset(Ptr) &&
6023 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6025 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6026 FrameOffset = Ptr.getConstantOperandVal(1);
6029 if (FrameIdx != (1 << 31)) {
6030 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6031 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6039 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6040 unsigned GlobalAddressSDNode::getAddressSpace() const {
6041 return getGlobal()->getType()->getAddressSpace();
6045 Type *ConstantPoolSDNode::getType() const {
6046 if (isMachineConstantPoolEntry())
6047 return Val.MachineCPVal->getType();
6048 return Val.ConstVal->getType();
6051 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6053 unsigned &SplatBitSize,
6055 unsigned MinSplatBits,
6057 EVT VT = getValueType(0);
6058 assert(VT.isVector() && "Expected a vector type");
6059 unsigned sz = VT.getSizeInBits();
6060 if (MinSplatBits > sz)
6063 SplatValue = APInt(sz, 0);
6064 SplatUndef = APInt(sz, 0);
6066 // Get the bits. Bits with undefined values (when the corresponding element
6067 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6068 // in SplatValue. If any of the values are not constant, give up and return
6070 unsigned int nOps = getNumOperands();
6071 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6072 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6074 for (unsigned j = 0; j < nOps; ++j) {
6075 unsigned i = isBigEndian ? nOps-1-j : j;
6076 SDValue OpVal = getOperand(i);
6077 unsigned BitPos = j * EltBitSize;
6079 if (OpVal.getOpcode() == ISD::UNDEF)
6080 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6081 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6082 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6083 zextOrTrunc(sz) << BitPos;
6084 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6085 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6090 // The build_vector is all constants or undefs. Find the smallest element
6091 // size that splats the vector.
6093 HasAnyUndefs = (SplatUndef != 0);
6096 unsigned HalfSize = sz / 2;
6097 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6098 APInt LowValue = SplatValue.trunc(HalfSize);
6099 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6100 APInt LowUndef = SplatUndef.trunc(HalfSize);
6102 // If the two halves do not match (ignoring undef bits), stop here.
6103 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6104 MinSplatBits > HalfSize)
6107 SplatValue = HighValue | LowValue;
6108 SplatUndef = HighUndef & LowUndef;
6117 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6118 // Find the first non-undef value in the shuffle mask.
6120 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6123 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6125 // Make sure all remaining elements are either undef or the same as the first
6127 for (int Idx = Mask[i]; i != e; ++i)
6128 if (Mask[i] >= 0 && Mask[i] != Idx)
6134 static void checkForCyclesHelper(const SDNode *N,
6135 SmallPtrSet<const SDNode*, 32> &Visited,
6136 SmallPtrSet<const SDNode*, 32> &Checked) {
6137 // If this node has already been checked, don't check it again.
6138 if (Checked.count(N))
6141 // If a node has already been visited on this depth-first walk, reject it as
6143 if (!Visited.insert(N)) {
6144 dbgs() << "Offending node:\n";
6146 errs() << "Detected cycle in SelectionDAG\n";
6150 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6151 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6158 void llvm::checkForCycles(const llvm::SDNode *N) {
6160 assert(N && "Checking nonexistant SDNode");
6161 SmallPtrSet<const SDNode*, 32> visited;
6162 SmallPtrSet<const SDNode*, 32> checked;
6163 checkForCyclesHelper(N, visited, checked);
6167 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6168 checkForCycles(DAG->getRoot().getNode());