1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/System/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BIT_CONVERT)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BIT_CONVERT)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
202 for (unsigned i = 1; i < NumElems; ++i) {
203 SDValue V = N->getOperand(i);
204 if (V.getOpcode() != ISD::UNDEF)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: llvm_unreachable("Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
353 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
356 switch (N->getOpcode()) {
357 case ISD::TargetExternalSymbol:
358 case ISD::ExternalSymbol:
359 llvm_unreachable("Should only be used on nodes with operands");
360 default: break; // Normal nodes don't need extra info.
361 case ISD::TargetConstant:
363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365 case ISD::TargetConstantFP:
366 case ISD::ConstantFP: {
367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
370 case ISD::TargetGlobalAddress:
371 case ISD::GlobalAddress:
372 case ISD::TargetGlobalTLSAddress:
373 case ISD::GlobalTLSAddress: {
374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375 ID.AddPointer(GA->getGlobal());
376 ID.AddInteger(GA->getOffset());
377 ID.AddInteger(GA->getTargetFlags());
380 case ISD::BasicBlock:
381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
390 case ISD::FrameIndex:
391 case ISD::TargetFrameIndex:
392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
395 case ISD::TargetJumpTable:
396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
399 case ISD::ConstantPool:
400 case ISD::TargetConstantPool: {
401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
402 ID.AddInteger(CP->getAlignment());
403 ID.AddInteger(CP->getOffset());
404 if (CP->isMachineConstantPoolEntry())
405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
407 ID.AddPointer(CP->getConstVal());
408 ID.AddInteger(CP->getTargetFlags());
412 const LoadSDNode *LD = cast<LoadSDNode>(N);
413 ID.AddInteger(LD->getMemoryVT().getRawBits());
414 ID.AddInteger(LD->getRawSubclassData());
418 const StoreSDNode *ST = cast<StoreSDNode>(N);
419 ID.AddInteger(ST->getMemoryVT().getRawBits());
420 ID.AddInteger(ST->getRawSubclassData());
423 case ISD::ATOMIC_CMP_SWAP:
424 case ISD::ATOMIC_SWAP:
425 case ISD::ATOMIC_LOAD_ADD:
426 case ISD::ATOMIC_LOAD_SUB:
427 case ISD::ATOMIC_LOAD_AND:
428 case ISD::ATOMIC_LOAD_OR:
429 case ISD::ATOMIC_LOAD_XOR:
430 case ISD::ATOMIC_LOAD_NAND:
431 case ISD::ATOMIC_LOAD_MIN:
432 case ISD::ATOMIC_LOAD_MAX:
433 case ISD::ATOMIC_LOAD_UMIN:
434 case ISD::ATOMIC_LOAD_UMAX: {
435 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
436 ID.AddInteger(AT->getMemoryVT().getRawBits());
437 ID.AddInteger(AT->getRawSubclassData());
440 case ISD::VECTOR_SHUFFLE: {
441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
444 ID.AddInteger(SVN->getMaskElt(i));
447 case ISD::TargetBlockAddress:
448 case ISD::BlockAddress: {
449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
453 } // end switch (N->getOpcode())
456 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
458 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
459 AddNodeIDOpcode(ID, N->getOpcode());
460 // Add the return value info.
461 AddNodeIDValueTypes(ID, N->getVTList());
462 // Add the operand info.
463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
465 // Handle SDNode leafs with special info.
466 AddNodeIDCustom(ID, N);
469 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
470 /// the CSE map that carries volatility, temporalness, indexing mode, and
471 /// extension/truncation information.
473 static inline unsigned
474 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
475 bool isNonTemporal) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
483 (isNonTemporal << 6);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 return true; // Never CSE these nodes.
502 // Check that remaining values produced are not flags.
503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
504 if (N->getValueType(i) == MVT::Flag)
505 return true; // Never CSE anything that produces a flag.
510 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
512 void SelectionDAG::RemoveDeadNodes() {
513 // Create a dummy node (which is not added to allnodes), that adds a reference
514 // to the root node, preventing it from being deleted.
515 HandleSDNode Dummy(getRoot());
517 SmallVector<SDNode*, 128> DeadNodes;
519 // Add all obviously-dead nodes to the DeadNodes worklist.
520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
522 DeadNodes.push_back(I);
524 RemoveDeadNodes(DeadNodes);
526 // If the root changed (e.g. it was a dead load, update the root).
527 setRoot(Dummy.getValue());
530 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
531 /// given list, and any nodes that become unreachable as a result.
532 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
533 DAGUpdateListener *UpdateListener) {
535 // Process the worklist, deleting the nodes and adding their uses to the
537 while (!DeadNodes.empty()) {
538 SDNode *N = DeadNodes.pop_back_val();
541 UpdateListener->NodeDeleted(N, 0);
543 // Take the node out of the appropriate CSE map.
544 RemoveNodeFromCSEMaps(N);
546 // Next, brutally remove the operand list. This is safe to do, as there are
547 // no cycles in the graph.
548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
550 SDNode *Operand = Use.getNode();
553 // Now that we removed this operand, see if there are no uses of it left.
554 if (Operand->use_empty())
555 DeadNodes.push_back(Operand);
562 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
563 SmallVector<SDNode*, 16> DeadNodes(1, N);
564 RemoveDeadNodes(DeadNodes, UpdateListener);
567 void SelectionDAG::DeleteNode(SDNode *N) {
568 // First take this out of the appropriate CSE map.
569 RemoveNodeFromCSEMaps(N);
571 // Finally, remove uses due to operands of this node, remove from the
572 // AllNodes list, and delete the node.
573 DeleteNodeNotInCSEMaps(N);
576 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
577 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
578 assert(N->use_empty() && "Cannot delete a node that is not dead!");
580 // Drop all of the operands and decrement used node's use counts.
586 void SelectionDAG::DeallocateNode(SDNode *N) {
587 if (N->OperandsNeedDelete)
588 delete[] N->OperandList;
590 // Set the opcode to DELETED_NODE to help catch bugs when node
591 // memory is reallocated.
592 N->NodeType = ISD::DELETED_NODE;
594 NodeAllocator.Deallocate(AllNodes.remove(N));
596 // Remove the ordering of this node.
599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
602 DbgVals[i]->setIsInvalidated();
605 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
606 /// correspond to it. This is useful when we're about to delete or repurpose
607 /// the node. We don't want future request for structurally identical nodes
608 /// to return N anymore.
609 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
611 switch (N->getOpcode()) {
612 case ISD::EntryToken:
613 llvm_unreachable("EntryToken should not be in CSEMaps!");
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 Erased = CSEMap.RemoveNode(N);
648 // Verify that the node was actually in one of the CSE maps, unless it has a
649 // flag result (which cannot be CSE'd) or is one of the special cases that are
650 // not subject to CSE.
651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
652 !N->isMachineOpcode() && !doNotCSE(N)) {
655 llvm_unreachable("Node is not in map!");
661 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
662 /// maps and modified in place. Add it back to the CSE maps, unless an identical
663 /// node already exists, in which case transfer all its users to the existing
664 /// node. This transfer can potentially trigger recursive merging.
667 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
668 DAGUpdateListener *UpdateListener) {
669 // For node types that aren't CSE'd, just act as if no identical node
672 SDNode *Existing = CSEMap.GetOrInsertNode(N);
674 // If there was already an existing matching node, use ReplaceAllUsesWith
675 // to replace the dead one with the existing one. This can cause
676 // recursive merging of other unrelated nodes down the line.
677 ReplaceAllUsesWith(N, Existing, UpdateListener);
679 // N is now dead. Inform the listener if it exists and delete it.
681 UpdateListener->NodeDeleted(N, Existing);
682 DeleteNodeNotInCSEMaps(N);
687 // If the node doesn't already exist, we updated it. Inform a listener if
690 UpdateListener->NodeUpdated(N);
693 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
694 /// were replaced with those specified. If this node is never memoized,
695 /// return null, otherwise return a pointer to the slot it would take. If a
696 /// node already exists with these operands, the slot will be non-null.
697 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
702 SDValue Ops[] = { Op };
704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
705 AddNodeIDCustom(ID, N);
706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
710 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
711 /// were replaced with those specified. If this node is never memoized,
712 /// return null, otherwise return a pointer to the slot it would take. If a
713 /// node already exists with these operands, the slot will be non-null.
714 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
715 SDValue Op1, SDValue Op2,
720 SDValue Ops[] = { Op1, Op2 };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
723 AddNodeIDCustom(ID, N);
724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 const SDValue *Ops,unsigned NumOps,
740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
741 AddNodeIDCustom(ID, N);
742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
746 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
747 void SelectionDAG::VerifyNode(SDNode *N) {
748 switch (N->getOpcode()) {
751 case ISD::BUILD_PAIR: {
752 EVT VT = N->getValueType(0);
753 assert(N->getNumValues() == 1 && "Too many results!");
754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
755 "Wrong return type!");
756 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
758 "Mismatched operand types!");
759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
760 "Wrong operand type!");
761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
762 "Wrong return type size");
765 case ISD::BUILD_VECTOR: {
766 assert(N->getNumValues() == 1 && "Too many results!");
767 assert(N->getValueType(0).isVector() && "Wrong return type!");
768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
769 "Wrong number of operands!");
770 EVT EltVT = N->getValueType(0).getVectorElementType();
771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
772 assert((I->getValueType() == EltVT ||
773 (EltVT.isInteger() && I->getValueType().isInteger() &&
774 EltVT.bitsLE(I->getValueType()))) &&
775 "Wrong operand type!");
781 /// getEVTAlignment - Compute the default alignment value for the
784 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
785 const Type *Ty = VT == MVT::iPTR ?
786 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
787 VT.getTypeForEVT(*getContext());
789 return TLI.getTargetData()->getABITypeAlignment(Ty);
792 // EntryNode could meaningfully have debug info if we can find it...
793 SelectionDAG::SelectionDAG(const TargetMachine &tm)
794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
796 Root(getEntryNode()), Ordering(0) {
797 AllNodes.push_back(&EntryNode);
798 Ordering = new SDNodeOrdering();
799 DbgInfo = new SDDbgInfo();
802 void SelectionDAG::init(MachineFunction &mf) {
804 Context = &mf.getFunction()->getContext();
807 SelectionDAG::~SelectionDAG() {
813 void SelectionDAG::allnodes_clear() {
814 assert(&*AllNodes.begin() == &EntryNode);
815 AllNodes.remove(AllNodes.begin());
816 while (!AllNodes.empty())
817 DeallocateNode(AllNodes.begin());
820 void SelectionDAG::clear() {
822 OperandAllocator.Reset();
825 ExtendedValueTypeNodes.clear();
826 ExternalSymbols.clear();
827 TargetExternalSymbols.clear();
828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
829 static_cast<CondCodeSDNode*>(0));
830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
831 static_cast<SDNode*>(0));
833 EntryNode.UseList = 0;
834 AllNodes.push_back(&EntryNode);
835 Root = getEntryNode();
840 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
841 return VT.bitsGT(Op.getValueType()) ?
842 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
843 getNode(ISD::TRUNCATE, DL, VT, Op);
846 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
847 return VT.bitsGT(Op.getValueType()) ?
848 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
849 getNode(ISD::TRUNCATE, DL, VT, Op);
852 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
853 assert(!VT.isVector() &&
854 "getZeroExtendInReg should use the vector element type instead of "
856 if (Op.getValueType() == VT) return Op;
857 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
858 APInt Imm = APInt::getLowBitsSet(BitWidth,
860 return getNode(ISD::AND, DL, Op.getValueType(), Op,
861 getConstant(Imm, Op.getValueType()));
864 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
866 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
867 EVT EltVT = VT.getScalarType();
869 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
870 return getNode(ISD::XOR, DL, VT, Val, NegOne);
873 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
874 EVT EltVT = VT.getScalarType();
875 assert((EltVT.getSizeInBits() >= 64 ||
876 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
877 "getConstant with a uint64_t value that doesn't fit in the type!");
878 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
881 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
882 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
885 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
886 assert(VT.isInteger() && "Cannot create FP integer constant!");
888 EVT EltVT = VT.getScalarType();
889 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
890 "APInt size does not match type size!");
892 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
894 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
898 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
900 return SDValue(N, 0);
903 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
904 CSEMap.InsertNode(N, IP);
905 AllNodes.push_back(N);
908 SDValue Result(N, 0);
910 SmallVector<SDValue, 8> Ops;
911 Ops.assign(VT.getVectorNumElements(), Result);
912 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
917 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
918 return getConstant(Val, TLI.getPointerTy(), isTarget);
922 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
926 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
929 EVT EltVT = VT.getScalarType();
931 // Do the map lookup using the actual bit pattern for the floating point
932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
933 // we don't have issues with SNANs.
934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
942 return SDValue(N, 0);
945 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
946 CSEMap.InsertNode(N, IP);
947 AllNodes.push_back(N);
950 SDValue Result(N, 0);
952 SmallVector<SDValue, 8> Ops;
953 Ops.assign(VT.getVectorNumElements(), Result);
954 // FIXME DebugLoc info might be appropriate here
955 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
960 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
961 EVT EltVT = VT.getScalarType();
963 return getConstantFP(APFloat((float)Val), VT, isTarget);
964 else if (EltVT==MVT::f64)
965 return getConstantFP(APFloat(Val), VT, isTarget);
966 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
968 APFloat apf = APFloat(Val);
969 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
971 return getConstantFP(apf, VT, isTarget);
973 assert(0 && "Unsupported type in getConstantFP");
978 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
979 EVT VT, int64_t Offset,
981 unsigned char TargetFlags) {
982 assert((TargetFlags == 0 || isTargetGA) &&
983 "Cannot set target flags on target-independent globals");
985 // Truncate (with sign-extension) the offset value to the pointer size.
986 EVT PTy = TLI.getPointerTy();
987 unsigned BitWidth = PTy.getSizeInBits();
989 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
991 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
993 // If GV is an alias then use the aliasee for determining thread-localness.
994 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
995 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
999 if (GVar && GVar->isThreadLocal())
1000 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1002 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1004 FoldingSetNodeID ID;
1005 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1007 ID.AddInteger(Offset);
1008 ID.AddInteger(TargetFlags);
1010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1011 return SDValue(E, 0);
1013 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1014 Offset, TargetFlags);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1017 return SDValue(N, 0);
1020 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1021 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1022 FoldingSetNodeID ID;
1023 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1027 return SDValue(E, 0);
1029 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1030 CSEMap.InsertNode(N, IP);
1031 AllNodes.push_back(N);
1032 return SDValue(N, 0);
1035 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1036 unsigned char TargetFlags) {
1037 assert((TargetFlags == 0 || isTarget) &&
1038 "Cannot set target flags on target-independent jump tables");
1039 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1040 FoldingSetNodeID ID;
1041 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1043 ID.AddInteger(TargetFlags);
1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1046 return SDValue(E, 0);
1048 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1050 CSEMap.InsertNode(N, IP);
1051 AllNodes.push_back(N);
1052 return SDValue(N, 0);
1055 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1056 unsigned Alignment, int Offset,
1058 unsigned char TargetFlags) {
1059 assert((TargetFlags == 0 || isTarget) &&
1060 "Cannot set target flags on target-independent globals");
1062 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1063 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1064 FoldingSetNodeID ID;
1065 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1066 ID.AddInteger(Alignment);
1067 ID.AddInteger(Offset);
1069 ID.AddInteger(TargetFlags);
1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1072 return SDValue(E, 0);
1074 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1075 Alignment, TargetFlags);
1076 CSEMap.InsertNode(N, IP);
1077 AllNodes.push_back(N);
1078 return SDValue(N, 0);
1082 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1083 unsigned Alignment, int Offset,
1085 unsigned char TargetFlags) {
1086 assert((TargetFlags == 0 || isTarget) &&
1087 "Cannot set target flags on target-independent globals");
1089 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1090 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1091 FoldingSetNodeID ID;
1092 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1093 ID.AddInteger(Alignment);
1094 ID.AddInteger(Offset);
1095 C->AddSelectionDAGCSEId(ID);
1096 ID.AddInteger(TargetFlags);
1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1099 return SDValue(E, 0);
1101 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1102 Alignment, TargetFlags);
1103 CSEMap.InsertNode(N, IP);
1104 AllNodes.push_back(N);
1105 return SDValue(N, 0);
1108 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1109 FoldingSetNodeID ID;
1110 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1114 return SDValue(E, 0);
1116 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getValueType(EVT VT) {
1123 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1124 ValueTypeNodes.size())
1125 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1127 SDNode *&N = VT.isExtended() ?
1128 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1130 if (N) return SDValue(N, 0);
1131 N = new (NodeAllocator) VTSDNode(VT);
1132 AllNodes.push_back(N);
1133 return SDValue(N, 0);
1136 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1137 SDNode *&N = ExternalSymbols[Sym];
1138 if (N) return SDValue(N, 0);
1139 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1140 AllNodes.push_back(N);
1141 return SDValue(N, 0);
1144 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1145 unsigned char TargetFlags) {
1147 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1149 if (N) return SDValue(N, 0);
1150 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1151 AllNodes.push_back(N);
1152 return SDValue(N, 0);
1155 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1156 if ((unsigned)Cond >= CondCodeNodes.size())
1157 CondCodeNodes.resize(Cond+1);
1159 if (CondCodeNodes[Cond] == 0) {
1160 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1161 CondCodeNodes[Cond] = N;
1162 AllNodes.push_back(N);
1165 return SDValue(CondCodeNodes[Cond], 0);
1168 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1169 // the shuffle mask M that point at N1 to point at N2, and indices that point
1170 // N2 to point at N1.
1171 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1173 int NElts = M.size();
1174 for (int i = 0; i != NElts; ++i) {
1182 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1183 SDValue N2, const int *Mask) {
1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1185 assert(VT.isVector() && N1.getValueType().isVector() &&
1186 "Vector Shuffle VTs must be a vectors");
1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1188 && "Vector Shuffle VTs must have same element type");
1190 // Canonicalize shuffle undef, undef -> undef
1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1192 return getUNDEF(VT);
1194 // Validate that all indices in Mask are within the range of the elements
1195 // input to the shuffle.
1196 unsigned NElts = VT.getVectorNumElements();
1197 SmallVector<int, 8> MaskVec;
1198 for (unsigned i = 0; i != NElts; ++i) {
1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1200 MaskVec.push_back(Mask[i]);
1203 // Canonicalize shuffle v, v -> v, undef
1206 for (unsigned i = 0; i != NElts; ++i)
1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1211 if (N1.getOpcode() == ISD::UNDEF)
1212 commuteShuffle(N1, N2, MaskVec);
1214 // Canonicalize all index into lhs, -> shuffle lhs, undef
1215 // Canonicalize all index into rhs, -> shuffle rhs, undef
1216 bool AllLHS = true, AllRHS = true;
1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1218 for (unsigned i = 0; i != NElts; ++i) {
1219 if (MaskVec[i] >= (int)NElts) {
1224 } else if (MaskVec[i] >= 0) {
1228 if (AllLHS && AllRHS)
1229 return getUNDEF(VT);
1230 if (AllLHS && !N2Undef)
1234 commuteShuffle(N1, N2, MaskVec);
1237 // If Identity shuffle, or all shuffle in to undef, return that node.
1238 bool AllUndef = true;
1239 bool Identity = true;
1240 for (unsigned i = 0; i != NElts; ++i) {
1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1242 if (MaskVec[i] >= 0) AllUndef = false;
1244 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1247 return getUNDEF(VT);
1249 FoldingSetNodeID ID;
1250 SDValue Ops[2] = { N1, N2 };
1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1252 for (unsigned i = 0; i != NElts; ++i)
1253 ID.AddInteger(MaskVec[i]);
1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1257 return SDValue(E, 0);
1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1260 // SDNode doesn't have access to it. This memory will be "leaked" when
1261 // the node is deallocated, but recovered when the NodeAllocator is released.
1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1265 ShuffleVectorSDNode *N =
1266 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1267 CSEMap.InsertNode(N, IP);
1268 AllNodes.push_back(N);
1269 return SDValue(N, 0);
1272 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1273 SDValue Val, SDValue DTy,
1274 SDValue STy, SDValue Rnd, SDValue Sat,
1275 ISD::CvtCode Code) {
1276 // If the src and dest types are the same and the conversion is between
1277 // integer types of the same sign or two floats, no conversion is necessary.
1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1282 FoldingSetNodeID ID;
1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1287 return SDValue(E, 0);
1289 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1291 CSEMap.InsertNode(N, IP);
1292 AllNodes.push_back(N);
1293 return SDValue(N, 0);
1296 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1297 FoldingSetNodeID ID;
1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1299 ID.AddInteger(RegNo);
1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1302 return SDValue(E, 0);
1304 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1305 CSEMap.InsertNode(N, IP);
1306 AllNodes.push_back(N);
1307 return SDValue(N, 0);
1310 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1311 FoldingSetNodeID ID;
1312 SDValue Ops[] = { Root };
1313 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1314 ID.AddPointer(Label);
1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1317 return SDValue(E, 0);
1319 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1320 CSEMap.InsertNode(N, IP);
1321 AllNodes.push_back(N);
1322 return SDValue(N, 0);
1326 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1328 unsigned char TargetFlags) {
1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1331 FoldingSetNodeID ID;
1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1334 ID.AddInteger(TargetFlags);
1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1337 return SDValue(E, 0);
1339 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1340 CSEMap.InsertNode(N, IP);
1341 AllNodes.push_back(N);
1342 return SDValue(N, 0);
1345 SDValue SelectionDAG::getSrcValue(const Value *V) {
1346 assert((!V || V->getType()->isPointerTy()) &&
1347 "SrcValue is not a pointer?");
1349 FoldingSetNodeID ID;
1350 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1355 return SDValue(E, 0);
1357 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1358 CSEMap.InsertNode(N, IP);
1359 AllNodes.push_back(N);
1360 return SDValue(N, 0);
1363 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1364 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1371 return SDValue(E, 0);
1373 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1374 CSEMap.InsertNode(N, IP);
1375 AllNodes.push_back(N);
1376 return SDValue(N, 0);
1380 /// getShiftAmountOperand - Return the specified value casted to
1381 /// the target's desired shift amount type.
1382 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1383 EVT OpTy = Op.getValueType();
1384 MVT ShTy = TLI.getShiftAmountTy();
1385 if (OpTy == ShTy || OpTy.isVector()) return Op;
1387 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1388 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1391 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1392 /// specified value type.
1393 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1395 unsigned ByteSize = VT.getStoreSize();
1396 const Type *Ty = VT.getTypeForEVT(*getContext());
1397 unsigned StackAlign =
1398 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1400 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1401 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1404 /// CreateStackTemporary - Create a stack temporary suitable for holding
1405 /// either of the specified value types.
1406 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1407 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1408 VT2.getStoreSizeInBits())/8;
1409 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1410 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1411 const TargetData *TD = TLI.getTargetData();
1412 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1413 TD->getPrefTypeAlignment(Ty2));
1415 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1416 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1417 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1420 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1421 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1422 // These setcc operations always fold.
1426 case ISD::SETFALSE2: return getConstant(0, VT);
1428 case ISD::SETTRUE2: return getConstant(1, VT);
1440 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1444 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1445 const APInt &C2 = N2C->getAPIntValue();
1446 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1447 const APInt &C1 = N1C->getAPIntValue();
1450 default: llvm_unreachable("Unknown integer setcc!");
1451 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1452 case ISD::SETNE: return getConstant(C1 != C2, VT);
1453 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1454 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1455 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1456 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1457 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1458 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1459 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1460 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1464 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1465 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1466 // No compile time operations on this type yet.
1467 if (N1C->getValueType(0) == MVT::ppcf128)
1470 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1473 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1474 return getUNDEF(VT);
1476 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1477 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1478 return getUNDEF(VT);
1480 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1481 R==APFloat::cmpLessThan, VT);
1482 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1483 return getUNDEF(VT);
1485 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1486 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1487 return getUNDEF(VT);
1489 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1490 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1491 return getUNDEF(VT);
1493 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1494 R==APFloat::cmpEqual, VT);
1495 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1496 return getUNDEF(VT);
1498 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1499 R==APFloat::cmpEqual, VT);
1500 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1501 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1502 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1503 R==APFloat::cmpEqual, VT);
1504 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1505 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1506 R==APFloat::cmpLessThan, VT);
1507 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1508 R==APFloat::cmpUnordered, VT);
1509 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1510 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1513 // Ensure that the constant occurs on the RHS.
1514 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1518 // Could not fold it.
1522 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1523 /// use this predicate to simplify operations downstream.
1524 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1525 // This predicate is not safe for vector operations.
1526 if (Op.getValueType().isVector())
1529 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1530 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1533 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1534 /// this predicate to simplify operations downstream. Mask is known to be zero
1535 /// for bits that V cannot have.
1536 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1537 unsigned Depth) const {
1538 APInt KnownZero, KnownOne;
1539 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1540 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1541 return (KnownZero & Mask) == Mask;
1544 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1545 /// known to be either zero or one and return them in the KnownZero/KnownOne
1546 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1548 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1549 APInt &KnownZero, APInt &KnownOne,
1550 unsigned Depth) const {
1551 unsigned BitWidth = Mask.getBitWidth();
1552 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1553 "Mask size mismatches value type size!");
1555 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1556 if (Depth == 6 || Mask == 0)
1557 return; // Limit search depth.
1559 APInt KnownZero2, KnownOne2;
1561 switch (Op.getOpcode()) {
1563 // We know all of the bits for a constant!
1564 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1565 KnownZero = ~KnownOne & Mask;
1568 // If either the LHS or the RHS are Zero, the result is zero.
1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1571 KnownZero2, KnownOne2, Depth+1);
1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1575 // Output known-1 bits are only known if set in both the LHS & RHS.
1576 KnownOne &= KnownOne2;
1577 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1578 KnownZero |= KnownZero2;
1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1582 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1583 KnownZero2, KnownOne2, Depth+1);
1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1587 // Output known-0 bits are only known if clear in both the LHS & RHS.
1588 KnownZero &= KnownZero2;
1589 // Output known-1 are known to be set if set in either the LHS | RHS.
1590 KnownOne |= KnownOne2;
1593 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1594 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1595 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1596 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1598 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1599 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1600 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1601 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1602 KnownZero = KnownZeroOut;
1606 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1607 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1608 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1610 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1612 // If low bits are zero in either operand, output low known-0 bits.
1613 // Also compute a conserative estimate for high known-0 bits.
1614 // More trickiness is possible, but this is sufficient for the
1615 // interesting case of alignment computation.
1617 unsigned TrailZ = KnownZero.countTrailingOnes() +
1618 KnownZero2.countTrailingOnes();
1619 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1620 KnownZero2.countLeadingOnes(),
1621 BitWidth) - BitWidth;
1623 TrailZ = std::min(TrailZ, BitWidth);
1624 LeadZ = std::min(LeadZ, BitWidth);
1625 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1626 APInt::getHighBitsSet(BitWidth, LeadZ);
1631 // For the purposes of computing leading zeros we can conservatively
1632 // treat a udiv as a logical right shift by the power of 2 known to
1633 // be less than the denominator.
1634 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1635 ComputeMaskedBits(Op.getOperand(0),
1636 AllOnes, KnownZero2, KnownOne2, Depth+1);
1637 unsigned LeadZ = KnownZero2.countLeadingOnes();
1641 ComputeMaskedBits(Op.getOperand(1),
1642 AllOnes, KnownZero2, KnownOne2, Depth+1);
1643 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1644 if (RHSUnknownLeadingOnes != BitWidth)
1645 LeadZ = std::min(BitWidth,
1646 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1648 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1652 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1657 // Only known if known in both the LHS and RHS.
1658 KnownOne &= KnownOne2;
1659 KnownZero &= KnownZero2;
1661 case ISD::SELECT_CC:
1662 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1663 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1664 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1665 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1667 // Only known if known in both the LHS and RHS.
1668 KnownOne &= KnownOne2;
1669 KnownZero &= KnownZero2;
1677 if (Op.getResNo() != 1)
1679 // The boolean result conforms to getBooleanContents. Fall through.
1681 // If we know the result of a setcc has the top bits zero, use this info.
1682 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1684 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1687 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1688 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1689 unsigned ShAmt = SA->getZExtValue();
1691 // If the shift count is an invalid immediate, don't do anything.
1692 if (ShAmt >= BitWidth)
1695 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1696 KnownZero, KnownOne, Depth+1);
1697 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1698 KnownZero <<= ShAmt;
1700 // low bits known zero.
1701 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1705 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1706 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1707 unsigned ShAmt = SA->getZExtValue();
1709 // If the shift count is an invalid immediate, don't do anything.
1710 if (ShAmt >= BitWidth)
1713 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1714 KnownZero, KnownOne, Depth+1);
1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1716 KnownZero = KnownZero.lshr(ShAmt);
1717 KnownOne = KnownOne.lshr(ShAmt);
1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1720 KnownZero |= HighBits; // High bits known zero.
1724 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1725 unsigned ShAmt = SA->getZExtValue();
1727 // If the shift count is an invalid immediate, don't do anything.
1728 if (ShAmt >= BitWidth)
1731 APInt InDemandedMask = (Mask << ShAmt);
1732 // If any of the demanded bits are produced by the sign extension, we also
1733 // demand the input sign bit.
1734 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1735 if (HighBits.getBoolValue())
1736 InDemandedMask |= APInt::getSignBit(BitWidth);
1738 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1740 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1741 KnownZero = KnownZero.lshr(ShAmt);
1742 KnownOne = KnownOne.lshr(ShAmt);
1744 // Handle the sign bits.
1745 APInt SignBit = APInt::getSignBit(BitWidth);
1746 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1748 if (KnownZero.intersects(SignBit)) {
1749 KnownZero |= HighBits; // New bits are known zero.
1750 } else if (KnownOne.intersects(SignBit)) {
1751 KnownOne |= HighBits; // New bits are known one.
1755 case ISD::SIGN_EXTEND_INREG: {
1756 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1757 unsigned EBits = EVT.getScalarType().getSizeInBits();
1759 // Sign extension. Compute the demanded bits in the result that are not
1760 // present in the input.
1761 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1763 APInt InSignBit = APInt::getSignBit(EBits);
1764 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1766 // If the sign extended bits are demanded, we know that the sign
1768 InSignBit.zext(BitWidth);
1769 if (NewBits.getBoolValue())
1770 InputDemandedBits |= InSignBit;
1772 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1773 KnownZero, KnownOne, Depth+1);
1774 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1776 // If the sign bit of the input is known set or clear, then we know the
1777 // top bits of the result.
1778 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1779 KnownZero |= NewBits;
1780 KnownOne &= ~NewBits;
1781 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1782 KnownOne |= NewBits;
1783 KnownZero &= ~NewBits;
1784 } else { // Input sign bit unknown
1785 KnownZero &= ~NewBits;
1786 KnownOne &= ~NewBits;
1793 unsigned LowBits = Log2_32(BitWidth)+1;
1794 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1799 if (ISD::isZEXTLoad(Op.getNode())) {
1800 LoadSDNode *LD = cast<LoadSDNode>(Op);
1801 EVT VT = LD->getMemoryVT();
1802 unsigned MemBits = VT.getScalarType().getSizeInBits();
1803 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1807 case ISD::ZERO_EXTEND: {
1808 EVT InVT = Op.getOperand(0).getValueType();
1809 unsigned InBits = InVT.getScalarType().getSizeInBits();
1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1811 APInt InMask = Mask;
1812 InMask.trunc(InBits);
1813 KnownZero.trunc(InBits);
1814 KnownOne.trunc(InBits);
1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1816 KnownZero.zext(BitWidth);
1817 KnownOne.zext(BitWidth);
1818 KnownZero |= NewBits;
1821 case ISD::SIGN_EXTEND: {
1822 EVT InVT = Op.getOperand(0).getValueType();
1823 unsigned InBits = InVT.getScalarType().getSizeInBits();
1824 APInt InSignBit = APInt::getSignBit(InBits);
1825 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1826 APInt InMask = Mask;
1827 InMask.trunc(InBits);
1829 // If any of the sign extended bits are demanded, we know that the sign
1830 // bit is demanded. Temporarily set this bit in the mask for our callee.
1831 if (NewBits.getBoolValue())
1832 InMask |= InSignBit;
1834 KnownZero.trunc(InBits);
1835 KnownOne.trunc(InBits);
1836 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1838 // Note if the sign bit is known to be zero or one.
1839 bool SignBitKnownZero = KnownZero.isNegative();
1840 bool SignBitKnownOne = KnownOne.isNegative();
1841 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1842 "Sign bit can't be known to be both zero and one!");
1844 // If the sign bit wasn't actually demanded by our caller, we don't
1845 // want it set in the KnownZero and KnownOne result values. Reset the
1846 // mask and reapply it to the result values.
1848 InMask.trunc(InBits);
1849 KnownZero &= InMask;
1852 KnownZero.zext(BitWidth);
1853 KnownOne.zext(BitWidth);
1855 // If the sign bit is known zero or one, the top bits match.
1856 if (SignBitKnownZero)
1857 KnownZero |= NewBits;
1858 else if (SignBitKnownOne)
1859 KnownOne |= NewBits;
1862 case ISD::ANY_EXTEND: {
1863 EVT InVT = Op.getOperand(0).getValueType();
1864 unsigned InBits = InVT.getScalarType().getSizeInBits();
1865 APInt InMask = Mask;
1866 InMask.trunc(InBits);
1867 KnownZero.trunc(InBits);
1868 KnownOne.trunc(InBits);
1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1870 KnownZero.zext(BitWidth);
1871 KnownOne.zext(BitWidth);
1874 case ISD::TRUNCATE: {
1875 EVT InVT = Op.getOperand(0).getValueType();
1876 unsigned InBits = InVT.getScalarType().getSizeInBits();
1877 APInt InMask = Mask;
1878 InMask.zext(InBits);
1879 KnownZero.zext(InBits);
1880 KnownOne.zext(InBits);
1881 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1882 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1883 KnownZero.trunc(BitWidth);
1884 KnownOne.trunc(BitWidth);
1887 case ISD::AssertZext: {
1888 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1889 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1890 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1892 KnownZero |= (~InMask) & Mask;
1896 // All bits are zero except the low bit.
1897 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1901 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1902 // We know that the top bits of C-X are clear if X contains less bits
1903 // than C (i.e. no wrap-around can happen). For example, 20-X is
1904 // positive if we can prove that X is >= 0 and < 16.
1905 if (CLHS->getAPIntValue().isNonNegative()) {
1906 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1907 // NLZ can't be BitWidth with no sign bit
1908 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1909 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1912 // If all of the MaskV bits are known to be zero, then we know the
1913 // output top bits are zero, because we now know that the output is
1915 if ((KnownZero2 & MaskV) == MaskV) {
1916 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1917 // Top bits known zero.
1918 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1925 // Output known-0 bits are known if clear or set in both the low clear bits
1926 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1927 // low 3 bits clear.
1928 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1929 BitWidth - Mask.countLeadingZeros());
1930 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1931 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1932 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1934 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1936 KnownZeroOut = std::min(KnownZeroOut,
1937 KnownZero2.countTrailingOnes());
1939 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1943 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1944 const APInt &RA = Rem->getAPIntValue().abs();
1945 if (RA.isPowerOf2()) {
1946 APInt LowBits = RA - 1;
1947 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1948 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1950 // The low bits of the first operand are unchanged by the srem.
1951 KnownZero = KnownZero2 & LowBits;
1952 KnownOne = KnownOne2 & LowBits;
1954 // If the first operand is non-negative or has all low bits zero, then
1955 // the upper bits are all zero.
1956 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1957 KnownZero |= ~LowBits;
1959 // If the first operand is negative and not all low bits are zero, then
1960 // the upper bits are all one.
1961 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1962 KnownOne |= ~LowBits;
1967 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1972 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1973 const APInt &RA = Rem->getAPIntValue();
1974 if (RA.isPowerOf2()) {
1975 APInt LowBits = (RA - 1);
1976 APInt Mask2 = LowBits & Mask;
1977 KnownZero |= ~LowBits & Mask;
1978 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1979 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1984 // Since the result is less than or equal to either operand, any leading
1985 // zero bits in either operand must also exist in the result.
1986 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1987 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1989 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1992 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1993 KnownZero2.countLeadingOnes());
1995 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1999 // Allow the target to implement this method for its nodes.
2000 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2001 case ISD::INTRINSIC_WO_CHAIN:
2002 case ISD::INTRINSIC_W_CHAIN:
2003 case ISD::INTRINSIC_VOID:
2004 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2011 /// ComputeNumSignBits - Return the number of times the sign bit of the
2012 /// register is replicated into the other bits. We know that at least 1 bit
2013 /// is always equal to the sign bit (itself), but other cases can give us
2014 /// information. For example, immediately after an "SRA X, 2", we know that
2015 /// the top 3 bits are all equal to each other, so we return 3.
2016 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2017 EVT VT = Op.getValueType();
2018 assert(VT.isInteger() && "Invalid VT!");
2019 unsigned VTBits = VT.getScalarType().getSizeInBits();
2021 unsigned FirstAnswer = 1;
2024 return 1; // Limit search depth.
2026 switch (Op.getOpcode()) {
2028 case ISD::AssertSext:
2029 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2030 return VTBits-Tmp+1;
2031 case ISD::AssertZext:
2032 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2035 case ISD::Constant: {
2036 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2037 // If negative, return # leading ones.
2038 if (Val.isNegative())
2039 return Val.countLeadingOnes();
2041 // Return # leading zeros.
2042 return Val.countLeadingZeros();
2045 case ISD::SIGN_EXTEND:
2046 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2047 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2049 case ISD::SIGN_EXTEND_INREG:
2050 // Max of the input and what this extends.
2052 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2055 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2056 return std::max(Tmp, Tmp2);
2059 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2060 // SRA X, C -> adds C sign bits.
2061 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2062 Tmp += C->getZExtValue();
2063 if (Tmp > VTBits) Tmp = VTBits;
2067 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2068 // shl destroys sign bits.
2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2070 if (C->getZExtValue() >= VTBits || // Bad shift.
2071 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2072 return Tmp - C->getZExtValue();
2077 case ISD::XOR: // NOT is handled here.
2078 // Logical binary ops preserve the number of sign bits at the worst.
2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2081 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2082 FirstAnswer = std::min(Tmp, Tmp2);
2083 // We computed what we know about the sign bits as our first
2084 // answer. Now proceed to the generic code that uses
2085 // ComputeMaskedBits, and pick whichever answer is better.
2090 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2091 if (Tmp == 1) return 1; // Early out.
2092 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2093 return std::min(Tmp, Tmp2);
2101 if (Op.getResNo() != 1)
2103 // The boolean result conforms to getBooleanContents. Fall through.
2105 // If setcc returns 0/-1, all bits are sign bits.
2106 if (TLI.getBooleanContents() ==
2107 TargetLowering::ZeroOrNegativeOneBooleanContent)
2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2113 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2115 // Handle rotate right by N like a rotate left by 32-N.
2116 if (Op.getOpcode() == ISD::ROTR)
2117 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2119 // If we aren't rotating out all of the known-in sign bits, return the
2120 // number that are left. This handles rotl(sext(x), 1) for example.
2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2122 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2126 // Add can have at most one carry bit. Thus we know that the output
2127 // is, at worst, one more bit than the inputs.
2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2129 if (Tmp == 1) return 1; // Early out.
2131 // Special case decrementing a value (ADD X, -1):
2132 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2133 if (CRHS->isAllOnesValue()) {
2134 APInt KnownZero, KnownOne;
2135 APInt Mask = APInt::getAllOnesValue(VTBits);
2136 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2138 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2140 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2143 // If we are subtracting one from a positive number, there is no carry
2144 // out of the result.
2145 if (KnownZero.isNegative())
2149 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2150 if (Tmp2 == 1) return 1;
2151 return std::min(Tmp, Tmp2)-1;
2155 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2156 if (Tmp2 == 1) return 1;
2159 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2160 if (CLHS->isNullValue()) {
2161 APInt KnownZero, KnownOne;
2162 APInt Mask = APInt::getAllOnesValue(VTBits);
2163 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2164 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2166 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2169 // If the input is known to be positive (the sign bit is known clear),
2170 // the output of the NEG has the same number of sign bits as the input.
2171 if (KnownZero.isNegative())
2174 // Otherwise, we treat this like a SUB.
2177 // Sub can have at most one carry bit. Thus we know that the output
2178 // is, at worst, one more bit than the inputs.
2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2180 if (Tmp == 1) return 1; // Early out.
2181 return std::min(Tmp, Tmp2)-1;
2184 // FIXME: it's tricky to do anything useful for this, but it is an important
2185 // case for targets like X86.
2189 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2190 if (Op.getOpcode() == ISD::LOAD) {
2191 LoadSDNode *LD = cast<LoadSDNode>(Op);
2192 unsigned ExtType = LD->getExtensionType();
2195 case ISD::SEXTLOAD: // '17' bits known
2196 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2197 return VTBits-Tmp+1;
2198 case ISD::ZEXTLOAD: // '16' bits known
2199 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2204 // Allow the target to implement this method for its nodes.
2205 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2206 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2207 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2208 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2209 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2210 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2213 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2214 // use this information.
2215 APInt KnownZero, KnownOne;
2216 APInt Mask = APInt::getAllOnesValue(VTBits);
2217 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2219 if (KnownZero.isNegative()) { // sign bit is 0
2221 } else if (KnownOne.isNegative()) { // sign bit is 1;
2228 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2229 // the number of identical bits in the top of the input value.
2231 Mask <<= Mask.getBitWidth()-VTBits;
2232 // Return # leading zeros. We use 'min' here in case Val was zero before
2233 // shifting. We don't want to return '64' as for an i32 "0".
2234 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2237 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2238 // If we're told that NaNs won't happen, assume they won't.
2239 if (FiniteOnlyFPMath())
2242 // If the value is a constant, we can obviously see if it is a NaN or not.
2243 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2244 return !C->getValueAPF().isNaN();
2246 // TODO: Recognize more cases here.
2251 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2252 // If the value is a constant, we can obviously see if it is a zero or not.
2253 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2254 return !C->isZero();
2256 // TODO: Recognize more cases here.
2261 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2262 // Check the obvious case.
2263 if (A == B) return true;
2265 // For for negative and positive zero.
2266 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2267 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2268 if (CA->isZero() && CB->isZero()) return true;
2270 // Otherwise they may not be equal.
2274 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2275 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2276 if (!GA) return false;
2277 if (GA->getOffset() != 0) return false;
2278 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2279 if (!GV) return false;
2280 return MF->getMMI().hasDebugInfo();
2284 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2285 /// element of the result of the vector shuffle.
2286 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2288 EVT VT = N->getValueType(0);
2289 if (N->getMaskElt(i) < 0)
2290 return getUNDEF(VT.getVectorElementType());
2291 unsigned Index = N->getMaskElt(i);
2292 unsigned NumElems = VT.getVectorNumElements();
2293 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2296 if (V.getOpcode() == ISD::BIT_CONVERT) {
2297 V = V.getOperand(0);
2298 EVT VVT = V.getValueType();
2299 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2302 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2303 return (Index == 0) ? V.getOperand(0)
2304 : getUNDEF(VT.getVectorElementType());
2305 if (V.getOpcode() == ISD::BUILD_VECTOR)
2306 return V.getOperand(Index);
2307 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2308 return getShuffleScalarElt(SVN, Index);
2313 /// getNode - Gets or creates the specified node.
2315 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2316 FoldingSetNodeID ID;
2317 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2320 return SDValue(E, 0);
2322 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2323 CSEMap.InsertNode(N, IP);
2325 AllNodes.push_back(N);
2329 return SDValue(N, 0);
2332 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2333 EVT VT, SDValue Operand) {
2334 // Constant fold unary operations with an integer constant operand.
2335 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2336 const APInt &Val = C->getAPIntValue();
2339 case ISD::SIGN_EXTEND:
2340 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2341 case ISD::ANY_EXTEND:
2342 case ISD::ZERO_EXTEND:
2344 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2345 case ISD::UINT_TO_FP:
2346 case ISD::SINT_TO_FP: {
2347 const uint64_t zero[] = {0, 0};
2348 // No compile time operations on ppcf128.
2349 if (VT == MVT::ppcf128) break;
2350 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2351 (void)apf.convertFromAPInt(Val,
2352 Opcode==ISD::SINT_TO_FP,
2353 APFloat::rmNearestTiesToEven);
2354 return getConstantFP(apf, VT);
2356 case ISD::BIT_CONVERT:
2357 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2358 return getConstantFP(Val.bitsToFloat(), VT);
2359 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2360 return getConstantFP(Val.bitsToDouble(), VT);
2363 return getConstant(Val.byteSwap(), VT);
2365 return getConstant(Val.countPopulation(), VT);
2367 return getConstant(Val.countLeadingZeros(), VT);
2369 return getConstant(Val.countTrailingZeros(), VT);
2373 // Constant fold unary operations with a floating point constant operand.
2374 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2375 APFloat V = C->getValueAPF(); // make copy
2376 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2380 return getConstantFP(V, VT);
2383 return getConstantFP(V, VT);
2385 case ISD::FP_EXTEND: {
2387 // This can return overflow, underflow, or inexact; we don't care.
2388 // FIXME need to be more flexible about rounding mode.
2389 (void)V.convert(*EVTToAPFloatSemantics(VT),
2390 APFloat::rmNearestTiesToEven, &ignored);
2391 return getConstantFP(V, VT);
2393 case ISD::FP_TO_SINT:
2394 case ISD::FP_TO_UINT: {
2397 assert(integerPartWidth >= 64);
2398 // FIXME need to be more flexible about rounding mode.
2399 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2400 Opcode==ISD::FP_TO_SINT,
2401 APFloat::rmTowardZero, &ignored);
2402 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2404 APInt api(VT.getSizeInBits(), 2, x);
2405 return getConstant(api, VT);
2407 case ISD::BIT_CONVERT:
2408 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2409 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2410 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2411 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2417 unsigned OpOpcode = Operand.getNode()->getOpcode();
2419 case ISD::TokenFactor:
2420 case ISD::MERGE_VALUES:
2421 case ISD::CONCAT_VECTORS:
2422 return Operand; // Factor, merge or concat of one node? No need.
2423 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2424 case ISD::FP_EXTEND:
2425 assert(VT.isFloatingPoint() &&
2426 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2427 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2428 assert((!VT.isVector() ||
2429 VT.getVectorNumElements() ==
2430 Operand.getValueType().getVectorNumElements()) &&
2431 "Vector element count mismatch!");
2432 if (Operand.getOpcode() == ISD::UNDEF)
2433 return getUNDEF(VT);
2435 case ISD::SIGN_EXTEND:
2436 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2437 "Invalid SIGN_EXTEND!");
2438 if (Operand.getValueType() == VT) return Operand; // noop extension
2439 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2440 "Invalid sext node, dst < src!");
2441 assert((!VT.isVector() ||
2442 VT.getVectorNumElements() ==
2443 Operand.getValueType().getVectorNumElements()) &&
2444 "Vector element count mismatch!");
2445 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2446 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2448 case ISD::ZERO_EXTEND:
2449 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2450 "Invalid ZERO_EXTEND!");
2451 if (Operand.getValueType() == VT) return Operand; // noop extension
2452 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2453 "Invalid zext node, dst < src!");
2454 assert((!VT.isVector() ||
2455 VT.getVectorNumElements() ==
2456 Operand.getValueType().getVectorNumElements()) &&
2457 "Vector element count mismatch!");
2458 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2459 return getNode(ISD::ZERO_EXTEND, DL, VT,
2460 Operand.getNode()->getOperand(0));
2462 case ISD::ANY_EXTEND:
2463 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2464 "Invalid ANY_EXTEND!");
2465 if (Operand.getValueType() == VT) return Operand; // noop extension
2466 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2467 "Invalid anyext node, dst < src!");
2468 assert((!VT.isVector() ||
2469 VT.getVectorNumElements() ==
2470 Operand.getValueType().getVectorNumElements()) &&
2471 "Vector element count mismatch!");
2473 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2474 OpOpcode == ISD::ANY_EXTEND)
2475 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2476 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2478 // (ext (trunx x)) -> x
2479 if (OpOpcode == ISD::TRUNCATE) {
2480 SDValue OpOp = Operand.getNode()->getOperand(0);
2481 if (OpOp.getValueType() == VT)
2486 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2487 "Invalid TRUNCATE!");
2488 if (Operand.getValueType() == VT) return Operand; // noop truncate
2489 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2490 "Invalid truncate node, src < dst!");
2491 assert((!VT.isVector() ||
2492 VT.getVectorNumElements() ==
2493 Operand.getValueType().getVectorNumElements()) &&
2494 "Vector element count mismatch!");
2495 if (OpOpcode == ISD::TRUNCATE)
2496 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2497 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2498 OpOpcode == ISD::ANY_EXTEND) {
2499 // If the source is smaller than the dest, we still need an extend.
2500 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2501 .bitsLT(VT.getScalarType()))
2502 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2503 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2504 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2506 return Operand.getNode()->getOperand(0);
2509 case ISD::BIT_CONVERT:
2510 // Basic sanity checking.
2511 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2512 && "Cannot BIT_CONVERT between types of different sizes!");
2513 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2514 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2515 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2516 if (OpOpcode == ISD::UNDEF)
2517 return getUNDEF(VT);
2519 case ISD::SCALAR_TO_VECTOR:
2520 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2521 (VT.getVectorElementType() == Operand.getValueType() ||
2522 (VT.getVectorElementType().isInteger() &&
2523 Operand.getValueType().isInteger() &&
2524 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2525 "Illegal SCALAR_TO_VECTOR node!");
2526 if (OpOpcode == ISD::UNDEF)
2527 return getUNDEF(VT);
2528 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2529 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2530 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2531 Operand.getConstantOperandVal(1) == 0 &&
2532 Operand.getOperand(0).getValueType() == VT)
2533 return Operand.getOperand(0);
2536 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2537 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2538 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2539 Operand.getNode()->getOperand(0));
2540 if (OpOpcode == ISD::FNEG) // --X -> X
2541 return Operand.getNode()->getOperand(0);
2544 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2545 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2550 SDVTList VTs = getVTList(VT);
2551 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2552 FoldingSetNodeID ID;
2553 SDValue Ops[1] = { Operand };
2554 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2556 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2557 return SDValue(E, 0);
2559 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2560 CSEMap.InsertNode(N, IP);
2562 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2565 AllNodes.push_back(N);
2569 return SDValue(N, 0);
2572 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2574 ConstantSDNode *Cst1,
2575 ConstantSDNode *Cst2) {
2576 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2579 case ISD::ADD: return getConstant(C1 + C2, VT);
2580 case ISD::SUB: return getConstant(C1 - C2, VT);
2581 case ISD::MUL: return getConstant(C1 * C2, VT);
2583 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2586 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2589 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2592 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2594 case ISD::AND: return getConstant(C1 & C2, VT);
2595 case ISD::OR: return getConstant(C1 | C2, VT);
2596 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2597 case ISD::SHL: return getConstant(C1 << C2, VT);
2598 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2599 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2600 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2601 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2608 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2609 SDValue N1, SDValue N2) {
2610 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2611 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2614 case ISD::TokenFactor:
2615 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2616 N2.getValueType() == MVT::Other && "Invalid token factor!");
2617 // Fold trivial token factors.
2618 if (N1.getOpcode() == ISD::EntryToken) return N2;
2619 if (N2.getOpcode() == ISD::EntryToken) return N1;
2620 if (N1 == N2) return N1;
2622 case ISD::CONCAT_VECTORS:
2623 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2624 // one big BUILD_VECTOR.
2625 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2626 N2.getOpcode() == ISD::BUILD_VECTOR) {
2627 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2628 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2629 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2633 assert(VT.isInteger() && "This operator does not apply to FP types!");
2634 assert(N1.getValueType() == N2.getValueType() &&
2635 N1.getValueType() == VT && "Binary operator types must match!");
2636 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2637 // worth handling here.
2638 if (N2C && N2C->isNullValue())
2640 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2647 assert(VT.isInteger() && "This operator does not apply to FP types!");
2648 assert(N1.getValueType() == N2.getValueType() &&
2649 N1.getValueType() == VT && "Binary operator types must match!");
2650 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2651 // it's worth handling here.
2652 if (N2C && N2C->isNullValue())
2662 assert(VT.isInteger() && "This operator does not apply to FP types!");
2663 assert(N1.getValueType() == N2.getValueType() &&
2664 N1.getValueType() == VT && "Binary operator types must match!");
2672 if (Opcode == ISD::FADD) {
2674 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2675 if (CFP->getValueAPF().isZero())
2678 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2679 if (CFP->getValueAPF().isZero())
2681 } else if (Opcode == ISD::FSUB) {
2683 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2684 if (CFP->getValueAPF().isZero())
2688 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2689 assert(N1.getValueType() == N2.getValueType() &&
2690 N1.getValueType() == VT && "Binary operator types must match!");
2692 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2693 assert(N1.getValueType() == VT &&
2694 N1.getValueType().isFloatingPoint() &&
2695 N2.getValueType().isFloatingPoint() &&
2696 "Invalid FCOPYSIGN!");
2703 assert(VT == N1.getValueType() &&
2704 "Shift operators return type must be the same as their first arg");
2705 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2706 "Shifts only work on integers");
2708 // Always fold shifts of i1 values so the code generator doesn't need to
2709 // handle them. Since we know the size of the shift has to be less than the
2710 // size of the value, the shift/rotate count is guaranteed to be zero.
2713 if (N2C && N2C->isNullValue())
2716 case ISD::FP_ROUND_INREG: {
2717 EVT EVT = cast<VTSDNode>(N2)->getVT();
2718 assert(VT == N1.getValueType() && "Not an inreg round!");
2719 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2720 "Cannot FP_ROUND_INREG integer types");
2721 assert(EVT.isVector() == VT.isVector() &&
2722 "FP_ROUND_INREG type should be vector iff the operand "
2724 assert((!EVT.isVector() ||
2725 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2726 "Vector element counts must match in FP_ROUND_INREG");
2727 assert(EVT.bitsLE(VT) && "Not rounding down!");
2728 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2732 assert(VT.isFloatingPoint() &&
2733 N1.getValueType().isFloatingPoint() &&
2734 VT.bitsLE(N1.getValueType()) &&
2735 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2736 if (N1.getValueType() == VT) return N1; // noop conversion.
2738 case ISD::AssertSext:
2739 case ISD::AssertZext: {
2740 EVT EVT = cast<VTSDNode>(N2)->getVT();
2741 assert(VT == N1.getValueType() && "Not an inreg extend!");
2742 assert(VT.isInteger() && EVT.isInteger() &&
2743 "Cannot *_EXTEND_INREG FP types");
2744 assert(!EVT.isVector() &&
2745 "AssertSExt/AssertZExt type should be the vector element type "
2746 "rather than the vector type!");
2747 assert(EVT.bitsLE(VT) && "Not extending!");
2748 if (VT == EVT) return N1; // noop assertion.
2751 case ISD::SIGN_EXTEND_INREG: {
2752 EVT EVT = cast<VTSDNode>(N2)->getVT();
2753 assert(VT == N1.getValueType() && "Not an inreg extend!");
2754 assert(VT.isInteger() && EVT.isInteger() &&
2755 "Cannot *_EXTEND_INREG FP types");
2756 assert(EVT.isVector() == VT.isVector() &&
2757 "SIGN_EXTEND_INREG type should be vector iff the operand "
2759 assert((!EVT.isVector() ||
2760 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2761 "Vector element counts must match in SIGN_EXTEND_INREG");
2762 assert(EVT.bitsLE(VT) && "Not extending!");
2763 if (EVT == VT) return N1; // Not actually extending
2766 APInt Val = N1C->getAPIntValue();
2767 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2768 Val <<= Val.getBitWidth()-FromBits;
2769 Val = Val.ashr(Val.getBitWidth()-FromBits);
2770 return getConstant(Val, VT);
2774 case ISD::EXTRACT_VECTOR_ELT:
2775 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2776 if (N1.getOpcode() == ISD::UNDEF)
2777 return getUNDEF(VT);
2779 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2780 // expanding copies of large vectors from registers.
2782 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2783 N1.getNumOperands() > 0) {
2785 N1.getOperand(0).getValueType().getVectorNumElements();
2786 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2787 N1.getOperand(N2C->getZExtValue() / Factor),
2788 getConstant(N2C->getZExtValue() % Factor,
2789 N2.getValueType()));
2792 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2793 // expanding large vector constants.
2794 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2795 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2796 EVT VEltTy = N1.getValueType().getVectorElementType();
2797 if (Elt.getValueType() != VEltTy) {
2798 // If the vector element type is not legal, the BUILD_VECTOR operands
2799 // are promoted and implicitly truncated. Make that explicit here.
2800 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2803 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2804 // result is implicitly extended.
2805 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2810 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2811 // operations are lowered to scalars.
2812 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2813 // If the indices are the same, return the inserted element else
2814 // if the indices are known different, extract the element from
2815 // the original vector.
2816 SDValue N1Op2 = N1.getOperand(2);
2817 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2819 if (N1Op2C && N2C) {
2820 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2821 if (VT == N1.getOperand(1).getValueType())
2822 return N1.getOperand(1);
2824 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2827 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2831 case ISD::EXTRACT_ELEMENT:
2832 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2833 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2834 (N1.getValueType().isInteger() == VT.isInteger()) &&
2835 "Wrong types for EXTRACT_ELEMENT!");
2837 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2838 // 64-bit integers into 32-bit parts. Instead of building the extract of
2839 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2840 if (N1.getOpcode() == ISD::BUILD_PAIR)
2841 return N1.getOperand(N2C->getZExtValue());
2843 // EXTRACT_ELEMENT of a constant int is also very common.
2844 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2845 unsigned ElementSize = VT.getSizeInBits();
2846 unsigned Shift = ElementSize * N2C->getZExtValue();
2847 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2848 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2851 case ISD::EXTRACT_SUBVECTOR:
2852 if (N1.getValueType() == VT) // Trivial extraction.
2859 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2860 if (SV.getNode()) return SV;
2861 } else { // Cannonicalize constant to RHS if commutative
2862 if (isCommutativeBinOp(Opcode)) {
2863 std::swap(N1C, N2C);
2869 // Constant fold FP operations.
2870 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2871 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2873 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2874 // Cannonicalize constant to RHS if commutative
2875 std::swap(N1CFP, N2CFP);
2877 } else if (N2CFP && VT != MVT::ppcf128) {
2878 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2879 APFloat::opStatus s;
2882 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2883 if (s != APFloat::opInvalidOp)
2884 return getConstantFP(V1, VT);
2887 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2888 if (s!=APFloat::opInvalidOp)
2889 return getConstantFP(V1, VT);
2892 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2893 if (s!=APFloat::opInvalidOp)
2894 return getConstantFP(V1, VT);
2897 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2898 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2899 return getConstantFP(V1, VT);
2902 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2903 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2904 return getConstantFP(V1, VT);
2906 case ISD::FCOPYSIGN:
2908 return getConstantFP(V1, VT);
2914 // Canonicalize an UNDEF to the RHS, even over a constant.
2915 if (N1.getOpcode() == ISD::UNDEF) {
2916 if (isCommutativeBinOp(Opcode)) {
2920 case ISD::FP_ROUND_INREG:
2921 case ISD::SIGN_EXTEND_INREG:
2927 return N1; // fold op(undef, arg2) -> undef
2935 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2936 // For vectors, we can't easily build an all zero vector, just return
2943 // Fold a bunch of operators when the RHS is undef.
2944 if (N2.getOpcode() == ISD::UNDEF) {
2947 if (N1.getOpcode() == ISD::UNDEF)
2948 // Handle undef ^ undef -> 0 special case. This is a common
2950 return getConstant(0, VT);
2960 return N2; // fold op(arg1, undef) -> undef
2974 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2975 // For vectors, we can't easily build an all zero vector, just return
2980 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2981 // For vectors, we can't easily build an all one vector, just return
2989 // Memoize this node if possible.
2991 SDVTList VTs = getVTList(VT);
2992 if (VT != MVT::Flag) {
2993 SDValue Ops[] = { N1, N2 };
2994 FoldingSetNodeID ID;
2995 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2998 return SDValue(E, 0);
3000 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3001 CSEMap.InsertNode(N, IP);
3003 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3006 AllNodes.push_back(N);
3010 return SDValue(N, 0);
3013 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3014 SDValue N1, SDValue N2, SDValue N3) {
3015 // Perform various simplifications.
3016 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3018 case ISD::CONCAT_VECTORS:
3019 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3020 // one big BUILD_VECTOR.
3021 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3022 N2.getOpcode() == ISD::BUILD_VECTOR &&
3023 N3.getOpcode() == ISD::BUILD_VECTOR) {
3024 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
3025 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3026 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3027 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3031 // Use FoldSetCC to simplify SETCC's.
3032 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3033 if (Simp.getNode()) return Simp;
3038 if (N1C->getZExtValue())
3039 return N2; // select true, X, Y -> X
3041 return N3; // select false, X, Y -> Y
3044 if (N2 == N3) return N2; // select C, X, X -> X
3046 case ISD::VECTOR_SHUFFLE:
3047 llvm_unreachable("should use getVectorShuffle constructor!");
3049 case ISD::BIT_CONVERT:
3050 // Fold bit_convert nodes from a type to themselves.
3051 if (N1.getValueType() == VT)
3056 // Memoize node if it doesn't produce a flag.
3058 SDVTList VTs = getVTList(VT);
3059 if (VT != MVT::Flag) {
3060 SDValue Ops[] = { N1, N2, N3 };
3061 FoldingSetNodeID ID;
3062 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3064 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3065 return SDValue(E, 0);
3067 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3068 CSEMap.InsertNode(N, IP);
3070 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3073 AllNodes.push_back(N);
3077 return SDValue(N, 0);
3080 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3081 SDValue N1, SDValue N2, SDValue N3,
3083 SDValue Ops[] = { N1, N2, N3, N4 };
3084 return getNode(Opcode, DL, VT, Ops, 4);
3087 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3088 SDValue N1, SDValue N2, SDValue N3,
3089 SDValue N4, SDValue N5) {
3090 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3091 return getNode(Opcode, DL, VT, Ops, 5);
3094 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3095 /// the incoming stack arguments to be loaded from the stack.
3096 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3097 SmallVector<SDValue, 8> ArgChains;
3099 // Include the original chain at the beginning of the list. When this is
3100 // used by target LowerCall hooks, this helps legalize find the
3101 // CALLSEQ_BEGIN node.
3102 ArgChains.push_back(Chain);
3104 // Add a chain value for each stack argument.
3105 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3106 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3107 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3108 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3109 if (FI->getIndex() < 0)
3110 ArgChains.push_back(SDValue(L, 1));
3112 // Build a tokenfactor for all the chains.
3113 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3114 &ArgChains[0], ArgChains.size());
3117 /// getMemsetValue - Vectorized representation of the memset value
3119 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3121 assert(Value.getOpcode() != ISD::UNDEF);
3123 unsigned NumBits = VT.getScalarType().getSizeInBits();
3124 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3125 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3127 for (unsigned i = NumBits; i > 8; i >>= 1) {
3128 Val = (Val << Shift) | Val;
3132 return DAG.getConstant(Val, VT);
3133 return DAG.getConstantFP(APFloat(Val), VT);
3136 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3137 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3139 for (unsigned i = NumBits; i > 8; i >>= 1) {
3140 Value = DAG.getNode(ISD::OR, dl, VT,
3141 DAG.getNode(ISD::SHL, dl, VT, Value,
3142 DAG.getConstant(Shift,
3143 TLI.getShiftAmountTy())),
3151 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3152 /// used when a memcpy is turned into a memset when the source is a constant
3154 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3155 const TargetLowering &TLI,
3156 std::string &Str, unsigned Offset) {
3157 // Handle vector with all elements zero.
3160 return DAG.getConstant(0, VT);
3161 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3162 VT.getSimpleVT().SimpleTy == MVT::f64)
3163 return DAG.getConstantFP(0.0, VT);
3164 else if (VT.isVector()) {
3165 unsigned NumElts = VT.getVectorNumElements();
3166 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3167 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3168 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3171 llvm_unreachable("Expected type!");
3174 assert(!VT.isVector() && "Can't handle vector type here!");
3175 unsigned NumBits = VT.getSizeInBits();
3176 unsigned MSB = NumBits / 8;
3178 if (TLI.isLittleEndian())
3179 Offset = Offset + MSB - 1;
3180 for (unsigned i = 0; i != MSB; ++i) {
3181 Val = (Val << 8) | (unsigned char)Str[Offset];
3182 Offset += TLI.isLittleEndian() ? -1 : 1;
3184 return DAG.getConstant(Val, VT);
3187 /// getMemBasePlusOffset - Returns base and offset node for the
3189 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3190 SelectionDAG &DAG) {
3191 EVT VT = Base.getValueType();
3192 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3193 VT, Base, DAG.getConstant(Offset, VT));
3196 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3198 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3199 unsigned SrcDelta = 0;
3200 GlobalAddressSDNode *G = NULL;
3201 if (Src.getOpcode() == ISD::GlobalAddress)
3202 G = cast<GlobalAddressSDNode>(Src);
3203 else if (Src.getOpcode() == ISD::ADD &&
3204 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3205 Src.getOperand(1).getOpcode() == ISD::Constant) {
3206 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3207 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3212 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3213 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3219 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3220 /// to replace the memset / memcpy. Return true if the number of memory ops
3221 /// is below the threshold. It returns the types of the sequence of
3222 /// memory ops to perform memset / memcpy by reference.
3223 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3224 unsigned Limit, uint64_t Size,
3225 unsigned DstAlign, unsigned SrcAlign,
3226 bool NonScalarIntSafe,
3229 const TargetLowering &TLI) {
3230 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3231 "Expecting memcpy / memset source to meet alignment requirement!");
3232 // If 'SrcAlign' is zero, that means the memory operation does not need load
3233 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3234 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3235 // specified alignment of the memory operation. If it is zero, that means
3236 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3237 // indicates whether the memcpy source is constant so it does not need to be
3239 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3240 NonScalarIntSafe, MemcpyStrSrc,
3241 DAG.getMachineFunction());
3243 if (VT == MVT::Other) {
3244 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3245 TLI.allowsUnalignedMemoryAccesses(VT)) {
3246 VT = TLI.getPointerTy();
3248 switch (DstAlign & 7) {
3249 case 0: VT = MVT::i64; break;
3250 case 4: VT = MVT::i32; break;
3251 case 2: VT = MVT::i16; break;
3252 default: VT = MVT::i8; break;
3257 while (!TLI.isTypeLegal(LVT))
3258 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3259 assert(LVT.isInteger());
3265 // If we're optimizing for size, and there is a limit, bump the maximum number
3266 // of operations inserted down to 4. This is a wild guess that approximates
3267 // the size of a call to memcpy or memset (3 arguments + call).
3269 const Function *F = DAG.getMachineFunction().getFunction();
3270 if (F->hasFnAttr(Attribute::OptimizeForSize))
3274 unsigned NumMemOps = 0;
3276 unsigned VTSize = VT.getSizeInBits() / 8;
3277 while (VTSize > Size) {
3278 // For now, only use non-vector load / store's for the left-over pieces.
3279 if (VT.isVector() || VT.isFloatingPoint()) {
3281 while (!TLI.isTypeLegal(VT))
3282 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3283 VTSize = VT.getSizeInBits() / 8;
3285 // This can result in a type that is not legal on the target, e.g.
3286 // 1 or 2 bytes on PPC.
3287 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3292 if (++NumMemOps > Limit)
3294 MemOps.push_back(VT);
3301 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3302 SDValue Chain, SDValue Dst,
3303 SDValue Src, uint64_t Size,
3304 unsigned Align, bool isVol,
3306 const Value *DstSV, uint64_t DstSVOff,
3307 const Value *SrcSV, uint64_t SrcSVOff) {
3308 // Turn a memcpy of undef to nop.
3309 if (Src.getOpcode() == ISD::UNDEF)
3312 // Expand memcpy to a series of load and store ops if the size operand falls
3313 // below a certain threshold.
3314 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3315 std::vector<EVT> MemOps;
3316 bool DstAlignCanChange = false;
3317 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3318 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3319 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3320 DstAlignCanChange = true;
3321 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3322 if (Align > SrcAlign)
3325 bool CopyFromStr = isMemSrcFromString(Src, Str);
3326 bool isZeroStr = CopyFromStr && Str.empty();
3327 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3329 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3330 (DstAlignCanChange ? 0 : Align),
3331 (isZeroStr ? 0 : SrcAlign),
3332 true, CopyFromStr, DAG, TLI))
3335 if (DstAlignCanChange) {
3336 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3337 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3338 if (NewAlign > Align) {
3339 // Give the stack frame object a larger alignment if needed.
3340 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3341 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3346 SmallVector<SDValue, 8> OutChains;
3347 unsigned NumMemOps = MemOps.size();
3348 uint64_t SrcOff = 0, DstOff = 0;
3349 for (unsigned i = 0; i != NumMemOps; ++i) {
3351 unsigned VTSize = VT.getSizeInBits() / 8;
3352 SDValue Value, Store;
3355 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3356 // It's unlikely a store of a vector immediate can be done in a single
3357 // instruction. It would require a load from a constantpool first.
3358 // We only handle zero vectors here.
3359 // FIXME: Handle other cases where store of vector immediate is done in
3360 // a single instruction.
3361 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3362 Store = DAG.getStore(Chain, dl, Value,
3363 getMemBasePlusOffset(Dst, DstOff, DAG),
3364 DstSV, DstSVOff + DstOff, isVol, false, Align);
3366 // The type might not be legal for the target. This should only happen
3367 // if the type is smaller than a legal type, as on PPC, so the right
3368 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3369 // to Load/Store if NVT==VT.
3370 // FIXME does the case above also need this?
3371 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3372 assert(NVT.bitsGE(VT));
3373 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3374 getMemBasePlusOffset(Src, SrcOff, DAG),
3375 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3376 MinAlign(SrcAlign, SrcOff));
3377 Store = DAG.getTruncStore(Chain, dl, Value,
3378 getMemBasePlusOffset(Dst, DstOff, DAG),
3379 DstSV, DstSVOff + DstOff, VT, isVol, false,
3382 OutChains.push_back(Store);
3387 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3388 &OutChains[0], OutChains.size());
3391 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3392 SDValue Chain, SDValue Dst,
3393 SDValue Src, uint64_t Size,
3394 unsigned Align, bool isVol,
3396 const Value *DstSV, uint64_t DstSVOff,
3397 const Value *SrcSV, uint64_t SrcSVOff) {
3398 // Turn a memmove of undef to nop.
3399 if (Src.getOpcode() == ISD::UNDEF)
3402 // Expand memmove to a series of load and store ops if the size operand falls
3403 // below a certain threshold.
3404 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3405 std::vector<EVT> MemOps;
3406 bool DstAlignCanChange = false;
3407 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3408 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3409 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3410 DstAlignCanChange = true;
3411 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3412 if (Align > SrcAlign)
3414 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3416 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3417 (DstAlignCanChange ? 0 : Align),
3418 SrcAlign, true, false, DAG, TLI))
3421 if (DstAlignCanChange) {
3422 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3423 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3424 if (NewAlign > Align) {
3425 // Give the stack frame object a larger alignment if needed.
3426 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3427 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3432 uint64_t SrcOff = 0, DstOff = 0;
3433 SmallVector<SDValue, 8> LoadValues;
3434 SmallVector<SDValue, 8> LoadChains;
3435 SmallVector<SDValue, 8> OutChains;
3436 unsigned NumMemOps = MemOps.size();
3437 for (unsigned i = 0; i < NumMemOps; i++) {
3439 unsigned VTSize = VT.getSizeInBits() / 8;
3440 SDValue Value, Store;
3442 Value = DAG.getLoad(VT, dl, Chain,
3443 getMemBasePlusOffset(Src, SrcOff, DAG),
3444 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3445 LoadValues.push_back(Value);
3446 LoadChains.push_back(Value.getValue(1));
3449 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3450 &LoadChains[0], LoadChains.size());
3452 for (unsigned i = 0; i < NumMemOps; i++) {
3454 unsigned VTSize = VT.getSizeInBits() / 8;
3455 SDValue Value, Store;
3457 Store = DAG.getStore(Chain, dl, LoadValues[i],
3458 getMemBasePlusOffset(Dst, DstOff, DAG),
3459 DstSV, DstSVOff + DstOff, isVol, false, Align);
3460 OutChains.push_back(Store);
3464 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3465 &OutChains[0], OutChains.size());
3468 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3469 SDValue Chain, SDValue Dst,
3470 SDValue Src, uint64_t Size,
3471 unsigned Align, bool isVol,
3472 const Value *DstSV, uint64_t DstSVOff) {
3473 // Turn a memset of undef to nop.
3474 if (Src.getOpcode() == ISD::UNDEF)
3477 // Expand memset to a series of load/store ops if the size operand
3478 // falls below a certain threshold.
3479 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3480 std::vector<EVT> MemOps;
3481 bool DstAlignCanChange = false;
3482 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3483 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3484 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3485 DstAlignCanChange = true;
3486 bool NonScalarIntSafe =
3487 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3488 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3489 Size, (DstAlignCanChange ? 0 : Align), 0,
3490 NonScalarIntSafe, false, DAG, TLI))
3493 if (DstAlignCanChange) {
3494 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3495 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3496 if (NewAlign > Align) {
3497 // Give the stack frame object a larger alignment if needed.
3498 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3499 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3504 SmallVector<SDValue, 8> OutChains;
3505 uint64_t DstOff = 0;
3506 unsigned NumMemOps = MemOps.size();
3507 for (unsigned i = 0; i < NumMemOps; i++) {
3509 unsigned VTSize = VT.getSizeInBits() / 8;
3510 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3511 SDValue Store = DAG.getStore(Chain, dl, Value,
3512 getMemBasePlusOffset(Dst, DstOff, DAG),
3513 DstSV, DstSVOff + DstOff, isVol, false, 0);
3514 OutChains.push_back(Store);
3518 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3519 &OutChains[0], OutChains.size());
3522 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3523 SDValue Src, SDValue Size,
3524 unsigned Align, bool isVol, bool AlwaysInline,
3525 const Value *DstSV, uint64_t DstSVOff,
3526 const Value *SrcSV, uint64_t SrcSVOff) {
3528 // Check to see if we should lower the memcpy to loads and stores first.
3529 // For cases within the target-specified limits, this is the best choice.
3530 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3532 // Memcpy with size zero? Just return the original chain.
3533 if (ConstantSize->isNullValue())
3536 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3537 ConstantSize->getZExtValue(),Align,
3538 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3539 if (Result.getNode())
3543 // Then check to see if we should lower the memcpy with target-specific
3544 // code. If the target chooses to do this, this is the next best.
3546 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3547 isVol, AlwaysInline,
3548 DstSV, DstSVOff, SrcSV, SrcSVOff);
3549 if (Result.getNode())
3552 // If we really need inline code and the target declined to provide it,
3553 // use a (potentially long) sequence of loads and stores.
3555 assert(ConstantSize && "AlwaysInline requires a constant size!");
3556 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3557 ConstantSize->getZExtValue(), Align, isVol,
3558 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3561 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3562 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3563 // respect volatile, so they may do things like read or write memory
3564 // beyond the given memory regions. But fixing this isn't easy, and most
3565 // people don't care.
3567 // Emit a library call.
3568 TargetLowering::ArgListTy Args;
3569 TargetLowering::ArgListEntry Entry;
3570 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3571 Entry.Node = Dst; Args.push_back(Entry);
3572 Entry.Node = Src; Args.push_back(Entry);
3573 Entry.Node = Size; Args.push_back(Entry);
3574 // FIXME: pass in DebugLoc
3575 std::pair<SDValue,SDValue> CallResult =
3576 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3577 false, false, false, false, 0,
3578 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3579 /*isReturnValueUsed=*/false,
3580 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3581 TLI.getPointerTy()),
3583 return CallResult.second;
3586 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3587 SDValue Src, SDValue Size,
3588 unsigned Align, bool isVol,
3589 const Value *DstSV, uint64_t DstSVOff,
3590 const Value *SrcSV, uint64_t SrcSVOff) {
3592 // Check to see if we should lower the memmove to loads and stores first.
3593 // For cases within the target-specified limits, this is the best choice.
3594 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3596 // Memmove with size zero? Just return the original chain.
3597 if (ConstantSize->isNullValue())
3601 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3602 ConstantSize->getZExtValue(), Align, isVol,
3603 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3604 if (Result.getNode())
3608 // Then check to see if we should lower the memmove with target-specific
3609 // code. If the target chooses to do this, this is the next best.
3611 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3612 DstSV, DstSVOff, SrcSV, SrcSVOff);
3613 if (Result.getNode())
3616 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3617 // not be safe. See memcpy above for more details.
3619 // Emit a library call.
3620 TargetLowering::ArgListTy Args;
3621 TargetLowering::ArgListEntry Entry;
3622 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3623 Entry.Node = Dst; Args.push_back(Entry);
3624 Entry.Node = Src; Args.push_back(Entry);
3625 Entry.Node = Size; Args.push_back(Entry);
3626 // FIXME: pass in DebugLoc
3627 std::pair<SDValue,SDValue> CallResult =
3628 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3629 false, false, false, false, 0,
3630 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3631 /*isReturnValueUsed=*/false,
3632 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3633 TLI.getPointerTy()),
3635 return CallResult.second;
3638 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3639 SDValue Src, SDValue Size,
3640 unsigned Align, bool isVol,
3641 const Value *DstSV, uint64_t DstSVOff) {
3643 // Check to see if we should lower the memset to stores first.
3644 // For cases within the target-specified limits, this is the best choice.
3645 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3647 // Memset with size zero? Just return the original chain.
3648 if (ConstantSize->isNullValue())
3652 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3653 Align, isVol, DstSV, DstSVOff);
3655 if (Result.getNode())
3659 // Then check to see if we should lower the memset with target-specific
3660 // code. If the target chooses to do this, this is the next best.
3662 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3664 if (Result.getNode())
3667 // Emit a library call.
3668 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3669 TargetLowering::ArgListTy Args;
3670 TargetLowering::ArgListEntry Entry;
3671 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3672 Args.push_back(Entry);
3673 // Extend or truncate the argument to be an i32 value for the call.
3674 if (Src.getValueType().bitsGT(MVT::i32))
3675 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3677 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3679 Entry.Ty = Type::getInt32Ty(*getContext());
3680 Entry.isSExt = true;
3681 Args.push_back(Entry);
3683 Entry.Ty = IntPtrTy;
3684 Entry.isSExt = false;
3685 Args.push_back(Entry);
3686 // FIXME: pass in DebugLoc
3687 std::pair<SDValue,SDValue> CallResult =
3688 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3689 false, false, false, false, 0,
3690 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3691 /*isReturnValueUsed=*/false,
3692 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3693 TLI.getPointerTy()),
3695 return CallResult.second;
3698 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3700 SDValue Ptr, SDValue Cmp,
3701 SDValue Swp, const Value* PtrVal,
3702 unsigned Alignment) {
3703 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3704 Alignment = getEVTAlignment(MemVT);
3706 // Check if the memory reference references a frame index
3708 if (const FrameIndexSDNode *FI =
3709 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3710 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3712 MachineFunction &MF = getMachineFunction();
3713 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3715 // For now, atomics are considered to be volatile always.
3716 Flags |= MachineMemOperand::MOVolatile;
3718 MachineMemOperand *MMO =
3719 MF.getMachineMemOperand(PtrVal, Flags, 0,
3720 MemVT.getStoreSize(), Alignment);
3722 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3725 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3727 SDValue Ptr, SDValue Cmp,
3728 SDValue Swp, MachineMemOperand *MMO) {
3729 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3730 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3732 EVT VT = Cmp.getValueType();
3734 SDVTList VTs = getVTList(VT, MVT::Other);
3735 FoldingSetNodeID ID;
3736 ID.AddInteger(MemVT.getRawBits());
3737 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3738 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3740 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3741 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3742 return SDValue(E, 0);
3744 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3745 Ptr, Cmp, Swp, MMO);
3746 CSEMap.InsertNode(N, IP);
3747 AllNodes.push_back(N);
3748 return SDValue(N, 0);
3751 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3753 SDValue Ptr, SDValue Val,
3754 const Value* PtrVal,
3755 unsigned Alignment) {
3756 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3757 Alignment = getEVTAlignment(MemVT);
3759 // Check if the memory reference references a frame index
3761 if (const FrameIndexSDNode *FI =
3762 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3763 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3765 MachineFunction &MF = getMachineFunction();
3766 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3768 // For now, atomics are considered to be volatile always.
3769 Flags |= MachineMemOperand::MOVolatile;
3771 MachineMemOperand *MMO =
3772 MF.getMachineMemOperand(PtrVal, Flags, 0,
3773 MemVT.getStoreSize(), Alignment);
3775 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3778 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3780 SDValue Ptr, SDValue Val,
3781 MachineMemOperand *MMO) {
3782 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3783 Opcode == ISD::ATOMIC_LOAD_SUB ||
3784 Opcode == ISD::ATOMIC_LOAD_AND ||
3785 Opcode == ISD::ATOMIC_LOAD_OR ||
3786 Opcode == ISD::ATOMIC_LOAD_XOR ||
3787 Opcode == ISD::ATOMIC_LOAD_NAND ||
3788 Opcode == ISD::ATOMIC_LOAD_MIN ||
3789 Opcode == ISD::ATOMIC_LOAD_MAX ||
3790 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3791 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3792 Opcode == ISD::ATOMIC_SWAP) &&
3793 "Invalid Atomic Op");
3795 EVT VT = Val.getValueType();
3797 SDVTList VTs = getVTList(VT, MVT::Other);
3798 FoldingSetNodeID ID;
3799 ID.AddInteger(MemVT.getRawBits());
3800 SDValue Ops[] = {Chain, Ptr, Val};
3801 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3803 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3804 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3805 return SDValue(E, 0);
3807 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3809 CSEMap.InsertNode(N, IP);
3810 AllNodes.push_back(N);
3811 return SDValue(N, 0);
3814 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3815 /// Allowed to return something different (and simpler) if Simplify is true.
3816 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3821 SmallVector<EVT, 4> VTs;
3822 VTs.reserve(NumOps);
3823 for (unsigned i = 0; i < NumOps; ++i)
3824 VTs.push_back(Ops[i].getValueType());
3825 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3830 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3831 const EVT *VTs, unsigned NumVTs,
3832 const SDValue *Ops, unsigned NumOps,
3833 EVT MemVT, const Value *srcValue, int SVOff,
3834 unsigned Align, bool Vol,
3835 bool ReadMem, bool WriteMem) {
3836 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3837 MemVT, srcValue, SVOff, Align, Vol,
3842 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3843 const SDValue *Ops, unsigned NumOps,
3844 EVT MemVT, const Value *srcValue, int SVOff,
3845 unsigned Align, bool Vol,
3846 bool ReadMem, bool WriteMem) {
3847 if (Align == 0) // Ensure that codegen never sees alignment 0
3848 Align = getEVTAlignment(MemVT);
3850 MachineFunction &MF = getMachineFunction();
3853 Flags |= MachineMemOperand::MOStore;
3855 Flags |= MachineMemOperand::MOLoad;
3857 Flags |= MachineMemOperand::MOVolatile;
3858 MachineMemOperand *MMO =
3859 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3860 MemVT.getStoreSize(), Align);
3862 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3866 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3867 const SDValue *Ops, unsigned NumOps,
3868 EVT MemVT, MachineMemOperand *MMO) {
3869 assert((Opcode == ISD::INTRINSIC_VOID ||
3870 Opcode == ISD::INTRINSIC_W_CHAIN ||
3871 (Opcode <= INT_MAX &&
3872 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3873 "Opcode is not a memory-accessing opcode!");
3875 // Memoize the node unless it returns a flag.
3876 MemIntrinsicSDNode *N;
3877 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3878 FoldingSetNodeID ID;
3879 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3882 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3883 return SDValue(E, 0);
3886 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3888 CSEMap.InsertNode(N, IP);
3890 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3893 AllNodes.push_back(N);
3894 return SDValue(N, 0);
3898 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3899 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3900 SDValue Ptr, SDValue Offset,
3901 const Value *SV, int SVOffset, EVT MemVT,
3902 bool isVolatile, bool isNonTemporal,
3903 unsigned Alignment) {
3904 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3905 Alignment = getEVTAlignment(VT);
3907 // Check if the memory reference references a frame index
3909 if (const FrameIndexSDNode *FI =
3910 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3911 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3913 MachineFunction &MF = getMachineFunction();
3914 unsigned Flags = MachineMemOperand::MOLoad;
3916 Flags |= MachineMemOperand::MOVolatile;
3918 Flags |= MachineMemOperand::MONonTemporal;
3919 MachineMemOperand *MMO =
3920 MF.getMachineMemOperand(SV, Flags, SVOffset,
3921 MemVT.getStoreSize(), Alignment);
3922 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3926 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3927 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3928 SDValue Ptr, SDValue Offset, EVT MemVT,
3929 MachineMemOperand *MMO) {
3931 ExtType = ISD::NON_EXTLOAD;
3932 } else if (ExtType == ISD::NON_EXTLOAD) {
3933 assert(VT == MemVT && "Non-extending load from different memory type!");
3936 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3937 "Should only be an extending load, not truncating!");
3938 assert(VT.isInteger() == MemVT.isInteger() &&
3939 "Cannot convert from FP to Int or Int -> FP!");
3940 assert(VT.isVector() == MemVT.isVector() &&
3941 "Cannot use trunc store to convert to or from a vector!");
3942 assert((!VT.isVector() ||
3943 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3944 "Cannot use trunc store to change the number of vector elements!");
3947 bool Indexed = AM != ISD::UNINDEXED;
3948 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3949 "Unindexed load with an offset!");
3951 SDVTList VTs = Indexed ?
3952 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3953 SDValue Ops[] = { Chain, Ptr, Offset };
3954 FoldingSetNodeID ID;
3955 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3956 ID.AddInteger(MemVT.getRawBits());
3957 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3958 MMO->isNonTemporal()));
3960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3961 cast<LoadSDNode>(E)->refineAlignment(MMO);
3962 return SDValue(E, 0);
3964 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3966 CSEMap.InsertNode(N, IP);
3967 AllNodes.push_back(N);
3968 return SDValue(N, 0);
3971 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3972 SDValue Chain, SDValue Ptr,
3973 const Value *SV, int SVOffset,
3974 bool isVolatile, bool isNonTemporal,
3975 unsigned Alignment) {
3976 SDValue Undef = getUNDEF(Ptr.getValueType());
3977 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3978 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3981 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3982 SDValue Chain, SDValue Ptr,
3984 int SVOffset, EVT MemVT,
3985 bool isVolatile, bool isNonTemporal,
3986 unsigned Alignment) {
3987 SDValue Undef = getUNDEF(Ptr.getValueType());
3988 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3989 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3993 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3994 SDValue Offset, ISD::MemIndexedMode AM) {
3995 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3996 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3997 "Load is already a indexed load!");
3998 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3999 LD->getChain(), Base, Offset, LD->getSrcValue(),
4000 LD->getSrcValueOffset(), LD->getMemoryVT(),
4001 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4004 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4005 SDValue Ptr, const Value *SV, int SVOffset,
4006 bool isVolatile, bool isNonTemporal,
4007 unsigned Alignment) {
4008 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4009 Alignment = getEVTAlignment(Val.getValueType());
4011 // Check if the memory reference references a frame index
4013 if (const FrameIndexSDNode *FI =
4014 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4015 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4017 MachineFunction &MF = getMachineFunction();
4018 unsigned Flags = MachineMemOperand::MOStore;
4020 Flags |= MachineMemOperand::MOVolatile;
4022 Flags |= MachineMemOperand::MONonTemporal;
4023 MachineMemOperand *MMO =
4024 MF.getMachineMemOperand(SV, Flags, SVOffset,
4025 Val.getValueType().getStoreSize(), Alignment);
4027 return getStore(Chain, dl, Val, Ptr, MMO);
4030 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4031 SDValue Ptr, MachineMemOperand *MMO) {
4032 EVT VT = Val.getValueType();
4033 SDVTList VTs = getVTList(MVT::Other);
4034 SDValue Undef = getUNDEF(Ptr.getValueType());
4035 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4036 FoldingSetNodeID ID;
4037 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4038 ID.AddInteger(VT.getRawBits());
4039 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4040 MMO->isNonTemporal()));
4042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4043 cast<StoreSDNode>(E)->refineAlignment(MMO);
4044 return SDValue(E, 0);
4046 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4048 CSEMap.InsertNode(N, IP);
4049 AllNodes.push_back(N);
4050 return SDValue(N, 0);
4053 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4054 SDValue Ptr, const Value *SV,
4055 int SVOffset, EVT SVT,
4056 bool isVolatile, bool isNonTemporal,
4057 unsigned Alignment) {
4058 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4059 Alignment = getEVTAlignment(SVT);
4061 // Check if the memory reference references a frame index
4063 if (const FrameIndexSDNode *FI =
4064 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4065 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4067 MachineFunction &MF = getMachineFunction();
4068 unsigned Flags = MachineMemOperand::MOStore;
4070 Flags |= MachineMemOperand::MOVolatile;
4072 Flags |= MachineMemOperand::MONonTemporal;
4073 MachineMemOperand *MMO =
4074 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4076 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4079 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4080 SDValue Ptr, EVT SVT,
4081 MachineMemOperand *MMO) {
4082 EVT VT = Val.getValueType();
4085 return getStore(Chain, dl, Val, Ptr, MMO);
4087 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4088 "Should only be a truncating store, not extending!");
4089 assert(VT.isInteger() == SVT.isInteger() &&
4090 "Can't do FP-INT conversion!");
4091 assert(VT.isVector() == SVT.isVector() &&
4092 "Cannot use trunc store to convert to or from a vector!");
4093 assert((!VT.isVector() ||
4094 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4095 "Cannot use trunc store to change the number of vector elements!");
4097 SDVTList VTs = getVTList(MVT::Other);
4098 SDValue Undef = getUNDEF(Ptr.getValueType());
4099 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4100 FoldingSetNodeID ID;
4101 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4102 ID.AddInteger(SVT.getRawBits());
4103 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4104 MMO->isNonTemporal()));
4106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4107 cast<StoreSDNode>(E)->refineAlignment(MMO);
4108 return SDValue(E, 0);
4110 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4112 CSEMap.InsertNode(N, IP);
4113 AllNodes.push_back(N);
4114 return SDValue(N, 0);
4118 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4119 SDValue Offset, ISD::MemIndexedMode AM) {
4120 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4121 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4122 "Store is already a indexed store!");
4123 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4124 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4125 FoldingSetNodeID ID;
4126 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4127 ID.AddInteger(ST->getMemoryVT().getRawBits());
4128 ID.AddInteger(ST->getRawSubclassData());
4130 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4131 return SDValue(E, 0);
4133 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4134 ST->isTruncatingStore(),
4136 ST->getMemOperand());
4137 CSEMap.InsertNode(N, IP);
4138 AllNodes.push_back(N);
4139 return SDValue(N, 0);
4142 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4143 SDValue Chain, SDValue Ptr,
4146 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4147 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4150 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4151 const SDUse *Ops, unsigned NumOps) {
4153 case 0: return getNode(Opcode, DL, VT);
4154 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4155 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4156 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4160 // Copy from an SDUse array into an SDValue array for use with
4161 // the regular getNode logic.
4162 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4163 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4166 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4167 const SDValue *Ops, unsigned NumOps) {
4169 case 0: return getNode(Opcode, DL, VT);
4170 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4171 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4172 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4178 case ISD::SELECT_CC: {
4179 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4180 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4181 "LHS and RHS of condition must have same type!");
4182 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4183 "True and False arms of SelectCC must have same type!");
4184 assert(Ops[2].getValueType() == VT &&
4185 "select_cc node must be of same type as true and false value!");
4189 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4190 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4191 "LHS/RHS of comparison should match types!");
4198 SDVTList VTs = getVTList(VT);
4200 if (VT != MVT::Flag) {
4201 FoldingSetNodeID ID;
4202 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4205 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4206 return SDValue(E, 0);
4208 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4209 CSEMap.InsertNode(N, IP);
4211 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4214 AllNodes.push_back(N);
4218 return SDValue(N, 0);
4221 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4222 const std::vector<EVT> &ResultTys,
4223 const SDValue *Ops, unsigned NumOps) {
4224 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4228 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4229 const EVT *VTs, unsigned NumVTs,
4230 const SDValue *Ops, unsigned NumOps) {
4232 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4233 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4236 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4237 const SDValue *Ops, unsigned NumOps) {
4238 if (VTList.NumVTs == 1)
4239 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4243 // FIXME: figure out how to safely handle things like
4244 // int foo(int x) { return 1 << (x & 255); }
4245 // int bar() { return foo(256); }
4246 case ISD::SRA_PARTS:
4247 case ISD::SRL_PARTS:
4248 case ISD::SHL_PARTS:
4249 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4250 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4251 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4252 else if (N3.getOpcode() == ISD::AND)
4253 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4254 // If the and is only masking out bits that cannot effect the shift,
4255 // eliminate the and.
4256 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4257 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4258 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4264 // Memoize the node unless it returns a flag.
4266 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4267 FoldingSetNodeID ID;
4268 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4270 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4271 return SDValue(E, 0);
4274 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4275 } else if (NumOps == 2) {
4276 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4277 } else if (NumOps == 3) {
4278 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4281 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4283 CSEMap.InsertNode(N, IP);
4286 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4287 } else if (NumOps == 2) {
4288 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4289 } else if (NumOps == 3) {
4290 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4293 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4296 AllNodes.push_back(N);
4300 return SDValue(N, 0);
4303 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4304 return getNode(Opcode, DL, VTList, 0, 0);
4307 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4309 SDValue Ops[] = { N1 };
4310 return getNode(Opcode, DL, VTList, Ops, 1);
4313 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4314 SDValue N1, SDValue N2) {
4315 SDValue Ops[] = { N1, N2 };
4316 return getNode(Opcode, DL, VTList, Ops, 2);
4319 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4320 SDValue N1, SDValue N2, SDValue N3) {
4321 SDValue Ops[] = { N1, N2, N3 };
4322 return getNode(Opcode, DL, VTList, Ops, 3);
4325 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4326 SDValue N1, SDValue N2, SDValue N3,
4328 SDValue Ops[] = { N1, N2, N3, N4 };
4329 return getNode(Opcode, DL, VTList, Ops, 4);
4332 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4333 SDValue N1, SDValue N2, SDValue N3,
4334 SDValue N4, SDValue N5) {
4335 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4336 return getNode(Opcode, DL, VTList, Ops, 5);
4339 SDVTList SelectionDAG::getVTList(EVT VT) {
4340 return makeVTList(SDNode::getValueTypeList(VT), 1);
4343 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4344 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4345 E = VTList.rend(); I != E; ++I)
4346 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4349 EVT *Array = Allocator.Allocate<EVT>(2);
4352 SDVTList Result = makeVTList(Array, 2);
4353 VTList.push_back(Result);
4357 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4358 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4359 E = VTList.rend(); I != E; ++I)
4360 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4364 EVT *Array = Allocator.Allocate<EVT>(3);
4368 SDVTList Result = makeVTList(Array, 3);
4369 VTList.push_back(Result);
4373 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4374 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4375 E = VTList.rend(); I != E; ++I)
4376 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4377 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4380 EVT *Array = Allocator.Allocate<EVT>(4);
4385 SDVTList Result = makeVTList(Array, 4);
4386 VTList.push_back(Result);
4390 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4392 case 0: llvm_unreachable("Cannot have nodes without results!");
4393 case 1: return getVTList(VTs[0]);
4394 case 2: return getVTList(VTs[0], VTs[1]);
4395 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4396 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4400 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4401 E = VTList.rend(); I != E; ++I) {
4402 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4405 bool NoMatch = false;
4406 for (unsigned i = 2; i != NumVTs; ++i)
4407 if (VTs[i] != I->VTs[i]) {
4415 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4416 std::copy(VTs, VTs+NumVTs, Array);
4417 SDVTList Result = makeVTList(Array, NumVTs);
4418 VTList.push_back(Result);
4423 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4424 /// specified operands. If the resultant node already exists in the DAG,
4425 /// this does not modify the specified node, instead it returns the node that
4426 /// already exists. If the resultant node does not exist in the DAG, the
4427 /// input node is returned. As a degenerate case, if you specify the same
4428 /// input operands as the node already has, the input node is returned.
4429 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4430 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4432 // Check to see if there is no change.
4433 if (Op == N->getOperand(0)) return N;
4435 // See if the modified node already exists.
4436 void *InsertPos = 0;
4437 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4440 // Nope it doesn't. Remove the node from its current place in the maps.
4442 if (!RemoveNodeFromCSEMaps(N))
4445 // Now we update the operands.
4446 N->OperandList[0].set(Op);
4448 // If this gets put into a CSE map, add it.
4449 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4453 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4454 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4456 // Check to see if there is no change.
4457 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4458 return N; // No operands changed, just return the input node.
4460 // See if the modified node already exists.
4461 void *InsertPos = 0;
4462 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4465 // Nope it doesn't. Remove the node from its current place in the maps.
4467 if (!RemoveNodeFromCSEMaps(N))
4470 // Now we update the operands.
4471 if (N->OperandList[0] != Op1)
4472 N->OperandList[0].set(Op1);
4473 if (N->OperandList[1] != Op2)
4474 N->OperandList[1].set(Op2);
4476 // If this gets put into a CSE map, add it.
4477 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4481 SDNode *SelectionDAG::
4482 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4483 SDValue Ops[] = { Op1, Op2, Op3 };
4484 return UpdateNodeOperands(N, Ops, 3);
4487 SDNode *SelectionDAG::
4488 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4489 SDValue Op3, SDValue Op4) {
4490 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4491 return UpdateNodeOperands(N, Ops, 4);
4494 SDNode *SelectionDAG::
4495 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4496 SDValue Op3, SDValue Op4, SDValue Op5) {
4497 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4498 return UpdateNodeOperands(N, Ops, 5);
4501 SDNode *SelectionDAG::
4502 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4503 assert(N->getNumOperands() == NumOps &&
4504 "Update with wrong number of operands");
4506 // Check to see if there is no change.
4507 bool AnyChange = false;
4508 for (unsigned i = 0; i != NumOps; ++i) {
4509 if (Ops[i] != N->getOperand(i)) {
4515 // No operands changed, just return the input node.
4516 if (!AnyChange) return N;
4518 // See if the modified node already exists.
4519 void *InsertPos = 0;
4520 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4523 // Nope it doesn't. Remove the node from its current place in the maps.
4525 if (!RemoveNodeFromCSEMaps(N))
4528 // Now we update the operands.
4529 for (unsigned i = 0; i != NumOps; ++i)
4530 if (N->OperandList[i] != Ops[i])
4531 N->OperandList[i].set(Ops[i]);
4533 // If this gets put into a CSE map, add it.
4534 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4538 /// DropOperands - Release the operands and set this node to have
4540 void SDNode::DropOperands() {
4541 // Unlike the code in MorphNodeTo that does this, we don't need to
4542 // watch for dead nodes here.
4543 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4549 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4552 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4554 SDVTList VTs = getVTList(VT);
4555 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4558 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4559 EVT VT, SDValue Op1) {
4560 SDVTList VTs = getVTList(VT);
4561 SDValue Ops[] = { Op1 };
4562 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4565 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4566 EVT VT, SDValue Op1,
4568 SDVTList VTs = getVTList(VT);
4569 SDValue Ops[] = { Op1, Op2 };
4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4573 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4574 EVT VT, SDValue Op1,
4575 SDValue Op2, SDValue Op3) {
4576 SDVTList VTs = getVTList(VT);
4577 SDValue Ops[] = { Op1, Op2, Op3 };
4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4581 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4582 EVT VT, const SDValue *Ops,
4584 SDVTList VTs = getVTList(VT);
4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4589 EVT VT1, EVT VT2, const SDValue *Ops,
4591 SDVTList VTs = getVTList(VT1, VT2);
4592 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4595 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4597 SDVTList VTs = getVTList(VT1, VT2);
4598 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4602 EVT VT1, EVT VT2, EVT VT3,
4603 const SDValue *Ops, unsigned NumOps) {
4604 SDVTList VTs = getVTList(VT1, VT2, VT3);
4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4608 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4609 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4610 const SDValue *Ops, unsigned NumOps) {
4611 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4612 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4615 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4618 SDVTList VTs = getVTList(VT1, VT2);
4619 SDValue Ops[] = { Op1 };
4620 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4623 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4625 SDValue Op1, SDValue Op2) {
4626 SDVTList VTs = getVTList(VT1, VT2);
4627 SDValue Ops[] = { Op1, Op2 };
4628 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4631 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4633 SDValue Op1, SDValue Op2,
4635 SDVTList VTs = getVTList(VT1, VT2);
4636 SDValue Ops[] = { Op1, Op2, Op3 };
4637 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4640 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4641 EVT VT1, EVT VT2, EVT VT3,
4642 SDValue Op1, SDValue Op2,
4644 SDVTList VTs = getVTList(VT1, VT2, VT3);
4645 SDValue Ops[] = { Op1, Op2, Op3 };
4646 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4649 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4650 SDVTList VTs, const SDValue *Ops,
4652 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4653 // Reset the NodeID to -1.
4658 /// MorphNodeTo - This *mutates* the specified node to have the specified
4659 /// return type, opcode, and operands.
4661 /// Note that MorphNodeTo returns the resultant node. If there is already a
4662 /// node of the specified opcode and operands, it returns that node instead of
4663 /// the current one. Note that the DebugLoc need not be the same.
4665 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4666 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4667 /// node, and because it doesn't require CSE recalculation for any of
4668 /// the node's users.
4670 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4671 SDVTList VTs, const SDValue *Ops,
4673 // If an identical node already exists, use it.
4675 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4676 FoldingSetNodeID ID;
4677 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4678 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4682 if (!RemoveNodeFromCSEMaps(N))
4685 // Start the morphing.
4687 N->ValueList = VTs.VTs;
4688 N->NumValues = VTs.NumVTs;
4690 // Clear the operands list, updating used nodes to remove this from their
4691 // use list. Keep track of any operands that become dead as a result.
4692 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4693 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4695 SDNode *Used = Use.getNode();
4697 if (Used->use_empty())
4698 DeadNodeSet.insert(Used);
4701 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4702 // Initialize the memory references information.
4703 MN->setMemRefs(0, 0);
4704 // If NumOps is larger than the # of operands we can have in a
4705 // MachineSDNode, reallocate the operand list.
4706 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4707 if (MN->OperandsNeedDelete)
4708 delete[] MN->OperandList;
4709 if (NumOps > array_lengthof(MN->LocalOperands))
4710 // We're creating a final node that will live unmorphed for the
4711 // remainder of the current SelectionDAG iteration, so we can allocate
4712 // the operands directly out of a pool with no recycling metadata.
4713 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4716 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4717 MN->OperandsNeedDelete = false;
4719 MN->InitOperands(MN->OperandList, Ops, NumOps);
4721 // If NumOps is larger than the # of operands we currently have, reallocate
4722 // the operand list.
4723 if (NumOps > N->NumOperands) {
4724 if (N->OperandsNeedDelete)
4725 delete[] N->OperandList;
4726 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4727 N->OperandsNeedDelete = true;
4729 N->InitOperands(N->OperandList, Ops, NumOps);
4732 // Delete any nodes that are still dead after adding the uses for the
4734 if (!DeadNodeSet.empty()) {
4735 SmallVector<SDNode *, 16> DeadNodes;
4736 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4737 E = DeadNodeSet.end(); I != E; ++I)
4738 if ((*I)->use_empty())
4739 DeadNodes.push_back(*I);
4740 RemoveDeadNodes(DeadNodes);
4744 CSEMap.InsertNode(N, IP); // Memoize the new node.
4749 /// getMachineNode - These are used for target selectors to create a new node
4750 /// with specified return type(s), MachineInstr opcode, and operands.
4752 /// Note that getMachineNode returns the resultant node. If there is already a
4753 /// node of the specified opcode and operands, it returns that node instead of
4754 /// the current one.
4756 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4757 SDVTList VTs = getVTList(VT);
4758 return getMachineNode(Opcode, dl, VTs, 0, 0);
4762 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4763 SDVTList VTs = getVTList(VT);
4764 SDValue Ops[] = { Op1 };
4765 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4769 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4770 SDValue Op1, SDValue Op2) {
4771 SDVTList VTs = getVTList(VT);
4772 SDValue Ops[] = { Op1, Op2 };
4773 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4777 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4778 SDValue Op1, SDValue Op2, SDValue Op3) {
4779 SDVTList VTs = getVTList(VT);
4780 SDValue Ops[] = { Op1, Op2, Op3 };
4781 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4785 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4786 const SDValue *Ops, unsigned NumOps) {
4787 SDVTList VTs = getVTList(VT);
4788 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4792 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4793 SDVTList VTs = getVTList(VT1, VT2);
4794 return getMachineNode(Opcode, dl, VTs, 0, 0);
4798 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4799 EVT VT1, EVT VT2, SDValue Op1) {
4800 SDVTList VTs = getVTList(VT1, VT2);
4801 SDValue Ops[] = { Op1 };
4802 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4806 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4807 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4808 SDVTList VTs = getVTList(VT1, VT2);
4809 SDValue Ops[] = { Op1, Op2 };
4810 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4814 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4815 EVT VT1, EVT VT2, SDValue Op1,
4816 SDValue Op2, SDValue Op3) {
4817 SDVTList VTs = getVTList(VT1, VT2);
4818 SDValue Ops[] = { Op1, Op2, Op3 };
4819 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4823 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4825 const SDValue *Ops, unsigned NumOps) {
4826 SDVTList VTs = getVTList(VT1, VT2);
4827 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4831 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4832 EVT VT1, EVT VT2, EVT VT3,
4833 SDValue Op1, SDValue Op2) {
4834 SDVTList VTs = getVTList(VT1, VT2, VT3);
4835 SDValue Ops[] = { Op1, Op2 };
4836 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4840 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4841 EVT VT1, EVT VT2, EVT VT3,
4842 SDValue Op1, SDValue Op2, SDValue Op3) {
4843 SDVTList VTs = getVTList(VT1, VT2, VT3);
4844 SDValue Ops[] = { Op1, Op2, Op3 };
4845 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4849 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4850 EVT VT1, EVT VT2, EVT VT3,
4851 const SDValue *Ops, unsigned NumOps) {
4852 SDVTList VTs = getVTList(VT1, VT2, VT3);
4853 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4857 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4858 EVT VT2, EVT VT3, EVT VT4,
4859 const SDValue *Ops, unsigned NumOps) {
4860 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4861 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4865 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4866 const std::vector<EVT> &ResultTys,
4867 const SDValue *Ops, unsigned NumOps) {
4868 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4869 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4873 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4874 const SDValue *Ops, unsigned NumOps) {
4875 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4880 FoldingSetNodeID ID;
4881 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4884 return cast<MachineSDNode>(E);
4887 // Allocate a new MachineSDNode.
4888 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4890 // Initialize the operands list.
4891 if (NumOps > array_lengthof(N->LocalOperands))
4892 // We're creating a final node that will live unmorphed for the
4893 // remainder of the current SelectionDAG iteration, so we can allocate
4894 // the operands directly out of a pool with no recycling metadata.
4895 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4898 N->InitOperands(N->LocalOperands, Ops, NumOps);
4899 N->OperandsNeedDelete = false;
4902 CSEMap.InsertNode(N, IP);
4904 AllNodes.push_back(N);
4911 /// getTargetExtractSubreg - A convenience function for creating
4912 /// TargetOpcode::EXTRACT_SUBREG nodes.
4914 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4916 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4917 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4918 VT, Operand, SRIdxVal);
4919 return SDValue(Subreg, 0);
4922 /// getTargetInsertSubreg - A convenience function for creating
4923 /// TargetOpcode::INSERT_SUBREG nodes.
4925 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4926 SDValue Operand, SDValue Subreg) {
4927 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4928 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4929 VT, Operand, Subreg, SRIdxVal);
4930 return SDValue(Result, 0);
4933 /// getNodeIfExists - Get the specified node if it's already available, or
4934 /// else return NULL.
4935 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4936 const SDValue *Ops, unsigned NumOps) {
4937 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4938 FoldingSetNodeID ID;
4939 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4941 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4947 /// getDbgValue - Creates a SDDbgValue node.
4950 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4951 DebugLoc DL, unsigned O) {
4952 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4956 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4957 DebugLoc DL, unsigned O) {
4958 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4962 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4963 DebugLoc DL, unsigned O) {
4964 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4969 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4970 /// pointed to by a use iterator is deleted, increment the use iterator
4971 /// so that it doesn't dangle.
4973 /// This class also manages a "downlink" DAGUpdateListener, to forward
4974 /// messages to ReplaceAllUsesWith's callers.
4976 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4977 SelectionDAG::DAGUpdateListener *DownLink;
4978 SDNode::use_iterator &UI;
4979 SDNode::use_iterator &UE;
4981 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4982 // Increment the iterator as needed.
4983 while (UI != UE && N == *UI)
4986 // Then forward the message.
4987 if (DownLink) DownLink->NodeDeleted(N, E);
4990 virtual void NodeUpdated(SDNode *N) {
4991 // Just forward the message.
4992 if (DownLink) DownLink->NodeUpdated(N);
4996 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4997 SDNode::use_iterator &ui,
4998 SDNode::use_iterator &ue)
4999 : DownLink(dl), UI(ui), UE(ue) {}
5004 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5005 /// This can cause recursive merging of nodes in the DAG.
5007 /// This version assumes From has a single result value.
5009 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5010 DAGUpdateListener *UpdateListener) {
5011 SDNode *From = FromN.getNode();
5012 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5013 "Cannot replace with this method!");
5014 assert(From != To.getNode() && "Cannot replace uses of with self");
5016 // Iterate over all the existing uses of From. New uses will be added
5017 // to the beginning of the use list, which we avoid visiting.
5018 // This specifically avoids visiting uses of From that arise while the
5019 // replacement is happening, because any such uses would be the result
5020 // of CSE: If an existing node looks like From after one of its operands
5021 // is replaced by To, we don't want to replace of all its users with To
5022 // too. See PR3018 for more info.
5023 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5024 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5028 // This node is about to morph, remove its old self from the CSE maps.
5029 RemoveNodeFromCSEMaps(User);
5031 // A user can appear in a use list multiple times, and when this
5032 // happens the uses are usually next to each other in the list.
5033 // To help reduce the number of CSE recomputations, process all
5034 // the uses of this user that we can find this way.
5036 SDUse &Use = UI.getUse();
5039 } while (UI != UE && *UI == User);
5041 // Now that we have modified User, add it back to the CSE maps. If it
5042 // already exists there, recursively merge the results together.
5043 AddModifiedNodeToCSEMaps(User, &Listener);
5047 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5048 /// This can cause recursive merging of nodes in the DAG.
5050 /// This version assumes that for each value of From, there is a
5051 /// corresponding value in To in the same position with the same type.
5053 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5054 DAGUpdateListener *UpdateListener) {
5056 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5057 assert((!From->hasAnyUseOfValue(i) ||
5058 From->getValueType(i) == To->getValueType(i)) &&
5059 "Cannot use this version of ReplaceAllUsesWith!");
5062 // Handle the trivial case.
5066 // Iterate over just the existing users of From. See the comments in
5067 // the ReplaceAllUsesWith above.
5068 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5069 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5073 // This node is about to morph, remove its old self from the CSE maps.
5074 RemoveNodeFromCSEMaps(User);
5076 // A user can appear in a use list multiple times, and when this
5077 // happens the uses are usually next to each other in the list.
5078 // To help reduce the number of CSE recomputations, process all
5079 // the uses of this user that we can find this way.
5081 SDUse &Use = UI.getUse();
5084 } while (UI != UE && *UI == User);
5086 // Now that we have modified User, add it back to the CSE maps. If it
5087 // already exists there, recursively merge the results together.
5088 AddModifiedNodeToCSEMaps(User, &Listener);
5092 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5093 /// This can cause recursive merging of nodes in the DAG.
5095 /// This version can replace From with any result values. To must match the
5096 /// number and types of values returned by From.
5097 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5099 DAGUpdateListener *UpdateListener) {
5100 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5101 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5103 // Iterate over just the existing users of From. See the comments in
5104 // the ReplaceAllUsesWith above.
5105 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5106 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5110 // This node is about to morph, remove its old self from the CSE maps.
5111 RemoveNodeFromCSEMaps(User);
5113 // A user can appear in a use list multiple times, and when this
5114 // happens the uses are usually next to each other in the list.
5115 // To help reduce the number of CSE recomputations, process all
5116 // the uses of this user that we can find this way.
5118 SDUse &Use = UI.getUse();
5119 const SDValue &ToOp = To[Use.getResNo()];
5122 } while (UI != UE && *UI == User);
5124 // Now that we have modified User, add it back to the CSE maps. If it
5125 // already exists there, recursively merge the results together.
5126 AddModifiedNodeToCSEMaps(User, &Listener);
5130 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5131 /// uses of other values produced by From.getNode() alone. The Deleted
5132 /// vector is handled the same way as for ReplaceAllUsesWith.
5133 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5134 DAGUpdateListener *UpdateListener){
5135 // Handle the really simple, really trivial case efficiently.
5136 if (From == To) return;
5138 // Handle the simple, trivial, case efficiently.
5139 if (From.getNode()->getNumValues() == 1) {
5140 ReplaceAllUsesWith(From, To, UpdateListener);
5144 // Iterate over just the existing users of From. See the comments in
5145 // the ReplaceAllUsesWith above.
5146 SDNode::use_iterator UI = From.getNode()->use_begin(),
5147 UE = From.getNode()->use_end();
5148 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5151 bool UserRemovedFromCSEMaps = false;
5153 // A user can appear in a use list multiple times, and when this
5154 // happens the uses are usually next to each other in the list.
5155 // To help reduce the number of CSE recomputations, process all
5156 // the uses of this user that we can find this way.
5158 SDUse &Use = UI.getUse();
5160 // Skip uses of different values from the same node.
5161 if (Use.getResNo() != From.getResNo()) {
5166 // If this node hasn't been modified yet, it's still in the CSE maps,
5167 // so remove its old self from the CSE maps.
5168 if (!UserRemovedFromCSEMaps) {
5169 RemoveNodeFromCSEMaps(User);
5170 UserRemovedFromCSEMaps = true;
5175 } while (UI != UE && *UI == User);
5177 // We are iterating over all uses of the From node, so if a use
5178 // doesn't use the specific value, no changes are made.
5179 if (!UserRemovedFromCSEMaps)
5182 // Now that we have modified User, add it back to the CSE maps. If it
5183 // already exists there, recursively merge the results together.
5184 AddModifiedNodeToCSEMaps(User, &Listener);
5189 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5190 /// to record information about a use.
5197 /// operator< - Sort Memos by User.
5198 bool operator<(const UseMemo &L, const UseMemo &R) {
5199 return (intptr_t)L.User < (intptr_t)R.User;
5203 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5204 /// uses of other values produced by From.getNode() alone. The same value
5205 /// may appear in both the From and To list. The Deleted vector is
5206 /// handled the same way as for ReplaceAllUsesWith.
5207 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5210 DAGUpdateListener *UpdateListener){
5211 // Handle the simple, trivial case efficiently.
5213 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5215 // Read up all the uses and make records of them. This helps
5216 // processing new uses that are introduced during the
5217 // replacement process.
5218 SmallVector<UseMemo, 4> Uses;
5219 for (unsigned i = 0; i != Num; ++i) {
5220 unsigned FromResNo = From[i].getResNo();
5221 SDNode *FromNode = From[i].getNode();
5222 for (SDNode::use_iterator UI = FromNode->use_begin(),
5223 E = FromNode->use_end(); UI != E; ++UI) {
5224 SDUse &Use = UI.getUse();
5225 if (Use.getResNo() == FromResNo) {
5226 UseMemo Memo = { *UI, i, &Use };
5227 Uses.push_back(Memo);
5232 // Sort the uses, so that all the uses from a given User are together.
5233 std::sort(Uses.begin(), Uses.end());
5235 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5236 UseIndex != UseIndexEnd; ) {
5237 // We know that this user uses some value of From. If it is the right
5238 // value, update it.
5239 SDNode *User = Uses[UseIndex].User;
5241 // This node is about to morph, remove its old self from the CSE maps.
5242 RemoveNodeFromCSEMaps(User);
5244 // The Uses array is sorted, so all the uses for a given User
5245 // are next to each other in the list.
5246 // To help reduce the number of CSE recomputations, process all
5247 // the uses of this user that we can find this way.
5249 unsigned i = Uses[UseIndex].Index;
5250 SDUse &Use = *Uses[UseIndex].Use;
5254 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5256 // Now that we have modified User, add it back to the CSE maps. If it
5257 // already exists there, recursively merge the results together.
5258 AddModifiedNodeToCSEMaps(User, UpdateListener);
5262 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5263 /// based on their topological order. It returns the maximum id and a vector
5264 /// of the SDNodes* in assigned order by reference.
5265 unsigned SelectionDAG::AssignTopologicalOrder() {
5267 unsigned DAGSize = 0;
5269 // SortedPos tracks the progress of the algorithm. Nodes before it are
5270 // sorted, nodes after it are unsorted. When the algorithm completes
5271 // it is at the end of the list.
5272 allnodes_iterator SortedPos = allnodes_begin();
5274 // Visit all the nodes. Move nodes with no operands to the front of
5275 // the list immediately. Annotate nodes that do have operands with their
5276 // operand count. Before we do this, the Node Id fields of the nodes
5277 // may contain arbitrary values. After, the Node Id fields for nodes
5278 // before SortedPos will contain the topological sort index, and the
5279 // Node Id fields for nodes At SortedPos and after will contain the
5280 // count of outstanding operands.
5281 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5284 unsigned Degree = N->getNumOperands();
5286 // A node with no uses, add it to the result array immediately.
5287 N->setNodeId(DAGSize++);
5288 allnodes_iterator Q = N;
5290 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5291 assert(SortedPos != AllNodes.end() && "Overran node list");
5294 // Temporarily use the Node Id as scratch space for the degree count.
5295 N->setNodeId(Degree);
5299 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5300 // such that by the time the end is reached all nodes will be sorted.
5301 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5304 // N is in sorted position, so all its uses have one less operand
5305 // that needs to be sorted.
5306 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5309 unsigned Degree = P->getNodeId();
5310 assert(Degree != 0 && "Invalid node degree");
5313 // All of P's operands are sorted, so P may sorted now.
5314 P->setNodeId(DAGSize++);
5316 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5317 assert(SortedPos != AllNodes.end() && "Overran node list");
5320 // Update P's outstanding operand count.
5321 P->setNodeId(Degree);
5324 if (I == SortedPos) {
5327 dbgs() << "Overran sorted position:\n";
5330 llvm_unreachable(0);
5334 assert(SortedPos == AllNodes.end() &&
5335 "Topological sort incomplete!");
5336 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5337 "First node in topological sort is not the entry token!");
5338 assert(AllNodes.front().getNodeId() == 0 &&
5339 "First node in topological sort has non-zero id!");
5340 assert(AllNodes.front().getNumOperands() == 0 &&
5341 "First node in topological sort has operands!");
5342 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5343 "Last node in topologic sort has unexpected id!");
5344 assert(AllNodes.back().use_empty() &&
5345 "Last node in topologic sort has users!");
5346 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5350 /// AssignOrdering - Assign an order to the SDNode.
5351 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5352 assert(SD && "Trying to assign an order to a null node!");
5353 Ordering->add(SD, Order);
5356 /// GetOrdering - Get the order for the SDNode.
5357 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5358 assert(SD && "Trying to get the order of a null node!");
5359 return Ordering->getOrder(SD);
5362 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5363 /// value is produced by SD.
5364 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5365 DbgInfo->add(DB, SD, isParameter);
5367 SD->setHasDebugValue(true);
5370 //===----------------------------------------------------------------------===//
5372 //===----------------------------------------------------------------------===//
5374 HandleSDNode::~HandleSDNode() {
5378 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5379 const GlobalValue *GA,
5380 EVT VT, int64_t o, unsigned char TF)
5381 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5385 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5386 MachineMemOperand *mmo)
5387 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5388 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5389 MMO->isNonTemporal());
5390 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5391 assert(isNonTemporal() == MMO->isNonTemporal() &&
5392 "Non-temporal encoding error!");
5393 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5396 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5397 const SDValue *Ops, unsigned NumOps, EVT memvt,
5398 MachineMemOperand *mmo)
5399 : SDNode(Opc, dl, VTs, Ops, NumOps),
5400 MemoryVT(memvt), MMO(mmo) {
5401 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5402 MMO->isNonTemporal());
5403 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5404 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5407 /// Profile - Gather unique data for the node.
5409 void SDNode::Profile(FoldingSetNodeID &ID) const {
5410 AddNodeIDNode(ID, this);
5415 std::vector<EVT> VTs;
5418 VTs.reserve(MVT::LAST_VALUETYPE);
5419 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5420 VTs.push_back(MVT((MVT::SimpleValueType)i));
5425 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5426 static ManagedStatic<EVTArray> SimpleVTArray;
5427 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5429 /// getValueTypeList - Return a pointer to the specified value type.
5431 const EVT *SDNode::getValueTypeList(EVT VT) {
5432 if (VT.isExtended()) {
5433 sys::SmartScopedLock<true> Lock(*VTMutex);
5434 return &(*EVTs->insert(VT).first);
5436 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE &&
5437 "Value type out of range!");
5438 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5442 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5443 /// indicated value. This method ignores uses of other values defined by this
5445 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5446 assert(Value < getNumValues() && "Bad value!");
5448 // TODO: Only iterate over uses of a given value of the node
5449 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5450 if (UI.getUse().getResNo() == Value) {
5457 // Found exactly the right number of uses?
5462 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5463 /// value. This method ignores uses of other values defined by this operation.
5464 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5465 assert(Value < getNumValues() && "Bad value!");
5467 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5468 if (UI.getUse().getResNo() == Value)
5475 /// isOnlyUserOf - Return true if this node is the only use of N.
5477 bool SDNode::isOnlyUserOf(SDNode *N) const {
5479 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5490 /// isOperand - Return true if this node is an operand of N.
5492 bool SDValue::isOperandOf(SDNode *N) const {
5493 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5494 if (*this == N->getOperand(i))
5499 bool SDNode::isOperandOf(SDNode *N) const {
5500 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5501 if (this == N->OperandList[i].getNode())
5506 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5507 /// be a chain) reaches the specified operand without crossing any
5508 /// side-effecting instructions. In practice, this looks through token
5509 /// factors and non-volatile loads. In order to remain efficient, this only
5510 /// looks a couple of nodes in, it does not do an exhaustive search.
5511 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5512 unsigned Depth) const {
5513 if (*this == Dest) return true;
5515 // Don't search too deeply, we just want to be able to see through
5516 // TokenFactor's etc.
5517 if (Depth == 0) return false;
5519 // If this is a token factor, all inputs to the TF happen in parallel. If any
5520 // of the operands of the TF reach dest, then we can do the xform.
5521 if (getOpcode() == ISD::TokenFactor) {
5522 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5523 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5528 // Loads don't have side effects, look through them.
5529 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5530 if (!Ld->isVolatile())
5531 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5536 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5537 /// is either an operand of N or it can be reached by traversing up the operands.
5538 /// NOTE: this is an expensive method. Use it carefully.
5539 bool SDNode::isPredecessorOf(SDNode *N) const {
5540 SmallPtrSet<SDNode *, 32> Visited;
5541 SmallVector<SDNode *, 16> Worklist;
5542 Worklist.push_back(N);
5545 N = Worklist.pop_back_val();
5546 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5547 SDNode *Op = N->getOperand(i).getNode();
5550 if (Visited.insert(Op))
5551 Worklist.push_back(Op);
5553 } while (!Worklist.empty());
5558 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5559 assert(Num < NumOperands && "Invalid child # of SDNode!");
5560 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5563 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5564 switch (getOpcode()) {
5566 if (getOpcode() < ISD::BUILTIN_OP_END)
5567 return "<<Unknown DAG Node>>";
5568 if (isMachineOpcode()) {
5570 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5571 if (getMachineOpcode() < TII->getNumOpcodes())
5572 return TII->get(getMachineOpcode()).getName();
5573 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5576 const TargetLowering &TLI = G->getTargetLoweringInfo();
5577 const char *Name = TLI.getTargetNodeName(getOpcode());
5578 if (Name) return Name;
5579 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5581 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5584 case ISD::DELETED_NODE:
5585 return "<<Deleted Node!>>";
5587 case ISD::PREFETCH: return "Prefetch";
5588 case ISD::MEMBARRIER: return "MemBarrier";
5589 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5590 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5591 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5592 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5593 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5594 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5595 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5596 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5597 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5598 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5599 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5600 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5601 case ISD::PCMARKER: return "PCMarker";
5602 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5603 case ISD::SRCVALUE: return "SrcValue";
5604 case ISD::MDNODE_SDNODE: return "MDNode";
5605 case ISD::EntryToken: return "EntryToken";
5606 case ISD::TokenFactor: return "TokenFactor";
5607 case ISD::AssertSext: return "AssertSext";
5608 case ISD::AssertZext: return "AssertZext";
5610 case ISD::BasicBlock: return "BasicBlock";
5611 case ISD::VALUETYPE: return "ValueType";
5612 case ISD::Register: return "Register";
5614 case ISD::Constant: return "Constant";
5615 case ISD::ConstantFP: return "ConstantFP";
5616 case ISD::GlobalAddress: return "GlobalAddress";
5617 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5618 case ISD::FrameIndex: return "FrameIndex";
5619 case ISD::JumpTable: return "JumpTable";
5620 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5621 case ISD::RETURNADDR: return "RETURNADDR";
5622 case ISD::FRAMEADDR: return "FRAMEADDR";
5623 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5624 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5625 case ISD::LSDAADDR: return "LSDAADDR";
5626 case ISD::EHSELECTION: return "EHSELECTION";
5627 case ISD::EH_RETURN: return "EH_RETURN";
5628 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5629 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5630 case ISD::ConstantPool: return "ConstantPool";
5631 case ISD::ExternalSymbol: return "ExternalSymbol";
5632 case ISD::BlockAddress: return "BlockAddress";
5633 case ISD::INTRINSIC_WO_CHAIN:
5634 case ISD::INTRINSIC_VOID:
5635 case ISD::INTRINSIC_W_CHAIN: {
5636 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5637 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5638 if (IID < Intrinsic::num_intrinsics)
5639 return Intrinsic::getName((Intrinsic::ID)IID);
5640 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5641 return TII->getName(IID);
5642 llvm_unreachable("Invalid intrinsic ID");
5645 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5646 case ISD::TargetConstant: return "TargetConstant";
5647 case ISD::TargetConstantFP:return "TargetConstantFP";
5648 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5649 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5650 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5651 case ISD::TargetJumpTable: return "TargetJumpTable";
5652 case ISD::TargetConstantPool: return "TargetConstantPool";
5653 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5654 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5656 case ISD::CopyToReg: return "CopyToReg";
5657 case ISD::CopyFromReg: return "CopyFromReg";
5658 case ISD::UNDEF: return "undef";
5659 case ISD::MERGE_VALUES: return "merge_values";
5660 case ISD::INLINEASM: return "inlineasm";
5661 case ISD::EH_LABEL: return "eh_label";
5662 case ISD::HANDLENODE: return "handlenode";
5665 case ISD::FABS: return "fabs";
5666 case ISD::FNEG: return "fneg";
5667 case ISD::FSQRT: return "fsqrt";
5668 case ISD::FSIN: return "fsin";
5669 case ISD::FCOS: return "fcos";
5670 case ISD::FTRUNC: return "ftrunc";
5671 case ISD::FFLOOR: return "ffloor";
5672 case ISD::FCEIL: return "fceil";
5673 case ISD::FRINT: return "frint";
5674 case ISD::FNEARBYINT: return "fnearbyint";
5675 case ISD::FEXP: return "fexp";
5676 case ISD::FEXP2: return "fexp2";
5677 case ISD::FLOG: return "flog";
5678 case ISD::FLOG2: return "flog2";
5679 case ISD::FLOG10: return "flog10";
5682 case ISD::ADD: return "add";
5683 case ISD::SUB: return "sub";
5684 case ISD::MUL: return "mul";
5685 case ISD::MULHU: return "mulhu";
5686 case ISD::MULHS: return "mulhs";
5687 case ISD::SDIV: return "sdiv";
5688 case ISD::UDIV: return "udiv";
5689 case ISD::SREM: return "srem";
5690 case ISD::UREM: return "urem";
5691 case ISD::SMUL_LOHI: return "smul_lohi";
5692 case ISD::UMUL_LOHI: return "umul_lohi";
5693 case ISD::SDIVREM: return "sdivrem";
5694 case ISD::UDIVREM: return "udivrem";
5695 case ISD::AND: return "and";
5696 case ISD::OR: return "or";
5697 case ISD::XOR: return "xor";
5698 case ISD::SHL: return "shl";
5699 case ISD::SRA: return "sra";
5700 case ISD::SRL: return "srl";
5701 case ISD::ROTL: return "rotl";
5702 case ISD::ROTR: return "rotr";
5703 case ISD::FADD: return "fadd";
5704 case ISD::FSUB: return "fsub";
5705 case ISD::FMUL: return "fmul";
5706 case ISD::FDIV: return "fdiv";
5707 case ISD::FREM: return "frem";
5708 case ISD::FCOPYSIGN: return "fcopysign";
5709 case ISD::FGETSIGN: return "fgetsign";
5710 case ISD::FPOW: return "fpow";
5712 case ISD::FPOWI: return "fpowi";
5713 case ISD::SETCC: return "setcc";
5714 case ISD::VSETCC: return "vsetcc";
5715 case ISD::SELECT: return "select";
5716 case ISD::SELECT_CC: return "select_cc";
5717 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5718 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5719 case ISD::CONCAT_VECTORS: return "concat_vectors";
5720 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5721 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5722 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5723 case ISD::CARRY_FALSE: return "carry_false";
5724 case ISD::ADDC: return "addc";
5725 case ISD::ADDE: return "adde";
5726 case ISD::SADDO: return "saddo";
5727 case ISD::UADDO: return "uaddo";
5728 case ISD::SSUBO: return "ssubo";
5729 case ISD::USUBO: return "usubo";
5730 case ISD::SMULO: return "smulo";
5731 case ISD::UMULO: return "umulo";
5732 case ISD::SUBC: return "subc";
5733 case ISD::SUBE: return "sube";
5734 case ISD::SHL_PARTS: return "shl_parts";
5735 case ISD::SRA_PARTS: return "sra_parts";
5736 case ISD::SRL_PARTS: return "srl_parts";
5738 // Conversion operators.
5739 case ISD::SIGN_EXTEND: return "sign_extend";
5740 case ISD::ZERO_EXTEND: return "zero_extend";
5741 case ISD::ANY_EXTEND: return "any_extend";
5742 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5743 case ISD::TRUNCATE: return "truncate";
5744 case ISD::FP_ROUND: return "fp_round";
5745 case ISD::FLT_ROUNDS_: return "flt_rounds";
5746 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5747 case ISD::FP_EXTEND: return "fp_extend";
5749 case ISD::SINT_TO_FP: return "sint_to_fp";
5750 case ISD::UINT_TO_FP: return "uint_to_fp";
5751 case ISD::FP_TO_SINT: return "fp_to_sint";
5752 case ISD::FP_TO_UINT: return "fp_to_uint";
5753 case ISD::BIT_CONVERT: return "bit_convert";
5754 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5755 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5757 case ISD::CONVERT_RNDSAT: {
5758 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5759 default: llvm_unreachable("Unknown cvt code!");
5760 case ISD::CVT_FF: return "cvt_ff";
5761 case ISD::CVT_FS: return "cvt_fs";
5762 case ISD::CVT_FU: return "cvt_fu";
5763 case ISD::CVT_SF: return "cvt_sf";
5764 case ISD::CVT_UF: return "cvt_uf";
5765 case ISD::CVT_SS: return "cvt_ss";
5766 case ISD::CVT_SU: return "cvt_su";
5767 case ISD::CVT_US: return "cvt_us";
5768 case ISD::CVT_UU: return "cvt_uu";
5772 // Control flow instructions
5773 case ISD::BR: return "br";
5774 case ISD::BRIND: return "brind";
5775 case ISD::BR_JT: return "br_jt";
5776 case ISD::BRCOND: return "brcond";
5777 case ISD::BR_CC: return "br_cc";
5778 case ISD::CALLSEQ_START: return "callseq_start";
5779 case ISD::CALLSEQ_END: return "callseq_end";
5782 case ISD::LOAD: return "load";
5783 case ISD::STORE: return "store";
5784 case ISD::VAARG: return "vaarg";
5785 case ISD::VACOPY: return "vacopy";
5786 case ISD::VAEND: return "vaend";
5787 case ISD::VASTART: return "vastart";
5788 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5789 case ISD::EXTRACT_ELEMENT: return "extract_element";
5790 case ISD::BUILD_PAIR: return "build_pair";
5791 case ISD::STACKSAVE: return "stacksave";
5792 case ISD::STACKRESTORE: return "stackrestore";
5793 case ISD::TRAP: return "trap";
5796 case ISD::BSWAP: return "bswap";
5797 case ISD::CTPOP: return "ctpop";
5798 case ISD::CTTZ: return "cttz";
5799 case ISD::CTLZ: return "ctlz";
5802 case ISD::TRAMPOLINE: return "trampoline";
5805 switch (cast<CondCodeSDNode>(this)->get()) {
5806 default: llvm_unreachable("Unknown setcc condition!");
5807 case ISD::SETOEQ: return "setoeq";
5808 case ISD::SETOGT: return "setogt";
5809 case ISD::SETOGE: return "setoge";
5810 case ISD::SETOLT: return "setolt";
5811 case ISD::SETOLE: return "setole";
5812 case ISD::SETONE: return "setone";
5814 case ISD::SETO: return "seto";
5815 case ISD::SETUO: return "setuo";
5816 case ISD::SETUEQ: return "setue";
5817 case ISD::SETUGT: return "setugt";
5818 case ISD::SETUGE: return "setuge";
5819 case ISD::SETULT: return "setult";
5820 case ISD::SETULE: return "setule";
5821 case ISD::SETUNE: return "setune";
5823 case ISD::SETEQ: return "seteq";
5824 case ISD::SETGT: return "setgt";
5825 case ISD::SETGE: return "setge";
5826 case ISD::SETLT: return "setlt";
5827 case ISD::SETLE: return "setle";
5828 case ISD::SETNE: return "setne";
5833 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5842 return "<post-inc>";
5844 return "<post-dec>";
5848 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5849 std::string S = "< ";
5863 if (getByValAlign())
5864 S += "byval-align:" + utostr(getByValAlign()) + " ";
5866 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5868 S += "byval-size:" + utostr(getByValSize()) + " ";
5872 void SDNode::dump() const { dump(0); }
5873 void SDNode::dump(const SelectionDAG *G) const {
5877 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5878 OS << (void*)this << ": ";
5880 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5882 if (getValueType(i) == MVT::Other)
5885 OS << getValueType(i).getEVTString();
5887 OS << " = " << getOperationName(G);
5890 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5891 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5892 if (!MN->memoperands_empty()) {
5895 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5896 e = MN->memoperands_end(); i != e; ++i) {
5903 } else if (const ShuffleVectorSDNode *SVN =
5904 dyn_cast<ShuffleVectorSDNode>(this)) {
5906 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5907 int Idx = SVN->getMaskElt(i);
5915 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5916 OS << '<' << CSDN->getAPIntValue() << '>';
5917 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5918 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5919 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5920 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5921 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5924 CSDN->getValueAPF().bitcastToAPInt().dump();
5927 } else if (const GlobalAddressSDNode *GADN =
5928 dyn_cast<GlobalAddressSDNode>(this)) {
5929 int64_t offset = GADN->getOffset();
5931 WriteAsOperand(OS, GADN->getGlobal());
5934 OS << " + " << offset;
5936 OS << " " << offset;
5937 if (unsigned int TF = GADN->getTargetFlags())
5938 OS << " [TF=" << TF << ']';
5939 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5940 OS << "<" << FIDN->getIndex() << ">";
5941 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5942 OS << "<" << JTDN->getIndex() << ">";
5943 if (unsigned int TF = JTDN->getTargetFlags())
5944 OS << " [TF=" << TF << ']';
5945 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5946 int offset = CP->getOffset();
5947 if (CP->isMachineConstantPoolEntry())
5948 OS << "<" << *CP->getMachineCPVal() << ">";
5950 OS << "<" << *CP->getConstVal() << ">";
5952 OS << " + " << offset;
5954 OS << " " << offset;
5955 if (unsigned int TF = CP->getTargetFlags())
5956 OS << " [TF=" << TF << ']';
5957 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5959 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5961 OS << LBB->getName() << " ";
5962 OS << (const void*)BBDN->getBasicBlock() << ">";
5963 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5964 if (G && R->getReg() &&
5965 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5966 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5968 OS << " %reg" << R->getReg();
5970 } else if (const ExternalSymbolSDNode *ES =
5971 dyn_cast<ExternalSymbolSDNode>(this)) {
5972 OS << "'" << ES->getSymbol() << "'";
5973 if (unsigned int TF = ES->getTargetFlags())
5974 OS << " [TF=" << TF << ']';
5975 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5977 OS << "<" << M->getValue() << ">";
5980 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
5982 OS << "<" << MD->getMD() << ">";
5985 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5986 OS << ":" << N->getVT().getEVTString();
5988 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5989 OS << "<" << *LD->getMemOperand();
5992 switch (LD->getExtensionType()) {
5993 default: doExt = false; break;
5994 case ISD::EXTLOAD: OS << ", anyext"; break;
5995 case ISD::SEXTLOAD: OS << ", sext"; break;
5996 case ISD::ZEXTLOAD: OS << ", zext"; break;
5999 OS << " from " << LD->getMemoryVT().getEVTString();
6001 const char *AM = getIndexedModeName(LD->getAddressingMode());
6006 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6007 OS << "<" << *ST->getMemOperand();
6009 if (ST->isTruncatingStore())
6010 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6012 const char *AM = getIndexedModeName(ST->getAddressingMode());
6017 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6018 OS << "<" << *M->getMemOperand() << ">";
6019 } else if (const BlockAddressSDNode *BA =
6020 dyn_cast<BlockAddressSDNode>(this)) {
6022 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6024 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6026 if (unsigned int TF = BA->getTargetFlags())
6027 OS << " [TF=" << TF << ']';
6031 if (unsigned Order = G->GetOrdering(this))
6032 OS << " [ORD=" << Order << ']';
6034 if (getNodeId() != -1)
6035 OS << " [ID=" << getNodeId() << ']';
6037 DebugLoc dl = getDebugLoc();
6038 if (G && !dl.isUnknown()) {
6040 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6042 // Omit the directory, since it's usually long and uninteresting.
6044 OS << Scope.getFilename();
6047 OS << ':' << dl.getLine();
6048 if (dl.getCol() != 0)
6049 OS << ':' << dl.getCol();
6053 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6055 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6056 if (i) OS << ", "; else OS << " ";
6057 OS << (void*)getOperand(i).getNode();
6058 if (unsigned RN = getOperand(i).getResNo())
6061 print_details(OS, G);
6064 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6065 const SelectionDAG *G, unsigned depth,
6078 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6080 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6084 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6085 unsigned depth) const {
6086 printrWithDepthHelper(OS, this, G, depth, 0);
6089 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6090 // Don't print impossibly deep things.
6091 printrWithDepth(OS, G, 100);
6094 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6095 printrWithDepth(dbgs(), G, depth);
6098 void SDNode::dumprFull(const SelectionDAG *G) const {
6099 // Don't print impossibly deep things.
6100 dumprWithDepth(G, 100);
6103 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6104 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6105 if (N->getOperand(i).getNode()->hasOneUse())
6106 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6108 dbgs() << "\n" << std::string(indent+2, ' ')
6109 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6113 dbgs().indent(indent);
6117 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6118 assert(N->getNumValues() == 1 &&
6119 "Can't unroll a vector with multiple results!");
6121 EVT VT = N->getValueType(0);
6122 unsigned NE = VT.getVectorNumElements();
6123 EVT EltVT = VT.getVectorElementType();
6124 DebugLoc dl = N->getDebugLoc();
6126 SmallVector<SDValue, 8> Scalars;
6127 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6129 // If ResNE is 0, fully unroll the vector op.
6132 else if (NE > ResNE)
6136 for (i= 0; i != NE; ++i) {
6137 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6138 SDValue Operand = N->getOperand(j);
6139 EVT OperandVT = Operand.getValueType();
6140 if (OperandVT.isVector()) {
6141 // A vector operand; extract a single element.
6142 EVT OperandEltVT = OperandVT.getVectorElementType();
6143 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6146 getConstant(i, MVT::i32));
6148 // A scalar operand; just use it as is.
6149 Operands[j] = Operand;
6153 switch (N->getOpcode()) {
6155 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6156 &Operands[0], Operands.size()));
6163 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6164 getShiftAmountOperand(Operands[1])));
6166 case ISD::SIGN_EXTEND_INREG:
6167 case ISD::FP_ROUND_INREG: {
6168 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6169 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6171 getValueType(ExtVT)));
6176 for (; i < ResNE; ++i)
6177 Scalars.push_back(getUNDEF(EltVT));
6179 return getNode(ISD::BUILD_VECTOR, dl,
6180 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6181 &Scalars[0], Scalars.size());
6185 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6186 /// location that is 'Dist' units away from the location that the 'Base' load
6187 /// is loading from.
6188 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6189 unsigned Bytes, int Dist) const {
6190 if (LD->getChain() != Base->getChain())
6192 EVT VT = LD->getValueType(0);
6193 if (VT.getSizeInBits() / 8 != Bytes)
6196 SDValue Loc = LD->getOperand(1);
6197 SDValue BaseLoc = Base->getOperand(1);
6198 if (Loc.getOpcode() == ISD::FrameIndex) {
6199 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6201 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6202 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6203 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6204 int FS = MFI->getObjectSize(FI);
6205 int BFS = MFI->getObjectSize(BFI);
6206 if (FS != BFS || FS != (int)Bytes) return false;
6207 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6209 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6210 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6211 if (V && (V->getSExtValue() == Dist*Bytes))
6215 const GlobalValue *GV1 = NULL;
6216 const GlobalValue *GV2 = NULL;
6217 int64_t Offset1 = 0;
6218 int64_t Offset2 = 0;
6219 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6220 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6221 if (isGA1 && isGA2 && GV1 == GV2)
6222 return Offset1 == (Offset2 + Dist*Bytes);
6227 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6228 /// it cannot be inferred.
6229 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6230 // If this is a GlobalAddress + cst, return the alignment.
6231 const GlobalValue *GV;
6232 int64_t GVOffset = 0;
6233 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6234 // If GV has specified alignment, then use it. Otherwise, use the preferred
6236 unsigned Align = GV->getAlignment();
6238 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6239 if (GVar->hasInitializer()) {
6240 const TargetData *TD = TLI.getTargetData();
6241 Align = TD->getPreferredAlignment(GVar);
6245 return MinAlign(Align, GVOffset);
6248 // If this is a direct reference to a stack slot, use information about the
6249 // stack slot's alignment.
6250 int FrameIdx = 1 << 31;
6251 int64_t FrameOffset = 0;
6252 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6253 FrameIdx = FI->getIndex();
6254 } else if (Ptr.getOpcode() == ISD::ADD &&
6255 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6256 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6257 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6258 FrameOffset = Ptr.getConstantOperandVal(1);
6261 if (FrameIdx != (1 << 31)) {
6262 // FIXME: Handle FI+CST.
6263 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6264 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6272 void SelectionDAG::dump() const {
6273 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6275 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6277 const SDNode *N = I;
6278 if (!N->hasOneUse() && N != getRoot().getNode())
6279 DumpNodes(N, 2, this);
6282 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6287 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6289 print_details(OS, G);
6292 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6293 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6294 const SelectionDAG *G, VisitedSDNodeSet &once) {
6295 if (!once.insert(N)) // If we've been here before, return now.
6298 // Dump the current SDNode, but don't end the line yet.
6299 OS << std::string(indent, ' ');
6302 // Having printed this SDNode, walk the children:
6303 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6304 const SDNode *child = N->getOperand(i).getNode();
6309 if (child->getNumOperands() == 0) {
6310 // This child has no grandchildren; print it inline right here.
6311 child->printr(OS, G);
6313 } else { // Just the address. FIXME: also print the child's opcode.
6315 if (unsigned RN = N->getOperand(i).getResNo())
6322 // Dump children that have grandchildren on their own line(s).
6323 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6324 const SDNode *child = N->getOperand(i).getNode();
6325 DumpNodesr(OS, child, indent+2, G, once);
6329 void SDNode::dumpr() const {
6330 VisitedSDNodeSet once;
6331 DumpNodesr(dbgs(), this, 0, 0, once);
6334 void SDNode::dumpr(const SelectionDAG *G) const {
6335 VisitedSDNodeSet once;
6336 DumpNodesr(dbgs(), this, 0, G, once);
6340 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6341 unsigned GlobalAddressSDNode::getAddressSpace() const {
6342 return getGlobal()->getType()->getAddressSpace();
6346 const Type *ConstantPoolSDNode::getType() const {
6347 if (isMachineConstantPoolEntry())
6348 return Val.MachineCPVal->getType();
6349 return Val.ConstVal->getType();
6352 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6354 unsigned &SplatBitSize,
6356 unsigned MinSplatBits,
6358 EVT VT = getValueType(0);
6359 assert(VT.isVector() && "Expected a vector type");
6360 unsigned sz = VT.getSizeInBits();
6361 if (MinSplatBits > sz)
6364 SplatValue = APInt(sz, 0);
6365 SplatUndef = APInt(sz, 0);
6367 // Get the bits. Bits with undefined values (when the corresponding element
6368 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6369 // in SplatValue. If any of the values are not constant, give up and return
6371 unsigned int nOps = getNumOperands();
6372 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6373 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6375 for (unsigned j = 0; j < nOps; ++j) {
6376 unsigned i = isBigEndian ? nOps-1-j : j;
6377 SDValue OpVal = getOperand(i);
6378 unsigned BitPos = j * EltBitSize;
6380 if (OpVal.getOpcode() == ISD::UNDEF)
6381 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6382 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6383 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6384 zextOrTrunc(sz) << BitPos;
6385 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6386 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6391 // The build_vector is all constants or undefs. Find the smallest element
6392 // size that splats the vector.
6394 HasAnyUndefs = (SplatUndef != 0);
6397 unsigned HalfSize = sz / 2;
6398 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6399 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6400 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6401 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6403 // If the two halves do not match (ignoring undef bits), stop here.
6404 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6405 MinSplatBits > HalfSize)
6408 SplatValue = HighValue | LowValue;
6409 SplatUndef = HighUndef & LowUndef;
6418 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6419 // Find the first non-undef value in the shuffle mask.
6421 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6424 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6426 // Make sure all remaining elements are either undef or the same as the first
6428 for (int Idx = Mask[i]; i != e; ++i)
6429 if (Mask[i] >= 0 && Mask[i] != Idx)
6435 static void checkForCyclesHelper(const SDNode *N,
6436 SmallPtrSet<const SDNode*, 32> &Visited,
6437 SmallPtrSet<const SDNode*, 32> &Checked) {
6438 // If this node has already been checked, don't check it again.
6439 if (Checked.count(N))
6442 // If a node has already been visited on this depth-first walk, reject it as
6444 if (!Visited.insert(N)) {
6445 dbgs() << "Offending node:\n";
6447 errs() << "Detected cycle in SelectionDAG\n";
6451 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6452 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6459 void llvm::checkForCycles(const llvm::SDNode *N) {
6461 assert(N && "Checking nonexistant SDNode");
6462 SmallPtrSet<const SDNode*, 32> visited;
6463 SmallPtrSet<const SDNode*, 32> checked;
6464 checkForCyclesHelper(N, visited, checked);
6468 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6469 checkForCycles(DAG->getRoot().getNode());