1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/ValueTracking.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalAlias.h"
21 #include "llvm/GlobalVariable.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CallingConv.h"
26 #include "llvm/CodeGen/MachineBasicBlock.h"
27 #include "llvm/CodeGen/MachineConstantPool.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineModuleInfo.h"
30 #include "llvm/CodeGen/PseudoSourceValue.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetFrameInfo.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/System/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BIT_CONVERT)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BIT_CONVERT)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
200 for (unsigned i = 1; i < NumElems; ++i) {
201 SDValue V = N->getOperand(i);
202 if (V.getOpcode() != ISD::UNDEF)
208 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
209 /// when given the operation for (X op Y).
210 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
211 // To perform this operation, we just need to swap the L and G bits of the
213 unsigned OldL = (Operation >> 2) & 1;
214 unsigned OldG = (Operation >> 1) & 1;
215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
216 (OldL << 1) | // New G bit
217 (OldG << 2)); // New L bit.
220 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
221 /// 'op' is a valid SetCC operation.
222 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
223 unsigned Operation = Op;
225 Operation ^= 7; // Flip L, G, E bits, but not U.
227 Operation ^= 15; // Flip all of the condition bits.
229 if (Operation > ISD::SETTRUE2)
230 Operation &= ~8; // Don't let N and U bits get set.
232 return ISD::CondCode(Operation);
236 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
237 /// signed operation and 2 if the result is an unsigned comparison. Return zero
238 /// if the operation does not depend on the sign of the input (setne and seteq).
239 static int isSignedOp(ISD::CondCode Opcode) {
241 default: llvm_unreachable("Illegal integer setcc operation!");
243 case ISD::SETNE: return 0;
247 case ISD::SETGE: return 1;
251 case ISD::SETUGE: return 2;
255 /// getSetCCOrOperation - Return the result of a logical OR between different
256 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
257 /// returns SETCC_INVALID if it is not possible to represent the resultant
259 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
262 // Cannot fold a signed integer setcc with an unsigned integer setcc.
263 return ISD::SETCC_INVALID;
265 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
267 // If the N and U bits get set then the resultant comparison DOES suddenly
268 // care about orderedness, and is true when ordered.
269 if (Op > ISD::SETTRUE2)
270 Op &= ~16; // Clear the U bit if the N bit is set.
272 // Canonicalize illegal integer setcc's.
273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
276 return ISD::CondCode(Op);
279 /// getSetCCAndOperation - Return the result of a logical AND between different
280 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
281 /// function returns zero if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed setcc with an unsigned setcc.
287 return ISD::SETCC_INVALID;
289 // Combine all of the condition bits.
290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
292 // Canonicalize illegal integer setcc's.
296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
297 case ISD::SETOEQ: // SETEQ & SETU[LG]E
298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
307 const TargetMachine &SelectionDAG::getTarget() const {
308 return MF->getTarget();
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
749 void SelectionDAG::VerifyNode(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// getEVTAlignment - Compute the default alignment value for the
786 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
787 const Type *Ty = VT == MVT::iPTR ?
788 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
789 VT.getTypeForEVT(*getContext());
791 return TLI.getTargetData()->getABITypeAlignment(Ty);
794 // EntryNode could meaningfully have debug info if we can find it...
795 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
796 : TLI(tli), FLI(fli),
797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
798 Root(getEntryNode()), Ordering(0) {
799 AllNodes.push_back(&EntryNode);
800 Ordering = new SDNodeOrdering();
801 DbgInfo = new SDDbgInfo();
804 void SelectionDAG::init(MachineFunction &mf) {
806 Context = &mf.getFunction()->getContext();
809 SelectionDAG::~SelectionDAG() {
816 void SelectionDAG::allnodes_clear() {
817 assert(&*AllNodes.begin() == &EntryNode);
818 AllNodes.remove(AllNodes.begin());
819 while (!AllNodes.empty())
820 DeallocateNode(AllNodes.begin());
823 void SelectionDAG::clear() {
825 OperandAllocator.Reset();
828 ExtendedValueTypeNodes.clear();
829 ExternalSymbols.clear();
830 TargetExternalSymbols.clear();
831 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
832 static_cast<CondCodeSDNode*>(0));
833 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
834 static_cast<SDNode*>(0));
836 EntryNode.UseList = 0;
837 AllNodes.push_back(&EntryNode);
838 Root = getEntryNode();
840 Ordering = new SDNodeOrdering();
843 DbgInfo = new SDDbgInfo();
846 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
847 return VT.bitsGT(Op.getValueType()) ?
848 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
849 getNode(ISD::TRUNCATE, DL, VT, Op);
852 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
853 return VT.bitsGT(Op.getValueType()) ?
854 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
855 getNode(ISD::TRUNCATE, DL, VT, Op);
858 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
859 assert(!VT.isVector() &&
860 "getZeroExtendInReg should use the vector element type instead of "
862 if (Op.getValueType() == VT) return Op;
863 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
864 APInt Imm = APInt::getLowBitsSet(BitWidth,
866 return getNode(ISD::AND, DL, Op.getValueType(), Op,
867 getConstant(Imm, Op.getValueType()));
870 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
872 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
873 EVT EltVT = VT.getScalarType();
875 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
876 return getNode(ISD::XOR, DL, VT, Val, NegOne);
879 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
880 EVT EltVT = VT.getScalarType();
881 assert((EltVT.getSizeInBits() >= 64 ||
882 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
883 "getConstant with a uint64_t value that doesn't fit in the type!");
884 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
887 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
888 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
891 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
892 assert(VT.isInteger() && "Cannot create FP integer constant!");
894 EVT EltVT = VT.getScalarType();
895 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
896 "APInt size does not match type size!");
898 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
900 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
904 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
906 return SDValue(N, 0);
909 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
910 CSEMap.InsertNode(N, IP);
911 AllNodes.push_back(N);
914 SDValue Result(N, 0);
916 SmallVector<SDValue, 8> Ops;
917 Ops.assign(VT.getVectorNumElements(), Result);
918 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
923 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
924 return getConstant(Val, TLI.getPointerTy(), isTarget);
928 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
929 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
932 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
933 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
935 EVT EltVT = VT.getScalarType();
937 // Do the map lookup using the actual bit pattern for the floating point
938 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
939 // we don't have issues with SNANs.
940 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
942 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
946 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
948 return SDValue(N, 0);
951 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
952 CSEMap.InsertNode(N, IP);
953 AllNodes.push_back(N);
956 SDValue Result(N, 0);
958 SmallVector<SDValue, 8> Ops;
959 Ops.assign(VT.getVectorNumElements(), Result);
960 // FIXME DebugLoc info might be appropriate here
961 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
966 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
967 EVT EltVT = VT.getScalarType();
969 return getConstantFP(APFloat((float)Val), VT, isTarget);
971 return getConstantFP(APFloat(Val), VT, isTarget);
974 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
975 EVT VT, int64_t Offset,
977 unsigned char TargetFlags) {
978 assert((TargetFlags == 0 || isTargetGA) &&
979 "Cannot set target flags on target-independent globals");
981 // Truncate (with sign-extension) the offset value to the pointer size.
982 EVT PTy = TLI.getPointerTy();
983 unsigned BitWidth = PTy.getSizeInBits();
985 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
987 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
989 // If GV is an alias then use the aliasee for determining thread-localness.
990 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
991 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
995 if (GVar && GVar->isThreadLocal())
996 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
998 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1000 FoldingSetNodeID ID;
1001 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1003 ID.AddInteger(Offset);
1004 ID.AddInteger(TargetFlags);
1006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1007 return SDValue(E, 0);
1009 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1010 Offset, TargetFlags);
1011 CSEMap.InsertNode(N, IP);
1012 AllNodes.push_back(N);
1013 return SDValue(N, 0);
1016 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1017 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1018 FoldingSetNodeID ID;
1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1022 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1023 return SDValue(E, 0);
1025 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1026 CSEMap.InsertNode(N, IP);
1027 AllNodes.push_back(N);
1028 return SDValue(N, 0);
1031 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1032 unsigned char TargetFlags) {
1033 assert((TargetFlags == 0 || isTarget) &&
1034 "Cannot set target flags on target-independent jump tables");
1035 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1036 FoldingSetNodeID ID;
1037 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1039 ID.AddInteger(TargetFlags);
1041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1042 return SDValue(E, 0);
1044 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1046 CSEMap.InsertNode(N, IP);
1047 AllNodes.push_back(N);
1048 return SDValue(N, 0);
1051 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1052 unsigned Alignment, int Offset,
1054 unsigned char TargetFlags) {
1055 assert((TargetFlags == 0 || isTarget) &&
1056 "Cannot set target flags on target-independent globals");
1058 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1059 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1060 FoldingSetNodeID ID;
1061 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1062 ID.AddInteger(Alignment);
1063 ID.AddInteger(Offset);
1065 ID.AddInteger(TargetFlags);
1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1068 return SDValue(E, 0);
1070 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1071 Alignment, TargetFlags);
1072 CSEMap.InsertNode(N, IP);
1073 AllNodes.push_back(N);
1074 return SDValue(N, 0);
1078 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1079 unsigned Alignment, int Offset,
1081 unsigned char TargetFlags) {
1082 assert((TargetFlags == 0 || isTarget) &&
1083 "Cannot set target flags on target-independent globals");
1085 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1086 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1087 FoldingSetNodeID ID;
1088 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1089 ID.AddInteger(Alignment);
1090 ID.AddInteger(Offset);
1091 C->AddSelectionDAGCSEId(ID);
1092 ID.AddInteger(TargetFlags);
1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1095 return SDValue(E, 0);
1097 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1098 Alignment, TargetFlags);
1099 CSEMap.InsertNode(N, IP);
1100 AllNodes.push_back(N);
1101 return SDValue(N, 0);
1104 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1110 return SDValue(E, 0);
1112 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1113 CSEMap.InsertNode(N, IP);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getValueType(EVT VT) {
1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1120 ValueTypeNodes.size())
1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1123 SDNode *&N = VT.isExtended() ?
1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1126 if (N) return SDValue(N, 0);
1127 N = new (NodeAllocator) VTSDNode(VT);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1133 SDNode *&N = ExternalSymbols[Sym];
1134 if (N) return SDValue(N, 0);
1135 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1136 AllNodes.push_back(N);
1137 return SDValue(N, 0);
1140 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1141 unsigned char TargetFlags) {
1143 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1145 if (N) return SDValue(N, 0);
1146 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1147 AllNodes.push_back(N);
1148 return SDValue(N, 0);
1151 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1152 if ((unsigned)Cond >= CondCodeNodes.size())
1153 CondCodeNodes.resize(Cond+1);
1155 if (CondCodeNodes[Cond] == 0) {
1156 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1157 CondCodeNodes[Cond] = N;
1158 AllNodes.push_back(N);
1161 return SDValue(CondCodeNodes[Cond], 0);
1164 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1165 // the shuffle mask M that point at N1 to point at N2, and indices that point
1166 // N2 to point at N1.
1167 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1169 int NElts = M.size();
1170 for (int i = 0; i != NElts; ++i) {
1178 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1179 SDValue N2, const int *Mask) {
1180 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1181 assert(VT.isVector() && N1.getValueType().isVector() &&
1182 "Vector Shuffle VTs must be a vectors");
1183 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1184 && "Vector Shuffle VTs must have same element type");
1186 // Canonicalize shuffle undef, undef -> undef
1187 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1188 return getUNDEF(VT);
1190 // Validate that all indices in Mask are within the range of the elements
1191 // input to the shuffle.
1192 unsigned NElts = VT.getVectorNumElements();
1193 SmallVector<int, 8> MaskVec;
1194 for (unsigned i = 0; i != NElts; ++i) {
1195 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1196 MaskVec.push_back(Mask[i]);
1199 // Canonicalize shuffle v, v -> v, undef
1202 for (unsigned i = 0; i != NElts; ++i)
1203 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1206 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1207 if (N1.getOpcode() == ISD::UNDEF)
1208 commuteShuffle(N1, N2, MaskVec);
1210 // Canonicalize all index into lhs, -> shuffle lhs, undef
1211 // Canonicalize all index into rhs, -> shuffle rhs, undef
1212 bool AllLHS = true, AllRHS = true;
1213 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1214 for (unsigned i = 0; i != NElts; ++i) {
1215 if (MaskVec[i] >= (int)NElts) {
1220 } else if (MaskVec[i] >= 0) {
1224 if (AllLHS && AllRHS)
1225 return getUNDEF(VT);
1226 if (AllLHS && !N2Undef)
1230 commuteShuffle(N1, N2, MaskVec);
1233 // If Identity shuffle, or all shuffle in to undef, return that node.
1234 bool AllUndef = true;
1235 bool Identity = true;
1236 for (unsigned i = 0; i != NElts; ++i) {
1237 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1238 if (MaskVec[i] >= 0) AllUndef = false;
1240 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1243 return getUNDEF(VT);
1245 FoldingSetNodeID ID;
1246 SDValue Ops[2] = { N1, N2 };
1247 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1248 for (unsigned i = 0; i != NElts; ++i)
1249 ID.AddInteger(MaskVec[i]);
1252 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1253 return SDValue(E, 0);
1255 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1256 // SDNode doesn't have access to it. This memory will be "leaked" when
1257 // the node is deallocated, but recovered when the NodeAllocator is released.
1258 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1259 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1261 ShuffleVectorSDNode *N =
1262 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1263 CSEMap.InsertNode(N, IP);
1264 AllNodes.push_back(N);
1265 return SDValue(N, 0);
1268 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1269 SDValue Val, SDValue DTy,
1270 SDValue STy, SDValue Rnd, SDValue Sat,
1271 ISD::CvtCode Code) {
1272 // If the src and dest types are the same and the conversion is between
1273 // integer types of the same sign or two floats, no conversion is necessary.
1275 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1278 FoldingSetNodeID ID;
1279 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1280 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1283 return SDValue(E, 0);
1285 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1287 CSEMap.InsertNode(N, IP);
1288 AllNodes.push_back(N);
1289 return SDValue(N, 0);
1292 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1293 FoldingSetNodeID ID;
1294 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1295 ID.AddInteger(RegNo);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1300 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1301 CSEMap.InsertNode(N, IP);
1302 AllNodes.push_back(N);
1303 return SDValue(N, 0);
1306 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1307 FoldingSetNodeID ID;
1308 SDValue Ops[] = { Root };
1309 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1310 ID.AddPointer(Label);
1312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1313 return SDValue(E, 0);
1315 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1316 CSEMap.InsertNode(N, IP);
1317 AllNodes.push_back(N);
1318 return SDValue(N, 0);
1322 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1324 unsigned char TargetFlags) {
1325 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1327 FoldingSetNodeID ID;
1328 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1330 ID.AddInteger(TargetFlags);
1332 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1333 return SDValue(E, 0);
1335 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1336 CSEMap.InsertNode(N, IP);
1337 AllNodes.push_back(N);
1338 return SDValue(N, 0);
1341 SDValue SelectionDAG::getSrcValue(const Value *V) {
1342 assert((!V || V->getType()->isPointerTy()) &&
1343 "SrcValue is not a pointer?");
1345 FoldingSetNodeID ID;
1346 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1350 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1351 return SDValue(E, 0);
1353 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1354 CSEMap.InsertNode(N, IP);
1355 AllNodes.push_back(N);
1356 return SDValue(N, 0);
1359 /// getShiftAmountOperand - Return the specified value casted to
1360 /// the target's desired shift amount type.
1361 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1362 EVT OpTy = Op.getValueType();
1363 MVT ShTy = TLI.getShiftAmountTy();
1364 if (OpTy == ShTy || OpTy.isVector()) return Op;
1366 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1367 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1370 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1371 /// specified value type.
1372 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1373 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1374 unsigned ByteSize = VT.getStoreSize();
1375 const Type *Ty = VT.getTypeForEVT(*getContext());
1376 unsigned StackAlign =
1377 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1379 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1380 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1383 /// CreateStackTemporary - Create a stack temporary suitable for holding
1384 /// either of the specified value types.
1385 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1386 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1387 VT2.getStoreSizeInBits())/8;
1388 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1389 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1390 const TargetData *TD = TLI.getTargetData();
1391 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1392 TD->getPrefTypeAlignment(Ty2));
1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1395 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1396 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1399 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1400 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1401 // These setcc operations always fold.
1405 case ISD::SETFALSE2: return getConstant(0, VT);
1407 case ISD::SETTRUE2: return getConstant(1, VT);
1419 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1423 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1424 const APInt &C2 = N2C->getAPIntValue();
1425 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1426 const APInt &C1 = N1C->getAPIntValue();
1429 default: llvm_unreachable("Unknown integer setcc!");
1430 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1431 case ISD::SETNE: return getConstant(C1 != C2, VT);
1432 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1433 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1434 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1435 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1436 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1437 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1438 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1439 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1443 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1444 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1445 // No compile time operations on this type yet.
1446 if (N1C->getValueType(0) == MVT::ppcf128)
1449 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1452 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1453 return getUNDEF(VT);
1455 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1456 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1457 return getUNDEF(VT);
1459 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1460 R==APFloat::cmpLessThan, VT);
1461 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1462 return getUNDEF(VT);
1464 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1465 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1469 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1470 return getUNDEF(VT);
1472 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1473 R==APFloat::cmpEqual, VT);
1474 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1475 return getUNDEF(VT);
1477 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1478 R==APFloat::cmpEqual, VT);
1479 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1480 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1481 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1482 R==APFloat::cmpEqual, VT);
1483 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1484 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1485 R==APFloat::cmpLessThan, VT);
1486 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1487 R==APFloat::cmpUnordered, VT);
1488 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1489 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1492 // Ensure that the constant occurs on the RHS.
1493 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1497 // Could not fold it.
1501 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1502 /// use this predicate to simplify operations downstream.
1503 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1504 // This predicate is not safe for vector operations.
1505 if (Op.getValueType().isVector())
1508 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1509 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1512 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1513 /// this predicate to simplify operations downstream. Mask is known to be zero
1514 /// for bits that V cannot have.
1515 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1516 unsigned Depth) const {
1517 APInt KnownZero, KnownOne;
1518 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1519 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1520 return (KnownZero & Mask) == Mask;
1523 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1524 /// known to be either zero or one and return them in the KnownZero/KnownOne
1525 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1527 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1528 APInt &KnownZero, APInt &KnownOne,
1529 unsigned Depth) const {
1530 unsigned BitWidth = Mask.getBitWidth();
1531 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1532 "Mask size mismatches value type size!");
1534 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1535 if (Depth == 6 || Mask == 0)
1536 return; // Limit search depth.
1538 APInt KnownZero2, KnownOne2;
1540 switch (Op.getOpcode()) {
1542 // We know all of the bits for a constant!
1543 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1544 KnownZero = ~KnownOne & Mask;
1547 // If either the LHS or the RHS are Zero, the result is zero.
1548 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1549 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1550 KnownZero2, KnownOne2, Depth+1);
1551 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1552 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1554 // Output known-1 bits are only known if set in both the LHS & RHS.
1555 KnownOne &= KnownOne2;
1556 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1557 KnownZero |= KnownZero2;
1560 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1561 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1562 KnownZero2, KnownOne2, Depth+1);
1563 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1564 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1566 // Output known-0 bits are only known if clear in both the LHS & RHS.
1567 KnownZero &= KnownZero2;
1568 // Output known-1 are known to be set if set in either the LHS | RHS.
1569 KnownOne |= KnownOne2;
1572 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1573 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1577 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1578 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1579 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1580 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1581 KnownZero = KnownZeroOut;
1585 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1586 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1587 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1591 // If low bits are zero in either operand, output low known-0 bits.
1592 // Also compute a conserative estimate for high known-0 bits.
1593 // More trickiness is possible, but this is sufficient for the
1594 // interesting case of alignment computation.
1596 unsigned TrailZ = KnownZero.countTrailingOnes() +
1597 KnownZero2.countTrailingOnes();
1598 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1599 KnownZero2.countLeadingOnes(),
1600 BitWidth) - BitWidth;
1602 TrailZ = std::min(TrailZ, BitWidth);
1603 LeadZ = std::min(LeadZ, BitWidth);
1604 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1605 APInt::getHighBitsSet(BitWidth, LeadZ);
1610 // For the purposes of computing leading zeros we can conservatively
1611 // treat a udiv as a logical right shift by the power of 2 known to
1612 // be less than the denominator.
1613 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1614 ComputeMaskedBits(Op.getOperand(0),
1615 AllOnes, KnownZero2, KnownOne2, Depth+1);
1616 unsigned LeadZ = KnownZero2.countLeadingOnes();
1620 ComputeMaskedBits(Op.getOperand(1),
1621 AllOnes, KnownZero2, KnownOne2, Depth+1);
1622 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1623 if (RHSUnknownLeadingOnes != BitWidth)
1624 LeadZ = std::min(BitWidth,
1625 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1627 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1631 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1633 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1634 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1636 // Only known if known in both the LHS and RHS.
1637 KnownOne &= KnownOne2;
1638 KnownZero &= KnownZero2;
1640 case ISD::SELECT_CC:
1641 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1642 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1643 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1644 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1646 // Only known if known in both the LHS and RHS.
1647 KnownOne &= KnownOne2;
1648 KnownZero &= KnownZero2;
1656 if (Op.getResNo() != 1)
1658 // The boolean result conforms to getBooleanContents. Fall through.
1660 // If we know the result of a setcc has the top bits zero, use this info.
1661 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1663 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1666 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1667 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1668 unsigned ShAmt = SA->getZExtValue();
1670 // If the shift count is an invalid immediate, don't do anything.
1671 if (ShAmt >= BitWidth)
1674 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1675 KnownZero, KnownOne, Depth+1);
1676 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1677 KnownZero <<= ShAmt;
1679 // low bits known zero.
1680 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1684 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1685 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1686 unsigned ShAmt = SA->getZExtValue();
1688 // If the shift count is an invalid immediate, don't do anything.
1689 if (ShAmt >= BitWidth)
1692 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1693 KnownZero, KnownOne, Depth+1);
1694 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1695 KnownZero = KnownZero.lshr(ShAmt);
1696 KnownOne = KnownOne.lshr(ShAmt);
1698 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1699 KnownZero |= HighBits; // High bits known zero.
1703 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1704 unsigned ShAmt = SA->getZExtValue();
1706 // If the shift count is an invalid immediate, don't do anything.
1707 if (ShAmt >= BitWidth)
1710 APInt InDemandedMask = (Mask << ShAmt);
1711 // If any of the demanded bits are produced by the sign extension, we also
1712 // demand the input sign bit.
1713 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1714 if (HighBits.getBoolValue())
1715 InDemandedMask |= APInt::getSignBit(BitWidth);
1717 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 KnownZero = KnownZero.lshr(ShAmt);
1721 KnownOne = KnownOne.lshr(ShAmt);
1723 // Handle the sign bits.
1724 APInt SignBit = APInt::getSignBit(BitWidth);
1725 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1727 if (KnownZero.intersects(SignBit)) {
1728 KnownZero |= HighBits; // New bits are known zero.
1729 } else if (KnownOne.intersects(SignBit)) {
1730 KnownOne |= HighBits; // New bits are known one.
1734 case ISD::SIGN_EXTEND_INREG: {
1735 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1736 unsigned EBits = EVT.getScalarType().getSizeInBits();
1738 // Sign extension. Compute the demanded bits in the result that are not
1739 // present in the input.
1740 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1742 APInt InSignBit = APInt::getSignBit(EBits);
1743 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1745 // If the sign extended bits are demanded, we know that the sign
1747 InSignBit.zext(BitWidth);
1748 if (NewBits.getBoolValue())
1749 InputDemandedBits |= InSignBit;
1751 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1752 KnownZero, KnownOne, Depth+1);
1753 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1755 // If the sign bit of the input is known set or clear, then we know the
1756 // top bits of the result.
1757 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1758 KnownZero |= NewBits;
1759 KnownOne &= ~NewBits;
1760 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1761 KnownOne |= NewBits;
1762 KnownZero &= ~NewBits;
1763 } else { // Input sign bit unknown
1764 KnownZero &= ~NewBits;
1765 KnownOne &= ~NewBits;
1772 unsigned LowBits = Log2_32(BitWidth)+1;
1773 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1778 if (ISD::isZEXTLoad(Op.getNode())) {
1779 LoadSDNode *LD = cast<LoadSDNode>(Op);
1780 EVT VT = LD->getMemoryVT();
1781 unsigned MemBits = VT.getScalarType().getSizeInBits();
1782 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1786 case ISD::ZERO_EXTEND: {
1787 EVT InVT = Op.getOperand(0).getValueType();
1788 unsigned InBits = InVT.getScalarType().getSizeInBits();
1789 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1790 APInt InMask = Mask;
1791 InMask.trunc(InBits);
1792 KnownZero.trunc(InBits);
1793 KnownOne.trunc(InBits);
1794 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1795 KnownZero.zext(BitWidth);
1796 KnownOne.zext(BitWidth);
1797 KnownZero |= NewBits;
1800 case ISD::SIGN_EXTEND: {
1801 EVT InVT = Op.getOperand(0).getValueType();
1802 unsigned InBits = InVT.getScalarType().getSizeInBits();
1803 APInt InSignBit = APInt::getSignBit(InBits);
1804 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1805 APInt InMask = Mask;
1806 InMask.trunc(InBits);
1808 // If any of the sign extended bits are demanded, we know that the sign
1809 // bit is demanded. Temporarily set this bit in the mask for our callee.
1810 if (NewBits.getBoolValue())
1811 InMask |= InSignBit;
1813 KnownZero.trunc(InBits);
1814 KnownOne.trunc(InBits);
1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1817 // Note if the sign bit is known to be zero or one.
1818 bool SignBitKnownZero = KnownZero.isNegative();
1819 bool SignBitKnownOne = KnownOne.isNegative();
1820 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1821 "Sign bit can't be known to be both zero and one!");
1823 // If the sign bit wasn't actually demanded by our caller, we don't
1824 // want it set in the KnownZero and KnownOne result values. Reset the
1825 // mask and reapply it to the result values.
1827 InMask.trunc(InBits);
1828 KnownZero &= InMask;
1831 KnownZero.zext(BitWidth);
1832 KnownOne.zext(BitWidth);
1834 // If the sign bit is known zero or one, the top bits match.
1835 if (SignBitKnownZero)
1836 KnownZero |= NewBits;
1837 else if (SignBitKnownOne)
1838 KnownOne |= NewBits;
1841 case ISD::ANY_EXTEND: {
1842 EVT InVT = Op.getOperand(0).getValueType();
1843 unsigned InBits = InVT.getScalarType().getSizeInBits();
1844 APInt InMask = Mask;
1845 InMask.trunc(InBits);
1846 KnownZero.trunc(InBits);
1847 KnownOne.trunc(InBits);
1848 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1849 KnownZero.zext(BitWidth);
1850 KnownOne.zext(BitWidth);
1853 case ISD::TRUNCATE: {
1854 EVT InVT = Op.getOperand(0).getValueType();
1855 unsigned InBits = InVT.getScalarType().getSizeInBits();
1856 APInt InMask = Mask;
1857 InMask.zext(InBits);
1858 KnownZero.zext(InBits);
1859 KnownOne.zext(InBits);
1860 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1861 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1862 KnownZero.trunc(BitWidth);
1863 KnownOne.trunc(BitWidth);
1866 case ISD::AssertZext: {
1867 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1868 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1869 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1871 KnownZero |= (~InMask) & Mask;
1875 // All bits are zero except the low bit.
1876 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1880 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1881 // We know that the top bits of C-X are clear if X contains less bits
1882 // than C (i.e. no wrap-around can happen). For example, 20-X is
1883 // positive if we can prove that X is >= 0 and < 16.
1884 if (CLHS->getAPIntValue().isNonNegative()) {
1885 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1886 // NLZ can't be BitWidth with no sign bit
1887 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1888 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1891 // If all of the MaskV bits are known to be zero, then we know the
1892 // output top bits are zero, because we now know that the output is
1894 if ((KnownZero2 & MaskV) == MaskV) {
1895 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1896 // Top bits known zero.
1897 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1904 // Output known-0 bits are known if clear or set in both the low clear bits
1905 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1906 // low 3 bits clear.
1907 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1908 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1909 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1910 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1912 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1913 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1914 KnownZeroOut = std::min(KnownZeroOut,
1915 KnownZero2.countTrailingOnes());
1917 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1921 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1922 const APInt &RA = Rem->getAPIntValue().abs();
1923 if (RA.isPowerOf2()) {
1924 APInt LowBits = RA - 1;
1925 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1926 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1928 // The low bits of the first operand are unchanged by the srem.
1929 KnownZero = KnownZero2 & LowBits;
1930 KnownOne = KnownOne2 & LowBits;
1932 // If the first operand is non-negative or has all low bits zero, then
1933 // the upper bits are all zero.
1934 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1935 KnownZero |= ~LowBits;
1937 // If the first operand is negative and not all low bits are zero, then
1938 // the upper bits are all one.
1939 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1940 KnownOne |= ~LowBits;
1945 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1950 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1951 const APInt &RA = Rem->getAPIntValue();
1952 if (RA.isPowerOf2()) {
1953 APInt LowBits = (RA - 1);
1954 APInt Mask2 = LowBits & Mask;
1955 KnownZero |= ~LowBits & Mask;
1956 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1957 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1962 // Since the result is less than or equal to either operand, any leading
1963 // zero bits in either operand must also exist in the result.
1964 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1965 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1967 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1970 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1971 KnownZero2.countLeadingOnes());
1973 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1977 // Allow the target to implement this method for its nodes.
1978 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1979 case ISD::INTRINSIC_WO_CHAIN:
1980 case ISD::INTRINSIC_W_CHAIN:
1981 case ISD::INTRINSIC_VOID:
1982 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1989 /// ComputeNumSignBits - Return the number of times the sign bit of the
1990 /// register is replicated into the other bits. We know that at least 1 bit
1991 /// is always equal to the sign bit (itself), but other cases can give us
1992 /// information. For example, immediately after an "SRA X, 2", we know that
1993 /// the top 3 bits are all equal to each other, so we return 3.
1994 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1995 EVT VT = Op.getValueType();
1996 assert(VT.isInteger() && "Invalid VT!");
1997 unsigned VTBits = VT.getScalarType().getSizeInBits();
1999 unsigned FirstAnswer = 1;
2002 return 1; // Limit search depth.
2004 switch (Op.getOpcode()) {
2006 case ISD::AssertSext:
2007 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2008 return VTBits-Tmp+1;
2009 case ISD::AssertZext:
2010 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2013 case ISD::Constant: {
2014 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2015 // If negative, return # leading ones.
2016 if (Val.isNegative())
2017 return Val.countLeadingOnes();
2019 // Return # leading zeros.
2020 return Val.countLeadingZeros();
2023 case ISD::SIGN_EXTEND:
2024 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2025 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2027 case ISD::SIGN_EXTEND_INREG:
2028 // Max of the input and what this extends.
2030 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2033 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2034 return std::max(Tmp, Tmp2);
2037 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2038 // SRA X, C -> adds C sign bits.
2039 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2040 Tmp += C->getZExtValue();
2041 if (Tmp > VTBits) Tmp = VTBits;
2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2046 // shl destroys sign bits.
2047 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2048 if (C->getZExtValue() >= VTBits || // Bad shift.
2049 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2050 return Tmp - C->getZExtValue();
2055 case ISD::XOR: // NOT is handled here.
2056 // Logical binary ops preserve the number of sign bits at the worst.
2057 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2059 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2060 FirstAnswer = std::min(Tmp, Tmp2);
2061 // We computed what we know about the sign bits as our first
2062 // answer. Now proceed to the generic code that uses
2063 // ComputeMaskedBits, and pick whichever answer is better.
2068 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2069 if (Tmp == 1) return 1; // Early out.
2070 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2071 return std::min(Tmp, Tmp2);
2079 if (Op.getResNo() != 1)
2081 // The boolean result conforms to getBooleanContents. Fall through.
2083 // If setcc returns 0/-1, all bits are sign bits.
2084 if (TLI.getBooleanContents() ==
2085 TargetLowering::ZeroOrNegativeOneBooleanContent)
2090 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2091 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2093 // Handle rotate right by N like a rotate left by 32-N.
2094 if (Op.getOpcode() == ISD::ROTR)
2095 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2097 // If we aren't rotating out all of the known-in sign bits, return the
2098 // number that are left. This handles rotl(sext(x), 1) for example.
2099 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2100 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2104 // Add can have at most one carry bit. Thus we know that the output
2105 // is, at worst, one more bit than the inputs.
2106 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2107 if (Tmp == 1) return 1; // Early out.
2109 // Special case decrementing a value (ADD X, -1):
2110 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2111 if (CRHS->isAllOnesValue()) {
2112 APInt KnownZero, KnownOne;
2113 APInt Mask = APInt::getAllOnesValue(VTBits);
2114 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2116 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2118 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2121 // If we are subtracting one from a positive number, there is no carry
2122 // out of the result.
2123 if (KnownZero.isNegative())
2127 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2128 if (Tmp2 == 1) return 1;
2129 return std::min(Tmp, Tmp2)-1;
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2134 if (Tmp2 == 1) return 1;
2137 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2138 if (CLHS->isNullValue()) {
2139 APInt KnownZero, KnownOne;
2140 APInt Mask = APInt::getAllOnesValue(VTBits);
2141 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2144 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2147 // If the input is known to be positive (the sign bit is known clear),
2148 // the output of the NEG has the same number of sign bits as the input.
2149 if (KnownZero.isNegative())
2152 // Otherwise, we treat this like a SUB.
2155 // Sub can have at most one carry bit. Thus we know that the output
2156 // is, at worst, one more bit than the inputs.
2157 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2158 if (Tmp == 1) return 1; // Early out.
2159 return std::min(Tmp, Tmp2)-1;
2162 // FIXME: it's tricky to do anything useful for this, but it is an important
2163 // case for targets like X86.
2167 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2168 if (Op.getOpcode() == ISD::LOAD) {
2169 LoadSDNode *LD = cast<LoadSDNode>(Op);
2170 unsigned ExtType = LD->getExtensionType();
2173 case ISD::SEXTLOAD: // '17' bits known
2174 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2175 return VTBits-Tmp+1;
2176 case ISD::ZEXTLOAD: // '16' bits known
2177 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2182 // Allow the target to implement this method for its nodes.
2183 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2184 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2185 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2186 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2187 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2188 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2191 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2192 // use this information.
2193 APInt KnownZero, KnownOne;
2194 APInt Mask = APInt::getAllOnesValue(VTBits);
2195 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2197 if (KnownZero.isNegative()) { // sign bit is 0
2199 } else if (KnownOne.isNegative()) { // sign bit is 1;
2206 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2207 // the number of identical bits in the top of the input value.
2209 Mask <<= Mask.getBitWidth()-VTBits;
2210 // Return # leading zeros. We use 'min' here in case Val was zero before
2211 // shifting. We don't want to return '64' as for an i32 "0".
2212 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2215 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2216 // If we're told that NaNs won't happen, assume they won't.
2217 if (FiniteOnlyFPMath())
2220 // If the value is a constant, we can obviously see if it is a NaN or not.
2221 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2222 return !C->getValueAPF().isNaN();
2224 // TODO: Recognize more cases here.
2229 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2230 // If the value is a constant, we can obviously see if it is a zero or not.
2231 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2232 return !C->isZero();
2234 // TODO: Recognize more cases here.
2239 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2240 // Check the obvious case.
2241 if (A == B) return true;
2243 // For for negative and positive zero.
2244 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2245 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2246 if (CA->isZero() && CB->isZero()) return true;
2248 // Otherwise they may not be equal.
2252 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2253 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2254 if (!GA) return false;
2255 if (GA->getOffset() != 0) return false;
2256 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2257 if (!GV) return false;
2258 return MF->getMMI().hasDebugInfo();
2262 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2263 /// element of the result of the vector shuffle.
2264 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2266 EVT VT = N->getValueType(0);
2267 DebugLoc dl = N->getDebugLoc();
2268 if (N->getMaskElt(i) < 0)
2269 return getUNDEF(VT.getVectorElementType());
2270 unsigned Index = N->getMaskElt(i);
2271 unsigned NumElems = VT.getVectorNumElements();
2272 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2275 if (V.getOpcode() == ISD::BIT_CONVERT) {
2276 V = V.getOperand(0);
2277 EVT VVT = V.getValueType();
2278 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2281 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2282 return (Index == 0) ? V.getOperand(0)
2283 : getUNDEF(VT.getVectorElementType());
2284 if (V.getOpcode() == ISD::BUILD_VECTOR)
2285 return V.getOperand(Index);
2286 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2287 return getShuffleScalarElt(SVN, Index);
2292 /// getNode - Gets or creates the specified node.
2294 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2295 FoldingSetNodeID ID;
2296 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2299 return SDValue(E, 0);
2301 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2302 CSEMap.InsertNode(N, IP);
2304 AllNodes.push_back(N);
2308 return SDValue(N, 0);
2311 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2312 EVT VT, SDValue Operand) {
2313 // Constant fold unary operations with an integer constant operand.
2314 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2315 const APInt &Val = C->getAPIntValue();
2318 case ISD::SIGN_EXTEND:
2319 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2320 case ISD::ANY_EXTEND:
2321 case ISD::ZERO_EXTEND:
2323 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2324 case ISD::UINT_TO_FP:
2325 case ISD::SINT_TO_FP: {
2326 const uint64_t zero[] = {0, 0};
2327 // No compile time operations on ppcf128.
2328 if (VT == MVT::ppcf128) break;
2329 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2330 (void)apf.convertFromAPInt(Val,
2331 Opcode==ISD::SINT_TO_FP,
2332 APFloat::rmNearestTiesToEven);
2333 return getConstantFP(apf, VT);
2335 case ISD::BIT_CONVERT:
2336 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2337 return getConstantFP(Val.bitsToFloat(), VT);
2338 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2339 return getConstantFP(Val.bitsToDouble(), VT);
2342 return getConstant(Val.byteSwap(), VT);
2344 return getConstant(Val.countPopulation(), VT);
2346 return getConstant(Val.countLeadingZeros(), VT);
2348 return getConstant(Val.countTrailingZeros(), VT);
2352 // Constant fold unary operations with a floating point constant operand.
2353 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2354 APFloat V = C->getValueAPF(); // make copy
2355 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2359 return getConstantFP(V, VT);
2362 return getConstantFP(V, VT);
2364 case ISD::FP_EXTEND: {
2366 // This can return overflow, underflow, or inexact; we don't care.
2367 // FIXME need to be more flexible about rounding mode.
2368 (void)V.convert(*EVTToAPFloatSemantics(VT),
2369 APFloat::rmNearestTiesToEven, &ignored);
2370 return getConstantFP(V, VT);
2372 case ISD::FP_TO_SINT:
2373 case ISD::FP_TO_UINT: {
2376 assert(integerPartWidth >= 64);
2377 // FIXME need to be more flexible about rounding mode.
2378 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2379 Opcode==ISD::FP_TO_SINT,
2380 APFloat::rmTowardZero, &ignored);
2381 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2383 APInt api(VT.getSizeInBits(), 2, x);
2384 return getConstant(api, VT);
2386 case ISD::BIT_CONVERT:
2387 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2388 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2389 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2390 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2396 unsigned OpOpcode = Operand.getNode()->getOpcode();
2398 case ISD::TokenFactor:
2399 case ISD::MERGE_VALUES:
2400 case ISD::CONCAT_VECTORS:
2401 return Operand; // Factor, merge or concat of one node? No need.
2402 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2403 case ISD::FP_EXTEND:
2404 assert(VT.isFloatingPoint() &&
2405 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2406 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2407 assert((!VT.isVector() ||
2408 VT.getVectorNumElements() ==
2409 Operand.getValueType().getVectorNumElements()) &&
2410 "Vector element count mismatch!");
2411 if (Operand.getOpcode() == ISD::UNDEF)
2412 return getUNDEF(VT);
2414 case ISD::SIGN_EXTEND:
2415 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2416 "Invalid SIGN_EXTEND!");
2417 if (Operand.getValueType() == VT) return Operand; // noop extension
2418 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2419 "Invalid sext node, dst < src!");
2420 assert((!VT.isVector() ||
2421 VT.getVectorNumElements() ==
2422 Operand.getValueType().getVectorNumElements()) &&
2423 "Vector element count mismatch!");
2424 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2425 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2427 case ISD::ZERO_EXTEND:
2428 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2429 "Invalid ZERO_EXTEND!");
2430 if (Operand.getValueType() == VT) return Operand; // noop extension
2431 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2432 "Invalid zext node, dst < src!");
2433 assert((!VT.isVector() ||
2434 VT.getVectorNumElements() ==
2435 Operand.getValueType().getVectorNumElements()) &&
2436 "Vector element count mismatch!");
2437 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2438 return getNode(ISD::ZERO_EXTEND, DL, VT,
2439 Operand.getNode()->getOperand(0));
2441 case ISD::ANY_EXTEND:
2442 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2443 "Invalid ANY_EXTEND!");
2444 if (Operand.getValueType() == VT) return Operand; // noop extension
2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2446 "Invalid anyext node, dst < src!");
2447 assert((!VT.isVector() ||
2448 VT.getVectorNumElements() ==
2449 Operand.getValueType().getVectorNumElements()) &&
2450 "Vector element count mismatch!");
2451 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2452 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2453 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2456 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2457 "Invalid TRUNCATE!");
2458 if (Operand.getValueType() == VT) return Operand; // noop truncate
2459 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2460 "Invalid truncate node, src < dst!");
2461 assert((!VT.isVector() ||
2462 VT.getVectorNumElements() ==
2463 Operand.getValueType().getVectorNumElements()) &&
2464 "Vector element count mismatch!");
2465 if (OpOpcode == ISD::TRUNCATE)
2466 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2467 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2468 OpOpcode == ISD::ANY_EXTEND) {
2469 // If the source is smaller than the dest, we still need an extend.
2470 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2471 .bitsLT(VT.getScalarType()))
2472 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2473 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2474 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2476 return Operand.getNode()->getOperand(0);
2479 case ISD::BIT_CONVERT:
2480 // Basic sanity checking.
2481 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2482 && "Cannot BIT_CONVERT between types of different sizes!");
2483 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2484 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2485 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2486 if (OpOpcode == ISD::UNDEF)
2487 return getUNDEF(VT);
2489 case ISD::SCALAR_TO_VECTOR:
2490 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2491 (VT.getVectorElementType() == Operand.getValueType() ||
2492 (VT.getVectorElementType().isInteger() &&
2493 Operand.getValueType().isInteger() &&
2494 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2495 "Illegal SCALAR_TO_VECTOR node!");
2496 if (OpOpcode == ISD::UNDEF)
2497 return getUNDEF(VT);
2498 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2499 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2500 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2501 Operand.getConstantOperandVal(1) == 0 &&
2502 Operand.getOperand(0).getValueType() == VT)
2503 return Operand.getOperand(0);
2506 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2507 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2508 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2509 Operand.getNode()->getOperand(0));
2510 if (OpOpcode == ISD::FNEG) // --X -> X
2511 return Operand.getNode()->getOperand(0);
2514 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2515 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2520 SDVTList VTs = getVTList(VT);
2521 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2522 FoldingSetNodeID ID;
2523 SDValue Ops[1] = { Operand };
2524 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2527 return SDValue(E, 0);
2529 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2530 CSEMap.InsertNode(N, IP);
2532 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2535 AllNodes.push_back(N);
2539 return SDValue(N, 0);
2542 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2544 ConstantSDNode *Cst1,
2545 ConstantSDNode *Cst2) {
2546 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2549 case ISD::ADD: return getConstant(C1 + C2, VT);
2550 case ISD::SUB: return getConstant(C1 - C2, VT);
2551 case ISD::MUL: return getConstant(C1 * C2, VT);
2553 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2556 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2559 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2562 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2564 case ISD::AND: return getConstant(C1 & C2, VT);
2565 case ISD::OR: return getConstant(C1 | C2, VT);
2566 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2567 case ISD::SHL: return getConstant(C1 << C2, VT);
2568 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2569 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2570 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2571 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2578 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2579 SDValue N1, SDValue N2) {
2580 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2581 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2584 case ISD::TokenFactor:
2585 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2586 N2.getValueType() == MVT::Other && "Invalid token factor!");
2587 // Fold trivial token factors.
2588 if (N1.getOpcode() == ISD::EntryToken) return N2;
2589 if (N2.getOpcode() == ISD::EntryToken) return N1;
2590 if (N1 == N2) return N1;
2592 case ISD::CONCAT_VECTORS:
2593 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2594 // one big BUILD_VECTOR.
2595 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2596 N2.getOpcode() == ISD::BUILD_VECTOR) {
2597 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2598 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2599 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2603 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2604 N1.getValueType() == VT && "Binary operator types must match!");
2605 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2606 // worth handling here.
2607 if (N2C && N2C->isNullValue())
2609 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2616 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2617 N1.getValueType() == VT && "Binary operator types must match!");
2618 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2619 // it's worth handling here.
2620 if (N2C && N2C->isNullValue())
2630 assert(VT.isInteger() && "This operator does not apply to FP types!");
2638 if (Opcode == ISD::FADD) {
2640 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2641 if (CFP->getValueAPF().isZero())
2644 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2645 if (CFP->getValueAPF().isZero())
2647 } else if (Opcode == ISD::FSUB) {
2649 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2650 if (CFP->getValueAPF().isZero())
2654 assert(N1.getValueType() == N2.getValueType() &&
2655 N1.getValueType() == VT && "Binary operator types must match!");
2657 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2658 assert(N1.getValueType() == VT &&
2659 N1.getValueType().isFloatingPoint() &&
2660 N2.getValueType().isFloatingPoint() &&
2661 "Invalid FCOPYSIGN!");
2668 assert(VT == N1.getValueType() &&
2669 "Shift operators return type must be the same as their first arg");
2670 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2671 "Shifts only work on integers");
2673 // Always fold shifts of i1 values so the code generator doesn't need to
2674 // handle them. Since we know the size of the shift has to be less than the
2675 // size of the value, the shift/rotate count is guaranteed to be zero.
2678 if (N2C && N2C->isNullValue())
2681 case ISD::FP_ROUND_INREG: {
2682 EVT EVT = cast<VTSDNode>(N2)->getVT();
2683 assert(VT == N1.getValueType() && "Not an inreg round!");
2684 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2685 "Cannot FP_ROUND_INREG integer types");
2686 assert(EVT.isVector() == VT.isVector() &&
2687 "FP_ROUND_INREG type should be vector iff the operand "
2689 assert((!EVT.isVector() ||
2690 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2691 "Vector element counts must match in FP_ROUND_INREG");
2692 assert(EVT.bitsLE(VT) && "Not rounding down!");
2693 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2697 assert(VT.isFloatingPoint() &&
2698 N1.getValueType().isFloatingPoint() &&
2699 VT.bitsLE(N1.getValueType()) &&
2700 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2701 if (N1.getValueType() == VT) return N1; // noop conversion.
2703 case ISD::AssertSext:
2704 case ISD::AssertZext: {
2705 EVT EVT = cast<VTSDNode>(N2)->getVT();
2706 assert(VT == N1.getValueType() && "Not an inreg extend!");
2707 assert(VT.isInteger() && EVT.isInteger() &&
2708 "Cannot *_EXTEND_INREG FP types");
2709 assert(!EVT.isVector() &&
2710 "AssertSExt/AssertZExt type should be the vector element type "
2711 "rather than the vector type!");
2712 assert(EVT.bitsLE(VT) && "Not extending!");
2713 if (VT == EVT) return N1; // noop assertion.
2716 case ISD::SIGN_EXTEND_INREG: {
2717 EVT EVT = cast<VTSDNode>(N2)->getVT();
2718 assert(VT == N1.getValueType() && "Not an inreg extend!");
2719 assert(VT.isInteger() && EVT.isInteger() &&
2720 "Cannot *_EXTEND_INREG FP types");
2721 assert(EVT.isVector() == VT.isVector() &&
2722 "SIGN_EXTEND_INREG type should be vector iff the operand "
2724 assert((!EVT.isVector() ||
2725 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2726 "Vector element counts must match in SIGN_EXTEND_INREG");
2727 assert(EVT.bitsLE(VT) && "Not extending!");
2728 if (EVT == VT) return N1; // Not actually extending
2731 APInt Val = N1C->getAPIntValue();
2732 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2733 Val <<= Val.getBitWidth()-FromBits;
2734 Val = Val.ashr(Val.getBitWidth()-FromBits);
2735 return getConstant(Val, VT);
2739 case ISD::EXTRACT_VECTOR_ELT:
2740 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2741 if (N1.getOpcode() == ISD::UNDEF)
2742 return getUNDEF(VT);
2744 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2745 // expanding copies of large vectors from registers.
2747 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2748 N1.getNumOperands() > 0) {
2750 N1.getOperand(0).getValueType().getVectorNumElements();
2751 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2752 N1.getOperand(N2C->getZExtValue() / Factor),
2753 getConstant(N2C->getZExtValue() % Factor,
2754 N2.getValueType()));
2757 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2758 // expanding large vector constants.
2759 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2760 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2761 EVT VEltTy = N1.getValueType().getVectorElementType();
2762 if (Elt.getValueType() != VEltTy) {
2763 // If the vector element type is not legal, the BUILD_VECTOR operands
2764 // are promoted and implicitly truncated. Make that explicit here.
2765 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2768 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2769 // result is implicitly extended.
2770 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2775 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2776 // operations are lowered to scalars.
2777 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2778 // If the indices are the same, return the inserted element else
2779 // if the indices are known different, extract the element from
2780 // the original vector.
2781 if (N1.getOperand(2) == N2) {
2782 if (VT == N1.getOperand(1).getValueType())
2783 return N1.getOperand(1);
2785 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2786 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2787 isa<ConstantSDNode>(N2))
2788 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2791 case ISD::EXTRACT_ELEMENT:
2792 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2793 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2794 (N1.getValueType().isInteger() == VT.isInteger()) &&
2795 "Wrong types for EXTRACT_ELEMENT!");
2797 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2798 // 64-bit integers into 32-bit parts. Instead of building the extract of
2799 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2800 if (N1.getOpcode() == ISD::BUILD_PAIR)
2801 return N1.getOperand(N2C->getZExtValue());
2803 // EXTRACT_ELEMENT of a constant int is also very common.
2804 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2805 unsigned ElementSize = VT.getSizeInBits();
2806 unsigned Shift = ElementSize * N2C->getZExtValue();
2807 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2808 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2811 case ISD::EXTRACT_SUBVECTOR:
2812 if (N1.getValueType() == VT) // Trivial extraction.
2819 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2820 if (SV.getNode()) return SV;
2821 } else { // Cannonicalize constant to RHS if commutative
2822 if (isCommutativeBinOp(Opcode)) {
2823 std::swap(N1C, N2C);
2829 // Constant fold FP operations.
2830 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2831 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2833 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2834 // Cannonicalize constant to RHS if commutative
2835 std::swap(N1CFP, N2CFP);
2837 } else if (N2CFP && VT != MVT::ppcf128) {
2838 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2839 APFloat::opStatus s;
2842 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2843 if (s != APFloat::opInvalidOp)
2844 return getConstantFP(V1, VT);
2847 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2848 if (s!=APFloat::opInvalidOp)
2849 return getConstantFP(V1, VT);
2852 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2853 if (s!=APFloat::opInvalidOp)
2854 return getConstantFP(V1, VT);
2857 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2858 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2859 return getConstantFP(V1, VT);
2862 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2863 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2864 return getConstantFP(V1, VT);
2866 case ISD::FCOPYSIGN:
2868 return getConstantFP(V1, VT);
2874 // Canonicalize an UNDEF to the RHS, even over a constant.
2875 if (N1.getOpcode() == ISD::UNDEF) {
2876 if (isCommutativeBinOp(Opcode)) {
2880 case ISD::FP_ROUND_INREG:
2881 case ISD::SIGN_EXTEND_INREG:
2887 return N1; // fold op(undef, arg2) -> undef
2895 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2896 // For vectors, we can't easily build an all zero vector, just return
2903 // Fold a bunch of operators when the RHS is undef.
2904 if (N2.getOpcode() == ISD::UNDEF) {
2907 if (N1.getOpcode() == ISD::UNDEF)
2908 // Handle undef ^ undef -> 0 special case. This is a common
2910 return getConstant(0, VT);
2920 return N2; // fold op(arg1, undef) -> undef
2934 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2935 // For vectors, we can't easily build an all zero vector, just return
2940 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2941 // For vectors, we can't easily build an all one vector, just return
2949 // Memoize this node if possible.
2951 SDVTList VTs = getVTList(VT);
2952 if (VT != MVT::Flag) {
2953 SDValue Ops[] = { N1, N2 };
2954 FoldingSetNodeID ID;
2955 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2957 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2958 return SDValue(E, 0);
2960 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2961 CSEMap.InsertNode(N, IP);
2963 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2966 AllNodes.push_back(N);
2970 return SDValue(N, 0);
2973 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2974 SDValue N1, SDValue N2, SDValue N3) {
2975 // Perform various simplifications.
2976 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2977 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2979 case ISD::CONCAT_VECTORS:
2980 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2981 // one big BUILD_VECTOR.
2982 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2983 N2.getOpcode() == ISD::BUILD_VECTOR &&
2984 N3.getOpcode() == ISD::BUILD_VECTOR) {
2985 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2986 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2987 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2988 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2992 // Use FoldSetCC to simplify SETCC's.
2993 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2994 if (Simp.getNode()) return Simp;
2999 if (N1C->getZExtValue())
3000 return N2; // select true, X, Y -> X
3002 return N3; // select false, X, Y -> Y
3005 if (N2 == N3) return N2; // select C, X, X -> X
3009 if (N2C->getZExtValue()) // Unconditional branch
3010 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3012 return N1; // Never-taken branch
3015 case ISD::VECTOR_SHUFFLE:
3016 llvm_unreachable("should use getVectorShuffle constructor!");
3018 case ISD::BIT_CONVERT:
3019 // Fold bit_convert nodes from a type to themselves.
3020 if (N1.getValueType() == VT)
3025 // Memoize node if it doesn't produce a flag.
3027 SDVTList VTs = getVTList(VT);
3028 if (VT != MVT::Flag) {
3029 SDValue Ops[] = { N1, N2, N3 };
3030 FoldingSetNodeID ID;
3031 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3034 return SDValue(E, 0);
3036 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3037 CSEMap.InsertNode(N, IP);
3039 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3042 AllNodes.push_back(N);
3046 return SDValue(N, 0);
3049 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3050 SDValue N1, SDValue N2, SDValue N3,
3052 SDValue Ops[] = { N1, N2, N3, N4 };
3053 return getNode(Opcode, DL, VT, Ops, 4);
3056 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3057 SDValue N1, SDValue N2, SDValue N3,
3058 SDValue N4, SDValue N5) {
3059 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3060 return getNode(Opcode, DL, VT, Ops, 5);
3063 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3064 /// the incoming stack arguments to be loaded from the stack.
3065 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3066 SmallVector<SDValue, 8> ArgChains;
3068 // Include the original chain at the beginning of the list. When this is
3069 // used by target LowerCall hooks, this helps legalize find the
3070 // CALLSEQ_BEGIN node.
3071 ArgChains.push_back(Chain);
3073 // Add a chain value for each stack argument.
3074 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3075 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3076 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3077 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3078 if (FI->getIndex() < 0)
3079 ArgChains.push_back(SDValue(L, 1));
3081 // Build a tokenfactor for all the chains.
3082 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3083 &ArgChains[0], ArgChains.size());
3086 /// getMemsetValue - Vectorized representation of the memset value
3088 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3090 assert(Value.getOpcode() != ISD::UNDEF);
3092 unsigned NumBits = VT.getScalarType().getSizeInBits();
3093 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3094 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3096 for (unsigned i = NumBits; i > 8; i >>= 1) {
3097 Val = (Val << Shift) | Val;
3101 return DAG.getConstant(Val, VT);
3102 return DAG.getConstantFP(APFloat(Val), VT);
3105 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3106 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3108 for (unsigned i = NumBits; i > 8; i >>= 1) {
3109 Value = DAG.getNode(ISD::OR, dl, VT,
3110 DAG.getNode(ISD::SHL, dl, VT, Value,
3111 DAG.getConstant(Shift,
3112 TLI.getShiftAmountTy())),
3120 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3121 /// used when a memcpy is turned into a memset when the source is a constant
3123 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3124 const TargetLowering &TLI,
3125 std::string &Str, unsigned Offset) {
3126 // Handle vector with all elements zero.
3129 return DAG.getConstant(0, VT);
3130 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3131 VT.getSimpleVT().SimpleTy == MVT::f64)
3132 return DAG.getConstantFP(0.0, VT);
3133 else if (VT.isVector()) {
3134 unsigned NumElts = VT.getVectorNumElements();
3135 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3136 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3137 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3140 llvm_unreachable("Expected type!");
3143 assert(!VT.isVector() && "Can't handle vector type here!");
3144 unsigned NumBits = VT.getSizeInBits();
3145 unsigned MSB = NumBits / 8;
3147 if (TLI.isLittleEndian())
3148 Offset = Offset + MSB - 1;
3149 for (unsigned i = 0; i != MSB; ++i) {
3150 Val = (Val << 8) | (unsigned char)Str[Offset];
3151 Offset += TLI.isLittleEndian() ? -1 : 1;
3153 return DAG.getConstant(Val, VT);
3156 /// getMemBasePlusOffset - Returns base and offset node for the
3158 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3159 SelectionDAG &DAG) {
3160 EVT VT = Base.getValueType();
3161 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3162 VT, Base, DAG.getConstant(Offset, VT));
3165 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3167 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3168 unsigned SrcDelta = 0;
3169 GlobalAddressSDNode *G = NULL;
3170 if (Src.getOpcode() == ISD::GlobalAddress)
3171 G = cast<GlobalAddressSDNode>(Src);
3172 else if (Src.getOpcode() == ISD::ADD &&
3173 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3174 Src.getOperand(1).getOpcode() == ISD::Constant) {
3175 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3176 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3181 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3182 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3188 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3189 /// to replace the memset / memcpy. Return true if the number of memory ops
3190 /// is below the threshold. It returns the types of the sequence of
3191 /// memory ops to perform memset / memcpy by reference.
3192 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3193 unsigned Limit, uint64_t Size,
3194 unsigned DstAlign, unsigned SrcAlign,
3195 bool NonScalarIntSafe,
3197 const TargetLowering &TLI) {
3198 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3199 "Expecting memcpy / memset source to meet alignment requirement!");
3200 // If 'SrcAlign' is zero, that means the memory operation does not need load
3201 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3202 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3203 // specified alignment of the memory operation. If it is zero, that means
3204 // it's possible to change the alignment of the destination.
3205 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3206 NonScalarIntSafe, DAG);
3208 if (VT == MVT::Other) {
3209 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3210 TLI.allowsUnalignedMemoryAccesses(VT)) {
3211 VT = TLI.getPointerTy();
3213 switch (DstAlign & 7) {
3214 case 0: VT = MVT::i64; break;
3215 case 4: VT = MVT::i32; break;
3216 case 2: VT = MVT::i16; break;
3217 default: VT = MVT::i8; break;
3222 while (!TLI.isTypeLegal(LVT))
3223 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3224 assert(LVT.isInteger());
3230 unsigned NumMemOps = 0;
3232 unsigned VTSize = VT.getSizeInBits() / 8;
3233 while (VTSize > Size) {
3234 // For now, only use non-vector load / store's for the left-over pieces.
3235 if (VT.isVector() || VT.isFloatingPoint()) {
3237 while (!TLI.isTypeLegal(VT))
3238 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3239 VTSize = VT.getSizeInBits() / 8;
3241 // This can result in a type that is not legal on the target, e.g.
3242 // 1 or 2 bytes on PPC.
3243 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3248 if (++NumMemOps > Limit)
3250 MemOps.push_back(VT);
3257 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3258 SDValue Chain, SDValue Dst,
3259 SDValue Src, uint64_t Size,
3260 unsigned Align, bool isVol,
3262 const Value *DstSV, uint64_t DstSVOff,
3263 const Value *SrcSV, uint64_t SrcSVOff) {
3264 // Turn a memcpy of undef to nop.
3265 if (Src.getOpcode() == ISD::UNDEF)
3268 // Expand memcpy to a series of load and store ops if the size operand falls
3269 // below a certain threshold.
3270 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3271 std::vector<EVT> MemOps;
3272 uint64_t Limit = -1ULL;
3274 Limit = TLI.getMaxStoresPerMemcpy();
3275 bool DstAlignCanChange = false;
3276 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3277 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3278 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3279 DstAlignCanChange = true;
3280 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3281 if (Align > SrcAlign)
3284 bool CopyFromStr = isMemSrcFromString(Src, Str);
3285 bool isZeroStr = CopyFromStr && Str.empty();
3286 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3287 (DstAlignCanChange ? 0 : Align),
3288 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI))
3291 if (DstAlignCanChange) {
3292 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3293 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3294 if (NewAlign > Align) {
3295 // Give the stack frame object a larger alignment if needed.
3296 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3297 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3302 SmallVector<SDValue, 8> OutChains;
3303 unsigned NumMemOps = MemOps.size();
3304 uint64_t SrcOff = 0, DstOff = 0;
3305 for (unsigned i = 0; i != NumMemOps; ++i) {
3307 unsigned VTSize = VT.getSizeInBits() / 8;
3308 SDValue Value, Store;
3311 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3312 // It's unlikely a store of a vector immediate can be done in a single
3313 // instruction. It would require a load from a constantpool first.
3314 // We only handle zero vectors here.
3315 // FIXME: Handle other cases where store of vector immediate is done in
3316 // a single instruction.
3317 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3318 Store = DAG.getStore(Chain, dl, Value,
3319 getMemBasePlusOffset(Dst, DstOff, DAG),
3320 DstSV, DstSVOff + DstOff, isVol, false, Align);
3322 // The type might not be legal for the target. This should only happen
3323 // if the type is smaller than a legal type, as on PPC, so the right
3324 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3325 // to Load/Store if NVT==VT.
3326 // FIXME does the case above also need this?
3327 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3328 assert(NVT.bitsGE(VT));
3329 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3330 getMemBasePlusOffset(Src, SrcOff, DAG),
3331 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3332 MinAlign(SrcAlign, SrcOff));
3333 Store = DAG.getTruncStore(Chain, dl, Value,
3334 getMemBasePlusOffset(Dst, DstOff, DAG),
3335 DstSV, DstSVOff + DstOff, VT, isVol, false,
3338 OutChains.push_back(Store);
3343 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3344 &OutChains[0], OutChains.size());
3347 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3348 SDValue Chain, SDValue Dst,
3349 SDValue Src, uint64_t Size,
3350 unsigned Align, bool isVol,
3352 const Value *DstSV, uint64_t DstSVOff,
3353 const Value *SrcSV, uint64_t SrcSVOff) {
3354 // Turn a memmove of undef to nop.
3355 if (Src.getOpcode() == ISD::UNDEF)
3358 // Expand memmove to a series of load and store ops if the size operand falls
3359 // below a certain threshold.
3360 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3361 std::vector<EVT> MemOps;
3362 uint64_t Limit = -1ULL;
3364 Limit = TLI.getMaxStoresPerMemmove();
3365 bool DstAlignCanChange = false;
3366 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3367 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3368 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3369 DstAlignCanChange = true;
3370 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3371 if (Align > SrcAlign)
3374 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3375 (DstAlignCanChange ? 0 : Align),
3376 SrcAlign, true, DAG, TLI))
3379 if (DstAlignCanChange) {
3380 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3381 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3382 if (NewAlign > Align) {
3383 // Give the stack frame object a larger alignment if needed.
3384 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3385 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3390 uint64_t SrcOff = 0, DstOff = 0;
3391 SmallVector<SDValue, 8> LoadValues;
3392 SmallVector<SDValue, 8> LoadChains;
3393 SmallVector<SDValue, 8> OutChains;
3394 unsigned NumMemOps = MemOps.size();
3395 for (unsigned i = 0; i < NumMemOps; i++) {
3397 unsigned VTSize = VT.getSizeInBits() / 8;
3398 SDValue Value, Store;
3400 Value = DAG.getLoad(VT, dl, Chain,
3401 getMemBasePlusOffset(Src, SrcOff, DAG),
3402 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3403 LoadValues.push_back(Value);
3404 LoadChains.push_back(Value.getValue(1));
3407 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3408 &LoadChains[0], LoadChains.size());
3410 for (unsigned i = 0; i < NumMemOps; i++) {
3412 unsigned VTSize = VT.getSizeInBits() / 8;
3413 SDValue Value, Store;
3415 Store = DAG.getStore(Chain, dl, LoadValues[i],
3416 getMemBasePlusOffset(Dst, DstOff, DAG),
3417 DstSV, DstSVOff + DstOff, isVol, false, Align);
3418 OutChains.push_back(Store);
3422 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3423 &OutChains[0], OutChains.size());
3426 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3427 SDValue Chain, SDValue Dst,
3428 SDValue Src, uint64_t Size,
3429 unsigned Align, bool isVol,
3430 const Value *DstSV, uint64_t DstSVOff) {
3431 // Turn a memset of undef to nop.
3432 if (Src.getOpcode() == ISD::UNDEF)
3435 // Expand memset to a series of load/store ops if the size operand
3436 // falls below a certain threshold.
3437 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3438 std::vector<EVT> MemOps;
3439 bool DstAlignCanChange = false;
3440 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3441 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3442 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3443 DstAlignCanChange = true;
3444 bool NonScalarIntSafe =
3445 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3446 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3447 Size, (DstAlignCanChange ? 0 : Align), 0,
3448 NonScalarIntSafe, DAG, TLI))
3451 if (DstAlignCanChange) {
3452 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3453 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3454 if (NewAlign > Align) {
3455 // Give the stack frame object a larger alignment if needed.
3456 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3457 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3462 SmallVector<SDValue, 8> OutChains;
3463 uint64_t DstOff = 0;
3464 unsigned NumMemOps = MemOps.size();
3465 for (unsigned i = 0; i < NumMemOps; i++) {
3467 unsigned VTSize = VT.getSizeInBits() / 8;
3468 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3469 SDValue Store = DAG.getStore(Chain, dl, Value,
3470 getMemBasePlusOffset(Dst, DstOff, DAG),
3471 DstSV, DstSVOff + DstOff, isVol, false, 0);
3472 OutChains.push_back(Store);
3476 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3477 &OutChains[0], OutChains.size());
3480 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3481 SDValue Src, SDValue Size,
3482 unsigned Align, bool isVol, bool AlwaysInline,
3483 const Value *DstSV, uint64_t DstSVOff,
3484 const Value *SrcSV, uint64_t SrcSVOff) {
3486 // Check to see if we should lower the memcpy to loads and stores first.
3487 // For cases within the target-specified limits, this is the best choice.
3488 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3490 // Memcpy with size zero? Just return the original chain.
3491 if (ConstantSize->isNullValue())
3494 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3495 ConstantSize->getZExtValue(),Align,
3496 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3497 if (Result.getNode())
3501 // Then check to see if we should lower the memcpy with target-specific
3502 // code. If the target chooses to do this, this is the next best.
3504 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3505 isVol, AlwaysInline,
3506 DstSV, DstSVOff, SrcSV, SrcSVOff);
3507 if (Result.getNode())
3510 // If we really need inline code and the target declined to provide it,
3511 // use a (potentially long) sequence of loads and stores.
3513 assert(ConstantSize && "AlwaysInline requires a constant size!");
3514 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3515 ConstantSize->getZExtValue(), Align, isVol,
3516 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3519 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3520 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3521 // respect volatile, so they may do things like read or write memory
3522 // beyond the given memory regions. But fixing this isn't easy, and most
3523 // people don't care.
3525 // Emit a library call.
3526 TargetLowering::ArgListTy Args;
3527 TargetLowering::ArgListEntry Entry;
3528 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3529 Entry.Node = Dst; Args.push_back(Entry);
3530 Entry.Node = Src; Args.push_back(Entry);
3531 Entry.Node = Size; Args.push_back(Entry);
3532 // FIXME: pass in DebugLoc
3533 std::pair<SDValue,SDValue> CallResult =
3534 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3535 false, false, false, false, 0,
3536 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3537 /*isReturnValueUsed=*/false,
3538 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3539 TLI.getPointerTy()),
3541 return CallResult.second;
3544 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3545 SDValue Src, SDValue Size,
3546 unsigned Align, bool isVol,
3547 const Value *DstSV, uint64_t DstSVOff,
3548 const Value *SrcSV, uint64_t SrcSVOff) {
3550 // Check to see if we should lower the memmove to loads and stores first.
3551 // For cases within the target-specified limits, this is the best choice.
3552 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3554 // Memmove with size zero? Just return the original chain.
3555 if (ConstantSize->isNullValue())
3559 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3560 ConstantSize->getZExtValue(), Align, isVol,
3561 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3562 if (Result.getNode())
3566 // Then check to see if we should lower the memmove with target-specific
3567 // code. If the target chooses to do this, this is the next best.
3569 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3570 DstSV, DstSVOff, SrcSV, SrcSVOff);
3571 if (Result.getNode())
3574 // Emit a library call.
3575 assert(!isVol && "library memmove does not support volatile");
3576 TargetLowering::ArgListTy Args;
3577 TargetLowering::ArgListEntry Entry;
3578 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3579 Entry.Node = Dst; Args.push_back(Entry);
3580 Entry.Node = Src; Args.push_back(Entry);
3581 Entry.Node = Size; Args.push_back(Entry);
3582 // FIXME: pass in DebugLoc
3583 std::pair<SDValue,SDValue> CallResult =
3584 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3585 false, false, false, false, 0,
3586 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3587 /*isReturnValueUsed=*/false,
3588 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3589 TLI.getPointerTy()),
3591 return CallResult.second;
3594 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3595 SDValue Src, SDValue Size,
3596 unsigned Align, bool isVol,
3597 const Value *DstSV, uint64_t DstSVOff) {
3599 // Check to see if we should lower the memset to stores first.
3600 // For cases within the target-specified limits, this is the best choice.
3601 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3603 // Memset with size zero? Just return the original chain.
3604 if (ConstantSize->isNullValue())
3608 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3609 Align, isVol, DstSV, DstSVOff);
3611 if (Result.getNode())
3615 // Then check to see if we should lower the memset with target-specific
3616 // code. If the target chooses to do this, this is the next best.
3618 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3620 if (Result.getNode())
3623 // Emit a library call.
3624 assert(!isVol && "library memset does not support volatile");
3625 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3626 TargetLowering::ArgListTy Args;
3627 TargetLowering::ArgListEntry Entry;
3628 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3629 Args.push_back(Entry);
3630 // Extend or truncate the argument to be an i32 value for the call.
3631 if (Src.getValueType().bitsGT(MVT::i32))
3632 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3634 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3636 Entry.Ty = Type::getInt32Ty(*getContext());
3637 Entry.isSExt = true;
3638 Args.push_back(Entry);
3640 Entry.Ty = IntPtrTy;
3641 Entry.isSExt = false;
3642 Args.push_back(Entry);
3643 // FIXME: pass in DebugLoc
3644 std::pair<SDValue,SDValue> CallResult =
3645 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3646 false, false, false, false, 0,
3647 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3648 /*isReturnValueUsed=*/false,
3649 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3650 TLI.getPointerTy()),
3652 return CallResult.second;
3655 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3657 SDValue Ptr, SDValue Cmp,
3658 SDValue Swp, const Value* PtrVal,
3659 unsigned Alignment) {
3660 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3661 Alignment = getEVTAlignment(MemVT);
3663 // Check if the memory reference references a frame index
3665 if (const FrameIndexSDNode *FI =
3666 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3667 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3669 MachineFunction &MF = getMachineFunction();
3670 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3672 // For now, atomics are considered to be volatile always.
3673 Flags |= MachineMemOperand::MOVolatile;
3675 MachineMemOperand *MMO =
3676 MF.getMachineMemOperand(PtrVal, Flags, 0,
3677 MemVT.getStoreSize(), Alignment);
3679 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3682 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3684 SDValue Ptr, SDValue Cmp,
3685 SDValue Swp, MachineMemOperand *MMO) {
3686 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3687 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3689 EVT VT = Cmp.getValueType();
3691 SDVTList VTs = getVTList(VT, MVT::Other);
3692 FoldingSetNodeID ID;
3693 ID.AddInteger(MemVT.getRawBits());
3694 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3695 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3697 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3698 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3699 return SDValue(E, 0);
3701 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3702 Ptr, Cmp, Swp, MMO);
3703 CSEMap.InsertNode(N, IP);
3704 AllNodes.push_back(N);
3705 return SDValue(N, 0);
3708 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3710 SDValue Ptr, SDValue Val,
3711 const Value* PtrVal,
3712 unsigned Alignment) {
3713 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3714 Alignment = getEVTAlignment(MemVT);
3716 // Check if the memory reference references a frame index
3718 if (const FrameIndexSDNode *FI =
3719 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3720 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3722 MachineFunction &MF = getMachineFunction();
3723 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3725 // For now, atomics are considered to be volatile always.
3726 Flags |= MachineMemOperand::MOVolatile;
3728 MachineMemOperand *MMO =
3729 MF.getMachineMemOperand(PtrVal, Flags, 0,
3730 MemVT.getStoreSize(), Alignment);
3732 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3735 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3737 SDValue Ptr, SDValue Val,
3738 MachineMemOperand *MMO) {
3739 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3740 Opcode == ISD::ATOMIC_LOAD_SUB ||
3741 Opcode == ISD::ATOMIC_LOAD_AND ||
3742 Opcode == ISD::ATOMIC_LOAD_OR ||
3743 Opcode == ISD::ATOMIC_LOAD_XOR ||
3744 Opcode == ISD::ATOMIC_LOAD_NAND ||
3745 Opcode == ISD::ATOMIC_LOAD_MIN ||
3746 Opcode == ISD::ATOMIC_LOAD_MAX ||
3747 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3748 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3749 Opcode == ISD::ATOMIC_SWAP) &&
3750 "Invalid Atomic Op");
3752 EVT VT = Val.getValueType();
3754 SDVTList VTs = getVTList(VT, MVT::Other);
3755 FoldingSetNodeID ID;
3756 ID.AddInteger(MemVT.getRawBits());
3757 SDValue Ops[] = {Chain, Ptr, Val};
3758 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3760 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3761 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3762 return SDValue(E, 0);
3764 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3766 CSEMap.InsertNode(N, IP);
3767 AllNodes.push_back(N);
3768 return SDValue(N, 0);
3771 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3772 /// Allowed to return something different (and simpler) if Simplify is true.
3773 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3778 SmallVector<EVT, 4> VTs;
3779 VTs.reserve(NumOps);
3780 for (unsigned i = 0; i < NumOps; ++i)
3781 VTs.push_back(Ops[i].getValueType());
3782 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3787 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3788 const EVT *VTs, unsigned NumVTs,
3789 const SDValue *Ops, unsigned NumOps,
3790 EVT MemVT, const Value *srcValue, int SVOff,
3791 unsigned Align, bool Vol,
3792 bool ReadMem, bool WriteMem) {
3793 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3794 MemVT, srcValue, SVOff, Align, Vol,
3799 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3800 const SDValue *Ops, unsigned NumOps,
3801 EVT MemVT, const Value *srcValue, int SVOff,
3802 unsigned Align, bool Vol,
3803 bool ReadMem, bool WriteMem) {
3804 if (Align == 0) // Ensure that codegen never sees alignment 0
3805 Align = getEVTAlignment(MemVT);
3807 MachineFunction &MF = getMachineFunction();
3810 Flags |= MachineMemOperand::MOStore;
3812 Flags |= MachineMemOperand::MOLoad;
3814 Flags |= MachineMemOperand::MOVolatile;
3815 MachineMemOperand *MMO =
3816 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3817 MemVT.getStoreSize(), Align);
3819 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3823 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3824 const SDValue *Ops, unsigned NumOps,
3825 EVT MemVT, MachineMemOperand *MMO) {
3826 assert((Opcode == ISD::INTRINSIC_VOID ||
3827 Opcode == ISD::INTRINSIC_W_CHAIN ||
3828 (Opcode <= INT_MAX &&
3829 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3830 "Opcode is not a memory-accessing opcode!");
3832 // Memoize the node unless it returns a flag.
3833 MemIntrinsicSDNode *N;
3834 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3835 FoldingSetNodeID ID;
3836 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3838 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3839 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3840 return SDValue(E, 0);
3843 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3845 CSEMap.InsertNode(N, IP);
3847 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3850 AllNodes.push_back(N);
3851 return SDValue(N, 0);
3855 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3856 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3857 SDValue Ptr, SDValue Offset,
3858 const Value *SV, int SVOffset, EVT MemVT,
3859 bool isVolatile, bool isNonTemporal,
3860 unsigned Alignment) {
3861 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3862 Alignment = getEVTAlignment(VT);
3864 // Check if the memory reference references a frame index
3866 if (const FrameIndexSDNode *FI =
3867 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3868 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3870 MachineFunction &MF = getMachineFunction();
3871 unsigned Flags = MachineMemOperand::MOLoad;
3873 Flags |= MachineMemOperand::MOVolatile;
3875 Flags |= MachineMemOperand::MONonTemporal;
3876 MachineMemOperand *MMO =
3877 MF.getMachineMemOperand(SV, Flags, SVOffset,
3878 MemVT.getStoreSize(), Alignment);
3879 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3883 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3884 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3885 SDValue Ptr, SDValue Offset, EVT MemVT,
3886 MachineMemOperand *MMO) {
3888 ExtType = ISD::NON_EXTLOAD;
3889 } else if (ExtType == ISD::NON_EXTLOAD) {
3890 assert(VT == MemVT && "Non-extending load from different memory type!");
3893 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3894 "Should only be an extending load, not truncating!");
3895 assert(VT.isInteger() == MemVT.isInteger() &&
3896 "Cannot convert from FP to Int or Int -> FP!");
3897 assert(VT.isVector() == MemVT.isVector() &&
3898 "Cannot use trunc store to convert to or from a vector!");
3899 assert((!VT.isVector() ||
3900 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3901 "Cannot use trunc store to change the number of vector elements!");
3904 bool Indexed = AM != ISD::UNINDEXED;
3905 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3906 "Unindexed load with an offset!");
3908 SDVTList VTs = Indexed ?
3909 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3910 SDValue Ops[] = { Chain, Ptr, Offset };
3911 FoldingSetNodeID ID;
3912 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3913 ID.AddInteger(MemVT.getRawBits());
3914 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3915 MMO->isNonTemporal()));
3917 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3918 cast<LoadSDNode>(E)->refineAlignment(MMO);
3919 return SDValue(E, 0);
3921 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3923 CSEMap.InsertNode(N, IP);
3924 AllNodes.push_back(N);
3925 return SDValue(N, 0);
3928 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3929 SDValue Chain, SDValue Ptr,
3930 const Value *SV, int SVOffset,
3931 bool isVolatile, bool isNonTemporal,
3932 unsigned Alignment) {
3933 SDValue Undef = getUNDEF(Ptr.getValueType());
3934 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3935 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3938 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3939 SDValue Chain, SDValue Ptr,
3941 int SVOffset, EVT MemVT,
3942 bool isVolatile, bool isNonTemporal,
3943 unsigned Alignment) {
3944 SDValue Undef = getUNDEF(Ptr.getValueType());
3945 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3946 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3950 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3951 SDValue Offset, ISD::MemIndexedMode AM) {
3952 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3953 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3954 "Load is already a indexed load!");
3955 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3956 LD->getChain(), Base, Offset, LD->getSrcValue(),
3957 LD->getSrcValueOffset(), LD->getMemoryVT(),
3958 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3961 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3962 SDValue Ptr, const Value *SV, int SVOffset,
3963 bool isVolatile, bool isNonTemporal,
3964 unsigned Alignment) {
3965 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3966 Alignment = getEVTAlignment(Val.getValueType());
3968 // Check if the memory reference references a frame index
3970 if (const FrameIndexSDNode *FI =
3971 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3972 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3974 MachineFunction &MF = getMachineFunction();
3975 unsigned Flags = MachineMemOperand::MOStore;
3977 Flags |= MachineMemOperand::MOVolatile;
3979 Flags |= MachineMemOperand::MONonTemporal;
3980 MachineMemOperand *MMO =
3981 MF.getMachineMemOperand(SV, Flags, SVOffset,
3982 Val.getValueType().getStoreSize(), Alignment);
3984 return getStore(Chain, dl, Val, Ptr, MMO);
3987 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3988 SDValue Ptr, MachineMemOperand *MMO) {
3989 EVT VT = Val.getValueType();
3990 SDVTList VTs = getVTList(MVT::Other);
3991 SDValue Undef = getUNDEF(Ptr.getValueType());
3992 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3993 FoldingSetNodeID ID;
3994 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3995 ID.AddInteger(VT.getRawBits());
3996 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
3997 MMO->isNonTemporal()));
3999 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4000 cast<StoreSDNode>(E)->refineAlignment(MMO);
4001 return SDValue(E, 0);
4003 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4005 CSEMap.InsertNode(N, IP);
4006 AllNodes.push_back(N);
4007 return SDValue(N, 0);
4010 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4011 SDValue Ptr, const Value *SV,
4012 int SVOffset, EVT SVT,
4013 bool isVolatile, bool isNonTemporal,
4014 unsigned Alignment) {
4015 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4016 Alignment = getEVTAlignment(SVT);
4018 // Check if the memory reference references a frame index
4020 if (const FrameIndexSDNode *FI =
4021 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4022 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4024 MachineFunction &MF = getMachineFunction();
4025 unsigned Flags = MachineMemOperand::MOStore;
4027 Flags |= MachineMemOperand::MOVolatile;
4029 Flags |= MachineMemOperand::MONonTemporal;
4030 MachineMemOperand *MMO =
4031 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4033 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4036 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4037 SDValue Ptr, EVT SVT,
4038 MachineMemOperand *MMO) {
4039 EVT VT = Val.getValueType();
4042 return getStore(Chain, dl, Val, Ptr, MMO);
4044 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4045 "Should only be a truncating store, not extending!");
4046 assert(VT.isInteger() == SVT.isInteger() &&
4047 "Can't do FP-INT conversion!");
4048 assert(VT.isVector() == SVT.isVector() &&
4049 "Cannot use trunc store to convert to or from a vector!");
4050 assert((!VT.isVector() ||
4051 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4052 "Cannot use trunc store to change the number of vector elements!");
4054 SDVTList VTs = getVTList(MVT::Other);
4055 SDValue Undef = getUNDEF(Ptr.getValueType());
4056 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4057 FoldingSetNodeID ID;
4058 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4059 ID.AddInteger(SVT.getRawBits());
4060 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4061 MMO->isNonTemporal()));
4063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4064 cast<StoreSDNode>(E)->refineAlignment(MMO);
4065 return SDValue(E, 0);
4067 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4069 CSEMap.InsertNode(N, IP);
4070 AllNodes.push_back(N);
4071 return SDValue(N, 0);
4075 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4076 SDValue Offset, ISD::MemIndexedMode AM) {
4077 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4078 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4079 "Store is already a indexed store!");
4080 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4081 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4082 FoldingSetNodeID ID;
4083 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4084 ID.AddInteger(ST->getMemoryVT().getRawBits());
4085 ID.AddInteger(ST->getRawSubclassData());
4087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4088 return SDValue(E, 0);
4090 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4091 ST->isTruncatingStore(),
4093 ST->getMemOperand());
4094 CSEMap.InsertNode(N, IP);
4095 AllNodes.push_back(N);
4096 return SDValue(N, 0);
4099 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4100 SDValue Chain, SDValue Ptr,
4102 SDValue Ops[] = { Chain, Ptr, SV };
4103 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4106 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4107 const SDUse *Ops, unsigned NumOps) {
4109 case 0: return getNode(Opcode, DL, VT);
4110 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4111 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4112 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4116 // Copy from an SDUse array into an SDValue array for use with
4117 // the regular getNode logic.
4118 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4119 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4122 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4123 const SDValue *Ops, unsigned NumOps) {
4125 case 0: return getNode(Opcode, DL, VT);
4126 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4127 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4128 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4134 case ISD::SELECT_CC: {
4135 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4136 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4137 "LHS and RHS of condition must have same type!");
4138 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4139 "True and False arms of SelectCC must have same type!");
4140 assert(Ops[2].getValueType() == VT &&
4141 "select_cc node must be of same type as true and false value!");
4145 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4146 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4147 "LHS/RHS of comparison should match types!");
4154 SDVTList VTs = getVTList(VT);
4156 if (VT != MVT::Flag) {
4157 FoldingSetNodeID ID;
4158 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4161 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4162 return SDValue(E, 0);
4164 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4165 CSEMap.InsertNode(N, IP);
4167 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4170 AllNodes.push_back(N);
4174 return SDValue(N, 0);
4177 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4178 const std::vector<EVT> &ResultTys,
4179 const SDValue *Ops, unsigned NumOps) {
4180 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4184 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4185 const EVT *VTs, unsigned NumVTs,
4186 const SDValue *Ops, unsigned NumOps) {
4188 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4189 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4192 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4193 const SDValue *Ops, unsigned NumOps) {
4194 if (VTList.NumVTs == 1)
4195 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4199 // FIXME: figure out how to safely handle things like
4200 // int foo(int x) { return 1 << (x & 255); }
4201 // int bar() { return foo(256); }
4202 case ISD::SRA_PARTS:
4203 case ISD::SRL_PARTS:
4204 case ISD::SHL_PARTS:
4205 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4206 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4207 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4208 else if (N3.getOpcode() == ISD::AND)
4209 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4210 // If the and is only masking out bits that cannot effect the shift,
4211 // eliminate the and.
4212 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4213 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4214 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4220 // Memoize the node unless it returns a flag.
4222 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4223 FoldingSetNodeID ID;
4224 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4227 return SDValue(E, 0);
4230 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4231 } else if (NumOps == 2) {
4232 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4233 } else if (NumOps == 3) {
4234 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4237 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4239 CSEMap.InsertNode(N, IP);
4242 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4243 } else if (NumOps == 2) {
4244 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4245 } else if (NumOps == 3) {
4246 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4249 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4252 AllNodes.push_back(N);
4256 return SDValue(N, 0);
4259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4260 return getNode(Opcode, DL, VTList, 0, 0);
4263 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4265 SDValue Ops[] = { N1 };
4266 return getNode(Opcode, DL, VTList, Ops, 1);
4269 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4270 SDValue N1, SDValue N2) {
4271 SDValue Ops[] = { N1, N2 };
4272 return getNode(Opcode, DL, VTList, Ops, 2);
4275 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4276 SDValue N1, SDValue N2, SDValue N3) {
4277 SDValue Ops[] = { N1, N2, N3 };
4278 return getNode(Opcode, DL, VTList, Ops, 3);
4281 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4282 SDValue N1, SDValue N2, SDValue N3,
4284 SDValue Ops[] = { N1, N2, N3, N4 };
4285 return getNode(Opcode, DL, VTList, Ops, 4);
4288 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4289 SDValue N1, SDValue N2, SDValue N3,
4290 SDValue N4, SDValue N5) {
4291 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4292 return getNode(Opcode, DL, VTList, Ops, 5);
4295 SDVTList SelectionDAG::getVTList(EVT VT) {
4296 return makeVTList(SDNode::getValueTypeList(VT), 1);
4299 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4300 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4301 E = VTList.rend(); I != E; ++I)
4302 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4305 EVT *Array = Allocator.Allocate<EVT>(2);
4308 SDVTList Result = makeVTList(Array, 2);
4309 VTList.push_back(Result);
4313 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4314 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4315 E = VTList.rend(); I != E; ++I)
4316 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4320 EVT *Array = Allocator.Allocate<EVT>(3);
4324 SDVTList Result = makeVTList(Array, 3);
4325 VTList.push_back(Result);
4329 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4330 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4331 E = VTList.rend(); I != E; ++I)
4332 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4333 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4336 EVT *Array = Allocator.Allocate<EVT>(4);
4341 SDVTList Result = makeVTList(Array, 4);
4342 VTList.push_back(Result);
4346 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4348 case 0: llvm_unreachable("Cannot have nodes without results!");
4349 case 1: return getVTList(VTs[0]);
4350 case 2: return getVTList(VTs[0], VTs[1]);
4351 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4352 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4356 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4357 E = VTList.rend(); I != E; ++I) {
4358 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4361 bool NoMatch = false;
4362 for (unsigned i = 2; i != NumVTs; ++i)
4363 if (VTs[i] != I->VTs[i]) {
4371 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4372 std::copy(VTs, VTs+NumVTs, Array);
4373 SDVTList Result = makeVTList(Array, NumVTs);
4374 VTList.push_back(Result);
4379 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4380 /// specified operands. If the resultant node already exists in the DAG,
4381 /// this does not modify the specified node, instead it returns the node that
4382 /// already exists. If the resultant node does not exist in the DAG, the
4383 /// input node is returned. As a degenerate case, if you specify the same
4384 /// input operands as the node already has, the input node is returned.
4385 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4386 SDNode *N = InN.getNode();
4387 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4389 // Check to see if there is no change.
4390 if (Op == N->getOperand(0)) return InN;
4392 // See if the modified node already exists.
4393 void *InsertPos = 0;
4394 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4395 return SDValue(Existing, InN.getResNo());
4397 // Nope it doesn't. Remove the node from its current place in the maps.
4399 if (!RemoveNodeFromCSEMaps(N))
4402 // Now we update the operands.
4403 N->OperandList[0].set(Op);
4405 // If this gets put into a CSE map, add it.
4406 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4410 SDValue SelectionDAG::
4411 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4412 SDNode *N = InN.getNode();
4413 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4415 // Check to see if there is no change.
4416 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4417 return InN; // No operands changed, just return the input node.
4419 // See if the modified node already exists.
4420 void *InsertPos = 0;
4421 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4422 return SDValue(Existing, InN.getResNo());
4424 // Nope it doesn't. Remove the node from its current place in the maps.
4426 if (!RemoveNodeFromCSEMaps(N))
4429 // Now we update the operands.
4430 if (N->OperandList[0] != Op1)
4431 N->OperandList[0].set(Op1);
4432 if (N->OperandList[1] != Op2)
4433 N->OperandList[1].set(Op2);
4435 // If this gets put into a CSE map, add it.
4436 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4440 SDValue SelectionDAG::
4441 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4442 SDValue Ops[] = { Op1, Op2, Op3 };
4443 return UpdateNodeOperands(N, Ops, 3);
4446 SDValue SelectionDAG::
4447 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4448 SDValue Op3, SDValue Op4) {
4449 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4450 return UpdateNodeOperands(N, Ops, 4);
4453 SDValue SelectionDAG::
4454 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4455 SDValue Op3, SDValue Op4, SDValue Op5) {
4456 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4457 return UpdateNodeOperands(N, Ops, 5);
4460 SDValue SelectionDAG::
4461 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4462 SDNode *N = InN.getNode();
4463 assert(N->getNumOperands() == NumOps &&
4464 "Update with wrong number of operands");
4466 // Check to see if there is no change.
4467 bool AnyChange = false;
4468 for (unsigned i = 0; i != NumOps; ++i) {
4469 if (Ops[i] != N->getOperand(i)) {
4475 // No operands changed, just return the input node.
4476 if (!AnyChange) return InN;
4478 // See if the modified node already exists.
4479 void *InsertPos = 0;
4480 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4481 return SDValue(Existing, InN.getResNo());
4483 // Nope it doesn't. Remove the node from its current place in the maps.
4485 if (!RemoveNodeFromCSEMaps(N))
4488 // Now we update the operands.
4489 for (unsigned i = 0; i != NumOps; ++i)
4490 if (N->OperandList[i] != Ops[i])
4491 N->OperandList[i].set(Ops[i]);
4493 // If this gets put into a CSE map, add it.
4494 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4498 /// DropOperands - Release the operands and set this node to have
4500 void SDNode::DropOperands() {
4501 // Unlike the code in MorphNodeTo that does this, we don't need to
4502 // watch for dead nodes here.
4503 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4509 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4512 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4514 SDVTList VTs = getVTList(VT);
4515 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4518 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4519 EVT VT, SDValue Op1) {
4520 SDVTList VTs = getVTList(VT);
4521 SDValue Ops[] = { Op1 };
4522 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4525 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4526 EVT VT, SDValue Op1,
4528 SDVTList VTs = getVTList(VT);
4529 SDValue Ops[] = { Op1, Op2 };
4530 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4533 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4534 EVT VT, SDValue Op1,
4535 SDValue Op2, SDValue Op3) {
4536 SDVTList VTs = getVTList(VT);
4537 SDValue Ops[] = { Op1, Op2, Op3 };
4538 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4541 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4542 EVT VT, const SDValue *Ops,
4544 SDVTList VTs = getVTList(VT);
4545 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4548 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4549 EVT VT1, EVT VT2, const SDValue *Ops,
4551 SDVTList VTs = getVTList(VT1, VT2);
4552 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4555 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4557 SDVTList VTs = getVTList(VT1, VT2);
4558 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4561 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4562 EVT VT1, EVT VT2, EVT VT3,
4563 const SDValue *Ops, unsigned NumOps) {
4564 SDVTList VTs = getVTList(VT1, VT2, VT3);
4565 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4568 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4569 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4570 const SDValue *Ops, unsigned NumOps) {
4571 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4572 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4575 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4578 SDVTList VTs = getVTList(VT1, VT2);
4579 SDValue Ops[] = { Op1 };
4580 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4583 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4585 SDValue Op1, SDValue Op2) {
4586 SDVTList VTs = getVTList(VT1, VT2);
4587 SDValue Ops[] = { Op1, Op2 };
4588 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4591 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4593 SDValue Op1, SDValue Op2,
4595 SDVTList VTs = getVTList(VT1, VT2);
4596 SDValue Ops[] = { Op1, Op2, Op3 };
4597 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4600 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4601 EVT VT1, EVT VT2, EVT VT3,
4602 SDValue Op1, SDValue Op2,
4604 SDVTList VTs = getVTList(VT1, VT2, VT3);
4605 SDValue Ops[] = { Op1, Op2, Op3 };
4606 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4609 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4610 SDVTList VTs, const SDValue *Ops,
4612 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4613 // Reset the NodeID to -1.
4618 /// MorphNodeTo - This *mutates* the specified node to have the specified
4619 /// return type, opcode, and operands.
4621 /// Note that MorphNodeTo returns the resultant node. If there is already a
4622 /// node of the specified opcode and operands, it returns that node instead of
4623 /// the current one. Note that the DebugLoc need not be the same.
4625 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4626 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4627 /// node, and because it doesn't require CSE recalculation for any of
4628 /// the node's users.
4630 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4631 SDVTList VTs, const SDValue *Ops,
4633 // If an identical node already exists, use it.
4635 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4636 FoldingSetNodeID ID;
4637 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4638 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4642 if (!RemoveNodeFromCSEMaps(N))
4645 // Start the morphing.
4647 N->ValueList = VTs.VTs;
4648 N->NumValues = VTs.NumVTs;
4650 // Clear the operands list, updating used nodes to remove this from their
4651 // use list. Keep track of any operands that become dead as a result.
4652 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4653 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4655 SDNode *Used = Use.getNode();
4657 if (Used->use_empty())
4658 DeadNodeSet.insert(Used);
4661 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4662 // Initialize the memory references information.
4663 MN->setMemRefs(0, 0);
4664 // If NumOps is larger than the # of operands we can have in a
4665 // MachineSDNode, reallocate the operand list.
4666 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4667 if (MN->OperandsNeedDelete)
4668 delete[] MN->OperandList;
4669 if (NumOps > array_lengthof(MN->LocalOperands))
4670 // We're creating a final node that will live unmorphed for the
4671 // remainder of the current SelectionDAG iteration, so we can allocate
4672 // the operands directly out of a pool with no recycling metadata.
4673 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4676 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4677 MN->OperandsNeedDelete = false;
4679 MN->InitOperands(MN->OperandList, Ops, NumOps);
4681 // If NumOps is larger than the # of operands we currently have, reallocate
4682 // the operand list.
4683 if (NumOps > N->NumOperands) {
4684 if (N->OperandsNeedDelete)
4685 delete[] N->OperandList;
4686 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4687 N->OperandsNeedDelete = true;
4689 N->InitOperands(N->OperandList, Ops, NumOps);
4692 // Delete any nodes that are still dead after adding the uses for the
4694 if (!DeadNodeSet.empty()) {
4695 SmallVector<SDNode *, 16> DeadNodes;
4696 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4697 E = DeadNodeSet.end(); I != E; ++I)
4698 if ((*I)->use_empty())
4699 DeadNodes.push_back(*I);
4700 RemoveDeadNodes(DeadNodes);
4704 CSEMap.InsertNode(N, IP); // Memoize the new node.
4709 /// getMachineNode - These are used for target selectors to create a new node
4710 /// with specified return type(s), MachineInstr opcode, and operands.
4712 /// Note that getMachineNode returns the resultant node. If there is already a
4713 /// node of the specified opcode and operands, it returns that node instead of
4714 /// the current one.
4716 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4717 SDVTList VTs = getVTList(VT);
4718 return getMachineNode(Opcode, dl, VTs, 0, 0);
4722 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4723 SDVTList VTs = getVTList(VT);
4724 SDValue Ops[] = { Op1 };
4725 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4729 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4730 SDValue Op1, SDValue Op2) {
4731 SDVTList VTs = getVTList(VT);
4732 SDValue Ops[] = { Op1, Op2 };
4733 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4737 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4738 SDValue Op1, SDValue Op2, SDValue Op3) {
4739 SDVTList VTs = getVTList(VT);
4740 SDValue Ops[] = { Op1, Op2, Op3 };
4741 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4745 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4746 const SDValue *Ops, unsigned NumOps) {
4747 SDVTList VTs = getVTList(VT);
4748 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4752 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4753 SDVTList VTs = getVTList(VT1, VT2);
4754 return getMachineNode(Opcode, dl, VTs, 0, 0);
4758 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4759 EVT VT1, EVT VT2, SDValue Op1) {
4760 SDVTList VTs = getVTList(VT1, VT2);
4761 SDValue Ops[] = { Op1 };
4762 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4766 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4767 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4768 SDVTList VTs = getVTList(VT1, VT2);
4769 SDValue Ops[] = { Op1, Op2 };
4770 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4774 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4775 EVT VT1, EVT VT2, SDValue Op1,
4776 SDValue Op2, SDValue Op3) {
4777 SDVTList VTs = getVTList(VT1, VT2);
4778 SDValue Ops[] = { Op1, Op2, Op3 };
4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4783 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4785 const SDValue *Ops, unsigned NumOps) {
4786 SDVTList VTs = getVTList(VT1, VT2);
4787 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4791 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4792 EVT VT1, EVT VT2, EVT VT3,
4793 SDValue Op1, SDValue Op2) {
4794 SDVTList VTs = getVTList(VT1, VT2, VT3);
4795 SDValue Ops[] = { Op1, Op2 };
4796 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4800 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4801 EVT VT1, EVT VT2, EVT VT3,
4802 SDValue Op1, SDValue Op2, SDValue Op3) {
4803 SDVTList VTs = getVTList(VT1, VT2, VT3);
4804 SDValue Ops[] = { Op1, Op2, Op3 };
4805 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4809 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4810 EVT VT1, EVT VT2, EVT VT3,
4811 const SDValue *Ops, unsigned NumOps) {
4812 SDVTList VTs = getVTList(VT1, VT2, VT3);
4813 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4817 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4818 EVT VT2, EVT VT3, EVT VT4,
4819 const SDValue *Ops, unsigned NumOps) {
4820 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4821 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4825 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4826 const std::vector<EVT> &ResultTys,
4827 const SDValue *Ops, unsigned NumOps) {
4828 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4829 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4833 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4834 const SDValue *Ops, unsigned NumOps) {
4835 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4840 FoldingSetNodeID ID;
4841 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4843 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4844 return cast<MachineSDNode>(E);
4847 // Allocate a new MachineSDNode.
4848 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4850 // Initialize the operands list.
4851 if (NumOps > array_lengthof(N->LocalOperands))
4852 // We're creating a final node that will live unmorphed for the
4853 // remainder of the current SelectionDAG iteration, so we can allocate
4854 // the operands directly out of a pool with no recycling metadata.
4855 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4858 N->InitOperands(N->LocalOperands, Ops, NumOps);
4859 N->OperandsNeedDelete = false;
4862 CSEMap.InsertNode(N, IP);
4864 AllNodes.push_back(N);
4871 /// getTargetExtractSubreg - A convenience function for creating
4872 /// TargetOpcode::EXTRACT_SUBREG nodes.
4874 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4876 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4877 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4878 VT, Operand, SRIdxVal);
4879 return SDValue(Subreg, 0);
4882 /// getTargetInsertSubreg - A convenience function for creating
4883 /// TargetOpcode::INSERT_SUBREG nodes.
4885 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4886 SDValue Operand, SDValue Subreg) {
4887 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4888 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4889 VT, Operand, Subreg, SRIdxVal);
4890 return SDValue(Result, 0);
4893 /// getNodeIfExists - Get the specified node if it's already available, or
4894 /// else return NULL.
4895 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4896 const SDValue *Ops, unsigned NumOps) {
4897 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4898 FoldingSetNodeID ID;
4899 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4901 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4907 /// getDbgValue - Creates a SDDbgValue node.
4910 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4911 DebugLoc DL, unsigned O) {
4912 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4916 SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off,
4917 DebugLoc DL, unsigned O) {
4918 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4922 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4923 DebugLoc DL, unsigned O) {
4924 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4929 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4930 /// pointed to by a use iterator is deleted, increment the use iterator
4931 /// so that it doesn't dangle.
4933 /// This class also manages a "downlink" DAGUpdateListener, to forward
4934 /// messages to ReplaceAllUsesWith's callers.
4936 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4937 SelectionDAG::DAGUpdateListener *DownLink;
4938 SDNode::use_iterator &UI;
4939 SDNode::use_iterator &UE;
4941 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4942 // Increment the iterator as needed.
4943 while (UI != UE && N == *UI)
4946 // Then forward the message.
4947 if (DownLink) DownLink->NodeDeleted(N, E);
4950 virtual void NodeUpdated(SDNode *N) {
4951 // Just forward the message.
4952 if (DownLink) DownLink->NodeUpdated(N);
4956 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4957 SDNode::use_iterator &ui,
4958 SDNode::use_iterator &ue)
4959 : DownLink(dl), UI(ui), UE(ue) {}
4964 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4965 /// This can cause recursive merging of nodes in the DAG.
4967 /// This version assumes From has a single result value.
4969 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4970 DAGUpdateListener *UpdateListener) {
4971 SDNode *From = FromN.getNode();
4972 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4973 "Cannot replace with this method!");
4974 assert(From != To.getNode() && "Cannot replace uses of with self");
4976 // Iterate over all the existing uses of From. New uses will be added
4977 // to the beginning of the use list, which we avoid visiting.
4978 // This specifically avoids visiting uses of From that arise while the
4979 // replacement is happening, because any such uses would be the result
4980 // of CSE: If an existing node looks like From after one of its operands
4981 // is replaced by To, we don't want to replace of all its users with To
4982 // too. See PR3018 for more info.
4983 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4984 RAUWUpdateListener Listener(UpdateListener, UI, UE);
4988 // This node is about to morph, remove its old self from the CSE maps.
4989 RemoveNodeFromCSEMaps(User);
4991 // A user can appear in a use list multiple times, and when this
4992 // happens the uses are usually next to each other in the list.
4993 // To help reduce the number of CSE recomputations, process all
4994 // the uses of this user that we can find this way.
4996 SDUse &Use = UI.getUse();
4999 } while (UI != UE && *UI == User);
5001 // Now that we have modified User, add it back to the CSE maps. If it
5002 // already exists there, recursively merge the results together.
5003 AddModifiedNodeToCSEMaps(User, &Listener);
5007 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5008 /// This can cause recursive merging of nodes in the DAG.
5010 /// This version assumes that for each value of From, there is a
5011 /// corresponding value in To in the same position with the same type.
5013 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5014 DAGUpdateListener *UpdateListener) {
5016 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5017 assert((!From->hasAnyUseOfValue(i) ||
5018 From->getValueType(i) == To->getValueType(i)) &&
5019 "Cannot use this version of ReplaceAllUsesWith!");
5022 // Handle the trivial case.
5026 // Iterate over just the existing users of From. See the comments in
5027 // the ReplaceAllUsesWith above.
5028 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5029 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5033 // This node is about to morph, remove its old self from the CSE maps.
5034 RemoveNodeFromCSEMaps(User);
5036 // A user can appear in a use list multiple times, and when this
5037 // happens the uses are usually next to each other in the list.
5038 // To help reduce the number of CSE recomputations, process all
5039 // the uses of this user that we can find this way.
5041 SDUse &Use = UI.getUse();
5044 } while (UI != UE && *UI == User);
5046 // Now that we have modified User, add it back to the CSE maps. If it
5047 // already exists there, recursively merge the results together.
5048 AddModifiedNodeToCSEMaps(User, &Listener);
5052 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5053 /// This can cause recursive merging of nodes in the DAG.
5055 /// This version can replace From with any result values. To must match the
5056 /// number and types of values returned by From.
5057 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5059 DAGUpdateListener *UpdateListener) {
5060 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5061 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5063 // Iterate over just the existing users of From. See the comments in
5064 // the ReplaceAllUsesWith above.
5065 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5066 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5070 // This node is about to morph, remove its old self from the CSE maps.
5071 RemoveNodeFromCSEMaps(User);
5073 // A user can appear in a use list multiple times, and when this
5074 // happens the uses are usually next to each other in the list.
5075 // To help reduce the number of CSE recomputations, process all
5076 // the uses of this user that we can find this way.
5078 SDUse &Use = UI.getUse();
5079 const SDValue &ToOp = To[Use.getResNo()];
5082 } while (UI != UE && *UI == User);
5084 // Now that we have modified User, add it back to the CSE maps. If it
5085 // already exists there, recursively merge the results together.
5086 AddModifiedNodeToCSEMaps(User, &Listener);
5090 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5091 /// uses of other values produced by From.getNode() alone. The Deleted
5092 /// vector is handled the same way as for ReplaceAllUsesWith.
5093 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5094 DAGUpdateListener *UpdateListener){
5095 // Handle the really simple, really trivial case efficiently.
5096 if (From == To) return;
5098 // Handle the simple, trivial, case efficiently.
5099 if (From.getNode()->getNumValues() == 1) {
5100 ReplaceAllUsesWith(From, To, UpdateListener);
5104 // Iterate over just the existing users of From. See the comments in
5105 // the ReplaceAllUsesWith above.
5106 SDNode::use_iterator UI = From.getNode()->use_begin(),
5107 UE = From.getNode()->use_end();
5108 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5111 bool UserRemovedFromCSEMaps = false;
5113 // A user can appear in a use list multiple times, and when this
5114 // happens the uses are usually next to each other in the list.
5115 // To help reduce the number of CSE recomputations, process all
5116 // the uses of this user that we can find this way.
5118 SDUse &Use = UI.getUse();
5120 // Skip uses of different values from the same node.
5121 if (Use.getResNo() != From.getResNo()) {
5126 // If this node hasn't been modified yet, it's still in the CSE maps,
5127 // so remove its old self from the CSE maps.
5128 if (!UserRemovedFromCSEMaps) {
5129 RemoveNodeFromCSEMaps(User);
5130 UserRemovedFromCSEMaps = true;
5135 } while (UI != UE && *UI == User);
5137 // We are iterating over all uses of the From node, so if a use
5138 // doesn't use the specific value, no changes are made.
5139 if (!UserRemovedFromCSEMaps)
5142 // Now that we have modified User, add it back to the CSE maps. If it
5143 // already exists there, recursively merge the results together.
5144 AddModifiedNodeToCSEMaps(User, &Listener);
5149 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5150 /// to record information about a use.
5157 /// operator< - Sort Memos by User.
5158 bool operator<(const UseMemo &L, const UseMemo &R) {
5159 return (intptr_t)L.User < (intptr_t)R.User;
5163 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5164 /// uses of other values produced by From.getNode() alone. The same value
5165 /// may appear in both the From and To list. The Deleted vector is
5166 /// handled the same way as for ReplaceAllUsesWith.
5167 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5170 DAGUpdateListener *UpdateListener){
5171 // Handle the simple, trivial case efficiently.
5173 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5175 // Read up all the uses and make records of them. This helps
5176 // processing new uses that are introduced during the
5177 // replacement process.
5178 SmallVector<UseMemo, 4> Uses;
5179 for (unsigned i = 0; i != Num; ++i) {
5180 unsigned FromResNo = From[i].getResNo();
5181 SDNode *FromNode = From[i].getNode();
5182 for (SDNode::use_iterator UI = FromNode->use_begin(),
5183 E = FromNode->use_end(); UI != E; ++UI) {
5184 SDUse &Use = UI.getUse();
5185 if (Use.getResNo() == FromResNo) {
5186 UseMemo Memo = { *UI, i, &Use };
5187 Uses.push_back(Memo);
5192 // Sort the uses, so that all the uses from a given User are together.
5193 std::sort(Uses.begin(), Uses.end());
5195 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5196 UseIndex != UseIndexEnd; ) {
5197 // We know that this user uses some value of From. If it is the right
5198 // value, update it.
5199 SDNode *User = Uses[UseIndex].User;
5201 // This node is about to morph, remove its old self from the CSE maps.
5202 RemoveNodeFromCSEMaps(User);
5204 // The Uses array is sorted, so all the uses for a given User
5205 // are next to each other in the list.
5206 // To help reduce the number of CSE recomputations, process all
5207 // the uses of this user that we can find this way.
5209 unsigned i = Uses[UseIndex].Index;
5210 SDUse &Use = *Uses[UseIndex].Use;
5214 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5216 // Now that we have modified User, add it back to the CSE maps. If it
5217 // already exists there, recursively merge the results together.
5218 AddModifiedNodeToCSEMaps(User, UpdateListener);
5222 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5223 /// based on their topological order. It returns the maximum id and a vector
5224 /// of the SDNodes* in assigned order by reference.
5225 unsigned SelectionDAG::AssignTopologicalOrder() {
5227 unsigned DAGSize = 0;
5229 // SortedPos tracks the progress of the algorithm. Nodes before it are
5230 // sorted, nodes after it are unsorted. When the algorithm completes
5231 // it is at the end of the list.
5232 allnodes_iterator SortedPos = allnodes_begin();
5234 // Visit all the nodes. Move nodes with no operands to the front of
5235 // the list immediately. Annotate nodes that do have operands with their
5236 // operand count. Before we do this, the Node Id fields of the nodes
5237 // may contain arbitrary values. After, the Node Id fields for nodes
5238 // before SortedPos will contain the topological sort index, and the
5239 // Node Id fields for nodes At SortedPos and after will contain the
5240 // count of outstanding operands.
5241 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5244 unsigned Degree = N->getNumOperands();
5246 // A node with no uses, add it to the result array immediately.
5247 N->setNodeId(DAGSize++);
5248 allnodes_iterator Q = N;
5250 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5251 assert(SortedPos != AllNodes.end() && "Overran node list");
5254 // Temporarily use the Node Id as scratch space for the degree count.
5255 N->setNodeId(Degree);
5259 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5260 // such that by the time the end is reached all nodes will be sorted.
5261 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5264 // N is in sorted position, so all its uses have one less operand
5265 // that needs to be sorted.
5266 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5269 unsigned Degree = P->getNodeId();
5270 assert(Degree != 0 && "Invalid node degree");
5273 // All of P's operands are sorted, so P may sorted now.
5274 P->setNodeId(DAGSize++);
5276 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5277 assert(SortedPos != AllNodes.end() && "Overran node list");
5280 // Update P's outstanding operand count.
5281 P->setNodeId(Degree);
5284 if (I == SortedPos) {
5287 dbgs() << "Overran sorted position:\n";
5290 llvm_unreachable(0);
5294 assert(SortedPos == AllNodes.end() &&
5295 "Topological sort incomplete!");
5296 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5297 "First node in topological sort is not the entry token!");
5298 assert(AllNodes.front().getNodeId() == 0 &&
5299 "First node in topological sort has non-zero id!");
5300 assert(AllNodes.front().getNumOperands() == 0 &&
5301 "First node in topological sort has operands!");
5302 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5303 "Last node in topologic sort has unexpected id!");
5304 assert(AllNodes.back().use_empty() &&
5305 "Last node in topologic sort has users!");
5306 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5310 /// AssignOrdering - Assign an order to the SDNode.
5311 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5312 assert(SD && "Trying to assign an order to a null node!");
5313 Ordering->add(SD, Order);
5316 /// GetOrdering - Get the order for the SDNode.
5317 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5318 assert(SD && "Trying to get the order of a null node!");
5319 return Ordering->getOrder(SD);
5322 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5323 /// value is produced by SD.
5324 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
5325 DbgInfo->add(DB, SD);
5327 SD->setHasDebugValue(true);
5330 //===----------------------------------------------------------------------===//
5332 //===----------------------------------------------------------------------===//
5334 HandleSDNode::~HandleSDNode() {
5338 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5339 EVT VT, int64_t o, unsigned char TF)
5340 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5341 TheGlobal = const_cast<GlobalValue*>(GA);
5344 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5345 MachineMemOperand *mmo)
5346 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5347 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5348 MMO->isNonTemporal());
5349 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5350 assert(isNonTemporal() == MMO->isNonTemporal() &&
5351 "Non-temporal encoding error!");
5352 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5355 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5356 const SDValue *Ops, unsigned NumOps, EVT memvt,
5357 MachineMemOperand *mmo)
5358 : SDNode(Opc, dl, VTs, Ops, NumOps),
5359 MemoryVT(memvt), MMO(mmo) {
5360 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5361 MMO->isNonTemporal());
5362 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5363 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5366 /// Profile - Gather unique data for the node.
5368 void SDNode::Profile(FoldingSetNodeID &ID) const {
5369 AddNodeIDNode(ID, this);
5374 std::vector<EVT> VTs;
5377 VTs.reserve(MVT::LAST_VALUETYPE);
5378 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5379 VTs.push_back(MVT((MVT::SimpleValueType)i));
5384 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5385 static ManagedStatic<EVTArray> SimpleVTArray;
5386 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5388 /// getValueTypeList - Return a pointer to the specified value type.
5390 const EVT *SDNode::getValueTypeList(EVT VT) {
5391 if (VT.isExtended()) {
5392 sys::SmartScopedLock<true> Lock(*VTMutex);
5393 return &(*EVTs->insert(VT).first);
5395 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5399 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5400 /// indicated value. This method ignores uses of other values defined by this
5402 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5403 assert(Value < getNumValues() && "Bad value!");
5405 // TODO: Only iterate over uses of a given value of the node
5406 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5407 if (UI.getUse().getResNo() == Value) {
5414 // Found exactly the right number of uses?
5419 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5420 /// value. This method ignores uses of other values defined by this operation.
5421 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5422 assert(Value < getNumValues() && "Bad value!");
5424 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5425 if (UI.getUse().getResNo() == Value)
5432 /// isOnlyUserOf - Return true if this node is the only use of N.
5434 bool SDNode::isOnlyUserOf(SDNode *N) const {
5436 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5447 /// isOperand - Return true if this node is an operand of N.
5449 bool SDValue::isOperandOf(SDNode *N) const {
5450 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5451 if (*this == N->getOperand(i))
5456 bool SDNode::isOperandOf(SDNode *N) const {
5457 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5458 if (this == N->OperandList[i].getNode())
5463 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5464 /// be a chain) reaches the specified operand without crossing any
5465 /// side-effecting instructions. In practice, this looks through token
5466 /// factors and non-volatile loads. In order to remain efficient, this only
5467 /// looks a couple of nodes in, it does not do an exhaustive search.
5468 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5469 unsigned Depth) const {
5470 if (*this == Dest) return true;
5472 // Don't search too deeply, we just want to be able to see through
5473 // TokenFactor's etc.
5474 if (Depth == 0) return false;
5476 // If this is a token factor, all inputs to the TF happen in parallel. If any
5477 // of the operands of the TF reach dest, then we can do the xform.
5478 if (getOpcode() == ISD::TokenFactor) {
5479 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5480 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5485 // Loads don't have side effects, look through them.
5486 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5487 if (!Ld->isVolatile())
5488 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5493 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5494 /// is either an operand of N or it can be reached by traversing up the operands.
5495 /// NOTE: this is an expensive method. Use it carefully.
5496 bool SDNode::isPredecessorOf(SDNode *N) const {
5497 SmallPtrSet<SDNode *, 32> Visited;
5498 SmallVector<SDNode *, 16> Worklist;
5499 Worklist.push_back(N);
5502 N = Worklist.pop_back_val();
5503 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5504 SDNode *Op = N->getOperand(i).getNode();
5507 if (Visited.insert(Op))
5508 Worklist.push_back(Op);
5510 } while (!Worklist.empty());
5515 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5516 assert(Num < NumOperands && "Invalid child # of SDNode!");
5517 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5520 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5521 switch (getOpcode()) {
5523 if (getOpcode() < ISD::BUILTIN_OP_END)
5524 return "<<Unknown DAG Node>>";
5525 if (isMachineOpcode()) {
5527 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5528 if (getMachineOpcode() < TII->getNumOpcodes())
5529 return TII->get(getMachineOpcode()).getName();
5530 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5533 const TargetLowering &TLI = G->getTargetLoweringInfo();
5534 const char *Name = TLI.getTargetNodeName(getOpcode());
5535 if (Name) return Name;
5536 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5538 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5541 case ISD::DELETED_NODE:
5542 return "<<Deleted Node!>>";
5544 case ISD::PREFETCH: return "Prefetch";
5545 case ISD::MEMBARRIER: return "MemBarrier";
5546 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5547 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5548 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5549 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5550 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5551 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5552 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5553 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5554 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5555 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5556 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5557 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5558 case ISD::PCMARKER: return "PCMarker";
5559 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5560 case ISD::SRCVALUE: return "SrcValue";
5561 case ISD::EntryToken: return "EntryToken";
5562 case ISD::TokenFactor: return "TokenFactor";
5563 case ISD::AssertSext: return "AssertSext";
5564 case ISD::AssertZext: return "AssertZext";
5566 case ISD::BasicBlock: return "BasicBlock";
5567 case ISD::VALUETYPE: return "ValueType";
5568 case ISD::Register: return "Register";
5570 case ISD::Constant: return "Constant";
5571 case ISD::ConstantFP: return "ConstantFP";
5572 case ISD::GlobalAddress: return "GlobalAddress";
5573 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5574 case ISD::FrameIndex: return "FrameIndex";
5575 case ISD::JumpTable: return "JumpTable";
5576 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5577 case ISD::RETURNADDR: return "RETURNADDR";
5578 case ISD::FRAMEADDR: return "FRAMEADDR";
5579 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5580 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5581 case ISD::LSDAADDR: return "LSDAADDR";
5582 case ISD::EHSELECTION: return "EHSELECTION";
5583 case ISD::EH_RETURN: return "EH_RETURN";
5584 case ISD::ConstantPool: return "ConstantPool";
5585 case ISD::ExternalSymbol: return "ExternalSymbol";
5586 case ISD::BlockAddress: return "BlockAddress";
5587 case ISD::INTRINSIC_WO_CHAIN:
5588 case ISD::INTRINSIC_VOID:
5589 case ISD::INTRINSIC_W_CHAIN: {
5590 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5591 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5592 if (IID < Intrinsic::num_intrinsics)
5593 return Intrinsic::getName((Intrinsic::ID)IID);
5594 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5595 return TII->getName(IID);
5596 llvm_unreachable("Invalid intrinsic ID");
5599 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5600 case ISD::TargetConstant: return "TargetConstant";
5601 case ISD::TargetConstantFP:return "TargetConstantFP";
5602 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5603 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5604 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5605 case ISD::TargetJumpTable: return "TargetJumpTable";
5606 case ISD::TargetConstantPool: return "TargetConstantPool";
5607 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5608 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5610 case ISD::CopyToReg: return "CopyToReg";
5611 case ISD::CopyFromReg: return "CopyFromReg";
5612 case ISD::UNDEF: return "undef";
5613 case ISD::MERGE_VALUES: return "merge_values";
5614 case ISD::INLINEASM: return "inlineasm";
5615 case ISD::EH_LABEL: return "eh_label";
5616 case ISD::HANDLENODE: return "handlenode";
5619 case ISD::FABS: return "fabs";
5620 case ISD::FNEG: return "fneg";
5621 case ISD::FSQRT: return "fsqrt";
5622 case ISD::FSIN: return "fsin";
5623 case ISD::FCOS: return "fcos";
5624 case ISD::FPOWI: return "fpowi";
5625 case ISD::FPOW: return "fpow";
5626 case ISD::FTRUNC: return "ftrunc";
5627 case ISD::FFLOOR: return "ffloor";
5628 case ISD::FCEIL: return "fceil";
5629 case ISD::FRINT: return "frint";
5630 case ISD::FNEARBYINT: return "fnearbyint";
5633 case ISD::ADD: return "add";
5634 case ISD::SUB: return "sub";
5635 case ISD::MUL: return "mul";
5636 case ISD::MULHU: return "mulhu";
5637 case ISD::MULHS: return "mulhs";
5638 case ISD::SDIV: return "sdiv";
5639 case ISD::UDIV: return "udiv";
5640 case ISD::SREM: return "srem";
5641 case ISD::UREM: return "urem";
5642 case ISD::SMUL_LOHI: return "smul_lohi";
5643 case ISD::UMUL_LOHI: return "umul_lohi";
5644 case ISD::SDIVREM: return "sdivrem";
5645 case ISD::UDIVREM: return "udivrem";
5646 case ISD::AND: return "and";
5647 case ISD::OR: return "or";
5648 case ISD::XOR: return "xor";
5649 case ISD::SHL: return "shl";
5650 case ISD::SRA: return "sra";
5651 case ISD::SRL: return "srl";
5652 case ISD::ROTL: return "rotl";
5653 case ISD::ROTR: return "rotr";
5654 case ISD::FADD: return "fadd";
5655 case ISD::FSUB: return "fsub";
5656 case ISD::FMUL: return "fmul";
5657 case ISD::FDIV: return "fdiv";
5658 case ISD::FREM: return "frem";
5659 case ISD::FCOPYSIGN: return "fcopysign";
5660 case ISD::FGETSIGN: return "fgetsign";
5662 case ISD::SETCC: return "setcc";
5663 case ISD::VSETCC: return "vsetcc";
5664 case ISD::SELECT: return "select";
5665 case ISD::SELECT_CC: return "select_cc";
5666 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5667 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5668 case ISD::CONCAT_VECTORS: return "concat_vectors";
5669 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5670 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5671 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5672 case ISD::CARRY_FALSE: return "carry_false";
5673 case ISD::ADDC: return "addc";
5674 case ISD::ADDE: return "adde";
5675 case ISD::SADDO: return "saddo";
5676 case ISD::UADDO: return "uaddo";
5677 case ISD::SSUBO: return "ssubo";
5678 case ISD::USUBO: return "usubo";
5679 case ISD::SMULO: return "smulo";
5680 case ISD::UMULO: return "umulo";
5681 case ISD::SUBC: return "subc";
5682 case ISD::SUBE: return "sube";
5683 case ISD::SHL_PARTS: return "shl_parts";
5684 case ISD::SRA_PARTS: return "sra_parts";
5685 case ISD::SRL_PARTS: return "srl_parts";
5687 // Conversion operators.
5688 case ISD::SIGN_EXTEND: return "sign_extend";
5689 case ISD::ZERO_EXTEND: return "zero_extend";
5690 case ISD::ANY_EXTEND: return "any_extend";
5691 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5692 case ISD::TRUNCATE: return "truncate";
5693 case ISD::FP_ROUND: return "fp_round";
5694 case ISD::FLT_ROUNDS_: return "flt_rounds";
5695 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5696 case ISD::FP_EXTEND: return "fp_extend";
5698 case ISD::SINT_TO_FP: return "sint_to_fp";
5699 case ISD::UINT_TO_FP: return "uint_to_fp";
5700 case ISD::FP_TO_SINT: return "fp_to_sint";
5701 case ISD::FP_TO_UINT: return "fp_to_uint";
5702 case ISD::BIT_CONVERT: return "bit_convert";
5703 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5704 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5706 case ISD::CONVERT_RNDSAT: {
5707 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5708 default: llvm_unreachable("Unknown cvt code!");
5709 case ISD::CVT_FF: return "cvt_ff";
5710 case ISD::CVT_FS: return "cvt_fs";
5711 case ISD::CVT_FU: return "cvt_fu";
5712 case ISD::CVT_SF: return "cvt_sf";
5713 case ISD::CVT_UF: return "cvt_uf";
5714 case ISD::CVT_SS: return "cvt_ss";
5715 case ISD::CVT_SU: return "cvt_su";
5716 case ISD::CVT_US: return "cvt_us";
5717 case ISD::CVT_UU: return "cvt_uu";
5721 // Control flow instructions
5722 case ISD::BR: return "br";
5723 case ISD::BRIND: return "brind";
5724 case ISD::BR_JT: return "br_jt";
5725 case ISD::BRCOND: return "brcond";
5726 case ISD::BR_CC: return "br_cc";
5727 case ISD::CALLSEQ_START: return "callseq_start";
5728 case ISD::CALLSEQ_END: return "callseq_end";
5731 case ISD::LOAD: return "load";
5732 case ISD::STORE: return "store";
5733 case ISD::VAARG: return "vaarg";
5734 case ISD::VACOPY: return "vacopy";
5735 case ISD::VAEND: return "vaend";
5736 case ISD::VASTART: return "vastart";
5737 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5738 case ISD::EXTRACT_ELEMENT: return "extract_element";
5739 case ISD::BUILD_PAIR: return "build_pair";
5740 case ISD::STACKSAVE: return "stacksave";
5741 case ISD::STACKRESTORE: return "stackrestore";
5742 case ISD::TRAP: return "trap";
5745 case ISD::BSWAP: return "bswap";
5746 case ISD::CTPOP: return "ctpop";
5747 case ISD::CTTZ: return "cttz";
5748 case ISD::CTLZ: return "ctlz";
5751 case ISD::TRAMPOLINE: return "trampoline";
5754 switch (cast<CondCodeSDNode>(this)->get()) {
5755 default: llvm_unreachable("Unknown setcc condition!");
5756 case ISD::SETOEQ: return "setoeq";
5757 case ISD::SETOGT: return "setogt";
5758 case ISD::SETOGE: return "setoge";
5759 case ISD::SETOLT: return "setolt";
5760 case ISD::SETOLE: return "setole";
5761 case ISD::SETONE: return "setone";
5763 case ISD::SETO: return "seto";
5764 case ISD::SETUO: return "setuo";
5765 case ISD::SETUEQ: return "setue";
5766 case ISD::SETUGT: return "setugt";
5767 case ISD::SETUGE: return "setuge";
5768 case ISD::SETULT: return "setult";
5769 case ISD::SETULE: return "setule";
5770 case ISD::SETUNE: return "setune";
5772 case ISD::SETEQ: return "seteq";
5773 case ISD::SETGT: return "setgt";
5774 case ISD::SETGE: return "setge";
5775 case ISD::SETLT: return "setlt";
5776 case ISD::SETLE: return "setle";
5777 case ISD::SETNE: return "setne";
5782 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5791 return "<post-inc>";
5793 return "<post-dec>";
5797 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5798 std::string S = "< ";
5812 if (getByValAlign())
5813 S += "byval-align:" + utostr(getByValAlign()) + " ";
5815 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5817 S += "byval-size:" + utostr(getByValSize()) + " ";
5821 void SDNode::dump() const { dump(0); }
5822 void SDNode::dump(const SelectionDAG *G) const {
5826 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5827 OS << (void*)this << ": ";
5829 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5831 if (getValueType(i) == MVT::Other)
5834 OS << getValueType(i).getEVTString();
5836 OS << " = " << getOperationName(G);
5839 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5840 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5841 if (!MN->memoperands_empty()) {
5844 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5845 e = MN->memoperands_end(); i != e; ++i) {
5852 } else if (const ShuffleVectorSDNode *SVN =
5853 dyn_cast<ShuffleVectorSDNode>(this)) {
5855 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5856 int Idx = SVN->getMaskElt(i);
5864 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5865 OS << '<' << CSDN->getAPIntValue() << '>';
5866 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5867 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5868 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5869 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5870 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5873 CSDN->getValueAPF().bitcastToAPInt().dump();
5876 } else if (const GlobalAddressSDNode *GADN =
5877 dyn_cast<GlobalAddressSDNode>(this)) {
5878 int64_t offset = GADN->getOffset();
5880 WriteAsOperand(OS, GADN->getGlobal());
5883 OS << " + " << offset;
5885 OS << " " << offset;
5886 if (unsigned int TF = GADN->getTargetFlags())
5887 OS << " [TF=" << TF << ']';
5888 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5889 OS << "<" << FIDN->getIndex() << ">";
5890 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5891 OS << "<" << JTDN->getIndex() << ">";
5892 if (unsigned int TF = JTDN->getTargetFlags())
5893 OS << " [TF=" << TF << ']';
5894 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5895 int offset = CP->getOffset();
5896 if (CP->isMachineConstantPoolEntry())
5897 OS << "<" << *CP->getMachineCPVal() << ">";
5899 OS << "<" << *CP->getConstVal() << ">";
5901 OS << " + " << offset;
5903 OS << " " << offset;
5904 if (unsigned int TF = CP->getTargetFlags())
5905 OS << " [TF=" << TF << ']';
5906 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5908 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5910 OS << LBB->getName() << " ";
5911 OS << (const void*)BBDN->getBasicBlock() << ">";
5912 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5913 if (G && R->getReg() &&
5914 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5915 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5917 OS << " %reg" << R->getReg();
5919 } else if (const ExternalSymbolSDNode *ES =
5920 dyn_cast<ExternalSymbolSDNode>(this)) {
5921 OS << "'" << ES->getSymbol() << "'";
5922 if (unsigned int TF = ES->getTargetFlags())
5923 OS << " [TF=" << TF << ']';
5924 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5926 OS << "<" << M->getValue() << ">";
5929 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5930 OS << ":" << N->getVT().getEVTString();
5932 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5933 OS << "<" << *LD->getMemOperand();
5936 switch (LD->getExtensionType()) {
5937 default: doExt = false; break;
5938 case ISD::EXTLOAD: OS << ", anyext"; break;
5939 case ISD::SEXTLOAD: OS << ", sext"; break;
5940 case ISD::ZEXTLOAD: OS << ", zext"; break;
5943 OS << " from " << LD->getMemoryVT().getEVTString();
5945 const char *AM = getIndexedModeName(LD->getAddressingMode());
5950 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5951 OS << "<" << *ST->getMemOperand();
5953 if (ST->isTruncatingStore())
5954 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5956 const char *AM = getIndexedModeName(ST->getAddressingMode());
5961 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5962 OS << "<" << *M->getMemOperand() << ">";
5963 } else if (const BlockAddressSDNode *BA =
5964 dyn_cast<BlockAddressSDNode>(this)) {
5966 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5968 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5970 if (unsigned int TF = BA->getTargetFlags())
5971 OS << " [TF=" << TF << ']';
5975 if (unsigned Order = G->GetOrdering(this))
5976 OS << " [ORD=" << Order << ']';
5978 if (getNodeId() != -1)
5979 OS << " [ID=" << getNodeId() << ']';
5982 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5984 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5985 if (i) OS << ", "; else OS << " ";
5986 OS << (void*)getOperand(i).getNode();
5987 if (unsigned RN = getOperand(i).getResNo())
5990 print_details(OS, G);
5993 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5994 const SelectionDAG *G, unsigned depth,
6007 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6009 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6013 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6014 unsigned depth) const {
6015 printrWithDepthHelper(OS, this, G, depth, 0);
6018 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6019 // Don't print impossibly deep things.
6020 printrWithDepth(OS, G, 100);
6023 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6024 printrWithDepth(dbgs(), G, depth);
6027 void SDNode::dumprFull(const SelectionDAG *G) const {
6028 // Don't print impossibly deep things.
6029 dumprWithDepth(G, 100);
6032 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6033 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6034 if (N->getOperand(i).getNode()->hasOneUse())
6035 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6037 dbgs() << "\n" << std::string(indent+2, ' ')
6038 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6042 dbgs().indent(indent);
6046 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6047 assert(N->getNumValues() == 1 &&
6048 "Can't unroll a vector with multiple results!");
6050 EVT VT = N->getValueType(0);
6051 unsigned NE = VT.getVectorNumElements();
6052 EVT EltVT = VT.getVectorElementType();
6053 DebugLoc dl = N->getDebugLoc();
6055 SmallVector<SDValue, 8> Scalars;
6056 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6058 // If ResNE is 0, fully unroll the vector op.
6061 else if (NE > ResNE)
6065 for (i= 0; i != NE; ++i) {
6066 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6067 SDValue Operand = N->getOperand(j);
6068 EVT OperandVT = Operand.getValueType();
6069 if (OperandVT.isVector()) {
6070 // A vector operand; extract a single element.
6071 EVT OperandEltVT = OperandVT.getVectorElementType();
6072 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6075 getConstant(i, MVT::i32));
6077 // A scalar operand; just use it as is.
6078 Operands[j] = Operand;
6082 switch (N->getOpcode()) {
6084 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6085 &Operands[0], Operands.size()));
6092 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6093 getShiftAmountOperand(Operands[1])));
6095 case ISD::SIGN_EXTEND_INREG:
6096 case ISD::FP_ROUND_INREG: {
6097 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6098 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6100 getValueType(ExtVT)));
6105 for (; i < ResNE; ++i)
6106 Scalars.push_back(getUNDEF(EltVT));
6108 return getNode(ISD::BUILD_VECTOR, dl,
6109 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6110 &Scalars[0], Scalars.size());
6114 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6115 /// location that is 'Dist' units away from the location that the 'Base' load
6116 /// is loading from.
6117 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6118 unsigned Bytes, int Dist) const {
6119 if (LD->getChain() != Base->getChain())
6121 EVT VT = LD->getValueType(0);
6122 if (VT.getSizeInBits() / 8 != Bytes)
6125 SDValue Loc = LD->getOperand(1);
6126 SDValue BaseLoc = Base->getOperand(1);
6127 if (Loc.getOpcode() == ISD::FrameIndex) {
6128 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6130 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6131 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6132 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6133 int FS = MFI->getObjectSize(FI);
6134 int BFS = MFI->getObjectSize(BFI);
6135 if (FS != BFS || FS != (int)Bytes) return false;
6136 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6138 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6139 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6140 if (V && (V->getSExtValue() == Dist*Bytes))
6144 GlobalValue *GV1 = NULL;
6145 GlobalValue *GV2 = NULL;
6146 int64_t Offset1 = 0;
6147 int64_t Offset2 = 0;
6148 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6149 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6150 if (isGA1 && isGA2 && GV1 == GV2)
6151 return Offset1 == (Offset2 + Dist*Bytes);
6156 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6157 /// it cannot be inferred.
6158 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6159 // If this is a GlobalAddress + cst, return the alignment.
6161 int64_t GVOffset = 0;
6162 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6163 // If GV has specified alignment, then use it. Otherwise, use the preferred
6165 unsigned Align = GV->getAlignment();
6167 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6168 if (GVar->hasInitializer()) {
6169 const TargetData *TD = TLI.getTargetData();
6170 Align = TD->getPreferredAlignment(GVar);
6174 return MinAlign(Align, GVOffset);
6177 // If this is a direct reference to a stack slot, use information about the
6178 // stack slot's alignment.
6179 int FrameIdx = 1 << 31;
6180 int64_t FrameOffset = 0;
6181 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6182 FrameIdx = FI->getIndex();
6183 } else if (Ptr.getOpcode() == ISD::ADD &&
6184 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6185 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6186 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6187 FrameOffset = Ptr.getConstantOperandVal(1);
6190 if (FrameIdx != (1 << 31)) {
6191 // FIXME: Handle FI+CST.
6192 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6193 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6195 if (MFI.isFixedObjectIndex(FrameIdx)) {
6196 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6198 // The alignment of the frame index can be determined from its offset from
6199 // the incoming frame position. If the frame object is at offset 32 and
6200 // the stack is guaranteed to be 16-byte aligned, then we know that the
6201 // object is 16-byte aligned.
6202 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6203 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6205 // Finally, the frame object itself may have a known alignment. Factor
6206 // the alignment + offset into a new alignment. For example, if we know
6207 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6208 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6209 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6210 return std::max(Align, FIInfoAlign);
6218 void SelectionDAG::dump() const {
6219 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6221 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6223 const SDNode *N = I;
6224 if (!N->hasOneUse() && N != getRoot().getNode())
6225 DumpNodes(N, 2, this);
6228 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6233 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6235 print_details(OS, G);
6238 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6239 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6240 const SelectionDAG *G, VisitedSDNodeSet &once) {
6241 if (!once.insert(N)) // If we've been here before, return now.
6244 // Dump the current SDNode, but don't end the line yet.
6245 OS << std::string(indent, ' ');
6248 // Having printed this SDNode, walk the children:
6249 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6250 const SDNode *child = N->getOperand(i).getNode();
6255 if (child->getNumOperands() == 0) {
6256 // This child has no grandchildren; print it inline right here.
6257 child->printr(OS, G);
6259 } else { // Just the address. FIXME: also print the child's opcode.
6261 if (unsigned RN = N->getOperand(i).getResNo())
6268 // Dump children that have grandchildren on their own line(s).
6269 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6270 const SDNode *child = N->getOperand(i).getNode();
6271 DumpNodesr(OS, child, indent+2, G, once);
6275 void SDNode::dumpr() const {
6276 VisitedSDNodeSet once;
6277 DumpNodesr(dbgs(), this, 0, 0, once);
6280 void SDNode::dumpr(const SelectionDAG *G) const {
6281 VisitedSDNodeSet once;
6282 DumpNodesr(dbgs(), this, 0, G, once);
6286 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6287 unsigned GlobalAddressSDNode::getAddressSpace() const {
6288 return getGlobal()->getType()->getAddressSpace();
6292 const Type *ConstantPoolSDNode::getType() const {
6293 if (isMachineConstantPoolEntry())
6294 return Val.MachineCPVal->getType();
6295 return Val.ConstVal->getType();
6298 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6300 unsigned &SplatBitSize,
6302 unsigned MinSplatBits,
6304 EVT VT = getValueType(0);
6305 assert(VT.isVector() && "Expected a vector type");
6306 unsigned sz = VT.getSizeInBits();
6307 if (MinSplatBits > sz)
6310 SplatValue = APInt(sz, 0);
6311 SplatUndef = APInt(sz, 0);
6313 // Get the bits. Bits with undefined values (when the corresponding element
6314 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6315 // in SplatValue. If any of the values are not constant, give up and return
6317 unsigned int nOps = getNumOperands();
6318 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6319 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6321 for (unsigned j = 0; j < nOps; ++j) {
6322 unsigned i = isBigEndian ? nOps-1-j : j;
6323 SDValue OpVal = getOperand(i);
6324 unsigned BitPos = j * EltBitSize;
6326 if (OpVal.getOpcode() == ISD::UNDEF)
6327 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6328 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6329 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6330 zextOrTrunc(sz) << BitPos);
6331 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6332 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6337 // The build_vector is all constants or undefs. Find the smallest element
6338 // size that splats the vector.
6340 HasAnyUndefs = (SplatUndef != 0);
6343 unsigned HalfSize = sz / 2;
6344 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6345 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6346 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6347 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6349 // If the two halves do not match (ignoring undef bits), stop here.
6350 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6351 MinSplatBits > HalfSize)
6354 SplatValue = HighValue | LowValue;
6355 SplatUndef = HighUndef & LowUndef;
6364 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6365 // Find the first non-undef value in the shuffle mask.
6367 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6370 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6372 // Make sure all remaining elements are either undef or the same as the first
6374 for (int Idx = Mask[i]; i != e; ++i)
6375 if (Mask[i] >= 0 && Mask[i] != Idx)
6381 static void checkForCyclesHelper(const SDNode *N,
6382 SmallPtrSet<const SDNode*, 32> &Visited,
6383 SmallPtrSet<const SDNode*, 32> &Checked) {
6384 // If this node has already been checked, don't check it again.
6385 if (Checked.count(N))
6388 // If a node has already been visited on this depth-first walk, reject it as
6390 if (!Visited.insert(N)) {
6391 dbgs() << "Offending node:\n";
6393 errs() << "Detected cycle in SelectionDAG\n";
6397 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6398 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6405 void llvm::checkForCycles(const llvm::SDNode *N) {
6407 assert(N && "Checking nonexistant SDNode");
6408 SmallPtrSet<const SDNode*, 32> visited;
6409 SmallPtrSet<const SDNode*, 32> checked;
6410 checkForCyclesHelper(N, visited, checked);
6414 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6415 checkForCycles(DAG->getRoot().getNode());