1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/Analysis/ValueTracking.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/DebugInfo.h"
30 #include "llvm/IR/CallingConv.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DataLayout.h"
33 #include "llvm/IR/DerivedTypes.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/GlobalAlias.h"
36 #include "llvm/IR/GlobalVariable.h"
37 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/Mutex.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Target/TargetInstrInfo.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetLowering.h"
48 #include "llvm/Target/TargetMachine.h"
49 #include "llvm/Target/TargetOptions.h"
50 #include "llvm/Target/TargetRegisterInfo.h"
51 #include "llvm/Target/TargetSelectionDAGInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 if (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 if (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 unsigned i = 0, e = N->getNumOperands();
155 // Skip over all of the undef values.
156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
159 // Do not accept an all-undef vector.
160 if (i == e) return false;
162 // Do not accept build_vectors that aren't all constants or which have non-0
164 SDValue Zero = N->getOperand(i);
165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
166 if (!CN->isNullValue())
168 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
169 if (!CFPN->getValueAPF().isPosZero())
174 // Okay, we have at least one 0 value, check to see if the rest match or are
176 for (++i; i != e; ++i)
177 if (N->getOperand(i) != Zero &&
178 N->getOperand(i).getOpcode() != ISD::UNDEF)
183 /// isScalarToVector - Return true if the specified node is a
184 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
185 /// element is not an undef.
186 bool ISD::isScalarToVector(const SDNode *N) {
187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
190 if (N->getOpcode() != ISD::BUILD_VECTOR)
192 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
194 unsigned NumElems = N->getNumOperands();
197 for (unsigned i = 1; i < NumElems; ++i) {
198 SDValue V = N->getOperand(i);
199 if (V.getOpcode() != ISD::UNDEF)
205 /// allOperandsUndef - Return true if the node has at least one operand
206 /// and all operands of the specified node are ISD::UNDEF.
207 bool ISD::allOperandsUndef(const SDNode *N) {
208 // Return false if the node has no operands.
209 // This is "logically inconsistent" with the definition of "all" but
210 // is probably the desired behavior.
211 if (N->getNumOperands() == 0)
214 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
215 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
221 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
222 /// when given the operation for (X op Y).
223 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
224 // To perform this operation, we just need to swap the L and G bits of the
226 unsigned OldL = (Operation >> 2) & 1;
227 unsigned OldG = (Operation >> 1) & 1;
228 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
229 (OldL << 1) | // New G bit
230 (OldG << 2)); // New L bit.
233 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
234 /// 'op' is a valid SetCC operation.
235 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
236 unsigned Operation = Op;
238 Operation ^= 7; // Flip L, G, E bits, but not U.
240 Operation ^= 15; // Flip all of the condition bits.
242 if (Operation > ISD::SETTRUE2)
243 Operation &= ~8; // Don't let N and U bits get set.
245 return ISD::CondCode(Operation);
249 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
250 /// signed operation and 2 if the result is an unsigned comparison. Return zero
251 /// if the operation does not depend on the sign of the input (setne and seteq).
252 static int isSignedOp(ISD::CondCode Opcode) {
254 default: llvm_unreachable("Illegal integer setcc operation!");
256 case ISD::SETNE: return 0;
260 case ISD::SETGE: return 1;
264 case ISD::SETUGE: return 2;
268 /// getSetCCOrOperation - Return the result of a logical OR between different
269 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
270 /// returns SETCC_INVALID if it is not possible to represent the resultant
272 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
274 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
275 // Cannot fold a signed integer setcc with an unsigned integer setcc.
276 return ISD::SETCC_INVALID;
278 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
280 // If the N and U bits get set then the resultant comparison DOES suddenly
281 // care about orderedness, and is true when ordered.
282 if (Op > ISD::SETTRUE2)
283 Op &= ~16; // Clear the U bit if the N bit is set.
285 // Canonicalize illegal integer setcc's.
286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
289 return ISD::CondCode(Op);
292 /// getSetCCAndOperation - Return the result of a logical AND between different
293 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
294 /// function returns zero if it is not possible to represent the resultant
296 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
299 // Cannot fold a signed setcc with an unsigned setcc.
300 return ISD::SETCC_INVALID;
302 // Combine all of the condition bits.
303 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
305 // Canonicalize illegal integer setcc's.
309 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
310 case ISD::SETOEQ: // SETEQ & SETU[LG]E
311 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
312 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
313 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
320 //===----------------------------------------------------------------------===//
321 // SDNode Profile Support
322 //===----------------------------------------------------------------------===//
324 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
326 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
330 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
331 /// solely with their pointer.
332 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
333 ID.AddPointer(VTList.VTs);
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDValue *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDUse *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 static void AddNodeIDNode(FoldingSetNodeID &ID,
357 unsigned short OpC, SDVTList VTList,
358 const SDValue *OpList, unsigned N) {
359 AddNodeIDOpcode(ID, OpC);
360 AddNodeIDValueTypes(ID, VTList);
361 AddNodeIDOperands(ID, OpList, N);
364 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
366 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
367 switch (N->getOpcode()) {
368 case ISD::TargetExternalSymbol:
369 case ISD::ExternalSymbol:
370 llvm_unreachable("Should only be used on nodes with operands");
371 default: break; // Normal nodes don't need extra info.
372 case ISD::TargetConstant:
374 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
376 case ISD::TargetConstantFP:
377 case ISD::ConstantFP: {
378 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
381 case ISD::TargetGlobalAddress:
382 case ISD::GlobalAddress:
383 case ISD::TargetGlobalTLSAddress:
384 case ISD::GlobalTLSAddress: {
385 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
386 ID.AddPointer(GA->getGlobal());
387 ID.AddInteger(GA->getOffset());
388 ID.AddInteger(GA->getTargetFlags());
389 ID.AddInteger(GA->getAddressSpace());
392 case ISD::BasicBlock:
393 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
396 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
398 case ISD::RegisterMask:
399 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
422 ID.AddInteger(CP->getTargetFlags());
425 case ISD::TargetIndex: {
426 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
427 ID.AddInteger(TI->getIndex());
428 ID.AddInteger(TI->getOffset());
429 ID.AddInteger(TI->getTargetFlags());
433 const LoadSDNode *LD = cast<LoadSDNode>(N);
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawSubclassData());
436 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
440 const StoreSDNode *ST = cast<StoreSDNode>(N);
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawSubclassData());
443 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX:
458 case ISD::ATOMIC_LOAD:
459 case ISD::ATOMIC_STORE: {
460 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
461 ID.AddInteger(AT->getMemoryVT().getRawBits());
462 ID.AddInteger(AT->getRawSubclassData());
463 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
466 case ISD::PREFETCH: {
467 const MemSDNode *PF = cast<MemSDNode>(N);
468 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
471 case ISD::VECTOR_SHUFFLE: {
472 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
475 ID.AddInteger(SVN->getMaskElt(i));
478 case ISD::TargetBlockAddress:
479 case ISD::BlockAddress: {
480 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
481 ID.AddPointer(BA->getBlockAddress());
482 ID.AddInteger(BA->getOffset());
483 ID.AddInteger(BA->getTargetFlags());
486 } // end switch (N->getOpcode())
488 // Target specific memory nodes could also have address spaces to check.
489 if (N->isTargetMemoryOpcode())
490 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
493 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
495 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
496 AddNodeIDOpcode(ID, N->getOpcode());
497 // Add the return value info.
498 AddNodeIDValueTypes(ID, N->getVTList());
499 // Add the operand info.
500 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
502 // Handle SDNode leafs with special info.
503 AddNodeIDCustom(ID, N);
506 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
507 /// the CSE map that carries volatility, temporalness, indexing mode, and
508 /// extension/truncation information.
510 static inline unsigned
511 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
512 bool isNonTemporal, bool isInvariant) {
513 assert((ConvType & 3) == ConvType &&
514 "ConvType may not require more than 2 bits!");
515 assert((AM & 7) == AM &&
516 "AM may not require more than 3 bits!");
520 (isNonTemporal << 6) |
524 //===----------------------------------------------------------------------===//
525 // SelectionDAG Class
526 //===----------------------------------------------------------------------===//
528 /// doNotCSE - Return true if CSE should not be performed for this node.
529 static bool doNotCSE(SDNode *N) {
530 if (N->getValueType(0) == MVT::Glue)
531 return true; // Never CSE anything that produces a flag.
533 switch (N->getOpcode()) {
535 case ISD::HANDLENODE:
537 return true; // Never CSE these nodes.
540 // Check that remaining values produced are not flags.
541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
542 if (N->getValueType(i) == MVT::Glue)
543 return true; // Never CSE anything that produces a flag.
548 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
550 void SelectionDAG::RemoveDeadNodes() {
551 // Create a dummy node (which is not added to allnodes), that adds a reference
552 // to the root node, preventing it from being deleted.
553 HandleSDNode Dummy(getRoot());
555 SmallVector<SDNode*, 128> DeadNodes;
557 // Add all obviously-dead nodes to the DeadNodes worklist.
558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
560 DeadNodes.push_back(I);
562 RemoveDeadNodes(DeadNodes);
564 // If the root changed (e.g. it was a dead load, update the root).
565 setRoot(Dummy.getValue());
568 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
569 /// given list, and any nodes that become unreachable as a result.
570 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
572 // Process the worklist, deleting the nodes and adding their uses to the
574 while (!DeadNodes.empty()) {
575 SDNode *N = DeadNodes.pop_back_val();
577 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
578 DUL->NodeDeleted(N, 0);
580 // Take the node out of the appropriate CSE map.
581 RemoveNodeFromCSEMaps(N);
583 // Next, brutally remove the operand list. This is safe to do, as there are
584 // no cycles in the graph.
585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
587 SDNode *Operand = Use.getNode();
590 // Now that we removed this operand, see if there are no uses of it left.
591 if (Operand->use_empty())
592 DeadNodes.push_back(Operand);
599 void SelectionDAG::RemoveDeadNode(SDNode *N){
600 SmallVector<SDNode*, 16> DeadNodes(1, N);
602 // Create a dummy node that adds a reference to the root node, preventing
603 // it from being deleted. (This matters if the root is an operand of the
605 HandleSDNode Dummy(getRoot());
607 RemoveDeadNodes(DeadNodes);
610 void SelectionDAG::DeleteNode(SDNode *N) {
611 // First take this out of the appropriate CSE map.
612 RemoveNodeFromCSEMaps(N);
614 // Finally, remove uses due to operands of this node, remove from the
615 // AllNodes list, and delete the node.
616 DeleteNodeNotInCSEMaps(N);
619 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
620 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
621 assert(N->use_empty() && "Cannot delete a node that is not dead!");
623 // Drop all of the operands and decrement used node's use counts.
629 void SelectionDAG::DeallocateNode(SDNode *N) {
630 if (N->OperandsNeedDelete)
631 delete[] N->OperandList;
633 // Set the opcode to DELETED_NODE to help catch bugs when node
634 // memory is reallocated.
635 N->NodeType = ISD::DELETED_NODE;
637 NodeAllocator.Deallocate(AllNodes.remove(N));
639 // Remove the ordering of this node.
642 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
643 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
644 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
645 DbgVals[i]->setIsInvalidated();
648 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
649 /// correspond to it. This is useful when we're about to delete or repurpose
650 /// the node. We don't want future request for structurally identical nodes
651 /// to return N anymore.
652 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
654 switch (N->getOpcode()) {
655 case ISD::HANDLENODE: return false; // noop.
657 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
658 "Cond code doesn't exist!");
659 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
660 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
662 case ISD::ExternalSymbol:
663 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
665 case ISD::TargetExternalSymbol: {
666 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
667 Erased = TargetExternalSymbols.erase(
668 std::pair<std::string,unsigned char>(ESN->getSymbol(),
669 ESN->getTargetFlags()));
672 case ISD::VALUETYPE: {
673 EVT VT = cast<VTSDNode>(N)->getVT();
674 if (VT.isExtended()) {
675 Erased = ExtendedValueTypeNodes.erase(VT);
677 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
678 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
683 // Remove it from the CSE Map.
684 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
685 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
686 Erased = CSEMap.RemoveNode(N);
690 // Verify that the node was actually in one of the CSE maps, unless it has a
691 // flag result (which cannot be CSE'd) or is one of the special cases that are
692 // not subject to CSE.
693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
694 !N->isMachineOpcode() && !doNotCSE(N)) {
697 llvm_unreachable("Node is not in map!");
703 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
704 /// maps and modified in place. Add it back to the CSE maps, unless an identical
705 /// node already exists, in which case transfer all its users to the existing
706 /// node. This transfer can potentially trigger recursive merging.
709 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
710 // For node types that aren't CSE'd, just act as if no identical node
713 SDNode *Existing = CSEMap.GetOrInsertNode(N);
715 // If there was already an existing matching node, use ReplaceAllUsesWith
716 // to replace the dead one with the existing one. This can cause
717 // recursive merging of other unrelated nodes down the line.
718 ReplaceAllUsesWith(N, Existing);
720 // N is now dead. Inform the listeners and delete it.
721 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
722 DUL->NodeDeleted(N, Existing);
723 DeleteNodeNotInCSEMaps(N);
728 // If the node doesn't already exist, we updated it. Inform listeners.
729 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
733 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
734 /// were replaced with those specified. If this node is never memoized,
735 /// return null, otherwise return a pointer to the slot it would take. If a
736 /// node already exists with these operands, the slot will be non-null.
737 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
742 SDValue Ops[] = { Op };
744 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
745 AddNodeIDCustom(ID, N);
746 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
750 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
751 /// were replaced with those specified. If this node is never memoized,
752 /// return null, otherwise return a pointer to the slot it would take. If a
753 /// node already exists with these operands, the slot will be non-null.
754 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
755 SDValue Op1, SDValue Op2,
760 SDValue Ops[] = { Op1, Op2 };
762 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
763 AddNodeIDCustom(ID, N);
764 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
769 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
770 /// were replaced with those specified. If this node is never memoized,
771 /// return null, otherwise return a pointer to the slot it would take. If a
772 /// node already exists with these operands, the slot will be non-null.
773 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
774 const SDValue *Ops,unsigned NumOps,
780 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
781 AddNodeIDCustom(ID, N);
782 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
787 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
788 static void VerifyNodeCommon(SDNode *N) {
789 switch (N->getOpcode()) {
792 case ISD::BUILD_PAIR: {
793 EVT VT = N->getValueType(0);
794 assert(N->getNumValues() == 1 && "Too many results!");
795 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
796 "Wrong return type!");
797 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
799 "Mismatched operand types!");
800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
801 "Wrong operand type!");
802 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
803 "Wrong return type size");
806 case ISD::BUILD_VECTOR: {
807 assert(N->getNumValues() == 1 && "Too many results!");
808 assert(N->getValueType(0).isVector() && "Wrong return type!");
809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
810 "Wrong number of operands!");
811 EVT EltVT = N->getValueType(0).getVectorElementType();
812 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
813 assert((I->getValueType() == EltVT ||
814 (EltVT.isInteger() && I->getValueType().isInteger() &&
815 EltVT.bitsLE(I->getValueType()))) &&
816 "Wrong operand type!");
817 assert(I->getValueType() == N->getOperand(0).getValueType() &&
818 "Operands must all have the same type");
825 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
826 static void VerifySDNode(SDNode *N) {
827 // The SDNode allocators cannot be used to allocate nodes with fields that are
828 // not present in an SDNode!
829 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
830 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
831 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
832 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
833 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
834 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
835 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
836 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
837 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
838 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
839 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
840 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
841 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
842 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
843 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
844 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
845 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
846 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
847 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
852 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
854 static void VerifyMachineNode(SDNode *N) {
855 // The MachineNode allocators cannot be used to allocate nodes with fields
856 // that are not present in a MachineNode!
857 // Currently there are no such nodes.
863 /// getEVTAlignment - Compute the default alignment value for the
866 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
867 Type *Ty = VT == MVT::iPTR ?
868 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
869 VT.getTypeForEVT(*getContext());
871 return TLI.getDataLayout()->getABITypeAlignment(Ty);
874 // EntryNode could meaningfully have debug info if we can find it...
875 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
876 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
877 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(),
878 getVTList(MVT::Other)),
879 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
880 AllNodes.push_back(&EntryNode);
881 Ordering = new SDNodeOrdering();
882 DbgInfo = new SDDbgInfo();
885 void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) {
888 Context = &mf.getFunction()->getContext();
891 SelectionDAG::~SelectionDAG() {
892 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
898 void SelectionDAG::allnodes_clear() {
899 assert(&*AllNodes.begin() == &EntryNode);
900 AllNodes.remove(AllNodes.begin());
901 while (!AllNodes.empty())
902 DeallocateNode(AllNodes.begin());
905 void SelectionDAG::clear() {
907 OperandAllocator.Reset();
910 ExtendedValueTypeNodes.clear();
911 ExternalSymbols.clear();
912 TargetExternalSymbols.clear();
913 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
914 static_cast<CondCodeSDNode*>(0));
915 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
916 static_cast<SDNode*>(0));
918 EntryNode.UseList = 0;
919 AllNodes.push_back(&EntryNode);
920 Root = getEntryNode();
925 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
926 return VT.bitsGT(Op.getValueType()) ?
927 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
928 getNode(ISD::TRUNCATE, DL, VT, Op);
931 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
932 return VT.bitsGT(Op.getValueType()) ?
933 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
934 getNode(ISD::TRUNCATE, DL, VT, Op);
937 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
938 return VT.bitsGT(Op.getValueType()) ?
939 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
940 getNode(ISD::TRUNCATE, DL, VT, Op);
943 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
944 assert(!VT.isVector() &&
945 "getZeroExtendInReg should use the vector element type instead of "
947 if (Op.getValueType() == VT) return Op;
948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
949 APInt Imm = APInt::getLowBitsSet(BitWidth,
951 return getNode(ISD::AND, DL, Op.getValueType(), Op,
952 getConstant(Imm, Op.getValueType()));
955 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
957 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
958 EVT EltVT = VT.getScalarType();
960 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
961 return getNode(ISD::XOR, DL, VT, Val, NegOne);
964 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
965 EVT EltVT = VT.getScalarType();
966 assert((EltVT.getSizeInBits() >= 64 ||
967 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
968 "getConstant with a uint64_t value that doesn't fit in the type!");
969 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
972 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
973 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
976 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
977 assert(VT.isInteger() && "Cannot create FP integer constant!");
979 EVT EltVT = VT.getScalarType();
980 const ConstantInt *Elt = &Val;
982 // In some cases the vector type is legal but the element type is illegal and
983 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
984 // inserted value (the type does not need to match the vector element type).
985 // Any extra bits introduced will be truncated away.
986 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
987 TargetLowering::TypePromoteInteger) {
988 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
989 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
990 Elt = ConstantInt::get(*getContext(), NewVal);
993 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
994 "APInt size does not match type size!");
995 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
997 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1001 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1003 return SDValue(N, 0);
1006 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1007 CSEMap.InsertNode(N, IP);
1008 AllNodes.push_back(N);
1011 SDValue Result(N, 0);
1012 if (VT.isVector()) {
1013 SmallVector<SDValue, 8> Ops;
1014 Ops.assign(VT.getVectorNumElements(), Result);
1015 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1020 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1021 return getConstant(Val, TLI.getPointerTy(), isTarget);
1025 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1026 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1029 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1030 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1032 EVT EltVT = VT.getScalarType();
1034 // Do the map lookup using the actual bit pattern for the floating point
1035 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1036 // we don't have issues with SNANs.
1037 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1038 FoldingSetNodeID ID;
1039 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1043 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1045 return SDValue(N, 0);
1048 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1049 CSEMap.InsertNode(N, IP);
1050 AllNodes.push_back(N);
1053 SDValue Result(N, 0);
1054 if (VT.isVector()) {
1055 SmallVector<SDValue, 8> Ops;
1056 Ops.assign(VT.getVectorNumElements(), Result);
1057 // FIXME DebugLoc info might be appropriate here
1058 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1063 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1064 EVT EltVT = VT.getScalarType();
1065 if (EltVT==MVT::f32)
1066 return getConstantFP(APFloat((float)Val), VT, isTarget);
1067 else if (EltVT==MVT::f64)
1068 return getConstantFP(APFloat(Val), VT, isTarget);
1069 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1072 APFloat apf = APFloat(Val);
1073 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1075 return getConstantFP(apf, VT, isTarget);
1077 llvm_unreachable("Unsupported type in getConstantFP");
1080 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1081 EVT VT, int64_t Offset,
1083 unsigned char TargetFlags) {
1084 assert((TargetFlags == 0 || isTargetGA) &&
1085 "Cannot set target flags on target-independent globals");
1087 // Truncate (with sign-extension) the offset value to the pointer size.
1088 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1090 Offset = SignExtend64(Offset, BitWidth);
1092 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1094 // If GV is an alias then use the aliasee for determining thread-localness.
1095 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1096 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1100 if (GVar && GVar->isThreadLocal())
1101 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1103 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1108 ID.AddInteger(Offset);
1109 ID.AddInteger(TargetFlags);
1110 ID.AddInteger(GV->getType()->getAddressSpace());
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1116 Offset, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1123 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1124 FoldingSetNodeID ID;
1125 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1129 return SDValue(E, 0);
1131 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1132 CSEMap.InsertNode(N, IP);
1133 AllNodes.push_back(N);
1134 return SDValue(N, 0);
1137 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1138 unsigned char TargetFlags) {
1139 assert((TargetFlags == 0 || isTarget) &&
1140 "Cannot set target flags on target-independent jump tables");
1141 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1142 FoldingSetNodeID ID;
1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1145 ID.AddInteger(TargetFlags);
1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1148 return SDValue(E, 0);
1150 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1152 CSEMap.InsertNode(N, IP);
1153 AllNodes.push_back(N);
1154 return SDValue(N, 0);
1157 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1158 unsigned Alignment, int Offset,
1160 unsigned char TargetFlags) {
1161 assert((TargetFlags == 0 || isTarget) &&
1162 "Cannot set target flags on target-independent globals");
1164 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1165 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1166 FoldingSetNodeID ID;
1167 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1168 ID.AddInteger(Alignment);
1169 ID.AddInteger(Offset);
1171 ID.AddInteger(TargetFlags);
1173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1174 return SDValue(E, 0);
1176 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1177 Alignment, TargetFlags);
1178 CSEMap.InsertNode(N, IP);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1184 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1185 unsigned Alignment, int Offset,
1187 unsigned char TargetFlags) {
1188 assert((TargetFlags == 0 || isTarget) &&
1189 "Cannot set target flags on target-independent globals");
1191 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1192 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1193 FoldingSetNodeID ID;
1194 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1195 ID.AddInteger(Alignment);
1196 ID.AddInteger(Offset);
1197 C->addSelectionDAGCSEId(ID);
1198 ID.AddInteger(TargetFlags);
1200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1201 return SDValue(E, 0);
1203 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1204 Alignment, TargetFlags);
1205 CSEMap.InsertNode(N, IP);
1206 AllNodes.push_back(N);
1207 return SDValue(N, 0);
1210 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1211 unsigned char TargetFlags) {
1212 FoldingSetNodeID ID;
1213 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1214 ID.AddInteger(Index);
1215 ID.AddInteger(Offset);
1216 ID.AddInteger(TargetFlags);
1218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1219 return SDValue(E, 0);
1221 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1223 CSEMap.InsertNode(N, IP);
1224 AllNodes.push_back(N);
1225 return SDValue(N, 0);
1228 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1229 FoldingSetNodeID ID;
1230 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1233 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1234 return SDValue(E, 0);
1236 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1237 CSEMap.InsertNode(N, IP);
1238 AllNodes.push_back(N);
1239 return SDValue(N, 0);
1242 SDValue SelectionDAG::getValueType(EVT VT) {
1243 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1244 ValueTypeNodes.size())
1245 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1247 SDNode *&N = VT.isExtended() ?
1248 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1250 if (N) return SDValue(N, 0);
1251 N = new (NodeAllocator) VTSDNode(VT);
1252 AllNodes.push_back(N);
1253 return SDValue(N, 0);
1256 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1257 SDNode *&N = ExternalSymbols[Sym];
1258 if (N) return SDValue(N, 0);
1259 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1260 AllNodes.push_back(N);
1261 return SDValue(N, 0);
1264 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1265 unsigned char TargetFlags) {
1267 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1269 if (N) return SDValue(N, 0);
1270 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1271 AllNodes.push_back(N);
1272 return SDValue(N, 0);
1275 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1276 if ((unsigned)Cond >= CondCodeNodes.size())
1277 CondCodeNodes.resize(Cond+1);
1279 if (CondCodeNodes[Cond] == 0) {
1280 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1281 CondCodeNodes[Cond] = N;
1282 AllNodes.push_back(N);
1285 return SDValue(CondCodeNodes[Cond], 0);
1288 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1289 // the shuffle mask M that point at N1 to point at N2, and indices that point
1290 // N2 to point at N1.
1291 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1293 int NElts = M.size();
1294 for (int i = 0; i != NElts; ++i) {
1302 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1303 SDValue N2, const int *Mask) {
1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1305 assert(VT.isVector() && N1.getValueType().isVector() &&
1306 "Vector Shuffle VTs must be a vectors");
1307 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1308 && "Vector Shuffle VTs must have same element type");
1310 // Canonicalize shuffle undef, undef -> undef
1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1312 return getUNDEF(VT);
1314 // Validate that all indices in Mask are within the range of the elements
1315 // input to the shuffle.
1316 unsigned NElts = VT.getVectorNumElements();
1317 SmallVector<int, 8> MaskVec;
1318 for (unsigned i = 0; i != NElts; ++i) {
1319 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1320 MaskVec.push_back(Mask[i]);
1323 // Canonicalize shuffle v, v -> v, undef
1326 for (unsigned i = 0; i != NElts; ++i)
1327 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1330 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1331 if (N1.getOpcode() == ISD::UNDEF)
1332 commuteShuffle(N1, N2, MaskVec);
1334 // Canonicalize all index into lhs, -> shuffle lhs, undef
1335 // Canonicalize all index into rhs, -> shuffle rhs, undef
1336 bool AllLHS = true, AllRHS = true;
1337 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1338 for (unsigned i = 0; i != NElts; ++i) {
1339 if (MaskVec[i] >= (int)NElts) {
1344 } else if (MaskVec[i] >= 0) {
1348 if (AllLHS && AllRHS)
1349 return getUNDEF(VT);
1350 if (AllLHS && !N2Undef)
1354 commuteShuffle(N1, N2, MaskVec);
1357 // If Identity shuffle, or all shuffle in to undef, return that node.
1358 bool AllUndef = true;
1359 bool Identity = true;
1360 for (unsigned i = 0; i != NElts; ++i) {
1361 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1362 if (MaskVec[i] >= 0) AllUndef = false;
1364 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1367 return getUNDEF(VT);
1369 FoldingSetNodeID ID;
1370 SDValue Ops[2] = { N1, N2 };
1371 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1372 for (unsigned i = 0; i != NElts; ++i)
1373 ID.AddInteger(MaskVec[i]);
1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1377 return SDValue(E, 0);
1379 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1380 // SDNode doesn't have access to it. This memory will be "leaked" when
1381 // the node is deallocated, but recovered when the NodeAllocator is released.
1382 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1383 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1385 ShuffleVectorSDNode *N =
1386 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1387 CSEMap.InsertNode(N, IP);
1388 AllNodes.push_back(N);
1389 return SDValue(N, 0);
1392 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1393 SDValue Val, SDValue DTy,
1394 SDValue STy, SDValue Rnd, SDValue Sat,
1395 ISD::CvtCode Code) {
1396 // If the src and dest types are the same and the conversion is between
1397 // integer types of the same sign or two floats, no conversion is necessary.
1399 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1402 FoldingSetNodeID ID;
1403 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1404 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1407 return SDValue(E, 0);
1409 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1416 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1417 FoldingSetNodeID ID;
1418 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1419 ID.AddInteger(RegNo);
1421 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1422 return SDValue(E, 0);
1424 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1425 CSEMap.InsertNode(N, IP);
1426 AllNodes.push_back(N);
1427 return SDValue(N, 0);
1430 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1431 FoldingSetNodeID ID;
1432 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1433 ID.AddPointer(RegMask);
1435 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1436 return SDValue(E, 0);
1438 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1439 CSEMap.InsertNode(N, IP);
1440 AllNodes.push_back(N);
1441 return SDValue(N, 0);
1444 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1445 FoldingSetNodeID ID;
1446 SDValue Ops[] = { Root };
1447 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1448 ID.AddPointer(Label);
1450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1451 return SDValue(E, 0);
1453 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1454 CSEMap.InsertNode(N, IP);
1455 AllNodes.push_back(N);
1456 return SDValue(N, 0);
1460 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1463 unsigned char TargetFlags) {
1464 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1466 FoldingSetNodeID ID;
1467 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1469 ID.AddInteger(Offset);
1470 ID.AddInteger(TargetFlags);
1472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1473 return SDValue(E, 0);
1475 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1477 CSEMap.InsertNode(N, IP);
1478 AllNodes.push_back(N);
1479 return SDValue(N, 0);
1482 SDValue SelectionDAG::getSrcValue(const Value *V) {
1483 assert((!V || V->getType()->isPointerTy()) &&
1484 "SrcValue is not a pointer?");
1486 FoldingSetNodeID ID;
1487 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1492 return SDValue(E, 0);
1494 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1495 CSEMap.InsertNode(N, IP);
1496 AllNodes.push_back(N);
1497 return SDValue(N, 0);
1500 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1501 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1502 FoldingSetNodeID ID;
1503 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1508 return SDValue(E, 0);
1510 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1511 CSEMap.InsertNode(N, IP);
1512 AllNodes.push_back(N);
1513 return SDValue(N, 0);
1517 /// getShiftAmountOperand - Return the specified value casted to
1518 /// the target's desired shift amount type.
1519 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1520 EVT OpTy = Op.getValueType();
1521 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1522 if (OpTy == ShTy || OpTy.isVector()) return Op;
1524 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1525 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1528 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1529 /// specified value type.
1530 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1531 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1532 unsigned ByteSize = VT.getStoreSize();
1533 Type *Ty = VT.getTypeForEVT(*getContext());
1534 unsigned StackAlign =
1535 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1537 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1538 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1541 /// CreateStackTemporary - Create a stack temporary suitable for holding
1542 /// either of the specified value types.
1543 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1544 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1545 VT2.getStoreSizeInBits())/8;
1546 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1547 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1548 const DataLayout *TD = TLI.getDataLayout();
1549 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1550 TD->getPrefTypeAlignment(Ty2));
1552 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1553 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1554 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1557 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1558 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1559 // These setcc operations always fold.
1563 case ISD::SETFALSE2: return getConstant(0, VT);
1565 case ISD::SETTRUE2: return getConstant(1, VT);
1577 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1581 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1582 const APInt &C2 = N2C->getAPIntValue();
1583 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1584 const APInt &C1 = N1C->getAPIntValue();
1587 default: llvm_unreachable("Unknown integer setcc!");
1588 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1589 case ISD::SETNE: return getConstant(C1 != C2, VT);
1590 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1591 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1592 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1593 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1594 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1595 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1596 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1597 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1601 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1602 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1603 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1606 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1607 return getUNDEF(VT);
1609 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1610 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1611 return getUNDEF(VT);
1613 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1614 R==APFloat::cmpLessThan, VT);
1615 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1616 return getUNDEF(VT);
1618 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1619 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1620 return getUNDEF(VT);
1622 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1623 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1624 return getUNDEF(VT);
1626 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1627 R==APFloat::cmpEqual, VT);
1628 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1629 return getUNDEF(VT);
1631 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1632 R==APFloat::cmpEqual, VT);
1633 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1634 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1635 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1636 R==APFloat::cmpEqual, VT);
1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1638 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1639 R==APFloat::cmpLessThan, VT);
1640 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1641 R==APFloat::cmpUnordered, VT);
1642 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1643 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1646 // Ensure that the constant occurs on the RHS.
1647 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1651 // Could not fold it.
1655 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1656 /// use this predicate to simplify operations downstream.
1657 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1658 // This predicate is not safe for vector operations.
1659 if (Op.getValueType().isVector())
1662 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1663 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1666 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1667 /// this predicate to simplify operations downstream. Mask is known to be zero
1668 /// for bits that V cannot have.
1669 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1670 unsigned Depth) const {
1671 APInt KnownZero, KnownOne;
1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1674 return (KnownZero & Mask) == Mask;
1677 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1678 /// known to be either zero or one and return them in the KnownZero/KnownOne
1679 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1681 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1682 APInt &KnownOne, unsigned Depth) const {
1683 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1687 return; // Limit search depth.
1689 APInt KnownZero2, KnownOne2;
1691 switch (Op.getOpcode()) {
1693 // We know all of the bits for a constant!
1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1695 KnownZero = ~KnownOne;
1698 // If either the LHS or the RHS are Zero, the result is zero.
1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1700 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1702 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1704 // Output known-1 bits are only known if set in both the LHS & RHS.
1705 KnownOne &= KnownOne2;
1706 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1707 KnownZero |= KnownZero2;
1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1715 // Output known-0 bits are only known if clear in both the LHS & RHS.
1716 KnownZero &= KnownZero2;
1717 // Output known-1 are known to be set if set in either the LHS | RHS.
1718 KnownOne |= KnownOne2;
1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1726 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1727 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1728 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1729 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1730 KnownZero = KnownZeroOut;
1734 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1735 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1739 // If low bits are zero in either operand, output low known-0 bits.
1740 // Also compute a conserative estimate for high known-0 bits.
1741 // More trickiness is possible, but this is sufficient for the
1742 // interesting case of alignment computation.
1743 KnownOne.clearAllBits();
1744 unsigned TrailZ = KnownZero.countTrailingOnes() +
1745 KnownZero2.countTrailingOnes();
1746 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1747 KnownZero2.countLeadingOnes(),
1748 BitWidth) - BitWidth;
1750 TrailZ = std::min(TrailZ, BitWidth);
1751 LeadZ = std::min(LeadZ, BitWidth);
1752 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1753 APInt::getHighBitsSet(BitWidth, LeadZ);
1757 // For the purposes of computing leading zeros we can conservatively
1758 // treat a udiv as a logical right shift by the power of 2 known to
1759 // be less than the denominator.
1760 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1761 unsigned LeadZ = KnownZero2.countLeadingOnes();
1763 KnownOne2.clearAllBits();
1764 KnownZero2.clearAllBits();
1765 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1766 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1767 if (RHSUnknownLeadingOnes != BitWidth)
1768 LeadZ = std::min(BitWidth,
1769 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1771 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1775 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1780 // Only known if known in both the LHS and RHS.
1781 KnownOne &= KnownOne2;
1782 KnownZero &= KnownZero2;
1784 case ISD::SELECT_CC:
1785 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1786 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1787 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1790 // Only known if known in both the LHS and RHS.
1791 KnownOne &= KnownOne2;
1792 KnownZero &= KnownZero2;
1800 if (Op.getResNo() != 1)
1802 // The boolean result conforms to getBooleanContents. Fall through.
1804 // If we know the result of a setcc has the top bits zero, use this info.
1805 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1806 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1810 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1811 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1812 unsigned ShAmt = SA->getZExtValue();
1814 // If the shift count is an invalid immediate, don't do anything.
1815 if (ShAmt >= BitWidth)
1818 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1819 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1820 KnownZero <<= ShAmt;
1822 // low bits known zero.
1823 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1827 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1828 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1829 unsigned ShAmt = SA->getZExtValue();
1831 // If the shift count is an invalid immediate, don't do anything.
1832 if (ShAmt >= BitWidth)
1835 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1837 KnownZero = KnownZero.lshr(ShAmt);
1838 KnownOne = KnownOne.lshr(ShAmt);
1840 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1841 KnownZero |= HighBits; // High bits known zero.
1845 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1846 unsigned ShAmt = SA->getZExtValue();
1848 // If the shift count is an invalid immediate, don't do anything.
1849 if (ShAmt >= BitWidth)
1852 // If any of the demanded bits are produced by the sign extension, we also
1853 // demand the input sign bit.
1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1856 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 KnownZero = KnownZero.lshr(ShAmt);
1859 KnownOne = KnownOne.lshr(ShAmt);
1861 // Handle the sign bits.
1862 APInt SignBit = APInt::getSignBit(BitWidth);
1863 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1865 if (KnownZero.intersects(SignBit)) {
1866 KnownZero |= HighBits; // New bits are known zero.
1867 } else if (KnownOne.intersects(SignBit)) {
1868 KnownOne |= HighBits; // New bits are known one.
1872 case ISD::SIGN_EXTEND_INREG: {
1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 unsigned EBits = EVT.getScalarType().getSizeInBits();
1876 // Sign extension. Compute the demanded bits in the result that are not
1877 // present in the input.
1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1880 APInt InSignBit = APInt::getSignBit(EBits);
1881 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1883 // If the sign extended bits are demanded, we know that the sign
1885 InSignBit = InSignBit.zext(BitWidth);
1886 if (NewBits.getBoolValue())
1887 InputDemandedBits |= InSignBit;
1889 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1890 KnownOne &= InputDemandedBits;
1891 KnownZero &= InputDemandedBits;
1892 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1894 // If the sign bit of the input is known set or clear, then we know the
1895 // top bits of the result.
1896 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1897 KnownZero |= NewBits;
1898 KnownOne &= ~NewBits;
1899 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1900 KnownOne |= NewBits;
1901 KnownZero &= ~NewBits;
1902 } else { // Input sign bit unknown
1903 KnownZero &= ~NewBits;
1904 KnownOne &= ~NewBits;
1909 case ISD::CTTZ_ZERO_UNDEF:
1911 case ISD::CTLZ_ZERO_UNDEF:
1913 unsigned LowBits = Log2_32(BitWidth)+1;
1914 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1915 KnownOne.clearAllBits();
1919 LoadSDNode *LD = cast<LoadSDNode>(Op);
1920 if (ISD::isZEXTLoad(Op.getNode())) {
1921 EVT VT = LD->getMemoryVT();
1922 unsigned MemBits = VT.getScalarType().getSizeInBits();
1923 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1924 } else if (const MDNode *Ranges = LD->getRanges()) {
1925 computeMaskedBitsLoad(*Ranges, KnownZero);
1929 case ISD::ZERO_EXTEND: {
1930 EVT InVT = Op.getOperand(0).getValueType();
1931 unsigned InBits = InVT.getScalarType().getSizeInBits();
1932 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1933 KnownZero = KnownZero.trunc(InBits);
1934 KnownOne = KnownOne.trunc(InBits);
1935 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1936 KnownZero = KnownZero.zext(BitWidth);
1937 KnownOne = KnownOne.zext(BitWidth);
1938 KnownZero |= NewBits;
1941 case ISD::SIGN_EXTEND: {
1942 EVT InVT = Op.getOperand(0).getValueType();
1943 unsigned InBits = InVT.getScalarType().getSizeInBits();
1944 APInt InSignBit = APInt::getSignBit(InBits);
1945 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1947 KnownZero = KnownZero.trunc(InBits);
1948 KnownOne = KnownOne.trunc(InBits);
1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1951 // Note if the sign bit is known to be zero or one.
1952 bool SignBitKnownZero = KnownZero.isNegative();
1953 bool SignBitKnownOne = KnownOne.isNegative();
1954 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1955 "Sign bit can't be known to be both zero and one!");
1957 KnownZero = KnownZero.zext(BitWidth);
1958 KnownOne = KnownOne.zext(BitWidth);
1960 // If the sign bit is known zero or one, the top bits match.
1961 if (SignBitKnownZero)
1962 KnownZero |= NewBits;
1963 else if (SignBitKnownOne)
1964 KnownOne |= NewBits;
1967 case ISD::ANY_EXTEND: {
1968 EVT InVT = Op.getOperand(0).getValueType();
1969 unsigned InBits = InVT.getScalarType().getSizeInBits();
1970 KnownZero = KnownZero.trunc(InBits);
1971 KnownOne = KnownOne.trunc(InBits);
1972 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1973 KnownZero = KnownZero.zext(BitWidth);
1974 KnownOne = KnownOne.zext(BitWidth);
1977 case ISD::TRUNCATE: {
1978 EVT InVT = Op.getOperand(0).getValueType();
1979 unsigned InBits = InVT.getScalarType().getSizeInBits();
1980 KnownZero = KnownZero.zext(InBits);
1981 KnownOne = KnownOne.zext(InBits);
1982 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1983 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1984 KnownZero = KnownZero.trunc(BitWidth);
1985 KnownOne = KnownOne.trunc(BitWidth);
1988 case ISD::AssertZext: {
1989 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1990 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1991 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1992 KnownZero |= (~InMask);
1993 KnownOne &= (~KnownZero);
1997 // All bits are zero except the low bit.
1998 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2002 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2003 // We know that the top bits of C-X are clear if X contains less bits
2004 // than C (i.e. no wrap-around can happen). For example, 20-X is
2005 // positive if we can prove that X is >= 0 and < 16.
2006 if (CLHS->getAPIntValue().isNonNegative()) {
2007 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2008 // NLZ can't be BitWidth with no sign bit
2009 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2010 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2012 // If all of the MaskV bits are known to be zero, then we know the
2013 // output top bits are zero, because we now know that the output is
2015 if ((KnownZero2 & MaskV) == MaskV) {
2016 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2017 // Top bits known zero.
2018 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2026 // Output known-0 bits are known if clear or set in both the low clear bits
2027 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2028 // low 3 bits clear.
2029 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2030 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2031 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2033 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2034 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2035 KnownZeroOut = std::min(KnownZeroOut,
2036 KnownZero2.countTrailingOnes());
2038 if (Op.getOpcode() == ISD::ADD) {
2039 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2043 // With ADDE, a carry bit may be added in, so we can only use this
2044 // information if we know (at least) that the low two bits are clear. We
2045 // then return to the caller that the low bit is unknown but that other bits
2047 if (KnownZeroOut >= 2) // ADDE
2048 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2052 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2053 const APInt &RA = Rem->getAPIntValue().abs();
2054 if (RA.isPowerOf2()) {
2055 APInt LowBits = RA - 1;
2056 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2057 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2059 // The low bits of the first operand are unchanged by the srem.
2060 KnownZero = KnownZero2 & LowBits;
2061 KnownOne = KnownOne2 & LowBits;
2063 // If the first operand is non-negative or has all low bits zero, then
2064 // the upper bits are all zero.
2065 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2066 KnownZero |= ~LowBits;
2068 // If the first operand is negative and not all low bits are zero, then
2069 // the upper bits are all one.
2070 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2071 KnownOne |= ~LowBits;
2072 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2077 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2078 const APInt &RA = Rem->getAPIntValue();
2079 if (RA.isPowerOf2()) {
2080 APInt LowBits = (RA - 1);
2081 KnownZero |= ~LowBits;
2082 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2083 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2088 // Since the result is less than or equal to either operand, any leading
2089 // zero bits in either operand must also exist in the result.
2090 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2091 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2093 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2094 KnownZero2.countLeadingOnes());
2095 KnownOne.clearAllBits();
2096 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2099 case ISD::FrameIndex:
2100 case ISD::TargetFrameIndex:
2101 if (unsigned Align = InferPtrAlignment(Op)) {
2102 // The low bits are known zero if the pointer is aligned.
2103 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2109 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2112 case ISD::INTRINSIC_WO_CHAIN:
2113 case ISD::INTRINSIC_W_CHAIN:
2114 case ISD::INTRINSIC_VOID:
2115 // Allow the target to implement this method for its nodes.
2116 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2121 /// ComputeNumSignBits - Return the number of times the sign bit of the
2122 /// register is replicated into the other bits. We know that at least 1 bit
2123 /// is always equal to the sign bit (itself), but other cases can give us
2124 /// information. For example, immediately after an "SRA X, 2", we know that
2125 /// the top 3 bits are all equal to each other, so we return 3.
2126 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2127 EVT VT = Op.getValueType();
2128 assert(VT.isInteger() && "Invalid VT!");
2129 unsigned VTBits = VT.getScalarType().getSizeInBits();
2131 unsigned FirstAnswer = 1;
2134 return 1; // Limit search depth.
2136 switch (Op.getOpcode()) {
2138 case ISD::AssertSext:
2139 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2140 return VTBits-Tmp+1;
2141 case ISD::AssertZext:
2142 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2145 case ISD::Constant: {
2146 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2147 return Val.getNumSignBits();
2150 case ISD::SIGN_EXTEND:
2151 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2152 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2154 case ISD::SIGN_EXTEND_INREG:
2155 // Max of the input and what this extends.
2157 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2160 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2161 return std::max(Tmp, Tmp2);
2164 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2165 // SRA X, C -> adds C sign bits.
2166 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2167 Tmp += C->getZExtValue();
2168 if (Tmp > VTBits) Tmp = VTBits;
2172 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2173 // shl destroys sign bits.
2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2175 if (C->getZExtValue() >= VTBits || // Bad shift.
2176 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2177 return Tmp - C->getZExtValue();
2182 case ISD::XOR: // NOT is handled here.
2183 // Logical binary ops preserve the number of sign bits at the worst.
2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2186 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2187 FirstAnswer = std::min(Tmp, Tmp2);
2188 // We computed what we know about the sign bits as our first
2189 // answer. Now proceed to the generic code that uses
2190 // ComputeMaskedBits, and pick whichever answer is better.
2195 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2196 if (Tmp == 1) return 1; // Early out.
2197 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2198 return std::min(Tmp, Tmp2);
2206 if (Op.getResNo() != 1)
2208 // The boolean result conforms to getBooleanContents. Fall through.
2210 // If setcc returns 0/-1, all bits are sign bits.
2211 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2212 TargetLowering::ZeroOrNegativeOneBooleanContent)
2217 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2218 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2220 // Handle rotate right by N like a rotate left by 32-N.
2221 if (Op.getOpcode() == ISD::ROTR)
2222 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2224 // If we aren't rotating out all of the known-in sign bits, return the
2225 // number that are left. This handles rotl(sext(x), 1) for example.
2226 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2227 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2231 // Add can have at most one carry bit. Thus we know that the output
2232 // is, at worst, one more bit than the inputs.
2233 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2234 if (Tmp == 1) return 1; // Early out.
2236 // Special case decrementing a value (ADD X, -1):
2237 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2238 if (CRHS->isAllOnesValue()) {
2239 APInt KnownZero, KnownOne;
2240 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2242 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2244 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2247 // If we are subtracting one from a positive number, there is no carry
2248 // out of the result.
2249 if (KnownZero.isNegative())
2253 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2254 if (Tmp2 == 1) return 1;
2255 return std::min(Tmp, Tmp2)-1;
2258 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2259 if (Tmp2 == 1) return 1;
2262 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2263 if (CLHS->isNullValue()) {
2264 APInt KnownZero, KnownOne;
2265 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2266 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2268 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2271 // If the input is known to be positive (the sign bit is known clear),
2272 // the output of the NEG has the same number of sign bits as the input.
2273 if (KnownZero.isNegative())
2276 // Otherwise, we treat this like a SUB.
2279 // Sub can have at most one carry bit. Thus we know that the output
2280 // is, at worst, one more bit than the inputs.
2281 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2282 if (Tmp == 1) return 1; // Early out.
2283 return std::min(Tmp, Tmp2)-1;
2285 // FIXME: it's tricky to do anything useful for this, but it is an important
2286 // case for targets like X86.
2290 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2291 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2292 unsigned ExtType = LD->getExtensionType();
2295 case ISD::SEXTLOAD: // '17' bits known
2296 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2297 return VTBits-Tmp+1;
2298 case ISD::ZEXTLOAD: // '16' bits known
2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2304 // Allow the target to implement this method for its nodes.
2305 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2306 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2307 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2308 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2309 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2310 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2313 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2314 // use this information.
2315 APInt KnownZero, KnownOne;
2316 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2319 if (KnownZero.isNegative()) { // sign bit is 0
2321 } else if (KnownOne.isNegative()) { // sign bit is 1;
2328 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2329 // the number of identical bits in the top of the input value.
2331 Mask <<= Mask.getBitWidth()-VTBits;
2332 // Return # leading zeros. We use 'min' here in case Val was zero before
2333 // shifting. We don't want to return '64' as for an i32 "0".
2334 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2337 /// isBaseWithConstantOffset - Return true if the specified operand is an
2338 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2339 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2340 /// semantics as an ADD. This handles the equivalence:
2341 /// X|Cst == X+Cst iff X&Cst = 0.
2342 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2343 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2344 !isa<ConstantSDNode>(Op.getOperand(1)))
2347 if (Op.getOpcode() == ISD::OR &&
2348 !MaskedValueIsZero(Op.getOperand(0),
2349 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2356 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2357 // If we're told that NaNs won't happen, assume they won't.
2358 if (getTarget().Options.NoNaNsFPMath)
2361 // If the value is a constant, we can obviously see if it is a NaN or not.
2362 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2363 return !C->getValueAPF().isNaN();
2365 // TODO: Recognize more cases here.
2370 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2371 // If the value is a constant, we can obviously see if it is a zero or not.
2372 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2373 return !C->isZero();
2375 // TODO: Recognize more cases here.
2376 switch (Op.getOpcode()) {
2379 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2380 return !C->isNullValue();
2387 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2388 // Check the obvious case.
2389 if (A == B) return true;
2391 // For for negative and positive zero.
2392 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2393 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2394 if (CA->isZero() && CB->isZero()) return true;
2396 // Otherwise they may not be equal.
2400 /// getNode - Gets or creates the specified node.
2402 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2403 FoldingSetNodeID ID;
2404 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2407 return SDValue(E, 0);
2409 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2410 CSEMap.InsertNode(N, IP);
2412 AllNodes.push_back(N);
2416 return SDValue(N, 0);
2419 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2420 EVT VT, SDValue Operand) {
2421 // Constant fold unary operations with an integer constant operand.
2422 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2423 const APInt &Val = C->getAPIntValue();
2426 case ISD::SIGN_EXTEND:
2427 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2428 case ISD::ANY_EXTEND:
2429 case ISD::ZERO_EXTEND:
2431 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2432 case ISD::UINT_TO_FP:
2433 case ISD::SINT_TO_FP: {
2434 APFloat apf(EVTToAPFloatSemantics(VT),
2435 APInt::getNullValue(VT.getSizeInBits()));
2436 (void)apf.convertFromAPInt(Val,
2437 Opcode==ISD::SINT_TO_FP,
2438 APFloat::rmNearestTiesToEven);
2439 return getConstantFP(apf, VT);
2442 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2443 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2444 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2445 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2448 return getConstant(Val.byteSwap(), VT);
2450 return getConstant(Val.countPopulation(), VT);
2452 case ISD::CTLZ_ZERO_UNDEF:
2453 return getConstant(Val.countLeadingZeros(), VT);
2455 case ISD::CTTZ_ZERO_UNDEF:
2456 return getConstant(Val.countTrailingZeros(), VT);
2460 // Constant fold unary operations with a floating point constant operand.
2461 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2462 APFloat V = C->getValueAPF(); // make copy
2466 return getConstantFP(V, VT);
2469 return getConstantFP(V, VT);
2471 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2472 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2473 return getConstantFP(V, VT);
2477 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2478 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2479 return getConstantFP(V, VT);
2483 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2484 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2485 return getConstantFP(V, VT);
2488 case ISD::FP_EXTEND: {
2490 // This can return overflow, underflow, or inexact; we don't care.
2491 // FIXME need to be more flexible about rounding mode.
2492 (void)V.convert(EVTToAPFloatSemantics(VT),
2493 APFloat::rmNearestTiesToEven, &ignored);
2494 return getConstantFP(V, VT);
2496 case ISD::FP_TO_SINT:
2497 case ISD::FP_TO_UINT: {
2500 assert(integerPartWidth >= 64);
2501 // FIXME need to be more flexible about rounding mode.
2502 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2503 Opcode==ISD::FP_TO_SINT,
2504 APFloat::rmTowardZero, &ignored);
2505 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2507 APInt api(VT.getSizeInBits(), x);
2508 return getConstant(api, VT);
2511 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2512 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2513 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2514 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2519 unsigned OpOpcode = Operand.getNode()->getOpcode();
2521 case ISD::TokenFactor:
2522 case ISD::MERGE_VALUES:
2523 case ISD::CONCAT_VECTORS:
2524 return Operand; // Factor, merge or concat of one node? No need.
2525 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2526 case ISD::FP_EXTEND:
2527 assert(VT.isFloatingPoint() &&
2528 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2529 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2530 assert((!VT.isVector() ||
2531 VT.getVectorNumElements() ==
2532 Operand.getValueType().getVectorNumElements()) &&
2533 "Vector element count mismatch!");
2534 if (Operand.getOpcode() == ISD::UNDEF)
2535 return getUNDEF(VT);
2537 case ISD::SIGN_EXTEND:
2538 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2539 "Invalid SIGN_EXTEND!");
2540 if (Operand.getValueType() == VT) return Operand; // noop extension
2541 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2542 "Invalid sext node, dst < src!");
2543 assert((!VT.isVector() ||
2544 VT.getVectorNumElements() ==
2545 Operand.getValueType().getVectorNumElements()) &&
2546 "Vector element count mismatch!");
2547 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2548 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2549 else if (OpOpcode == ISD::UNDEF)
2550 // sext(undef) = 0, because the top bits will all be the same.
2551 return getConstant(0, VT);
2553 case ISD::ZERO_EXTEND:
2554 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2555 "Invalid ZERO_EXTEND!");
2556 if (Operand.getValueType() == VT) return Operand; // noop extension
2557 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2558 "Invalid zext node, dst < src!");
2559 assert((!VT.isVector() ||
2560 VT.getVectorNumElements() ==
2561 Operand.getValueType().getVectorNumElements()) &&
2562 "Vector element count mismatch!");
2563 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2564 return getNode(ISD::ZERO_EXTEND, DL, VT,
2565 Operand.getNode()->getOperand(0));
2566 else if (OpOpcode == ISD::UNDEF)
2567 // zext(undef) = 0, because the top bits will be zero.
2568 return getConstant(0, VT);
2570 case ISD::ANY_EXTEND:
2571 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2572 "Invalid ANY_EXTEND!");
2573 if (Operand.getValueType() == VT) return Operand; // noop extension
2574 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2575 "Invalid anyext node, dst < src!");
2576 assert((!VT.isVector() ||
2577 VT.getVectorNumElements() ==
2578 Operand.getValueType().getVectorNumElements()) &&
2579 "Vector element count mismatch!");
2581 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2582 OpOpcode == ISD::ANY_EXTEND)
2583 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2584 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2585 else if (OpOpcode == ISD::UNDEF)
2586 return getUNDEF(VT);
2588 // (ext (trunx x)) -> x
2589 if (OpOpcode == ISD::TRUNCATE) {
2590 SDValue OpOp = Operand.getNode()->getOperand(0);
2591 if (OpOp.getValueType() == VT)
2596 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2597 "Invalid TRUNCATE!");
2598 if (Operand.getValueType() == VT) return Operand; // noop truncate
2599 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2600 "Invalid truncate node, src < dst!");
2601 assert((!VT.isVector() ||
2602 VT.getVectorNumElements() ==
2603 Operand.getValueType().getVectorNumElements()) &&
2604 "Vector element count mismatch!");
2605 if (OpOpcode == ISD::TRUNCATE)
2606 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2607 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2608 OpOpcode == ISD::ANY_EXTEND) {
2609 // If the source is smaller than the dest, we still need an extend.
2610 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2611 .bitsLT(VT.getScalarType()))
2612 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2613 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2614 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2615 return Operand.getNode()->getOperand(0);
2617 if (OpOpcode == ISD::UNDEF)
2618 return getUNDEF(VT);
2621 // Basic sanity checking.
2622 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2623 && "Cannot BITCAST between types of different sizes!");
2624 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2625 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2626 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2627 if (OpOpcode == ISD::UNDEF)
2628 return getUNDEF(VT);
2630 case ISD::SCALAR_TO_VECTOR:
2631 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2632 (VT.getVectorElementType() == Operand.getValueType() ||
2633 (VT.getVectorElementType().isInteger() &&
2634 Operand.getValueType().isInteger() &&
2635 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2636 "Illegal SCALAR_TO_VECTOR node!");
2637 if (OpOpcode == ISD::UNDEF)
2638 return getUNDEF(VT);
2639 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2640 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2641 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2642 Operand.getConstantOperandVal(1) == 0 &&
2643 Operand.getOperand(0).getValueType() == VT)
2644 return Operand.getOperand(0);
2647 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2648 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2649 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2650 Operand.getNode()->getOperand(0));
2651 if (OpOpcode == ISD::FNEG) // --X -> X
2652 return Operand.getNode()->getOperand(0);
2655 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2656 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2661 SDVTList VTs = getVTList(VT);
2662 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2663 FoldingSetNodeID ID;
2664 SDValue Ops[1] = { Operand };
2665 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2667 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2668 return SDValue(E, 0);
2670 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2671 CSEMap.InsertNode(N, IP);
2673 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2676 AllNodes.push_back(N);
2680 return SDValue(N, 0);
2683 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2685 ConstantSDNode *Cst1,
2686 ConstantSDNode *Cst2) {
2687 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2690 case ISD::ADD: return getConstant(C1 + C2, VT);
2691 case ISD::SUB: return getConstant(C1 - C2, VT);
2692 case ISD::MUL: return getConstant(C1 * C2, VT);
2694 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2697 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2700 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2703 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2705 case ISD::AND: return getConstant(C1 & C2, VT);
2706 case ISD::OR: return getConstant(C1 | C2, VT);
2707 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2708 case ISD::SHL: return getConstant(C1 << C2, VT);
2709 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2710 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2711 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2712 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2719 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2720 SDValue N1, SDValue N2) {
2721 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2722 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2725 case ISD::TokenFactor:
2726 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2727 N2.getValueType() == MVT::Other && "Invalid token factor!");
2728 // Fold trivial token factors.
2729 if (N1.getOpcode() == ISD::EntryToken) return N2;
2730 if (N2.getOpcode() == ISD::EntryToken) return N1;
2731 if (N1 == N2) return N1;
2733 case ISD::CONCAT_VECTORS:
2734 // Concat of UNDEFs is UNDEF.
2735 if (N1.getOpcode() == ISD::UNDEF &&
2736 N2.getOpcode() == ISD::UNDEF)
2737 return getUNDEF(VT);
2739 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2740 // one big BUILD_VECTOR.
2741 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2742 N2.getOpcode() == ISD::BUILD_VECTOR) {
2743 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2744 N1.getNode()->op_end());
2745 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2746 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2750 assert(VT.isInteger() && "This operator does not apply to FP types!");
2751 assert(N1.getValueType() == N2.getValueType() &&
2752 N1.getValueType() == VT && "Binary operator types must match!");
2753 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2754 // worth handling here.
2755 if (N2C && N2C->isNullValue())
2757 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2764 assert(VT.isInteger() && "This operator does not apply to FP types!");
2765 assert(N1.getValueType() == N2.getValueType() &&
2766 N1.getValueType() == VT && "Binary operator types must match!");
2767 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2768 // it's worth handling here.
2769 if (N2C && N2C->isNullValue())
2779 assert(VT.isInteger() && "This operator does not apply to FP types!");
2780 assert(N1.getValueType() == N2.getValueType() &&
2781 N1.getValueType() == VT && "Binary operator types must match!");
2788 if (getTarget().Options.UnsafeFPMath) {
2789 if (Opcode == ISD::FADD) {
2791 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2792 if (CFP->getValueAPF().isZero())
2795 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2796 if (CFP->getValueAPF().isZero())
2798 } else if (Opcode == ISD::FSUB) {
2800 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2801 if (CFP->getValueAPF().isZero())
2803 } else if (Opcode == ISD::FMUL) {
2804 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2807 // If the first operand isn't the constant, try the second
2809 CFP = dyn_cast<ConstantFPSDNode>(N2);
2816 return SDValue(CFP,0);
2818 if (CFP->isExactlyValue(1.0))
2823 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2824 assert(N1.getValueType() == N2.getValueType() &&
2825 N1.getValueType() == VT && "Binary operator types must match!");
2827 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2828 assert(N1.getValueType() == VT &&
2829 N1.getValueType().isFloatingPoint() &&
2830 N2.getValueType().isFloatingPoint() &&
2831 "Invalid FCOPYSIGN!");
2838 assert(VT == N1.getValueType() &&
2839 "Shift operators return type must be the same as their first arg");
2840 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2841 "Shifts only work on integers");
2842 // Verify that the shift amount VT is bit enough to hold valid shift
2843 // amounts. This catches things like trying to shift an i1024 value by an
2844 // i8, which is easy to fall into in generic code that uses
2845 // TLI.getShiftAmount().
2846 assert(N2.getValueType().getSizeInBits() >=
2847 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2848 "Invalid use of small shift amount with oversized value!");
2850 // Always fold shifts of i1 values so the code generator doesn't need to
2851 // handle them. Since we know the size of the shift has to be less than the
2852 // size of the value, the shift/rotate count is guaranteed to be zero.
2855 if (N2C && N2C->isNullValue())
2858 case ISD::FP_ROUND_INREG: {
2859 EVT EVT = cast<VTSDNode>(N2)->getVT();
2860 assert(VT == N1.getValueType() && "Not an inreg round!");
2861 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2862 "Cannot FP_ROUND_INREG integer types");
2863 assert(EVT.isVector() == VT.isVector() &&
2864 "FP_ROUND_INREG type should be vector iff the operand "
2866 assert((!EVT.isVector() ||
2867 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2868 "Vector element counts must match in FP_ROUND_INREG");
2869 assert(EVT.bitsLE(VT) && "Not rounding down!");
2871 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2875 assert(VT.isFloatingPoint() &&
2876 N1.getValueType().isFloatingPoint() &&
2877 VT.bitsLE(N1.getValueType()) &&
2878 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2879 if (N1.getValueType() == VT) return N1; // noop conversion.
2881 case ISD::AssertSext:
2882 case ISD::AssertZext: {
2883 EVT EVT = cast<VTSDNode>(N2)->getVT();
2884 assert(VT == N1.getValueType() && "Not an inreg extend!");
2885 assert(VT.isInteger() && EVT.isInteger() &&
2886 "Cannot *_EXTEND_INREG FP types");
2887 assert(!EVT.isVector() &&
2888 "AssertSExt/AssertZExt type should be the vector element type "
2889 "rather than the vector type!");
2890 assert(EVT.bitsLE(VT) && "Not extending!");
2891 if (VT == EVT) return N1; // noop assertion.
2894 case ISD::SIGN_EXTEND_INREG: {
2895 EVT EVT = cast<VTSDNode>(N2)->getVT();
2896 assert(VT == N1.getValueType() && "Not an inreg extend!");
2897 assert(VT.isInteger() && EVT.isInteger() &&
2898 "Cannot *_EXTEND_INREG FP types");
2899 assert(EVT.isVector() == VT.isVector() &&
2900 "SIGN_EXTEND_INREG type should be vector iff the operand "
2902 assert((!EVT.isVector() ||
2903 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2904 "Vector element counts must match in SIGN_EXTEND_INREG");
2905 assert(EVT.bitsLE(VT) && "Not extending!");
2906 if (EVT == VT) return N1; // Not actually extending
2909 APInt Val = N1C->getAPIntValue();
2910 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2911 Val <<= Val.getBitWidth()-FromBits;
2912 Val = Val.ashr(Val.getBitWidth()-FromBits);
2913 return getConstant(Val, VT);
2917 case ISD::EXTRACT_VECTOR_ELT:
2918 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2919 if (N1.getOpcode() == ISD::UNDEF)
2920 return getUNDEF(VT);
2922 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2923 // expanding copies of large vectors from registers.
2925 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2926 N1.getNumOperands() > 0) {
2928 N1.getOperand(0).getValueType().getVectorNumElements();
2929 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2930 N1.getOperand(N2C->getZExtValue() / Factor),
2931 getConstant(N2C->getZExtValue() % Factor,
2932 N2.getValueType()));
2935 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2936 // expanding large vector constants.
2937 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2938 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2940 if (VT != Elt.getValueType())
2941 // If the vector element type is not legal, the BUILD_VECTOR operands
2942 // are promoted and implicitly truncated, and the result implicitly
2943 // extended. Make that explicit here.
2944 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2949 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2950 // operations are lowered to scalars.
2951 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2952 // If the indices are the same, return the inserted element else
2953 // if the indices are known different, extract the element from
2954 // the original vector.
2955 SDValue N1Op2 = N1.getOperand(2);
2956 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2958 if (N1Op2C && N2C) {
2959 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2960 if (VT == N1.getOperand(1).getValueType())
2961 return N1.getOperand(1);
2963 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2966 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2970 case ISD::EXTRACT_ELEMENT:
2971 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2972 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2973 (N1.getValueType().isInteger() == VT.isInteger()) &&
2974 N1.getValueType() != VT &&
2975 "Wrong types for EXTRACT_ELEMENT!");
2977 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2978 // 64-bit integers into 32-bit parts. Instead of building the extract of
2979 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2980 if (N1.getOpcode() == ISD::BUILD_PAIR)
2981 return N1.getOperand(N2C->getZExtValue());
2983 // EXTRACT_ELEMENT of a constant int is also very common.
2984 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2985 unsigned ElementSize = VT.getSizeInBits();
2986 unsigned Shift = ElementSize * N2C->getZExtValue();
2987 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2988 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2991 case ISD::EXTRACT_SUBVECTOR: {
2993 if (VT.isSimple() && N1.getValueType().isSimple()) {
2994 assert(VT.isVector() && N1.getValueType().isVector() &&
2995 "Extract subvector VTs must be a vectors!");
2996 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2997 "Extract subvector VTs must have the same element type!");
2998 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2999 "Extract subvector must be from larger vector to smaller vector!");
3001 if (isa<ConstantSDNode>(Index.getNode())) {
3002 assert((VT.getVectorNumElements() +
3003 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3004 <= N1.getValueType().getVectorNumElements())
3005 && "Extract subvector overflow!");
3008 // Trivial extraction.
3009 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3018 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3019 if (SV.getNode()) return SV;
3020 } else { // Cannonicalize constant to RHS if commutative
3021 if (isCommutativeBinOp(Opcode)) {
3022 std::swap(N1C, N2C);
3028 // Constant fold FP operations.
3029 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3030 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3032 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3033 // Cannonicalize constant to RHS if commutative
3034 std::swap(N1CFP, N2CFP);
3037 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3038 APFloat::opStatus s;
3041 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3042 if (s != APFloat::opInvalidOp)
3043 return getConstantFP(V1, VT);
3046 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3047 if (s!=APFloat::opInvalidOp)
3048 return getConstantFP(V1, VT);
3051 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3052 if (s!=APFloat::opInvalidOp)
3053 return getConstantFP(V1, VT);
3056 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3057 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3058 return getConstantFP(V1, VT);
3061 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3062 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3063 return getConstantFP(V1, VT);
3065 case ISD::FCOPYSIGN:
3067 return getConstantFP(V1, VT);
3072 if (Opcode == ISD::FP_ROUND) {
3073 APFloat V = N1CFP->getValueAPF(); // make copy
3075 // This can return overflow, underflow, or inexact; we don't care.
3076 // FIXME need to be more flexible about rounding mode.
3077 (void)V.convert(EVTToAPFloatSemantics(VT),
3078 APFloat::rmNearestTiesToEven, &ignored);
3079 return getConstantFP(V, VT);
3083 // Canonicalize an UNDEF to the RHS, even over a constant.
3084 if (N1.getOpcode() == ISD::UNDEF) {
3085 if (isCommutativeBinOp(Opcode)) {
3089 case ISD::FP_ROUND_INREG:
3090 case ISD::SIGN_EXTEND_INREG:
3096 return N1; // fold op(undef, arg2) -> undef
3104 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3105 // For vectors, we can't easily build an all zero vector, just return
3112 // Fold a bunch of operators when the RHS is undef.
3113 if (N2.getOpcode() == ISD::UNDEF) {
3116 if (N1.getOpcode() == ISD::UNDEF)
3117 // Handle undef ^ undef -> 0 special case. This is a common
3119 return getConstant(0, VT);
3129 return N2; // fold op(arg1, undef) -> undef
3135 if (getTarget().Options.UnsafeFPMath)
3143 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3144 // For vectors, we can't easily build an all zero vector, just return
3149 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3150 // For vectors, we can't easily build an all one vector, just return
3158 // Memoize this node if possible.
3160 SDVTList VTs = getVTList(VT);
3161 if (VT != MVT::Glue) {
3162 SDValue Ops[] = { N1, N2 };
3163 FoldingSetNodeID ID;
3164 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3167 return SDValue(E, 0);
3169 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3170 CSEMap.InsertNode(N, IP);
3172 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3175 AllNodes.push_back(N);
3179 return SDValue(N, 0);
3182 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3183 SDValue N1, SDValue N2, SDValue N3) {
3184 // Perform various simplifications.
3185 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3187 case ISD::CONCAT_VECTORS:
3188 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3189 // one big BUILD_VECTOR.
3190 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3191 N2.getOpcode() == ISD::BUILD_VECTOR &&
3192 N3.getOpcode() == ISD::BUILD_VECTOR) {
3193 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3194 N1.getNode()->op_end());
3195 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3196 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3197 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3201 // Use FoldSetCC to simplify SETCC's.
3202 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3203 if (Simp.getNode()) return Simp;
3208 if (N1C->getZExtValue())
3209 return N2; // select true, X, Y -> X
3210 return N3; // select false, X, Y -> Y
3213 if (N2 == N3) return N2; // select C, X, X -> X
3215 case ISD::VECTOR_SHUFFLE:
3216 llvm_unreachable("should use getVectorShuffle constructor!");
3217 case ISD::INSERT_SUBVECTOR: {
3219 if (VT.isSimple() && N1.getValueType().isSimple()
3220 && N2.getValueType().isSimple()) {
3221 assert(VT.isVector() && N1.getValueType().isVector() &&
3222 N2.getValueType().isVector() &&
3223 "Insert subvector VTs must be a vectors");
3224 assert(VT == N1.getValueType() &&
3225 "Dest and insert subvector source types must match!");
3226 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3227 "Insert subvector must be from smaller vector to larger vector!");
3228 if (isa<ConstantSDNode>(Index.getNode())) {
3229 assert((N2.getValueType().getVectorNumElements() +
3230 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3231 <= VT.getVectorNumElements())
3232 && "Insert subvector overflow!");
3235 // Trivial insertion.
3236 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3242 // Fold bit_convert nodes from a type to themselves.
3243 if (N1.getValueType() == VT)
3248 // Memoize node if it doesn't produce a flag.
3250 SDVTList VTs = getVTList(VT);
3251 if (VT != MVT::Glue) {
3252 SDValue Ops[] = { N1, N2, N3 };
3253 FoldingSetNodeID ID;
3254 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3257 return SDValue(E, 0);
3259 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3260 CSEMap.InsertNode(N, IP);
3262 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3265 AllNodes.push_back(N);
3269 return SDValue(N, 0);
3272 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3273 SDValue N1, SDValue N2, SDValue N3,
3275 SDValue Ops[] = { N1, N2, N3, N4 };
3276 return getNode(Opcode, DL, VT, Ops, 4);
3279 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3280 SDValue N1, SDValue N2, SDValue N3,
3281 SDValue N4, SDValue N5) {
3282 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3283 return getNode(Opcode, DL, VT, Ops, 5);
3286 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3287 /// the incoming stack arguments to be loaded from the stack.
3288 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3289 SmallVector<SDValue, 8> ArgChains;
3291 // Include the original chain at the beginning of the list. When this is
3292 // used by target LowerCall hooks, this helps legalize find the
3293 // CALLSEQ_BEGIN node.
3294 ArgChains.push_back(Chain);
3296 // Add a chain value for each stack argument.
3297 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3298 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3299 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3300 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3301 if (FI->getIndex() < 0)
3302 ArgChains.push_back(SDValue(L, 1));
3304 // Build a tokenfactor for all the chains.
3305 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3306 &ArgChains[0], ArgChains.size());
3309 /// SplatByte - Distribute ByteVal over NumBits bits.
3310 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3311 APInt Val = APInt(NumBits, ByteVal);
3313 for (unsigned i = NumBits; i > 8; i >>= 1) {
3314 Val = (Val << Shift) | Val;
3320 /// getMemsetValue - Vectorized representation of the memset value
3322 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3324 assert(Value.getOpcode() != ISD::UNDEF);
3326 unsigned NumBits = VT.getScalarType().getSizeInBits();
3327 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3328 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3330 return DAG.getConstant(Val, VT);
3331 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3334 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3336 // Use a multiplication with 0x010101... to extend the input to the
3338 APInt Magic = SplatByte(NumBits, 0x01);
3339 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3345 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3346 /// used when a memcpy is turned into a memset when the source is a constant
3348 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3349 const TargetLowering &TLI, StringRef Str) {
3350 // Handle vector with all elements zero.
3353 return DAG.getConstant(0, VT);
3354 else if (VT == MVT::f32 || VT == MVT::f64)
3355 return DAG.getConstantFP(0.0, VT);
3356 else if (VT.isVector()) {
3357 unsigned NumElts = VT.getVectorNumElements();
3358 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3359 return DAG.getNode(ISD::BITCAST, dl, VT,
3360 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3363 llvm_unreachable("Expected type!");
3366 assert(!VT.isVector() && "Can't handle vector type here!");
3367 unsigned NumVTBits = VT.getSizeInBits();
3368 unsigned NumVTBytes = NumVTBits / 8;
3369 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3371 APInt Val(NumVTBits, 0);
3372 if (TLI.isLittleEndian()) {
3373 for (unsigned i = 0; i != NumBytes; ++i)
3374 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3376 for (unsigned i = 0; i != NumBytes; ++i)
3377 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3380 // If the "cost" of materializing the integer immediate is 1 or free, then
3381 // it is cost effective to turn the load into the immediate.
3382 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
3383 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3384 return DAG.getConstant(Val, VT);
3385 return SDValue(0, 0);
3388 /// getMemBasePlusOffset - Returns base and offset node for the
3390 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3391 SelectionDAG &DAG) {
3392 EVT VT = Base.getValueType();
3393 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3394 VT, Base, DAG.getConstant(Offset, VT));
3397 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3399 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3400 unsigned SrcDelta = 0;
3401 GlobalAddressSDNode *G = NULL;
3402 if (Src.getOpcode() == ISD::GlobalAddress)
3403 G = cast<GlobalAddressSDNode>(Src);
3404 else if (Src.getOpcode() == ISD::ADD &&
3405 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3406 Src.getOperand(1).getOpcode() == ISD::Constant) {
3407 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3408 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3413 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3416 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3417 /// to replace the memset / memcpy. Return true if the number of memory ops
3418 /// is below the threshold. It returns the types of the sequence of
3419 /// memory ops to perform memset / memcpy by reference.
3420 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3421 unsigned Limit, uint64_t Size,
3422 unsigned DstAlign, unsigned SrcAlign,
3428 const TargetLowering &TLI) {
3429 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3430 "Expecting memcpy / memset source to meet alignment requirement!");
3431 // If 'SrcAlign' is zero, that means the memory operation does not need to
3432 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3433 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3434 // is the specified alignment of the memory operation. If it is zero, that
3435 // means it's possible to change the alignment of the destination.
3436 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3437 // not need to be loaded.
3438 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3439 IsMemset, ZeroMemset, MemcpyStrSrc,
3440 DAG.getMachineFunction());
3442 if (VT == MVT::Other) {
3443 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3444 TLI.allowsUnalignedMemoryAccesses(VT)) {
3445 VT = TLI.getPointerTy();
3447 switch (DstAlign & 7) {
3448 case 0: VT = MVT::i64; break;
3449 case 4: VT = MVT::i32; break;
3450 case 2: VT = MVT::i16; break;
3451 default: VT = MVT::i8; break;
3456 while (!TLI.isTypeLegal(LVT))
3457 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3458 assert(LVT.isInteger());
3464 unsigned NumMemOps = 0;
3466 unsigned VTSize = VT.getSizeInBits() / 8;
3467 while (VTSize > Size) {
3468 // For now, only use non-vector load / store's for the left-over pieces.
3473 if (VT.isVector() || VT.isFloatingPoint()) {
3474 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3475 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3476 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3478 else if (NewVT == MVT::i64 &&
3479 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3480 TLI.isSafeMemOpType(MVT::f64)) {
3481 // i64 is usually not legal on 32-bit targets, but f64 may be.
3489 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3490 if (NewVT == MVT::i8)
3492 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3494 NewVTSize = NewVT.getSizeInBits() / 8;
3496 // If the new VT cannot cover all of the remaining bits, then consider
3497 // issuing a (or a pair of) unaligned and overlapping load / store.
3498 // FIXME: Only does this for 64-bit or more since we don't have proper
3499 // cost model for unaligned load / store.
3501 if (NumMemOps && AllowOverlap &&
3502 VTSize >= 8 && NewVTSize < Size &&
3503 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3511 if (++NumMemOps > Limit)
3514 MemOps.push_back(VT);
3521 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3522 SDValue Chain, SDValue Dst,
3523 SDValue Src, uint64_t Size,
3524 unsigned Align, bool isVol,
3526 MachinePointerInfo DstPtrInfo,
3527 MachinePointerInfo SrcPtrInfo) {
3528 // Turn a memcpy of undef to nop.
3529 if (Src.getOpcode() == ISD::UNDEF)
3532 // Expand memcpy to a series of load and store ops if the size operand falls
3533 // below a certain threshold.
3534 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3535 // rather than maybe a humongous number of loads and stores.
3536 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3537 std::vector<EVT> MemOps;
3538 bool DstAlignCanChange = false;
3539 MachineFunction &MF = DAG.getMachineFunction();
3540 MachineFrameInfo *MFI = MF.getFrameInfo();
3542 MF.getFunction()->getAttributes().
3543 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3544 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3545 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3546 DstAlignCanChange = true;
3547 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3548 if (Align > SrcAlign)
3551 bool CopyFromStr = isMemSrcFromString(Src, Str);
3552 bool isZeroStr = CopyFromStr && Str.empty();
3553 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3555 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3556 (DstAlignCanChange ? 0 : Align),
3557 (isZeroStr ? 0 : SrcAlign),
3558 false, false, CopyFromStr, true, DAG, TLI))
3561 if (DstAlignCanChange) {
3562 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3563 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3565 // Don't promote to an alignment that would require dynamic stack
3567 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3568 if (!TRI->needsStackRealignment(MF))
3569 while (NewAlign > Align &&
3570 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3573 if (NewAlign > Align) {
3574 // Give the stack frame object a larger alignment if needed.
3575 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3576 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3581 SmallVector<SDValue, 8> OutChains;
3582 unsigned NumMemOps = MemOps.size();
3583 uint64_t SrcOff = 0, DstOff = 0;
3584 for (unsigned i = 0; i != NumMemOps; ++i) {
3586 unsigned VTSize = VT.getSizeInBits() / 8;
3587 SDValue Value, Store;
3589 if (VTSize > Size) {
3590 // Issuing an unaligned load / store pair that overlaps with the previous
3591 // pair. Adjust the offset accordingly.
3592 assert(i == NumMemOps-1 && i != 0);
3593 SrcOff -= VTSize - Size;
3594 DstOff -= VTSize - Size;
3598 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3599 // It's unlikely a store of a vector immediate can be done in a single
3600 // instruction. It would require a load from a constantpool first.
3601 // We only handle zero vectors here.
3602 // FIXME: Handle other cases where store of vector immediate is done in
3603 // a single instruction.
3604 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3605 if (Value.getNode())
3606 Store = DAG.getStore(Chain, dl, Value,
3607 getMemBasePlusOffset(Dst, DstOff, DAG),
3608 DstPtrInfo.getWithOffset(DstOff), isVol,
3612 if (!Store.getNode()) {
3613 // The type might not be legal for the target. This should only happen
3614 // if the type is smaller than a legal type, as on PPC, so the right
3615 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3616 // to Load/Store if NVT==VT.
3617 // FIXME does the case above also need this?
3618 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3619 assert(NVT.bitsGE(VT));
3620 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3621 getMemBasePlusOffset(Src, SrcOff, DAG),
3622 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3623 MinAlign(SrcAlign, SrcOff));
3624 Store = DAG.getTruncStore(Chain, dl, Value,
3625 getMemBasePlusOffset(Dst, DstOff, DAG),
3626 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3629 OutChains.push_back(Store);
3635 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3636 &OutChains[0], OutChains.size());
3639 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3640 SDValue Chain, SDValue Dst,
3641 SDValue Src, uint64_t Size,
3642 unsigned Align, bool isVol,
3644 MachinePointerInfo DstPtrInfo,
3645 MachinePointerInfo SrcPtrInfo) {
3646 // Turn a memmove of undef to nop.
3647 if (Src.getOpcode() == ISD::UNDEF)
3650 // Expand memmove to a series of load and store ops if the size operand falls
3651 // below a certain threshold.
3652 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3653 std::vector<EVT> MemOps;
3654 bool DstAlignCanChange = false;
3655 MachineFunction &MF = DAG.getMachineFunction();
3656 MachineFrameInfo *MFI = MF.getFrameInfo();
3657 bool OptSize = MF.getFunction()->getAttributes().
3658 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3659 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3660 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3661 DstAlignCanChange = true;
3662 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3663 if (Align > SrcAlign)
3665 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3667 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3668 (DstAlignCanChange ? 0 : Align), SrcAlign,
3669 false, false, false, false, DAG, TLI))
3672 if (DstAlignCanChange) {
3673 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3674 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3675 if (NewAlign > Align) {
3676 // Give the stack frame object a larger alignment if needed.
3677 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3678 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3683 uint64_t SrcOff = 0, DstOff = 0;
3684 SmallVector<SDValue, 8> LoadValues;
3685 SmallVector<SDValue, 8> LoadChains;
3686 SmallVector<SDValue, 8> OutChains;
3687 unsigned NumMemOps = MemOps.size();
3688 for (unsigned i = 0; i < NumMemOps; i++) {
3690 unsigned VTSize = VT.getSizeInBits() / 8;
3691 SDValue Value, Store;
3693 Value = DAG.getLoad(VT, dl, Chain,
3694 getMemBasePlusOffset(Src, SrcOff, DAG),
3695 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3696 false, false, SrcAlign);
3697 LoadValues.push_back(Value);
3698 LoadChains.push_back(Value.getValue(1));
3701 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3702 &LoadChains[0], LoadChains.size());
3704 for (unsigned i = 0; i < NumMemOps; i++) {
3706 unsigned VTSize = VT.getSizeInBits() / 8;
3707 SDValue Value, Store;
3709 Store = DAG.getStore(Chain, dl, LoadValues[i],
3710 getMemBasePlusOffset(Dst, DstOff, DAG),
3711 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3712 OutChains.push_back(Store);
3716 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3717 &OutChains[0], OutChains.size());
3720 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3721 SDValue Chain, SDValue Dst,
3722 SDValue Src, uint64_t Size,
3723 unsigned Align, bool isVol,
3724 MachinePointerInfo DstPtrInfo) {
3725 // Turn a memset of undef to nop.
3726 if (Src.getOpcode() == ISD::UNDEF)
3729 // Expand memset to a series of load/store ops if the size operand
3730 // falls below a certain threshold.
3731 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3732 std::vector<EVT> MemOps;
3733 bool DstAlignCanChange = false;
3734 MachineFunction &MF = DAG.getMachineFunction();
3735 MachineFrameInfo *MFI = MF.getFrameInfo();
3736 bool OptSize = MF.getFunction()->getAttributes().
3737 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3738 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3739 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3740 DstAlignCanChange = true;
3742 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3743 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3744 Size, (DstAlignCanChange ? 0 : Align), 0,
3745 true, IsZeroVal, false, true, DAG, TLI))
3748 if (DstAlignCanChange) {
3749 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3750 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3751 if (NewAlign > Align) {
3752 // Give the stack frame object a larger alignment if needed.
3753 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3754 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3759 SmallVector<SDValue, 8> OutChains;
3760 uint64_t DstOff = 0;
3761 unsigned NumMemOps = MemOps.size();
3763 // Find the largest store and generate the bit pattern for it.
3764 EVT LargestVT = MemOps[0];
3765 for (unsigned i = 1; i < NumMemOps; i++)
3766 if (MemOps[i].bitsGT(LargestVT))
3767 LargestVT = MemOps[i];
3768 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3770 for (unsigned i = 0; i < NumMemOps; i++) {
3772 unsigned VTSize = VT.getSizeInBits() / 8;
3773 if (VTSize > Size) {
3774 // Issuing an unaligned load / store pair that overlaps with the previous
3775 // pair. Adjust the offset accordingly.
3776 assert(i == NumMemOps-1 && i != 0);
3777 DstOff -= VTSize - Size;
3780 // If this store is smaller than the largest store see whether we can get
3781 // the smaller value for free with a truncate.
3782 SDValue Value = MemSetValue;
3783 if (VT.bitsLT(LargestVT)) {
3784 if (!LargestVT.isVector() && !VT.isVector() &&
3785 TLI.isTruncateFree(LargestVT, VT))
3786 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3788 Value = getMemsetValue(Src, VT, DAG, dl);
3790 assert(Value.getValueType() == VT && "Value with wrong type.");
3791 SDValue Store = DAG.getStore(Chain, dl, Value,
3792 getMemBasePlusOffset(Dst, DstOff, DAG),
3793 DstPtrInfo.getWithOffset(DstOff),
3794 isVol, false, Align);
3795 OutChains.push_back(Store);
3796 DstOff += VT.getSizeInBits() / 8;
3800 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3801 &OutChains[0], OutChains.size());
3804 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3805 SDValue Src, SDValue Size,
3806 unsigned Align, bool isVol, bool AlwaysInline,
3807 MachinePointerInfo DstPtrInfo,
3808 MachinePointerInfo SrcPtrInfo) {
3810 // Check to see if we should lower the memcpy to loads and stores first.
3811 // For cases within the target-specified limits, this is the best choice.
3812 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3814 // Memcpy with size zero? Just return the original chain.
3815 if (ConstantSize->isNullValue())
3818 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3819 ConstantSize->getZExtValue(),Align,
3820 isVol, false, DstPtrInfo, SrcPtrInfo);
3821 if (Result.getNode())
3825 // Then check to see if we should lower the memcpy with target-specific
3826 // code. If the target chooses to do this, this is the next best.
3828 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3829 isVol, AlwaysInline,
3830 DstPtrInfo, SrcPtrInfo);
3831 if (Result.getNode())
3834 // If we really need inline code and the target declined to provide it,
3835 // use a (potentially long) sequence of loads and stores.
3837 assert(ConstantSize && "AlwaysInline requires a constant size!");
3838 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3839 ConstantSize->getZExtValue(), Align, isVol,
3840 true, DstPtrInfo, SrcPtrInfo);
3843 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3844 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3845 // respect volatile, so they may do things like read or write memory
3846 // beyond the given memory regions. But fixing this isn't easy, and most
3847 // people don't care.
3849 // Emit a library call.
3850 TargetLowering::ArgListTy Args;
3851 TargetLowering::ArgListEntry Entry;
3852 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3853 Entry.Node = Dst; Args.push_back(Entry);
3854 Entry.Node = Src; Args.push_back(Entry);
3855 Entry.Node = Size; Args.push_back(Entry);
3856 // FIXME: pass in DebugLoc
3858 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3859 false, false, false, false, 0,
3860 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3861 /*isTailCall=*/false,
3862 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3863 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3864 TLI.getPointerTy()),
3866 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3868 return CallResult.second;
3871 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3872 SDValue Src, SDValue Size,
3873 unsigned Align, bool isVol,
3874 MachinePointerInfo DstPtrInfo,
3875 MachinePointerInfo SrcPtrInfo) {
3877 // Check to see if we should lower the memmove to loads and stores first.
3878 // For cases within the target-specified limits, this is the best choice.
3879 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3881 // Memmove with size zero? Just return the original chain.
3882 if (ConstantSize->isNullValue())
3886 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3887 ConstantSize->getZExtValue(), Align, isVol,
3888 false, DstPtrInfo, SrcPtrInfo);
3889 if (Result.getNode())
3893 // Then check to see if we should lower the memmove with target-specific
3894 // code. If the target chooses to do this, this is the next best.
3896 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3897 DstPtrInfo, SrcPtrInfo);
3898 if (Result.getNode())
3901 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3902 // not be safe. See memcpy above for more details.
3904 // Emit a library call.
3905 TargetLowering::ArgListTy Args;
3906 TargetLowering::ArgListEntry Entry;
3907 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3908 Entry.Node = Dst; Args.push_back(Entry);
3909 Entry.Node = Src; Args.push_back(Entry);
3910 Entry.Node = Size; Args.push_back(Entry);
3911 // FIXME: pass in DebugLoc
3913 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3914 false, false, false, false, 0,
3915 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3916 /*isTailCall=*/false,
3917 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3918 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3919 TLI.getPointerTy()),
3921 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3923 return CallResult.second;
3926 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3927 SDValue Src, SDValue Size,
3928 unsigned Align, bool isVol,
3929 MachinePointerInfo DstPtrInfo) {
3931 // Check to see if we should lower the memset to stores first.
3932 // For cases within the target-specified limits, this is the best choice.
3933 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3935 // Memset with size zero? Just return the original chain.
3936 if (ConstantSize->isNullValue())
3940 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3941 Align, isVol, DstPtrInfo);
3943 if (Result.getNode())
3947 // Then check to see if we should lower the memset with target-specific
3948 // code. If the target chooses to do this, this is the next best.
3950 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3952 if (Result.getNode())
3955 // Emit a library call.
3956 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3957 TargetLowering::ArgListTy Args;
3958 TargetLowering::ArgListEntry Entry;
3959 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3960 Args.push_back(Entry);
3961 // Extend or truncate the argument to be an i32 value for the call.
3962 if (Src.getValueType().bitsGT(MVT::i32))
3963 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3965 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3967 Entry.Ty = Type::getInt32Ty(*getContext());
3968 Entry.isSExt = true;
3969 Args.push_back(Entry);
3971 Entry.Ty = IntPtrTy;
3972 Entry.isSExt = false;
3973 Args.push_back(Entry);
3974 // FIXME: pass in DebugLoc
3976 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3977 false, false, false, false, 0,
3978 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3979 /*isTailCall=*/false,
3980 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3981 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3982 TLI.getPointerTy()),
3984 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3986 return CallResult.second;
3989 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3990 SDValue Chain, SDValue Ptr, SDValue Cmp,
3991 SDValue Swp, MachinePointerInfo PtrInfo,
3993 AtomicOrdering Ordering,
3994 SynchronizationScope SynchScope) {
3995 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3996 Alignment = getEVTAlignment(MemVT);
3998 MachineFunction &MF = getMachineFunction();
4000 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
4001 // For now, atomics are considered to be volatile always.
4002 // FIXME: Volatile isn't really correct; we should keep track of atomic
4003 // orderings in the memoperand.
4004 unsigned Flags = MachineMemOperand::MOVolatile;
4005 if (Opcode != ISD::ATOMIC_STORE)
4006 Flags |= MachineMemOperand::MOLoad;
4007 if (Opcode != ISD::ATOMIC_LOAD)
4008 Flags |= MachineMemOperand::MOStore;
4010 MachineMemOperand *MMO =
4011 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4013 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4014 Ordering, SynchScope);
4017 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4019 SDValue Ptr, SDValue Cmp,
4020 SDValue Swp, MachineMemOperand *MMO,
4021 AtomicOrdering Ordering,
4022 SynchronizationScope SynchScope) {
4023 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4024 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4026 EVT VT = Cmp.getValueType();
4028 SDVTList VTs = getVTList(VT, MVT::Other);
4029 FoldingSetNodeID ID;
4030 ID.AddInteger(MemVT.getRawBits());
4031 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4032 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4033 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4036 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4037 return SDValue(E, 0);
4039 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4040 Ptr, Cmp, Swp, MMO, Ordering,
4042 CSEMap.InsertNode(N, IP);
4043 AllNodes.push_back(N);
4044 return SDValue(N, 0);
4047 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4049 SDValue Ptr, SDValue Val,
4050 const Value* PtrVal,
4052 AtomicOrdering Ordering,
4053 SynchronizationScope SynchScope) {
4054 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4055 Alignment = getEVTAlignment(MemVT);
4057 MachineFunction &MF = getMachineFunction();
4058 // An atomic store does not load. An atomic load does not store.
4059 // (An atomicrmw obviously both loads and stores.)
4060 // For now, atomics are considered to be volatile always, and they are
4062 // FIXME: Volatile isn't really correct; we should keep track of atomic
4063 // orderings in the memoperand.
4064 unsigned Flags = MachineMemOperand::MOVolatile;
4065 if (Opcode != ISD::ATOMIC_STORE)
4066 Flags |= MachineMemOperand::MOLoad;
4067 if (Opcode != ISD::ATOMIC_LOAD)
4068 Flags |= MachineMemOperand::MOStore;
4070 MachineMemOperand *MMO =
4071 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4072 MemVT.getStoreSize(), Alignment);
4074 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4075 Ordering, SynchScope);
4078 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4080 SDValue Ptr, SDValue Val,
4081 MachineMemOperand *MMO,
4082 AtomicOrdering Ordering,
4083 SynchronizationScope SynchScope) {
4084 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4085 Opcode == ISD::ATOMIC_LOAD_SUB ||
4086 Opcode == ISD::ATOMIC_LOAD_AND ||
4087 Opcode == ISD::ATOMIC_LOAD_OR ||
4088 Opcode == ISD::ATOMIC_LOAD_XOR ||
4089 Opcode == ISD::ATOMIC_LOAD_NAND ||
4090 Opcode == ISD::ATOMIC_LOAD_MIN ||
4091 Opcode == ISD::ATOMIC_LOAD_MAX ||
4092 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4093 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4094 Opcode == ISD::ATOMIC_SWAP ||
4095 Opcode == ISD::ATOMIC_STORE) &&
4096 "Invalid Atomic Op");
4098 EVT VT = Val.getValueType();
4100 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4101 getVTList(VT, MVT::Other);
4102 FoldingSetNodeID ID;
4103 ID.AddInteger(MemVT.getRawBits());
4104 SDValue Ops[] = {Chain, Ptr, Val};
4105 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4106 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4109 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4110 return SDValue(E, 0);
4112 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4114 Ordering, SynchScope);
4115 CSEMap.InsertNode(N, IP);
4116 AllNodes.push_back(N);
4117 return SDValue(N, 0);
4120 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4121 EVT VT, SDValue Chain,
4123 const Value* PtrVal,
4125 AtomicOrdering Ordering,
4126 SynchronizationScope SynchScope) {
4127 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4128 Alignment = getEVTAlignment(MemVT);
4130 MachineFunction &MF = getMachineFunction();
4131 // An atomic store does not load. An atomic load does not store.
4132 // (An atomicrmw obviously both loads and stores.)
4133 // For now, atomics are considered to be volatile always, and they are
4135 // FIXME: Volatile isn't really correct; we should keep track of atomic
4136 // orderings in the memoperand.
4137 unsigned Flags = MachineMemOperand::MOVolatile;
4138 if (Opcode != ISD::ATOMIC_STORE)
4139 Flags |= MachineMemOperand::MOLoad;
4140 if (Opcode != ISD::ATOMIC_LOAD)
4141 Flags |= MachineMemOperand::MOStore;
4143 MachineMemOperand *MMO =
4144 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4145 MemVT.getStoreSize(), Alignment);
4147 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4148 Ordering, SynchScope);
4151 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4152 EVT VT, SDValue Chain,
4154 MachineMemOperand *MMO,
4155 AtomicOrdering Ordering,
4156 SynchronizationScope SynchScope) {
4157 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4159 SDVTList VTs = getVTList(VT, MVT::Other);
4160 FoldingSetNodeID ID;
4161 ID.AddInteger(MemVT.getRawBits());
4162 SDValue Ops[] = {Chain, Ptr};
4163 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4164 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4167 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4168 return SDValue(E, 0);
4170 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4171 Ptr, MMO, Ordering, SynchScope);
4172 CSEMap.InsertNode(N, IP);
4173 AllNodes.push_back(N);
4174 return SDValue(N, 0);
4177 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4178 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4183 SmallVector<EVT, 4> VTs;
4184 VTs.reserve(NumOps);
4185 for (unsigned i = 0; i < NumOps; ++i)
4186 VTs.push_back(Ops[i].getValueType());
4187 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4192 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4193 const EVT *VTs, unsigned NumVTs,
4194 const SDValue *Ops, unsigned NumOps,
4195 EVT MemVT, MachinePointerInfo PtrInfo,
4196 unsigned Align, bool Vol,
4197 bool ReadMem, bool WriteMem) {
4198 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4199 MemVT, PtrInfo, Align, Vol,
4204 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4205 const SDValue *Ops, unsigned NumOps,
4206 EVT MemVT, MachinePointerInfo PtrInfo,
4207 unsigned Align, bool Vol,
4208 bool ReadMem, bool WriteMem) {
4209 if (Align == 0) // Ensure that codegen never sees alignment 0
4210 Align = getEVTAlignment(MemVT);
4212 MachineFunction &MF = getMachineFunction();
4215 Flags |= MachineMemOperand::MOStore;
4217 Flags |= MachineMemOperand::MOLoad;
4219 Flags |= MachineMemOperand::MOVolatile;
4220 MachineMemOperand *MMO =
4221 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4223 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4227 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4228 const SDValue *Ops, unsigned NumOps,
4229 EVT MemVT, MachineMemOperand *MMO) {
4230 assert((Opcode == ISD::INTRINSIC_VOID ||
4231 Opcode == ISD::INTRINSIC_W_CHAIN ||
4232 Opcode == ISD::PREFETCH ||
4233 Opcode == ISD::LIFETIME_START ||
4234 Opcode == ISD::LIFETIME_END ||
4235 (Opcode <= INT_MAX &&
4236 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4237 "Opcode is not a memory-accessing opcode!");
4239 // Memoize the node unless it returns a flag.
4240 MemIntrinsicSDNode *N;
4241 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4242 FoldingSetNodeID ID;
4243 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4244 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4247 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4248 return SDValue(E, 0);
4251 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4253 CSEMap.InsertNode(N, IP);
4255 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4258 AllNodes.push_back(N);
4259 return SDValue(N, 0);
4262 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4263 /// MachinePointerInfo record from it. This is particularly useful because the
4264 /// code generator has many cases where it doesn't bother passing in a
4265 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4266 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4267 // If this is FI+Offset, we can model it.
4268 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4269 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4271 // If this is (FI+Offset1)+Offset2, we can model it.
4272 if (Ptr.getOpcode() != ISD::ADD ||
4273 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4274 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4275 return MachinePointerInfo();
4277 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4278 return MachinePointerInfo::getFixedStack(FI, Offset+
4279 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4282 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4283 /// MachinePointerInfo record from it. This is particularly useful because the
4284 /// code generator has many cases where it doesn't bother passing in a
4285 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4286 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4287 // If the 'Offset' value isn't a constant, we can't handle this.
4288 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4289 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4290 if (OffsetOp.getOpcode() == ISD::UNDEF)
4291 return InferPointerInfo(Ptr);
4292 return MachinePointerInfo();
4297 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4298 EVT VT, DebugLoc dl, SDValue Chain,
4299 SDValue Ptr, SDValue Offset,
4300 MachinePointerInfo PtrInfo, EVT MemVT,
4301 bool isVolatile, bool isNonTemporal, bool isInvariant,
4302 unsigned Alignment, const MDNode *TBAAInfo,
4303 const MDNode *Ranges) {
4304 assert(Chain.getValueType() == MVT::Other &&
4305 "Invalid chain type");
4306 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4307 Alignment = getEVTAlignment(VT);
4309 unsigned Flags = MachineMemOperand::MOLoad;
4311 Flags |= MachineMemOperand::MOVolatile;
4313 Flags |= MachineMemOperand::MONonTemporal;
4315 Flags |= MachineMemOperand::MOInvariant;
4317 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4320 PtrInfo = InferPointerInfo(Ptr, Offset);
4322 MachineFunction &MF = getMachineFunction();
4323 MachineMemOperand *MMO =
4324 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4326 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4330 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4331 EVT VT, DebugLoc dl, SDValue Chain,
4332 SDValue Ptr, SDValue Offset, EVT MemVT,
4333 MachineMemOperand *MMO) {
4335 ExtType = ISD::NON_EXTLOAD;
4336 } else if (ExtType == ISD::NON_EXTLOAD) {
4337 assert(VT == MemVT && "Non-extending load from different memory type!");
4340 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4341 "Should only be an extending load, not truncating!");
4342 assert(VT.isInteger() == MemVT.isInteger() &&
4343 "Cannot convert from FP to Int or Int -> FP!");
4344 assert(VT.isVector() == MemVT.isVector() &&
4345 "Cannot use trunc store to convert to or from a vector!");
4346 assert((!VT.isVector() ||
4347 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4348 "Cannot use trunc store to change the number of vector elements!");
4351 bool Indexed = AM != ISD::UNINDEXED;
4352 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4353 "Unindexed load with an offset!");
4355 SDVTList VTs = Indexed ?
4356 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4357 SDValue Ops[] = { Chain, Ptr, Offset };
4358 FoldingSetNodeID ID;
4359 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4360 ID.AddInteger(MemVT.getRawBits());
4361 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4362 MMO->isNonTemporal(),
4363 MMO->isInvariant()));
4364 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4367 cast<LoadSDNode>(E)->refineAlignment(MMO);
4368 return SDValue(E, 0);
4370 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4372 CSEMap.InsertNode(N, IP);
4373 AllNodes.push_back(N);
4374 return SDValue(N, 0);
4377 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4378 SDValue Chain, SDValue Ptr,
4379 MachinePointerInfo PtrInfo,
4380 bool isVolatile, bool isNonTemporal,
4381 bool isInvariant, unsigned Alignment,
4382 const MDNode *TBAAInfo,
4383 const MDNode *Ranges) {
4384 SDValue Undef = getUNDEF(Ptr.getValueType());
4385 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4386 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4390 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4391 SDValue Chain, SDValue Ptr,
4392 MachinePointerInfo PtrInfo, EVT MemVT,
4393 bool isVolatile, bool isNonTemporal,
4394 unsigned Alignment, const MDNode *TBAAInfo) {
4395 SDValue Undef = getUNDEF(Ptr.getValueType());
4396 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4397 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4403 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4404 SDValue Offset, ISD::MemIndexedMode AM) {
4405 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4406 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4407 "Load is already a indexed load!");
4408 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4409 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4410 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4411 false, LD->getAlignment());
4414 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4415 SDValue Ptr, MachinePointerInfo PtrInfo,
4416 bool isVolatile, bool isNonTemporal,
4417 unsigned Alignment, const MDNode *TBAAInfo) {
4418 assert(Chain.getValueType() == MVT::Other &&
4419 "Invalid chain type");
4420 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4421 Alignment = getEVTAlignment(Val.getValueType());
4423 unsigned Flags = MachineMemOperand::MOStore;
4425 Flags |= MachineMemOperand::MOVolatile;
4427 Flags |= MachineMemOperand::MONonTemporal;
4430 PtrInfo = InferPointerInfo(Ptr);
4432 MachineFunction &MF = getMachineFunction();
4433 MachineMemOperand *MMO =
4434 MF.getMachineMemOperand(PtrInfo, Flags,
4435 Val.getValueType().getStoreSize(), Alignment,
4438 return getStore(Chain, dl, Val, Ptr, MMO);
4441 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4442 SDValue Ptr, MachineMemOperand *MMO) {
4443 assert(Chain.getValueType() == MVT::Other &&
4444 "Invalid chain type");
4445 EVT VT = Val.getValueType();
4446 SDVTList VTs = getVTList(MVT::Other);
4447 SDValue Undef = getUNDEF(Ptr.getValueType());
4448 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4449 FoldingSetNodeID ID;
4450 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4451 ID.AddInteger(VT.getRawBits());
4452 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4453 MMO->isNonTemporal(), MMO->isInvariant()));
4454 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4457 cast<StoreSDNode>(E)->refineAlignment(MMO);
4458 return SDValue(E, 0);
4460 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4462 CSEMap.InsertNode(N, IP);
4463 AllNodes.push_back(N);
4464 return SDValue(N, 0);
4467 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4468 SDValue Ptr, MachinePointerInfo PtrInfo,
4469 EVT SVT,bool isVolatile, bool isNonTemporal,
4471 const MDNode *TBAAInfo) {
4472 assert(Chain.getValueType() == MVT::Other &&
4473 "Invalid chain type");
4474 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4475 Alignment = getEVTAlignment(SVT);
4477 unsigned Flags = MachineMemOperand::MOStore;
4479 Flags |= MachineMemOperand::MOVolatile;
4481 Flags |= MachineMemOperand::MONonTemporal;
4484 PtrInfo = InferPointerInfo(Ptr);
4486 MachineFunction &MF = getMachineFunction();
4487 MachineMemOperand *MMO =
4488 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4491 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4494 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4495 SDValue Ptr, EVT SVT,
4496 MachineMemOperand *MMO) {
4497 EVT VT = Val.getValueType();
4499 assert(Chain.getValueType() == MVT::Other &&
4500 "Invalid chain type");
4502 return getStore(Chain, dl, Val, Ptr, MMO);
4504 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4505 "Should only be a truncating store, not extending!");
4506 assert(VT.isInteger() == SVT.isInteger() &&
4507 "Can't do FP-INT conversion!");
4508 assert(VT.isVector() == SVT.isVector() &&
4509 "Cannot use trunc store to convert to or from a vector!");
4510 assert((!VT.isVector() ||
4511 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4512 "Cannot use trunc store to change the number of vector elements!");
4514 SDVTList VTs = getVTList(MVT::Other);
4515 SDValue Undef = getUNDEF(Ptr.getValueType());
4516 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4517 FoldingSetNodeID ID;
4518 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4519 ID.AddInteger(SVT.getRawBits());
4520 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4521 MMO->isNonTemporal(), MMO->isInvariant()));
4522 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4524 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4525 cast<StoreSDNode>(E)->refineAlignment(MMO);
4526 return SDValue(E, 0);
4528 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4530 CSEMap.InsertNode(N, IP);
4531 AllNodes.push_back(N);
4532 return SDValue(N, 0);
4536 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4537 SDValue Offset, ISD::MemIndexedMode AM) {
4538 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4539 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4540 "Store is already a indexed store!");
4541 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4542 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4543 FoldingSetNodeID ID;
4544 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4545 ID.AddInteger(ST->getMemoryVT().getRawBits());
4546 ID.AddInteger(ST->getRawSubclassData());
4547 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4549 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4550 return SDValue(E, 0);
4552 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4553 ST->isTruncatingStore(),
4555 ST->getMemOperand());
4556 CSEMap.InsertNode(N, IP);
4557 AllNodes.push_back(N);
4558 return SDValue(N, 0);
4561 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4562 SDValue Chain, SDValue Ptr,
4565 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4566 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4569 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4570 const SDUse *Ops, unsigned NumOps) {
4572 case 0: return getNode(Opcode, DL, VT);
4573 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4574 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4575 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4579 // Copy from an SDUse array into an SDValue array for use with
4580 // the regular getNode logic.
4581 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4582 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4585 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4586 const SDValue *Ops, unsigned NumOps) {
4588 case 0: return getNode(Opcode, DL, VT);
4589 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4590 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4591 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4597 case ISD::SELECT_CC: {
4598 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4599 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4600 "LHS and RHS of condition must have same type!");
4601 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4602 "True and False arms of SelectCC must have same type!");
4603 assert(Ops[2].getValueType() == VT &&
4604 "select_cc node must be of same type as true and false value!");
4608 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4609 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4610 "LHS/RHS of comparison should match types!");
4617 SDVTList VTs = getVTList(VT);
4619 if (VT != MVT::Glue) {
4620 FoldingSetNodeID ID;
4621 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4625 return SDValue(E, 0);
4627 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4628 CSEMap.InsertNode(N, IP);
4630 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4633 AllNodes.push_back(N);
4637 return SDValue(N, 0);
4640 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4641 const std::vector<EVT> &ResultTys,
4642 const SDValue *Ops, unsigned NumOps) {
4643 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4647 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4648 const EVT *VTs, unsigned NumVTs,
4649 const SDValue *Ops, unsigned NumOps) {
4651 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4652 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4655 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4656 const SDValue *Ops, unsigned NumOps) {
4657 if (VTList.NumVTs == 1)
4658 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4662 // FIXME: figure out how to safely handle things like
4663 // int foo(int x) { return 1 << (x & 255); }
4664 // int bar() { return foo(256); }
4665 case ISD::SRA_PARTS:
4666 case ISD::SRL_PARTS:
4667 case ISD::SHL_PARTS:
4668 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4669 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4670 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4671 else if (N3.getOpcode() == ISD::AND)
4672 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4673 // If the and is only masking out bits that cannot effect the shift,
4674 // eliminate the and.
4675 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4676 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4677 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4683 // Memoize the node unless it returns a flag.
4685 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4686 FoldingSetNodeID ID;
4687 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4689 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4690 return SDValue(E, 0);
4693 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4694 } else if (NumOps == 2) {
4695 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4696 } else if (NumOps == 3) {
4697 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4700 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4702 CSEMap.InsertNode(N, IP);
4705 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4706 } else if (NumOps == 2) {
4707 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4708 } else if (NumOps == 3) {
4709 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4712 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4715 AllNodes.push_back(N);
4719 return SDValue(N, 0);
4722 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4723 return getNode(Opcode, DL, VTList, 0, 0);
4726 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4728 SDValue Ops[] = { N1 };
4729 return getNode(Opcode, DL, VTList, Ops, 1);
4732 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4733 SDValue N1, SDValue N2) {
4734 SDValue Ops[] = { N1, N2 };
4735 return getNode(Opcode, DL, VTList, Ops, 2);
4738 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4739 SDValue N1, SDValue N2, SDValue N3) {
4740 SDValue Ops[] = { N1, N2, N3 };
4741 return getNode(Opcode, DL, VTList, Ops, 3);
4744 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4745 SDValue N1, SDValue N2, SDValue N3,
4747 SDValue Ops[] = { N1, N2, N3, N4 };
4748 return getNode(Opcode, DL, VTList, Ops, 4);
4751 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4752 SDValue N1, SDValue N2, SDValue N3,
4753 SDValue N4, SDValue N5) {
4754 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4755 return getNode(Opcode, DL, VTList, Ops, 5);
4758 SDVTList SelectionDAG::getVTList(EVT VT) {
4759 return makeVTList(SDNode::getValueTypeList(VT), 1);
4762 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4763 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4764 E = VTList.rend(); I != E; ++I)
4765 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4768 EVT *Array = Allocator.Allocate<EVT>(2);
4771 SDVTList Result = makeVTList(Array, 2);
4772 VTList.push_back(Result);
4776 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4777 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4778 E = VTList.rend(); I != E; ++I)
4779 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4783 EVT *Array = Allocator.Allocate<EVT>(3);
4787 SDVTList Result = makeVTList(Array, 3);
4788 VTList.push_back(Result);
4792 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4793 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4794 E = VTList.rend(); I != E; ++I)
4795 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4796 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4799 EVT *Array = Allocator.Allocate<EVT>(4);
4804 SDVTList Result = makeVTList(Array, 4);
4805 VTList.push_back(Result);
4809 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4811 case 0: llvm_unreachable("Cannot have nodes without results!");
4812 case 1: return getVTList(VTs[0]);
4813 case 2: return getVTList(VTs[0], VTs[1]);
4814 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4815 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4819 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4820 E = VTList.rend(); I != E; ++I) {
4821 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4824 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4828 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4829 std::copy(VTs, VTs+NumVTs, Array);
4830 SDVTList Result = makeVTList(Array, NumVTs);
4831 VTList.push_back(Result);
4836 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4837 /// specified operands. If the resultant node already exists in the DAG,
4838 /// this does not modify the specified node, instead it returns the node that
4839 /// already exists. If the resultant node does not exist in the DAG, the
4840 /// input node is returned. As a degenerate case, if you specify the same
4841 /// input operands as the node already has, the input node is returned.
4842 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4843 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4845 // Check to see if there is no change.
4846 if (Op == N->getOperand(0)) return N;
4848 // See if the modified node already exists.
4849 void *InsertPos = 0;
4850 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4853 // Nope it doesn't. Remove the node from its current place in the maps.
4855 if (!RemoveNodeFromCSEMaps(N))
4858 // Now we update the operands.
4859 N->OperandList[0].set(Op);
4861 // If this gets put into a CSE map, add it.
4862 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4866 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4867 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4869 // Check to see if there is no change.
4870 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4871 return N; // No operands changed, just return the input node.
4873 // See if the modified node already exists.
4874 void *InsertPos = 0;
4875 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4878 // Nope it doesn't. Remove the node from its current place in the maps.
4880 if (!RemoveNodeFromCSEMaps(N))
4883 // Now we update the operands.
4884 if (N->OperandList[0] != Op1)
4885 N->OperandList[0].set(Op1);
4886 if (N->OperandList[1] != Op2)
4887 N->OperandList[1].set(Op2);
4889 // If this gets put into a CSE map, add it.
4890 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4894 SDNode *SelectionDAG::
4895 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4896 SDValue Ops[] = { Op1, Op2, Op3 };
4897 return UpdateNodeOperands(N, Ops, 3);
4900 SDNode *SelectionDAG::
4901 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4902 SDValue Op3, SDValue Op4) {
4903 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4904 return UpdateNodeOperands(N, Ops, 4);
4907 SDNode *SelectionDAG::
4908 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4909 SDValue Op3, SDValue Op4, SDValue Op5) {
4910 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4911 return UpdateNodeOperands(N, Ops, 5);
4914 SDNode *SelectionDAG::
4915 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4916 assert(N->getNumOperands() == NumOps &&
4917 "Update with wrong number of operands");
4919 // Check to see if there is no change.
4920 bool AnyChange = false;
4921 for (unsigned i = 0; i != NumOps; ++i) {
4922 if (Ops[i] != N->getOperand(i)) {
4928 // No operands changed, just return the input node.
4929 if (!AnyChange) return N;
4931 // See if the modified node already exists.
4932 void *InsertPos = 0;
4933 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4936 // Nope it doesn't. Remove the node from its current place in the maps.
4938 if (!RemoveNodeFromCSEMaps(N))
4941 // Now we update the operands.
4942 for (unsigned i = 0; i != NumOps; ++i)
4943 if (N->OperandList[i] != Ops[i])
4944 N->OperandList[i].set(Ops[i]);
4946 // If this gets put into a CSE map, add it.
4947 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4951 /// DropOperands - Release the operands and set this node to have
4953 void SDNode::DropOperands() {
4954 // Unlike the code in MorphNodeTo that does this, we don't need to
4955 // watch for dead nodes here.
4956 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4962 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4965 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4967 SDVTList VTs = getVTList(VT);
4968 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4971 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4972 EVT VT, SDValue Op1) {
4973 SDVTList VTs = getVTList(VT);
4974 SDValue Ops[] = { Op1 };
4975 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4978 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4979 EVT VT, SDValue Op1,
4981 SDVTList VTs = getVTList(VT);
4982 SDValue Ops[] = { Op1, Op2 };
4983 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4986 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4987 EVT VT, SDValue Op1,
4988 SDValue Op2, SDValue Op3) {
4989 SDVTList VTs = getVTList(VT);
4990 SDValue Ops[] = { Op1, Op2, Op3 };
4991 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4994 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4995 EVT VT, const SDValue *Ops,
4997 SDVTList VTs = getVTList(VT);
4998 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5001 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5002 EVT VT1, EVT VT2, const SDValue *Ops,
5004 SDVTList VTs = getVTList(VT1, VT2);
5005 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5008 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5010 SDVTList VTs = getVTList(VT1, VT2);
5011 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5014 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5015 EVT VT1, EVT VT2, EVT VT3,
5016 const SDValue *Ops, unsigned NumOps) {
5017 SDVTList VTs = getVTList(VT1, VT2, VT3);
5018 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5021 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5022 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5023 const SDValue *Ops, unsigned NumOps) {
5024 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5025 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5028 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5031 SDVTList VTs = getVTList(VT1, VT2);
5032 SDValue Ops[] = { Op1 };
5033 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5036 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5038 SDValue Op1, SDValue Op2) {
5039 SDVTList VTs = getVTList(VT1, VT2);
5040 SDValue Ops[] = { Op1, Op2 };
5041 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5044 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5046 SDValue Op1, SDValue Op2,
5048 SDVTList VTs = getVTList(VT1, VT2);
5049 SDValue Ops[] = { Op1, Op2, Op3 };
5050 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5053 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5054 EVT VT1, EVT VT2, EVT VT3,
5055 SDValue Op1, SDValue Op2,
5057 SDVTList VTs = getVTList(VT1, VT2, VT3);
5058 SDValue Ops[] = { Op1, Op2, Op3 };
5059 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5062 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5063 SDVTList VTs, const SDValue *Ops,
5065 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5066 // Reset the NodeID to -1.
5071 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5072 /// the line number information on the merged node since it is not possible to
5073 /// preserve the information that operation is associated with multiple lines.
5074 /// This will make the debugger working better at -O0, were there is a higher
5075 /// probability having other instructions associated with that line.
5077 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5078 DebugLoc NLoc = N->getDebugLoc();
5079 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5080 N->setDebugLoc(DebugLoc());
5085 /// MorphNodeTo - This *mutates* the specified node to have the specified
5086 /// return type, opcode, and operands.
5088 /// Note that MorphNodeTo returns the resultant node. If there is already a
5089 /// node of the specified opcode and operands, it returns that node instead of
5090 /// the current one. Note that the DebugLoc need not be the same.
5092 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5093 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5094 /// node, and because it doesn't require CSE recalculation for any of
5095 /// the node's users.
5097 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5098 SDVTList VTs, const SDValue *Ops,
5100 // If an identical node already exists, use it.
5102 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5103 FoldingSetNodeID ID;
5104 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5105 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5106 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5109 if (!RemoveNodeFromCSEMaps(N))
5112 // Start the morphing.
5114 N->ValueList = VTs.VTs;
5115 N->NumValues = VTs.NumVTs;
5117 // Clear the operands list, updating used nodes to remove this from their
5118 // use list. Keep track of any operands that become dead as a result.
5119 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5120 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5122 SDNode *Used = Use.getNode();
5124 if (Used->use_empty())
5125 DeadNodeSet.insert(Used);
5128 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5129 // Initialize the memory references information.
5130 MN->setMemRefs(0, 0);
5131 // If NumOps is larger than the # of operands we can have in a
5132 // MachineSDNode, reallocate the operand list.
5133 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5134 if (MN->OperandsNeedDelete)
5135 delete[] MN->OperandList;
5136 if (NumOps > array_lengthof(MN->LocalOperands))
5137 // We're creating a final node that will live unmorphed for the
5138 // remainder of the current SelectionDAG iteration, so we can allocate
5139 // the operands directly out of a pool with no recycling metadata.
5140 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5143 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5144 MN->OperandsNeedDelete = false;
5146 MN->InitOperands(MN->OperandList, Ops, NumOps);
5148 // If NumOps is larger than the # of operands we currently have, reallocate
5149 // the operand list.
5150 if (NumOps > N->NumOperands) {
5151 if (N->OperandsNeedDelete)
5152 delete[] N->OperandList;
5153 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5154 N->OperandsNeedDelete = true;
5156 N->InitOperands(N->OperandList, Ops, NumOps);
5159 // Delete any nodes that are still dead after adding the uses for the
5161 if (!DeadNodeSet.empty()) {
5162 SmallVector<SDNode *, 16> DeadNodes;
5163 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5164 E = DeadNodeSet.end(); I != E; ++I)
5165 if ((*I)->use_empty())
5166 DeadNodes.push_back(*I);
5167 RemoveDeadNodes(DeadNodes);
5171 CSEMap.InsertNode(N, IP); // Memoize the new node.
5176 /// getMachineNode - These are used for target selectors to create a new node
5177 /// with specified return type(s), MachineInstr opcode, and operands.
5179 /// Note that getMachineNode returns the resultant node. If there is already a
5180 /// node of the specified opcode and operands, it returns that node instead of
5181 /// the current one.
5183 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5184 SDVTList VTs = getVTList(VT);
5185 return getMachineNode(Opcode, dl, VTs, 0, 0);
5189 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5190 SDVTList VTs = getVTList(VT);
5191 SDValue Ops[] = { Op1 };
5192 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5196 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5197 SDValue Op1, SDValue Op2) {
5198 SDVTList VTs = getVTList(VT);
5199 SDValue Ops[] = { Op1, Op2 };
5200 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5204 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5205 SDValue Op1, SDValue Op2, SDValue Op3) {
5206 SDVTList VTs = getVTList(VT);
5207 SDValue Ops[] = { Op1, Op2, Op3 };
5208 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5212 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5213 const SDValue *Ops, unsigned NumOps) {
5214 SDVTList VTs = getVTList(VT);
5215 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5219 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5220 SDVTList VTs = getVTList(VT1, VT2);
5221 return getMachineNode(Opcode, dl, VTs, 0, 0);
5225 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5226 EVT VT1, EVT VT2, SDValue Op1) {
5227 SDVTList VTs = getVTList(VT1, VT2);
5228 SDValue Ops[] = { Op1 };
5229 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5233 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5234 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5235 SDVTList VTs = getVTList(VT1, VT2);
5236 SDValue Ops[] = { Op1, Op2 };
5237 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5241 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5242 EVT VT1, EVT VT2, SDValue Op1,
5243 SDValue Op2, SDValue Op3) {
5244 SDVTList VTs = getVTList(VT1, VT2);
5245 SDValue Ops[] = { Op1, Op2, Op3 };
5246 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5250 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5252 const SDValue *Ops, unsigned NumOps) {
5253 SDVTList VTs = getVTList(VT1, VT2);
5254 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5258 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5259 EVT VT1, EVT VT2, EVT VT3,
5260 SDValue Op1, SDValue Op2) {
5261 SDVTList VTs = getVTList(VT1, VT2, VT3);
5262 SDValue Ops[] = { Op1, Op2 };
5263 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5267 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5268 EVT VT1, EVT VT2, EVT VT3,
5269 SDValue Op1, SDValue Op2, SDValue Op3) {
5270 SDVTList VTs = getVTList(VT1, VT2, VT3);
5271 SDValue Ops[] = { Op1, Op2, Op3 };
5272 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5276 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5277 EVT VT1, EVT VT2, EVT VT3,
5278 const SDValue *Ops, unsigned NumOps) {
5279 SDVTList VTs = getVTList(VT1, VT2, VT3);
5280 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5284 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5285 EVT VT2, EVT VT3, EVT VT4,
5286 const SDValue *Ops, unsigned NumOps) {
5287 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5288 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5292 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5293 const std::vector<EVT> &ResultTys,
5294 const SDValue *Ops, unsigned NumOps) {
5295 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5296 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5300 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5301 const SDValue *Ops, unsigned NumOps) {
5302 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5307 FoldingSetNodeID ID;
5308 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5310 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5311 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5315 // Allocate a new MachineSDNode.
5316 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5318 // Initialize the operands list.
5319 if (NumOps > array_lengthof(N->LocalOperands))
5320 // We're creating a final node that will live unmorphed for the
5321 // remainder of the current SelectionDAG iteration, so we can allocate
5322 // the operands directly out of a pool with no recycling metadata.
5323 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5326 N->InitOperands(N->LocalOperands, Ops, NumOps);
5327 N->OperandsNeedDelete = false;
5330 CSEMap.InsertNode(N, IP);
5332 AllNodes.push_back(N);
5334 VerifyMachineNode(N);
5339 /// getTargetExtractSubreg - A convenience function for creating
5340 /// TargetOpcode::EXTRACT_SUBREG nodes.
5342 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5344 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5345 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5346 VT, Operand, SRIdxVal);
5347 return SDValue(Subreg, 0);
5350 /// getTargetInsertSubreg - A convenience function for creating
5351 /// TargetOpcode::INSERT_SUBREG nodes.
5353 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5354 SDValue Operand, SDValue Subreg) {
5355 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5356 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5357 VT, Operand, Subreg, SRIdxVal);
5358 return SDValue(Result, 0);
5361 /// getNodeIfExists - Get the specified node if it's already available, or
5362 /// else return NULL.
5363 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5364 const SDValue *Ops, unsigned NumOps) {
5365 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5366 FoldingSetNodeID ID;
5367 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5375 /// getDbgValue - Creates a SDDbgValue node.
5378 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5379 DebugLoc DL, unsigned O) {
5380 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5384 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5385 DebugLoc DL, unsigned O) {
5386 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5390 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5391 DebugLoc DL, unsigned O) {
5392 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5397 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5398 /// pointed to by a use iterator is deleted, increment the use iterator
5399 /// so that it doesn't dangle.
5401 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5402 SDNode::use_iterator &UI;
5403 SDNode::use_iterator &UE;
5405 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5406 // Increment the iterator as needed.
5407 while (UI != UE && N == *UI)
5412 RAUWUpdateListener(SelectionDAG &d,
5413 SDNode::use_iterator &ui,
5414 SDNode::use_iterator &ue)
5415 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5420 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5421 /// This can cause recursive merging of nodes in the DAG.
5423 /// This version assumes From has a single result value.
5425 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5426 SDNode *From = FromN.getNode();
5427 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5428 "Cannot replace with this method!");
5429 assert(From != To.getNode() && "Cannot replace uses of with self");
5431 // Iterate over all the existing uses of From. New uses will be added
5432 // to the beginning of the use list, which we avoid visiting.
5433 // This specifically avoids visiting uses of From that arise while the
5434 // replacement is happening, because any such uses would be the result
5435 // of CSE: If an existing node looks like From after one of its operands
5436 // is replaced by To, we don't want to replace of all its users with To
5437 // too. See PR3018 for more info.
5438 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5439 RAUWUpdateListener Listener(*this, UI, UE);
5443 // This node is about to morph, remove its old self from the CSE maps.
5444 RemoveNodeFromCSEMaps(User);
5446 // A user can appear in a use list multiple times, and when this
5447 // happens the uses are usually next to each other in the list.
5448 // To help reduce the number of CSE recomputations, process all
5449 // the uses of this user that we can find this way.
5451 SDUse &Use = UI.getUse();
5454 } while (UI != UE && *UI == User);
5456 // Now that we have modified User, add it back to the CSE maps. If it
5457 // already exists there, recursively merge the results together.
5458 AddModifiedNodeToCSEMaps(User);
5461 // If we just RAUW'd the root, take note.
5462 if (FromN == getRoot())
5466 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5467 /// This can cause recursive merging of nodes in the DAG.
5469 /// This version assumes that for each value of From, there is a
5470 /// corresponding value in To in the same position with the same type.
5472 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5474 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5475 assert((!From->hasAnyUseOfValue(i) ||
5476 From->getValueType(i) == To->getValueType(i)) &&
5477 "Cannot use this version of ReplaceAllUsesWith!");
5480 // Handle the trivial case.
5484 // Iterate over just the existing users of From. See the comments in
5485 // the ReplaceAllUsesWith above.
5486 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5487 RAUWUpdateListener Listener(*this, UI, UE);
5491 // This node is about to morph, remove its old self from the CSE maps.
5492 RemoveNodeFromCSEMaps(User);
5494 // A user can appear in a use list multiple times, and when this
5495 // happens the uses are usually next to each other in the list.
5496 // To help reduce the number of CSE recomputations, process all
5497 // the uses of this user that we can find this way.
5499 SDUse &Use = UI.getUse();
5502 } while (UI != UE && *UI == User);
5504 // Now that we have modified User, add it back to the CSE maps. If it
5505 // already exists there, recursively merge the results together.
5506 AddModifiedNodeToCSEMaps(User);
5509 // If we just RAUW'd the root, take note.
5510 if (From == getRoot().getNode())
5511 setRoot(SDValue(To, getRoot().getResNo()));
5514 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5515 /// This can cause recursive merging of nodes in the DAG.
5517 /// This version can replace From with any result values. To must match the
5518 /// number and types of values returned by From.
5519 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5520 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5521 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5523 // Iterate over just the existing users of From. See the comments in
5524 // the ReplaceAllUsesWith above.
5525 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5526 RAUWUpdateListener Listener(*this, UI, UE);
5530 // This node is about to morph, remove its old self from the CSE maps.
5531 RemoveNodeFromCSEMaps(User);
5533 // A user can appear in a use list multiple times, and when this
5534 // happens the uses are usually next to each other in the list.
5535 // To help reduce the number of CSE recomputations, process all
5536 // the uses of this user that we can find this way.
5538 SDUse &Use = UI.getUse();
5539 const SDValue &ToOp = To[Use.getResNo()];
5542 } while (UI != UE && *UI == User);
5544 // Now that we have modified User, add it back to the CSE maps. If it
5545 // already exists there, recursively merge the results together.
5546 AddModifiedNodeToCSEMaps(User);
5549 // If we just RAUW'd the root, take note.
5550 if (From == getRoot().getNode())
5551 setRoot(SDValue(To[getRoot().getResNo()]));
5554 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5555 /// uses of other values produced by From.getNode() alone. The Deleted
5556 /// vector is handled the same way as for ReplaceAllUsesWith.
5557 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5558 // Handle the really simple, really trivial case efficiently.
5559 if (From == To) return;
5561 // Handle the simple, trivial, case efficiently.
5562 if (From.getNode()->getNumValues() == 1) {
5563 ReplaceAllUsesWith(From, To);
5567 // Iterate over just the existing users of From. See the comments in
5568 // the ReplaceAllUsesWith above.
5569 SDNode::use_iterator UI = From.getNode()->use_begin(),
5570 UE = From.getNode()->use_end();
5571 RAUWUpdateListener Listener(*this, UI, UE);
5574 bool UserRemovedFromCSEMaps = false;
5576 // A user can appear in a use list multiple times, and when this
5577 // happens the uses are usually next to each other in the list.
5578 // To help reduce the number of CSE recomputations, process all
5579 // the uses of this user that we can find this way.
5581 SDUse &Use = UI.getUse();
5583 // Skip uses of different values from the same node.
5584 if (Use.getResNo() != From.getResNo()) {
5589 // If this node hasn't been modified yet, it's still in the CSE maps,
5590 // so remove its old self from the CSE maps.
5591 if (!UserRemovedFromCSEMaps) {
5592 RemoveNodeFromCSEMaps(User);
5593 UserRemovedFromCSEMaps = true;
5598 } while (UI != UE && *UI == User);
5600 // We are iterating over all uses of the From node, so if a use
5601 // doesn't use the specific value, no changes are made.
5602 if (!UserRemovedFromCSEMaps)
5605 // Now that we have modified User, add it back to the CSE maps. If it
5606 // already exists there, recursively merge the results together.
5607 AddModifiedNodeToCSEMaps(User);
5610 // If we just RAUW'd the root, take note.
5611 if (From == getRoot())
5616 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5617 /// to record information about a use.
5624 /// operator< - Sort Memos by User.
5625 bool operator<(const UseMemo &L, const UseMemo &R) {
5626 return (intptr_t)L.User < (intptr_t)R.User;
5630 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5631 /// uses of other values produced by From.getNode() alone. The same value
5632 /// may appear in both the From and To list. The Deleted vector is
5633 /// handled the same way as for ReplaceAllUsesWith.
5634 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5637 // Handle the simple, trivial case efficiently.
5639 return ReplaceAllUsesOfValueWith(*From, *To);
5641 // Read up all the uses and make records of them. This helps
5642 // processing new uses that are introduced during the
5643 // replacement process.
5644 SmallVector<UseMemo, 4> Uses;
5645 for (unsigned i = 0; i != Num; ++i) {
5646 unsigned FromResNo = From[i].getResNo();
5647 SDNode *FromNode = From[i].getNode();
5648 for (SDNode::use_iterator UI = FromNode->use_begin(),
5649 E = FromNode->use_end(); UI != E; ++UI) {
5650 SDUse &Use = UI.getUse();
5651 if (Use.getResNo() == FromResNo) {
5652 UseMemo Memo = { *UI, i, &Use };
5653 Uses.push_back(Memo);
5658 // Sort the uses, so that all the uses from a given User are together.
5659 std::sort(Uses.begin(), Uses.end());
5661 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5662 UseIndex != UseIndexEnd; ) {
5663 // We know that this user uses some value of From. If it is the right
5664 // value, update it.
5665 SDNode *User = Uses[UseIndex].User;
5667 // This node is about to morph, remove its old self from the CSE maps.
5668 RemoveNodeFromCSEMaps(User);
5670 // The Uses array is sorted, so all the uses for a given User
5671 // are next to each other in the list.
5672 // To help reduce the number of CSE recomputations, process all
5673 // the uses of this user that we can find this way.
5675 unsigned i = Uses[UseIndex].Index;
5676 SDUse &Use = *Uses[UseIndex].Use;
5680 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5682 // Now that we have modified User, add it back to the CSE maps. If it
5683 // already exists there, recursively merge the results together.
5684 AddModifiedNodeToCSEMaps(User);
5688 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5689 /// based on their topological order. It returns the maximum id and a vector
5690 /// of the SDNodes* in assigned order by reference.
5691 unsigned SelectionDAG::AssignTopologicalOrder() {
5693 unsigned DAGSize = 0;
5695 // SortedPos tracks the progress of the algorithm. Nodes before it are
5696 // sorted, nodes after it are unsorted. When the algorithm completes
5697 // it is at the end of the list.
5698 allnodes_iterator SortedPos = allnodes_begin();
5700 // Visit all the nodes. Move nodes with no operands to the front of
5701 // the list immediately. Annotate nodes that do have operands with their
5702 // operand count. Before we do this, the Node Id fields of the nodes
5703 // may contain arbitrary values. After, the Node Id fields for nodes
5704 // before SortedPos will contain the topological sort index, and the
5705 // Node Id fields for nodes At SortedPos and after will contain the
5706 // count of outstanding operands.
5707 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5710 unsigned Degree = N->getNumOperands();
5712 // A node with no uses, add it to the result array immediately.
5713 N->setNodeId(DAGSize++);
5714 allnodes_iterator Q = N;
5716 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5717 assert(SortedPos != AllNodes.end() && "Overran node list");
5720 // Temporarily use the Node Id as scratch space for the degree count.
5721 N->setNodeId(Degree);
5725 // Visit all the nodes. As we iterate, move nodes into sorted order,
5726 // such that by the time the end is reached all nodes will be sorted.
5727 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5730 // N is in sorted position, so all its uses have one less operand
5731 // that needs to be sorted.
5732 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5735 unsigned Degree = P->getNodeId();
5736 assert(Degree != 0 && "Invalid node degree");
5739 // All of P's operands are sorted, so P may sorted now.
5740 P->setNodeId(DAGSize++);
5742 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5743 assert(SortedPos != AllNodes.end() && "Overran node list");
5746 // Update P's outstanding operand count.
5747 P->setNodeId(Degree);
5750 if (I == SortedPos) {
5753 dbgs() << "Overran sorted position:\n";
5756 llvm_unreachable(0);
5760 assert(SortedPos == AllNodes.end() &&
5761 "Topological sort incomplete!");
5762 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5763 "First node in topological sort is not the entry token!");
5764 assert(AllNodes.front().getNodeId() == 0 &&
5765 "First node in topological sort has non-zero id!");
5766 assert(AllNodes.front().getNumOperands() == 0 &&
5767 "First node in topological sort has operands!");
5768 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5769 "Last node in topologic sort has unexpected id!");
5770 assert(AllNodes.back().use_empty() &&
5771 "Last node in topologic sort has users!");
5772 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5776 /// AssignOrdering - Assign an order to the SDNode.
5777 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5778 assert(SD && "Trying to assign an order to a null node!");
5779 Ordering->add(SD, Order);
5782 /// GetOrdering - Get the order for the SDNode.
5783 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5784 assert(SD && "Trying to get the order of a null node!");
5785 return Ordering->getOrder(SD);
5788 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5789 /// value is produced by SD.
5790 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5791 DbgInfo->add(DB, SD, isParameter);
5793 SD->setHasDebugValue(true);
5796 /// TransferDbgValues - Transfer SDDbgValues.
5797 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5798 if (From == To || !From.getNode()->getHasDebugValue())
5800 SDNode *FromNode = From.getNode();
5801 SDNode *ToNode = To.getNode();
5802 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5803 SmallVector<SDDbgValue *, 2> ClonedDVs;
5804 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5806 SDDbgValue *Dbg = *I;
5807 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5808 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5809 Dbg->getOffset(), Dbg->getDebugLoc(),
5811 ClonedDVs.push_back(Clone);
5814 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5815 E = ClonedDVs.end(); I != E; ++I)
5816 AddDbgValue(*I, ToNode, false);
5819 //===----------------------------------------------------------------------===//
5821 //===----------------------------------------------------------------------===//
5823 HandleSDNode::~HandleSDNode() {
5827 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5828 const GlobalValue *GA,
5829 EVT VT, int64_t o, unsigned char TF)
5830 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5834 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5835 MachineMemOperand *mmo)
5836 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5837 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5838 MMO->isNonTemporal(), MMO->isInvariant());
5839 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5840 assert(isNonTemporal() == MMO->isNonTemporal() &&
5841 "Non-temporal encoding error!");
5842 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5845 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5846 const SDValue *Ops, unsigned NumOps, EVT memvt,
5847 MachineMemOperand *mmo)
5848 : SDNode(Opc, dl, VTs, Ops, NumOps),
5849 MemoryVT(memvt), MMO(mmo) {
5850 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5851 MMO->isNonTemporal(), MMO->isInvariant());
5852 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5853 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5856 /// Profile - Gather unique data for the node.
5858 void SDNode::Profile(FoldingSetNodeID &ID) const {
5859 AddNodeIDNode(ID, this);
5864 std::vector<EVT> VTs;
5867 VTs.reserve(MVT::LAST_VALUETYPE);
5868 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5869 VTs.push_back(MVT((MVT::SimpleValueType)i));
5874 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5875 static ManagedStatic<EVTArray> SimpleVTArray;
5876 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5878 /// getValueTypeList - Return a pointer to the specified value type.
5880 const EVT *SDNode::getValueTypeList(EVT VT) {
5881 if (VT.isExtended()) {
5882 sys::SmartScopedLock<true> Lock(*VTMutex);
5883 return &(*EVTs->insert(VT).first);
5885 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5886 "Value type out of range!");
5887 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5891 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5892 /// indicated value. This method ignores uses of other values defined by this
5894 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5895 assert(Value < getNumValues() && "Bad value!");
5897 // TODO: Only iterate over uses of a given value of the node
5898 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5899 if (UI.getUse().getResNo() == Value) {
5906 // Found exactly the right number of uses?
5911 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5912 /// value. This method ignores uses of other values defined by this operation.
5913 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5914 assert(Value < getNumValues() && "Bad value!");
5916 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5917 if (UI.getUse().getResNo() == Value)
5924 /// isOnlyUserOf - Return true if this node is the only use of N.
5926 bool SDNode::isOnlyUserOf(SDNode *N) const {
5928 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5939 /// isOperand - Return true if this node is an operand of N.
5941 bool SDValue::isOperandOf(SDNode *N) const {
5942 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5943 if (*this == N->getOperand(i))
5948 bool SDNode::isOperandOf(SDNode *N) const {
5949 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5950 if (this == N->OperandList[i].getNode())
5955 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5956 /// be a chain) reaches the specified operand without crossing any
5957 /// side-effecting instructions on any chain path. In practice, this looks
5958 /// through token factors and non-volatile loads. In order to remain efficient,
5959 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5960 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5961 unsigned Depth) const {
5962 if (*this == Dest) return true;
5964 // Don't search too deeply, we just want to be able to see through
5965 // TokenFactor's etc.
5966 if (Depth == 0) return false;
5968 // If this is a token factor, all inputs to the TF happen in parallel. If any
5969 // of the operands of the TF does not reach dest, then we cannot do the xform.
5970 if (getOpcode() == ISD::TokenFactor) {
5971 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5972 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5977 // Loads don't have side effects, look through them.
5978 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5979 if (!Ld->isVolatile())
5980 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5985 /// hasPredecessor - Return true if N is a predecessor of this node.
5986 /// N is either an operand of this node, or can be reached by recursively
5987 /// traversing up the operands.
5988 /// NOTE: This is an expensive method. Use it carefully.
5989 bool SDNode::hasPredecessor(const SDNode *N) const {
5990 SmallPtrSet<const SDNode *, 32> Visited;
5991 SmallVector<const SDNode *, 16> Worklist;
5992 return hasPredecessorHelper(N, Visited, Worklist);
5995 bool SDNode::hasPredecessorHelper(const SDNode *N,
5996 SmallPtrSet<const SDNode *, 32> &Visited,
5997 SmallVector<const SDNode *, 16> &Worklist) const {
5998 if (Visited.empty()) {
5999 Worklist.push_back(this);
6001 // Take a look in the visited set. If we've already encountered this node
6002 // we needn't search further.
6003 if (Visited.count(N))
6007 // Haven't visited N yet. Continue the search.
6008 while (!Worklist.empty()) {
6009 const SDNode *M = Worklist.pop_back_val();
6010 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6011 SDNode *Op = M->getOperand(i).getNode();
6012 if (Visited.insert(Op))
6013 Worklist.push_back(Op);
6022 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6023 assert(Num < NumOperands && "Invalid child # of SDNode!");
6024 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6027 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6028 assert(N->getNumValues() == 1 &&
6029 "Can't unroll a vector with multiple results!");
6031 EVT VT = N->getValueType(0);
6032 unsigned NE = VT.getVectorNumElements();
6033 EVT EltVT = VT.getVectorElementType();
6034 DebugLoc dl = N->getDebugLoc();
6036 SmallVector<SDValue, 8> Scalars;
6037 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6039 // If ResNE is 0, fully unroll the vector op.
6042 else if (NE > ResNE)
6046 for (i= 0; i != NE; ++i) {
6047 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6048 SDValue Operand = N->getOperand(j);
6049 EVT OperandVT = Operand.getValueType();
6050 if (OperandVT.isVector()) {
6051 // A vector operand; extract a single element.
6052 EVT OperandEltVT = OperandVT.getVectorElementType();
6053 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6056 getConstant(i, TLI.getPointerTy()));
6058 // A scalar operand; just use it as is.
6059 Operands[j] = Operand;
6063 switch (N->getOpcode()) {
6065 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6066 &Operands[0], Operands.size()));
6069 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6070 &Operands[0], Operands.size()));
6077 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6078 getShiftAmountOperand(Operands[0].getValueType(),
6081 case ISD::SIGN_EXTEND_INREG:
6082 case ISD::FP_ROUND_INREG: {
6083 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6084 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6086 getValueType(ExtVT)));
6091 for (; i < ResNE; ++i)
6092 Scalars.push_back(getUNDEF(EltVT));
6094 return getNode(ISD::BUILD_VECTOR, dl,
6095 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6096 &Scalars[0], Scalars.size());
6100 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6101 /// location that is 'Dist' units away from the location that the 'Base' load
6102 /// is loading from.
6103 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6104 unsigned Bytes, int Dist) const {
6105 if (LD->getChain() != Base->getChain())
6107 EVT VT = LD->getValueType(0);
6108 if (VT.getSizeInBits() / 8 != Bytes)
6111 SDValue Loc = LD->getOperand(1);
6112 SDValue BaseLoc = Base->getOperand(1);
6113 if (Loc.getOpcode() == ISD::FrameIndex) {
6114 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6116 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6117 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6118 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6119 int FS = MFI->getObjectSize(FI);
6120 int BFS = MFI->getObjectSize(BFI);
6121 if (FS != BFS || FS != (int)Bytes) return false;
6122 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6126 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6127 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6130 const GlobalValue *GV1 = NULL;
6131 const GlobalValue *GV2 = NULL;
6132 int64_t Offset1 = 0;
6133 int64_t Offset2 = 0;
6134 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6135 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6136 if (isGA1 && isGA2 && GV1 == GV2)
6137 return Offset1 == (Offset2 + Dist*Bytes);
6142 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6143 /// it cannot be inferred.
6144 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6145 // If this is a GlobalAddress + cst, return the alignment.
6146 const GlobalValue *GV;
6147 int64_t GVOffset = 0;
6148 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6149 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6150 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6151 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6152 TLI.getDataLayout());
6153 unsigned AlignBits = KnownZero.countTrailingOnes();
6154 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6156 return MinAlign(Align, GVOffset);
6159 // If this is a direct reference to a stack slot, use information about the
6160 // stack slot's alignment.
6161 int FrameIdx = 1 << 31;
6162 int64_t FrameOffset = 0;
6163 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6164 FrameIdx = FI->getIndex();
6165 } else if (isBaseWithConstantOffset(Ptr) &&
6166 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6168 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6169 FrameOffset = Ptr.getConstantOperandVal(1);
6172 if (FrameIdx != (1 << 31)) {
6173 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6174 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6182 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6183 unsigned GlobalAddressSDNode::getAddressSpace() const {
6184 return getGlobal()->getType()->getAddressSpace();
6188 Type *ConstantPoolSDNode::getType() const {
6189 if (isMachineConstantPoolEntry())
6190 return Val.MachineCPVal->getType();
6191 return Val.ConstVal->getType();
6194 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6196 unsigned &SplatBitSize,
6198 unsigned MinSplatBits,
6200 EVT VT = getValueType(0);
6201 assert(VT.isVector() && "Expected a vector type");
6202 unsigned sz = VT.getSizeInBits();
6203 if (MinSplatBits > sz)
6206 SplatValue = APInt(sz, 0);
6207 SplatUndef = APInt(sz, 0);
6209 // Get the bits. Bits with undefined values (when the corresponding element
6210 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6211 // in SplatValue. If any of the values are not constant, give up and return
6213 unsigned int nOps = getNumOperands();
6214 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6215 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6217 for (unsigned j = 0; j < nOps; ++j) {
6218 unsigned i = isBigEndian ? nOps-1-j : j;
6219 SDValue OpVal = getOperand(i);
6220 unsigned BitPos = j * EltBitSize;
6222 if (OpVal.getOpcode() == ISD::UNDEF)
6223 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6224 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6225 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6226 zextOrTrunc(sz) << BitPos;
6227 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6228 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6233 // The build_vector is all constants or undefs. Find the smallest element
6234 // size that splats the vector.
6236 HasAnyUndefs = (SplatUndef != 0);
6239 unsigned HalfSize = sz / 2;
6240 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6241 APInt LowValue = SplatValue.trunc(HalfSize);
6242 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6243 APInt LowUndef = SplatUndef.trunc(HalfSize);
6245 // If the two halves do not match (ignoring undef bits), stop here.
6246 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6247 MinSplatBits > HalfSize)
6250 SplatValue = HighValue | LowValue;
6251 SplatUndef = HighUndef & LowUndef;
6260 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6261 // Find the first non-undef value in the shuffle mask.
6263 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6266 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6268 // Make sure all remaining elements are either undef or the same as the first
6270 for (int Idx = Mask[i]; i != e; ++i)
6271 if (Mask[i] >= 0 && Mask[i] != Idx)
6277 static void checkForCyclesHelper(const SDNode *N,
6278 SmallPtrSet<const SDNode*, 32> &Visited,
6279 SmallPtrSet<const SDNode*, 32> &Checked) {
6280 // If this node has already been checked, don't check it again.
6281 if (Checked.count(N))
6284 // If a node has already been visited on this depth-first walk, reject it as
6286 if (!Visited.insert(N)) {
6287 dbgs() << "Offending node:\n";
6289 errs() << "Detected cycle in SelectionDAG\n";
6293 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6294 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6301 void llvm::checkForCycles(const llvm::SDNode *N) {
6303 assert(N && "Checking nonexistant SDNode");
6304 SmallPtrSet<const SDNode*, 32> visited;
6305 SmallPtrSet<const SDNode*, 32> checked;
6306 checkForCyclesHelper(N, visited, checked);
6310 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6311 checkForCycles(DAG->getRoot().getNode());