1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/ManagedStatic.h"
35 #include "llvm/Support/MathExtras.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/System/Mutex.h"
38 #include "llvm/ADT/SetVector.h"
39 #include "llvm/ADT/SmallPtrSet.h"
40 #include "llvm/ADT/SmallSet.h"
41 #include "llvm/ADT/SmallVector.h"
42 #include "llvm/ADT/StringExtras.h"
47 /// makeVTList - Return an instance of the SDVTList struct initialized with the
48 /// specified members.
49 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
50 SDVTList Res = {VTs, NumVTs};
54 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
55 switch (VT.getSimpleVT()) {
56 default: assert(0 && "Unknown FP format");
57 case MVT::f32: return &APFloat::IEEEsingle;
58 case MVT::f64: return &APFloat::IEEEdouble;
59 case MVT::f80: return &APFloat::x87DoubleExtended;
60 case MVT::f128: return &APFloat::IEEEquad;
61 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
65 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(MVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // PPC long double cannot be converted to any other type.
84 if (VT == MVT::ppcf128 ||
85 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
88 // convert modifies in place, so make a copy.
89 APFloat Val2 = APFloat(Val);
91 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
96 //===----------------------------------------------------------------------===//
98 //===----------------------------------------------------------------------===//
100 /// isBuildVectorAllOnes - Return true if the specified node is a
101 /// BUILD_VECTOR where all of the elements are ~0 or undef.
102 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
103 // Look through a bit convert.
104 if (N->getOpcode() == ISD::BIT_CONVERT)
105 N = N->getOperand(0).getNode();
107 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
109 unsigned i = 0, e = N->getNumOperands();
111 // Skip over all of the undef values.
112 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
115 // Do not accept an all-undef vector.
116 if (i == e) return false;
118 // Do not accept build_vectors that aren't all constants or which have non-~0
120 SDValue NotZero = N->getOperand(i);
121 if (isa<ConstantSDNode>(NotZero)) {
122 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
124 } else if (isa<ConstantFPSDNode>(NotZero)) {
125 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
126 bitcastToAPInt().isAllOnesValue())
131 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 for (++i; i != e; ++i)
134 if (N->getOperand(i) != NotZero &&
135 N->getOperand(i).getOpcode() != ISD::UNDEF)
141 /// isBuildVectorAllZeros - Return true if the specified node is a
142 /// BUILD_VECTOR where all of the elements are 0 or undef.
143 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
144 // Look through a bit convert.
145 if (N->getOpcode() == ISD::BIT_CONVERT)
146 N = N->getOperand(0).getNode();
148 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
150 unsigned i = 0, e = N->getNumOperands();
152 // Skip over all of the undef values.
153 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
156 // Do not accept an all-undef vector.
157 if (i == e) return false;
159 // Do not accept build_vectors that aren't all constants or which have non-0
161 SDValue Zero = N->getOperand(i);
162 if (isa<ConstantSDNode>(Zero)) {
163 if (!cast<ConstantSDNode>(Zero)->isNullValue())
165 } else if (isa<ConstantFPSDNode>(Zero)) {
166 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
171 // Okay, we have at least one 0 value, check to see if the rest match or are
173 for (++i; i != e; ++i)
174 if (N->getOperand(i) != Zero &&
175 N->getOperand(i).getOpcode() != ISD::UNDEF)
180 /// isScalarToVector - Return true if the specified node is a
181 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
182 /// element is not an undef.
183 bool ISD::isScalarToVector(const SDNode *N) {
184 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
187 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
191 unsigned NumElems = N->getNumOperands();
192 for (unsigned i = 1; i < NumElems; ++i) {
193 SDValue V = N->getOperand(i);
194 if (V.getOpcode() != ISD::UNDEF)
201 /// isDebugLabel - Return true if the specified node represents a debug
202 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
203 bool ISD::isDebugLabel(const SDNode *N) {
205 if (N->getOpcode() == ISD::DBG_LABEL)
207 if (N->isMachineOpcode() &&
208 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
213 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
214 /// when given the operation for (X op Y).
215 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
216 // To perform this operation, we just need to swap the L and G bits of the
218 unsigned OldL = (Operation >> 2) & 1;
219 unsigned OldG = (Operation >> 1) & 1;
220 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
221 (OldL << 1) | // New G bit
222 (OldG << 2)); // New L bit.
225 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
226 /// 'op' is a valid SetCC operation.
227 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
228 unsigned Operation = Op;
230 Operation ^= 7; // Flip L, G, E bits, but not U.
232 Operation ^= 15; // Flip all of the condition bits.
234 if (Operation > ISD::SETTRUE2)
235 Operation &= ~8; // Don't let N and U bits get set.
237 return ISD::CondCode(Operation);
241 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
242 /// signed operation and 2 if the result is an unsigned comparison. Return zero
243 /// if the operation does not depend on the sign of the input (setne and seteq).
244 static int isSignedOp(ISD::CondCode Opcode) {
246 default: assert(0 && "Illegal integer setcc operation!");
248 case ISD::SETNE: return 0;
252 case ISD::SETGE: return 1;
256 case ISD::SETUGE: return 2;
260 /// getSetCCOrOperation - Return the result of a logical OR between different
261 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
262 /// returns SETCC_INVALID if it is not possible to represent the resultant
264 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
266 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
267 // Cannot fold a signed integer setcc with an unsigned integer setcc.
268 return ISD::SETCC_INVALID;
270 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
272 // If the N and U bits get set then the resultant comparison DOES suddenly
273 // care about orderedness, and is true when ordered.
274 if (Op > ISD::SETTRUE2)
275 Op &= ~16; // Clear the U bit if the N bit is set.
277 // Canonicalize illegal integer setcc's.
278 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
281 return ISD::CondCode(Op);
284 /// getSetCCAndOperation - Return the result of a logical AND between different
285 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
286 /// function returns zero if it is not possible to represent the resultant
288 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
290 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
291 // Cannot fold a signed setcc with an unsigned setcc.
292 return ISD::SETCC_INVALID;
294 // Combine all of the condition bits.
295 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
297 // Canonicalize illegal integer setcc's.
301 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
302 case ISD::SETOEQ: // SETEQ & SETU[LG]E
303 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
304 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
305 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
312 const TargetMachine &SelectionDAG::getTarget() const {
313 return MF->getTarget();
316 //===----------------------------------------------------------------------===//
317 // SDNode Profile Support
318 //===----------------------------------------------------------------------===//
320 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
322 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
326 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
327 /// solely with their pointer.
328 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
329 ID.AddPointer(VTList.VTs);
332 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
334 static void AddNodeIDOperands(FoldingSetNodeID &ID,
335 const SDValue *Ops, unsigned NumOps) {
336 for (; NumOps; --NumOps, ++Ops) {
337 ID.AddPointer(Ops->getNode());
338 ID.AddInteger(Ops->getResNo());
342 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
344 static void AddNodeIDOperands(FoldingSetNodeID &ID,
345 const SDUse *Ops, unsigned NumOps) {
346 for (; NumOps; --NumOps, ++Ops) {
347 ID.AddPointer(Ops->getNode());
348 ID.AddInteger(Ops->getResNo());
352 static void AddNodeIDNode(FoldingSetNodeID &ID,
353 unsigned short OpC, SDVTList VTList,
354 const SDValue *OpList, unsigned N) {
355 AddNodeIDOpcode(ID, OpC);
356 AddNodeIDValueTypes(ID, VTList);
357 AddNodeIDOperands(ID, OpList, N);
360 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
362 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
363 switch (N->getOpcode()) {
364 case ISD::TargetExternalSymbol:
365 case ISD::ExternalSymbol:
366 assert(0 && "Should only be used on nodes with operands");
367 default: break; // Normal nodes don't need extra info.
369 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
371 case ISD::TargetConstant:
373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
375 case ISD::TargetConstantFP:
376 case ISD::ConstantFP: {
377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
380 case ISD::TargetGlobalAddress:
381 case ISD::GlobalAddress:
382 case ISD::TargetGlobalTLSAddress:
383 case ISD::GlobalTLSAddress: {
384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
385 ID.AddPointer(GA->getGlobal());
386 ID.AddInteger(GA->getOffset());
387 ID.AddInteger(GA->getTargetFlags());
390 case ISD::BasicBlock:
391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
396 case ISD::DBG_STOPPOINT: {
397 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
398 ID.AddInteger(DSP->getLine());
399 ID.AddInteger(DSP->getColumn());
400 ID.AddPointer(DSP->getCompileUnit());
404 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
406 case ISD::MEMOPERAND: {
407 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
411 case ISD::FrameIndex:
412 case ISD::TargetFrameIndex:
413 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
416 case ISD::TargetJumpTable:
417 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
418 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
420 case ISD::ConstantPool:
421 case ISD::TargetConstantPool: {
422 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
423 ID.AddInteger(CP->getAlignment());
424 ID.AddInteger(CP->getOffset());
425 if (CP->isMachineConstantPoolEntry())
426 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
428 ID.AddPointer(CP->getConstVal());
429 ID.AddInteger(CP->getTargetFlags());
433 const CallSDNode *Call = cast<CallSDNode>(N);
434 ID.AddInteger(Call->getCallingConv());
435 ID.AddInteger(Call->isVarArg());
439 const LoadSDNode *LD = cast<LoadSDNode>(N);
440 ID.AddInteger(LD->getMemoryVT().getRawBits());
441 ID.AddInteger(LD->getRawSubclassData());
445 const StoreSDNode *ST = cast<StoreSDNode>(N);
446 ID.AddInteger(ST->getMemoryVT().getRawBits());
447 ID.AddInteger(ST->getRawSubclassData());
450 case ISD::ATOMIC_CMP_SWAP:
451 case ISD::ATOMIC_SWAP:
452 case ISD::ATOMIC_LOAD_ADD:
453 case ISD::ATOMIC_LOAD_SUB:
454 case ISD::ATOMIC_LOAD_AND:
455 case ISD::ATOMIC_LOAD_OR:
456 case ISD::ATOMIC_LOAD_XOR:
457 case ISD::ATOMIC_LOAD_NAND:
458 case ISD::ATOMIC_LOAD_MIN:
459 case ISD::ATOMIC_LOAD_MAX:
460 case ISD::ATOMIC_LOAD_UMIN:
461 case ISD::ATOMIC_LOAD_UMAX: {
462 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
463 ID.AddInteger(AT->getMemoryVT().getRawBits());
464 ID.AddInteger(AT->getRawSubclassData());
467 case ISD::VECTOR_SHUFFLE: {
468 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
469 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
471 ID.AddInteger(SVN->getMaskElt(i));
474 } // end switch (N->getOpcode())
477 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
479 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
480 AddNodeIDOpcode(ID, N->getOpcode());
481 // Add the return value info.
482 AddNodeIDValueTypes(ID, N->getVTList());
483 // Add the operand info.
484 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
486 // Handle SDNode leafs with special info.
487 AddNodeIDCustom(ID, N);
490 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
491 /// the CSE map that carries alignment, volatility, indexing mode, and
492 /// extension/truncation information.
494 static inline unsigned
495 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
496 bool isVolatile, unsigned Alignment) {
497 assert((ConvType & 3) == ConvType &&
498 "ConvType may not require more than 2 bits!");
499 assert((AM & 7) == AM &&
500 "AM may not require more than 3 bits!");
504 ((Log2_32(Alignment) + 1) << 6);
507 //===----------------------------------------------------------------------===//
508 // SelectionDAG Class
509 //===----------------------------------------------------------------------===//
511 /// doNotCSE - Return true if CSE should not be performed for this node.
512 static bool doNotCSE(SDNode *N) {
513 if (N->getValueType(0) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
516 switch (N->getOpcode()) {
518 case ISD::HANDLENODE:
520 case ISD::DBG_STOPPOINT:
523 return true; // Never CSE these nodes.
526 // Check that remaining values produced are not flags.
527 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
528 if (N->getValueType(i) == MVT::Flag)
529 return true; // Never CSE anything that produces a flag.
534 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
536 void SelectionDAG::RemoveDeadNodes() {
537 // Create a dummy node (which is not added to allnodes), that adds a reference
538 // to the root node, preventing it from being deleted.
539 HandleSDNode Dummy(getRoot());
541 SmallVector<SDNode*, 128> DeadNodes;
543 // Add all obviously-dead nodes to the DeadNodes worklist.
544 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
546 DeadNodes.push_back(I);
548 RemoveDeadNodes(DeadNodes);
550 // If the root changed (e.g. it was a dead load, update the root).
551 setRoot(Dummy.getValue());
554 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
555 /// given list, and any nodes that become unreachable as a result.
556 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
557 DAGUpdateListener *UpdateListener) {
559 // Process the worklist, deleting the nodes and adding their uses to the
561 while (!DeadNodes.empty()) {
562 SDNode *N = DeadNodes.pop_back_val();
565 UpdateListener->NodeDeleted(N, 0);
567 // Take the node out of the appropriate CSE map.
568 RemoveNodeFromCSEMaps(N);
570 // Next, brutally remove the operand list. This is safe to do, as there are
571 // no cycles in the graph.
572 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
574 SDNode *Operand = Use.getNode();
577 // Now that we removed this operand, see if there are no uses of it left.
578 if (Operand->use_empty())
579 DeadNodes.push_back(Operand);
586 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
587 SmallVector<SDNode*, 16> DeadNodes(1, N);
588 RemoveDeadNodes(DeadNodes, UpdateListener);
591 void SelectionDAG::DeleteNode(SDNode *N) {
592 // First take this out of the appropriate CSE map.
593 RemoveNodeFromCSEMaps(N);
595 // Finally, remove uses due to operands of this node, remove from the
596 // AllNodes list, and delete the node.
597 DeleteNodeNotInCSEMaps(N);
600 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
601 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
602 assert(N->use_empty() && "Cannot delete a node that is not dead!");
604 // Drop all of the operands and decrement used node's use counts.
610 void SelectionDAG::DeallocateNode(SDNode *N) {
611 if (N->OperandsNeedDelete)
612 delete[] N->OperandList;
614 // Set the opcode to DELETED_NODE to help catch bugs when node
615 // memory is reallocated.
616 N->NodeType = ISD::DELETED_NODE;
618 NodeAllocator.Deallocate(AllNodes.remove(N));
621 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
622 /// correspond to it. This is useful when we're about to delete or repurpose
623 /// the node. We don't want future request for structurally identical nodes
624 /// to return N anymore.
625 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
627 switch (N->getOpcode()) {
628 case ISD::EntryToken:
629 assert(0 && "EntryToken should not be in CSEMaps!");
631 case ISD::HANDLENODE: return false; // noop.
633 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
634 "Cond code doesn't exist!");
635 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
636 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
638 case ISD::ExternalSymbol:
639 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
641 case ISD::TargetExternalSymbol: {
642 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
643 Erased = TargetExternalSymbols.erase(
644 std::pair<std::string,unsigned char>(ESN->getSymbol(),
645 ESN->getTargetFlags()));
648 case ISD::VALUETYPE: {
649 MVT VT = cast<VTSDNode>(N)->getVT();
650 if (VT.isExtended()) {
651 Erased = ExtendedValueTypeNodes.erase(VT);
653 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
654 ValueTypeNodes[VT.getSimpleVT()] = 0;
659 // Remove it from the CSE Map.
660 Erased = CSEMap.RemoveNode(N);
664 // Verify that the node was actually in one of the CSE maps, unless it has a
665 // flag result (which cannot be CSE'd) or is one of the special cases that are
666 // not subject to CSE.
667 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
668 !N->isMachineOpcode() && !doNotCSE(N)) {
671 assert(0 && "Node is not in map!");
677 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
678 /// maps and modified in place. Add it back to the CSE maps, unless an identical
679 /// node already exists, in which case transfer all its users to the existing
680 /// node. This transfer can potentially trigger recursive merging.
683 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
684 DAGUpdateListener *UpdateListener) {
685 // For node types that aren't CSE'd, just act as if no identical node
688 SDNode *Existing = CSEMap.GetOrInsertNode(N);
690 // If there was already an existing matching node, use ReplaceAllUsesWith
691 // to replace the dead one with the existing one. This can cause
692 // recursive merging of other unrelated nodes down the line.
693 ReplaceAllUsesWith(N, Existing, UpdateListener);
695 // N is now dead. Inform the listener if it exists and delete it.
697 UpdateListener->NodeDeleted(N, Existing);
698 DeleteNodeNotInCSEMaps(N);
703 // If the node doesn't already exist, we updated it. Inform a listener if
706 UpdateListener->NodeUpdated(N);
709 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
710 /// were replaced with those specified. If this node is never memoized,
711 /// return null, otherwise return a pointer to the slot it would take. If a
712 /// node already exists with these operands, the slot will be non-null.
713 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
718 SDValue Ops[] = { Op };
720 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
721 AddNodeIDCustom(ID, N);
722 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 SDValue Op1, SDValue Op2,
735 SDValue Ops[] = { Op1, Op2 };
737 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
738 AddNodeIDCustom(ID, N);
739 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
743 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
744 /// were replaced with those specified. If this node is never memoized,
745 /// return null, otherwise return a pointer to the slot it would take. If a
746 /// node already exists with these operands, the slot will be non-null.
747 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
748 const SDValue *Ops,unsigned NumOps,
754 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
755 AddNodeIDCustom(ID, N);
756 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
759 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
760 void SelectionDAG::VerifyNode(SDNode *N) {
761 switch (N->getOpcode()) {
764 case ISD::BUILD_PAIR: {
765 MVT VT = N->getValueType(0);
766 assert(N->getNumValues() == 1 && "Too many results!");
767 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
768 "Wrong return type!");
769 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
770 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
771 "Mismatched operand types!");
772 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
773 "Wrong operand type!");
774 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
775 "Wrong return type size");
778 case ISD::BUILD_VECTOR: {
779 assert(N->getNumValues() == 1 && "Too many results!");
780 assert(N->getValueType(0).isVector() && "Wrong return type!");
781 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
782 "Wrong number of operands!");
783 MVT EltVT = N->getValueType(0).getVectorElementType();
784 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
785 assert((I->getValueType() == EltVT ||
786 (EltVT.isInteger() && I->getValueType().isInteger() &&
787 EltVT.bitsLE(I->getValueType()))) &&
788 "Wrong operand type!");
794 /// getMVTAlignment - Compute the default alignment value for the
797 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
798 const Type *Ty = VT == MVT::iPTR ?
799 PointerType::get(Type::Int8Ty, 0) :
802 return TLI.getTargetData()->getABITypeAlignment(Ty);
805 // EntryNode could meaningfully have debug info if we can find it...
806 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
807 : TLI(tli), FLI(fli), DW(0),
808 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
809 getVTList(MVT::Other)), Root(getEntryNode()) {
810 AllNodes.push_back(&EntryNode);
813 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
820 SelectionDAG::~SelectionDAG() {
824 void SelectionDAG::allnodes_clear() {
825 assert(&*AllNodes.begin() == &EntryNode);
826 AllNodes.remove(AllNodes.begin());
827 while (!AllNodes.empty())
828 DeallocateNode(AllNodes.begin());
831 void SelectionDAG::clear() {
833 OperandAllocator.Reset();
836 ExtendedValueTypeNodes.clear();
837 ExternalSymbols.clear();
838 TargetExternalSymbols.clear();
839 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
840 static_cast<CondCodeSDNode*>(0));
841 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
842 static_cast<SDNode*>(0));
844 EntryNode.UseList = 0;
845 AllNodes.push_back(&EntryNode);
846 Root = getEntryNode();
849 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
850 if (Op.getValueType() == VT) return Op;
851 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
853 return getNode(ISD::AND, DL, Op.getValueType(), Op,
854 getConstant(Imm, Op.getValueType()));
857 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
859 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
860 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
862 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
863 return getNode(ISD::XOR, DL, VT, Val, NegOne);
866 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
867 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
868 assert((EltVT.getSizeInBits() >= 64 ||
869 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
870 "getConstant with a uint64_t value that doesn't fit in the type!");
871 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
874 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
875 return getConstant(*ConstantInt::get(Val), VT, isT);
878 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
879 assert(VT.isInteger() && "Cannot create FP integer constant!");
881 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
882 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
883 "APInt size does not match type size!");
885 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
887 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
891 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
893 return SDValue(N, 0);
895 N = NodeAllocator.Allocate<ConstantSDNode>();
896 new (N) ConstantSDNode(isT, &Val, EltVT);
897 CSEMap.InsertNode(N, IP);
898 AllNodes.push_back(N);
901 SDValue Result(N, 0);
903 SmallVector<SDValue, 8> Ops;
904 Ops.assign(VT.getVectorNumElements(), Result);
905 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
906 VT, &Ops[0], Ops.size());
911 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
912 return getConstant(Val, TLI.getPointerTy(), isTarget);
916 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
917 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
920 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
921 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
924 VT.isVector() ? VT.getVectorElementType() : VT;
926 // Do the map lookup using the actual bit pattern for the floating point
927 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
928 // we don't have issues with SNANs.
929 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
931 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
935 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
937 return SDValue(N, 0);
939 N = NodeAllocator.Allocate<ConstantFPSDNode>();
940 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
941 CSEMap.InsertNode(N, IP);
942 AllNodes.push_back(N);
945 SDValue Result(N, 0);
947 SmallVector<SDValue, 8> Ops;
948 Ops.assign(VT.getVectorNumElements(), Result);
949 // FIXME DebugLoc info might be appropriate here
950 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
951 VT, &Ops[0], Ops.size());
956 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
958 VT.isVector() ? VT.getVectorElementType() : VT;
960 return getConstantFP(APFloat((float)Val), VT, isTarget);
962 return getConstantFP(APFloat(Val), VT, isTarget);
965 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
966 MVT VT, int64_t Offset,
968 unsigned char TargetFlags) {
969 assert((TargetFlags == 0 || isTargetGA) &&
970 "Cannot set target flags on target-independent globals");
972 // Truncate (with sign-extension) the offset value to the pointer size.
973 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
975 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
977 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
979 // If GV is an alias then use the aliasee for determining thread-localness.
980 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
981 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
985 if (GVar && GVar->isThreadLocal())
986 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
988 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
991 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
993 ID.AddInteger(Offset);
994 ID.AddInteger(TargetFlags);
996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
997 return SDValue(E, 0);
998 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
999 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1000 CSEMap.InsertNode(N, IP);
1001 AllNodes.push_back(N);
1002 return SDValue(N, 0);
1005 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
1006 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1007 FoldingSetNodeID ID;
1008 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1012 return SDValue(E, 0);
1013 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1014 new (N) FrameIndexSDNode(FI, VT, isTarget);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1017 return SDValue(N, 0);
1020 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget,
1021 unsigned char TargetFlags) {
1022 assert((TargetFlags == 0 || isTarget) &&
1023 "Cannot set target flags on target-independent jump tables");
1024 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1025 FoldingSetNodeID ID;
1026 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1028 ID.AddInteger(TargetFlags);
1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1031 return SDValue(E, 0);
1032 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1033 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1034 CSEMap.InsertNode(N, IP);
1035 AllNodes.push_back(N);
1036 return SDValue(N, 0);
1039 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1040 unsigned Alignment, int Offset,
1042 unsigned char TargetFlags) {
1043 assert((TargetFlags == 0 || isTarget) &&
1044 "Cannot set target flags on target-independent globals");
1046 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1047 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1048 FoldingSetNodeID ID;
1049 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1050 ID.AddInteger(Alignment);
1051 ID.AddInteger(Offset);
1053 ID.AddInteger(TargetFlags);
1055 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1056 return SDValue(E, 0);
1057 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1058 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1059 CSEMap.InsertNode(N, IP);
1060 AllNodes.push_back(N);
1061 return SDValue(N, 0);
1065 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1066 unsigned Alignment, int Offset,
1068 unsigned char TargetFlags) {
1069 assert((TargetFlags == 0 || isTarget) &&
1070 "Cannot set target flags on target-independent globals");
1072 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1073 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1074 FoldingSetNodeID ID;
1075 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1076 ID.AddInteger(Alignment);
1077 ID.AddInteger(Offset);
1078 C->AddSelectionDAGCSEId(ID);
1079 ID.AddInteger(TargetFlags);
1081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1082 return SDValue(E, 0);
1083 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1084 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1085 CSEMap.InsertNode(N, IP);
1086 AllNodes.push_back(N);
1087 return SDValue(N, 0);
1090 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1091 FoldingSetNodeID ID;
1092 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1096 return SDValue(E, 0);
1097 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1098 new (N) BasicBlockSDNode(MBB);
1099 CSEMap.InsertNode(N, IP);
1100 AllNodes.push_back(N);
1101 return SDValue(N, 0);
1104 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1107 ID.AddInteger(Flags.getRawBits());
1109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1110 return SDValue(E, 0);
1111 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1112 new (N) ARG_FLAGSSDNode(Flags);
1113 CSEMap.InsertNode(N, IP);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getValueType(MVT VT) {
1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1120 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1122 SDNode *&N = VT.isExtended() ?
1123 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1125 if (N) return SDValue(N, 0);
1126 N = NodeAllocator.Allocate<VTSDNode>();
1127 new (N) VTSDNode(VT);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1133 SDNode *&N = ExternalSymbols[Sym];
1134 if (N) return SDValue(N, 0);
1135 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1136 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT,
1142 unsigned char TargetFlags) {
1144 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1146 if (N) return SDValue(N, 0);
1147 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1148 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1149 AllNodes.push_back(N);
1150 return SDValue(N, 0);
1153 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1154 if ((unsigned)Cond >= CondCodeNodes.size())
1155 CondCodeNodes.resize(Cond+1);
1157 if (CondCodeNodes[Cond] == 0) {
1158 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1159 new (N) CondCodeSDNode(Cond);
1160 CondCodeNodes[Cond] = N;
1161 AllNodes.push_back(N);
1163 return SDValue(CondCodeNodes[Cond], 0);
1166 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1167 // the shuffle mask M that point at N1 to point at N2, and indices that point
1168 // N2 to point at N1.
1169 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1171 int NElts = M.size();
1172 for (int i = 0; i != NElts; ++i) {
1180 SDValue SelectionDAG::getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1,
1181 SDValue N2, const int *Mask) {
1182 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1183 assert(VT.isVector() && N1.getValueType().isVector() &&
1184 "Vector Shuffle VTs must be a vectors");
1185 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1186 && "Vector Shuffle VTs must have same element type");
1188 // Canonicalize shuffle undef, undef -> undef
1189 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1190 return getUNDEF(VT);
1192 // Validate that all indices in Mask are within the range of the elements
1193 // input to the shuffle.
1194 unsigned NElts = VT.getVectorNumElements();
1195 SmallVector<int, 8> MaskVec;
1196 for (unsigned i = 0; i != NElts; ++i) {
1197 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1198 MaskVec.push_back(Mask[i]);
1201 // Canonicalize shuffle v, v -> v, undef
1204 for (unsigned i = 0; i != NElts; ++i)
1205 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1208 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1209 if (N1.getOpcode() == ISD::UNDEF)
1210 commuteShuffle(N1, N2, MaskVec);
1212 // Canonicalize all index into lhs, -> shuffle lhs, undef
1213 // Canonicalize all index into rhs, -> shuffle rhs, undef
1214 bool AllLHS = true, AllRHS = true;
1215 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1216 for (unsigned i = 0; i != NElts; ++i) {
1217 if (MaskVec[i] >= (int)NElts) {
1222 } else if (MaskVec[i] >= 0) {
1226 if (AllLHS && AllRHS)
1227 return getUNDEF(VT);
1228 if (AllLHS && !N2Undef)
1232 commuteShuffle(N1, N2, MaskVec);
1235 // If Identity shuffle, or all shuffle in to undef, return that node.
1236 bool AllUndef = true;
1237 bool Identity = true;
1238 for (unsigned i = 0; i != NElts; ++i) {
1239 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1240 if (MaskVec[i] >= 0) AllUndef = false;
1242 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1245 return getUNDEF(VT);
1247 FoldingSetNodeID ID;
1248 SDValue Ops[2] = { N1, N2 };
1249 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1250 for (unsigned i = 0; i != NElts; ++i)
1251 ID.AddInteger(MaskVec[i]);
1254 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1255 return SDValue(E, 0);
1257 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1258 // SDNode doesn't have access to it. This memory will be "leaked" when
1259 // the node is deallocated, but recovered when the NodeAllocator is released.
1260 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1261 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1263 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1264 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1265 CSEMap.InsertNode(N, IP);
1266 AllNodes.push_back(N);
1267 return SDValue(N, 0);
1270 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1271 SDValue Val, SDValue DTy,
1272 SDValue STy, SDValue Rnd, SDValue Sat,
1273 ISD::CvtCode Code) {
1274 // If the src and dest types are the same and the conversion is between
1275 // integer types of the same sign or two floats, no conversion is necessary.
1277 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1280 FoldingSetNodeID ID;
1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1283 return SDValue(E, 0);
1284 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1286 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1287 CSEMap.InsertNode(N, IP);
1288 AllNodes.push_back(N);
1289 return SDValue(N, 0);
1292 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1293 FoldingSetNodeID ID;
1294 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1295 ID.AddInteger(RegNo);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1299 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1300 new (N) RegisterSDNode(RegNo, VT);
1301 CSEMap.InsertNode(N, IP);
1302 AllNodes.push_back(N);
1303 return SDValue(N, 0);
1306 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1307 unsigned Line, unsigned Col,
1309 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1310 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1312 AllNodes.push_back(N);
1313 return SDValue(N, 0);
1316 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1319 FoldingSetNodeID ID;
1320 SDValue Ops[] = { Root };
1321 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1322 ID.AddInteger(LabelID);
1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1325 return SDValue(E, 0);
1326 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1327 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1328 CSEMap.InsertNode(N, IP);
1329 AllNodes.push_back(N);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getSrcValue(const Value *V) {
1334 assert((!V || isa<PointerType>(V->getType())) &&
1335 "SrcValue is not a pointer?");
1337 FoldingSetNodeID ID;
1338 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1346 new (N) SrcValueSDNode(V);
1347 CSEMap.InsertNode(N, IP);
1348 AllNodes.push_back(N);
1349 return SDValue(N, 0);
1352 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1354 const Value *v = MO.getValue();
1355 assert((!v || isa<PointerType>(v->getType())) &&
1356 "SrcValue is not a pointer?");
1359 FoldingSetNodeID ID;
1360 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1365 return SDValue(E, 0);
1367 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1368 new (N) MemOperandSDNode(MO);
1369 CSEMap.InsertNode(N, IP);
1370 AllNodes.push_back(N);
1371 return SDValue(N, 0);
1374 /// getShiftAmountOperand - Return the specified value casted to
1375 /// the target's desired shift amount type.
1376 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1377 MVT OpTy = Op.getValueType();
1378 MVT ShTy = TLI.getShiftAmountTy();
1379 if (OpTy == ShTy || OpTy.isVector()) return Op;
1381 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1382 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1385 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1386 /// specified value type.
1387 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1388 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1389 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1390 const Type *Ty = VT.getTypeForMVT();
1391 unsigned StackAlign =
1392 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1394 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1395 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1398 /// CreateStackTemporary - Create a stack temporary suitable for holding
1399 /// either of the specified value types.
1400 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1401 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1402 VT2.getStoreSizeInBits())/8;
1403 const Type *Ty1 = VT1.getTypeForMVT();
1404 const Type *Ty2 = VT2.getTypeForMVT();
1405 const TargetData *TD = TLI.getTargetData();
1406 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1407 TD->getPrefTypeAlignment(Ty2));
1409 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1410 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1411 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1414 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1415 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1416 // These setcc operations always fold.
1420 case ISD::SETFALSE2: return getConstant(0, VT);
1422 case ISD::SETTRUE2: return getConstant(1, VT);
1434 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1438 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1439 const APInt &C2 = N2C->getAPIntValue();
1440 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1441 const APInt &C1 = N1C->getAPIntValue();
1444 default: assert(0 && "Unknown integer setcc!");
1445 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1446 case ISD::SETNE: return getConstant(C1 != C2, VT);
1447 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1448 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1449 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1450 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1451 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1452 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1453 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1454 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1458 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1459 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1460 // No compile time operations on this type yet.
1461 if (N1C->getValueType(0) == MVT::ppcf128)
1464 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1467 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1471 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1475 R==APFloat::cmpLessThan, VT);
1476 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1477 return getUNDEF(VT);
1479 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1480 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1481 return getUNDEF(VT);
1483 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1484 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1485 return getUNDEF(VT);
1487 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1488 R==APFloat::cmpEqual, VT);
1489 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1490 return getUNDEF(VT);
1492 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1493 R==APFloat::cmpEqual, VT);
1494 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1495 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1496 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1497 R==APFloat::cmpEqual, VT);
1498 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1499 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1500 R==APFloat::cmpLessThan, VT);
1501 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1502 R==APFloat::cmpUnordered, VT);
1503 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1504 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1507 // Ensure that the constant occurs on the RHS.
1508 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1512 // Could not fold it.
1516 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1517 /// use this predicate to simplify operations downstream.
1518 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1519 // This predicate is not safe for vector operations.
1520 if (Op.getValueType().isVector())
1523 unsigned BitWidth = Op.getValueSizeInBits();
1524 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1527 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1528 /// this predicate to simplify operations downstream. Mask is known to be zero
1529 /// for bits that V cannot have.
1530 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1531 unsigned Depth) const {
1532 APInt KnownZero, KnownOne;
1533 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1534 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1535 return (KnownZero & Mask) == Mask;
1538 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1539 /// known to be either zero or one and return them in the KnownZero/KnownOne
1540 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1542 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1543 APInt &KnownZero, APInt &KnownOne,
1544 unsigned Depth) const {
1545 unsigned BitWidth = Mask.getBitWidth();
1546 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1547 "Mask size mismatches value type size!");
1549 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1550 if (Depth == 6 || Mask == 0)
1551 return; // Limit search depth.
1553 APInt KnownZero2, KnownOne2;
1555 switch (Op.getOpcode()) {
1557 // We know all of the bits for a constant!
1558 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1559 KnownZero = ~KnownOne & Mask;
1562 // If either the LHS or the RHS are Zero, the result is zero.
1563 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1564 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1565 KnownZero2, KnownOne2, Depth+1);
1566 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1567 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1569 // Output known-1 bits are only known if set in both the LHS & RHS.
1570 KnownOne &= KnownOne2;
1571 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1572 KnownZero |= KnownZero2;
1575 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1576 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1577 KnownZero2, KnownOne2, Depth+1);
1578 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1579 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1581 // Output known-0 bits are only known if clear in both the LHS & RHS.
1582 KnownZero &= KnownZero2;
1583 // Output known-1 are known to be set if set in either the LHS | RHS.
1584 KnownOne |= KnownOne2;
1587 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1588 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1590 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1592 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1593 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1594 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1595 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1596 KnownZero = KnownZeroOut;
1600 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1601 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1602 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1603 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1604 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1606 // If low bits are zero in either operand, output low known-0 bits.
1607 // Also compute a conserative estimate for high known-0 bits.
1608 // More trickiness is possible, but this is sufficient for the
1609 // interesting case of alignment computation.
1611 unsigned TrailZ = KnownZero.countTrailingOnes() +
1612 KnownZero2.countTrailingOnes();
1613 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1614 KnownZero2.countLeadingOnes(),
1615 BitWidth) - BitWidth;
1617 TrailZ = std::min(TrailZ, BitWidth);
1618 LeadZ = std::min(LeadZ, BitWidth);
1619 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1620 APInt::getHighBitsSet(BitWidth, LeadZ);
1625 // For the purposes of computing leading zeros we can conservatively
1626 // treat a udiv as a logical right shift by the power of 2 known to
1627 // be less than the denominator.
1628 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1629 ComputeMaskedBits(Op.getOperand(0),
1630 AllOnes, KnownZero2, KnownOne2, Depth+1);
1631 unsigned LeadZ = KnownZero2.countLeadingOnes();
1635 ComputeMaskedBits(Op.getOperand(1),
1636 AllOnes, KnownZero2, KnownOne2, Depth+1);
1637 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1638 if (RHSUnknownLeadingOnes != BitWidth)
1639 LeadZ = std::min(BitWidth,
1640 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1642 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1646 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1647 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1651 // Only known if known in both the LHS and RHS.
1652 KnownOne &= KnownOne2;
1653 KnownZero &= KnownZero2;
1655 case ISD::SELECT_CC:
1656 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1657 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1658 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1659 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1661 // Only known if known in both the LHS and RHS.
1662 KnownOne &= KnownOne2;
1663 KnownZero &= KnownZero2;
1671 if (Op.getResNo() != 1)
1673 // The boolean result conforms to getBooleanContents. Fall through.
1675 // If we know the result of a setcc has the top bits zero, use this info.
1676 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1678 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1681 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1682 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1683 unsigned ShAmt = SA->getZExtValue();
1685 // If the shift count is an invalid immediate, don't do anything.
1686 if (ShAmt >= BitWidth)
1689 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1690 KnownZero, KnownOne, Depth+1);
1691 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1692 KnownZero <<= ShAmt;
1694 // low bits known zero.
1695 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1699 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1700 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1701 unsigned ShAmt = SA->getZExtValue();
1703 // If the shift count is an invalid immediate, don't do anything.
1704 if (ShAmt >= BitWidth)
1707 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1708 KnownZero, KnownOne, Depth+1);
1709 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1710 KnownZero = KnownZero.lshr(ShAmt);
1711 KnownOne = KnownOne.lshr(ShAmt);
1713 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1714 KnownZero |= HighBits; // High bits known zero.
1718 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1719 unsigned ShAmt = SA->getZExtValue();
1721 // If the shift count is an invalid immediate, don't do anything.
1722 if (ShAmt >= BitWidth)
1725 APInt InDemandedMask = (Mask << ShAmt);
1726 // If any of the demanded bits are produced by the sign extension, we also
1727 // demand the input sign bit.
1728 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1729 if (HighBits.getBoolValue())
1730 InDemandedMask |= APInt::getSignBit(BitWidth);
1732 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1734 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1735 KnownZero = KnownZero.lshr(ShAmt);
1736 KnownOne = KnownOne.lshr(ShAmt);
1738 // Handle the sign bits.
1739 APInt SignBit = APInt::getSignBit(BitWidth);
1740 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1742 if (KnownZero.intersects(SignBit)) {
1743 KnownZero |= HighBits; // New bits are known zero.
1744 } else if (KnownOne.intersects(SignBit)) {
1745 KnownOne |= HighBits; // New bits are known one.
1749 case ISD::SIGN_EXTEND_INREG: {
1750 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1751 unsigned EBits = EVT.getSizeInBits();
1753 // Sign extension. Compute the demanded bits in the result that are not
1754 // present in the input.
1755 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1757 APInt InSignBit = APInt::getSignBit(EBits);
1758 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1760 // If the sign extended bits are demanded, we know that the sign
1762 InSignBit.zext(BitWidth);
1763 if (NewBits.getBoolValue())
1764 InputDemandedBits |= InSignBit;
1766 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1767 KnownZero, KnownOne, Depth+1);
1768 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1770 // If the sign bit of the input is known set or clear, then we know the
1771 // top bits of the result.
1772 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1773 KnownZero |= NewBits;
1774 KnownOne &= ~NewBits;
1775 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1776 KnownOne |= NewBits;
1777 KnownZero &= ~NewBits;
1778 } else { // Input sign bit unknown
1779 KnownZero &= ~NewBits;
1780 KnownOne &= ~NewBits;
1787 unsigned LowBits = Log2_32(BitWidth)+1;
1788 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1793 if (ISD::isZEXTLoad(Op.getNode())) {
1794 LoadSDNode *LD = cast<LoadSDNode>(Op);
1795 MVT VT = LD->getMemoryVT();
1796 unsigned MemBits = VT.getSizeInBits();
1797 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1801 case ISD::ZERO_EXTEND: {
1802 MVT InVT = Op.getOperand(0).getValueType();
1803 unsigned InBits = InVT.getSizeInBits();
1804 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1805 APInt InMask = Mask;
1806 InMask.trunc(InBits);
1807 KnownZero.trunc(InBits);
1808 KnownOne.trunc(InBits);
1809 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1810 KnownZero.zext(BitWidth);
1811 KnownOne.zext(BitWidth);
1812 KnownZero |= NewBits;
1815 case ISD::SIGN_EXTEND: {
1816 MVT InVT = Op.getOperand(0).getValueType();
1817 unsigned InBits = InVT.getSizeInBits();
1818 APInt InSignBit = APInt::getSignBit(InBits);
1819 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1820 APInt InMask = Mask;
1821 InMask.trunc(InBits);
1823 // If any of the sign extended bits are demanded, we know that the sign
1824 // bit is demanded. Temporarily set this bit in the mask for our callee.
1825 if (NewBits.getBoolValue())
1826 InMask |= InSignBit;
1828 KnownZero.trunc(InBits);
1829 KnownOne.trunc(InBits);
1830 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1832 // Note if the sign bit is known to be zero or one.
1833 bool SignBitKnownZero = KnownZero.isNegative();
1834 bool SignBitKnownOne = KnownOne.isNegative();
1835 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1836 "Sign bit can't be known to be both zero and one!");
1838 // If the sign bit wasn't actually demanded by our caller, we don't
1839 // want it set in the KnownZero and KnownOne result values. Reset the
1840 // mask and reapply it to the result values.
1842 InMask.trunc(InBits);
1843 KnownZero &= InMask;
1846 KnownZero.zext(BitWidth);
1847 KnownOne.zext(BitWidth);
1849 // If the sign bit is known zero or one, the top bits match.
1850 if (SignBitKnownZero)
1851 KnownZero |= NewBits;
1852 else if (SignBitKnownOne)
1853 KnownOne |= NewBits;
1856 case ISD::ANY_EXTEND: {
1857 MVT InVT = Op.getOperand(0).getValueType();
1858 unsigned InBits = InVT.getSizeInBits();
1859 APInt InMask = Mask;
1860 InMask.trunc(InBits);
1861 KnownZero.trunc(InBits);
1862 KnownOne.trunc(InBits);
1863 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1864 KnownZero.zext(BitWidth);
1865 KnownOne.zext(BitWidth);
1868 case ISD::TRUNCATE: {
1869 MVT InVT = Op.getOperand(0).getValueType();
1870 unsigned InBits = InVT.getSizeInBits();
1871 APInt InMask = Mask;
1872 InMask.zext(InBits);
1873 KnownZero.zext(InBits);
1874 KnownOne.zext(InBits);
1875 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1876 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1877 KnownZero.trunc(BitWidth);
1878 KnownOne.trunc(BitWidth);
1881 case ISD::AssertZext: {
1882 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1883 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1884 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1886 KnownZero |= (~InMask) & Mask;
1890 // All bits are zero except the low bit.
1891 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1895 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1896 // We know that the top bits of C-X are clear if X contains less bits
1897 // than C (i.e. no wrap-around can happen). For example, 20-X is
1898 // positive if we can prove that X is >= 0 and < 16.
1899 if (CLHS->getAPIntValue().isNonNegative()) {
1900 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1901 // NLZ can't be BitWidth with no sign bit
1902 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1903 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1906 // If all of the MaskV bits are known to be zero, then we know the
1907 // output top bits are zero, because we now know that the output is
1909 if ((KnownZero2 & MaskV) == MaskV) {
1910 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1911 // Top bits known zero.
1912 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1919 // Output known-0 bits are known if clear or set in both the low clear bits
1920 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1921 // low 3 bits clear.
1922 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1923 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1924 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1925 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1927 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1928 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1929 KnownZeroOut = std::min(KnownZeroOut,
1930 KnownZero2.countTrailingOnes());
1932 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1936 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1937 const APInt &RA = Rem->getAPIntValue();
1938 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1939 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1940 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1941 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1943 // If the sign bit of the first operand is zero, the sign bit of
1944 // the result is zero. If the first operand has no one bits below
1945 // the second operand's single 1 bit, its sign will be zero.
1946 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1947 KnownZero2 |= ~LowBits;
1949 KnownZero |= KnownZero2 & Mask;
1951 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1956 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1957 const APInt &RA = Rem->getAPIntValue();
1958 if (RA.isPowerOf2()) {
1959 APInt LowBits = (RA - 1);
1960 APInt Mask2 = LowBits & Mask;
1961 KnownZero |= ~LowBits & Mask;
1962 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1963 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1968 // Since the result is less than or equal to either operand, any leading
1969 // zero bits in either operand must also exist in the result.
1970 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1971 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1973 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1976 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1977 KnownZero2.countLeadingOnes());
1979 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1983 // Allow the target to implement this method for its nodes.
1984 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1985 case ISD::INTRINSIC_WO_CHAIN:
1986 case ISD::INTRINSIC_W_CHAIN:
1987 case ISD::INTRINSIC_VOID:
1988 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1994 /// ComputeNumSignBits - Return the number of times the sign bit of the
1995 /// register is replicated into the other bits. We know that at least 1 bit
1996 /// is always equal to the sign bit (itself), but other cases can give us
1997 /// information. For example, immediately after an "SRA X, 2", we know that
1998 /// the top 3 bits are all equal to each other, so we return 3.
1999 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2000 MVT VT = Op.getValueType();
2001 assert(VT.isInteger() && "Invalid VT!");
2002 unsigned VTBits = VT.getSizeInBits();
2004 unsigned FirstAnswer = 1;
2007 return 1; // Limit search depth.
2009 switch (Op.getOpcode()) {
2011 case ISD::AssertSext:
2012 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2013 return VTBits-Tmp+1;
2014 case ISD::AssertZext:
2015 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2018 case ISD::Constant: {
2019 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2020 // If negative, return # leading ones.
2021 if (Val.isNegative())
2022 return Val.countLeadingOnes();
2024 // Return # leading zeros.
2025 return Val.countLeadingZeros();
2028 case ISD::SIGN_EXTEND:
2029 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2030 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2032 case ISD::SIGN_EXTEND_INREG:
2033 // Max of the input and what this extends.
2034 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2037 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2038 return std::max(Tmp, Tmp2);
2041 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2042 // SRA X, C -> adds C sign bits.
2043 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2044 Tmp += C->getZExtValue();
2045 if (Tmp > VTBits) Tmp = VTBits;
2049 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2050 // shl destroys sign bits.
2051 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2052 if (C->getZExtValue() >= VTBits || // Bad shift.
2053 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2054 return Tmp - C->getZExtValue();
2059 case ISD::XOR: // NOT is handled here.
2060 // Logical binary ops preserve the number of sign bits at the worst.
2061 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2063 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2064 FirstAnswer = std::min(Tmp, Tmp2);
2065 // We computed what we know about the sign bits as our first
2066 // answer. Now proceed to the generic code that uses
2067 // ComputeMaskedBits, and pick whichever answer is better.
2072 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2073 if (Tmp == 1) return 1; // Early out.
2074 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2075 return std::min(Tmp, Tmp2);
2083 if (Op.getResNo() != 1)
2085 // The boolean result conforms to getBooleanContents. Fall through.
2087 // If setcc returns 0/-1, all bits are sign bits.
2088 if (TLI.getBooleanContents() ==
2089 TargetLowering::ZeroOrNegativeOneBooleanContent)
2094 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2095 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2097 // Handle rotate right by N like a rotate left by 32-N.
2098 if (Op.getOpcode() == ISD::ROTR)
2099 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2101 // If we aren't rotating out all of the known-in sign bits, return the
2102 // number that are left. This handles rotl(sext(x), 1) for example.
2103 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2104 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2108 // Add can have at most one carry bit. Thus we know that the output
2109 // is, at worst, one more bit than the inputs.
2110 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2111 if (Tmp == 1) return 1; // Early out.
2113 // Special case decrementing a value (ADD X, -1):
2114 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2115 if (CRHS->isAllOnesValue()) {
2116 APInt KnownZero, KnownOne;
2117 APInt Mask = APInt::getAllOnesValue(VTBits);
2118 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2120 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2122 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2125 // If we are subtracting one from a positive number, there is no carry
2126 // out of the result.
2127 if (KnownZero.isNegative())
2131 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2132 if (Tmp2 == 1) return 1;
2133 return std::min(Tmp, Tmp2)-1;
2137 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2138 if (Tmp2 == 1) return 1;
2141 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2142 if (CLHS->isNullValue()) {
2143 APInt KnownZero, KnownOne;
2144 APInt Mask = APInt::getAllOnesValue(VTBits);
2145 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2146 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2148 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2151 // If the input is known to be positive (the sign bit is known clear),
2152 // the output of the NEG has the same number of sign bits as the input.
2153 if (KnownZero.isNegative())
2156 // Otherwise, we treat this like a SUB.
2159 // Sub can have at most one carry bit. Thus we know that the output
2160 // is, at worst, one more bit than the inputs.
2161 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2162 if (Tmp == 1) return 1; // Early out.
2163 return std::min(Tmp, Tmp2)-1;
2166 // FIXME: it's tricky to do anything useful for this, but it is an important
2167 // case for targets like X86.
2171 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2172 if (Op.getOpcode() == ISD::LOAD) {
2173 LoadSDNode *LD = cast<LoadSDNode>(Op);
2174 unsigned ExtType = LD->getExtensionType();
2177 case ISD::SEXTLOAD: // '17' bits known
2178 Tmp = LD->getMemoryVT().getSizeInBits();
2179 return VTBits-Tmp+1;
2180 case ISD::ZEXTLOAD: // '16' bits known
2181 Tmp = LD->getMemoryVT().getSizeInBits();
2186 // Allow the target to implement this method for its nodes.
2187 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2188 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2189 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2190 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2191 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2192 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2195 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2196 // use this information.
2197 APInt KnownZero, KnownOne;
2198 APInt Mask = APInt::getAllOnesValue(VTBits);
2199 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2201 if (KnownZero.isNegative()) { // sign bit is 0
2203 } else if (KnownOne.isNegative()) { // sign bit is 1;
2210 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2211 // the number of identical bits in the top of the input value.
2213 Mask <<= Mask.getBitWidth()-VTBits;
2214 // Return # leading zeros. We use 'min' here in case Val was zero before
2215 // shifting. We don't want to return '64' as for an i32 "0".
2216 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2220 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2221 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2222 if (!GA) return false;
2223 if (GA->getOffset() != 0) return false;
2224 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2225 if (!GV) return false;
2226 MachineModuleInfo *MMI = getMachineModuleInfo();
2227 return MMI && MMI->hasDebugInfo();
2231 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2232 /// element of the result of the vector shuffle.
2233 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2235 MVT VT = N->getValueType(0);
2236 DebugLoc dl = N->getDebugLoc();
2237 if (N->getMaskElt(i) < 0)
2238 return getUNDEF(VT.getVectorElementType());
2239 unsigned Index = N->getMaskElt(i);
2240 unsigned NumElems = VT.getVectorNumElements();
2241 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2244 if (V.getOpcode() == ISD::BIT_CONVERT) {
2245 V = V.getOperand(0);
2246 MVT VVT = V.getValueType();
2247 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2250 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2251 return (Index == 0) ? V.getOperand(0)
2252 : getUNDEF(VT.getVectorElementType());
2253 if (V.getOpcode() == ISD::BUILD_VECTOR)
2254 return V.getOperand(Index);
2255 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2256 return getShuffleScalarElt(SVN, Index);
2261 /// getNode - Gets or creates the specified node.
2263 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2264 FoldingSetNodeID ID;
2265 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2268 return SDValue(E, 0);
2269 SDNode *N = NodeAllocator.Allocate<SDNode>();
2270 new (N) SDNode(Opcode, DL, getVTList(VT));
2271 CSEMap.InsertNode(N, IP);
2273 AllNodes.push_back(N);
2277 return SDValue(N, 0);
2280 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2281 MVT VT, SDValue Operand) {
2282 // Constant fold unary operations with an integer constant operand.
2283 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2284 const APInt &Val = C->getAPIntValue();
2285 unsigned BitWidth = VT.getSizeInBits();
2288 case ISD::SIGN_EXTEND:
2289 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2290 case ISD::ANY_EXTEND:
2291 case ISD::ZERO_EXTEND:
2293 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2294 case ISD::UINT_TO_FP:
2295 case ISD::SINT_TO_FP: {
2296 const uint64_t zero[] = {0, 0};
2297 // No compile time operations on this type.
2298 if (VT==MVT::ppcf128)
2300 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2301 (void)apf.convertFromAPInt(Val,
2302 Opcode==ISD::SINT_TO_FP,
2303 APFloat::rmNearestTiesToEven);
2304 return getConstantFP(apf, VT);
2306 case ISD::BIT_CONVERT:
2307 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2308 return getConstantFP(Val.bitsToFloat(), VT);
2309 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2310 return getConstantFP(Val.bitsToDouble(), VT);
2313 return getConstant(Val.byteSwap(), VT);
2315 return getConstant(Val.countPopulation(), VT);
2317 return getConstant(Val.countLeadingZeros(), VT);
2319 return getConstant(Val.countTrailingZeros(), VT);
2323 // Constant fold unary operations with a floating point constant operand.
2324 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2325 APFloat V = C->getValueAPF(); // make copy
2326 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2330 return getConstantFP(V, VT);
2333 return getConstantFP(V, VT);
2335 case ISD::FP_EXTEND: {
2337 // This can return overflow, underflow, or inexact; we don't care.
2338 // FIXME need to be more flexible about rounding mode.
2339 (void)V.convert(*MVTToAPFloatSemantics(VT),
2340 APFloat::rmNearestTiesToEven, &ignored);
2341 return getConstantFP(V, VT);
2343 case ISD::FP_TO_SINT:
2344 case ISD::FP_TO_UINT: {
2347 assert(integerPartWidth >= 64);
2348 // FIXME need to be more flexible about rounding mode.
2349 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2350 Opcode==ISD::FP_TO_SINT,
2351 APFloat::rmTowardZero, &ignored);
2352 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2354 APInt api(VT.getSizeInBits(), 2, x);
2355 return getConstant(api, VT);
2357 case ISD::BIT_CONVERT:
2358 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2359 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2360 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2361 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2367 unsigned OpOpcode = Operand.getNode()->getOpcode();
2369 case ISD::TokenFactor:
2370 case ISD::MERGE_VALUES:
2371 case ISD::CONCAT_VECTORS:
2372 return Operand; // Factor, merge or concat of one node? No need.
2373 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2374 case ISD::FP_EXTEND:
2375 assert(VT.isFloatingPoint() &&
2376 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2377 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2378 if (Operand.getOpcode() == ISD::UNDEF)
2379 return getUNDEF(VT);
2381 case ISD::SIGN_EXTEND:
2382 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2383 "Invalid SIGN_EXTEND!");
2384 if (Operand.getValueType() == VT) return Operand; // noop extension
2385 assert(Operand.getValueType().bitsLT(VT)
2386 && "Invalid sext node, dst < src!");
2387 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2388 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2390 case ISD::ZERO_EXTEND:
2391 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2392 "Invalid ZERO_EXTEND!");
2393 if (Operand.getValueType() == VT) return Operand; // noop extension
2394 assert(Operand.getValueType().bitsLT(VT)
2395 && "Invalid zext node, dst < src!");
2396 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2397 return getNode(ISD::ZERO_EXTEND, DL, VT,
2398 Operand.getNode()->getOperand(0));
2400 case ISD::ANY_EXTEND:
2401 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2402 "Invalid ANY_EXTEND!");
2403 if (Operand.getValueType() == VT) return Operand; // noop extension
2404 assert(Operand.getValueType().bitsLT(VT)
2405 && "Invalid anyext node, dst < src!");
2406 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2407 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2408 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2411 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2412 "Invalid TRUNCATE!");
2413 if (Operand.getValueType() == VT) return Operand; // noop truncate
2414 assert(Operand.getValueType().bitsGT(VT)
2415 && "Invalid truncate node, src < dst!");
2416 if (OpOpcode == ISD::TRUNCATE)
2417 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2418 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2419 OpOpcode == ISD::ANY_EXTEND) {
2420 // If the source is smaller than the dest, we still need an extend.
2421 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2422 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2423 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2424 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2426 return Operand.getNode()->getOperand(0);
2429 case ISD::BIT_CONVERT:
2430 // Basic sanity checking.
2431 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2432 && "Cannot BIT_CONVERT between types of different sizes!");
2433 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2434 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2435 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2436 if (OpOpcode == ISD::UNDEF)
2437 return getUNDEF(VT);
2439 case ISD::SCALAR_TO_VECTOR:
2440 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2441 (VT.getVectorElementType() == Operand.getValueType() ||
2442 (VT.getVectorElementType().isInteger() &&
2443 Operand.getValueType().isInteger() &&
2444 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2445 "Illegal SCALAR_TO_VECTOR node!");
2446 if (OpOpcode == ISD::UNDEF)
2447 return getUNDEF(VT);
2448 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2449 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2450 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2451 Operand.getConstantOperandVal(1) == 0 &&
2452 Operand.getOperand(0).getValueType() == VT)
2453 return Operand.getOperand(0);
2456 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2457 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2458 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2459 Operand.getNode()->getOperand(0));
2460 if (OpOpcode == ISD::FNEG) // --X -> X
2461 return Operand.getNode()->getOperand(0);
2464 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2465 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2470 SDVTList VTs = getVTList(VT);
2471 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2472 FoldingSetNodeID ID;
2473 SDValue Ops[1] = { Operand };
2474 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2476 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2477 return SDValue(E, 0);
2478 N = NodeAllocator.Allocate<UnarySDNode>();
2479 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2480 CSEMap.InsertNode(N, IP);
2482 N = NodeAllocator.Allocate<UnarySDNode>();
2483 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2486 AllNodes.push_back(N);
2490 return SDValue(N, 0);
2493 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2495 ConstantSDNode *Cst1,
2496 ConstantSDNode *Cst2) {
2497 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2500 case ISD::ADD: return getConstant(C1 + C2, VT);
2501 case ISD::SUB: return getConstant(C1 - C2, VT);
2502 case ISD::MUL: return getConstant(C1 * C2, VT);
2504 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2507 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2510 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2513 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2515 case ISD::AND: return getConstant(C1 & C2, VT);
2516 case ISD::OR: return getConstant(C1 | C2, VT);
2517 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2518 case ISD::SHL: return getConstant(C1 << C2, VT);
2519 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2520 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2521 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2522 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2529 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2530 SDValue N1, SDValue N2) {
2531 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2532 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2535 case ISD::TokenFactor:
2536 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2537 N2.getValueType() == MVT::Other && "Invalid token factor!");
2538 // Fold trivial token factors.
2539 if (N1.getOpcode() == ISD::EntryToken) return N2;
2540 if (N2.getOpcode() == ISD::EntryToken) return N1;
2541 if (N1 == N2) return N1;
2543 case ISD::CONCAT_VECTORS:
2544 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2545 // one big BUILD_VECTOR.
2546 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2547 N2.getOpcode() == ISD::BUILD_VECTOR) {
2548 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2549 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2550 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2554 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2555 N1.getValueType() == VT && "Binary operator types must match!");
2556 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2557 // worth handling here.
2558 if (N2C && N2C->isNullValue())
2560 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2567 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2568 N1.getValueType() == VT && "Binary operator types must match!");
2569 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2570 // it's worth handling here.
2571 if (N2C && N2C->isNullValue())
2581 assert(VT.isInteger() && "This operator does not apply to FP types!");
2589 if (Opcode == ISD::FADD) {
2591 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2592 if (CFP->getValueAPF().isZero())
2595 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2596 if (CFP->getValueAPF().isZero())
2598 } else if (Opcode == ISD::FSUB) {
2600 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2601 if (CFP->getValueAPF().isZero())
2605 assert(N1.getValueType() == N2.getValueType() &&
2606 N1.getValueType() == VT && "Binary operator types must match!");
2608 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2609 assert(N1.getValueType() == VT &&
2610 N1.getValueType().isFloatingPoint() &&
2611 N2.getValueType().isFloatingPoint() &&
2612 "Invalid FCOPYSIGN!");
2619 assert(VT == N1.getValueType() &&
2620 "Shift operators return type must be the same as their first arg");
2621 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2622 "Shifts only work on integers");
2624 // Always fold shifts of i1 values so the code generator doesn't need to
2625 // handle them. Since we know the size of the shift has to be less than the
2626 // size of the value, the shift/rotate count is guaranteed to be zero.
2630 case ISD::FP_ROUND_INREG: {
2631 MVT EVT = cast<VTSDNode>(N2)->getVT();
2632 assert(VT == N1.getValueType() && "Not an inreg round!");
2633 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2634 "Cannot FP_ROUND_INREG integer types");
2635 assert(EVT.bitsLE(VT) && "Not rounding down!");
2636 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2640 assert(VT.isFloatingPoint() &&
2641 N1.getValueType().isFloatingPoint() &&
2642 VT.bitsLE(N1.getValueType()) &&
2643 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2644 if (N1.getValueType() == VT) return N1; // noop conversion.
2646 case ISD::AssertSext:
2647 case ISD::AssertZext: {
2648 MVT EVT = cast<VTSDNode>(N2)->getVT();
2649 assert(VT == N1.getValueType() && "Not an inreg extend!");
2650 assert(VT.isInteger() && EVT.isInteger() &&
2651 "Cannot *_EXTEND_INREG FP types");
2652 assert(EVT.bitsLE(VT) && "Not extending!");
2653 if (VT == EVT) return N1; // noop assertion.
2656 case ISD::SIGN_EXTEND_INREG: {
2657 MVT EVT = cast<VTSDNode>(N2)->getVT();
2658 assert(VT == N1.getValueType() && "Not an inreg extend!");
2659 assert(VT.isInteger() && EVT.isInteger() &&
2660 "Cannot *_EXTEND_INREG FP types");
2661 assert(EVT.bitsLE(VT) && "Not extending!");
2662 if (EVT == VT) return N1; // Not actually extending
2665 APInt Val = N1C->getAPIntValue();
2666 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2667 Val <<= Val.getBitWidth()-FromBits;
2668 Val = Val.ashr(Val.getBitWidth()-FromBits);
2669 return getConstant(Val, VT);
2673 case ISD::EXTRACT_VECTOR_ELT:
2674 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2675 if (N1.getOpcode() == ISD::UNDEF)
2676 return getUNDEF(VT);
2678 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2679 // expanding copies of large vectors from registers.
2681 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2682 N1.getNumOperands() > 0) {
2684 N1.getOperand(0).getValueType().getVectorNumElements();
2685 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2686 N1.getOperand(N2C->getZExtValue() / Factor),
2687 getConstant(N2C->getZExtValue() % Factor,
2688 N2.getValueType()));
2691 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2692 // expanding large vector constants.
2693 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2694 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2695 if (Elt.getValueType() != VT) {
2696 // If the vector element type is not legal, the BUILD_VECTOR operands
2697 // are promoted and implicitly truncated. Make that explicit here.
2698 assert(VT.isInteger() && Elt.getValueType().isInteger() &&
2699 VT.bitsLE(Elt.getValueType()) &&
2700 "Bad type for BUILD_VECTOR operand");
2701 Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
2706 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2707 // operations are lowered to scalars.
2708 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2709 // If the indices are the same, return the inserted element.
2710 if (N1.getOperand(2) == N2)
2711 return N1.getOperand(1);
2712 // If the indices are known different, extract the element from
2713 // the original vector.
2714 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2715 isa<ConstantSDNode>(N2))
2716 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2719 case ISD::EXTRACT_ELEMENT:
2720 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2721 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2722 (N1.getValueType().isInteger() == VT.isInteger()) &&
2723 "Wrong types for EXTRACT_ELEMENT!");
2725 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2726 // 64-bit integers into 32-bit parts. Instead of building the extract of
2727 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2728 if (N1.getOpcode() == ISD::BUILD_PAIR)
2729 return N1.getOperand(N2C->getZExtValue());
2731 // EXTRACT_ELEMENT of a constant int is also very common.
2732 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2733 unsigned ElementSize = VT.getSizeInBits();
2734 unsigned Shift = ElementSize * N2C->getZExtValue();
2735 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2736 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2739 case ISD::EXTRACT_SUBVECTOR:
2740 if (N1.getValueType() == VT) // Trivial extraction.
2747 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2748 if (SV.getNode()) return SV;
2749 } else { // Cannonicalize constant to RHS if commutative
2750 if (isCommutativeBinOp(Opcode)) {
2751 std::swap(N1C, N2C);
2757 // Constant fold FP operations.
2758 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2759 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2761 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2762 // Cannonicalize constant to RHS if commutative
2763 std::swap(N1CFP, N2CFP);
2765 } else if (N2CFP && VT != MVT::ppcf128) {
2766 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2767 APFloat::opStatus s;
2770 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2771 if (s != APFloat::opInvalidOp)
2772 return getConstantFP(V1, VT);
2775 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2776 if (s!=APFloat::opInvalidOp)
2777 return getConstantFP(V1, VT);
2780 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2781 if (s!=APFloat::opInvalidOp)
2782 return getConstantFP(V1, VT);
2785 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2786 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2787 return getConstantFP(V1, VT);
2790 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2791 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2792 return getConstantFP(V1, VT);
2794 case ISD::FCOPYSIGN:
2796 return getConstantFP(V1, VT);
2802 // Canonicalize an UNDEF to the RHS, even over a constant.
2803 if (N1.getOpcode() == ISD::UNDEF) {
2804 if (isCommutativeBinOp(Opcode)) {
2808 case ISD::FP_ROUND_INREG:
2809 case ISD::SIGN_EXTEND_INREG:
2815 return N1; // fold op(undef, arg2) -> undef
2823 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2824 // For vectors, we can't easily build an all zero vector, just return
2831 // Fold a bunch of operators when the RHS is undef.
2832 if (N2.getOpcode() == ISD::UNDEF) {
2835 if (N1.getOpcode() == ISD::UNDEF)
2836 // Handle undef ^ undef -> 0 special case. This is a common
2838 return getConstant(0, VT);
2848 return N2; // fold op(arg1, undef) -> undef
2862 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2863 // For vectors, we can't easily build an all zero vector, just return
2868 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2869 // For vectors, we can't easily build an all one vector, just return
2877 // Memoize this node if possible.
2879 SDVTList VTs = getVTList(VT);
2880 if (VT != MVT::Flag) {
2881 SDValue Ops[] = { N1, N2 };
2882 FoldingSetNodeID ID;
2883 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2886 return SDValue(E, 0);
2887 N = NodeAllocator.Allocate<BinarySDNode>();
2888 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2889 CSEMap.InsertNode(N, IP);
2891 N = NodeAllocator.Allocate<BinarySDNode>();
2892 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2895 AllNodes.push_back(N);
2899 return SDValue(N, 0);
2902 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2903 SDValue N1, SDValue N2, SDValue N3) {
2904 // Perform various simplifications.
2905 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2906 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2908 case ISD::CONCAT_VECTORS:
2909 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2910 // one big BUILD_VECTOR.
2911 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2912 N2.getOpcode() == ISD::BUILD_VECTOR &&
2913 N3.getOpcode() == ISD::BUILD_VECTOR) {
2914 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2915 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2916 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2917 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2921 // Use FoldSetCC to simplify SETCC's.
2922 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2923 if (Simp.getNode()) return Simp;
2928 if (N1C->getZExtValue())
2929 return N2; // select true, X, Y -> X
2931 return N3; // select false, X, Y -> Y
2934 if (N2 == N3) return N2; // select C, X, X -> X
2938 if (N2C->getZExtValue()) // Unconditional branch
2939 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2941 return N1; // Never-taken branch
2944 case ISD::VECTOR_SHUFFLE:
2945 assert(0 && "should use getVectorShuffle constructor!");
2947 case ISD::BIT_CONVERT:
2948 // Fold bit_convert nodes from a type to themselves.
2949 if (N1.getValueType() == VT)
2954 // Memoize node if it doesn't produce a flag.
2956 SDVTList VTs = getVTList(VT);
2957 if (VT != MVT::Flag) {
2958 SDValue Ops[] = { N1, N2, N3 };
2959 FoldingSetNodeID ID;
2960 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2962 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2963 return SDValue(E, 0);
2964 N = NodeAllocator.Allocate<TernarySDNode>();
2965 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2966 CSEMap.InsertNode(N, IP);
2968 N = NodeAllocator.Allocate<TernarySDNode>();
2969 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2971 AllNodes.push_back(N);
2975 return SDValue(N, 0);
2978 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2979 SDValue N1, SDValue N2, SDValue N3,
2981 SDValue Ops[] = { N1, N2, N3, N4 };
2982 return getNode(Opcode, DL, VT, Ops, 4);
2985 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2986 SDValue N1, SDValue N2, SDValue N3,
2987 SDValue N4, SDValue N5) {
2988 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2989 return getNode(Opcode, DL, VT, Ops, 5);
2992 /// getMemsetValue - Vectorized representation of the memset value
2994 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2996 unsigned NumBits = VT.isVector() ?
2997 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2998 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2999 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3001 for (unsigned i = NumBits; i > 8; i >>= 1) {
3002 Val = (Val << Shift) | Val;
3006 return DAG.getConstant(Val, VT);
3007 return DAG.getConstantFP(APFloat(Val), VT);
3010 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3011 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3013 for (unsigned i = NumBits; i > 8; i >>= 1) {
3014 Value = DAG.getNode(ISD::OR, dl, VT,
3015 DAG.getNode(ISD::SHL, dl, VT, Value,
3016 DAG.getConstant(Shift,
3017 TLI.getShiftAmountTy())),
3025 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3026 /// used when a memcpy is turned into a memset when the source is a constant
3028 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
3029 const TargetLowering &TLI,
3030 std::string &Str, unsigned Offset) {
3031 // Handle vector with all elements zero.
3034 return DAG.getConstant(0, VT);
3035 unsigned NumElts = VT.getVectorNumElements();
3036 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3037 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3038 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
3041 assert(!VT.isVector() && "Can't handle vector type here!");
3042 unsigned NumBits = VT.getSizeInBits();
3043 unsigned MSB = NumBits / 8;
3045 if (TLI.isLittleEndian())
3046 Offset = Offset + MSB - 1;
3047 for (unsigned i = 0; i != MSB; ++i) {
3048 Val = (Val << 8) | (unsigned char)Str[Offset];
3049 Offset += TLI.isLittleEndian() ? -1 : 1;
3051 return DAG.getConstant(Val, VT);
3054 /// getMemBasePlusOffset - Returns base and offset node for the
3056 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3057 SelectionDAG &DAG) {
3058 MVT VT = Base.getValueType();
3059 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3060 VT, Base, DAG.getConstant(Offset, VT));
3063 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3065 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3066 unsigned SrcDelta = 0;
3067 GlobalAddressSDNode *G = NULL;
3068 if (Src.getOpcode() == ISD::GlobalAddress)
3069 G = cast<GlobalAddressSDNode>(Src);
3070 else if (Src.getOpcode() == ISD::ADD &&
3071 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3072 Src.getOperand(1).getOpcode() == ISD::Constant) {
3073 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3074 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3079 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3080 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3086 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3087 /// to replace the memset / memcpy is below the threshold. It also returns the
3088 /// types of the sequence of memory ops to perform memset / memcpy.
3090 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3091 SDValue Dst, SDValue Src,
3092 unsigned Limit, uint64_t Size, unsigned &Align,
3093 std::string &Str, bool &isSrcStr,
3095 const TargetLowering &TLI) {
3096 isSrcStr = isMemSrcFromString(Src, Str);
3097 bool isSrcConst = isa<ConstantSDNode>(Src);
3098 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3099 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3100 if (VT != MVT::iAny) {
3101 unsigned NewAlign = (unsigned)
3102 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3103 // If source is a string constant, this will require an unaligned load.
3104 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3105 if (Dst.getOpcode() != ISD::FrameIndex) {
3106 // Can't change destination alignment. It requires a unaligned store.
3110 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3111 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3112 if (MFI->isFixedObjectIndex(FI)) {
3113 // Can't change destination alignment. It requires a unaligned store.
3117 // Give the stack frame object a larger alignment if needed.
3118 if (MFI->getObjectAlignment(FI) < NewAlign)
3119 MFI->setObjectAlignment(FI, NewAlign);
3126 if (VT == MVT::iAny) {
3130 switch (Align & 7) {
3131 case 0: VT = MVT::i64; break;
3132 case 4: VT = MVT::i32; break;
3133 case 2: VT = MVT::i16; break;
3134 default: VT = MVT::i8; break;
3139 while (!TLI.isTypeLegal(LVT))
3140 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3141 assert(LVT.isInteger());
3147 unsigned NumMemOps = 0;
3149 unsigned VTSize = VT.getSizeInBits() / 8;
3150 while (VTSize > Size) {
3151 // For now, only use non-vector load / store's for the left-over pieces.
3152 if (VT.isVector()) {
3154 while (!TLI.isTypeLegal(VT))
3155 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3156 VTSize = VT.getSizeInBits() / 8;
3158 // This can result in a type that is not legal on the target, e.g.
3159 // 1 or 2 bytes on PPC.
3160 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3165 if (++NumMemOps > Limit)
3167 MemOps.push_back(VT);
3174 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3175 SDValue Chain, SDValue Dst,
3176 SDValue Src, uint64_t Size,
3177 unsigned Align, bool AlwaysInline,
3178 const Value *DstSV, uint64_t DstSVOff,
3179 const Value *SrcSV, uint64_t SrcSVOff){
3180 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3182 // Expand memcpy to a series of load and store ops if the size operand falls
3183 // below a certain threshold.
3184 std::vector<MVT> MemOps;
3185 uint64_t Limit = -1ULL;
3187 Limit = TLI.getMaxStoresPerMemcpy();
3188 unsigned DstAlign = Align; // Destination alignment can change.
3191 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3192 Str, CopyFromStr, DAG, TLI))
3196 bool isZeroStr = CopyFromStr && Str.empty();
3197 SmallVector<SDValue, 8> OutChains;
3198 unsigned NumMemOps = MemOps.size();
3199 uint64_t SrcOff = 0, DstOff = 0;
3200 for (unsigned i = 0; i < NumMemOps; i++) {
3202 unsigned VTSize = VT.getSizeInBits() / 8;
3203 SDValue Value, Store;
3205 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3206 // It's unlikely a store of a vector immediate can be done in a single
3207 // instruction. It would require a load from a constantpool first.
3208 // We also handle store a vector with all zero's.
3209 // FIXME: Handle other cases where store of vector immediate is done in
3210 // a single instruction.
3211 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3212 Store = DAG.getStore(Chain, dl, Value,
3213 getMemBasePlusOffset(Dst, DstOff, DAG),
3214 DstSV, DstSVOff + DstOff, false, DstAlign);
3216 // The type might not be legal for the target. This should only happen
3217 // if the type is smaller than a legal type, as on PPC, so the right
3218 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3219 // to Load/Store if NVT==VT.
3220 // FIXME does the case above also need this?
3221 MVT NVT = TLI.getTypeToTransformTo(VT);
3222 assert(NVT.bitsGE(VT));
3223 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3224 getMemBasePlusOffset(Src, SrcOff, DAG),
3225 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3226 Store = DAG.getTruncStore(Chain, dl, Value,
3227 getMemBasePlusOffset(Dst, DstOff, DAG),
3228 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3230 OutChains.push_back(Store);
3235 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3236 &OutChains[0], OutChains.size());
3239 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3240 SDValue Chain, SDValue Dst,
3241 SDValue Src, uint64_t Size,
3242 unsigned Align, bool AlwaysInline,
3243 const Value *DstSV, uint64_t DstSVOff,
3244 const Value *SrcSV, uint64_t SrcSVOff){
3245 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3247 // Expand memmove to a series of load and store ops if the size operand falls
3248 // below a certain threshold.
3249 std::vector<MVT> MemOps;
3250 uint64_t Limit = -1ULL;
3252 Limit = TLI.getMaxStoresPerMemmove();
3253 unsigned DstAlign = Align; // Destination alignment can change.
3256 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3257 Str, CopyFromStr, DAG, TLI))
3260 uint64_t SrcOff = 0, DstOff = 0;
3262 SmallVector<SDValue, 8> LoadValues;
3263 SmallVector<SDValue, 8> LoadChains;
3264 SmallVector<SDValue, 8> OutChains;
3265 unsigned NumMemOps = MemOps.size();
3266 for (unsigned i = 0; i < NumMemOps; i++) {
3268 unsigned VTSize = VT.getSizeInBits() / 8;
3269 SDValue Value, Store;
3271 Value = DAG.getLoad(VT, dl, Chain,
3272 getMemBasePlusOffset(Src, SrcOff, DAG),
3273 SrcSV, SrcSVOff + SrcOff, false, Align);
3274 LoadValues.push_back(Value);
3275 LoadChains.push_back(Value.getValue(1));
3278 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3279 &LoadChains[0], LoadChains.size());
3281 for (unsigned i = 0; i < NumMemOps; i++) {
3283 unsigned VTSize = VT.getSizeInBits() / 8;
3284 SDValue Value, Store;
3286 Store = DAG.getStore(Chain, dl, LoadValues[i],
3287 getMemBasePlusOffset(Dst, DstOff, DAG),
3288 DstSV, DstSVOff + DstOff, false, DstAlign);
3289 OutChains.push_back(Store);
3293 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3294 &OutChains[0], OutChains.size());
3297 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3298 SDValue Chain, SDValue Dst,
3299 SDValue Src, uint64_t Size,
3301 const Value *DstSV, uint64_t DstSVOff) {
3302 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3304 // Expand memset to a series of load/store ops if the size operand
3305 // falls below a certain threshold.
3306 std::vector<MVT> MemOps;
3309 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3310 Size, Align, Str, CopyFromStr, DAG, TLI))
3313 SmallVector<SDValue, 8> OutChains;
3314 uint64_t DstOff = 0;
3316 unsigned NumMemOps = MemOps.size();
3317 for (unsigned i = 0; i < NumMemOps; i++) {
3319 unsigned VTSize = VT.getSizeInBits() / 8;
3320 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3321 SDValue Store = DAG.getStore(Chain, dl, Value,
3322 getMemBasePlusOffset(Dst, DstOff, DAG),
3323 DstSV, DstSVOff + DstOff);
3324 OutChains.push_back(Store);
3328 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3329 &OutChains[0], OutChains.size());
3332 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3333 SDValue Src, SDValue Size,
3334 unsigned Align, bool AlwaysInline,
3335 const Value *DstSV, uint64_t DstSVOff,
3336 const Value *SrcSV, uint64_t SrcSVOff) {
3338 // Check to see if we should lower the memcpy to loads and stores first.
3339 // For cases within the target-specified limits, this is the best choice.
3340 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3342 // Memcpy with size zero? Just return the original chain.
3343 if (ConstantSize->isNullValue())
3347 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3348 ConstantSize->getZExtValue(),
3349 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3350 if (Result.getNode())
3354 // Then check to see if we should lower the memcpy with target-specific
3355 // code. If the target chooses to do this, this is the next best.
3357 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3359 DstSV, DstSVOff, SrcSV, SrcSVOff);
3360 if (Result.getNode())
3363 // If we really need inline code and the target declined to provide it,
3364 // use a (potentially long) sequence of loads and stores.
3366 assert(ConstantSize && "AlwaysInline requires a constant size!");
3367 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3368 ConstantSize->getZExtValue(), Align, true,
3369 DstSV, DstSVOff, SrcSV, SrcSVOff);
3372 // Emit a library call.
3373 TargetLowering::ArgListTy Args;
3374 TargetLowering::ArgListEntry Entry;
3375 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3376 Entry.Node = Dst; Args.push_back(Entry);
3377 Entry.Node = Src; Args.push_back(Entry);
3378 Entry.Node = Size; Args.push_back(Entry);
3379 // FIXME: pass in DebugLoc
3380 std::pair<SDValue,SDValue> CallResult =
3381 TLI.LowerCallTo(Chain, Type::VoidTy,
3382 false, false, false, false, 0, CallingConv::C, false,
3383 getExternalSymbol("memcpy", TLI.getPointerTy()),
3385 return CallResult.second;
3388 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3389 SDValue Src, SDValue Size,
3391 const Value *DstSV, uint64_t DstSVOff,
3392 const Value *SrcSV, uint64_t SrcSVOff) {
3394 // Check to see if we should lower the memmove to loads and stores first.
3395 // For cases within the target-specified limits, this is the best choice.
3396 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3398 // Memmove with size zero? Just return the original chain.
3399 if (ConstantSize->isNullValue())
3403 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3404 ConstantSize->getZExtValue(),
3405 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3406 if (Result.getNode())
3410 // Then check to see if we should lower the memmove with target-specific
3411 // code. If the target chooses to do this, this is the next best.
3413 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3414 DstSV, DstSVOff, SrcSV, SrcSVOff);
3415 if (Result.getNode())
3418 // Emit a library call.
3419 TargetLowering::ArgListTy Args;
3420 TargetLowering::ArgListEntry Entry;
3421 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3422 Entry.Node = Dst; Args.push_back(Entry);
3423 Entry.Node = Src; Args.push_back(Entry);
3424 Entry.Node = Size; Args.push_back(Entry);
3425 // FIXME: pass in DebugLoc
3426 std::pair<SDValue,SDValue> CallResult =
3427 TLI.LowerCallTo(Chain, Type::VoidTy,
3428 false, false, false, false, 0, CallingConv::C, false,
3429 getExternalSymbol("memmove", TLI.getPointerTy()),
3431 return CallResult.second;
3434 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3435 SDValue Src, SDValue Size,
3437 const Value *DstSV, uint64_t DstSVOff) {
3439 // Check to see if we should lower the memset to stores first.
3440 // For cases within the target-specified limits, this is the best choice.
3441 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3443 // Memset with size zero? Just return the original chain.
3444 if (ConstantSize->isNullValue())
3448 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3449 Align, DstSV, DstSVOff);
3450 if (Result.getNode())
3454 // Then check to see if we should lower the memset with target-specific
3455 // code. If the target chooses to do this, this is the next best.
3457 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3459 if (Result.getNode())
3462 // Emit a library call.
3463 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3464 TargetLowering::ArgListTy Args;
3465 TargetLowering::ArgListEntry Entry;
3466 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3467 Args.push_back(Entry);
3468 // Extend or truncate the argument to be an i32 value for the call.
3469 if (Src.getValueType().bitsGT(MVT::i32))
3470 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3472 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3473 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3474 Args.push_back(Entry);
3475 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3476 Args.push_back(Entry);
3477 // FIXME: pass in DebugLoc
3478 std::pair<SDValue,SDValue> CallResult =
3479 TLI.LowerCallTo(Chain, Type::VoidTy,
3480 false, false, false, false, 0, CallingConv::C, false,
3481 getExternalSymbol("memset", TLI.getPointerTy()),
3483 return CallResult.second;
3486 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3488 SDValue Ptr, SDValue Cmp,
3489 SDValue Swp, const Value* PtrVal,
3490 unsigned Alignment) {
3491 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3492 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3494 MVT VT = Cmp.getValueType();
3496 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3497 Alignment = getMVTAlignment(MemVT);
3499 SDVTList VTs = getVTList(VT, MVT::Other);
3500 FoldingSetNodeID ID;
3501 ID.AddInteger(MemVT.getRawBits());
3502 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3503 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3505 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3506 return SDValue(E, 0);
3507 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3508 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3509 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3510 CSEMap.InsertNode(N, IP);
3511 AllNodes.push_back(N);
3512 return SDValue(N, 0);
3515 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3517 SDValue Ptr, SDValue Val,
3518 const Value* PtrVal,
3519 unsigned Alignment) {
3520 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3521 Opcode == ISD::ATOMIC_LOAD_SUB ||
3522 Opcode == ISD::ATOMIC_LOAD_AND ||
3523 Opcode == ISD::ATOMIC_LOAD_OR ||
3524 Opcode == ISD::ATOMIC_LOAD_XOR ||
3525 Opcode == ISD::ATOMIC_LOAD_NAND ||
3526 Opcode == ISD::ATOMIC_LOAD_MIN ||
3527 Opcode == ISD::ATOMIC_LOAD_MAX ||
3528 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3529 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3530 Opcode == ISD::ATOMIC_SWAP) &&
3531 "Invalid Atomic Op");
3533 MVT VT = Val.getValueType();
3535 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3536 Alignment = getMVTAlignment(MemVT);
3538 SDVTList VTs = getVTList(VT, MVT::Other);
3539 FoldingSetNodeID ID;
3540 ID.AddInteger(MemVT.getRawBits());
3541 SDValue Ops[] = {Chain, Ptr, Val};
3542 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3544 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3545 return SDValue(E, 0);
3546 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3547 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3548 Chain, Ptr, Val, PtrVal, Alignment);
3549 CSEMap.InsertNode(N, IP);
3550 AllNodes.push_back(N);
3551 return SDValue(N, 0);
3554 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3555 /// Allowed to return something different (and simpler) if Simplify is true.
3556 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3561 SmallVector<MVT, 4> VTs;
3562 VTs.reserve(NumOps);
3563 for (unsigned i = 0; i < NumOps; ++i)
3564 VTs.push_back(Ops[i].getValueType());
3565 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3570 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3571 const MVT *VTs, unsigned NumVTs,
3572 const SDValue *Ops, unsigned NumOps,
3573 MVT MemVT, const Value *srcValue, int SVOff,
3574 unsigned Align, bool Vol,
3575 bool ReadMem, bool WriteMem) {
3576 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3577 MemVT, srcValue, SVOff, Align, Vol,
3582 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3583 const SDValue *Ops, unsigned NumOps,
3584 MVT MemVT, const Value *srcValue, int SVOff,
3585 unsigned Align, bool Vol,
3586 bool ReadMem, bool WriteMem) {
3587 // Memoize the node unless it returns a flag.
3588 MemIntrinsicSDNode *N;
3589 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3590 FoldingSetNodeID ID;
3591 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3593 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3594 return SDValue(E, 0);
3596 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3597 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3598 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3599 CSEMap.InsertNode(N, IP);
3601 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3602 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3603 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3605 AllNodes.push_back(N);
3606 return SDValue(N, 0);
3610 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3611 bool IsTailCall, bool IsInreg, SDVTList VTs,
3612 const SDValue *Operands, unsigned NumOperands,
3613 unsigned NumFixedArgs) {
3614 // Do not include isTailCall in the folding set profile.
3615 FoldingSetNodeID ID;
3616 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3617 ID.AddInteger(CallingConv);
3618 ID.AddInteger(IsVarArgs);
3620 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3621 // Instead of including isTailCall in the folding set, we just
3622 // set the flag of the existing node.
3624 cast<CallSDNode>(E)->setNotTailCall();
3625 return SDValue(E, 0);
3627 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3628 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3629 VTs, Operands, NumOperands, NumFixedArgs);
3630 CSEMap.InsertNode(N, IP);
3631 AllNodes.push_back(N);
3632 return SDValue(N, 0);
3636 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3637 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3638 SDValue Ptr, SDValue Offset,
3639 const Value *SV, int SVOffset, MVT EVT,
3640 bool isVolatile, unsigned Alignment) {
3641 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3642 Alignment = getMVTAlignment(VT);
3645 ExtType = ISD::NON_EXTLOAD;
3646 } else if (ExtType == ISD::NON_EXTLOAD) {
3647 assert(VT == EVT && "Non-extending load from different memory type!");
3651 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3652 "Invalid vector extload!");
3654 assert(EVT.bitsLT(VT) &&
3655 "Should only be an extending load, not truncating!");
3656 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3657 "Cannot sign/zero extend a FP/Vector load!");
3658 assert(VT.isInteger() == EVT.isInteger() &&
3659 "Cannot convert from FP to Int or Int -> FP!");
3662 bool Indexed = AM != ISD::UNINDEXED;
3663 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3664 "Unindexed load with an offset!");
3666 SDVTList VTs = Indexed ?
3667 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3668 SDValue Ops[] = { Chain, Ptr, Offset };
3669 FoldingSetNodeID ID;
3670 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3671 ID.AddInteger(EVT.getRawBits());
3672 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3674 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3675 return SDValue(E, 0);
3676 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3677 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3678 Alignment, isVolatile);
3679 CSEMap.InsertNode(N, IP);
3680 AllNodes.push_back(N);
3681 return SDValue(N, 0);
3684 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3685 SDValue Chain, SDValue Ptr,
3686 const Value *SV, int SVOffset,
3687 bool isVolatile, unsigned Alignment) {
3688 SDValue Undef = getUNDEF(Ptr.getValueType());
3689 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3690 SV, SVOffset, VT, isVolatile, Alignment);
3693 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3694 SDValue Chain, SDValue Ptr,
3696 int SVOffset, MVT EVT,
3697 bool isVolatile, unsigned Alignment) {
3698 SDValue Undef = getUNDEF(Ptr.getValueType());
3699 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3700 SV, SVOffset, EVT, isVolatile, Alignment);
3704 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3705 SDValue Offset, ISD::MemIndexedMode AM) {
3706 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3707 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3708 "Load is already a indexed load!");
3709 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3710 LD->getChain(), Base, Offset, LD->getSrcValue(),
3711 LD->getSrcValueOffset(), LD->getMemoryVT(),
3712 LD->isVolatile(), LD->getAlignment());
3715 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3716 SDValue Ptr, const Value *SV, int SVOffset,
3717 bool isVolatile, unsigned Alignment) {
3718 MVT VT = Val.getValueType();
3720 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3721 Alignment = getMVTAlignment(VT);
3723 SDVTList VTs = getVTList(MVT::Other);
3724 SDValue Undef = getUNDEF(Ptr.getValueType());
3725 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3726 FoldingSetNodeID ID;
3727 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3728 ID.AddInteger(VT.getRawBits());
3729 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3730 isVolatile, Alignment));
3732 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3733 return SDValue(E, 0);
3734 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3735 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3736 VT, SV, SVOffset, Alignment, isVolatile);
3737 CSEMap.InsertNode(N, IP);
3738 AllNodes.push_back(N);
3739 return SDValue(N, 0);
3742 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3743 SDValue Ptr, const Value *SV,
3744 int SVOffset, MVT SVT,
3745 bool isVolatile, unsigned Alignment) {
3746 MVT VT = Val.getValueType();
3749 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3751 assert(VT.bitsGT(SVT) && "Not a truncation?");
3752 assert(VT.isInteger() == SVT.isInteger() &&
3753 "Can't do FP-INT conversion!");
3755 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3756 Alignment = getMVTAlignment(VT);
3758 SDVTList VTs = getVTList(MVT::Other);
3759 SDValue Undef = getUNDEF(Ptr.getValueType());
3760 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3761 FoldingSetNodeID ID;
3762 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3763 ID.AddInteger(SVT.getRawBits());
3764 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3765 isVolatile, Alignment));
3767 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3768 return SDValue(E, 0);
3769 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3770 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3771 SVT, SV, SVOffset, Alignment, isVolatile);
3772 CSEMap.InsertNode(N, IP);
3773 AllNodes.push_back(N);
3774 return SDValue(N, 0);
3778 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3779 SDValue Offset, ISD::MemIndexedMode AM) {
3780 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3781 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3782 "Store is already a indexed store!");
3783 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3784 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3785 FoldingSetNodeID ID;
3786 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3787 ID.AddInteger(ST->getMemoryVT().getRawBits());
3788 ID.AddInteger(ST->getRawSubclassData());
3790 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3791 return SDValue(E, 0);
3792 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3793 new (N) StoreSDNode(Ops, dl, VTs, AM,
3794 ST->isTruncatingStore(), ST->getMemoryVT(),
3795 ST->getSrcValue(), ST->getSrcValueOffset(),
3796 ST->getAlignment(), ST->isVolatile());
3797 CSEMap.InsertNode(N, IP);
3798 AllNodes.push_back(N);
3799 return SDValue(N, 0);
3802 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3803 SDValue Chain, SDValue Ptr,
3805 SDValue Ops[] = { Chain, Ptr, SV };
3806 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3809 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3810 const SDUse *Ops, unsigned NumOps) {
3812 case 0: return getNode(Opcode, DL, VT);
3813 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3814 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3815 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3819 // Copy from an SDUse array into an SDValue array for use with
3820 // the regular getNode logic.
3821 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3822 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3825 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3826 const SDValue *Ops, unsigned NumOps) {
3828 case 0: return getNode(Opcode, DL, VT);
3829 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3830 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3831 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3837 case ISD::SELECT_CC: {
3838 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3839 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3840 "LHS and RHS of condition must have same type!");
3841 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3842 "True and False arms of SelectCC must have same type!");
3843 assert(Ops[2].getValueType() == VT &&
3844 "select_cc node must be of same type as true and false value!");
3848 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3849 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3850 "LHS/RHS of comparison should match types!");
3857 SDVTList VTs = getVTList(VT);
3859 if (VT != MVT::Flag) {
3860 FoldingSetNodeID ID;
3861 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3864 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3865 return SDValue(E, 0);
3867 N = NodeAllocator.Allocate<SDNode>();
3868 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3869 CSEMap.InsertNode(N, IP);
3871 N = NodeAllocator.Allocate<SDNode>();
3872 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3875 AllNodes.push_back(N);
3879 return SDValue(N, 0);
3882 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3883 const std::vector<MVT> &ResultTys,
3884 const SDValue *Ops, unsigned NumOps) {
3885 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3889 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3890 const MVT *VTs, unsigned NumVTs,
3891 const SDValue *Ops, unsigned NumOps) {
3893 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3894 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3897 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3898 const SDValue *Ops, unsigned NumOps) {
3899 if (VTList.NumVTs == 1)
3900 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3903 // FIXME: figure out how to safely handle things like
3904 // int foo(int x) { return 1 << (x & 255); }
3905 // int bar() { return foo(256); }
3907 case ISD::SRA_PARTS:
3908 case ISD::SRL_PARTS:
3909 case ISD::SHL_PARTS:
3910 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3911 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3912 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3913 else if (N3.getOpcode() == ISD::AND)
3914 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3915 // If the and is only masking out bits that cannot effect the shift,
3916 // eliminate the and.
3917 unsigned NumBits = VT.getSizeInBits()*2;
3918 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3919 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3925 // Memoize the node unless it returns a flag.
3927 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3928 FoldingSetNodeID ID;
3929 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3931 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3932 return SDValue(E, 0);
3934 N = NodeAllocator.Allocate<UnarySDNode>();
3935 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3936 } else if (NumOps == 2) {
3937 N = NodeAllocator.Allocate<BinarySDNode>();
3938 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3939 } else if (NumOps == 3) {
3940 N = NodeAllocator.Allocate<TernarySDNode>();
3941 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3943 N = NodeAllocator.Allocate<SDNode>();
3944 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3946 CSEMap.InsertNode(N, IP);
3949 N = NodeAllocator.Allocate<UnarySDNode>();
3950 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3951 } else if (NumOps == 2) {
3952 N = NodeAllocator.Allocate<BinarySDNode>();
3953 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3954 } else if (NumOps == 3) {
3955 N = NodeAllocator.Allocate<TernarySDNode>();
3956 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3958 N = NodeAllocator.Allocate<SDNode>();
3959 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3962 AllNodes.push_back(N);
3966 return SDValue(N, 0);
3969 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3970 return getNode(Opcode, DL, VTList, 0, 0);
3973 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3975 SDValue Ops[] = { N1 };
3976 return getNode(Opcode, DL, VTList, Ops, 1);
3979 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3980 SDValue N1, SDValue N2) {
3981 SDValue Ops[] = { N1, N2 };
3982 return getNode(Opcode, DL, VTList, Ops, 2);
3985 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3986 SDValue N1, SDValue N2, SDValue N3) {
3987 SDValue Ops[] = { N1, N2, N3 };
3988 return getNode(Opcode, DL, VTList, Ops, 3);
3991 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3992 SDValue N1, SDValue N2, SDValue N3,
3994 SDValue Ops[] = { N1, N2, N3, N4 };
3995 return getNode(Opcode, DL, VTList, Ops, 4);
3998 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3999 SDValue N1, SDValue N2, SDValue N3,
4000 SDValue N4, SDValue N5) {
4001 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4002 return getNode(Opcode, DL, VTList, Ops, 5);
4005 SDVTList SelectionDAG::getVTList(MVT VT) {
4006 return makeVTList(SDNode::getValueTypeList(VT), 1);
4009 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4010 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4011 E = VTList.rend(); I != E; ++I)
4012 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4015 MVT *Array = Allocator.Allocate<MVT>(2);
4018 SDVTList Result = makeVTList(Array, 2);
4019 VTList.push_back(Result);
4023 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4024 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4025 E = VTList.rend(); I != E; ++I)
4026 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4030 MVT *Array = Allocator.Allocate<MVT>(3);
4034 SDVTList Result = makeVTList(Array, 3);
4035 VTList.push_back(Result);
4039 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4040 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4041 E = VTList.rend(); I != E; ++I)
4042 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4043 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4046 MVT *Array = Allocator.Allocate<MVT>(3);
4051 SDVTList Result = makeVTList(Array, 4);
4052 VTList.push_back(Result);
4056 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4058 case 0: assert(0 && "Cannot have nodes without results!");
4059 case 1: return getVTList(VTs[0]);
4060 case 2: return getVTList(VTs[0], VTs[1]);
4061 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4065 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4066 E = VTList.rend(); I != E; ++I) {
4067 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4070 bool NoMatch = false;
4071 for (unsigned i = 2; i != NumVTs; ++i)
4072 if (VTs[i] != I->VTs[i]) {
4080 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4081 std::copy(VTs, VTs+NumVTs, Array);
4082 SDVTList Result = makeVTList(Array, NumVTs);
4083 VTList.push_back(Result);
4088 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4089 /// specified operands. If the resultant node already exists in the DAG,
4090 /// this does not modify the specified node, instead it returns the node that
4091 /// already exists. If the resultant node does not exist in the DAG, the
4092 /// input node is returned. As a degenerate case, if you specify the same
4093 /// input operands as the node already has, the input node is returned.
4094 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4095 SDNode *N = InN.getNode();
4096 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4098 // Check to see if there is no change.
4099 if (Op == N->getOperand(0)) return InN;
4101 // See if the modified node already exists.
4102 void *InsertPos = 0;
4103 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4104 return SDValue(Existing, InN.getResNo());
4106 // Nope it doesn't. Remove the node from its current place in the maps.
4108 if (!RemoveNodeFromCSEMaps(N))
4111 // Now we update the operands.
4112 N->OperandList[0].set(Op);
4114 // If this gets put into a CSE map, add it.
4115 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4119 SDValue SelectionDAG::
4120 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4121 SDNode *N = InN.getNode();
4122 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4124 // Check to see if there is no change.
4125 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4126 return InN; // No operands changed, just return the input node.
4128 // See if the modified node already exists.
4129 void *InsertPos = 0;
4130 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4131 return SDValue(Existing, InN.getResNo());
4133 // Nope it doesn't. Remove the node from its current place in the maps.
4135 if (!RemoveNodeFromCSEMaps(N))
4138 // Now we update the operands.
4139 if (N->OperandList[0] != Op1)
4140 N->OperandList[0].set(Op1);
4141 if (N->OperandList[1] != Op2)
4142 N->OperandList[1].set(Op2);
4144 // If this gets put into a CSE map, add it.
4145 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4149 SDValue SelectionDAG::
4150 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4151 SDValue Ops[] = { Op1, Op2, Op3 };
4152 return UpdateNodeOperands(N, Ops, 3);
4155 SDValue SelectionDAG::
4156 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4157 SDValue Op3, SDValue Op4) {
4158 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4159 return UpdateNodeOperands(N, Ops, 4);
4162 SDValue SelectionDAG::
4163 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4164 SDValue Op3, SDValue Op4, SDValue Op5) {
4165 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4166 return UpdateNodeOperands(N, Ops, 5);
4169 SDValue SelectionDAG::
4170 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4171 SDNode *N = InN.getNode();
4172 assert(N->getNumOperands() == NumOps &&
4173 "Update with wrong number of operands");
4175 // Check to see if there is no change.
4176 bool AnyChange = false;
4177 for (unsigned i = 0; i != NumOps; ++i) {
4178 if (Ops[i] != N->getOperand(i)) {
4184 // No operands changed, just return the input node.
4185 if (!AnyChange) return InN;
4187 // See if the modified node already exists.
4188 void *InsertPos = 0;
4189 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4190 return SDValue(Existing, InN.getResNo());
4192 // Nope it doesn't. Remove the node from its current place in the maps.
4194 if (!RemoveNodeFromCSEMaps(N))
4197 // Now we update the operands.
4198 for (unsigned i = 0; i != NumOps; ++i)
4199 if (N->OperandList[i] != Ops[i])
4200 N->OperandList[i].set(Ops[i]);
4202 // If this gets put into a CSE map, add it.
4203 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4207 /// DropOperands - Release the operands and set this node to have
4209 void SDNode::DropOperands() {
4210 // Unlike the code in MorphNodeTo that does this, we don't need to
4211 // watch for dead nodes here.
4212 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4218 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4221 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4223 SDVTList VTs = getVTList(VT);
4224 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4227 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4228 MVT VT, SDValue Op1) {
4229 SDVTList VTs = getVTList(VT);
4230 SDValue Ops[] = { Op1 };
4231 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4234 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4235 MVT VT, SDValue Op1,
4237 SDVTList VTs = getVTList(VT);
4238 SDValue Ops[] = { Op1, Op2 };
4239 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4242 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4243 MVT VT, SDValue Op1,
4244 SDValue Op2, SDValue Op3) {
4245 SDVTList VTs = getVTList(VT);
4246 SDValue Ops[] = { Op1, Op2, Op3 };
4247 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4250 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4251 MVT VT, const SDValue *Ops,
4253 SDVTList VTs = getVTList(VT);
4254 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4257 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4258 MVT VT1, MVT VT2, const SDValue *Ops,
4260 SDVTList VTs = getVTList(VT1, VT2);
4261 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4264 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4266 SDVTList VTs = getVTList(VT1, VT2);
4267 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4270 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4271 MVT VT1, MVT VT2, MVT VT3,
4272 const SDValue *Ops, unsigned NumOps) {
4273 SDVTList VTs = getVTList(VT1, VT2, VT3);
4274 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4277 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4278 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4279 const SDValue *Ops, unsigned NumOps) {
4280 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4281 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4284 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4287 SDVTList VTs = getVTList(VT1, VT2);
4288 SDValue Ops[] = { Op1 };
4289 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4292 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4294 SDValue Op1, SDValue Op2) {
4295 SDVTList VTs = getVTList(VT1, VT2);
4296 SDValue Ops[] = { Op1, Op2 };
4297 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4300 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4302 SDValue Op1, SDValue Op2,
4304 SDVTList VTs = getVTList(VT1, VT2);
4305 SDValue Ops[] = { Op1, Op2, Op3 };
4306 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4309 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4310 MVT VT1, MVT VT2, MVT VT3,
4311 SDValue Op1, SDValue Op2,
4313 SDVTList VTs = getVTList(VT1, VT2, VT3);
4314 SDValue Ops[] = { Op1, Op2, Op3 };
4315 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4318 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4319 SDVTList VTs, const SDValue *Ops,
4321 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4324 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4326 SDVTList VTs = getVTList(VT);
4327 return MorphNodeTo(N, Opc, VTs, 0, 0);
4330 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4331 MVT VT, SDValue Op1) {
4332 SDVTList VTs = getVTList(VT);
4333 SDValue Ops[] = { Op1 };
4334 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4337 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4338 MVT VT, SDValue Op1,
4340 SDVTList VTs = getVTList(VT);
4341 SDValue Ops[] = { Op1, Op2 };
4342 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4345 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4346 MVT VT, SDValue Op1,
4347 SDValue Op2, SDValue Op3) {
4348 SDVTList VTs = getVTList(VT);
4349 SDValue Ops[] = { Op1, Op2, Op3 };
4350 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4353 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4354 MVT VT, const SDValue *Ops,
4356 SDVTList VTs = getVTList(VT);
4357 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4360 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4361 MVT VT1, MVT VT2, const SDValue *Ops,
4363 SDVTList VTs = getVTList(VT1, VT2);
4364 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4367 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4369 SDVTList VTs = getVTList(VT1, VT2);
4370 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4373 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4374 MVT VT1, MVT VT2, MVT VT3,
4375 const SDValue *Ops, unsigned NumOps) {
4376 SDVTList VTs = getVTList(VT1, VT2, VT3);
4377 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4380 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4383 SDVTList VTs = getVTList(VT1, VT2);
4384 SDValue Ops[] = { Op1 };
4385 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4388 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4390 SDValue Op1, SDValue Op2) {
4391 SDVTList VTs = getVTList(VT1, VT2);
4392 SDValue Ops[] = { Op1, Op2 };
4393 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4396 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4398 SDValue Op1, SDValue Op2,
4400 SDVTList VTs = getVTList(VT1, VT2);
4401 SDValue Ops[] = { Op1, Op2, Op3 };
4402 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4405 /// MorphNodeTo - These *mutate* the specified node to have the specified
4406 /// return type, opcode, and operands.
4408 /// Note that MorphNodeTo returns the resultant node. If there is already a
4409 /// node of the specified opcode and operands, it returns that node instead of
4410 /// the current one. Note that the DebugLoc need not be the same.
4412 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4413 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4414 /// node, and because it doesn't require CSE recalculation for any of
4415 /// the node's users.
4417 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4418 SDVTList VTs, const SDValue *Ops,
4420 // If an identical node already exists, use it.
4422 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4423 FoldingSetNodeID ID;
4424 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4425 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4429 if (!RemoveNodeFromCSEMaps(N))
4432 // Start the morphing.
4434 N->ValueList = VTs.VTs;
4435 N->NumValues = VTs.NumVTs;
4437 // Clear the operands list, updating used nodes to remove this from their
4438 // use list. Keep track of any operands that become dead as a result.
4439 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4440 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4442 SDNode *Used = Use.getNode();
4444 if (Used->use_empty())
4445 DeadNodeSet.insert(Used);
4448 // If NumOps is larger than the # of operands we currently have, reallocate
4449 // the operand list.
4450 if (NumOps > N->NumOperands) {
4451 if (N->OperandsNeedDelete)
4452 delete[] N->OperandList;
4454 if (N->isMachineOpcode()) {
4455 // We're creating a final node that will live unmorphed for the
4456 // remainder of the current SelectionDAG iteration, so we can allocate
4457 // the operands directly out of a pool with no recycling metadata.
4458 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4459 N->OperandsNeedDelete = false;
4461 N->OperandList = new SDUse[NumOps];
4462 N->OperandsNeedDelete = true;
4466 // Assign the new operands.
4467 N->NumOperands = NumOps;
4468 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4469 N->OperandList[i].setUser(N);
4470 N->OperandList[i].setInitial(Ops[i]);
4473 // Delete any nodes that are still dead after adding the uses for the
4475 SmallVector<SDNode *, 16> DeadNodes;
4476 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4477 E = DeadNodeSet.end(); I != E; ++I)
4478 if ((*I)->use_empty())
4479 DeadNodes.push_back(*I);
4480 RemoveDeadNodes(DeadNodes);
4483 CSEMap.InsertNode(N, IP); // Memoize the new node.
4488 /// getTargetNode - These are used for target selectors to create a new node
4489 /// with specified return type(s), target opcode, and operands.
4491 /// Note that getTargetNode returns the resultant node. If there is already a
4492 /// node of the specified opcode and operands, it returns that node instead of
4493 /// the current one.
4494 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4495 return getNode(~Opcode, dl, VT).getNode();
4498 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4500 return getNode(~Opcode, dl, VT, Op1).getNode();
4503 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4504 SDValue Op1, SDValue Op2) {
4505 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4508 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4509 SDValue Op1, SDValue Op2,
4511 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4514 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4515 const SDValue *Ops, unsigned NumOps) {
4516 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4519 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4521 SDVTList VTs = getVTList(VT1, VT2);
4523 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4526 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4527 MVT VT2, SDValue Op1) {
4528 SDVTList VTs = getVTList(VT1, VT2);
4529 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4532 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4533 MVT VT2, SDValue Op1,
4535 SDVTList VTs = getVTList(VT1, VT2);
4536 SDValue Ops[] = { Op1, Op2 };
4537 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4540 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4541 MVT VT2, SDValue Op1,
4542 SDValue Op2, SDValue Op3) {
4543 SDVTList VTs = getVTList(VT1, VT2);
4544 SDValue Ops[] = { Op1, Op2, Op3 };
4545 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4548 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4550 const SDValue *Ops, unsigned NumOps) {
4551 SDVTList VTs = getVTList(VT1, VT2);
4552 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4555 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4556 MVT VT1, MVT VT2, MVT VT3,
4557 SDValue Op1, SDValue Op2) {
4558 SDVTList VTs = getVTList(VT1, VT2, VT3);
4559 SDValue Ops[] = { Op1, Op2 };
4560 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4563 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4564 MVT VT1, MVT VT2, MVT VT3,
4565 SDValue Op1, SDValue Op2,
4567 SDVTList VTs = getVTList(VT1, VT2, VT3);
4568 SDValue Ops[] = { Op1, Op2, Op3 };
4569 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4572 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4573 MVT VT1, MVT VT2, MVT VT3,
4574 const SDValue *Ops, unsigned NumOps) {
4575 SDVTList VTs = getVTList(VT1, VT2, VT3);
4576 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4579 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4580 MVT VT2, MVT VT3, MVT VT4,
4581 const SDValue *Ops, unsigned NumOps) {
4582 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4583 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4586 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4587 const std::vector<MVT> &ResultTys,
4588 const SDValue *Ops, unsigned NumOps) {
4589 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4592 /// getNodeIfExists - Get the specified node if it's already available, or
4593 /// else return NULL.
4594 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4595 const SDValue *Ops, unsigned NumOps) {
4596 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4597 FoldingSetNodeID ID;
4598 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4600 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4606 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4607 /// This can cause recursive merging of nodes in the DAG.
4609 /// This version assumes From has a single result value.
4611 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4612 DAGUpdateListener *UpdateListener) {
4613 SDNode *From = FromN.getNode();
4614 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4615 "Cannot replace with this method!");
4616 assert(From != To.getNode() && "Cannot replace uses of with self");
4618 // Iterate over all the existing uses of From. New uses will be added
4619 // to the beginning of the use list, which we avoid visiting.
4620 // This specifically avoids visiting uses of From that arise while the
4621 // replacement is happening, because any such uses would be the result
4622 // of CSE: If an existing node looks like From after one of its operands
4623 // is replaced by To, we don't want to replace of all its users with To
4624 // too. See PR3018 for more info.
4625 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4629 // This node is about to morph, remove its old self from the CSE maps.
4630 RemoveNodeFromCSEMaps(User);
4632 // A user can appear in a use list multiple times, and when this
4633 // happens the uses are usually next to each other in the list.
4634 // To help reduce the number of CSE recomputations, process all
4635 // the uses of this user that we can find this way.
4637 SDUse &Use = UI.getUse();
4640 } while (UI != UE && *UI == User);
4642 // Now that we have modified User, add it back to the CSE maps. If it
4643 // already exists there, recursively merge the results together.
4644 AddModifiedNodeToCSEMaps(User, UpdateListener);
4648 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4649 /// This can cause recursive merging of nodes in the DAG.
4651 /// This version assumes that for each value of From, there is a
4652 /// corresponding value in To in the same position with the same type.
4654 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4655 DAGUpdateListener *UpdateListener) {
4657 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4658 assert((!From->hasAnyUseOfValue(i) ||
4659 From->getValueType(i) == To->getValueType(i)) &&
4660 "Cannot use this version of ReplaceAllUsesWith!");
4663 // Handle the trivial case.
4667 // Iterate over just the existing users of From. See the comments in
4668 // the ReplaceAllUsesWith above.
4669 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4673 // This node is about to morph, remove its old self from the CSE maps.
4674 RemoveNodeFromCSEMaps(User);
4676 // A user can appear in a use list multiple times, and when this
4677 // happens the uses are usually next to each other in the list.
4678 // To help reduce the number of CSE recomputations, process all
4679 // the uses of this user that we can find this way.
4681 SDUse &Use = UI.getUse();
4684 } while (UI != UE && *UI == User);
4686 // Now that we have modified User, add it back to the CSE maps. If it
4687 // already exists there, recursively merge the results together.
4688 AddModifiedNodeToCSEMaps(User, UpdateListener);
4692 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4693 /// This can cause recursive merging of nodes in the DAG.
4695 /// This version can replace From with any result values. To must match the
4696 /// number and types of values returned by From.
4697 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4699 DAGUpdateListener *UpdateListener) {
4700 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4701 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4703 // Iterate over just the existing users of From. See the comments in
4704 // the ReplaceAllUsesWith above.
4705 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4709 // This node is about to morph, remove its old self from the CSE maps.
4710 RemoveNodeFromCSEMaps(User);
4712 // A user can appear in a use list multiple times, and when this
4713 // happens the uses are usually next to each other in the list.
4714 // To help reduce the number of CSE recomputations, process all
4715 // the uses of this user that we can find this way.
4717 SDUse &Use = UI.getUse();
4718 const SDValue &ToOp = To[Use.getResNo()];
4721 } while (UI != UE && *UI == User);
4723 // Now that we have modified User, add it back to the CSE maps. If it
4724 // already exists there, recursively merge the results together.
4725 AddModifiedNodeToCSEMaps(User, UpdateListener);
4729 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4730 /// uses of other values produced by From.getNode() alone. The Deleted
4731 /// vector is handled the same way as for ReplaceAllUsesWith.
4732 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4733 DAGUpdateListener *UpdateListener){
4734 // Handle the really simple, really trivial case efficiently.
4735 if (From == To) return;
4737 // Handle the simple, trivial, case efficiently.
4738 if (From.getNode()->getNumValues() == 1) {
4739 ReplaceAllUsesWith(From, To, UpdateListener);
4743 // Iterate over just the existing users of From. See the comments in
4744 // the ReplaceAllUsesWith above.
4745 SDNode::use_iterator UI = From.getNode()->use_begin(),
4746 UE = From.getNode()->use_end();
4749 bool UserRemovedFromCSEMaps = false;
4751 // A user can appear in a use list multiple times, and when this
4752 // happens the uses are usually next to each other in the list.
4753 // To help reduce the number of CSE recomputations, process all
4754 // the uses of this user that we can find this way.
4756 SDUse &Use = UI.getUse();
4758 // Skip uses of different values from the same node.
4759 if (Use.getResNo() != From.getResNo()) {
4764 // If this node hasn't been modified yet, it's still in the CSE maps,
4765 // so remove its old self from the CSE maps.
4766 if (!UserRemovedFromCSEMaps) {
4767 RemoveNodeFromCSEMaps(User);
4768 UserRemovedFromCSEMaps = true;
4773 } while (UI != UE && *UI == User);
4775 // We are iterating over all uses of the From node, so if a use
4776 // doesn't use the specific value, no changes are made.
4777 if (!UserRemovedFromCSEMaps)
4780 // Now that we have modified User, add it back to the CSE maps. If it
4781 // already exists there, recursively merge the results together.
4782 AddModifiedNodeToCSEMaps(User, UpdateListener);
4787 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4788 /// to record information about a use.
4795 /// operator< - Sort Memos by User.
4796 bool operator<(const UseMemo &L, const UseMemo &R) {
4797 return (intptr_t)L.User < (intptr_t)R.User;
4801 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4802 /// uses of other values produced by From.getNode() alone. The same value
4803 /// may appear in both the From and To list. The Deleted vector is
4804 /// handled the same way as for ReplaceAllUsesWith.
4805 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4808 DAGUpdateListener *UpdateListener){
4809 // Handle the simple, trivial case efficiently.
4811 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4813 // Read up all the uses and make records of them. This helps
4814 // processing new uses that are introduced during the
4815 // replacement process.
4816 SmallVector<UseMemo, 4> Uses;
4817 for (unsigned i = 0; i != Num; ++i) {
4818 unsigned FromResNo = From[i].getResNo();
4819 SDNode *FromNode = From[i].getNode();
4820 for (SDNode::use_iterator UI = FromNode->use_begin(),
4821 E = FromNode->use_end(); UI != E; ++UI) {
4822 SDUse &Use = UI.getUse();
4823 if (Use.getResNo() == FromResNo) {
4824 UseMemo Memo = { *UI, i, &Use };
4825 Uses.push_back(Memo);
4830 // Sort the uses, so that all the uses from a given User are together.
4831 std::sort(Uses.begin(), Uses.end());
4833 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4834 UseIndex != UseIndexEnd; ) {
4835 // We know that this user uses some value of From. If it is the right
4836 // value, update it.
4837 SDNode *User = Uses[UseIndex].User;
4839 // This node is about to morph, remove its old self from the CSE maps.
4840 RemoveNodeFromCSEMaps(User);
4842 // The Uses array is sorted, so all the uses for a given User
4843 // are next to each other in the list.
4844 // To help reduce the number of CSE recomputations, process all
4845 // the uses of this user that we can find this way.
4847 unsigned i = Uses[UseIndex].Index;
4848 SDUse &Use = *Uses[UseIndex].Use;
4852 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4854 // Now that we have modified User, add it back to the CSE maps. If it
4855 // already exists there, recursively merge the results together.
4856 AddModifiedNodeToCSEMaps(User, UpdateListener);
4860 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4861 /// based on their topological order. It returns the maximum id and a vector
4862 /// of the SDNodes* in assigned order by reference.
4863 unsigned SelectionDAG::AssignTopologicalOrder() {
4865 unsigned DAGSize = 0;
4867 // SortedPos tracks the progress of the algorithm. Nodes before it are
4868 // sorted, nodes after it are unsorted. When the algorithm completes
4869 // it is at the end of the list.
4870 allnodes_iterator SortedPos = allnodes_begin();
4872 // Visit all the nodes. Move nodes with no operands to the front of
4873 // the list immediately. Annotate nodes that do have operands with their
4874 // operand count. Before we do this, the Node Id fields of the nodes
4875 // may contain arbitrary values. After, the Node Id fields for nodes
4876 // before SortedPos will contain the topological sort index, and the
4877 // Node Id fields for nodes At SortedPos and after will contain the
4878 // count of outstanding operands.
4879 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4881 unsigned Degree = N->getNumOperands();
4883 // A node with no uses, add it to the result array immediately.
4884 N->setNodeId(DAGSize++);
4885 allnodes_iterator Q = N;
4887 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4890 // Temporarily use the Node Id as scratch space for the degree count.
4891 N->setNodeId(Degree);
4895 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4896 // such that by the time the end is reached all nodes will be sorted.
4897 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4899 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4902 unsigned Degree = P->getNodeId();
4905 // All of P's operands are sorted, so P may sorted now.
4906 P->setNodeId(DAGSize++);
4908 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4911 // Update P's outstanding operand count.
4912 P->setNodeId(Degree);
4917 assert(SortedPos == AllNodes.end() &&
4918 "Topological sort incomplete!");
4919 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4920 "First node in topological sort is not the entry token!");
4921 assert(AllNodes.front().getNodeId() == 0 &&
4922 "First node in topological sort has non-zero id!");
4923 assert(AllNodes.front().getNumOperands() == 0 &&
4924 "First node in topological sort has operands!");
4925 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4926 "Last node in topologic sort has unexpected id!");
4927 assert(AllNodes.back().use_empty() &&
4928 "Last node in topologic sort has users!");
4929 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4935 //===----------------------------------------------------------------------===//
4937 //===----------------------------------------------------------------------===//
4939 HandleSDNode::~HandleSDNode() {
4943 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
4944 MVT VT, int64_t o, unsigned char TF)
4945 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
4946 Offset(o), TargetFlags(TF) {
4947 TheGlobal = const_cast<GlobalValue*>(GA);
4950 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4951 const Value *srcValue, int SVO,
4952 unsigned alignment, bool vol)
4953 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4954 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4955 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4956 assert(getAlignment() == alignment && "Alignment representation error!");
4957 assert(isVolatile() == vol && "Volatile representation error!");
4960 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4962 unsigned NumOps, MVT memvt, const Value *srcValue,
4963 int SVO, unsigned alignment, bool vol)
4964 : SDNode(Opc, dl, VTs, Ops, NumOps),
4965 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4966 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4967 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4968 assert(getAlignment() == alignment && "Alignment representation error!");
4969 assert(isVolatile() == vol && "Volatile representation error!");
4972 /// getMemOperand - Return a MachineMemOperand object describing the memory
4973 /// reference performed by this memory reference.
4974 MachineMemOperand MemSDNode::getMemOperand() const {
4976 if (isa<LoadSDNode>(this))
4977 Flags = MachineMemOperand::MOLoad;
4978 else if (isa<StoreSDNode>(this))
4979 Flags = MachineMemOperand::MOStore;
4980 else if (isa<AtomicSDNode>(this)) {
4981 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4984 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4985 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4986 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4987 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4990 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4991 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4993 // Check if the memory reference references a frame index
4994 const FrameIndexSDNode *FI =
4995 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4996 if (!getSrcValue() && FI)
4997 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4998 Flags, 0, Size, getAlignment());
5000 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5001 Size, getAlignment());
5004 /// Profile - Gather unique data for the node.
5006 void SDNode::Profile(FoldingSetNodeID &ID) const {
5007 AddNodeIDNode(ID, this);
5010 static ManagedStatic<std::set<MVT, MVT::compareRawBits> > EVTs;
5011 static MVT VTs[MVT::LAST_VALUETYPE];
5012 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5014 /// getValueTypeList - Return a pointer to the specified value type.
5016 const MVT *SDNode::getValueTypeList(MVT VT) {
5017 sys::SmartScopedLock<true> Lock(*VTMutex);
5018 if (VT.isExtended()) {
5019 return &(*EVTs->insert(VT).first);
5021 VTs[VT.getSimpleVT()] = VT;
5022 return &VTs[VT.getSimpleVT()];
5026 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5027 /// indicated value. This method ignores uses of other values defined by this
5029 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5030 assert(Value < getNumValues() && "Bad value!");
5032 // TODO: Only iterate over uses of a given value of the node
5033 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5034 if (UI.getUse().getResNo() == Value) {
5041 // Found exactly the right number of uses?
5046 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5047 /// value. This method ignores uses of other values defined by this operation.
5048 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5049 assert(Value < getNumValues() && "Bad value!");
5051 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5052 if (UI.getUse().getResNo() == Value)
5059 /// isOnlyUserOf - Return true if this node is the only use of N.
5061 bool SDNode::isOnlyUserOf(SDNode *N) const {
5063 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5074 /// isOperand - Return true if this node is an operand of N.
5076 bool SDValue::isOperandOf(SDNode *N) const {
5077 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5078 if (*this == N->getOperand(i))
5083 bool SDNode::isOperandOf(SDNode *N) const {
5084 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5085 if (this == N->OperandList[i].getNode())
5090 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5091 /// be a chain) reaches the specified operand without crossing any
5092 /// side-effecting instructions. In practice, this looks through token
5093 /// factors and non-volatile loads. In order to remain efficient, this only
5094 /// looks a couple of nodes in, it does not do an exhaustive search.
5095 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5096 unsigned Depth) const {
5097 if (*this == Dest) return true;
5099 // Don't search too deeply, we just want to be able to see through
5100 // TokenFactor's etc.
5101 if (Depth == 0) return false;
5103 // If this is a token factor, all inputs to the TF happen in parallel. If any
5104 // of the operands of the TF reach dest, then we can do the xform.
5105 if (getOpcode() == ISD::TokenFactor) {
5106 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5107 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5112 // Loads don't have side effects, look through them.
5113 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5114 if (!Ld->isVolatile())
5115 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5121 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5122 SmallPtrSet<SDNode *, 32> &Visited) {
5123 if (found || !Visited.insert(N))
5126 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5127 SDNode *Op = N->getOperand(i).getNode();
5132 findPredecessor(Op, P, found, Visited);
5136 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5137 /// is either an operand of N or it can be reached by recursively traversing
5138 /// up the operands.
5139 /// NOTE: this is an expensive method. Use it carefully.
5140 bool SDNode::isPredecessorOf(SDNode *N) const {
5141 SmallPtrSet<SDNode *, 32> Visited;
5143 findPredecessor(N, this, found, Visited);
5147 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5148 assert(Num < NumOperands && "Invalid child # of SDNode!");
5149 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5152 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5153 switch (getOpcode()) {
5155 if (getOpcode() < ISD::BUILTIN_OP_END)
5156 return "<<Unknown DAG Node>>";
5157 if (isMachineOpcode()) {
5159 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5160 if (getMachineOpcode() < TII->getNumOpcodes())
5161 return TII->get(getMachineOpcode()).getName();
5162 return "<<Unknown Machine Node>>";
5165 const TargetLowering &TLI = G->getTargetLoweringInfo();
5166 const char *Name = TLI.getTargetNodeName(getOpcode());
5167 if (Name) return Name;
5168 return "<<Unknown Target Node>>";
5170 return "<<Unknown Node>>";
5173 case ISD::DELETED_NODE:
5174 return "<<Deleted Node!>>";
5176 case ISD::PREFETCH: return "Prefetch";
5177 case ISD::MEMBARRIER: return "MemBarrier";
5178 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5179 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5180 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5181 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5182 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5183 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5184 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5185 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5186 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5187 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5188 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5189 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5190 case ISD::PCMARKER: return "PCMarker";
5191 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5192 case ISD::SRCVALUE: return "SrcValue";
5193 case ISD::MEMOPERAND: return "MemOperand";
5194 case ISD::EntryToken: return "EntryToken";
5195 case ISD::TokenFactor: return "TokenFactor";
5196 case ISD::AssertSext: return "AssertSext";
5197 case ISD::AssertZext: return "AssertZext";
5199 case ISD::BasicBlock: return "BasicBlock";
5200 case ISD::ARG_FLAGS: return "ArgFlags";
5201 case ISD::VALUETYPE: return "ValueType";
5202 case ISD::Register: return "Register";
5204 case ISD::Constant: return "Constant";
5205 case ISD::ConstantFP: return "ConstantFP";
5206 case ISD::GlobalAddress: return "GlobalAddress";
5207 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5208 case ISD::FrameIndex: return "FrameIndex";
5209 case ISD::JumpTable: return "JumpTable";
5210 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5211 case ISD::RETURNADDR: return "RETURNADDR";
5212 case ISD::FRAMEADDR: return "FRAMEADDR";
5213 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5214 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5215 case ISD::EHSELECTION: return "EHSELECTION";
5216 case ISD::EH_RETURN: return "EH_RETURN";
5217 case ISD::ConstantPool: return "ConstantPool";
5218 case ISD::ExternalSymbol: return "ExternalSymbol";
5219 case ISD::INTRINSIC_WO_CHAIN: {
5220 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5221 return Intrinsic::getName((Intrinsic::ID)IID);
5223 case ISD::INTRINSIC_VOID:
5224 case ISD::INTRINSIC_W_CHAIN: {
5225 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5226 return Intrinsic::getName((Intrinsic::ID)IID);
5229 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5230 case ISD::TargetConstant: return "TargetConstant";
5231 case ISD::TargetConstantFP:return "TargetConstantFP";
5232 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5233 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5234 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5235 case ISD::TargetJumpTable: return "TargetJumpTable";
5236 case ISD::TargetConstantPool: return "TargetConstantPool";
5237 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5239 case ISD::CopyToReg: return "CopyToReg";
5240 case ISD::CopyFromReg: return "CopyFromReg";
5241 case ISD::UNDEF: return "undef";
5242 case ISD::MERGE_VALUES: return "merge_values";
5243 case ISD::INLINEASM: return "inlineasm";
5244 case ISD::DBG_LABEL: return "dbg_label";
5245 case ISD::EH_LABEL: return "eh_label";
5246 case ISD::DECLARE: return "declare";
5247 case ISD::HANDLENODE: return "handlenode";
5248 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5249 case ISD::CALL: return "call";
5252 case ISD::FABS: return "fabs";
5253 case ISD::FNEG: return "fneg";
5254 case ISD::FSQRT: return "fsqrt";
5255 case ISD::FSIN: return "fsin";
5256 case ISD::FCOS: return "fcos";
5257 case ISD::FPOWI: return "fpowi";
5258 case ISD::FPOW: return "fpow";
5259 case ISD::FTRUNC: return "ftrunc";
5260 case ISD::FFLOOR: return "ffloor";
5261 case ISD::FCEIL: return "fceil";
5262 case ISD::FRINT: return "frint";
5263 case ISD::FNEARBYINT: return "fnearbyint";
5266 case ISD::ADD: return "add";
5267 case ISD::SUB: return "sub";
5268 case ISD::MUL: return "mul";
5269 case ISD::MULHU: return "mulhu";
5270 case ISD::MULHS: return "mulhs";
5271 case ISD::SDIV: return "sdiv";
5272 case ISD::UDIV: return "udiv";
5273 case ISD::SREM: return "srem";
5274 case ISD::UREM: return "urem";
5275 case ISD::SMUL_LOHI: return "smul_lohi";
5276 case ISD::UMUL_LOHI: return "umul_lohi";
5277 case ISD::SDIVREM: return "sdivrem";
5278 case ISD::UDIVREM: return "udivrem";
5279 case ISD::AND: return "and";
5280 case ISD::OR: return "or";
5281 case ISD::XOR: return "xor";
5282 case ISD::SHL: return "shl";
5283 case ISD::SRA: return "sra";
5284 case ISD::SRL: return "srl";
5285 case ISD::ROTL: return "rotl";
5286 case ISD::ROTR: return "rotr";
5287 case ISD::FADD: return "fadd";
5288 case ISD::FSUB: return "fsub";
5289 case ISD::FMUL: return "fmul";
5290 case ISD::FDIV: return "fdiv";
5291 case ISD::FREM: return "frem";
5292 case ISD::FCOPYSIGN: return "fcopysign";
5293 case ISD::FGETSIGN: return "fgetsign";
5295 case ISD::SETCC: return "setcc";
5296 case ISD::VSETCC: return "vsetcc";
5297 case ISD::SELECT: return "select";
5298 case ISD::SELECT_CC: return "select_cc";
5299 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5300 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5301 case ISD::CONCAT_VECTORS: return "concat_vectors";
5302 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5303 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5304 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5305 case ISD::CARRY_FALSE: return "carry_false";
5306 case ISD::ADDC: return "addc";
5307 case ISD::ADDE: return "adde";
5308 case ISD::SADDO: return "saddo";
5309 case ISD::UADDO: return "uaddo";
5310 case ISD::SSUBO: return "ssubo";
5311 case ISD::USUBO: return "usubo";
5312 case ISD::SMULO: return "smulo";
5313 case ISD::UMULO: return "umulo";
5314 case ISD::SUBC: return "subc";
5315 case ISD::SUBE: return "sube";
5316 case ISD::SHL_PARTS: return "shl_parts";
5317 case ISD::SRA_PARTS: return "sra_parts";
5318 case ISD::SRL_PARTS: return "srl_parts";
5320 // Conversion operators.
5321 case ISD::SIGN_EXTEND: return "sign_extend";
5322 case ISD::ZERO_EXTEND: return "zero_extend";
5323 case ISD::ANY_EXTEND: return "any_extend";
5324 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5325 case ISD::TRUNCATE: return "truncate";
5326 case ISD::FP_ROUND: return "fp_round";
5327 case ISD::FLT_ROUNDS_: return "flt_rounds";
5328 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5329 case ISD::FP_EXTEND: return "fp_extend";
5331 case ISD::SINT_TO_FP: return "sint_to_fp";
5332 case ISD::UINT_TO_FP: return "uint_to_fp";
5333 case ISD::FP_TO_SINT: return "fp_to_sint";
5334 case ISD::FP_TO_UINT: return "fp_to_uint";
5335 case ISD::BIT_CONVERT: return "bit_convert";
5337 case ISD::CONVERT_RNDSAT: {
5338 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5339 default: assert(0 && "Unknown cvt code!");
5340 case ISD::CVT_FF: return "cvt_ff";
5341 case ISD::CVT_FS: return "cvt_fs";
5342 case ISD::CVT_FU: return "cvt_fu";
5343 case ISD::CVT_SF: return "cvt_sf";
5344 case ISD::CVT_UF: return "cvt_uf";
5345 case ISD::CVT_SS: return "cvt_ss";
5346 case ISD::CVT_SU: return "cvt_su";
5347 case ISD::CVT_US: return "cvt_us";
5348 case ISD::CVT_UU: return "cvt_uu";
5352 // Control flow instructions
5353 case ISD::BR: return "br";
5354 case ISD::BRIND: return "brind";
5355 case ISD::BR_JT: return "br_jt";
5356 case ISD::BRCOND: return "brcond";
5357 case ISD::BR_CC: return "br_cc";
5358 case ISD::RET: return "ret";
5359 case ISD::CALLSEQ_START: return "callseq_start";
5360 case ISD::CALLSEQ_END: return "callseq_end";
5363 case ISD::LOAD: return "load";
5364 case ISD::STORE: return "store";
5365 case ISD::VAARG: return "vaarg";
5366 case ISD::VACOPY: return "vacopy";
5367 case ISD::VAEND: return "vaend";
5368 case ISD::VASTART: return "vastart";
5369 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5370 case ISD::EXTRACT_ELEMENT: return "extract_element";
5371 case ISD::BUILD_PAIR: return "build_pair";
5372 case ISD::STACKSAVE: return "stacksave";
5373 case ISD::STACKRESTORE: return "stackrestore";
5374 case ISD::TRAP: return "trap";
5377 case ISD::BSWAP: return "bswap";
5378 case ISD::CTPOP: return "ctpop";
5379 case ISD::CTTZ: return "cttz";
5380 case ISD::CTLZ: return "ctlz";
5383 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5384 case ISD::DEBUG_LOC: return "debug_loc";
5387 case ISD::TRAMPOLINE: return "trampoline";
5390 switch (cast<CondCodeSDNode>(this)->get()) {
5391 default: assert(0 && "Unknown setcc condition!");
5392 case ISD::SETOEQ: return "setoeq";
5393 case ISD::SETOGT: return "setogt";
5394 case ISD::SETOGE: return "setoge";
5395 case ISD::SETOLT: return "setolt";
5396 case ISD::SETOLE: return "setole";
5397 case ISD::SETONE: return "setone";
5399 case ISD::SETO: return "seto";
5400 case ISD::SETUO: return "setuo";
5401 case ISD::SETUEQ: return "setue";
5402 case ISD::SETUGT: return "setugt";
5403 case ISD::SETUGE: return "setuge";
5404 case ISD::SETULT: return "setult";
5405 case ISD::SETULE: return "setule";
5406 case ISD::SETUNE: return "setune";
5408 case ISD::SETEQ: return "seteq";
5409 case ISD::SETGT: return "setgt";
5410 case ISD::SETGE: return "setge";
5411 case ISD::SETLT: return "setlt";
5412 case ISD::SETLE: return "setle";
5413 case ISD::SETNE: return "setne";
5418 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5427 return "<post-inc>";
5429 return "<post-dec>";
5433 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5434 std::string S = "< ";
5448 if (getByValAlign())
5449 S += "byval-align:" + utostr(getByValAlign()) + " ";
5451 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5453 S += "byval-size:" + utostr(getByValSize()) + " ";
5457 void SDNode::dump() const { dump(0); }
5458 void SDNode::dump(const SelectionDAG *G) const {
5462 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5463 OS << (void*)this << ": ";
5465 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5467 if (getValueType(i) == MVT::Other)
5470 OS << getValueType(i).getMVTString();
5472 OS << " = " << getOperationName(G);
5475 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5476 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5477 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5479 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5480 int Idx = SVN->getMaskElt(i);
5490 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5491 OS << '<' << CSDN->getAPIntValue() << '>';
5492 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5493 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5494 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5495 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5496 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5499 CSDN->getValueAPF().bitcastToAPInt().dump();
5502 } else if (const GlobalAddressSDNode *GADN =
5503 dyn_cast<GlobalAddressSDNode>(this)) {
5504 int64_t offset = GADN->getOffset();
5506 WriteAsOperand(OS, GADN->getGlobal());
5509 OS << " + " << offset;
5511 OS << " " << offset;
5512 if (unsigned char TF = GADN->getTargetFlags())
5513 OS << " [TF=" << TF << ']';
5514 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5515 OS << "<" << FIDN->getIndex() << ">";
5516 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5517 OS << "<" << JTDN->getIndex() << ">";
5518 if (unsigned char TF = JTDN->getTargetFlags())
5519 OS << " [TF=" << TF << ']';
5520 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5521 int offset = CP->getOffset();
5522 if (CP->isMachineConstantPoolEntry())
5523 OS << "<" << *CP->getMachineCPVal() << ">";
5525 OS << "<" << *CP->getConstVal() << ">";
5527 OS << " + " << offset;
5529 OS << " " << offset;
5530 if (unsigned char TF = CP->getTargetFlags())
5531 OS << " [TF=" << TF << ']';
5532 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5534 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5536 OS << LBB->getName() << " ";
5537 OS << (const void*)BBDN->getBasicBlock() << ">";
5538 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5539 if (G && R->getReg() &&
5540 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5541 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5543 OS << " #" << R->getReg();
5545 } else if (const ExternalSymbolSDNode *ES =
5546 dyn_cast<ExternalSymbolSDNode>(this)) {
5547 OS << "'" << ES->getSymbol() << "'";
5548 if (unsigned char TF = ES->getTargetFlags())
5549 OS << " [TF=" << TF << ']';
5550 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5552 OS << "<" << M->getValue() << ">";
5555 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5556 if (M->MO.getValue())
5557 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5559 OS << "<null:" << M->MO.getOffset() << ">";
5560 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5561 OS << N->getArgFlags().getArgFlagsString();
5562 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5563 OS << ":" << N->getVT().getMVTString();
5565 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5566 const Value *SrcValue = LD->getSrcValue();
5567 int SrcOffset = LD->getSrcValueOffset();
5573 OS << ":" << SrcOffset << ">";
5576 switch (LD->getExtensionType()) {
5577 default: doExt = false; break;
5578 case ISD::EXTLOAD: OS << " <anyext "; break;
5579 case ISD::SEXTLOAD: OS << " <sext "; break;
5580 case ISD::ZEXTLOAD: OS << " <zext "; break;
5583 OS << LD->getMemoryVT().getMVTString() << ">";
5585 const char *AM = getIndexedModeName(LD->getAddressingMode());
5588 if (LD->isVolatile())
5589 OS << " <volatile>";
5590 OS << " alignment=" << LD->getAlignment();
5591 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5592 const Value *SrcValue = ST->getSrcValue();
5593 int SrcOffset = ST->getSrcValueOffset();
5599 OS << ":" << SrcOffset << ">";
5601 if (ST->isTruncatingStore())
5602 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5604 const char *AM = getIndexedModeName(ST->getAddressingMode());
5607 if (ST->isVolatile())
5608 OS << " <volatile>";
5609 OS << " alignment=" << ST->getAlignment();
5610 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5611 const Value *SrcValue = AT->getSrcValue();
5612 int SrcOffset = AT->getSrcValueOffset();
5618 OS << ":" << SrcOffset << ">";
5619 if (AT->isVolatile())
5620 OS << " <volatile>";
5621 OS << " alignment=" << AT->getAlignment();
5625 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5628 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5630 OS << (void*)getOperand(i).getNode();
5631 if (unsigned RN = getOperand(i).getResNo())
5634 print_details(OS, G);
5637 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5638 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5639 if (N->getOperand(i).getNode()->hasOneUse())
5640 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5642 cerr << "\n" << std::string(indent+2, ' ')
5643 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5646 cerr << "\n" << std::string(indent, ' ');
5650 void SelectionDAG::dump() const {
5651 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5653 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5655 const SDNode *N = I;
5656 if (!N->hasOneUse() && N != getRoot().getNode())
5657 DumpNodes(N, 2, this);
5660 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5665 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5667 print_details(OS, G);
5670 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5671 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5672 const SelectionDAG *G, VisitedSDNodeSet &once) {
5673 if (!once.insert(N)) // If we've been here before, return now.
5675 // Dump the current SDNode, but don't end the line yet.
5676 OS << std::string(indent, ' ');
5678 // Having printed this SDNode, walk the children:
5679 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5680 const SDNode *child = N->getOperand(i).getNode();
5683 if (child->getNumOperands() == 0) {
5684 // This child has no grandchildren; print it inline right here.
5685 child->printr(OS, G);
5687 } else { // Just the address. FIXME: also print the child's opcode
5689 if (unsigned RN = N->getOperand(i).getResNo())
5694 // Dump children that have grandchildren on their own line(s).
5695 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5696 const SDNode *child = N->getOperand(i).getNode();
5697 DumpNodesr(OS, child, indent+2, G, once);
5701 void SDNode::dumpr() const {
5702 VisitedSDNodeSet once;
5703 DumpNodesr(errs(), this, 0, 0, once);
5707 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5708 unsigned GlobalAddressSDNode::getAddressSpace() const {
5709 return getGlobal()->getType()->getAddressSpace();
5713 const Type *ConstantPoolSDNode::getType() const {
5714 if (isMachineConstantPoolEntry())
5715 return Val.MachineCPVal->getType();
5716 return Val.ConstVal->getType();
5719 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5721 unsigned &SplatBitSize,
5723 unsigned MinSplatBits) {
5724 MVT VT = getValueType(0);
5725 assert(VT.isVector() && "Expected a vector type");
5726 unsigned sz = VT.getSizeInBits();
5727 if (MinSplatBits > sz)
5730 SplatValue = APInt(sz, 0);
5731 SplatUndef = APInt(sz, 0);
5733 // Get the bits. Bits with undefined values (when the corresponding element
5734 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5735 // in SplatValue. If any of the values are not constant, give up and return
5737 unsigned int nOps = getNumOperands();
5738 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5739 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5740 for (unsigned i = 0; i < nOps; ++i) {
5741 SDValue OpVal = getOperand(i);
5742 unsigned BitPos = i * EltBitSize;
5744 if (OpVal.getOpcode() == ISD::UNDEF)
5745 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5746 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5747 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5748 zextOrTrunc(sz) << BitPos);
5749 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5750 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5755 // The build_vector is all constants or undefs. Find the smallest element
5756 // size that splats the vector.
5758 HasAnyUndefs = (SplatUndef != 0);
5761 unsigned HalfSize = sz / 2;
5762 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5763 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5764 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5765 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5767 // If the two halves do not match (ignoring undef bits), stop here.
5768 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5769 MinSplatBits > HalfSize)
5772 SplatValue = HighValue | LowValue;
5773 SplatUndef = HighUndef & LowUndef;
5782 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, MVT VT) {
5783 // Find the first non-undef value in the shuffle mask.
5785 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5788 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5790 // Make sure all remaining elements are either undef or the same as the first
5792 for (int Idx = Mask[i]; i != e; ++i)
5793 if (Mask[i] >= 0 && Mask[i] != Idx)