1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/Support/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BITCAST)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BITCAST)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
784 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
785 static void VerifySDNode(SDNode *N) {
786 // The SDNode allocators cannot be used to allocate nodes with fields that are
787 // not present in an SDNode!
788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
811 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
813 static void VerifyMachineNode(SDNode *N) {
814 // The MachineNode allocators cannot be used to allocate nodes with fields
815 // that are not present in a MachineNode!
816 // Currently there are no such nodes.
822 /// getEVTAlignment - Compute the default alignment value for the
825 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
826 const Type *Ty = VT == MVT::iPTR ?
827 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
828 VT.getTypeForEVT(*getContext());
830 return TLI.getTargetData()->getABITypeAlignment(Ty);
833 // EntryNode could meaningfully have debug info if we can find it...
834 SelectionDAG::SelectionDAG(const TargetMachine &tm)
835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
837 Root(getEntryNode()), Ordering(0) {
838 AllNodes.push_back(&EntryNode);
839 Ordering = new SDNodeOrdering();
840 DbgInfo = new SDDbgInfo();
843 void SelectionDAG::init(MachineFunction &mf) {
845 Context = &mf.getFunction()->getContext();
848 SelectionDAG::~SelectionDAG() {
854 void SelectionDAG::allnodes_clear() {
855 assert(&*AllNodes.begin() == &EntryNode);
856 AllNodes.remove(AllNodes.begin());
857 while (!AllNodes.empty())
858 DeallocateNode(AllNodes.begin());
861 void SelectionDAG::clear() {
863 OperandAllocator.Reset();
866 ExtendedValueTypeNodes.clear();
867 ExternalSymbols.clear();
868 TargetExternalSymbols.clear();
869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
870 static_cast<CondCodeSDNode*>(0));
871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
872 static_cast<SDNode*>(0));
874 EntryNode.UseList = 0;
875 AllNodes.push_back(&EntryNode);
876 Root = getEntryNode();
881 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
882 return VT.bitsGT(Op.getValueType()) ?
883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
884 getNode(ISD::TRUNCATE, DL, VT, Op);
887 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
888 return VT.bitsGT(Op.getValueType()) ?
889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
890 getNode(ISD::TRUNCATE, DL, VT, Op);
893 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
894 assert(!VT.isVector() &&
895 "getZeroExtendInReg should use the vector element type instead of "
897 if (Op.getValueType() == VT) return Op;
898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
899 APInt Imm = APInt::getLowBitsSet(BitWidth,
901 return getNode(ISD::AND, DL, Op.getValueType(), Op,
902 getConstant(Imm, Op.getValueType()));
905 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
907 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
908 EVT EltVT = VT.getScalarType();
910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
911 return getNode(ISD::XOR, DL, VT, Val, NegOne);
914 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
915 EVT EltVT = VT.getScalarType();
916 assert((EltVT.getSizeInBits() >= 64 ||
917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
918 "getConstant with a uint64_t value that doesn't fit in the type!");
919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
922 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
926 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
927 assert(VT.isInteger() && "Cannot create FP integer constant!");
929 EVT EltVT = VT.getScalarType();
930 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
931 "APInt size does not match type size!");
933 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
935 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
939 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
941 return SDValue(N, 0);
944 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
958 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
959 return getConstant(Val, TLI.getPointerTy(), isTarget);
963 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
964 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
967 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
968 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
970 EVT EltVT = VT.getScalarType();
972 // Do the map lookup using the actual bit pattern for the floating point
973 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
974 // we don't have issues with SNANs.
975 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
977 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
981 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
983 return SDValue(N, 0);
986 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
991 SDValue Result(N, 0);
993 SmallVector<SDValue, 8> Ops;
994 Ops.assign(VT.getVectorNumElements(), Result);
995 // FIXME DebugLoc info might be appropriate here
996 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1001 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1002 EVT EltVT = VT.getScalarType();
1003 if (EltVT==MVT::f32)
1004 return getConstantFP(APFloat((float)Val), VT, isTarget);
1005 else if (EltVT==MVT::f64)
1006 return getConstantFP(APFloat(Val), VT, isTarget);
1007 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1009 APFloat apf = APFloat(Val);
1010 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1012 return getConstantFP(apf, VT, isTarget);
1014 assert(0 && "Unsupported type in getConstantFP");
1019 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1020 EVT VT, int64_t Offset,
1022 unsigned char TargetFlags) {
1023 assert((TargetFlags == 0 || isTargetGA) &&
1024 "Cannot set target flags on target-independent globals");
1026 // Truncate (with sign-extension) the offset value to the pointer size.
1027 EVT PTy = TLI.getPointerTy();
1028 unsigned BitWidth = PTy.getSizeInBits();
1030 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1032 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1034 // If GV is an alias then use the aliasee for determining thread-localness.
1035 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1036 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1040 if (GVar && GVar->isThreadLocal())
1041 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1043 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1045 FoldingSetNodeID ID;
1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1048 ID.AddInteger(Offset);
1049 ID.AddInteger(TargetFlags);
1051 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1052 return SDValue(E, 0);
1054 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1055 Offset, TargetFlags);
1056 CSEMap.InsertNode(N, IP);
1057 AllNodes.push_back(N);
1058 return SDValue(N, 0);
1061 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1062 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1063 FoldingSetNodeID ID;
1064 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1068 return SDValue(E, 0);
1070 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1076 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent jump tables");
1080 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(TargetFlags);
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1089 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1097 unsigned Alignment, int Offset,
1099 unsigned char TargetFlags) {
1100 assert((TargetFlags == 0 || isTarget) &&
1101 "Cannot set target flags on target-independent globals");
1103 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1104 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1107 ID.AddInteger(Alignment);
1108 ID.AddInteger(Offset);
1110 ID.AddInteger(TargetFlags);
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1116 Alignment, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1123 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1124 unsigned Alignment, int Offset,
1126 unsigned char TargetFlags) {
1127 assert((TargetFlags == 0 || isTarget) &&
1128 "Cannot set target flags on target-independent globals");
1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1132 FoldingSetNodeID ID;
1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1134 ID.AddInteger(Alignment);
1135 ID.AddInteger(Offset);
1136 C->AddSelectionDAGCSEId(ID);
1137 ID.AddInteger(TargetFlags);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1143 Alignment, TargetFlags);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1150 FoldingSetNodeID ID;
1151 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1158 CSEMap.InsertNode(N, IP);
1159 AllNodes.push_back(N);
1160 return SDValue(N, 0);
1163 SDValue SelectionDAG::getValueType(EVT VT) {
1164 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1165 ValueTypeNodes.size())
1166 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1168 SDNode *&N = VT.isExtended() ?
1169 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1171 if (N) return SDValue(N, 0);
1172 N = new (NodeAllocator) VTSDNode(VT);
1173 AllNodes.push_back(N);
1174 return SDValue(N, 0);
1177 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1178 SDNode *&N = ExternalSymbols[Sym];
1179 if (N) return SDValue(N, 0);
1180 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1186 unsigned char TargetFlags) {
1188 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1190 if (N) return SDValue(N, 0);
1191 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1197 if ((unsigned)Cond >= CondCodeNodes.size())
1198 CondCodeNodes.resize(Cond+1);
1200 if (CondCodeNodes[Cond] == 0) {
1201 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1202 CondCodeNodes[Cond] = N;
1203 AllNodes.push_back(N);
1206 return SDValue(CondCodeNodes[Cond], 0);
1209 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1210 // the shuffle mask M that point at N1 to point at N2, and indices that point
1211 // N2 to point at N1.
1212 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1214 int NElts = M.size();
1215 for (int i = 0; i != NElts; ++i) {
1223 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1224 SDValue N2, const int *Mask) {
1225 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1226 assert(VT.isVector() && N1.getValueType().isVector() &&
1227 "Vector Shuffle VTs must be a vectors");
1228 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1229 && "Vector Shuffle VTs must have same element type");
1231 // Canonicalize shuffle undef, undef -> undef
1232 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1233 return getUNDEF(VT);
1235 // Validate that all indices in Mask are within the range of the elements
1236 // input to the shuffle.
1237 unsigned NElts = VT.getVectorNumElements();
1238 SmallVector<int, 8> MaskVec;
1239 for (unsigned i = 0; i != NElts; ++i) {
1240 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1241 MaskVec.push_back(Mask[i]);
1244 // Canonicalize shuffle v, v -> v, undef
1247 for (unsigned i = 0; i != NElts; ++i)
1248 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1251 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1252 if (N1.getOpcode() == ISD::UNDEF)
1253 commuteShuffle(N1, N2, MaskVec);
1255 // Canonicalize all index into lhs, -> shuffle lhs, undef
1256 // Canonicalize all index into rhs, -> shuffle rhs, undef
1257 bool AllLHS = true, AllRHS = true;
1258 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1259 for (unsigned i = 0; i != NElts; ++i) {
1260 if (MaskVec[i] >= (int)NElts) {
1265 } else if (MaskVec[i] >= 0) {
1269 if (AllLHS && AllRHS)
1270 return getUNDEF(VT);
1271 if (AllLHS && !N2Undef)
1275 commuteShuffle(N1, N2, MaskVec);
1278 // If Identity shuffle, or all shuffle in to undef, return that node.
1279 bool AllUndef = true;
1280 bool Identity = true;
1281 for (unsigned i = 0; i != NElts; ++i) {
1282 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1283 if (MaskVec[i] >= 0) AllUndef = false;
1285 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1288 return getUNDEF(VT);
1290 FoldingSetNodeID ID;
1291 SDValue Ops[2] = { N1, N2 };
1292 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1293 for (unsigned i = 0; i != NElts; ++i)
1294 ID.AddInteger(MaskVec[i]);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1300 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1301 // SDNode doesn't have access to it. This memory will be "leaked" when
1302 // the node is deallocated, but recovered when the NodeAllocator is released.
1303 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1304 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1306 ShuffleVectorSDNode *N =
1307 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1308 CSEMap.InsertNode(N, IP);
1309 AllNodes.push_back(N);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1314 SDValue Val, SDValue DTy,
1315 SDValue STy, SDValue Rnd, SDValue Sat,
1316 ISD::CvtCode Code) {
1317 // If the src and dest types are the same and the conversion is between
1318 // integer types of the same sign or two floats, no conversion is necessary.
1320 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1323 FoldingSetNodeID ID;
1324 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1325 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1328 return SDValue(E, 0);
1330 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1332 CSEMap.InsertNode(N, IP);
1333 AllNodes.push_back(N);
1334 return SDValue(N, 0);
1337 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1340 ID.AddInteger(RegNo);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1346 CSEMap.InsertNode(N, IP);
1347 AllNodes.push_back(N);
1348 return SDValue(N, 0);
1351 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1352 FoldingSetNodeID ID;
1353 SDValue Ops[] = { Root };
1354 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1355 ID.AddPointer(Label);
1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1358 return SDValue(E, 0);
1360 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1367 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1369 unsigned char TargetFlags) {
1370 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1372 FoldingSetNodeID ID;
1373 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1375 ID.AddInteger(TargetFlags);
1377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1378 return SDValue(E, 0);
1380 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1381 CSEMap.InsertNode(N, IP);
1382 AllNodes.push_back(N);
1383 return SDValue(N, 0);
1386 SDValue SelectionDAG::getSrcValue(const Value *V) {
1387 assert((!V || V->getType()->isPointerTy()) &&
1388 "SrcValue is not a pointer?");
1390 FoldingSetNodeID ID;
1391 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1396 return SDValue(E, 0);
1398 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1404 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1405 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1406 FoldingSetNodeID ID;
1407 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1415 CSEMap.InsertNode(N, IP);
1416 AllNodes.push_back(N);
1417 return SDValue(N, 0);
1421 /// getShiftAmountOperand - Return the specified value casted to
1422 /// the target's desired shift amount type.
1423 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1424 EVT OpTy = Op.getValueType();
1425 MVT ShTy = TLI.getShiftAmountTy();
1426 if (OpTy == ShTy || OpTy.isVector()) return Op;
1428 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1429 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1432 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1433 /// specified value type.
1434 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1435 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1436 unsigned ByteSize = VT.getStoreSize();
1437 const Type *Ty = VT.getTypeForEVT(*getContext());
1438 unsigned StackAlign =
1439 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1441 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1442 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1445 /// CreateStackTemporary - Create a stack temporary suitable for holding
1446 /// either of the specified value types.
1447 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1448 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1449 VT2.getStoreSizeInBits())/8;
1450 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1451 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1452 const TargetData *TD = TLI.getTargetData();
1453 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1454 TD->getPrefTypeAlignment(Ty2));
1456 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1458 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1461 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1462 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1463 // These setcc operations always fold.
1467 case ISD::SETFALSE2: return getConstant(0, VT);
1469 case ISD::SETTRUE2: return getConstant(1, VT);
1481 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1485 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1486 const APInt &C2 = N2C->getAPIntValue();
1487 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1488 const APInt &C1 = N1C->getAPIntValue();
1491 default: llvm_unreachable("Unknown integer setcc!");
1492 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1493 case ISD::SETNE: return getConstant(C1 != C2, VT);
1494 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1495 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1496 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1497 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1498 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1499 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1500 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1501 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1505 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1506 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1507 // No compile time operations on this type yet.
1508 if (N1C->getValueType(0) == MVT::ppcf128)
1511 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1514 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1515 return getUNDEF(VT);
1517 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1518 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1519 return getUNDEF(VT);
1521 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1522 R==APFloat::cmpLessThan, VT);
1523 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1524 return getUNDEF(VT);
1526 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1527 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1528 return getUNDEF(VT);
1530 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1531 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1532 return getUNDEF(VT);
1534 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1535 R==APFloat::cmpEqual, VT);
1536 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1537 return getUNDEF(VT);
1539 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1540 R==APFloat::cmpEqual, VT);
1541 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1542 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1543 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1544 R==APFloat::cmpEqual, VT);
1545 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1546 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1547 R==APFloat::cmpLessThan, VT);
1548 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1549 R==APFloat::cmpUnordered, VT);
1550 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1551 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1554 // Ensure that the constant occurs on the RHS.
1555 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1559 // Could not fold it.
1563 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1564 /// use this predicate to simplify operations downstream.
1565 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1566 // This predicate is not safe for vector operations.
1567 if (Op.getValueType().isVector())
1570 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1571 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1574 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1575 /// this predicate to simplify operations downstream. Mask is known to be zero
1576 /// for bits that V cannot have.
1577 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1578 unsigned Depth) const {
1579 APInt KnownZero, KnownOne;
1580 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1581 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1582 return (KnownZero & Mask) == Mask;
1585 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1586 /// known to be either zero or one and return them in the KnownZero/KnownOne
1587 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1589 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1590 APInt &KnownZero, APInt &KnownOne,
1591 unsigned Depth) const {
1592 unsigned BitWidth = Mask.getBitWidth();
1593 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1594 "Mask size mismatches value type size!");
1596 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1597 if (Depth == 6 || Mask == 0)
1598 return; // Limit search depth.
1600 APInt KnownZero2, KnownOne2;
1602 switch (Op.getOpcode()) {
1604 // We know all of the bits for a constant!
1605 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1606 KnownZero = ~KnownOne & Mask;
1609 // If either the LHS or the RHS are Zero, the result is zero.
1610 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1611 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1612 KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // Output known-1 bits are only known if set in both the LHS & RHS.
1617 KnownOne &= KnownOne2;
1618 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1619 KnownZero |= KnownZero2;
1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1624 KnownZero2, KnownOne2, Depth+1);
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1628 // Output known-0 bits are only known if clear in both the LHS & RHS.
1629 KnownZero &= KnownZero2;
1630 // Output known-1 are known to be set if set in either the LHS | RHS.
1631 KnownOne |= KnownOne2;
1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1635 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1636 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1637 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1639 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1640 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1641 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1642 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1643 KnownZero = KnownZeroOut;
1647 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1648 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1649 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1651 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1653 // If low bits are zero in either operand, output low known-0 bits.
1654 // Also compute a conserative estimate for high known-0 bits.
1655 // More trickiness is possible, but this is sufficient for the
1656 // interesting case of alignment computation.
1657 KnownOne.clearAllBits();
1658 unsigned TrailZ = KnownZero.countTrailingOnes() +
1659 KnownZero2.countTrailingOnes();
1660 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1661 KnownZero2.countLeadingOnes(),
1662 BitWidth) - BitWidth;
1664 TrailZ = std::min(TrailZ, BitWidth);
1665 LeadZ = std::min(LeadZ, BitWidth);
1666 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1667 APInt::getHighBitsSet(BitWidth, LeadZ);
1672 // For the purposes of computing leading zeros we can conservatively
1673 // treat a udiv as a logical right shift by the power of 2 known to
1674 // be less than the denominator.
1675 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1676 ComputeMaskedBits(Op.getOperand(0),
1677 AllOnes, KnownZero2, KnownOne2, Depth+1);
1678 unsigned LeadZ = KnownZero2.countLeadingOnes();
1680 KnownOne2.clearAllBits();
1681 KnownZero2.clearAllBits();
1682 ComputeMaskedBits(Op.getOperand(1),
1683 AllOnes, KnownZero2, KnownOne2, Depth+1);
1684 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1685 if (RHSUnknownLeadingOnes != BitWidth)
1686 LeadZ = std::min(BitWidth,
1687 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1689 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1693 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1694 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1698 // Only known if known in both the LHS and RHS.
1699 KnownOne &= KnownOne2;
1700 KnownZero &= KnownZero2;
1702 case ISD::SELECT_CC:
1703 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1704 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1705 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1706 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1708 // Only known if known in both the LHS and RHS.
1709 KnownOne &= KnownOne2;
1710 KnownZero &= KnownZero2;
1718 if (Op.getResNo() != 1)
1720 // The boolean result conforms to getBooleanContents. Fall through.
1722 // If we know the result of a setcc has the top bits zero, use this info.
1723 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1725 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1728 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1730 unsigned ShAmt = SA->getZExtValue();
1732 // If the shift count is an invalid immediate, don't do anything.
1733 if (ShAmt >= BitWidth)
1736 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1737 KnownZero, KnownOne, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 KnownZero <<= ShAmt;
1741 // low bits known zero.
1742 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1746 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1747 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1748 unsigned ShAmt = SA->getZExtValue();
1750 // If the shift count is an invalid immediate, don't do anything.
1751 if (ShAmt >= BitWidth)
1754 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1755 KnownZero, KnownOne, Depth+1);
1756 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1757 KnownZero = KnownZero.lshr(ShAmt);
1758 KnownOne = KnownOne.lshr(ShAmt);
1760 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1761 KnownZero |= HighBits; // High bits known zero.
1765 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1766 unsigned ShAmt = SA->getZExtValue();
1768 // If the shift count is an invalid immediate, don't do anything.
1769 if (ShAmt >= BitWidth)
1772 APInt InDemandedMask = (Mask << ShAmt);
1773 // If any of the demanded bits are produced by the sign extension, we also
1774 // demand the input sign bit.
1775 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1776 if (HighBits.getBoolValue())
1777 InDemandedMask |= APInt::getSignBit(BitWidth);
1779 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1782 KnownZero = KnownZero.lshr(ShAmt);
1783 KnownOne = KnownOne.lshr(ShAmt);
1785 // Handle the sign bits.
1786 APInt SignBit = APInt::getSignBit(BitWidth);
1787 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1789 if (KnownZero.intersects(SignBit)) {
1790 KnownZero |= HighBits; // New bits are known zero.
1791 } else if (KnownOne.intersects(SignBit)) {
1792 KnownOne |= HighBits; // New bits are known one.
1796 case ISD::SIGN_EXTEND_INREG: {
1797 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1798 unsigned EBits = EVT.getScalarType().getSizeInBits();
1800 // Sign extension. Compute the demanded bits in the result that are not
1801 // present in the input.
1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1804 APInt InSignBit = APInt::getSignBit(EBits);
1805 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1807 // If the sign extended bits are demanded, we know that the sign
1809 InSignBit.zext(BitWidth);
1810 if (NewBits.getBoolValue())
1811 InputDemandedBits |= InSignBit;
1813 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1814 KnownZero, KnownOne, Depth+1);
1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1817 // If the sign bit of the input is known set or clear, then we know the
1818 // top bits of the result.
1819 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1820 KnownZero |= NewBits;
1821 KnownOne &= ~NewBits;
1822 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1823 KnownOne |= NewBits;
1824 KnownZero &= ~NewBits;
1825 } else { // Input sign bit unknown
1826 KnownZero &= ~NewBits;
1827 KnownOne &= ~NewBits;
1834 unsigned LowBits = Log2_32(BitWidth)+1;
1835 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1836 KnownOne.clearAllBits();
1840 if (ISD::isZEXTLoad(Op.getNode())) {
1841 LoadSDNode *LD = cast<LoadSDNode>(Op);
1842 EVT VT = LD->getMemoryVT();
1843 unsigned MemBits = VT.getScalarType().getSizeInBits();
1844 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1848 case ISD::ZERO_EXTEND: {
1849 EVT InVT = Op.getOperand(0).getValueType();
1850 unsigned InBits = InVT.getScalarType().getSizeInBits();
1851 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1852 APInt InMask = Mask;
1853 InMask.trunc(InBits);
1854 KnownZero.trunc(InBits);
1855 KnownOne.trunc(InBits);
1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1857 KnownZero.zext(BitWidth);
1858 KnownOne.zext(BitWidth);
1859 KnownZero |= NewBits;
1862 case ISD::SIGN_EXTEND: {
1863 EVT InVT = Op.getOperand(0).getValueType();
1864 unsigned InBits = InVT.getScalarType().getSizeInBits();
1865 APInt InSignBit = APInt::getSignBit(InBits);
1866 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1867 APInt InMask = Mask;
1868 InMask.trunc(InBits);
1870 // If any of the sign extended bits are demanded, we know that the sign
1871 // bit is demanded. Temporarily set this bit in the mask for our callee.
1872 if (NewBits.getBoolValue())
1873 InMask |= InSignBit;
1875 KnownZero.trunc(InBits);
1876 KnownOne.trunc(InBits);
1877 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1879 // Note if the sign bit is known to be zero or one.
1880 bool SignBitKnownZero = KnownZero.isNegative();
1881 bool SignBitKnownOne = KnownOne.isNegative();
1882 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1883 "Sign bit can't be known to be both zero and one!");
1885 // If the sign bit wasn't actually demanded by our caller, we don't
1886 // want it set in the KnownZero and KnownOne result values. Reset the
1887 // mask and reapply it to the result values.
1889 InMask.trunc(InBits);
1890 KnownZero &= InMask;
1893 KnownZero.zext(BitWidth);
1894 KnownOne.zext(BitWidth);
1896 // If the sign bit is known zero or one, the top bits match.
1897 if (SignBitKnownZero)
1898 KnownZero |= NewBits;
1899 else if (SignBitKnownOne)
1900 KnownOne |= NewBits;
1903 case ISD::ANY_EXTEND: {
1904 EVT InVT = Op.getOperand(0).getValueType();
1905 unsigned InBits = InVT.getScalarType().getSizeInBits();
1906 APInt InMask = Mask;
1907 InMask.trunc(InBits);
1908 KnownZero.trunc(InBits);
1909 KnownOne.trunc(InBits);
1910 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1911 KnownZero.zext(BitWidth);
1912 KnownOne.zext(BitWidth);
1915 case ISD::TRUNCATE: {
1916 EVT InVT = Op.getOperand(0).getValueType();
1917 unsigned InBits = InVT.getScalarType().getSizeInBits();
1918 APInt InMask = Mask;
1919 InMask.zext(InBits);
1920 KnownZero.zext(InBits);
1921 KnownOne.zext(InBits);
1922 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1923 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1924 KnownZero.trunc(BitWidth);
1925 KnownOne.trunc(BitWidth);
1928 case ISD::AssertZext: {
1929 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1930 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1931 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1933 KnownZero |= (~InMask) & Mask;
1937 // All bits are zero except the low bit.
1938 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1942 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1943 // We know that the top bits of C-X are clear if X contains less bits
1944 // than C (i.e. no wrap-around can happen). For example, 20-X is
1945 // positive if we can prove that X is >= 0 and < 16.
1946 if (CLHS->getAPIntValue().isNonNegative()) {
1947 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1948 // NLZ can't be BitWidth with no sign bit
1949 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1950 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1953 // If all of the MaskV bits are known to be zero, then we know the
1954 // output top bits are zero, because we now know that the output is
1956 if ((KnownZero2 & MaskV) == MaskV) {
1957 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1958 // Top bits known zero.
1959 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1966 // Output known-0 bits are known if clear or set in both the low clear bits
1967 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1968 // low 3 bits clear.
1969 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1970 BitWidth - Mask.countLeadingZeros());
1971 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1972 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1973 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1975 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1976 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1977 KnownZeroOut = std::min(KnownZeroOut,
1978 KnownZero2.countTrailingOnes());
1980 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1984 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1985 const APInt &RA = Rem->getAPIntValue().abs();
1986 if (RA.isPowerOf2()) {
1987 APInt LowBits = RA - 1;
1988 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1989 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1991 // The low bits of the first operand are unchanged by the srem.
1992 KnownZero = KnownZero2 & LowBits;
1993 KnownOne = KnownOne2 & LowBits;
1995 // If the first operand is non-negative or has all low bits zero, then
1996 // the upper bits are all zero.
1997 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1998 KnownZero |= ~LowBits;
2000 // If the first operand is negative and not all low bits are zero, then
2001 // the upper bits are all one.
2002 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2003 KnownOne |= ~LowBits;
2008 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2013 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2014 const APInt &RA = Rem->getAPIntValue();
2015 if (RA.isPowerOf2()) {
2016 APInt LowBits = (RA - 1);
2017 APInt Mask2 = LowBits & Mask;
2018 KnownZero |= ~LowBits & Mask;
2019 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2020 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2025 // Since the result is less than or equal to either operand, any leading
2026 // zero bits in either operand must also exist in the result.
2027 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2028 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2030 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2033 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2034 KnownZero2.countLeadingOnes());
2035 KnownOne.clearAllBits();
2036 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2040 // Allow the target to implement this method for its nodes.
2041 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2042 case ISD::INTRINSIC_WO_CHAIN:
2043 case ISD::INTRINSIC_W_CHAIN:
2044 case ISD::INTRINSIC_VOID:
2045 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2052 /// ComputeNumSignBits - Return the number of times the sign bit of the
2053 /// register is replicated into the other bits. We know that at least 1 bit
2054 /// is always equal to the sign bit (itself), but other cases can give us
2055 /// information. For example, immediately after an "SRA X, 2", we know that
2056 /// the top 3 bits are all equal to each other, so we return 3.
2057 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2058 EVT VT = Op.getValueType();
2059 assert(VT.isInteger() && "Invalid VT!");
2060 unsigned VTBits = VT.getScalarType().getSizeInBits();
2062 unsigned FirstAnswer = 1;
2065 return 1; // Limit search depth.
2067 switch (Op.getOpcode()) {
2069 case ISD::AssertSext:
2070 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2071 return VTBits-Tmp+1;
2072 case ISD::AssertZext:
2073 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2076 case ISD::Constant: {
2077 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2078 // If negative, return # leading ones.
2079 if (Val.isNegative())
2080 return Val.countLeadingOnes();
2082 // Return # leading zeros.
2083 return Val.countLeadingZeros();
2086 case ISD::SIGN_EXTEND:
2087 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2088 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2090 case ISD::SIGN_EXTEND_INREG:
2091 // Max of the input and what this extends.
2093 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2096 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2097 return std::max(Tmp, Tmp2);
2100 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2101 // SRA X, C -> adds C sign bits.
2102 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2103 Tmp += C->getZExtValue();
2104 if (Tmp > VTBits) Tmp = VTBits;
2108 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2109 // shl destroys sign bits.
2110 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2111 if (C->getZExtValue() >= VTBits || // Bad shift.
2112 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2113 return Tmp - C->getZExtValue();
2118 case ISD::XOR: // NOT is handled here.
2119 // Logical binary ops preserve the number of sign bits at the worst.
2120 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2122 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2123 FirstAnswer = std::min(Tmp, Tmp2);
2124 // We computed what we know about the sign bits as our first
2125 // answer. Now proceed to the generic code that uses
2126 // ComputeMaskedBits, and pick whichever answer is better.
2131 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2132 if (Tmp == 1) return 1; // Early out.
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2134 return std::min(Tmp, Tmp2);
2142 if (Op.getResNo() != 1)
2144 // The boolean result conforms to getBooleanContents. Fall through.
2146 // If setcc returns 0/-1, all bits are sign bits.
2147 if (TLI.getBooleanContents() ==
2148 TargetLowering::ZeroOrNegativeOneBooleanContent)
2153 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2154 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2156 // Handle rotate right by N like a rotate left by 32-N.
2157 if (Op.getOpcode() == ISD::ROTR)
2158 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2160 // If we aren't rotating out all of the known-in sign bits, return the
2161 // number that are left. This handles rotl(sext(x), 1) for example.
2162 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2163 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2167 // Add can have at most one carry bit. Thus we know that the output
2168 // is, at worst, one more bit than the inputs.
2169 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2170 if (Tmp == 1) return 1; // Early out.
2172 // Special case decrementing a value (ADD X, -1):
2173 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2174 if (CRHS->isAllOnesValue()) {
2175 APInt KnownZero, KnownOne;
2176 APInt Mask = APInt::getAllOnesValue(VTBits);
2177 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2179 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2181 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2184 // If we are subtracting one from a positive number, there is no carry
2185 // out of the result.
2186 if (KnownZero.isNegative())
2190 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2191 if (Tmp2 == 1) return 1;
2192 return std::min(Tmp, Tmp2)-1;
2196 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2197 if (Tmp2 == 1) return 1;
2200 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2201 if (CLHS->isNullValue()) {
2202 APInt KnownZero, KnownOne;
2203 APInt Mask = APInt::getAllOnesValue(VTBits);
2204 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2205 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2207 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2210 // If the input is known to be positive (the sign bit is known clear),
2211 // the output of the NEG has the same number of sign bits as the input.
2212 if (KnownZero.isNegative())
2215 // Otherwise, we treat this like a SUB.
2218 // Sub can have at most one carry bit. Thus we know that the output
2219 // is, at worst, one more bit than the inputs.
2220 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2221 if (Tmp == 1) return 1; // Early out.
2222 return std::min(Tmp, Tmp2)-1;
2225 // FIXME: it's tricky to do anything useful for this, but it is an important
2226 // case for targets like X86.
2230 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2231 if (Op.getOpcode() == ISD::LOAD) {
2232 LoadSDNode *LD = cast<LoadSDNode>(Op);
2233 unsigned ExtType = LD->getExtensionType();
2236 case ISD::SEXTLOAD: // '17' bits known
2237 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2238 return VTBits-Tmp+1;
2239 case ISD::ZEXTLOAD: // '16' bits known
2240 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2245 // Allow the target to implement this method for its nodes.
2246 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2247 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2248 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2249 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2250 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2251 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2254 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2255 // use this information.
2256 APInt KnownZero, KnownOne;
2257 APInt Mask = APInt::getAllOnesValue(VTBits);
2258 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2260 if (KnownZero.isNegative()) { // sign bit is 0
2262 } else if (KnownOne.isNegative()) { // sign bit is 1;
2269 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2270 // the number of identical bits in the top of the input value.
2272 Mask <<= Mask.getBitWidth()-VTBits;
2273 // Return # leading zeros. We use 'min' here in case Val was zero before
2274 // shifting. We don't want to return '64' as for an i32 "0".
2275 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2278 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2279 // If we're told that NaNs won't happen, assume they won't.
2283 // If the value is a constant, we can obviously see if it is a NaN or not.
2284 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2285 return !C->getValueAPF().isNaN();
2287 // TODO: Recognize more cases here.
2292 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2293 // If the value is a constant, we can obviously see if it is a zero or not.
2294 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2295 return !C->isZero();
2297 // TODO: Recognize more cases here.
2302 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2303 // Check the obvious case.
2304 if (A == B) return true;
2306 // For for negative and positive zero.
2307 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2308 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2309 if (CA->isZero() && CB->isZero()) return true;
2311 // Otherwise they may not be equal.
2315 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2316 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2317 if (!GA) return false;
2318 if (GA->getOffset() != 0) return false;
2319 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2320 if (!GV) return false;
2321 return MF->getMMI().hasDebugInfo();
2325 /// getNode - Gets or creates the specified node.
2327 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2328 FoldingSetNodeID ID;
2329 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2331 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2332 return SDValue(E, 0);
2334 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2335 CSEMap.InsertNode(N, IP);
2337 AllNodes.push_back(N);
2341 return SDValue(N, 0);
2344 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2345 EVT VT, SDValue Operand) {
2346 // Constant fold unary operations with an integer constant operand.
2347 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2348 const APInt &Val = C->getAPIntValue();
2351 case ISD::SIGN_EXTEND:
2352 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2353 case ISD::ANY_EXTEND:
2354 case ISD::ZERO_EXTEND:
2356 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2357 case ISD::UINT_TO_FP:
2358 case ISD::SINT_TO_FP: {
2359 // No compile time operations on ppcf128.
2360 if (VT == MVT::ppcf128) break;
2361 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2362 (void)apf.convertFromAPInt(Val,
2363 Opcode==ISD::SINT_TO_FP,
2364 APFloat::rmNearestTiesToEven);
2365 return getConstantFP(apf, VT);
2368 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2369 return getConstantFP(Val.bitsToFloat(), VT);
2370 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2371 return getConstantFP(Val.bitsToDouble(), VT);
2374 return getConstant(Val.byteSwap(), VT);
2376 return getConstant(Val.countPopulation(), VT);
2378 return getConstant(Val.countLeadingZeros(), VT);
2380 return getConstant(Val.countTrailingZeros(), VT);
2384 // Constant fold unary operations with a floating point constant operand.
2385 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2386 APFloat V = C->getValueAPF(); // make copy
2387 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2391 return getConstantFP(V, VT);
2394 return getConstantFP(V, VT);
2396 case ISD::FP_EXTEND: {
2398 // This can return overflow, underflow, or inexact; we don't care.
2399 // FIXME need to be more flexible about rounding mode.
2400 (void)V.convert(*EVTToAPFloatSemantics(VT),
2401 APFloat::rmNearestTiesToEven, &ignored);
2402 return getConstantFP(V, VT);
2404 case ISD::FP_TO_SINT:
2405 case ISD::FP_TO_UINT: {
2408 assert(integerPartWidth >= 64);
2409 // FIXME need to be more flexible about rounding mode.
2410 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2411 Opcode==ISD::FP_TO_SINT,
2412 APFloat::rmTowardZero, &ignored);
2413 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2415 APInt api(VT.getSizeInBits(), 2, x);
2416 return getConstant(api, VT);
2419 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2420 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2421 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2422 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2428 unsigned OpOpcode = Operand.getNode()->getOpcode();
2430 case ISD::TokenFactor:
2431 case ISD::MERGE_VALUES:
2432 case ISD::CONCAT_VECTORS:
2433 return Operand; // Factor, merge or concat of one node? No need.
2434 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2435 case ISD::FP_EXTEND:
2436 assert(VT.isFloatingPoint() &&
2437 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2438 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2439 assert((!VT.isVector() ||
2440 VT.getVectorNumElements() ==
2441 Operand.getValueType().getVectorNumElements()) &&
2442 "Vector element count mismatch!");
2443 if (Operand.getOpcode() == ISD::UNDEF)
2444 return getUNDEF(VT);
2446 case ISD::SIGN_EXTEND:
2447 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2448 "Invalid SIGN_EXTEND!");
2449 if (Operand.getValueType() == VT) return Operand; // noop extension
2450 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2451 "Invalid sext node, dst < src!");
2452 assert((!VT.isVector() ||
2453 VT.getVectorNumElements() ==
2454 Operand.getValueType().getVectorNumElements()) &&
2455 "Vector element count mismatch!");
2456 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2457 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2459 case ISD::ZERO_EXTEND:
2460 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2461 "Invalid ZERO_EXTEND!");
2462 if (Operand.getValueType() == VT) return Operand; // noop extension
2463 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2464 "Invalid zext node, dst < src!");
2465 assert((!VT.isVector() ||
2466 VT.getVectorNumElements() ==
2467 Operand.getValueType().getVectorNumElements()) &&
2468 "Vector element count mismatch!");
2469 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2470 return getNode(ISD::ZERO_EXTEND, DL, VT,
2471 Operand.getNode()->getOperand(0));
2473 case ISD::ANY_EXTEND:
2474 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2475 "Invalid ANY_EXTEND!");
2476 if (Operand.getValueType() == VT) return Operand; // noop extension
2477 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2478 "Invalid anyext node, dst < src!");
2479 assert((!VT.isVector() ||
2480 VT.getVectorNumElements() ==
2481 Operand.getValueType().getVectorNumElements()) &&
2482 "Vector element count mismatch!");
2484 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2485 OpOpcode == ISD::ANY_EXTEND)
2486 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2487 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2489 // (ext (trunx x)) -> x
2490 if (OpOpcode == ISD::TRUNCATE) {
2491 SDValue OpOp = Operand.getNode()->getOperand(0);
2492 if (OpOp.getValueType() == VT)
2497 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2498 "Invalid TRUNCATE!");
2499 if (Operand.getValueType() == VT) return Operand; // noop truncate
2500 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2501 "Invalid truncate node, src < dst!");
2502 assert((!VT.isVector() ||
2503 VT.getVectorNumElements() ==
2504 Operand.getValueType().getVectorNumElements()) &&
2505 "Vector element count mismatch!");
2506 if (OpOpcode == ISD::TRUNCATE)
2507 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2508 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2509 OpOpcode == ISD::ANY_EXTEND) {
2510 // If the source is smaller than the dest, we still need an extend.
2511 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2512 .bitsLT(VT.getScalarType()))
2513 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2514 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2515 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2517 return Operand.getNode()->getOperand(0);
2521 // Basic sanity checking.
2522 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2523 && "Cannot BITCAST between types of different sizes!");
2524 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2525 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2526 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2527 if (OpOpcode == ISD::UNDEF)
2528 return getUNDEF(VT);
2530 case ISD::SCALAR_TO_VECTOR:
2531 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2532 (VT.getVectorElementType() == Operand.getValueType() ||
2533 (VT.getVectorElementType().isInteger() &&
2534 Operand.getValueType().isInteger() &&
2535 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2536 "Illegal SCALAR_TO_VECTOR node!");
2537 if (OpOpcode == ISD::UNDEF)
2538 return getUNDEF(VT);
2539 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2540 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2541 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2542 Operand.getConstantOperandVal(1) == 0 &&
2543 Operand.getOperand(0).getValueType() == VT)
2544 return Operand.getOperand(0);
2547 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2548 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2549 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2550 Operand.getNode()->getOperand(0));
2551 if (OpOpcode == ISD::FNEG) // --X -> X
2552 return Operand.getNode()->getOperand(0);
2555 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2556 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2561 SDVTList VTs = getVTList(VT);
2562 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2563 FoldingSetNodeID ID;
2564 SDValue Ops[1] = { Operand };
2565 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2567 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2568 return SDValue(E, 0);
2570 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2571 CSEMap.InsertNode(N, IP);
2573 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2576 AllNodes.push_back(N);
2580 return SDValue(N, 0);
2583 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2585 ConstantSDNode *Cst1,
2586 ConstantSDNode *Cst2) {
2587 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2590 case ISD::ADD: return getConstant(C1 + C2, VT);
2591 case ISD::SUB: return getConstant(C1 - C2, VT);
2592 case ISD::MUL: return getConstant(C1 * C2, VT);
2594 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2597 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2600 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2603 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2605 case ISD::AND: return getConstant(C1 & C2, VT);
2606 case ISD::OR: return getConstant(C1 | C2, VT);
2607 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2608 case ISD::SHL: return getConstant(C1 << C2, VT);
2609 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2610 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2611 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2612 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2619 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2620 SDValue N1, SDValue N2) {
2621 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2622 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2625 case ISD::TokenFactor:
2626 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2627 N2.getValueType() == MVT::Other && "Invalid token factor!");
2628 // Fold trivial token factors.
2629 if (N1.getOpcode() == ISD::EntryToken) return N2;
2630 if (N2.getOpcode() == ISD::EntryToken) return N1;
2631 if (N1 == N2) return N1;
2633 case ISD::CONCAT_VECTORS:
2634 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2635 // one big BUILD_VECTOR.
2636 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2637 N2.getOpcode() == ISD::BUILD_VECTOR) {
2638 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2639 N1.getNode()->op_end());
2640 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2641 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2645 assert(VT.isInteger() && "This operator does not apply to FP types!");
2646 assert(N1.getValueType() == N2.getValueType() &&
2647 N1.getValueType() == VT && "Binary operator types must match!");
2648 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2649 // worth handling here.
2650 if (N2C && N2C->isNullValue())
2652 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2659 assert(VT.isInteger() && "This operator does not apply to FP types!");
2660 assert(N1.getValueType() == N2.getValueType() &&
2661 N1.getValueType() == VT && "Binary operator types must match!");
2662 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2663 // it's worth handling here.
2664 if (N2C && N2C->isNullValue())
2674 assert(VT.isInteger() && "This operator does not apply to FP types!");
2675 assert(N1.getValueType() == N2.getValueType() &&
2676 N1.getValueType() == VT && "Binary operator types must match!");
2684 if (Opcode == ISD::FADD) {
2686 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2687 if (CFP->getValueAPF().isZero())
2690 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2691 if (CFP->getValueAPF().isZero())
2693 } else if (Opcode == ISD::FSUB) {
2695 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2696 if (CFP->getValueAPF().isZero())
2700 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2701 assert(N1.getValueType() == N2.getValueType() &&
2702 N1.getValueType() == VT && "Binary operator types must match!");
2704 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2705 assert(N1.getValueType() == VT &&
2706 N1.getValueType().isFloatingPoint() &&
2707 N2.getValueType().isFloatingPoint() &&
2708 "Invalid FCOPYSIGN!");
2715 assert(VT == N1.getValueType() &&
2716 "Shift operators return type must be the same as their first arg");
2717 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2718 "Shifts only work on integers");
2720 // Always fold shifts of i1 values so the code generator doesn't need to
2721 // handle them. Since we know the size of the shift has to be less than the
2722 // size of the value, the shift/rotate count is guaranteed to be zero.
2725 if (N2C && N2C->isNullValue())
2728 case ISD::FP_ROUND_INREG: {
2729 EVT EVT = cast<VTSDNode>(N2)->getVT();
2730 assert(VT == N1.getValueType() && "Not an inreg round!");
2731 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2732 "Cannot FP_ROUND_INREG integer types");
2733 assert(EVT.isVector() == VT.isVector() &&
2734 "FP_ROUND_INREG type should be vector iff the operand "
2736 assert((!EVT.isVector() ||
2737 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2738 "Vector element counts must match in FP_ROUND_INREG");
2739 assert(EVT.bitsLE(VT) && "Not rounding down!");
2740 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2744 assert(VT.isFloatingPoint() &&
2745 N1.getValueType().isFloatingPoint() &&
2746 VT.bitsLE(N1.getValueType()) &&
2747 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2748 if (N1.getValueType() == VT) return N1; // noop conversion.
2750 case ISD::AssertSext:
2751 case ISD::AssertZext: {
2752 EVT EVT = cast<VTSDNode>(N2)->getVT();
2753 assert(VT == N1.getValueType() && "Not an inreg extend!");
2754 assert(VT.isInteger() && EVT.isInteger() &&
2755 "Cannot *_EXTEND_INREG FP types");
2756 assert(!EVT.isVector() &&
2757 "AssertSExt/AssertZExt type should be the vector element type "
2758 "rather than the vector type!");
2759 assert(EVT.bitsLE(VT) && "Not extending!");
2760 if (VT == EVT) return N1; // noop assertion.
2763 case ISD::SIGN_EXTEND_INREG: {
2764 EVT EVT = cast<VTSDNode>(N2)->getVT();
2765 assert(VT == N1.getValueType() && "Not an inreg extend!");
2766 assert(VT.isInteger() && EVT.isInteger() &&
2767 "Cannot *_EXTEND_INREG FP types");
2768 assert(EVT.isVector() == VT.isVector() &&
2769 "SIGN_EXTEND_INREG type should be vector iff the operand "
2771 assert((!EVT.isVector() ||
2772 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2773 "Vector element counts must match in SIGN_EXTEND_INREG");
2774 assert(EVT.bitsLE(VT) && "Not extending!");
2775 if (EVT == VT) return N1; // Not actually extending
2778 APInt Val = N1C->getAPIntValue();
2779 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2780 Val <<= Val.getBitWidth()-FromBits;
2781 Val = Val.ashr(Val.getBitWidth()-FromBits);
2782 return getConstant(Val, VT);
2786 case ISD::EXTRACT_VECTOR_ELT:
2787 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2788 if (N1.getOpcode() == ISD::UNDEF)
2789 return getUNDEF(VT);
2791 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2792 // expanding copies of large vectors from registers.
2794 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2795 N1.getNumOperands() > 0) {
2797 N1.getOperand(0).getValueType().getVectorNumElements();
2798 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2799 N1.getOperand(N2C->getZExtValue() / Factor),
2800 getConstant(N2C->getZExtValue() % Factor,
2801 N2.getValueType()));
2804 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2805 // expanding large vector constants.
2806 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2807 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2808 EVT VEltTy = N1.getValueType().getVectorElementType();
2809 if (Elt.getValueType() != VEltTy) {
2810 // If the vector element type is not legal, the BUILD_VECTOR operands
2811 // are promoted and implicitly truncated. Make that explicit here.
2812 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2815 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2816 // result is implicitly extended.
2817 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2822 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2823 // operations are lowered to scalars.
2824 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2825 // If the indices are the same, return the inserted element else
2826 // if the indices are known different, extract the element from
2827 // the original vector.
2828 SDValue N1Op2 = N1.getOperand(2);
2829 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2831 if (N1Op2C && N2C) {
2832 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2833 if (VT == N1.getOperand(1).getValueType())
2834 return N1.getOperand(1);
2836 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2839 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2843 case ISD::EXTRACT_ELEMENT:
2844 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2845 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2846 (N1.getValueType().isInteger() == VT.isInteger()) &&
2847 "Wrong types for EXTRACT_ELEMENT!");
2849 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2850 // 64-bit integers into 32-bit parts. Instead of building the extract of
2851 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2852 if (N1.getOpcode() == ISD::BUILD_PAIR)
2853 return N1.getOperand(N2C->getZExtValue());
2855 // EXTRACT_ELEMENT of a constant int is also very common.
2856 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2857 unsigned ElementSize = VT.getSizeInBits();
2858 unsigned Shift = ElementSize * N2C->getZExtValue();
2859 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2860 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2863 case ISD::EXTRACT_SUBVECTOR:
2864 if (N1.getValueType() == VT) // Trivial extraction.
2871 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2872 if (SV.getNode()) return SV;
2873 } else { // Cannonicalize constant to RHS if commutative
2874 if (isCommutativeBinOp(Opcode)) {
2875 std::swap(N1C, N2C);
2881 // Constant fold FP operations.
2882 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2883 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2885 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2886 // Cannonicalize constant to RHS if commutative
2887 std::swap(N1CFP, N2CFP);
2889 } else if (N2CFP && VT != MVT::ppcf128) {
2890 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2891 APFloat::opStatus s;
2894 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2895 if (s != APFloat::opInvalidOp)
2896 return getConstantFP(V1, VT);
2899 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2900 if (s!=APFloat::opInvalidOp)
2901 return getConstantFP(V1, VT);
2904 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2905 if (s!=APFloat::opInvalidOp)
2906 return getConstantFP(V1, VT);
2909 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2910 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2911 return getConstantFP(V1, VT);
2914 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2915 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2916 return getConstantFP(V1, VT);
2918 case ISD::FCOPYSIGN:
2920 return getConstantFP(V1, VT);
2926 // Canonicalize an UNDEF to the RHS, even over a constant.
2927 if (N1.getOpcode() == ISD::UNDEF) {
2928 if (isCommutativeBinOp(Opcode)) {
2932 case ISD::FP_ROUND_INREG:
2933 case ISD::SIGN_EXTEND_INREG:
2939 return N1; // fold op(undef, arg2) -> undef
2947 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2948 // For vectors, we can't easily build an all zero vector, just return
2955 // Fold a bunch of operators when the RHS is undef.
2956 if (N2.getOpcode() == ISD::UNDEF) {
2959 if (N1.getOpcode() == ISD::UNDEF)
2960 // Handle undef ^ undef -> 0 special case. This is a common
2962 return getConstant(0, VT);
2972 return N2; // fold op(arg1, undef) -> undef
2986 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2987 // For vectors, we can't easily build an all zero vector, just return
2992 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2993 // For vectors, we can't easily build an all one vector, just return
3001 // Memoize this node if possible.
3003 SDVTList VTs = getVTList(VT);
3004 if (VT != MVT::Flag) {
3005 SDValue Ops[] = { N1, N2 };
3006 FoldingSetNodeID ID;
3007 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3009 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3010 return SDValue(E, 0);
3012 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3013 CSEMap.InsertNode(N, IP);
3015 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3018 AllNodes.push_back(N);
3022 return SDValue(N, 0);
3025 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3026 SDValue N1, SDValue N2, SDValue N3) {
3027 // Perform various simplifications.
3028 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3030 case ISD::CONCAT_VECTORS:
3031 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3032 // one big BUILD_VECTOR.
3033 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3034 N2.getOpcode() == ISD::BUILD_VECTOR &&
3035 N3.getOpcode() == ISD::BUILD_VECTOR) {
3036 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3037 N1.getNode()->op_end());
3038 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3039 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3040 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3044 // Use FoldSetCC to simplify SETCC's.
3045 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3046 if (Simp.getNode()) return Simp;
3051 if (N1C->getZExtValue())
3052 return N2; // select true, X, Y -> X
3054 return N3; // select false, X, Y -> Y
3057 if (N2 == N3) return N2; // select C, X, X -> X
3059 case ISD::VECTOR_SHUFFLE:
3060 llvm_unreachable("should use getVectorShuffle constructor!");
3063 // Fold bit_convert nodes from a type to themselves.
3064 if (N1.getValueType() == VT)
3069 // Memoize node if it doesn't produce a flag.
3071 SDVTList VTs = getVTList(VT);
3072 if (VT != MVT::Flag) {
3073 SDValue Ops[] = { N1, N2, N3 };
3074 FoldingSetNodeID ID;
3075 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3077 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3078 return SDValue(E, 0);
3080 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3081 CSEMap.InsertNode(N, IP);
3083 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3086 AllNodes.push_back(N);
3090 return SDValue(N, 0);
3093 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3094 SDValue N1, SDValue N2, SDValue N3,
3096 SDValue Ops[] = { N1, N2, N3, N4 };
3097 return getNode(Opcode, DL, VT, Ops, 4);
3100 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3101 SDValue N1, SDValue N2, SDValue N3,
3102 SDValue N4, SDValue N5) {
3103 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3104 return getNode(Opcode, DL, VT, Ops, 5);
3107 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3108 /// the incoming stack arguments to be loaded from the stack.
3109 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3110 SmallVector<SDValue, 8> ArgChains;
3112 // Include the original chain at the beginning of the list. When this is
3113 // used by target LowerCall hooks, this helps legalize find the
3114 // CALLSEQ_BEGIN node.
3115 ArgChains.push_back(Chain);
3117 // Add a chain value for each stack argument.
3118 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3119 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3120 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3121 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3122 if (FI->getIndex() < 0)
3123 ArgChains.push_back(SDValue(L, 1));
3125 // Build a tokenfactor for all the chains.
3126 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3127 &ArgChains[0], ArgChains.size());
3130 /// getMemsetValue - Vectorized representation of the memset value
3132 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3134 assert(Value.getOpcode() != ISD::UNDEF);
3136 unsigned NumBits = VT.getScalarType().getSizeInBits();
3137 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3138 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3140 for (unsigned i = NumBits; i > 8; i >>= 1) {
3141 Val = (Val << Shift) | Val;
3145 return DAG.getConstant(Val, VT);
3146 return DAG.getConstantFP(APFloat(Val), VT);
3149 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3150 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3152 for (unsigned i = NumBits; i > 8; i >>= 1) {
3153 Value = DAG.getNode(ISD::OR, dl, VT,
3154 DAG.getNode(ISD::SHL, dl, VT, Value,
3155 DAG.getConstant(Shift,
3156 TLI.getShiftAmountTy())),
3164 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3165 /// used when a memcpy is turned into a memset when the source is a constant
3167 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3168 const TargetLowering &TLI,
3169 std::string &Str, unsigned Offset) {
3170 // Handle vector with all elements zero.
3173 return DAG.getConstant(0, VT);
3174 else if (VT == MVT::f32 || VT == MVT::f64)
3175 return DAG.getConstantFP(0.0, VT);
3176 else if (VT.isVector()) {
3177 unsigned NumElts = VT.getVectorNumElements();
3178 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3179 return DAG.getNode(ISD::BITCAST, dl, VT,
3180 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3183 llvm_unreachable("Expected type!");
3186 assert(!VT.isVector() && "Can't handle vector type here!");
3187 unsigned NumBits = VT.getSizeInBits();
3188 unsigned MSB = NumBits / 8;
3190 if (TLI.isLittleEndian())
3191 Offset = Offset + MSB - 1;
3192 for (unsigned i = 0; i != MSB; ++i) {
3193 Val = (Val << 8) | (unsigned char)Str[Offset];
3194 Offset += TLI.isLittleEndian() ? -1 : 1;
3196 return DAG.getConstant(Val, VT);
3199 /// getMemBasePlusOffset - Returns base and offset node for the
3201 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3202 SelectionDAG &DAG) {
3203 EVT VT = Base.getValueType();
3204 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3205 VT, Base, DAG.getConstant(Offset, VT));
3208 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3210 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3211 unsigned SrcDelta = 0;
3212 GlobalAddressSDNode *G = NULL;
3213 if (Src.getOpcode() == ISD::GlobalAddress)
3214 G = cast<GlobalAddressSDNode>(Src);
3215 else if (Src.getOpcode() == ISD::ADD &&
3216 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3217 Src.getOperand(1).getOpcode() == ISD::Constant) {
3218 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3219 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3224 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3225 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3231 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3232 /// to replace the memset / memcpy. Return true if the number of memory ops
3233 /// is below the threshold. It returns the types of the sequence of
3234 /// memory ops to perform memset / memcpy by reference.
3235 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3236 unsigned Limit, uint64_t Size,
3237 unsigned DstAlign, unsigned SrcAlign,
3238 bool NonScalarIntSafe,
3241 const TargetLowering &TLI) {
3242 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3243 "Expecting memcpy / memset source to meet alignment requirement!");
3244 // If 'SrcAlign' is zero, that means the memory operation does not need load
3245 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3246 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3247 // specified alignment of the memory operation. If it is zero, that means
3248 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3249 // indicates whether the memcpy source is constant so it does not need to be
3251 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3252 NonScalarIntSafe, MemcpyStrSrc,
3253 DAG.getMachineFunction());
3255 if (VT == MVT::Other) {
3256 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3257 TLI.allowsUnalignedMemoryAccesses(VT)) {
3258 VT = TLI.getPointerTy();
3260 switch (DstAlign & 7) {
3261 case 0: VT = MVT::i64; break;
3262 case 4: VT = MVT::i32; break;
3263 case 2: VT = MVT::i16; break;
3264 default: VT = MVT::i8; break;
3269 while (!TLI.isTypeLegal(LVT))
3270 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3271 assert(LVT.isInteger());
3277 // If we're optimizing for size, and there is a limit, bump the maximum number
3278 // of operations inserted down to 4. This is a wild guess that approximates
3279 // the size of a call to memcpy or memset (3 arguments + call).
3281 const Function *F = DAG.getMachineFunction().getFunction();
3282 if (F->hasFnAttr(Attribute::OptimizeForSize))
3286 unsigned NumMemOps = 0;
3288 unsigned VTSize = VT.getSizeInBits() / 8;
3289 while (VTSize > Size) {
3290 // For now, only use non-vector load / store's for the left-over pieces.
3291 if (VT.isVector() || VT.isFloatingPoint()) {
3293 while (!TLI.isTypeLegal(VT))
3294 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3295 VTSize = VT.getSizeInBits() / 8;
3297 // This can result in a type that is not legal on the target, e.g.
3298 // 1 or 2 bytes on PPC.
3299 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3304 if (++NumMemOps > Limit)
3306 MemOps.push_back(VT);
3313 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3314 SDValue Chain, SDValue Dst,
3315 SDValue Src, uint64_t Size,
3316 unsigned Align, bool isVol,
3318 MachinePointerInfo DstPtrInfo,
3319 MachinePointerInfo SrcPtrInfo) {
3320 // Turn a memcpy of undef to nop.
3321 if (Src.getOpcode() == ISD::UNDEF)
3324 // Expand memcpy to a series of load and store ops if the size operand falls
3325 // below a certain threshold.
3326 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3327 // rather than maybe a humongous number of loads and stores.
3328 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3329 std::vector<EVT> MemOps;
3330 bool DstAlignCanChange = false;
3331 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3332 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3333 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3334 DstAlignCanChange = true;
3335 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3336 if (Align > SrcAlign)
3339 bool CopyFromStr = isMemSrcFromString(Src, Str);
3340 bool isZeroStr = CopyFromStr && Str.empty();
3341 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3343 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3344 (DstAlignCanChange ? 0 : Align),
3345 (isZeroStr ? 0 : SrcAlign),
3346 true, CopyFromStr, DAG, TLI))
3349 if (DstAlignCanChange) {
3350 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3351 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3352 if (NewAlign > Align) {
3353 // Give the stack frame object a larger alignment if needed.
3354 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3355 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3360 SmallVector<SDValue, 8> OutChains;
3361 unsigned NumMemOps = MemOps.size();
3362 uint64_t SrcOff = 0, DstOff = 0;
3363 for (unsigned i = 0; i != NumMemOps; ++i) {
3365 unsigned VTSize = VT.getSizeInBits() / 8;
3366 SDValue Value, Store;
3369 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3370 // It's unlikely a store of a vector immediate can be done in a single
3371 // instruction. It would require a load from a constantpool first.
3372 // We only handle zero vectors here.
3373 // FIXME: Handle other cases where store of vector immediate is done in
3374 // a single instruction.
3375 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3376 Store = DAG.getStore(Chain, dl, Value,
3377 getMemBasePlusOffset(Dst, DstOff, DAG),
3378 DstPtrInfo.getWithOffset(DstOff), isVol,
3381 // The type might not be legal for the target. This should only happen
3382 // if the type is smaller than a legal type, as on PPC, so the right
3383 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3384 // to Load/Store if NVT==VT.
3385 // FIXME does the case above also need this?
3386 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3387 assert(NVT.bitsGE(VT));
3388 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3389 getMemBasePlusOffset(Src, SrcOff, DAG),
3390 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3391 MinAlign(SrcAlign, SrcOff));
3392 Store = DAG.getTruncStore(Chain, dl, Value,
3393 getMemBasePlusOffset(Dst, DstOff, DAG),
3394 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3397 OutChains.push_back(Store);
3402 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3403 &OutChains[0], OutChains.size());
3406 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3407 SDValue Chain, SDValue Dst,
3408 SDValue Src, uint64_t Size,
3409 unsigned Align, bool isVol,
3411 MachinePointerInfo DstPtrInfo,
3412 MachinePointerInfo SrcPtrInfo) {
3413 // Turn a memmove of undef to nop.
3414 if (Src.getOpcode() == ISD::UNDEF)
3417 // Expand memmove to a series of load and store ops if the size operand falls
3418 // below a certain threshold.
3419 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3420 std::vector<EVT> MemOps;
3421 bool DstAlignCanChange = false;
3422 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3423 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3424 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3425 DstAlignCanChange = true;
3426 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3427 if (Align > SrcAlign)
3429 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3431 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3432 (DstAlignCanChange ? 0 : Align),
3433 SrcAlign, true, false, DAG, TLI))
3436 if (DstAlignCanChange) {
3437 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3438 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3439 if (NewAlign > Align) {
3440 // Give the stack frame object a larger alignment if needed.
3441 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3442 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3447 uint64_t SrcOff = 0, DstOff = 0;
3448 SmallVector<SDValue, 8> LoadValues;
3449 SmallVector<SDValue, 8> LoadChains;
3450 SmallVector<SDValue, 8> OutChains;
3451 unsigned NumMemOps = MemOps.size();
3452 for (unsigned i = 0; i < NumMemOps; i++) {
3454 unsigned VTSize = VT.getSizeInBits() / 8;
3455 SDValue Value, Store;
3457 Value = DAG.getLoad(VT, dl, Chain,
3458 getMemBasePlusOffset(Src, SrcOff, DAG),
3459 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3461 LoadValues.push_back(Value);
3462 LoadChains.push_back(Value.getValue(1));
3465 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3466 &LoadChains[0], LoadChains.size());
3468 for (unsigned i = 0; i < NumMemOps; i++) {
3470 unsigned VTSize = VT.getSizeInBits() / 8;
3471 SDValue Value, Store;
3473 Store = DAG.getStore(Chain, dl, LoadValues[i],
3474 getMemBasePlusOffset(Dst, DstOff, DAG),
3475 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3476 OutChains.push_back(Store);
3480 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3481 &OutChains[0], OutChains.size());
3484 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3485 SDValue Chain, SDValue Dst,
3486 SDValue Src, uint64_t Size,
3487 unsigned Align, bool isVol,
3488 MachinePointerInfo DstPtrInfo) {
3489 // Turn a memset of undef to nop.
3490 if (Src.getOpcode() == ISD::UNDEF)
3493 // Expand memset to a series of load/store ops if the size operand
3494 // falls below a certain threshold.
3495 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3496 std::vector<EVT> MemOps;
3497 bool DstAlignCanChange = false;
3498 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3499 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3500 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3501 DstAlignCanChange = true;
3502 bool NonScalarIntSafe =
3503 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3504 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3505 Size, (DstAlignCanChange ? 0 : Align), 0,
3506 NonScalarIntSafe, false, DAG, TLI))
3509 if (DstAlignCanChange) {
3510 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3511 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3512 if (NewAlign > Align) {
3513 // Give the stack frame object a larger alignment if needed.
3514 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3515 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3520 SmallVector<SDValue, 8> OutChains;
3521 uint64_t DstOff = 0;
3522 unsigned NumMemOps = MemOps.size();
3523 for (unsigned i = 0; i < NumMemOps; i++) {
3525 unsigned VTSize = VT.getSizeInBits() / 8;
3526 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3527 SDValue Store = DAG.getStore(Chain, dl, Value,
3528 getMemBasePlusOffset(Dst, DstOff, DAG),
3529 DstPtrInfo.getWithOffset(DstOff),
3530 isVol, false, Align);
3531 OutChains.push_back(Store);
3535 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3536 &OutChains[0], OutChains.size());
3539 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3540 SDValue Src, SDValue Size,
3541 unsigned Align, bool isVol, bool AlwaysInline,
3542 MachinePointerInfo DstPtrInfo,
3543 MachinePointerInfo SrcPtrInfo) {
3545 // Check to see if we should lower the memcpy to loads and stores first.
3546 // For cases within the target-specified limits, this is the best choice.
3547 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3549 // Memcpy with size zero? Just return the original chain.
3550 if (ConstantSize->isNullValue())
3553 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3554 ConstantSize->getZExtValue(),Align,
3555 isVol, false, DstPtrInfo, SrcPtrInfo);
3556 if (Result.getNode())
3560 // Then check to see if we should lower the memcpy with target-specific
3561 // code. If the target chooses to do this, this is the next best.
3563 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3564 isVol, AlwaysInline,
3565 DstPtrInfo, SrcPtrInfo);
3566 if (Result.getNode())
3569 // If we really need inline code and the target declined to provide it,
3570 // use a (potentially long) sequence of loads and stores.
3572 assert(ConstantSize && "AlwaysInline requires a constant size!");
3573 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3574 ConstantSize->getZExtValue(), Align, isVol,
3575 true, DstPtrInfo, SrcPtrInfo);
3578 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3579 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3580 // respect volatile, so they may do things like read or write memory
3581 // beyond the given memory regions. But fixing this isn't easy, and most
3582 // people don't care.
3584 // Emit a library call.
3585 TargetLowering::ArgListTy Args;
3586 TargetLowering::ArgListEntry Entry;
3587 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3588 Entry.Node = Dst; Args.push_back(Entry);
3589 Entry.Node = Src; Args.push_back(Entry);
3590 Entry.Node = Size; Args.push_back(Entry);
3591 // FIXME: pass in DebugLoc
3592 std::pair<SDValue,SDValue> CallResult =
3593 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3594 false, false, false, false, 0,
3595 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3596 /*isReturnValueUsed=*/false,
3597 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3598 TLI.getPointerTy()),
3600 return CallResult.second;
3603 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3604 SDValue Src, SDValue Size,
3605 unsigned Align, bool isVol,
3606 MachinePointerInfo DstPtrInfo,
3607 MachinePointerInfo SrcPtrInfo) {
3609 // Check to see if we should lower the memmove to loads and stores first.
3610 // For cases within the target-specified limits, this is the best choice.
3611 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3613 // Memmove with size zero? Just return the original chain.
3614 if (ConstantSize->isNullValue())
3618 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3619 ConstantSize->getZExtValue(), Align, isVol,
3620 false, DstPtrInfo, SrcPtrInfo);
3621 if (Result.getNode())
3625 // Then check to see if we should lower the memmove with target-specific
3626 // code. If the target chooses to do this, this is the next best.
3628 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3629 DstPtrInfo, SrcPtrInfo);
3630 if (Result.getNode())
3633 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3634 // not be safe. See memcpy above for more details.
3636 // Emit a library call.
3637 TargetLowering::ArgListTy Args;
3638 TargetLowering::ArgListEntry Entry;
3639 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3640 Entry.Node = Dst; Args.push_back(Entry);
3641 Entry.Node = Src; Args.push_back(Entry);
3642 Entry.Node = Size; Args.push_back(Entry);
3643 // FIXME: pass in DebugLoc
3644 std::pair<SDValue,SDValue> CallResult =
3645 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3646 false, false, false, false, 0,
3647 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3648 /*isReturnValueUsed=*/false,
3649 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3650 TLI.getPointerTy()),
3652 return CallResult.second;
3655 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3656 SDValue Src, SDValue Size,
3657 unsigned Align, bool isVol,
3658 MachinePointerInfo DstPtrInfo) {
3660 // Check to see if we should lower the memset to stores first.
3661 // For cases within the target-specified limits, this is the best choice.
3662 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3664 // Memset with size zero? Just return the original chain.
3665 if (ConstantSize->isNullValue())
3669 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3670 Align, isVol, DstPtrInfo);
3672 if (Result.getNode())
3676 // Then check to see if we should lower the memset with target-specific
3677 // code. If the target chooses to do this, this is the next best.
3679 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3681 if (Result.getNode())
3684 // Emit a library call.
3685 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3686 TargetLowering::ArgListTy Args;
3687 TargetLowering::ArgListEntry Entry;
3688 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3689 Args.push_back(Entry);
3690 // Extend or truncate the argument to be an i32 value for the call.
3691 if (Src.getValueType().bitsGT(MVT::i32))
3692 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3694 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3696 Entry.Ty = Type::getInt32Ty(*getContext());
3697 Entry.isSExt = true;
3698 Args.push_back(Entry);
3700 Entry.Ty = IntPtrTy;
3701 Entry.isSExt = false;
3702 Args.push_back(Entry);
3703 // FIXME: pass in DebugLoc
3704 std::pair<SDValue,SDValue> CallResult =
3705 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3706 false, false, false, false, 0,
3707 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3708 /*isReturnValueUsed=*/false,
3709 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3710 TLI.getPointerTy()),
3712 return CallResult.second;
3715 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3716 SDValue Chain, SDValue Ptr, SDValue Cmp,
3717 SDValue Swp, MachinePointerInfo PtrInfo,
3718 unsigned Alignment) {
3719 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3720 Alignment = getEVTAlignment(MemVT);
3722 MachineFunction &MF = getMachineFunction();
3723 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3725 // For now, atomics are considered to be volatile always.
3726 Flags |= MachineMemOperand::MOVolatile;
3728 MachineMemOperand *MMO =
3729 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3731 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3734 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3736 SDValue Ptr, SDValue Cmp,
3737 SDValue Swp, MachineMemOperand *MMO) {
3738 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3739 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3741 EVT VT = Cmp.getValueType();
3743 SDVTList VTs = getVTList(VT, MVT::Other);
3744 FoldingSetNodeID ID;
3745 ID.AddInteger(MemVT.getRawBits());
3746 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3747 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3749 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3750 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3751 return SDValue(E, 0);
3753 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3754 Ptr, Cmp, Swp, MMO);
3755 CSEMap.InsertNode(N, IP);
3756 AllNodes.push_back(N);
3757 return SDValue(N, 0);
3760 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3762 SDValue Ptr, SDValue Val,
3763 const Value* PtrVal,
3764 unsigned Alignment) {
3765 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3766 Alignment = getEVTAlignment(MemVT);
3768 MachineFunction &MF = getMachineFunction();
3769 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3771 // For now, atomics are considered to be volatile always.
3772 Flags |= MachineMemOperand::MOVolatile;
3774 MachineMemOperand *MMO =
3775 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3776 MemVT.getStoreSize(), Alignment);
3778 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3781 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3783 SDValue Ptr, SDValue Val,
3784 MachineMemOperand *MMO) {
3785 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3786 Opcode == ISD::ATOMIC_LOAD_SUB ||
3787 Opcode == ISD::ATOMIC_LOAD_AND ||
3788 Opcode == ISD::ATOMIC_LOAD_OR ||
3789 Opcode == ISD::ATOMIC_LOAD_XOR ||
3790 Opcode == ISD::ATOMIC_LOAD_NAND ||
3791 Opcode == ISD::ATOMIC_LOAD_MIN ||
3792 Opcode == ISD::ATOMIC_LOAD_MAX ||
3793 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3794 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3795 Opcode == ISD::ATOMIC_SWAP) &&
3796 "Invalid Atomic Op");
3798 EVT VT = Val.getValueType();
3800 SDVTList VTs = getVTList(VT, MVT::Other);
3801 FoldingSetNodeID ID;
3802 ID.AddInteger(MemVT.getRawBits());
3803 SDValue Ops[] = {Chain, Ptr, Val};
3804 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3806 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3807 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3808 return SDValue(E, 0);
3810 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3812 CSEMap.InsertNode(N, IP);
3813 AllNodes.push_back(N);
3814 return SDValue(N, 0);
3817 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3818 /// Allowed to return something different (and simpler) if Simplify is true.
3819 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3824 SmallVector<EVT, 4> VTs;
3825 VTs.reserve(NumOps);
3826 for (unsigned i = 0; i < NumOps; ++i)
3827 VTs.push_back(Ops[i].getValueType());
3828 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3833 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3834 const EVT *VTs, unsigned NumVTs,
3835 const SDValue *Ops, unsigned NumOps,
3836 EVT MemVT, MachinePointerInfo PtrInfo,
3837 unsigned Align, bool Vol,
3838 bool ReadMem, bool WriteMem) {
3839 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3840 MemVT, PtrInfo, Align, Vol,
3845 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3846 const SDValue *Ops, unsigned NumOps,
3847 EVT MemVT, MachinePointerInfo PtrInfo,
3848 unsigned Align, bool Vol,
3849 bool ReadMem, bool WriteMem) {
3850 if (Align == 0) // Ensure that codegen never sees alignment 0
3851 Align = getEVTAlignment(MemVT);
3853 MachineFunction &MF = getMachineFunction();
3856 Flags |= MachineMemOperand::MOStore;
3858 Flags |= MachineMemOperand::MOLoad;
3860 Flags |= MachineMemOperand::MOVolatile;
3861 MachineMemOperand *MMO =
3862 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3864 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3868 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3869 const SDValue *Ops, unsigned NumOps,
3870 EVT MemVT, MachineMemOperand *MMO) {
3871 assert((Opcode == ISD::INTRINSIC_VOID ||
3872 Opcode == ISD::INTRINSIC_W_CHAIN ||
3873 Opcode == ISD::PREFETCH ||
3874 (Opcode <= INT_MAX &&
3875 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3876 "Opcode is not a memory-accessing opcode!");
3878 // Memoize the node unless it returns a flag.
3879 MemIntrinsicSDNode *N;
3880 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3881 FoldingSetNodeID ID;
3882 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3884 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3885 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3886 return SDValue(E, 0);
3889 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3891 CSEMap.InsertNode(N, IP);
3893 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3896 AllNodes.push_back(N);
3897 return SDValue(N, 0);
3900 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3901 /// MachinePointerInfo record from it. This is particularly useful because the
3902 /// code generator has many cases where it doesn't bother passing in a
3903 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3904 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3905 // If this is FI+Offset, we can model it.
3906 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3907 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3909 // If this is (FI+Offset1)+Offset2, we can model it.
3910 if (Ptr.getOpcode() != ISD::ADD ||
3911 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3912 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3913 return MachinePointerInfo();
3915 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3916 return MachinePointerInfo::getFixedStack(FI, Offset+
3917 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3920 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3921 /// MachinePointerInfo record from it. This is particularly useful because the
3922 /// code generator has many cases where it doesn't bother passing in a
3923 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3924 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3925 // If the 'Offset' value isn't a constant, we can't handle this.
3926 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3927 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3928 if (OffsetOp.getOpcode() == ISD::UNDEF)
3929 return InferPointerInfo(Ptr);
3930 return MachinePointerInfo();
3935 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3936 EVT VT, DebugLoc dl, SDValue Chain,
3937 SDValue Ptr, SDValue Offset,
3938 MachinePointerInfo PtrInfo, EVT MemVT,
3939 bool isVolatile, bool isNonTemporal,
3940 unsigned Alignment, const MDNode *TBAAInfo) {
3941 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3942 Alignment = getEVTAlignment(VT);
3944 unsigned Flags = MachineMemOperand::MOLoad;
3946 Flags |= MachineMemOperand::MOVolatile;
3948 Flags |= MachineMemOperand::MONonTemporal;
3950 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3953 PtrInfo = InferPointerInfo(Ptr, Offset);
3955 MachineFunction &MF = getMachineFunction();
3956 MachineMemOperand *MMO =
3957 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3959 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3963 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3964 EVT VT, DebugLoc dl, SDValue Chain,
3965 SDValue Ptr, SDValue Offset, EVT MemVT,
3966 MachineMemOperand *MMO) {
3968 ExtType = ISD::NON_EXTLOAD;
3969 } else if (ExtType == ISD::NON_EXTLOAD) {
3970 assert(VT == MemVT && "Non-extending load from different memory type!");
3973 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3974 "Should only be an extending load, not truncating!");
3975 assert(VT.isInteger() == MemVT.isInteger() &&
3976 "Cannot convert from FP to Int or Int -> FP!");
3977 assert(VT.isVector() == MemVT.isVector() &&
3978 "Cannot use trunc store to convert to or from a vector!");
3979 assert((!VT.isVector() ||
3980 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3981 "Cannot use trunc store to change the number of vector elements!");
3984 bool Indexed = AM != ISD::UNINDEXED;
3985 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3986 "Unindexed load with an offset!");
3988 SDVTList VTs = Indexed ?
3989 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3990 SDValue Ops[] = { Chain, Ptr, Offset };
3991 FoldingSetNodeID ID;
3992 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3993 ID.AddInteger(MemVT.getRawBits());
3994 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3995 MMO->isNonTemporal()));
3997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3998 cast<LoadSDNode>(E)->refineAlignment(MMO);
3999 return SDValue(E, 0);
4001 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4003 CSEMap.InsertNode(N, IP);
4004 AllNodes.push_back(N);
4005 return SDValue(N, 0);
4008 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4009 SDValue Chain, SDValue Ptr,
4010 MachinePointerInfo PtrInfo,
4011 bool isVolatile, bool isNonTemporal,
4012 unsigned Alignment, const MDNode *TBAAInfo) {
4013 SDValue Undef = getUNDEF(Ptr.getValueType());
4014 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4015 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4018 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
4019 SDValue Chain, SDValue Ptr,
4020 MachinePointerInfo PtrInfo, EVT MemVT,
4021 bool isVolatile, bool isNonTemporal,
4022 unsigned Alignment, const MDNode *TBAAInfo) {
4023 SDValue Undef = getUNDEF(Ptr.getValueType());
4024 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4025 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4031 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4032 SDValue Offset, ISD::MemIndexedMode AM) {
4033 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4034 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4035 "Load is already a indexed load!");
4036 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4037 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4039 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4042 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4043 SDValue Ptr, MachinePointerInfo PtrInfo,
4044 bool isVolatile, bool isNonTemporal,
4045 unsigned Alignment, const MDNode *TBAAInfo) {
4046 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4047 Alignment = getEVTAlignment(Val.getValueType());
4049 unsigned Flags = MachineMemOperand::MOStore;
4051 Flags |= MachineMemOperand::MOVolatile;
4053 Flags |= MachineMemOperand::MONonTemporal;
4056 PtrInfo = InferPointerInfo(Ptr);
4058 MachineFunction &MF = getMachineFunction();
4059 MachineMemOperand *MMO =
4060 MF.getMachineMemOperand(PtrInfo, Flags,
4061 Val.getValueType().getStoreSize(), Alignment,
4064 return getStore(Chain, dl, Val, Ptr, MMO);
4067 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4068 SDValue Ptr, MachineMemOperand *MMO) {
4069 EVT VT = Val.getValueType();
4070 SDVTList VTs = getVTList(MVT::Other);
4071 SDValue Undef = getUNDEF(Ptr.getValueType());
4072 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4073 FoldingSetNodeID ID;
4074 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4075 ID.AddInteger(VT.getRawBits());
4076 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4077 MMO->isNonTemporal()));
4079 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4080 cast<StoreSDNode>(E)->refineAlignment(MMO);
4081 return SDValue(E, 0);
4083 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4085 CSEMap.InsertNode(N, IP);
4086 AllNodes.push_back(N);
4087 return SDValue(N, 0);
4090 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4091 SDValue Ptr, MachinePointerInfo PtrInfo,
4092 EVT SVT,bool isVolatile, bool isNonTemporal,
4094 const MDNode *TBAAInfo) {
4095 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4096 Alignment = getEVTAlignment(SVT);
4098 unsigned Flags = MachineMemOperand::MOStore;
4100 Flags |= MachineMemOperand::MOVolatile;
4102 Flags |= MachineMemOperand::MONonTemporal;
4105 PtrInfo = InferPointerInfo(Ptr);
4107 MachineFunction &MF = getMachineFunction();
4108 MachineMemOperand *MMO =
4109 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4112 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4115 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4116 SDValue Ptr, EVT SVT,
4117 MachineMemOperand *MMO) {
4118 EVT VT = Val.getValueType();
4121 return getStore(Chain, dl, Val, Ptr, MMO);
4123 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4124 "Should only be a truncating store, not extending!");
4125 assert(VT.isInteger() == SVT.isInteger() &&
4126 "Can't do FP-INT conversion!");
4127 assert(VT.isVector() == SVT.isVector() &&
4128 "Cannot use trunc store to convert to or from a vector!");
4129 assert((!VT.isVector() ||
4130 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4131 "Cannot use trunc store to change the number of vector elements!");
4133 SDVTList VTs = getVTList(MVT::Other);
4134 SDValue Undef = getUNDEF(Ptr.getValueType());
4135 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4136 FoldingSetNodeID ID;
4137 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4138 ID.AddInteger(SVT.getRawBits());
4139 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4140 MMO->isNonTemporal()));
4142 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4143 cast<StoreSDNode>(E)->refineAlignment(MMO);
4144 return SDValue(E, 0);
4146 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4148 CSEMap.InsertNode(N, IP);
4149 AllNodes.push_back(N);
4150 return SDValue(N, 0);
4154 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4155 SDValue Offset, ISD::MemIndexedMode AM) {
4156 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4157 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4158 "Store is already a indexed store!");
4159 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4160 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4161 FoldingSetNodeID ID;
4162 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4163 ID.AddInteger(ST->getMemoryVT().getRawBits());
4164 ID.AddInteger(ST->getRawSubclassData());
4166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4167 return SDValue(E, 0);
4169 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4170 ST->isTruncatingStore(),
4172 ST->getMemOperand());
4173 CSEMap.InsertNode(N, IP);
4174 AllNodes.push_back(N);
4175 return SDValue(N, 0);
4178 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4179 SDValue Chain, SDValue Ptr,
4182 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4183 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4186 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4187 const SDUse *Ops, unsigned NumOps) {
4189 case 0: return getNode(Opcode, DL, VT);
4190 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4191 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4192 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4196 // Copy from an SDUse array into an SDValue array for use with
4197 // the regular getNode logic.
4198 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4199 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4202 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4203 const SDValue *Ops, unsigned NumOps) {
4205 case 0: return getNode(Opcode, DL, VT);
4206 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4207 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4208 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4214 case ISD::SELECT_CC: {
4215 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4216 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4217 "LHS and RHS of condition must have same type!");
4218 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4219 "True and False arms of SelectCC must have same type!");
4220 assert(Ops[2].getValueType() == VT &&
4221 "select_cc node must be of same type as true and false value!");
4225 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4226 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4227 "LHS/RHS of comparison should match types!");
4234 SDVTList VTs = getVTList(VT);
4236 if (VT != MVT::Flag) {
4237 FoldingSetNodeID ID;
4238 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4242 return SDValue(E, 0);
4244 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4245 CSEMap.InsertNode(N, IP);
4247 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4250 AllNodes.push_back(N);
4254 return SDValue(N, 0);
4257 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4258 const std::vector<EVT> &ResultTys,
4259 const SDValue *Ops, unsigned NumOps) {
4260 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4264 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4265 const EVT *VTs, unsigned NumVTs,
4266 const SDValue *Ops, unsigned NumOps) {
4268 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4269 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4272 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4273 const SDValue *Ops, unsigned NumOps) {
4274 if (VTList.NumVTs == 1)
4275 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4279 // FIXME: figure out how to safely handle things like
4280 // int foo(int x) { return 1 << (x & 255); }
4281 // int bar() { return foo(256); }
4282 case ISD::SRA_PARTS:
4283 case ISD::SRL_PARTS:
4284 case ISD::SHL_PARTS:
4285 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4286 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4287 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4288 else if (N3.getOpcode() == ISD::AND)
4289 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4290 // If the and is only masking out bits that cannot effect the shift,
4291 // eliminate the and.
4292 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4293 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4294 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4300 // Memoize the node unless it returns a flag.
4302 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4303 FoldingSetNodeID ID;
4304 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4307 return SDValue(E, 0);
4310 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4311 } else if (NumOps == 2) {
4312 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4313 } else if (NumOps == 3) {
4314 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4317 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4319 CSEMap.InsertNode(N, IP);
4322 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4323 } else if (NumOps == 2) {
4324 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4325 } else if (NumOps == 3) {
4326 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4329 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4332 AllNodes.push_back(N);
4336 return SDValue(N, 0);
4339 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4340 return getNode(Opcode, DL, VTList, 0, 0);
4343 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4345 SDValue Ops[] = { N1 };
4346 return getNode(Opcode, DL, VTList, Ops, 1);
4349 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4350 SDValue N1, SDValue N2) {
4351 SDValue Ops[] = { N1, N2 };
4352 return getNode(Opcode, DL, VTList, Ops, 2);
4355 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4356 SDValue N1, SDValue N2, SDValue N3) {
4357 SDValue Ops[] = { N1, N2, N3 };
4358 return getNode(Opcode, DL, VTList, Ops, 3);
4361 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4362 SDValue N1, SDValue N2, SDValue N3,
4364 SDValue Ops[] = { N1, N2, N3, N4 };
4365 return getNode(Opcode, DL, VTList, Ops, 4);
4368 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4369 SDValue N1, SDValue N2, SDValue N3,
4370 SDValue N4, SDValue N5) {
4371 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4372 return getNode(Opcode, DL, VTList, Ops, 5);
4375 SDVTList SelectionDAG::getVTList(EVT VT) {
4376 return makeVTList(SDNode::getValueTypeList(VT), 1);
4379 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4380 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4381 E = VTList.rend(); I != E; ++I)
4382 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4385 EVT *Array = Allocator.Allocate<EVT>(2);
4388 SDVTList Result = makeVTList(Array, 2);
4389 VTList.push_back(Result);
4393 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4394 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4395 E = VTList.rend(); I != E; ++I)
4396 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4400 EVT *Array = Allocator.Allocate<EVT>(3);
4404 SDVTList Result = makeVTList(Array, 3);
4405 VTList.push_back(Result);
4409 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4410 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4411 E = VTList.rend(); I != E; ++I)
4412 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4413 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4416 EVT *Array = Allocator.Allocate<EVT>(4);
4421 SDVTList Result = makeVTList(Array, 4);
4422 VTList.push_back(Result);
4426 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4428 case 0: llvm_unreachable("Cannot have nodes without results!");
4429 case 1: return getVTList(VTs[0]);
4430 case 2: return getVTList(VTs[0], VTs[1]);
4431 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4432 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4436 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4437 E = VTList.rend(); I != E; ++I) {
4438 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4441 bool NoMatch = false;
4442 for (unsigned i = 2; i != NumVTs; ++i)
4443 if (VTs[i] != I->VTs[i]) {
4451 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4452 std::copy(VTs, VTs+NumVTs, Array);
4453 SDVTList Result = makeVTList(Array, NumVTs);
4454 VTList.push_back(Result);
4459 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4460 /// specified operands. If the resultant node already exists in the DAG,
4461 /// this does not modify the specified node, instead it returns the node that
4462 /// already exists. If the resultant node does not exist in the DAG, the
4463 /// input node is returned. As a degenerate case, if you specify the same
4464 /// input operands as the node already has, the input node is returned.
4465 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4466 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4468 // Check to see if there is no change.
4469 if (Op == N->getOperand(0)) return N;
4471 // See if the modified node already exists.
4472 void *InsertPos = 0;
4473 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4476 // Nope it doesn't. Remove the node from its current place in the maps.
4478 if (!RemoveNodeFromCSEMaps(N))
4481 // Now we update the operands.
4482 N->OperandList[0].set(Op);
4484 // If this gets put into a CSE map, add it.
4485 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4489 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4490 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4492 // Check to see if there is no change.
4493 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4494 return N; // No operands changed, just return the input node.
4496 // See if the modified node already exists.
4497 void *InsertPos = 0;
4498 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4501 // Nope it doesn't. Remove the node from its current place in the maps.
4503 if (!RemoveNodeFromCSEMaps(N))
4506 // Now we update the operands.
4507 if (N->OperandList[0] != Op1)
4508 N->OperandList[0].set(Op1);
4509 if (N->OperandList[1] != Op2)
4510 N->OperandList[1].set(Op2);
4512 // If this gets put into a CSE map, add it.
4513 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4517 SDNode *SelectionDAG::
4518 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4519 SDValue Ops[] = { Op1, Op2, Op3 };
4520 return UpdateNodeOperands(N, Ops, 3);
4523 SDNode *SelectionDAG::
4524 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4525 SDValue Op3, SDValue Op4) {
4526 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4527 return UpdateNodeOperands(N, Ops, 4);
4530 SDNode *SelectionDAG::
4531 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4532 SDValue Op3, SDValue Op4, SDValue Op5) {
4533 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4534 return UpdateNodeOperands(N, Ops, 5);
4537 SDNode *SelectionDAG::
4538 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4539 assert(N->getNumOperands() == NumOps &&
4540 "Update with wrong number of operands");
4542 // Check to see if there is no change.
4543 bool AnyChange = false;
4544 for (unsigned i = 0; i != NumOps; ++i) {
4545 if (Ops[i] != N->getOperand(i)) {
4551 // No operands changed, just return the input node.
4552 if (!AnyChange) return N;
4554 // See if the modified node already exists.
4555 void *InsertPos = 0;
4556 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4559 // Nope it doesn't. Remove the node from its current place in the maps.
4561 if (!RemoveNodeFromCSEMaps(N))
4564 // Now we update the operands.
4565 for (unsigned i = 0; i != NumOps; ++i)
4566 if (N->OperandList[i] != Ops[i])
4567 N->OperandList[i].set(Ops[i]);
4569 // If this gets put into a CSE map, add it.
4570 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4574 /// DropOperands - Release the operands and set this node to have
4576 void SDNode::DropOperands() {
4577 // Unlike the code in MorphNodeTo that does this, we don't need to
4578 // watch for dead nodes here.
4579 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4585 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4590 SDVTList VTs = getVTList(VT);
4591 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4594 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 EVT VT, SDValue Op1) {
4596 SDVTList VTs = getVTList(VT);
4597 SDValue Ops[] = { Op1 };
4598 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4602 EVT VT, SDValue Op1,
4604 SDVTList VTs = getVTList(VT);
4605 SDValue Ops[] = { Op1, Op2 };
4606 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4609 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4610 EVT VT, SDValue Op1,
4611 SDValue Op2, SDValue Op3) {
4612 SDVTList VTs = getVTList(VT);
4613 SDValue Ops[] = { Op1, Op2, Op3 };
4614 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4617 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4618 EVT VT, const SDValue *Ops,
4620 SDVTList VTs = getVTList(VT);
4621 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4624 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4625 EVT VT1, EVT VT2, const SDValue *Ops,
4627 SDVTList VTs = getVTList(VT1, VT2);
4628 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4631 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4633 SDVTList VTs = getVTList(VT1, VT2);
4634 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4637 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4638 EVT VT1, EVT VT2, EVT VT3,
4639 const SDValue *Ops, unsigned NumOps) {
4640 SDVTList VTs = getVTList(VT1, VT2, VT3);
4641 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4644 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4645 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4646 const SDValue *Ops, unsigned NumOps) {
4647 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4648 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4651 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4654 SDVTList VTs = getVTList(VT1, VT2);
4655 SDValue Ops[] = { Op1 };
4656 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4659 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4661 SDValue Op1, SDValue Op2) {
4662 SDVTList VTs = getVTList(VT1, VT2);
4663 SDValue Ops[] = { Op1, Op2 };
4664 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4667 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4669 SDValue Op1, SDValue Op2,
4671 SDVTList VTs = getVTList(VT1, VT2);
4672 SDValue Ops[] = { Op1, Op2, Op3 };
4673 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4676 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4677 EVT VT1, EVT VT2, EVT VT3,
4678 SDValue Op1, SDValue Op2,
4680 SDVTList VTs = getVTList(VT1, VT2, VT3);
4681 SDValue Ops[] = { Op1, Op2, Op3 };
4682 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4685 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4686 SDVTList VTs, const SDValue *Ops,
4688 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4689 // Reset the NodeID to -1.
4694 /// MorphNodeTo - This *mutates* the specified node to have the specified
4695 /// return type, opcode, and operands.
4697 /// Note that MorphNodeTo returns the resultant node. If there is already a
4698 /// node of the specified opcode and operands, it returns that node instead of
4699 /// the current one. Note that the DebugLoc need not be the same.
4701 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4702 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4703 /// node, and because it doesn't require CSE recalculation for any of
4704 /// the node's users.
4706 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4707 SDVTList VTs, const SDValue *Ops,
4709 // If an identical node already exists, use it.
4711 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4712 FoldingSetNodeID ID;
4713 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4714 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4718 if (!RemoveNodeFromCSEMaps(N))
4721 // Start the morphing.
4723 N->ValueList = VTs.VTs;
4724 N->NumValues = VTs.NumVTs;
4726 // Clear the operands list, updating used nodes to remove this from their
4727 // use list. Keep track of any operands that become dead as a result.
4728 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4729 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4731 SDNode *Used = Use.getNode();
4733 if (Used->use_empty())
4734 DeadNodeSet.insert(Used);
4737 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4738 // Initialize the memory references information.
4739 MN->setMemRefs(0, 0);
4740 // If NumOps is larger than the # of operands we can have in a
4741 // MachineSDNode, reallocate the operand list.
4742 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4743 if (MN->OperandsNeedDelete)
4744 delete[] MN->OperandList;
4745 if (NumOps > array_lengthof(MN->LocalOperands))
4746 // We're creating a final node that will live unmorphed for the
4747 // remainder of the current SelectionDAG iteration, so we can allocate
4748 // the operands directly out of a pool with no recycling metadata.
4749 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4752 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4753 MN->OperandsNeedDelete = false;
4755 MN->InitOperands(MN->OperandList, Ops, NumOps);
4757 // If NumOps is larger than the # of operands we currently have, reallocate
4758 // the operand list.
4759 if (NumOps > N->NumOperands) {
4760 if (N->OperandsNeedDelete)
4761 delete[] N->OperandList;
4762 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4763 N->OperandsNeedDelete = true;
4765 N->InitOperands(N->OperandList, Ops, NumOps);
4768 // Delete any nodes that are still dead after adding the uses for the
4770 if (!DeadNodeSet.empty()) {
4771 SmallVector<SDNode *, 16> DeadNodes;
4772 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4773 E = DeadNodeSet.end(); I != E; ++I)
4774 if ((*I)->use_empty())
4775 DeadNodes.push_back(*I);
4776 RemoveDeadNodes(DeadNodes);
4780 CSEMap.InsertNode(N, IP); // Memoize the new node.
4785 /// getMachineNode - These are used for target selectors to create a new node
4786 /// with specified return type(s), MachineInstr opcode, and operands.
4788 /// Note that getMachineNode returns the resultant node. If there is already a
4789 /// node of the specified opcode and operands, it returns that node instead of
4790 /// the current one.
4792 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4793 SDVTList VTs = getVTList(VT);
4794 return getMachineNode(Opcode, dl, VTs, 0, 0);
4798 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4799 SDVTList VTs = getVTList(VT);
4800 SDValue Ops[] = { Op1 };
4801 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4805 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4806 SDValue Op1, SDValue Op2) {
4807 SDVTList VTs = getVTList(VT);
4808 SDValue Ops[] = { Op1, Op2 };
4809 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4813 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4814 SDValue Op1, SDValue Op2, SDValue Op3) {
4815 SDVTList VTs = getVTList(VT);
4816 SDValue Ops[] = { Op1, Op2, Op3 };
4817 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4821 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4822 const SDValue *Ops, unsigned NumOps) {
4823 SDVTList VTs = getVTList(VT);
4824 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4828 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4829 SDVTList VTs = getVTList(VT1, VT2);
4830 return getMachineNode(Opcode, dl, VTs, 0, 0);
4834 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4835 EVT VT1, EVT VT2, SDValue Op1) {
4836 SDVTList VTs = getVTList(VT1, VT2);
4837 SDValue Ops[] = { Op1 };
4838 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4842 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4843 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4844 SDVTList VTs = getVTList(VT1, VT2);
4845 SDValue Ops[] = { Op1, Op2 };
4846 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4850 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4851 EVT VT1, EVT VT2, SDValue Op1,
4852 SDValue Op2, SDValue Op3) {
4853 SDVTList VTs = getVTList(VT1, VT2);
4854 SDValue Ops[] = { Op1, Op2, Op3 };
4855 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4859 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4861 const SDValue *Ops, unsigned NumOps) {
4862 SDVTList VTs = getVTList(VT1, VT2);
4863 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4867 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4868 EVT VT1, EVT VT2, EVT VT3,
4869 SDValue Op1, SDValue Op2) {
4870 SDVTList VTs = getVTList(VT1, VT2, VT3);
4871 SDValue Ops[] = { Op1, Op2 };
4872 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4876 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4877 EVT VT1, EVT VT2, EVT VT3,
4878 SDValue Op1, SDValue Op2, SDValue Op3) {
4879 SDVTList VTs = getVTList(VT1, VT2, VT3);
4880 SDValue Ops[] = { Op1, Op2, Op3 };
4881 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4885 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4886 EVT VT1, EVT VT2, EVT VT3,
4887 const SDValue *Ops, unsigned NumOps) {
4888 SDVTList VTs = getVTList(VT1, VT2, VT3);
4889 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4893 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4894 EVT VT2, EVT VT3, EVT VT4,
4895 const SDValue *Ops, unsigned NumOps) {
4896 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4897 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4901 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4902 const std::vector<EVT> &ResultTys,
4903 const SDValue *Ops, unsigned NumOps) {
4904 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4905 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4909 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4910 const SDValue *Ops, unsigned NumOps) {
4911 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4916 FoldingSetNodeID ID;
4917 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4919 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4920 return cast<MachineSDNode>(E);
4923 // Allocate a new MachineSDNode.
4924 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4926 // Initialize the operands list.
4927 if (NumOps > array_lengthof(N->LocalOperands))
4928 // We're creating a final node that will live unmorphed for the
4929 // remainder of the current SelectionDAG iteration, so we can allocate
4930 // the operands directly out of a pool with no recycling metadata.
4931 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4934 N->InitOperands(N->LocalOperands, Ops, NumOps);
4935 N->OperandsNeedDelete = false;
4938 CSEMap.InsertNode(N, IP);
4940 AllNodes.push_back(N);
4942 VerifyMachineNode(N);
4947 /// getTargetExtractSubreg - A convenience function for creating
4948 /// TargetOpcode::EXTRACT_SUBREG nodes.
4950 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4952 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4953 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4954 VT, Operand, SRIdxVal);
4955 return SDValue(Subreg, 0);
4958 /// getTargetInsertSubreg - A convenience function for creating
4959 /// TargetOpcode::INSERT_SUBREG nodes.
4961 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4962 SDValue Operand, SDValue Subreg) {
4963 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4964 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4965 VT, Operand, Subreg, SRIdxVal);
4966 return SDValue(Result, 0);
4969 /// getNodeIfExists - Get the specified node if it's already available, or
4970 /// else return NULL.
4971 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4972 const SDValue *Ops, unsigned NumOps) {
4973 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4974 FoldingSetNodeID ID;
4975 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4977 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4983 /// getDbgValue - Creates a SDDbgValue node.
4986 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4987 DebugLoc DL, unsigned O) {
4988 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4992 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4993 DebugLoc DL, unsigned O) {
4994 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4998 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4999 DebugLoc DL, unsigned O) {
5000 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5005 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5006 /// pointed to by a use iterator is deleted, increment the use iterator
5007 /// so that it doesn't dangle.
5009 /// This class also manages a "downlink" DAGUpdateListener, to forward
5010 /// messages to ReplaceAllUsesWith's callers.
5012 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5013 SelectionDAG::DAGUpdateListener *DownLink;
5014 SDNode::use_iterator &UI;
5015 SDNode::use_iterator &UE;
5017 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5018 // Increment the iterator as needed.
5019 while (UI != UE && N == *UI)
5022 // Then forward the message.
5023 if (DownLink) DownLink->NodeDeleted(N, E);
5026 virtual void NodeUpdated(SDNode *N) {
5027 // Just forward the message.
5028 if (DownLink) DownLink->NodeUpdated(N);
5032 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5033 SDNode::use_iterator &ui,
5034 SDNode::use_iterator &ue)
5035 : DownLink(dl), UI(ui), UE(ue) {}
5040 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5041 /// This can cause recursive merging of nodes in the DAG.
5043 /// This version assumes From has a single result value.
5045 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5046 DAGUpdateListener *UpdateListener) {
5047 SDNode *From = FromN.getNode();
5048 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5049 "Cannot replace with this method!");
5050 assert(From != To.getNode() && "Cannot replace uses of with self");
5052 // Iterate over all the existing uses of From. New uses will be added
5053 // to the beginning of the use list, which we avoid visiting.
5054 // This specifically avoids visiting uses of From that arise while the
5055 // replacement is happening, because any such uses would be the result
5056 // of CSE: If an existing node looks like From after one of its operands
5057 // is replaced by To, we don't want to replace of all its users with To
5058 // too. See PR3018 for more info.
5059 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5060 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5064 // This node is about to morph, remove its old self from the CSE maps.
5065 RemoveNodeFromCSEMaps(User);
5067 // A user can appear in a use list multiple times, and when this
5068 // happens the uses are usually next to each other in the list.
5069 // To help reduce the number of CSE recomputations, process all
5070 // the uses of this user that we can find this way.
5072 SDUse &Use = UI.getUse();
5075 } while (UI != UE && *UI == User);
5077 // Now that we have modified User, add it back to the CSE maps. If it
5078 // already exists there, recursively merge the results together.
5079 AddModifiedNodeToCSEMaps(User, &Listener);
5083 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5084 /// This can cause recursive merging of nodes in the DAG.
5086 /// This version assumes that for each value of From, there is a
5087 /// corresponding value in To in the same position with the same type.
5089 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5090 DAGUpdateListener *UpdateListener) {
5092 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5093 assert((!From->hasAnyUseOfValue(i) ||
5094 From->getValueType(i) == To->getValueType(i)) &&
5095 "Cannot use this version of ReplaceAllUsesWith!");
5098 // Handle the trivial case.
5102 // Iterate over just the existing users of From. See the comments in
5103 // the ReplaceAllUsesWith above.
5104 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5105 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5109 // This node is about to morph, remove its old self from the CSE maps.
5110 RemoveNodeFromCSEMaps(User);
5112 // A user can appear in a use list multiple times, and when this
5113 // happens the uses are usually next to each other in the list.
5114 // To help reduce the number of CSE recomputations, process all
5115 // the uses of this user that we can find this way.
5117 SDUse &Use = UI.getUse();
5120 } while (UI != UE && *UI == User);
5122 // Now that we have modified User, add it back to the CSE maps. If it
5123 // already exists there, recursively merge the results together.
5124 AddModifiedNodeToCSEMaps(User, &Listener);
5128 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5129 /// This can cause recursive merging of nodes in the DAG.
5131 /// This version can replace From with any result values. To must match the
5132 /// number and types of values returned by From.
5133 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5135 DAGUpdateListener *UpdateListener) {
5136 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5137 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5139 // Iterate over just the existing users of From. See the comments in
5140 // the ReplaceAllUsesWith above.
5141 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5142 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5146 // This node is about to morph, remove its old self from the CSE maps.
5147 RemoveNodeFromCSEMaps(User);
5149 // A user can appear in a use list multiple times, and when this
5150 // happens the uses are usually next to each other in the list.
5151 // To help reduce the number of CSE recomputations, process all
5152 // the uses of this user that we can find this way.
5154 SDUse &Use = UI.getUse();
5155 const SDValue &ToOp = To[Use.getResNo()];
5158 } while (UI != UE && *UI == User);
5160 // Now that we have modified User, add it back to the CSE maps. If it
5161 // already exists there, recursively merge the results together.
5162 AddModifiedNodeToCSEMaps(User, &Listener);
5166 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5167 /// uses of other values produced by From.getNode() alone. The Deleted
5168 /// vector is handled the same way as for ReplaceAllUsesWith.
5169 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5170 DAGUpdateListener *UpdateListener){
5171 // Handle the really simple, really trivial case efficiently.
5172 if (From == To) return;
5174 // Handle the simple, trivial, case efficiently.
5175 if (From.getNode()->getNumValues() == 1) {
5176 ReplaceAllUsesWith(From, To, UpdateListener);
5180 // Iterate over just the existing users of From. See the comments in
5181 // the ReplaceAllUsesWith above.
5182 SDNode::use_iterator UI = From.getNode()->use_begin(),
5183 UE = From.getNode()->use_end();
5184 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5187 bool UserRemovedFromCSEMaps = false;
5189 // A user can appear in a use list multiple times, and when this
5190 // happens the uses are usually next to each other in the list.
5191 // To help reduce the number of CSE recomputations, process all
5192 // the uses of this user that we can find this way.
5194 SDUse &Use = UI.getUse();
5196 // Skip uses of different values from the same node.
5197 if (Use.getResNo() != From.getResNo()) {
5202 // If this node hasn't been modified yet, it's still in the CSE maps,
5203 // so remove its old self from the CSE maps.
5204 if (!UserRemovedFromCSEMaps) {
5205 RemoveNodeFromCSEMaps(User);
5206 UserRemovedFromCSEMaps = true;
5211 } while (UI != UE && *UI == User);
5213 // We are iterating over all uses of the From node, so if a use
5214 // doesn't use the specific value, no changes are made.
5215 if (!UserRemovedFromCSEMaps)
5218 // Now that we have modified User, add it back to the CSE maps. If it
5219 // already exists there, recursively merge the results together.
5220 AddModifiedNodeToCSEMaps(User, &Listener);
5225 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5226 /// to record information about a use.
5233 /// operator< - Sort Memos by User.
5234 bool operator<(const UseMemo &L, const UseMemo &R) {
5235 return (intptr_t)L.User < (intptr_t)R.User;
5239 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5240 /// uses of other values produced by From.getNode() alone. The same value
5241 /// may appear in both the From and To list. The Deleted vector is
5242 /// handled the same way as for ReplaceAllUsesWith.
5243 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5246 DAGUpdateListener *UpdateListener){
5247 // Handle the simple, trivial case efficiently.
5249 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5251 // Read up all the uses and make records of them. This helps
5252 // processing new uses that are introduced during the
5253 // replacement process.
5254 SmallVector<UseMemo, 4> Uses;
5255 for (unsigned i = 0; i != Num; ++i) {
5256 unsigned FromResNo = From[i].getResNo();
5257 SDNode *FromNode = From[i].getNode();
5258 for (SDNode::use_iterator UI = FromNode->use_begin(),
5259 E = FromNode->use_end(); UI != E; ++UI) {
5260 SDUse &Use = UI.getUse();
5261 if (Use.getResNo() == FromResNo) {
5262 UseMemo Memo = { *UI, i, &Use };
5263 Uses.push_back(Memo);
5268 // Sort the uses, so that all the uses from a given User are together.
5269 std::sort(Uses.begin(), Uses.end());
5271 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5272 UseIndex != UseIndexEnd; ) {
5273 // We know that this user uses some value of From. If it is the right
5274 // value, update it.
5275 SDNode *User = Uses[UseIndex].User;
5277 // This node is about to morph, remove its old self from the CSE maps.
5278 RemoveNodeFromCSEMaps(User);
5280 // The Uses array is sorted, so all the uses for a given User
5281 // are next to each other in the list.
5282 // To help reduce the number of CSE recomputations, process all
5283 // the uses of this user that we can find this way.
5285 unsigned i = Uses[UseIndex].Index;
5286 SDUse &Use = *Uses[UseIndex].Use;
5290 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5292 // Now that we have modified User, add it back to the CSE maps. If it
5293 // already exists there, recursively merge the results together.
5294 AddModifiedNodeToCSEMaps(User, UpdateListener);
5298 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5299 /// based on their topological order. It returns the maximum id and a vector
5300 /// of the SDNodes* in assigned order by reference.
5301 unsigned SelectionDAG::AssignTopologicalOrder() {
5303 unsigned DAGSize = 0;
5305 // SortedPos tracks the progress of the algorithm. Nodes before it are
5306 // sorted, nodes after it are unsorted. When the algorithm completes
5307 // it is at the end of the list.
5308 allnodes_iterator SortedPos = allnodes_begin();
5310 // Visit all the nodes. Move nodes with no operands to the front of
5311 // the list immediately. Annotate nodes that do have operands with their
5312 // operand count. Before we do this, the Node Id fields of the nodes
5313 // may contain arbitrary values. After, the Node Id fields for nodes
5314 // before SortedPos will contain the topological sort index, and the
5315 // Node Id fields for nodes At SortedPos and after will contain the
5316 // count of outstanding operands.
5317 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5320 unsigned Degree = N->getNumOperands();
5322 // A node with no uses, add it to the result array immediately.
5323 N->setNodeId(DAGSize++);
5324 allnodes_iterator Q = N;
5326 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5327 assert(SortedPos != AllNodes.end() && "Overran node list");
5330 // Temporarily use the Node Id as scratch space for the degree count.
5331 N->setNodeId(Degree);
5335 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5336 // such that by the time the end is reached all nodes will be sorted.
5337 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5340 // N is in sorted position, so all its uses have one less operand
5341 // that needs to be sorted.
5342 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5345 unsigned Degree = P->getNodeId();
5346 assert(Degree != 0 && "Invalid node degree");
5349 // All of P's operands are sorted, so P may sorted now.
5350 P->setNodeId(DAGSize++);
5352 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5353 assert(SortedPos != AllNodes.end() && "Overran node list");
5356 // Update P's outstanding operand count.
5357 P->setNodeId(Degree);
5360 if (I == SortedPos) {
5363 dbgs() << "Overran sorted position:\n";
5366 llvm_unreachable(0);
5370 assert(SortedPos == AllNodes.end() &&
5371 "Topological sort incomplete!");
5372 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5373 "First node in topological sort is not the entry token!");
5374 assert(AllNodes.front().getNodeId() == 0 &&
5375 "First node in topological sort has non-zero id!");
5376 assert(AllNodes.front().getNumOperands() == 0 &&
5377 "First node in topological sort has operands!");
5378 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5379 "Last node in topologic sort has unexpected id!");
5380 assert(AllNodes.back().use_empty() &&
5381 "Last node in topologic sort has users!");
5382 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5386 /// AssignOrdering - Assign an order to the SDNode.
5387 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5388 assert(SD && "Trying to assign an order to a null node!");
5389 Ordering->add(SD, Order);
5392 /// GetOrdering - Get the order for the SDNode.
5393 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5394 assert(SD && "Trying to get the order of a null node!");
5395 return Ordering->getOrder(SD);
5398 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5399 /// value is produced by SD.
5400 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5401 DbgInfo->add(DB, SD, isParameter);
5403 SD->setHasDebugValue(true);
5406 //===----------------------------------------------------------------------===//
5408 //===----------------------------------------------------------------------===//
5410 HandleSDNode::~HandleSDNode() {
5414 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5415 const GlobalValue *GA,
5416 EVT VT, int64_t o, unsigned char TF)
5417 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5421 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5422 MachineMemOperand *mmo)
5423 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5424 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5425 MMO->isNonTemporal());
5426 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5427 assert(isNonTemporal() == MMO->isNonTemporal() &&
5428 "Non-temporal encoding error!");
5429 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5432 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5433 const SDValue *Ops, unsigned NumOps, EVT memvt,
5434 MachineMemOperand *mmo)
5435 : SDNode(Opc, dl, VTs, Ops, NumOps),
5436 MemoryVT(memvt), MMO(mmo) {
5437 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5438 MMO->isNonTemporal());
5439 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5440 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5443 /// Profile - Gather unique data for the node.
5445 void SDNode::Profile(FoldingSetNodeID &ID) const {
5446 AddNodeIDNode(ID, this);
5451 std::vector<EVT> VTs;
5454 VTs.reserve(MVT::LAST_VALUETYPE);
5455 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5456 VTs.push_back(MVT((MVT::SimpleValueType)i));
5461 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5462 static ManagedStatic<EVTArray> SimpleVTArray;
5463 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5465 /// getValueTypeList - Return a pointer to the specified value type.
5467 const EVT *SDNode::getValueTypeList(EVT VT) {
5468 if (VT.isExtended()) {
5469 sys::SmartScopedLock<true> Lock(*VTMutex);
5470 return &(*EVTs->insert(VT).first);
5472 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5473 "Value type out of range!");
5474 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5478 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5479 /// indicated value. This method ignores uses of other values defined by this
5481 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5482 assert(Value < getNumValues() && "Bad value!");
5484 // TODO: Only iterate over uses of a given value of the node
5485 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5486 if (UI.getUse().getResNo() == Value) {
5493 // Found exactly the right number of uses?
5498 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5499 /// value. This method ignores uses of other values defined by this operation.
5500 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5501 assert(Value < getNumValues() && "Bad value!");
5503 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5504 if (UI.getUse().getResNo() == Value)
5511 /// isOnlyUserOf - Return true if this node is the only use of N.
5513 bool SDNode::isOnlyUserOf(SDNode *N) const {
5515 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5526 /// isOperand - Return true if this node is an operand of N.
5528 bool SDValue::isOperandOf(SDNode *N) const {
5529 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5530 if (*this == N->getOperand(i))
5535 bool SDNode::isOperandOf(SDNode *N) const {
5536 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5537 if (this == N->OperandList[i].getNode())
5542 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5543 /// be a chain) reaches the specified operand without crossing any
5544 /// side-effecting instructions on any chain path. In practice, this looks
5545 /// through token factors and non-volatile loads. In order to remain efficient,
5546 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5547 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5548 unsigned Depth) const {
5549 if (*this == Dest) return true;
5551 // Don't search too deeply, we just want to be able to see through
5552 // TokenFactor's etc.
5553 if (Depth == 0) return false;
5555 // If this is a token factor, all inputs to the TF happen in parallel. If any
5556 // of the operands of the TF does not reach dest, then we cannot do the xform.
5557 if (getOpcode() == ISD::TokenFactor) {
5558 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5559 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5564 // Loads don't have side effects, look through them.
5565 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5566 if (!Ld->isVolatile())
5567 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5572 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5573 /// is either an operand of N or it can be reached by traversing up the operands.
5574 /// NOTE: this is an expensive method. Use it carefully.
5575 bool SDNode::isPredecessorOf(SDNode *N) const {
5576 SmallPtrSet<SDNode *, 32> Visited;
5577 SmallVector<SDNode *, 16> Worklist;
5578 Worklist.push_back(N);
5581 N = Worklist.pop_back_val();
5582 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5583 SDNode *Op = N->getOperand(i).getNode();
5586 if (Visited.insert(Op))
5587 Worklist.push_back(Op);
5589 } while (!Worklist.empty());
5594 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5595 assert(Num < NumOperands && "Invalid child # of SDNode!");
5596 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5599 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5600 switch (getOpcode()) {
5602 if (getOpcode() < ISD::BUILTIN_OP_END)
5603 return "<<Unknown DAG Node>>";
5604 if (isMachineOpcode()) {
5606 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5607 if (getMachineOpcode() < TII->getNumOpcodes())
5608 return TII->get(getMachineOpcode()).getName();
5609 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5612 const TargetLowering &TLI = G->getTargetLoweringInfo();
5613 const char *Name = TLI.getTargetNodeName(getOpcode());
5614 if (Name) return Name;
5615 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5617 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5620 case ISD::DELETED_NODE:
5621 return "<<Deleted Node!>>";
5623 case ISD::PREFETCH: return "Prefetch";
5624 case ISD::MEMBARRIER: return "MemBarrier";
5625 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5626 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5627 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5628 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5629 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5630 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5631 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5632 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5633 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5634 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5635 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5636 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5637 case ISD::PCMARKER: return "PCMarker";
5638 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5639 case ISD::SRCVALUE: return "SrcValue";
5640 case ISD::MDNODE_SDNODE: return "MDNode";
5641 case ISD::EntryToken: return "EntryToken";
5642 case ISD::TokenFactor: return "TokenFactor";
5643 case ISD::AssertSext: return "AssertSext";
5644 case ISD::AssertZext: return "AssertZext";
5646 case ISD::BasicBlock: return "BasicBlock";
5647 case ISD::VALUETYPE: return "ValueType";
5648 case ISD::Register: return "Register";
5650 case ISD::Constant: return "Constant";
5651 case ISD::ConstantFP: return "ConstantFP";
5652 case ISD::GlobalAddress: return "GlobalAddress";
5653 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5654 case ISD::FrameIndex: return "FrameIndex";
5655 case ISD::JumpTable: return "JumpTable";
5656 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5657 case ISD::RETURNADDR: return "RETURNADDR";
5658 case ISD::FRAMEADDR: return "FRAMEADDR";
5659 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5660 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5661 case ISD::LSDAADDR: return "LSDAADDR";
5662 case ISD::EHSELECTION: return "EHSELECTION";
5663 case ISD::EH_RETURN: return "EH_RETURN";
5664 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5665 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5666 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5667 case ISD::ConstantPool: return "ConstantPool";
5668 case ISD::ExternalSymbol: return "ExternalSymbol";
5669 case ISD::BlockAddress: return "BlockAddress";
5670 case ISD::INTRINSIC_WO_CHAIN:
5671 case ISD::INTRINSIC_VOID:
5672 case ISD::INTRINSIC_W_CHAIN: {
5673 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5674 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5675 if (IID < Intrinsic::num_intrinsics)
5676 return Intrinsic::getName((Intrinsic::ID)IID);
5677 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5678 return TII->getName(IID);
5679 llvm_unreachable("Invalid intrinsic ID");
5682 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5683 case ISD::TargetConstant: return "TargetConstant";
5684 case ISD::TargetConstantFP:return "TargetConstantFP";
5685 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5686 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5687 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5688 case ISD::TargetJumpTable: return "TargetJumpTable";
5689 case ISD::TargetConstantPool: return "TargetConstantPool";
5690 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5691 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5693 case ISD::CopyToReg: return "CopyToReg";
5694 case ISD::CopyFromReg: return "CopyFromReg";
5695 case ISD::UNDEF: return "undef";
5696 case ISD::MERGE_VALUES: return "merge_values";
5697 case ISD::INLINEASM: return "inlineasm";
5698 case ISD::EH_LABEL: return "eh_label";
5699 case ISD::HANDLENODE: return "handlenode";
5702 case ISD::FABS: return "fabs";
5703 case ISD::FNEG: return "fneg";
5704 case ISD::FSQRT: return "fsqrt";
5705 case ISD::FSIN: return "fsin";
5706 case ISD::FCOS: return "fcos";
5707 case ISD::FTRUNC: return "ftrunc";
5708 case ISD::FFLOOR: return "ffloor";
5709 case ISD::FCEIL: return "fceil";
5710 case ISD::FRINT: return "frint";
5711 case ISD::FNEARBYINT: return "fnearbyint";
5712 case ISD::FEXP: return "fexp";
5713 case ISD::FEXP2: return "fexp2";
5714 case ISD::FLOG: return "flog";
5715 case ISD::FLOG2: return "flog2";
5716 case ISD::FLOG10: return "flog10";
5719 case ISD::ADD: return "add";
5720 case ISD::SUB: return "sub";
5721 case ISD::MUL: return "mul";
5722 case ISD::MULHU: return "mulhu";
5723 case ISD::MULHS: return "mulhs";
5724 case ISD::SDIV: return "sdiv";
5725 case ISD::UDIV: return "udiv";
5726 case ISD::SREM: return "srem";
5727 case ISD::UREM: return "urem";
5728 case ISD::SMUL_LOHI: return "smul_lohi";
5729 case ISD::UMUL_LOHI: return "umul_lohi";
5730 case ISD::SDIVREM: return "sdivrem";
5731 case ISD::UDIVREM: return "udivrem";
5732 case ISD::AND: return "and";
5733 case ISD::OR: return "or";
5734 case ISD::XOR: return "xor";
5735 case ISD::SHL: return "shl";
5736 case ISD::SRA: return "sra";
5737 case ISD::SRL: return "srl";
5738 case ISD::ROTL: return "rotl";
5739 case ISD::ROTR: return "rotr";
5740 case ISD::FADD: return "fadd";
5741 case ISD::FSUB: return "fsub";
5742 case ISD::FMUL: return "fmul";
5743 case ISD::FDIV: return "fdiv";
5744 case ISD::FREM: return "frem";
5745 case ISD::FCOPYSIGN: return "fcopysign";
5746 case ISD::FGETSIGN: return "fgetsign";
5747 case ISD::FPOW: return "fpow";
5749 case ISD::FPOWI: return "fpowi";
5750 case ISD::SETCC: return "setcc";
5751 case ISD::VSETCC: return "vsetcc";
5752 case ISD::SELECT: return "select";
5753 case ISD::SELECT_CC: return "select_cc";
5754 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5755 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5756 case ISD::CONCAT_VECTORS: return "concat_vectors";
5757 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5758 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5759 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5760 case ISD::CARRY_FALSE: return "carry_false";
5761 case ISD::ADDC: return "addc";
5762 case ISD::ADDE: return "adde";
5763 case ISD::SADDO: return "saddo";
5764 case ISD::UADDO: return "uaddo";
5765 case ISD::SSUBO: return "ssubo";
5766 case ISD::USUBO: return "usubo";
5767 case ISD::SMULO: return "smulo";
5768 case ISD::UMULO: return "umulo";
5769 case ISD::SUBC: return "subc";
5770 case ISD::SUBE: return "sube";
5771 case ISD::SHL_PARTS: return "shl_parts";
5772 case ISD::SRA_PARTS: return "sra_parts";
5773 case ISD::SRL_PARTS: return "srl_parts";
5775 // Conversion operators.
5776 case ISD::SIGN_EXTEND: return "sign_extend";
5777 case ISD::ZERO_EXTEND: return "zero_extend";
5778 case ISD::ANY_EXTEND: return "any_extend";
5779 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5780 case ISD::TRUNCATE: return "truncate";
5781 case ISD::FP_ROUND: return "fp_round";
5782 case ISD::FLT_ROUNDS_: return "flt_rounds";
5783 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5784 case ISD::FP_EXTEND: return "fp_extend";
5786 case ISD::SINT_TO_FP: return "sint_to_fp";
5787 case ISD::UINT_TO_FP: return "uint_to_fp";
5788 case ISD::FP_TO_SINT: return "fp_to_sint";
5789 case ISD::FP_TO_UINT: return "fp_to_uint";
5790 case ISD::BITCAST: return "bit_convert";
5791 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5792 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5794 case ISD::CONVERT_RNDSAT: {
5795 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5796 default: llvm_unreachable("Unknown cvt code!");
5797 case ISD::CVT_FF: return "cvt_ff";
5798 case ISD::CVT_FS: return "cvt_fs";
5799 case ISD::CVT_FU: return "cvt_fu";
5800 case ISD::CVT_SF: return "cvt_sf";
5801 case ISD::CVT_UF: return "cvt_uf";
5802 case ISD::CVT_SS: return "cvt_ss";
5803 case ISD::CVT_SU: return "cvt_su";
5804 case ISD::CVT_US: return "cvt_us";
5805 case ISD::CVT_UU: return "cvt_uu";
5809 // Control flow instructions
5810 case ISD::BR: return "br";
5811 case ISD::BRIND: return "brind";
5812 case ISD::BR_JT: return "br_jt";
5813 case ISD::BRCOND: return "brcond";
5814 case ISD::BR_CC: return "br_cc";
5815 case ISD::CALLSEQ_START: return "callseq_start";
5816 case ISD::CALLSEQ_END: return "callseq_end";
5819 case ISD::LOAD: return "load";
5820 case ISD::STORE: return "store";
5821 case ISD::VAARG: return "vaarg";
5822 case ISD::VACOPY: return "vacopy";
5823 case ISD::VAEND: return "vaend";
5824 case ISD::VASTART: return "vastart";
5825 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5826 case ISD::EXTRACT_ELEMENT: return "extract_element";
5827 case ISD::BUILD_PAIR: return "build_pair";
5828 case ISD::STACKSAVE: return "stacksave";
5829 case ISD::STACKRESTORE: return "stackrestore";
5830 case ISD::TRAP: return "trap";
5833 case ISD::BSWAP: return "bswap";
5834 case ISD::CTPOP: return "ctpop";
5835 case ISD::CTTZ: return "cttz";
5836 case ISD::CTLZ: return "ctlz";
5839 case ISD::TRAMPOLINE: return "trampoline";
5842 switch (cast<CondCodeSDNode>(this)->get()) {
5843 default: llvm_unreachable("Unknown setcc condition!");
5844 case ISD::SETOEQ: return "setoeq";
5845 case ISD::SETOGT: return "setogt";
5846 case ISD::SETOGE: return "setoge";
5847 case ISD::SETOLT: return "setolt";
5848 case ISD::SETOLE: return "setole";
5849 case ISD::SETONE: return "setone";
5851 case ISD::SETO: return "seto";
5852 case ISD::SETUO: return "setuo";
5853 case ISD::SETUEQ: return "setue";
5854 case ISD::SETUGT: return "setugt";
5855 case ISD::SETUGE: return "setuge";
5856 case ISD::SETULT: return "setult";
5857 case ISD::SETULE: return "setule";
5858 case ISD::SETUNE: return "setune";
5860 case ISD::SETEQ: return "seteq";
5861 case ISD::SETGT: return "setgt";
5862 case ISD::SETGE: return "setge";
5863 case ISD::SETLT: return "setlt";
5864 case ISD::SETLE: return "setle";
5865 case ISD::SETNE: return "setne";
5870 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5879 return "<post-inc>";
5881 return "<post-dec>";
5885 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5886 std::string S = "< ";
5900 if (getByValAlign())
5901 S += "byval-align:" + utostr(getByValAlign()) + " ";
5903 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5905 S += "byval-size:" + utostr(getByValSize()) + " ";
5909 void SDNode::dump() const { dump(0); }
5910 void SDNode::dump(const SelectionDAG *G) const {
5915 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5916 OS << (void*)this << ": ";
5918 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5920 if (getValueType(i) == MVT::Other)
5923 OS << getValueType(i).getEVTString();
5925 OS << " = " << getOperationName(G);
5928 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5929 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5930 if (!MN->memoperands_empty()) {
5933 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5934 e = MN->memoperands_end(); i != e; ++i) {
5936 if (llvm::next(i) != e)
5941 } else if (const ShuffleVectorSDNode *SVN =
5942 dyn_cast<ShuffleVectorSDNode>(this)) {
5944 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5945 int Idx = SVN->getMaskElt(i);
5953 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5954 OS << '<' << CSDN->getAPIntValue() << '>';
5955 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5956 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5957 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5958 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5959 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5962 CSDN->getValueAPF().bitcastToAPInt().dump();
5965 } else if (const GlobalAddressSDNode *GADN =
5966 dyn_cast<GlobalAddressSDNode>(this)) {
5967 int64_t offset = GADN->getOffset();
5969 WriteAsOperand(OS, GADN->getGlobal());
5972 OS << " + " << offset;
5974 OS << " " << offset;
5975 if (unsigned int TF = GADN->getTargetFlags())
5976 OS << " [TF=" << TF << ']';
5977 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5978 OS << "<" << FIDN->getIndex() << ">";
5979 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5980 OS << "<" << JTDN->getIndex() << ">";
5981 if (unsigned int TF = JTDN->getTargetFlags())
5982 OS << " [TF=" << TF << ']';
5983 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5984 int offset = CP->getOffset();
5985 if (CP->isMachineConstantPoolEntry())
5986 OS << "<" << *CP->getMachineCPVal() << ">";
5988 OS << "<" << *CP->getConstVal() << ">";
5990 OS << " + " << offset;
5992 OS << " " << offset;
5993 if (unsigned int TF = CP->getTargetFlags())
5994 OS << " [TF=" << TF << ']';
5995 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5997 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5999 OS << LBB->getName() << " ";
6000 OS << (const void*)BBDN->getBasicBlock() << ">";
6001 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6002 if (G && R->getReg() &&
6003 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
6004 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
6006 OS << " %reg" << R->getReg();
6008 } else if (const ExternalSymbolSDNode *ES =
6009 dyn_cast<ExternalSymbolSDNode>(this)) {
6010 OS << "'" << ES->getSymbol() << "'";
6011 if (unsigned int TF = ES->getTargetFlags())
6012 OS << " [TF=" << TF << ']';
6013 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6015 OS << "<" << M->getValue() << ">";
6018 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6020 OS << "<" << MD->getMD() << ">";
6023 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6024 OS << ":" << N->getVT().getEVTString();
6026 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6027 OS << "<" << *LD->getMemOperand();
6030 switch (LD->getExtensionType()) {
6031 default: doExt = false; break;
6032 case ISD::EXTLOAD: OS << ", anyext"; break;
6033 case ISD::SEXTLOAD: OS << ", sext"; break;
6034 case ISD::ZEXTLOAD: OS << ", zext"; break;
6037 OS << " from " << LD->getMemoryVT().getEVTString();
6039 const char *AM = getIndexedModeName(LD->getAddressingMode());
6044 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6045 OS << "<" << *ST->getMemOperand();
6047 if (ST->isTruncatingStore())
6048 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6050 const char *AM = getIndexedModeName(ST->getAddressingMode());
6055 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6056 OS << "<" << *M->getMemOperand() << ">";
6057 } else if (const BlockAddressSDNode *BA =
6058 dyn_cast<BlockAddressSDNode>(this)) {
6060 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6062 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6064 if (unsigned int TF = BA->getTargetFlags())
6065 OS << " [TF=" << TF << ']';
6069 if (unsigned Order = G->GetOrdering(this))
6070 OS << " [ORD=" << Order << ']';
6072 if (getNodeId() != -1)
6073 OS << " [ID=" << getNodeId() << ']';
6075 DebugLoc dl = getDebugLoc();
6076 if (G && !dl.isUnknown()) {
6078 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6080 // Omit the directory, since it's usually long and uninteresting.
6082 OS << Scope.getFilename();
6085 OS << ':' << dl.getLine();
6086 if (dl.getCol() != 0)
6087 OS << ':' << dl.getCol();
6091 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6093 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6094 if (i) OS << ", "; else OS << " ";
6095 OS << (void*)getOperand(i).getNode();
6096 if (unsigned RN = getOperand(i).getResNo())
6099 print_details(OS, G);
6102 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6103 const SelectionDAG *G, unsigned depth,
6116 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6118 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6122 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6123 unsigned depth) const {
6124 printrWithDepthHelper(OS, this, G, depth, 0);
6127 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6128 // Don't print impossibly deep things.
6129 printrWithDepth(OS, G, 100);
6132 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6133 printrWithDepth(dbgs(), G, depth);
6136 void SDNode::dumprFull(const SelectionDAG *G) const {
6137 // Don't print impossibly deep things.
6138 dumprWithDepth(G, 100);
6141 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6142 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6143 if (N->getOperand(i).getNode()->hasOneUse())
6144 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6146 dbgs() << "\n" << std::string(indent+2, ' ')
6147 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6151 dbgs().indent(indent);
6155 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6156 assert(N->getNumValues() == 1 &&
6157 "Can't unroll a vector with multiple results!");
6159 EVT VT = N->getValueType(0);
6160 unsigned NE = VT.getVectorNumElements();
6161 EVT EltVT = VT.getVectorElementType();
6162 DebugLoc dl = N->getDebugLoc();
6164 SmallVector<SDValue, 8> Scalars;
6165 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6167 // If ResNE is 0, fully unroll the vector op.
6170 else if (NE > ResNE)
6174 for (i= 0; i != NE; ++i) {
6175 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6176 SDValue Operand = N->getOperand(j);
6177 EVT OperandVT = Operand.getValueType();
6178 if (OperandVT.isVector()) {
6179 // A vector operand; extract a single element.
6180 EVT OperandEltVT = OperandVT.getVectorElementType();
6181 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6184 getConstant(i, MVT::i32));
6186 // A scalar operand; just use it as is.
6187 Operands[j] = Operand;
6191 switch (N->getOpcode()) {
6193 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6194 &Operands[0], Operands.size()));
6201 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6202 getShiftAmountOperand(Operands[1])));
6204 case ISD::SIGN_EXTEND_INREG:
6205 case ISD::FP_ROUND_INREG: {
6206 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6207 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6209 getValueType(ExtVT)));
6214 for (; i < ResNE; ++i)
6215 Scalars.push_back(getUNDEF(EltVT));
6217 return getNode(ISD::BUILD_VECTOR, dl,
6218 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6219 &Scalars[0], Scalars.size());
6223 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6224 /// location that is 'Dist' units away from the location that the 'Base' load
6225 /// is loading from.
6226 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6227 unsigned Bytes, int Dist) const {
6228 if (LD->getChain() != Base->getChain())
6230 EVT VT = LD->getValueType(0);
6231 if (VT.getSizeInBits() / 8 != Bytes)
6234 SDValue Loc = LD->getOperand(1);
6235 SDValue BaseLoc = Base->getOperand(1);
6236 if (Loc.getOpcode() == ISD::FrameIndex) {
6237 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6239 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6240 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6241 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6242 int FS = MFI->getObjectSize(FI);
6243 int BFS = MFI->getObjectSize(BFI);
6244 if (FS != BFS || FS != (int)Bytes) return false;
6245 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6247 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6248 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6249 if (V && (V->getSExtValue() == Dist*Bytes))
6253 const GlobalValue *GV1 = NULL;
6254 const GlobalValue *GV2 = NULL;
6255 int64_t Offset1 = 0;
6256 int64_t Offset2 = 0;
6257 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6258 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6259 if (isGA1 && isGA2 && GV1 == GV2)
6260 return Offset1 == (Offset2 + Dist*Bytes);
6265 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6266 /// it cannot be inferred.
6267 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6268 // If this is a GlobalAddress + cst, return the alignment.
6269 const GlobalValue *GV;
6270 int64_t GVOffset = 0;
6271 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6272 // If GV has specified alignment, then use it. Otherwise, use the preferred
6274 unsigned Align = GV->getAlignment();
6276 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6277 if (GVar->hasInitializer()) {
6278 const TargetData *TD = TLI.getTargetData();
6279 Align = TD->getPreferredAlignment(GVar);
6283 return MinAlign(Align, GVOffset);
6286 // If this is a direct reference to a stack slot, use information about the
6287 // stack slot's alignment.
6288 int FrameIdx = 1 << 31;
6289 int64_t FrameOffset = 0;
6290 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6291 FrameIdx = FI->getIndex();
6292 } else if (Ptr.getOpcode() == ISD::ADD &&
6293 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6294 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6295 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6296 FrameOffset = Ptr.getConstantOperandVal(1);
6299 if (FrameIdx != (1 << 31)) {
6300 // FIXME: Handle FI+CST.
6301 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6302 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6310 void SelectionDAG::dump() const {
6311 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6313 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6315 const SDNode *N = I;
6316 if (!N->hasOneUse() && N != getRoot().getNode())
6317 DumpNodes(N, 2, this);
6320 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6325 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6327 print_details(OS, G);
6330 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6331 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6332 const SelectionDAG *G, VisitedSDNodeSet &once) {
6333 if (!once.insert(N)) // If we've been here before, return now.
6336 // Dump the current SDNode, but don't end the line yet.
6337 OS << std::string(indent, ' ');
6340 // Having printed this SDNode, walk the children:
6341 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6342 const SDNode *child = N->getOperand(i).getNode();
6347 if (child->getNumOperands() == 0) {
6348 // This child has no grandchildren; print it inline right here.
6349 child->printr(OS, G);
6351 } else { // Just the address. FIXME: also print the child's opcode.
6353 if (unsigned RN = N->getOperand(i).getResNo())
6360 // Dump children that have grandchildren on their own line(s).
6361 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6362 const SDNode *child = N->getOperand(i).getNode();
6363 DumpNodesr(OS, child, indent+2, G, once);
6367 void SDNode::dumpr() const {
6368 VisitedSDNodeSet once;
6369 DumpNodesr(dbgs(), this, 0, 0, once);
6372 void SDNode::dumpr(const SelectionDAG *G) const {
6373 VisitedSDNodeSet once;
6374 DumpNodesr(dbgs(), this, 0, G, once);
6378 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6379 unsigned GlobalAddressSDNode::getAddressSpace() const {
6380 return getGlobal()->getType()->getAddressSpace();
6384 const Type *ConstantPoolSDNode::getType() const {
6385 if (isMachineConstantPoolEntry())
6386 return Val.MachineCPVal->getType();
6387 return Val.ConstVal->getType();
6390 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6392 unsigned &SplatBitSize,
6394 unsigned MinSplatBits,
6396 EVT VT = getValueType(0);
6397 assert(VT.isVector() && "Expected a vector type");
6398 unsigned sz = VT.getSizeInBits();
6399 if (MinSplatBits > sz)
6402 SplatValue = APInt(sz, 0);
6403 SplatUndef = APInt(sz, 0);
6405 // Get the bits. Bits with undefined values (when the corresponding element
6406 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6407 // in SplatValue. If any of the values are not constant, give up and return
6409 unsigned int nOps = getNumOperands();
6410 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6411 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6413 for (unsigned j = 0; j < nOps; ++j) {
6414 unsigned i = isBigEndian ? nOps-1-j : j;
6415 SDValue OpVal = getOperand(i);
6416 unsigned BitPos = j * EltBitSize;
6418 if (OpVal.getOpcode() == ISD::UNDEF)
6419 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6420 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6421 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6422 zextOrTrunc(sz) << BitPos;
6423 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6424 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6429 // The build_vector is all constants or undefs. Find the smallest element
6430 // size that splats the vector.
6432 HasAnyUndefs = (SplatUndef != 0);
6435 unsigned HalfSize = sz / 2;
6436 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6437 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6438 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6439 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6441 // If the two halves do not match (ignoring undef bits), stop here.
6442 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6443 MinSplatBits > HalfSize)
6446 SplatValue = HighValue | LowValue;
6447 SplatUndef = HighUndef & LowUndef;
6456 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6457 // Find the first non-undef value in the shuffle mask.
6459 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6462 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6464 // Make sure all remaining elements are either undef or the same as the first
6466 for (int Idx = Mask[i]; i != e; ++i)
6467 if (Mask[i] >= 0 && Mask[i] != Idx)
6473 static void checkForCyclesHelper(const SDNode *N,
6474 SmallPtrSet<const SDNode*, 32> &Visited,
6475 SmallPtrSet<const SDNode*, 32> &Checked) {
6476 // If this node has already been checked, don't check it again.
6477 if (Checked.count(N))
6480 // If a node has already been visited on this depth-first walk, reject it as
6482 if (!Visited.insert(N)) {
6483 dbgs() << "Offending node:\n";
6485 errs() << "Detected cycle in SelectionDAG\n";
6489 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6490 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6497 void llvm::checkForCycles(const llvm::SDNode *N) {
6499 assert(N && "Checking nonexistant SDNode");
6500 SmallPtrSet<const SDNode*, 32> visited;
6501 SmallPtrSet<const SDNode*, 32> checked;
6502 checkForCyclesHelper(N, visited, checked);
6506 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6507 checkForCycles(DAG->getRoot().getNode());