1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getAddressingMode());
433 ID.AddInteger(LD->getExtensionType());
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawFlags());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getAddressingMode());
441 ID.AddInteger(ST->isTruncatingStore());
442 ID.AddInteger(ST->getMemoryVT().getRawBits());
443 ID.AddInteger(ST->getRawFlags());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX: {
458 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
459 ID.AddInteger(AT->getRawFlags());
462 } // end switch (N->getOpcode())
465 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
467 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
468 AddNodeIDOpcode(ID, N->getOpcode());
469 // Add the return value info.
470 AddNodeIDValueTypes(ID, N->getVTList());
471 // Add the operand info.
472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
474 // Handle SDNode leafs with special info.
475 AddNodeIDCustom(ID, N);
478 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
479 /// the CSE map that carries both alignment and volatility information.
481 static inline unsigned
482 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
483 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 case ISD::DBG_STOPPOINT:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Flag)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
600 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
601 /// correspond to it. This is useful when we're about to delete or repurpose
602 /// the node. We don't want future request for structurally identical nodes
603 /// to return N anymore.
604 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
606 switch (N->getOpcode()) {
607 case ISD::EntryToken:
608 assert(0 && "EntryToken should not be in CSEMaps!");
610 case ISD::HANDLENODE: return false; // noop.
612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
613 "Cond code doesn't exist!");
614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
617 case ISD::ExternalSymbol:
618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
620 case ISD::TargetExternalSymbol:
622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624 case ISD::VALUETYPE: {
625 MVT VT = cast<VTSDNode>(N)->getVT();
626 if (VT.isExtended()) {
627 Erased = ExtendedValueTypeNodes.erase(VT);
629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
630 ValueTypeNodes[VT.getSimpleVT()] = 0;
635 // Remove it from the CSE Map.
636 Erased = CSEMap.RemoveNode(N);
640 // Verify that the node was actually in one of the CSE maps, unless it has a
641 // flag result (which cannot be CSE'd) or is one of the special cases that are
642 // not subject to CSE.
643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
644 !N->isMachineOpcode() && !doNotCSE(N)) {
647 assert(0 && "Node is not in map!");
653 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
654 /// maps and modified in place. Add it back to the CSE maps, unless an identical
655 /// node already exists, in which case transfer all its users to the existing
656 /// node. This transfer can potentially trigger recursive merging.
659 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
660 DAGUpdateListener *UpdateListener) {
661 // For node types that aren't CSE'd, just act as if no identical node
664 SDNode *Existing = CSEMap.GetOrInsertNode(N);
666 // If there was already an existing matching node, use ReplaceAllUsesWith
667 // to replace the dead one with the existing one. This can cause
668 // recursive merging of other unrelated nodes down the line.
669 ReplaceAllUsesWith(N, Existing, UpdateListener);
671 // N is now dead. Inform the listener if it exists and delete it.
673 UpdateListener->NodeDeleted(N, Existing);
674 DeleteNodeNotInCSEMaps(N);
679 // If the node doesn't already exist, we updated it. Inform a listener if
682 UpdateListener->NodeUpdated(N);
685 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
686 /// were replaced with those specified. If this node is never memoized,
687 /// return null, otherwise return a pointer to the slot it would take. If a
688 /// node already exists with these operands, the slot will be non-null.
689 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
694 SDValue Ops[] = { Op };
696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
697 AddNodeIDCustom(ID, N);
698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
706 SDValue Op1, SDValue Op2,
711 SDValue Ops[] = { Op1, Op2 };
713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
714 AddNodeIDCustom(ID, N);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
720 /// were replaced with those specified. If this node is never memoized,
721 /// return null, otherwise return a pointer to the slot it would take. If a
722 /// node already exists with these operands, the slot will be non-null.
723 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
724 const SDValue *Ops,unsigned NumOps,
730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
731 AddNodeIDCustom(ID, N);
732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
736 void SelectionDAG::VerifyNode(SDNode *N) {
737 switch (N->getOpcode()) {
740 case ISD::BUILD_PAIR: {
741 MVT VT = N->getValueType(0);
742 assert(N->getNumValues() == 1 && "Too many results!");
743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
744 "Wrong return type!");
745 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
747 "Mismatched operand types!");
748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
749 "Wrong operand type!");
750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
751 "Wrong return type size");
754 case ISD::BUILD_VECTOR: {
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(N->getValueType(0).isVector() && "Wrong return type!");
757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
758 "Wrong number of operands!");
759 // FIXME: Change vector_shuffle to a variadic node with mask elements being
760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
761 // operand, and it is not always possible to legalize it. Turning off the
762 // following checks at least makes it possible to legalize most of the time.
763 // MVT EltVT = N->getValueType(0).getVectorElementType();
764 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
765 // assert(I->getValueType() == EltVT &&
766 // "Wrong operand type!");
772 /// getMVTAlignment - Compute the default alignment value for the
775 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
776 const Type *Ty = VT == MVT::iPTR ?
777 PointerType::get(Type::Int8Ty, 0) :
780 return TLI.getTargetData()->getABITypeAlignment(Ty);
783 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
784 : TLI(tli), FLI(fli),
785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
786 Root(getEntryNode()) {
787 AllNodes.push_back(&EntryNode);
790 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
797 SelectionDAG::~SelectionDAG() {
801 void SelectionDAG::allnodes_clear() {
802 assert(&*AllNodes.begin() == &EntryNode);
803 AllNodes.remove(AllNodes.begin());
804 while (!AllNodes.empty())
805 DeallocateNode(AllNodes.begin());
808 void SelectionDAG::clear() {
810 OperandAllocator.Reset();
813 ExtendedValueTypeNodes.clear();
814 ExternalSymbols.clear();
815 TargetExternalSymbols.clear();
816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
817 static_cast<CondCodeSDNode*>(0));
818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
819 static_cast<SDNode*>(0));
821 EntryNode.UseList = 0;
822 AllNodes.push_back(&EntryNode);
823 Root = getEntryNode();
826 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
827 if (Op.getValueType() == VT) return Op;
828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
830 return getNode(ISD::AND, Op.getValueType(), Op,
831 getConstant(Imm, Op.getValueType()));
834 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
836 SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) {
839 MVT EltVT = VT.getVectorElementType();
840 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT);
841 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
842 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size());
844 NegOne = getConstant(VT.getIntegerVTBitMask(), VT);
846 return getNode(ISD::XOR, VT, Val, NegOne);
849 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
850 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
851 assert((EltVT.getSizeInBits() >= 64 ||
852 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
853 "getConstant with a uint64_t value that doesn't fit in the type!");
854 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
857 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
858 return getConstant(*ConstantInt::get(Val), VT, isT);
861 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
862 assert(VT.isInteger() && "Cannot create FP integer constant!");
864 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
865 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
866 "APInt size does not match type size!");
868 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
870 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
874 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
876 return SDValue(N, 0);
878 N = NodeAllocator.Allocate<ConstantSDNode>();
879 new (N) ConstantSDNode(isT, &Val, EltVT);
880 CSEMap.InsertNode(N, IP);
881 AllNodes.push_back(N);
884 SDValue Result(N, 0);
886 SmallVector<SDValue, 8> Ops;
887 Ops.assign(VT.getVectorNumElements(), Result);
888 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
893 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
894 return getConstant(Val, TLI.getPointerTy(), isTarget);
898 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
899 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
902 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
903 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
906 VT.isVector() ? VT.getVectorElementType() : VT;
908 // Do the map lookup using the actual bit pattern for the floating point
909 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
910 // we don't have issues with SNANs.
911 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
913 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
917 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
919 return SDValue(N, 0);
921 N = NodeAllocator.Allocate<ConstantFPSDNode>();
922 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
923 CSEMap.InsertNode(N, IP);
924 AllNodes.push_back(N);
927 SDValue Result(N, 0);
929 SmallVector<SDValue, 8> Ops;
930 Ops.assign(VT.getVectorNumElements(), Result);
931 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
936 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
938 VT.isVector() ? VT.getVectorElementType() : VT;
940 return getConstantFP(APFloat((float)Val), VT, isTarget);
942 return getConstantFP(APFloat(Val), VT, isTarget);
945 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
946 MVT VT, int64_t Offset,
950 // Truncate (with sign-extension) the offset value to the pointer size.
951 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
953 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
955 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
957 // If GV is an alias then use the aliasee for determining thread-localness.
958 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
959 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
962 if (GVar && GVar->isThreadLocal())
963 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
965 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
968 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
970 ID.AddInteger(Offset);
972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
973 return SDValue(E, 0);
974 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
975 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
976 CSEMap.InsertNode(N, IP);
977 AllNodes.push_back(N);
978 return SDValue(N, 0);
981 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
982 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
988 return SDValue(E, 0);
989 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
990 new (N) FrameIndexSDNode(FI, VT, isTarget);
991 CSEMap.InsertNode(N, IP);
992 AllNodes.push_back(N);
993 return SDValue(N, 0);
996 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
997 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1003 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1005 new (N) JumpTableSDNode(JTI, VT, isTarget);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1012 unsigned Alignment, int Offset,
1016 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1017 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1018 FoldingSetNodeID ID;
1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1020 ID.AddInteger(Alignment);
1021 ID.AddInteger(Offset);
1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1025 return SDValue(E, 0);
1026 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1027 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1028 CSEMap.InsertNode(N, IP);
1029 AllNodes.push_back(N);
1030 return SDValue(N, 0);
1034 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1035 unsigned Alignment, int Offset,
1039 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1040 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1041 FoldingSetNodeID ID;
1042 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1043 ID.AddInteger(Alignment);
1044 ID.AddInteger(Offset);
1045 C->AddSelectionDAGCSEId(ID);
1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1048 return SDValue(E, 0);
1049 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1050 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1051 CSEMap.InsertNode(N, IP);
1052 AllNodes.push_back(N);
1053 return SDValue(N, 0);
1057 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1058 FoldingSetNodeID ID;
1059 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1063 return SDValue(E, 0);
1064 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1065 new (N) BasicBlockSDNode(MBB);
1066 CSEMap.InsertNode(N, IP);
1067 AllNodes.push_back(N);
1068 return SDValue(N, 0);
1071 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1072 FoldingSetNodeID ID;
1073 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1074 ID.AddInteger(Flags.getRawBits());
1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1077 return SDValue(E, 0);
1078 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1079 new (N) ARG_FLAGSSDNode(Flags);
1080 CSEMap.InsertNode(N, IP);
1081 AllNodes.push_back(N);
1082 return SDValue(N, 0);
1085 SDValue SelectionDAG::getValueType(MVT VT) {
1086 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1087 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1089 SDNode *&N = VT.isExtended() ?
1090 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1092 if (N) return SDValue(N, 0);
1093 N = NodeAllocator.Allocate<VTSDNode>();
1094 new (N) VTSDNode(VT);
1095 AllNodes.push_back(N);
1096 return SDValue(N, 0);
1099 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1100 SDNode *&N = ExternalSymbols[Sym];
1101 if (N) return SDValue(N, 0);
1102 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1103 new (N) ExternalSymbolSDNode(false, Sym, VT);
1104 AllNodes.push_back(N);
1105 return SDValue(N, 0);
1108 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1109 SDNode *&N = TargetExternalSymbols[Sym];
1110 if (N) return SDValue(N, 0);
1111 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1112 new (N) ExternalSymbolSDNode(true, Sym, VT);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1118 if ((unsigned)Cond >= CondCodeNodes.size())
1119 CondCodeNodes.resize(Cond+1);
1121 if (CondCodeNodes[Cond] == 0) {
1122 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1123 new (N) CondCodeSDNode(Cond);
1124 CondCodeNodes[Cond] = N;
1125 AllNodes.push_back(N);
1127 return SDValue(CondCodeNodes[Cond], 0);
1130 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1131 SDValue STy, SDValue Rnd, SDValue Sat,
1132 ISD::CvtCode Code) {
1133 // If the src and dest types are the same, no conversion is necessary.
1137 FoldingSetNodeID ID;
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1141 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1142 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1143 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1150 FoldingSetNodeID ID;
1151 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1152 ID.AddInteger(RegNo);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1156 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1157 new (N) RegisterSDNode(RegNo, VT);
1158 CSEMap.InsertNode(N, IP);
1159 AllNodes.push_back(N);
1160 return SDValue(N, 0);
1163 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1164 unsigned Line, unsigned Col,
1166 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1167 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1168 AllNodes.push_back(N);
1169 return SDValue(N, 0);
1172 SDValue SelectionDAG::getLabel(unsigned Opcode,
1175 FoldingSetNodeID ID;
1176 SDValue Ops[] = { Root };
1177 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1178 ID.AddInteger(LabelID);
1180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1181 return SDValue(E, 0);
1182 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1183 new (N) LabelSDNode(Opcode, Root, LabelID);
1184 CSEMap.InsertNode(N, IP);
1185 AllNodes.push_back(N);
1186 return SDValue(N, 0);
1189 SDValue SelectionDAG::getSrcValue(const Value *V) {
1190 assert((!V || isa<PointerType>(V->getType())) &&
1191 "SrcValue is not a pointer?");
1193 FoldingSetNodeID ID;
1194 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1199 return SDValue(E, 0);
1201 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1202 new (N) SrcValueSDNode(V);
1203 CSEMap.InsertNode(N, IP);
1204 AllNodes.push_back(N);
1205 return SDValue(N, 0);
1208 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1210 const Value *v = MO.getValue();
1211 assert((!v || isa<PointerType>(v->getType())) &&
1212 "SrcValue is not a pointer?");
1215 FoldingSetNodeID ID;
1216 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1220 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1221 return SDValue(E, 0);
1223 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1224 new (N) MemOperandSDNode(MO);
1225 CSEMap.InsertNode(N, IP);
1226 AllNodes.push_back(N);
1227 return SDValue(N, 0);
1230 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1231 /// specified value type.
1232 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1233 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1234 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1235 const Type *Ty = VT.getTypeForMVT();
1236 unsigned StackAlign =
1237 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1239 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1240 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1243 /// CreateStackTemporary - Create a stack temporary suitable for holding
1244 /// either of the specified value types.
1245 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1246 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1247 VT2.getStoreSizeInBits())/8;
1248 const Type *Ty1 = VT1.getTypeForMVT();
1249 const Type *Ty2 = VT2.getTypeForMVT();
1250 const TargetData *TD = TLI.getTargetData();
1251 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1252 TD->getPrefTypeAlignment(Ty2));
1254 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1255 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1256 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1259 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1260 SDValue N2, ISD::CondCode Cond) {
1261 // These setcc operations always fold.
1265 case ISD::SETFALSE2: return getConstant(0, VT);
1267 case ISD::SETTRUE2: return getConstant(1, VT);
1279 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1283 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1284 const APInt &C2 = N2C->getAPIntValue();
1285 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1286 const APInt &C1 = N1C->getAPIntValue();
1289 default: assert(0 && "Unknown integer setcc!");
1290 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1291 case ISD::SETNE: return getConstant(C1 != C2, VT);
1292 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1293 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1294 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1295 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1296 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1297 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1298 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1299 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1303 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1304 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1305 // No compile time operations on this type yet.
1306 if (N1C->getValueType(0) == MVT::ppcf128)
1309 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1312 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1313 return getNode(ISD::UNDEF, VT);
1315 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1316 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1317 return getNode(ISD::UNDEF, VT);
1319 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1320 R==APFloat::cmpLessThan, VT);
1321 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1322 return getNode(ISD::UNDEF, VT);
1324 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1325 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1326 return getNode(ISD::UNDEF, VT);
1328 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1329 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1330 return getNode(ISD::UNDEF, VT);
1332 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1333 R==APFloat::cmpEqual, VT);
1334 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1335 return getNode(ISD::UNDEF, VT);
1337 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1338 R==APFloat::cmpEqual, VT);
1339 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1340 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1341 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1342 R==APFloat::cmpEqual, VT);
1343 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1344 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1345 R==APFloat::cmpLessThan, VT);
1346 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1347 R==APFloat::cmpUnordered, VT);
1348 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1349 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1352 // Ensure that the constant occurs on the RHS.
1353 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1357 // Could not fold it.
1361 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1362 /// use this predicate to simplify operations downstream.
1363 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1364 unsigned BitWidth = Op.getValueSizeInBits();
1365 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1368 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1369 /// this predicate to simplify operations downstream. Mask is known to be zero
1370 /// for bits that V cannot have.
1371 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1372 unsigned Depth) const {
1373 APInt KnownZero, KnownOne;
1374 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1375 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1376 return (KnownZero & Mask) == Mask;
1379 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1380 /// known to be either zero or one and return them in the KnownZero/KnownOne
1381 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1383 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1384 APInt &KnownZero, APInt &KnownOne,
1385 unsigned Depth) const {
1386 unsigned BitWidth = Mask.getBitWidth();
1387 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1388 "Mask size mismatches value type size!");
1390 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1391 if (Depth == 6 || Mask == 0)
1392 return; // Limit search depth.
1394 APInt KnownZero2, KnownOne2;
1396 switch (Op.getOpcode()) {
1398 // We know all of the bits for a constant!
1399 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1400 KnownZero = ~KnownOne & Mask;
1403 // If either the LHS or the RHS are Zero, the result is zero.
1404 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1405 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1406 KnownZero2, KnownOne2, Depth+1);
1407 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1408 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1410 // Output known-1 bits are only known if set in both the LHS & RHS.
1411 KnownOne &= KnownOne2;
1412 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1413 KnownZero |= KnownZero2;
1416 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1417 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1418 KnownZero2, KnownOne2, Depth+1);
1419 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1420 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1422 // Output known-0 bits are only known if clear in both the LHS & RHS.
1423 KnownZero &= KnownZero2;
1424 // Output known-1 are known to be set if set in either the LHS | RHS.
1425 KnownOne |= KnownOne2;
1428 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1429 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1430 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1431 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1433 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1434 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1435 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1436 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1437 KnownZero = KnownZeroOut;
1441 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1442 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1443 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1444 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1445 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1447 // If low bits are zero in either operand, output low known-0 bits.
1448 // Also compute a conserative estimate for high known-0 bits.
1449 // More trickiness is possible, but this is sufficient for the
1450 // interesting case of alignment computation.
1452 unsigned TrailZ = KnownZero.countTrailingOnes() +
1453 KnownZero2.countTrailingOnes();
1454 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1455 KnownZero2.countLeadingOnes(),
1456 BitWidth) - BitWidth;
1458 TrailZ = std::min(TrailZ, BitWidth);
1459 LeadZ = std::min(LeadZ, BitWidth);
1460 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1461 APInt::getHighBitsSet(BitWidth, LeadZ);
1466 // For the purposes of computing leading zeros we can conservatively
1467 // treat a udiv as a logical right shift by the power of 2 known to
1468 // be less than the denominator.
1469 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1470 ComputeMaskedBits(Op.getOperand(0),
1471 AllOnes, KnownZero2, KnownOne2, Depth+1);
1472 unsigned LeadZ = KnownZero2.countLeadingOnes();
1476 ComputeMaskedBits(Op.getOperand(1),
1477 AllOnes, KnownZero2, KnownOne2, Depth+1);
1478 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1479 if (RHSUnknownLeadingOnes != BitWidth)
1480 LeadZ = std::min(BitWidth,
1481 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1483 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1487 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1488 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1489 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1490 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1492 // Only known if known in both the LHS and RHS.
1493 KnownOne &= KnownOne2;
1494 KnownZero &= KnownZero2;
1496 case ISD::SELECT_CC:
1497 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1498 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1499 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1500 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1502 // Only known if known in both the LHS and RHS.
1503 KnownOne &= KnownOne2;
1504 KnownZero &= KnownZero2;
1512 if (Op.getResNo() != 1)
1514 // The boolean result conforms to getBooleanContents. Fall through.
1516 // If we know the result of a setcc has the top bits zero, use this info.
1517 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1519 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1522 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1523 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1524 unsigned ShAmt = SA->getZExtValue();
1526 // If the shift count is an invalid immediate, don't do anything.
1527 if (ShAmt >= BitWidth)
1530 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1531 KnownZero, KnownOne, Depth+1);
1532 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1533 KnownZero <<= ShAmt;
1535 // low bits known zero.
1536 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1540 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1541 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1542 unsigned ShAmt = SA->getZExtValue();
1544 // If the shift count is an invalid immediate, don't do anything.
1545 if (ShAmt >= BitWidth)
1548 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1549 KnownZero, KnownOne, Depth+1);
1550 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1551 KnownZero = KnownZero.lshr(ShAmt);
1552 KnownOne = KnownOne.lshr(ShAmt);
1554 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1555 KnownZero |= HighBits; // High bits known zero.
1559 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1560 unsigned ShAmt = SA->getZExtValue();
1562 // If the shift count is an invalid immediate, don't do anything.
1563 if (ShAmt >= BitWidth)
1566 APInt InDemandedMask = (Mask << ShAmt);
1567 // If any of the demanded bits are produced by the sign extension, we also
1568 // demand the input sign bit.
1569 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1570 if (HighBits.getBoolValue())
1571 InDemandedMask |= APInt::getSignBit(BitWidth);
1573 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1575 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1576 KnownZero = KnownZero.lshr(ShAmt);
1577 KnownOne = KnownOne.lshr(ShAmt);
1579 // Handle the sign bits.
1580 APInt SignBit = APInt::getSignBit(BitWidth);
1581 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1583 if (KnownZero.intersects(SignBit)) {
1584 KnownZero |= HighBits; // New bits are known zero.
1585 } else if (KnownOne.intersects(SignBit)) {
1586 KnownOne |= HighBits; // New bits are known one.
1590 case ISD::SIGN_EXTEND_INREG: {
1591 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1592 unsigned EBits = EVT.getSizeInBits();
1594 // Sign extension. Compute the demanded bits in the result that are not
1595 // present in the input.
1596 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1598 APInt InSignBit = APInt::getSignBit(EBits);
1599 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1601 // If the sign extended bits are demanded, we know that the sign
1603 InSignBit.zext(BitWidth);
1604 if (NewBits.getBoolValue())
1605 InputDemandedBits |= InSignBit;
1607 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1608 KnownZero, KnownOne, Depth+1);
1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1611 // If the sign bit of the input is known set or clear, then we know the
1612 // top bits of the result.
1613 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1614 KnownZero |= NewBits;
1615 KnownOne &= ~NewBits;
1616 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1617 KnownOne |= NewBits;
1618 KnownZero &= ~NewBits;
1619 } else { // Input sign bit unknown
1620 KnownZero &= ~NewBits;
1621 KnownOne &= ~NewBits;
1628 unsigned LowBits = Log2_32(BitWidth)+1;
1629 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1634 if (ISD::isZEXTLoad(Op.getNode())) {
1635 LoadSDNode *LD = cast<LoadSDNode>(Op);
1636 MVT VT = LD->getMemoryVT();
1637 unsigned MemBits = VT.getSizeInBits();
1638 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1642 case ISD::ZERO_EXTEND: {
1643 MVT InVT = Op.getOperand(0).getValueType();
1644 unsigned InBits = InVT.getSizeInBits();
1645 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1646 APInt InMask = Mask;
1647 InMask.trunc(InBits);
1648 KnownZero.trunc(InBits);
1649 KnownOne.trunc(InBits);
1650 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1651 KnownZero.zext(BitWidth);
1652 KnownOne.zext(BitWidth);
1653 KnownZero |= NewBits;
1656 case ISD::SIGN_EXTEND: {
1657 MVT InVT = Op.getOperand(0).getValueType();
1658 unsigned InBits = InVT.getSizeInBits();
1659 APInt InSignBit = APInt::getSignBit(InBits);
1660 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1661 APInt InMask = Mask;
1662 InMask.trunc(InBits);
1664 // If any of the sign extended bits are demanded, we know that the sign
1665 // bit is demanded. Temporarily set this bit in the mask for our callee.
1666 if (NewBits.getBoolValue())
1667 InMask |= InSignBit;
1669 KnownZero.trunc(InBits);
1670 KnownOne.trunc(InBits);
1671 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1673 // Note if the sign bit is known to be zero or one.
1674 bool SignBitKnownZero = KnownZero.isNegative();
1675 bool SignBitKnownOne = KnownOne.isNegative();
1676 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1677 "Sign bit can't be known to be both zero and one!");
1679 // If the sign bit wasn't actually demanded by our caller, we don't
1680 // want it set in the KnownZero and KnownOne result values. Reset the
1681 // mask and reapply it to the result values.
1683 InMask.trunc(InBits);
1684 KnownZero &= InMask;
1687 KnownZero.zext(BitWidth);
1688 KnownOne.zext(BitWidth);
1690 // If the sign bit is known zero or one, the top bits match.
1691 if (SignBitKnownZero)
1692 KnownZero |= NewBits;
1693 else if (SignBitKnownOne)
1694 KnownOne |= NewBits;
1697 case ISD::ANY_EXTEND: {
1698 MVT InVT = Op.getOperand(0).getValueType();
1699 unsigned InBits = InVT.getSizeInBits();
1700 APInt InMask = Mask;
1701 InMask.trunc(InBits);
1702 KnownZero.trunc(InBits);
1703 KnownOne.trunc(InBits);
1704 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1705 KnownZero.zext(BitWidth);
1706 KnownOne.zext(BitWidth);
1709 case ISD::TRUNCATE: {
1710 MVT InVT = Op.getOperand(0).getValueType();
1711 unsigned InBits = InVT.getSizeInBits();
1712 APInt InMask = Mask;
1713 InMask.zext(InBits);
1714 KnownZero.zext(InBits);
1715 KnownOne.zext(InBits);
1716 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1718 KnownZero.trunc(BitWidth);
1719 KnownOne.trunc(BitWidth);
1722 case ISD::AssertZext: {
1723 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1724 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1725 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1727 KnownZero |= (~InMask) & Mask;
1731 // All bits are zero except the low bit.
1732 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1736 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1737 // We know that the top bits of C-X are clear if X contains less bits
1738 // than C (i.e. no wrap-around can happen). For example, 20-X is
1739 // positive if we can prove that X is >= 0 and < 16.
1740 if (CLHS->getAPIntValue().isNonNegative()) {
1741 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1742 // NLZ can't be BitWidth with no sign bit
1743 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1744 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1747 // If all of the MaskV bits are known to be zero, then we know the
1748 // output top bits are zero, because we now know that the output is
1750 if ((KnownZero2 & MaskV) == MaskV) {
1751 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1752 // Top bits known zero.
1753 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1760 // Output known-0 bits are known if clear or set in both the low clear bits
1761 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1762 // low 3 bits clear.
1763 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1764 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1765 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1766 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1768 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1769 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1770 KnownZeroOut = std::min(KnownZeroOut,
1771 KnownZero2.countTrailingOnes());
1773 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1777 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1778 const APInt &RA = Rem->getAPIntValue();
1779 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1780 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1781 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1782 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1784 // If the sign bit of the first operand is zero, the sign bit of
1785 // the result is zero. If the first operand has no one bits below
1786 // the second operand's single 1 bit, its sign will be zero.
1787 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1788 KnownZero2 |= ~LowBits;
1790 KnownZero |= KnownZero2 & Mask;
1792 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1797 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1798 const APInt &RA = Rem->getAPIntValue();
1799 if (RA.isPowerOf2()) {
1800 APInt LowBits = (RA - 1);
1801 APInt Mask2 = LowBits & Mask;
1802 KnownZero |= ~LowBits & Mask;
1803 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1804 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1809 // Since the result is less than or equal to either operand, any leading
1810 // zero bits in either operand must also exist in the result.
1811 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1812 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1814 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1817 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1818 KnownZero2.countLeadingOnes());
1820 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1824 // Allow the target to implement this method for its nodes.
1825 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1826 case ISD::INTRINSIC_WO_CHAIN:
1827 case ISD::INTRINSIC_W_CHAIN:
1828 case ISD::INTRINSIC_VOID:
1829 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1835 /// ComputeNumSignBits - Return the number of times the sign bit of the
1836 /// register is replicated into the other bits. We know that at least 1 bit
1837 /// is always equal to the sign bit (itself), but other cases can give us
1838 /// information. For example, immediately after an "SRA X, 2", we know that
1839 /// the top 3 bits are all equal to each other, so we return 3.
1840 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1841 MVT VT = Op.getValueType();
1842 assert(VT.isInteger() && "Invalid VT!");
1843 unsigned VTBits = VT.getSizeInBits();
1845 unsigned FirstAnswer = 1;
1848 return 1; // Limit search depth.
1850 switch (Op.getOpcode()) {
1852 case ISD::AssertSext:
1853 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1854 return VTBits-Tmp+1;
1855 case ISD::AssertZext:
1856 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1859 case ISD::Constant: {
1860 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1861 // If negative, return # leading ones.
1862 if (Val.isNegative())
1863 return Val.countLeadingOnes();
1865 // Return # leading zeros.
1866 return Val.countLeadingZeros();
1869 case ISD::SIGN_EXTEND:
1870 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1871 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1873 case ISD::SIGN_EXTEND_INREG:
1874 // Max of the input and what this extends.
1875 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1878 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1879 return std::max(Tmp, Tmp2);
1882 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1883 // SRA X, C -> adds C sign bits.
1884 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1885 Tmp += C->getZExtValue();
1886 if (Tmp > VTBits) Tmp = VTBits;
1890 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1891 // shl destroys sign bits.
1892 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1893 if (C->getZExtValue() >= VTBits || // Bad shift.
1894 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1895 return Tmp - C->getZExtValue();
1900 case ISD::XOR: // NOT is handled here.
1901 // Logical binary ops preserve the number of sign bits at the worst.
1902 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1904 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1905 FirstAnswer = std::min(Tmp, Tmp2);
1906 // We computed what we know about the sign bits as our first
1907 // answer. Now proceed to the generic code that uses
1908 // ComputeMaskedBits, and pick whichever answer is better.
1913 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1914 if (Tmp == 1) return 1; // Early out.
1915 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1916 return std::min(Tmp, Tmp2);
1924 if (Op.getResNo() != 1)
1926 // The boolean result conforms to getBooleanContents. Fall through.
1928 // If setcc returns 0/-1, all bits are sign bits.
1929 if (TLI.getBooleanContents() ==
1930 TargetLowering::ZeroOrNegativeOneBooleanContent)
1935 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1936 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1938 // Handle rotate right by N like a rotate left by 32-N.
1939 if (Op.getOpcode() == ISD::ROTR)
1940 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1942 // If we aren't rotating out all of the known-in sign bits, return the
1943 // number that are left. This handles rotl(sext(x), 1) for example.
1944 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1945 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1949 // Add can have at most one carry bit. Thus we know that the output
1950 // is, at worst, one more bit than the inputs.
1951 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1952 if (Tmp == 1) return 1; // Early out.
1954 // Special case decrementing a value (ADD X, -1):
1955 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1956 if (CRHS->isAllOnesValue()) {
1957 APInt KnownZero, KnownOne;
1958 APInt Mask = APInt::getAllOnesValue(VTBits);
1959 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1961 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1963 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1966 // If we are subtracting one from a positive number, there is no carry
1967 // out of the result.
1968 if (KnownZero.isNegative())
1972 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1973 if (Tmp2 == 1) return 1;
1974 return std::min(Tmp, Tmp2)-1;
1978 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1979 if (Tmp2 == 1) return 1;
1982 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1983 if (CLHS->isNullValue()) {
1984 APInt KnownZero, KnownOne;
1985 APInt Mask = APInt::getAllOnesValue(VTBits);
1986 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1987 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1989 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1992 // If the input is known to be positive (the sign bit is known clear),
1993 // the output of the NEG has the same number of sign bits as the input.
1994 if (KnownZero.isNegative())
1997 // Otherwise, we treat this like a SUB.
2000 // Sub can have at most one carry bit. Thus we know that the output
2001 // is, at worst, one more bit than the inputs.
2002 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2003 if (Tmp == 1) return 1; // Early out.
2004 return std::min(Tmp, Tmp2)-1;
2007 // FIXME: it's tricky to do anything useful for this, but it is an important
2008 // case for targets like X86.
2012 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2013 if (Op.getOpcode() == ISD::LOAD) {
2014 LoadSDNode *LD = cast<LoadSDNode>(Op);
2015 unsigned ExtType = LD->getExtensionType();
2018 case ISD::SEXTLOAD: // '17' bits known
2019 Tmp = LD->getMemoryVT().getSizeInBits();
2020 return VTBits-Tmp+1;
2021 case ISD::ZEXTLOAD: // '16' bits known
2022 Tmp = LD->getMemoryVT().getSizeInBits();
2027 // Allow the target to implement this method for its nodes.
2028 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2029 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2030 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2031 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2032 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2033 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2036 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2037 // use this information.
2038 APInt KnownZero, KnownOne;
2039 APInt Mask = APInt::getAllOnesValue(VTBits);
2040 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2042 if (KnownZero.isNegative()) { // sign bit is 0
2044 } else if (KnownOne.isNegative()) { // sign bit is 1;
2051 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2052 // the number of identical bits in the top of the input value.
2054 Mask <<= Mask.getBitWidth()-VTBits;
2055 // Return # leading zeros. We use 'min' here in case Val was zero before
2056 // shifting. We don't want to return '64' as for an i32 "0".
2057 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2061 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2062 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2063 if (!GA) return false;
2064 if (GA->getOffset() != 0) return false;
2065 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2066 if (!GV) return false;
2067 MachineModuleInfo *MMI = getMachineModuleInfo();
2068 return MMI && MMI->hasDebugInfo();
2072 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2073 /// element of the result of the vector shuffle.
2074 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2075 MVT VT = N->getValueType(0);
2076 SDValue PermMask = N->getOperand(2);
2077 SDValue Idx = PermMask.getOperand(i);
2078 if (Idx.getOpcode() == ISD::UNDEF)
2079 return getNode(ISD::UNDEF, VT.getVectorElementType());
2080 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2081 unsigned NumElems = PermMask.getNumOperands();
2082 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2085 if (V.getOpcode() == ISD::BIT_CONVERT) {
2086 V = V.getOperand(0);
2087 MVT VVT = V.getValueType();
2088 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2091 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2092 return (Index == 0) ? V.getOperand(0)
2093 : getNode(ISD::UNDEF, VT.getVectorElementType());
2094 if (V.getOpcode() == ISD::BUILD_VECTOR)
2095 return V.getOperand(Index);
2096 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2097 return getShuffleScalarElt(V.getNode(), Index);
2102 /// getNode - Gets or creates the specified node.
2104 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2105 FoldingSetNodeID ID;
2106 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2108 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2109 return SDValue(E, 0);
2110 SDNode *N = NodeAllocator.Allocate<SDNode>();
2111 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2112 CSEMap.InsertNode(N, IP);
2114 AllNodes.push_back(N);
2118 return SDValue(N, 0);
2121 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2122 // Constant fold unary operations with an integer constant operand.
2123 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2124 const APInt &Val = C->getAPIntValue();
2125 unsigned BitWidth = VT.getSizeInBits();
2128 case ISD::SIGN_EXTEND:
2129 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2130 case ISD::ANY_EXTEND:
2131 case ISD::ZERO_EXTEND:
2133 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2134 case ISD::UINT_TO_FP:
2135 case ISD::SINT_TO_FP: {
2136 const uint64_t zero[] = {0, 0};
2137 // No compile time operations on this type.
2138 if (VT==MVT::ppcf128)
2140 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2141 (void)apf.convertFromAPInt(Val,
2142 Opcode==ISD::SINT_TO_FP,
2143 APFloat::rmNearestTiesToEven);
2144 return getConstantFP(apf, VT);
2146 case ISD::BIT_CONVERT:
2147 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2148 return getConstantFP(Val.bitsToFloat(), VT);
2149 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2150 return getConstantFP(Val.bitsToDouble(), VT);
2153 return getConstant(Val.byteSwap(), VT);
2155 return getConstant(Val.countPopulation(), VT);
2157 return getConstant(Val.countLeadingZeros(), VT);
2159 return getConstant(Val.countTrailingZeros(), VT);
2163 // Constant fold unary operations with a floating point constant operand.
2164 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2165 APFloat V = C->getValueAPF(); // make copy
2166 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2170 return getConstantFP(V, VT);
2173 return getConstantFP(V, VT);
2175 case ISD::FP_EXTEND: {
2177 // This can return overflow, underflow, or inexact; we don't care.
2178 // FIXME need to be more flexible about rounding mode.
2179 (void)V.convert(*MVTToAPFloatSemantics(VT),
2180 APFloat::rmNearestTiesToEven, &ignored);
2181 return getConstantFP(V, VT);
2183 case ISD::FP_TO_SINT:
2184 case ISD::FP_TO_UINT: {
2187 assert(integerPartWidth >= 64);
2188 // FIXME need to be more flexible about rounding mode.
2189 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2190 Opcode==ISD::FP_TO_SINT,
2191 APFloat::rmTowardZero, &ignored);
2192 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2194 return getConstant(x, VT);
2196 case ISD::BIT_CONVERT:
2197 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2198 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2199 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2200 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2206 unsigned OpOpcode = Operand.getNode()->getOpcode();
2208 case ISD::TokenFactor:
2209 case ISD::MERGE_VALUES:
2210 case ISD::CONCAT_VECTORS:
2211 return Operand; // Factor, merge or concat of one node? No need.
2212 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2213 case ISD::FP_EXTEND:
2214 assert(VT.isFloatingPoint() &&
2215 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2216 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2217 if (Operand.getOpcode() == ISD::UNDEF)
2218 return getNode(ISD::UNDEF, VT);
2220 case ISD::SIGN_EXTEND:
2221 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2222 "Invalid SIGN_EXTEND!");
2223 if (Operand.getValueType() == VT) return Operand; // noop extension
2224 assert(Operand.getValueType().bitsLT(VT)
2225 && "Invalid sext node, dst < src!");
2226 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2227 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2229 case ISD::ZERO_EXTEND:
2230 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2231 "Invalid ZERO_EXTEND!");
2232 if (Operand.getValueType() == VT) return Operand; // noop extension
2233 assert(Operand.getValueType().bitsLT(VT)
2234 && "Invalid zext node, dst < src!");
2235 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2236 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2238 case ISD::ANY_EXTEND:
2239 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2240 "Invalid ANY_EXTEND!");
2241 if (Operand.getValueType() == VT) return Operand; // noop extension
2242 assert(Operand.getValueType().bitsLT(VT)
2243 && "Invalid anyext node, dst < src!");
2244 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2245 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2246 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2249 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2250 "Invalid TRUNCATE!");
2251 if (Operand.getValueType() == VT) return Operand; // noop truncate
2252 assert(Operand.getValueType().bitsGT(VT)
2253 && "Invalid truncate node, src < dst!");
2254 if (OpOpcode == ISD::TRUNCATE)
2255 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2256 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2257 OpOpcode == ISD::ANY_EXTEND) {
2258 // If the source is smaller than the dest, we still need an extend.
2259 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2260 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2261 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2262 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2264 return Operand.getNode()->getOperand(0);
2267 case ISD::BIT_CONVERT:
2268 // Basic sanity checking.
2269 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2270 && "Cannot BIT_CONVERT between types of different sizes!");
2271 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2272 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2273 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2274 if (OpOpcode == ISD::UNDEF)
2275 return getNode(ISD::UNDEF, VT);
2277 case ISD::SCALAR_TO_VECTOR:
2278 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2279 VT.getVectorElementType() == Operand.getValueType() &&
2280 "Illegal SCALAR_TO_VECTOR node!");
2281 if (OpOpcode == ISD::UNDEF)
2282 return getNode(ISD::UNDEF, VT);
2283 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2284 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2285 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2286 Operand.getConstantOperandVal(1) == 0 &&
2287 Operand.getOperand(0).getValueType() == VT)
2288 return Operand.getOperand(0);
2291 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2292 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2293 Operand.getNode()->getOperand(0));
2294 if (OpOpcode == ISD::FNEG) // --X -> X
2295 return Operand.getNode()->getOperand(0);
2298 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2299 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2304 SDVTList VTs = getVTList(VT);
2305 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2306 FoldingSetNodeID ID;
2307 SDValue Ops[1] = { Operand };
2308 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2310 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2311 return SDValue(E, 0);
2312 N = NodeAllocator.Allocate<UnarySDNode>();
2313 new (N) UnarySDNode(Opcode, VTs, Operand);
2314 CSEMap.InsertNode(N, IP);
2316 N = NodeAllocator.Allocate<UnarySDNode>();
2317 new (N) UnarySDNode(Opcode, VTs, Operand);
2320 AllNodes.push_back(N);
2324 return SDValue(N, 0);
2327 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2329 ConstantSDNode *Cst1,
2330 ConstantSDNode *Cst2) {
2331 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2334 case ISD::ADD: return getConstant(C1 + C2, VT);
2335 case ISD::SUB: return getConstant(C1 - C2, VT);
2336 case ISD::MUL: return getConstant(C1 * C2, VT);
2338 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2341 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2344 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2347 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2349 case ISD::AND: return getConstant(C1 & C2, VT);
2350 case ISD::OR: return getConstant(C1 | C2, VT);
2351 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2352 case ISD::SHL: return getConstant(C1 << C2, VT);
2353 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2354 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2355 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2356 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2363 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2364 SDValue N1, SDValue N2) {
2365 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2366 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2369 case ISD::TokenFactor:
2370 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2371 N2.getValueType() == MVT::Other && "Invalid token factor!");
2372 // Fold trivial token factors.
2373 if (N1.getOpcode() == ISD::EntryToken) return N2;
2374 if (N2.getOpcode() == ISD::EntryToken) return N1;
2375 if (N1 == N2) return N1;
2377 case ISD::CONCAT_VECTORS:
2378 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2379 // one big BUILD_VECTOR.
2380 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2381 N2.getOpcode() == ISD::BUILD_VECTOR) {
2382 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2383 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2384 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2388 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2389 N1.getValueType() == VT && "Binary operator types must match!");
2390 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2391 // worth handling here.
2392 if (N2C && N2C->isNullValue())
2394 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2401 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2402 N1.getValueType() == VT && "Binary operator types must match!");
2403 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2404 // it's worth handling here.
2405 if (N2C && N2C->isNullValue())
2415 assert(VT.isInteger() && "This operator does not apply to FP types!");
2423 if (Opcode == ISD::FADD) {
2425 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2426 if (CFP->getValueAPF().isZero())
2429 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2430 if (CFP->getValueAPF().isZero())
2432 } else if (Opcode == ISD::FSUB) {
2434 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2435 if (CFP->getValueAPF().isZero())
2439 assert(N1.getValueType() == N2.getValueType() &&
2440 N1.getValueType() == VT && "Binary operator types must match!");
2442 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2443 assert(N1.getValueType() == VT &&
2444 N1.getValueType().isFloatingPoint() &&
2445 N2.getValueType().isFloatingPoint() &&
2446 "Invalid FCOPYSIGN!");
2453 assert(VT == N1.getValueType() &&
2454 "Shift operators return type must be the same as their first arg");
2455 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2456 "Shifts only work on integers");
2457 assert((N2.getValueType() == TLI.getShiftAmountTy() ||
2458 (N2.getValueType().isVector() && N2.getValueType().isInteger())) &&
2459 "Wrong type for shift amount");
2461 // Always fold shifts of i1 values so the code generator doesn't need to
2462 // handle them. Since we know the size of the shift has to be less than the
2463 // size of the value, the shift/rotate count is guaranteed to be zero.
2467 case ISD::FP_ROUND_INREG: {
2468 MVT EVT = cast<VTSDNode>(N2)->getVT();
2469 assert(VT == N1.getValueType() && "Not an inreg round!");
2470 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2471 "Cannot FP_ROUND_INREG integer types");
2472 assert(EVT.bitsLE(VT) && "Not rounding down!");
2473 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2477 assert(VT.isFloatingPoint() &&
2478 N1.getValueType().isFloatingPoint() &&
2479 VT.bitsLE(N1.getValueType()) &&
2480 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2481 if (N1.getValueType() == VT) return N1; // noop conversion.
2483 case ISD::AssertSext:
2484 case ISD::AssertZext: {
2485 MVT EVT = cast<VTSDNode>(N2)->getVT();
2486 assert(VT == N1.getValueType() && "Not an inreg extend!");
2487 assert(VT.isInteger() && EVT.isInteger() &&
2488 "Cannot *_EXTEND_INREG FP types");
2489 assert(EVT.bitsLE(VT) && "Not extending!");
2490 if (VT == EVT) return N1; // noop assertion.
2493 case ISD::SIGN_EXTEND_INREG: {
2494 MVT EVT = cast<VTSDNode>(N2)->getVT();
2495 assert(VT == N1.getValueType() && "Not an inreg extend!");
2496 assert(VT.isInteger() && EVT.isInteger() &&
2497 "Cannot *_EXTEND_INREG FP types");
2498 assert(EVT.bitsLE(VT) && "Not extending!");
2499 if (EVT == VT) return N1; // Not actually extending
2502 APInt Val = N1C->getAPIntValue();
2503 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2504 Val <<= Val.getBitWidth()-FromBits;
2505 Val = Val.ashr(Val.getBitWidth()-FromBits);
2506 return getConstant(Val, VT);
2510 case ISD::EXTRACT_VECTOR_ELT:
2511 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2512 if (N1.getOpcode() == ISD::UNDEF)
2513 return getNode(ISD::UNDEF, VT);
2515 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2516 // expanding copies of large vectors from registers.
2518 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2519 N1.getNumOperands() > 0) {
2521 N1.getOperand(0).getValueType().getVectorNumElements();
2522 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2523 N1.getOperand(N2C->getZExtValue() / Factor),
2524 getConstant(N2C->getZExtValue() % Factor,
2525 N2.getValueType()));
2528 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2529 // expanding large vector constants.
2530 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2531 return N1.getOperand(N2C->getZExtValue());
2533 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2534 // operations are lowered to scalars.
2535 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2536 if (N1.getOperand(2) == N2)
2537 return N1.getOperand(1);
2539 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2542 case ISD::EXTRACT_ELEMENT:
2543 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2544 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2545 (N1.getValueType().isInteger() == VT.isInteger()) &&
2546 "Wrong types for EXTRACT_ELEMENT!");
2548 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2549 // 64-bit integers into 32-bit parts. Instead of building the extract of
2550 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2551 if (N1.getOpcode() == ISD::BUILD_PAIR)
2552 return N1.getOperand(N2C->getZExtValue());
2554 // EXTRACT_ELEMENT of a constant int is also very common.
2555 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2556 unsigned ElementSize = VT.getSizeInBits();
2557 unsigned Shift = ElementSize * N2C->getZExtValue();
2558 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2559 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2562 case ISD::EXTRACT_SUBVECTOR:
2563 if (N1.getValueType() == VT) // Trivial extraction.
2570 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2571 if (SV.getNode()) return SV;
2572 } else { // Cannonicalize constant to RHS if commutative
2573 if (isCommutativeBinOp(Opcode)) {
2574 std::swap(N1C, N2C);
2580 // Constant fold FP operations.
2581 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2582 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2584 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2585 // Cannonicalize constant to RHS if commutative
2586 std::swap(N1CFP, N2CFP);
2588 } else if (N2CFP && VT != MVT::ppcf128) {
2589 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2590 APFloat::opStatus s;
2593 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2594 if (s != APFloat::opInvalidOp)
2595 return getConstantFP(V1, VT);
2598 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2599 if (s!=APFloat::opInvalidOp)
2600 return getConstantFP(V1, VT);
2603 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2604 if (s!=APFloat::opInvalidOp)
2605 return getConstantFP(V1, VT);
2608 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2609 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2610 return getConstantFP(V1, VT);
2613 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2614 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2615 return getConstantFP(V1, VT);
2617 case ISD::FCOPYSIGN:
2619 return getConstantFP(V1, VT);
2625 // Canonicalize an UNDEF to the RHS, even over a constant.
2626 if (N1.getOpcode() == ISD::UNDEF) {
2627 if (isCommutativeBinOp(Opcode)) {
2631 case ISD::FP_ROUND_INREG:
2632 case ISD::SIGN_EXTEND_INREG:
2638 return N1; // fold op(undef, arg2) -> undef
2646 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2647 // For vectors, we can't easily build an all zero vector, just return
2654 // Fold a bunch of operators when the RHS is undef.
2655 if (N2.getOpcode() == ISD::UNDEF) {
2658 if (N1.getOpcode() == ISD::UNDEF)
2659 // Handle undef ^ undef -> 0 special case. This is a common
2661 return getConstant(0, VT);
2676 return N2; // fold op(arg1, undef) -> undef
2682 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2683 // For vectors, we can't easily build an all zero vector, just return
2688 return getConstant(VT.getIntegerVTBitMask(), VT);
2689 // For vectors, we can't easily build an all one vector, just return
2697 // Memoize this node if possible.
2699 SDVTList VTs = getVTList(VT);
2700 if (VT != MVT::Flag) {
2701 SDValue Ops[] = { N1, N2 };
2702 FoldingSetNodeID ID;
2703 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2706 return SDValue(E, 0);
2707 N = NodeAllocator.Allocate<BinarySDNode>();
2708 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2709 CSEMap.InsertNode(N, IP);
2711 N = NodeAllocator.Allocate<BinarySDNode>();
2712 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2715 AllNodes.push_back(N);
2719 return SDValue(N, 0);
2722 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2723 SDValue N1, SDValue N2, SDValue N3) {
2724 // Perform various simplifications.
2725 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2726 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2728 case ISD::CONCAT_VECTORS:
2729 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2730 // one big BUILD_VECTOR.
2731 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2732 N2.getOpcode() == ISD::BUILD_VECTOR &&
2733 N3.getOpcode() == ISD::BUILD_VECTOR) {
2734 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2735 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2736 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2737 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2741 // Use FoldSetCC to simplify SETCC's.
2742 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2743 if (Simp.getNode()) return Simp;
2748 if (N1C->getZExtValue())
2749 return N2; // select true, X, Y -> X
2751 return N3; // select false, X, Y -> Y
2754 if (N2 == N3) return N2; // select C, X, X -> X
2758 if (N2C->getZExtValue()) // Unconditional branch
2759 return getNode(ISD::BR, MVT::Other, N1, N3);
2761 return N1; // Never-taken branch
2764 case ISD::VECTOR_SHUFFLE:
2765 assert(N1.getValueType() == N2.getValueType() &&
2766 N1.getValueType().isVector() &&
2767 VT.isVector() && N3.getValueType().isVector() &&
2768 N3.getOpcode() == ISD::BUILD_VECTOR &&
2769 VT.getVectorNumElements() == N3.getNumOperands() &&
2770 "Illegal VECTOR_SHUFFLE node!");
2772 case ISD::BIT_CONVERT:
2773 // Fold bit_convert nodes from a type to themselves.
2774 if (N1.getValueType() == VT)
2779 // Memoize node if it doesn't produce a flag.
2781 SDVTList VTs = getVTList(VT);
2782 if (VT != MVT::Flag) {
2783 SDValue Ops[] = { N1, N2, N3 };
2784 FoldingSetNodeID ID;
2785 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2787 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2788 return SDValue(E, 0);
2789 N = NodeAllocator.Allocate<TernarySDNode>();
2790 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2791 CSEMap.InsertNode(N, IP);
2793 N = NodeAllocator.Allocate<TernarySDNode>();
2794 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2796 AllNodes.push_back(N);
2800 return SDValue(N, 0);
2803 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2804 SDValue N1, SDValue N2, SDValue N3,
2806 SDValue Ops[] = { N1, N2, N3, N4 };
2807 return getNode(Opcode, VT, Ops, 4);
2810 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2811 SDValue N1, SDValue N2, SDValue N3,
2812 SDValue N4, SDValue N5) {
2813 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2814 return getNode(Opcode, VT, Ops, 5);
2817 /// getMemsetValue - Vectorized representation of the memset value
2819 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2820 unsigned NumBits = VT.isVector() ?
2821 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2822 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2823 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2825 for (unsigned i = NumBits; i > 8; i >>= 1) {
2826 Val = (Val << Shift) | Val;
2830 return DAG.getConstant(Val, VT);
2831 return DAG.getConstantFP(APFloat(Val), VT);
2834 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2835 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2837 for (unsigned i = NumBits; i > 8; i >>= 1) {
2838 Value = DAG.getNode(ISD::OR, VT,
2839 DAG.getNode(ISD::SHL, VT, Value,
2840 DAG.getConstant(Shift,
2841 TLI.getShiftAmountTy())),
2849 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2850 /// used when a memcpy is turned into a memset when the source is a constant
2852 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2853 const TargetLowering &TLI,
2854 std::string &Str, unsigned Offset) {
2855 // Handle vector with all elements zero.
2858 return DAG.getConstant(0, VT);
2859 unsigned NumElts = VT.getVectorNumElements();
2860 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2861 return DAG.getNode(ISD::BIT_CONVERT, VT,
2862 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2865 assert(!VT.isVector() && "Can't handle vector type here!");
2866 unsigned NumBits = VT.getSizeInBits();
2867 unsigned MSB = NumBits / 8;
2869 if (TLI.isLittleEndian())
2870 Offset = Offset + MSB - 1;
2871 for (unsigned i = 0; i != MSB; ++i) {
2872 Val = (Val << 8) | (unsigned char)Str[Offset];
2873 Offset += TLI.isLittleEndian() ? -1 : 1;
2875 return DAG.getConstant(Val, VT);
2878 /// getMemBasePlusOffset - Returns base and offset node for the
2880 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2881 SelectionDAG &DAG) {
2882 MVT VT = Base.getValueType();
2883 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2886 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2888 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2889 unsigned SrcDelta = 0;
2890 GlobalAddressSDNode *G = NULL;
2891 if (Src.getOpcode() == ISD::GlobalAddress)
2892 G = cast<GlobalAddressSDNode>(Src);
2893 else if (Src.getOpcode() == ISD::ADD &&
2894 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2895 Src.getOperand(1).getOpcode() == ISD::Constant) {
2896 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2897 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2902 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2903 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2909 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2910 /// to replace the memset / memcpy is below the threshold. It also returns the
2911 /// types of the sequence of memory ops to perform memset / memcpy.
2913 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2914 SDValue Dst, SDValue Src,
2915 unsigned Limit, uint64_t Size, unsigned &Align,
2916 std::string &Str, bool &isSrcStr,
2918 const TargetLowering &TLI) {
2919 isSrcStr = isMemSrcFromString(Src, Str);
2920 bool isSrcConst = isa<ConstantSDNode>(Src);
2921 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2922 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2923 if (VT != MVT::iAny) {
2924 unsigned NewAlign = (unsigned)
2925 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2926 // If source is a string constant, this will require an unaligned load.
2927 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2928 if (Dst.getOpcode() != ISD::FrameIndex) {
2929 // Can't change destination alignment. It requires a unaligned store.
2933 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2934 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2935 if (MFI->isFixedObjectIndex(FI)) {
2936 // Can't change destination alignment. It requires a unaligned store.
2940 // Give the stack frame object a larger alignment if needed.
2941 if (MFI->getObjectAlignment(FI) < NewAlign)
2942 MFI->setObjectAlignment(FI, NewAlign);
2949 if (VT == MVT::iAny) {
2953 switch (Align & 7) {
2954 case 0: VT = MVT::i64; break;
2955 case 4: VT = MVT::i32; break;
2956 case 2: VT = MVT::i16; break;
2957 default: VT = MVT::i8; break;
2962 while (!TLI.isTypeLegal(LVT))
2963 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2964 assert(LVT.isInteger());
2970 unsigned NumMemOps = 0;
2972 unsigned VTSize = VT.getSizeInBits() / 8;
2973 while (VTSize > Size) {
2974 // For now, only use non-vector load / store's for the left-over pieces.
2975 if (VT.isVector()) {
2977 while (!TLI.isTypeLegal(VT))
2978 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2979 VTSize = VT.getSizeInBits() / 8;
2981 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2986 if (++NumMemOps > Limit)
2988 MemOps.push_back(VT);
2995 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2996 SDValue Chain, SDValue Dst,
2997 SDValue Src, uint64_t Size,
2998 unsigned Align, bool AlwaysInline,
2999 const Value *DstSV, uint64_t DstSVOff,
3000 const Value *SrcSV, uint64_t SrcSVOff){
3001 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3003 // Expand memcpy to a series of load and store ops if the size operand falls
3004 // below a certain threshold.
3005 std::vector<MVT> MemOps;
3006 uint64_t Limit = -1ULL;
3008 Limit = TLI.getMaxStoresPerMemcpy();
3009 unsigned DstAlign = Align; // Destination alignment can change.
3012 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3013 Str, CopyFromStr, DAG, TLI))
3017 bool isZeroStr = CopyFromStr && Str.empty();
3018 SmallVector<SDValue, 8> OutChains;
3019 unsigned NumMemOps = MemOps.size();
3020 uint64_t SrcOff = 0, DstOff = 0;
3021 for (unsigned i = 0; i < NumMemOps; i++) {
3023 unsigned VTSize = VT.getSizeInBits() / 8;
3024 SDValue Value, Store;
3026 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3027 // It's unlikely a store of a vector immediate can be done in a single
3028 // instruction. It would require a load from a constantpool first.
3029 // We also handle store a vector with all zero's.
3030 // FIXME: Handle other cases where store of vector immediate is done in
3031 // a single instruction.
3032 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3033 Store = DAG.getStore(Chain, Value,
3034 getMemBasePlusOffset(Dst, DstOff, DAG),
3035 DstSV, DstSVOff + DstOff, false, DstAlign);
3037 Value = DAG.getLoad(VT, Chain,
3038 getMemBasePlusOffset(Src, SrcOff, DAG),
3039 SrcSV, SrcSVOff + SrcOff, false, Align);
3040 Store = DAG.getStore(Chain, Value,
3041 getMemBasePlusOffset(Dst, DstOff, DAG),
3042 DstSV, DstSVOff + DstOff, false, DstAlign);
3044 OutChains.push_back(Store);
3049 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3050 &OutChains[0], OutChains.size());
3053 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3054 SDValue Chain, SDValue Dst,
3055 SDValue Src, uint64_t Size,
3056 unsigned Align, bool AlwaysInline,
3057 const Value *DstSV, uint64_t DstSVOff,
3058 const Value *SrcSV, uint64_t SrcSVOff){
3059 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3061 // Expand memmove to a series of load and store ops if the size operand falls
3062 // below a certain threshold.
3063 std::vector<MVT> MemOps;
3064 uint64_t Limit = -1ULL;
3066 Limit = TLI.getMaxStoresPerMemmove();
3067 unsigned DstAlign = Align; // Destination alignment can change.
3070 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3071 Str, CopyFromStr, DAG, TLI))
3074 uint64_t SrcOff = 0, DstOff = 0;
3076 SmallVector<SDValue, 8> LoadValues;
3077 SmallVector<SDValue, 8> LoadChains;
3078 SmallVector<SDValue, 8> OutChains;
3079 unsigned NumMemOps = MemOps.size();
3080 for (unsigned i = 0; i < NumMemOps; i++) {
3082 unsigned VTSize = VT.getSizeInBits() / 8;
3083 SDValue Value, Store;
3085 Value = DAG.getLoad(VT, Chain,
3086 getMemBasePlusOffset(Src, SrcOff, DAG),
3087 SrcSV, SrcSVOff + SrcOff, false, Align);
3088 LoadValues.push_back(Value);
3089 LoadChains.push_back(Value.getValue(1));
3092 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3093 &LoadChains[0], LoadChains.size());
3095 for (unsigned i = 0; i < NumMemOps; i++) {
3097 unsigned VTSize = VT.getSizeInBits() / 8;
3098 SDValue Value, Store;
3100 Store = DAG.getStore(Chain, LoadValues[i],
3101 getMemBasePlusOffset(Dst, DstOff, DAG),
3102 DstSV, DstSVOff + DstOff, false, DstAlign);
3103 OutChains.push_back(Store);
3107 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3108 &OutChains[0], OutChains.size());
3111 static SDValue getMemsetStores(SelectionDAG &DAG,
3112 SDValue Chain, SDValue Dst,
3113 SDValue Src, uint64_t Size,
3115 const Value *DstSV, uint64_t DstSVOff) {
3116 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3118 // Expand memset to a series of load/store ops if the size operand
3119 // falls below a certain threshold.
3120 std::vector<MVT> MemOps;
3123 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3124 Size, Align, Str, CopyFromStr, DAG, TLI))
3127 SmallVector<SDValue, 8> OutChains;
3128 uint64_t DstOff = 0;
3130 unsigned NumMemOps = MemOps.size();
3131 for (unsigned i = 0; i < NumMemOps; i++) {
3133 unsigned VTSize = VT.getSizeInBits() / 8;
3134 SDValue Value = getMemsetValue(Src, VT, DAG);
3135 SDValue Store = DAG.getStore(Chain, Value,
3136 getMemBasePlusOffset(Dst, DstOff, DAG),
3137 DstSV, DstSVOff + DstOff);
3138 OutChains.push_back(Store);
3142 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3143 &OutChains[0], OutChains.size());
3146 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3147 SDValue Src, SDValue Size,
3148 unsigned Align, bool AlwaysInline,
3149 const Value *DstSV, uint64_t DstSVOff,
3150 const Value *SrcSV, uint64_t SrcSVOff) {
3152 // Check to see if we should lower the memcpy to loads and stores first.
3153 // For cases within the target-specified limits, this is the best choice.
3154 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3156 // Memcpy with size zero? Just return the original chain.
3157 if (ConstantSize->isNullValue())
3161 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3162 ConstantSize->getZExtValue(),
3163 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3164 if (Result.getNode())
3168 // Then check to see if we should lower the memcpy with target-specific
3169 // code. If the target chooses to do this, this is the next best.
3171 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3173 DstSV, DstSVOff, SrcSV, SrcSVOff);
3174 if (Result.getNode())
3177 // If we really need inline code and the target declined to provide it,
3178 // use a (potentially long) sequence of loads and stores.
3180 assert(ConstantSize && "AlwaysInline requires a constant size!");
3181 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3182 ConstantSize->getZExtValue(), Align, true,
3183 DstSV, DstSVOff, SrcSV, SrcSVOff);
3186 // Emit a library call.
3187 TargetLowering::ArgListTy Args;
3188 TargetLowering::ArgListEntry Entry;
3189 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3190 Entry.Node = Dst; Args.push_back(Entry);
3191 Entry.Node = Src; Args.push_back(Entry);
3192 Entry.Node = Size; Args.push_back(Entry);
3193 std::pair<SDValue,SDValue> CallResult =
3194 TLI.LowerCallTo(Chain, Type::VoidTy,
3195 false, false, false, false, CallingConv::C, false,
3196 getExternalSymbol("memcpy", TLI.getPointerTy()),
3198 return CallResult.second;
3201 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3202 SDValue Src, SDValue Size,
3204 const Value *DstSV, uint64_t DstSVOff,
3205 const Value *SrcSV, uint64_t SrcSVOff) {
3207 // Check to see if we should lower the memmove to loads and stores first.
3208 // For cases within the target-specified limits, this is the best choice.
3209 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3211 // Memmove with size zero? Just return the original chain.
3212 if (ConstantSize->isNullValue())
3216 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3217 ConstantSize->getZExtValue(),
3218 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3219 if (Result.getNode())
3223 // Then check to see if we should lower the memmove with target-specific
3224 // code. If the target chooses to do this, this is the next best.
3226 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3227 DstSV, DstSVOff, SrcSV, SrcSVOff);
3228 if (Result.getNode())
3231 // Emit a library call.
3232 TargetLowering::ArgListTy Args;
3233 TargetLowering::ArgListEntry Entry;
3234 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3235 Entry.Node = Dst; Args.push_back(Entry);
3236 Entry.Node = Src; Args.push_back(Entry);
3237 Entry.Node = Size; Args.push_back(Entry);
3238 std::pair<SDValue,SDValue> CallResult =
3239 TLI.LowerCallTo(Chain, Type::VoidTy,
3240 false, false, false, false, CallingConv::C, false,
3241 getExternalSymbol("memmove", TLI.getPointerTy()),
3243 return CallResult.second;
3246 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3247 SDValue Src, SDValue Size,
3249 const Value *DstSV, uint64_t DstSVOff) {
3251 // Check to see if we should lower the memset to stores first.
3252 // For cases within the target-specified limits, this is the best choice.
3253 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3255 // Memset with size zero? Just return the original chain.
3256 if (ConstantSize->isNullValue())
3260 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3261 Align, DstSV, DstSVOff);
3262 if (Result.getNode())
3266 // Then check to see if we should lower the memset with target-specific
3267 // code. If the target chooses to do this, this is the next best.
3269 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3271 if (Result.getNode())
3274 // Emit a library call.
3275 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3276 TargetLowering::ArgListTy Args;
3277 TargetLowering::ArgListEntry Entry;
3278 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3279 Args.push_back(Entry);
3280 // Extend or truncate the argument to be an i32 value for the call.
3281 if (Src.getValueType().bitsGT(MVT::i32))
3282 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3284 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3285 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3286 Args.push_back(Entry);
3287 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3288 Args.push_back(Entry);
3289 std::pair<SDValue,SDValue> CallResult =
3290 TLI.LowerCallTo(Chain, Type::VoidTy,
3291 false, false, false, false, CallingConv::C, false,
3292 getExternalSymbol("memset", TLI.getPointerTy()),
3294 return CallResult.second;
3297 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3299 SDValue Ptr, SDValue Cmp,
3300 SDValue Swp, const Value* PtrVal,
3301 unsigned Alignment) {
3302 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3303 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3305 MVT VT = Cmp.getValueType();
3307 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3308 Alignment = getMVTAlignment(MemVT);
3310 SDVTList VTs = getVTList(VT, MVT::Other);
3311 FoldingSetNodeID ID;
3312 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3313 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3315 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3316 return SDValue(E, 0);
3317 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3318 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3319 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3320 CSEMap.InsertNode(N, IP);
3321 AllNodes.push_back(N);
3322 return SDValue(N, 0);
3325 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3327 SDValue Ptr, SDValue Val,
3328 const Value* PtrVal,
3329 unsigned Alignment) {
3330 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3331 Opcode == ISD::ATOMIC_LOAD_SUB ||
3332 Opcode == ISD::ATOMIC_LOAD_AND ||
3333 Opcode == ISD::ATOMIC_LOAD_OR ||
3334 Opcode == ISD::ATOMIC_LOAD_XOR ||
3335 Opcode == ISD::ATOMIC_LOAD_NAND ||
3336 Opcode == ISD::ATOMIC_LOAD_MIN ||
3337 Opcode == ISD::ATOMIC_LOAD_MAX ||
3338 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3339 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3340 Opcode == ISD::ATOMIC_SWAP) &&
3341 "Invalid Atomic Op");
3343 MVT VT = Val.getValueType();
3345 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3346 Alignment = getMVTAlignment(MemVT);
3348 SDVTList VTs = getVTList(VT, MVT::Other);
3349 FoldingSetNodeID ID;
3350 SDValue Ops[] = {Chain, Ptr, Val};
3351 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3353 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3354 return SDValue(E, 0);
3355 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3356 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3357 Chain, Ptr, Val, PtrVal, Alignment);
3358 CSEMap.InsertNode(N, IP);
3359 AllNodes.push_back(N);
3360 return SDValue(N, 0);
3363 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3364 /// Allowed to return something different (and simpler) if Simplify is true.
3365 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3369 SmallVector<MVT, 4> VTs;
3370 VTs.reserve(NumOps);
3371 for (unsigned i = 0; i < NumOps; ++i)
3372 VTs.push_back(Ops[i].getValueType());
3373 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3377 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3378 const MVT *VTs, unsigned NumVTs,
3379 const SDValue *Ops, unsigned NumOps,
3380 MVT MemVT, const Value *srcValue, int SVOff,
3381 unsigned Align, bool Vol,
3382 bool ReadMem, bool WriteMem) {
3383 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3384 MemVT, srcValue, SVOff, Align, Vol,
3389 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3390 const SDValue *Ops, unsigned NumOps,
3391 MVT MemVT, const Value *srcValue, int SVOff,
3392 unsigned Align, bool Vol,
3393 bool ReadMem, bool WriteMem) {
3394 // Memoize the node unless it returns a flag.
3395 MemIntrinsicSDNode *N;
3396 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3397 FoldingSetNodeID ID;
3398 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3400 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3401 return SDValue(E, 0);
3403 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3404 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3405 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3406 CSEMap.InsertNode(N, IP);
3408 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3409 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3410 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3412 AllNodes.push_back(N);
3413 return SDValue(N, 0);
3417 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3418 bool IsInreg, SDVTList VTs,
3419 const SDValue *Operands, unsigned NumOperands) {
3420 // Do not include isTailCall in the folding set profile.
3421 FoldingSetNodeID ID;
3422 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3423 ID.AddInteger(CallingConv);
3424 ID.AddInteger(IsVarArgs);
3426 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3427 // Instead of including isTailCall in the folding set, we just
3428 // set the flag of the existing node.
3430 cast<CallSDNode>(E)->setNotTailCall();
3431 return SDValue(E, 0);
3433 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3434 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3435 VTs, Operands, NumOperands);
3436 CSEMap.InsertNode(N, IP);
3437 AllNodes.push_back(N);
3438 return SDValue(N, 0);
3442 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3443 MVT VT, SDValue Chain,
3444 SDValue Ptr, SDValue Offset,
3445 const Value *SV, int SVOffset, MVT EVT,
3446 bool isVolatile, unsigned Alignment) {
3447 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3448 Alignment = getMVTAlignment(VT);
3451 ExtType = ISD::NON_EXTLOAD;
3452 } else if (ExtType == ISD::NON_EXTLOAD) {
3453 assert(VT == EVT && "Non-extending load from different memory type!");
3457 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3458 "Invalid vector extload!");
3460 assert(EVT.bitsLT(VT) &&
3461 "Should only be an extending load, not truncating!");
3462 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3463 "Cannot sign/zero extend a FP/Vector load!");
3464 assert(VT.isInteger() == EVT.isInteger() &&
3465 "Cannot convert from FP to Int or Int -> FP!");
3468 bool Indexed = AM != ISD::UNINDEXED;
3469 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3470 "Unindexed load with an offset!");
3472 SDVTList VTs = Indexed ?
3473 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3474 SDValue Ops[] = { Chain, Ptr, Offset };
3475 FoldingSetNodeID ID;
3476 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3478 ID.AddInteger(ExtType);
3479 ID.AddInteger(EVT.getRawBits());
3480 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3482 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3483 return SDValue(E, 0);
3484 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3485 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3486 Alignment, isVolatile);
3487 CSEMap.InsertNode(N, IP);
3488 AllNodes.push_back(N);
3489 return SDValue(N, 0);
3492 SDValue SelectionDAG::getLoad(MVT VT,
3493 SDValue Chain, SDValue Ptr,
3494 const Value *SV, int SVOffset,
3495 bool isVolatile, unsigned Alignment) {
3496 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3497 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3498 SV, SVOffset, VT, isVolatile, Alignment);
3501 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3502 SDValue Chain, SDValue Ptr,
3504 int SVOffset, MVT EVT,
3505 bool isVolatile, unsigned Alignment) {
3506 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3507 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3508 SV, SVOffset, EVT, isVolatile, Alignment);
3512 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3513 SDValue Offset, ISD::MemIndexedMode AM) {
3514 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3515 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3516 "Load is already a indexed load!");
3517 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3518 LD->getChain(), Base, Offset, LD->getSrcValue(),
3519 LD->getSrcValueOffset(), LD->getMemoryVT(),
3520 LD->isVolatile(), LD->getAlignment());
3523 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3524 SDValue Ptr, const Value *SV, int SVOffset,
3525 bool isVolatile, unsigned Alignment) {
3526 MVT VT = Val.getValueType();
3528 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3529 Alignment = getMVTAlignment(VT);
3531 SDVTList VTs = getVTList(MVT::Other);
3532 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3533 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3534 FoldingSetNodeID ID;
3535 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3536 ID.AddInteger(ISD::UNINDEXED);
3537 ID.AddInteger(false);
3538 ID.AddInteger(VT.getRawBits());
3539 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3541 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3542 return SDValue(E, 0);
3543 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3544 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3545 VT, SV, SVOffset, Alignment, isVolatile);
3546 CSEMap.InsertNode(N, IP);
3547 AllNodes.push_back(N);
3548 return SDValue(N, 0);
3551 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3552 SDValue Ptr, const Value *SV,
3553 int SVOffset, MVT SVT,
3554 bool isVolatile, unsigned Alignment) {
3555 MVT VT = Val.getValueType();
3558 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3560 assert(VT.bitsGT(SVT) && "Not a truncation?");
3561 assert(VT.isInteger() == SVT.isInteger() &&
3562 "Can't do FP-INT conversion!");
3564 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3565 Alignment = getMVTAlignment(VT);
3567 SDVTList VTs = getVTList(MVT::Other);
3568 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3569 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3570 FoldingSetNodeID ID;
3571 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3572 ID.AddInteger(ISD::UNINDEXED);
3574 ID.AddInteger(SVT.getRawBits());
3575 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3577 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3578 return SDValue(E, 0);
3579 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3580 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3581 SVT, SV, SVOffset, Alignment, isVolatile);
3582 CSEMap.InsertNode(N, IP);
3583 AllNodes.push_back(N);
3584 return SDValue(N, 0);
3588 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3589 SDValue Offset, ISD::MemIndexedMode AM) {
3590 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3591 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3592 "Store is already a indexed store!");
3593 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3594 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3595 FoldingSetNodeID ID;
3596 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3598 ID.AddInteger(ST->isTruncatingStore());
3599 ID.AddInteger(ST->getMemoryVT().getRawBits());
3600 ID.AddInteger(ST->getRawFlags());
3602 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3603 return SDValue(E, 0);
3604 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3605 new (N) StoreSDNode(Ops, VTs, AM,
3606 ST->isTruncatingStore(), ST->getMemoryVT(),
3607 ST->getSrcValue(), ST->getSrcValueOffset(),
3608 ST->getAlignment(), ST->isVolatile());
3609 CSEMap.InsertNode(N, IP);
3610 AllNodes.push_back(N);
3611 return SDValue(N, 0);
3614 SDValue SelectionDAG::getVAArg(MVT VT,
3615 SDValue Chain, SDValue Ptr,
3617 SDValue Ops[] = { Chain, Ptr, SV };
3618 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3621 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3622 const SDUse *Ops, unsigned NumOps) {
3624 case 0: return getNode(Opcode, VT);
3625 case 1: return getNode(Opcode, VT, Ops[0]);
3626 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3627 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3631 // Copy from an SDUse array into an SDValue array for use with
3632 // the regular getNode logic.
3633 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3634 return getNode(Opcode, VT, &NewOps[0], NumOps);
3637 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3638 const SDValue *Ops, unsigned NumOps) {
3640 case 0: return getNode(Opcode, VT);
3641 case 1: return getNode(Opcode, VT, Ops[0]);
3642 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3643 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3649 case ISD::SELECT_CC: {
3650 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3651 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3652 "LHS and RHS of condition must have same type!");
3653 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3654 "True and False arms of SelectCC must have same type!");
3655 assert(Ops[2].getValueType() == VT &&
3656 "select_cc node must be of same type as true and false value!");
3660 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3661 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3662 "LHS/RHS of comparison should match types!");
3669 SDVTList VTs = getVTList(VT);
3670 if (VT != MVT::Flag) {
3671 FoldingSetNodeID ID;
3672 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3674 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3675 return SDValue(E, 0);
3676 N = NodeAllocator.Allocate<SDNode>();
3677 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3678 CSEMap.InsertNode(N, IP);
3680 N = NodeAllocator.Allocate<SDNode>();
3681 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3683 AllNodes.push_back(N);
3687 return SDValue(N, 0);
3690 SDValue SelectionDAG::getNode(unsigned Opcode,
3691 const std::vector<MVT> &ResultTys,
3692 const SDValue *Ops, unsigned NumOps) {
3693 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3697 SDValue SelectionDAG::getNode(unsigned Opcode,
3698 const MVT *VTs, unsigned NumVTs,
3699 const SDValue *Ops, unsigned NumOps) {
3701 return getNode(Opcode, VTs[0], Ops, NumOps);
3702 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3705 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3706 const SDValue *Ops, unsigned NumOps) {
3707 if (VTList.NumVTs == 1)
3708 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3711 // FIXME: figure out how to safely handle things like
3712 // int foo(int x) { return 1 << (x & 255); }
3713 // int bar() { return foo(256); }
3715 case ISD::SRA_PARTS:
3716 case ISD::SRL_PARTS:
3717 case ISD::SHL_PARTS:
3718 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3719 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3720 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3721 else if (N3.getOpcode() == ISD::AND)
3722 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3723 // If the and is only masking out bits that cannot effect the shift,
3724 // eliminate the and.
3725 unsigned NumBits = VT.getSizeInBits()*2;
3726 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3727 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3733 // Memoize the node unless it returns a flag.
3735 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3736 FoldingSetNodeID ID;
3737 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3739 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3740 return SDValue(E, 0);
3742 N = NodeAllocator.Allocate<UnarySDNode>();
3743 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3744 } else if (NumOps == 2) {
3745 N = NodeAllocator.Allocate<BinarySDNode>();
3746 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3747 } else if (NumOps == 3) {
3748 N = NodeAllocator.Allocate<TernarySDNode>();
3749 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3751 N = NodeAllocator.Allocate<SDNode>();
3752 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3754 CSEMap.InsertNode(N, IP);
3757 N = NodeAllocator.Allocate<UnarySDNode>();
3758 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3759 } else if (NumOps == 2) {
3760 N = NodeAllocator.Allocate<BinarySDNode>();
3761 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3762 } else if (NumOps == 3) {
3763 N = NodeAllocator.Allocate<TernarySDNode>();
3764 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3766 N = NodeAllocator.Allocate<SDNode>();
3767 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3770 AllNodes.push_back(N);
3774 return SDValue(N, 0);
3777 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3778 return getNode(Opcode, VTList, 0, 0);
3781 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3783 SDValue Ops[] = { N1 };
3784 return getNode(Opcode, VTList, Ops, 1);
3787 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3788 SDValue N1, SDValue N2) {
3789 SDValue Ops[] = { N1, N2 };
3790 return getNode(Opcode, VTList, Ops, 2);
3793 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3794 SDValue N1, SDValue N2, SDValue N3) {
3795 SDValue Ops[] = { N1, N2, N3 };
3796 return getNode(Opcode, VTList, Ops, 3);
3799 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3800 SDValue N1, SDValue N2, SDValue N3,
3802 SDValue Ops[] = { N1, N2, N3, N4 };
3803 return getNode(Opcode, VTList, Ops, 4);
3806 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3807 SDValue N1, SDValue N2, SDValue N3,
3808 SDValue N4, SDValue N5) {
3809 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3810 return getNode(Opcode, VTList, Ops, 5);
3813 SDVTList SelectionDAG::getVTList(MVT VT) {
3814 return makeVTList(SDNode::getValueTypeList(VT), 1);
3817 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3818 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3819 E = VTList.rend(); I != E; ++I)
3820 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3823 MVT *Array = Allocator.Allocate<MVT>(2);
3826 SDVTList Result = makeVTList(Array, 2);
3827 VTList.push_back(Result);
3831 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3832 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3833 E = VTList.rend(); I != E; ++I)
3834 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3838 MVT *Array = Allocator.Allocate<MVT>(3);
3842 SDVTList Result = makeVTList(Array, 3);
3843 VTList.push_back(Result);
3847 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3848 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3849 E = VTList.rend(); I != E; ++I)
3850 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3851 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3854 MVT *Array = Allocator.Allocate<MVT>(3);
3859 SDVTList Result = makeVTList(Array, 4);
3860 VTList.push_back(Result);
3864 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3866 case 0: assert(0 && "Cannot have nodes without results!");
3867 case 1: return getVTList(VTs[0]);
3868 case 2: return getVTList(VTs[0], VTs[1]);
3869 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3873 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3874 E = VTList.rend(); I != E; ++I) {
3875 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3878 bool NoMatch = false;
3879 for (unsigned i = 2; i != NumVTs; ++i)
3880 if (VTs[i] != I->VTs[i]) {
3888 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3889 std::copy(VTs, VTs+NumVTs, Array);
3890 SDVTList Result = makeVTList(Array, NumVTs);
3891 VTList.push_back(Result);
3896 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3897 /// specified operands. If the resultant node already exists in the DAG,
3898 /// this does not modify the specified node, instead it returns the node that
3899 /// already exists. If the resultant node does not exist in the DAG, the
3900 /// input node is returned. As a degenerate case, if you specify the same
3901 /// input operands as the node already has, the input node is returned.
3902 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3903 SDNode *N = InN.getNode();
3904 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3906 // Check to see if there is no change.
3907 if (Op == N->getOperand(0)) return InN;
3909 // See if the modified node already exists.
3910 void *InsertPos = 0;
3911 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3912 return SDValue(Existing, InN.getResNo());
3914 // Nope it doesn't. Remove the node from its current place in the maps.
3916 if (!RemoveNodeFromCSEMaps(N))
3919 // Now we update the operands.
3920 N->OperandList[0].set(Op);
3922 // If this gets put into a CSE map, add it.
3923 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3927 SDValue SelectionDAG::
3928 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3929 SDNode *N = InN.getNode();
3930 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3932 // Check to see if there is no change.
3933 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3934 return InN; // No operands changed, just return the input node.
3936 // See if the modified node already exists.
3937 void *InsertPos = 0;
3938 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3939 return SDValue(Existing, InN.getResNo());
3941 // Nope it doesn't. Remove the node from its current place in the maps.
3943 if (!RemoveNodeFromCSEMaps(N))
3946 // Now we update the operands.
3947 if (N->OperandList[0] != Op1)
3948 N->OperandList[0].set(Op1);
3949 if (N->OperandList[1] != Op2)
3950 N->OperandList[1].set(Op2);
3952 // If this gets put into a CSE map, add it.
3953 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3957 SDValue SelectionDAG::
3958 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3959 SDValue Ops[] = { Op1, Op2, Op3 };
3960 return UpdateNodeOperands(N, Ops, 3);
3963 SDValue SelectionDAG::
3964 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3965 SDValue Op3, SDValue Op4) {
3966 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3967 return UpdateNodeOperands(N, Ops, 4);
3970 SDValue SelectionDAG::
3971 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3972 SDValue Op3, SDValue Op4, SDValue Op5) {
3973 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3974 return UpdateNodeOperands(N, Ops, 5);
3977 SDValue SelectionDAG::
3978 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3979 SDNode *N = InN.getNode();
3980 assert(N->getNumOperands() == NumOps &&
3981 "Update with wrong number of operands");
3983 // Check to see if there is no change.
3984 bool AnyChange = false;
3985 for (unsigned i = 0; i != NumOps; ++i) {
3986 if (Ops[i] != N->getOperand(i)) {
3992 // No operands changed, just return the input node.
3993 if (!AnyChange) return InN;
3995 // See if the modified node already exists.
3996 void *InsertPos = 0;
3997 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3998 return SDValue(Existing, InN.getResNo());
4000 // Nope it doesn't. Remove the node from its current place in the maps.
4002 if (!RemoveNodeFromCSEMaps(N))
4005 // Now we update the operands.
4006 for (unsigned i = 0; i != NumOps; ++i)
4007 if (N->OperandList[i] != Ops[i])
4008 N->OperandList[i].set(Ops[i]);
4010 // If this gets put into a CSE map, add it.
4011 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4015 /// DropOperands - Release the operands and set this node to have
4017 void SDNode::DropOperands() {
4018 // Unlike the code in MorphNodeTo that does this, we don't need to
4019 // watch for dead nodes here.
4020 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4026 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4029 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4031 SDVTList VTs = getVTList(VT);
4032 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4035 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4036 MVT VT, SDValue Op1) {
4037 SDVTList VTs = getVTList(VT);
4038 SDValue Ops[] = { Op1 };
4039 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4042 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4043 MVT VT, SDValue Op1,
4045 SDVTList VTs = getVTList(VT);
4046 SDValue Ops[] = { Op1, Op2 };
4047 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4050 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4051 MVT VT, SDValue Op1,
4052 SDValue Op2, SDValue Op3) {
4053 SDVTList VTs = getVTList(VT);
4054 SDValue Ops[] = { Op1, Op2, Op3 };
4055 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4058 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4059 MVT VT, const SDValue *Ops,
4061 SDVTList VTs = getVTList(VT);
4062 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4065 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4066 MVT VT1, MVT VT2, const SDValue *Ops,
4068 SDVTList VTs = getVTList(VT1, VT2);
4069 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4072 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4074 SDVTList VTs = getVTList(VT1, VT2);
4075 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4078 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4079 MVT VT1, MVT VT2, MVT VT3,
4080 const SDValue *Ops, unsigned NumOps) {
4081 SDVTList VTs = getVTList(VT1, VT2, VT3);
4082 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4085 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4086 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4087 const SDValue *Ops, unsigned NumOps) {
4088 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4089 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4092 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4095 SDVTList VTs = getVTList(VT1, VT2);
4096 SDValue Ops[] = { Op1 };
4097 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4100 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4102 SDValue Op1, SDValue Op2) {
4103 SDVTList VTs = getVTList(VT1, VT2);
4104 SDValue Ops[] = { Op1, Op2 };
4105 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4108 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4110 SDValue Op1, SDValue Op2,
4112 SDVTList VTs = getVTList(VT1, VT2);
4113 SDValue Ops[] = { Op1, Op2, Op3 };
4114 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4117 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4118 MVT VT1, MVT VT2, MVT VT3,
4119 SDValue Op1, SDValue Op2,
4121 SDVTList VTs = getVTList(VT1, VT2, VT3);
4122 SDValue Ops[] = { Op1, Op2, Op3 };
4123 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4126 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4127 SDVTList VTs, const SDValue *Ops,
4129 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4132 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4134 SDVTList VTs = getVTList(VT);
4135 return MorphNodeTo(N, Opc, VTs, 0, 0);
4138 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4139 MVT VT, SDValue Op1) {
4140 SDVTList VTs = getVTList(VT);
4141 SDValue Ops[] = { Op1 };
4142 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4145 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4146 MVT VT, SDValue Op1,
4148 SDVTList VTs = getVTList(VT);
4149 SDValue Ops[] = { Op1, Op2 };
4150 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4153 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4154 MVT VT, SDValue Op1,
4155 SDValue Op2, SDValue Op3) {
4156 SDVTList VTs = getVTList(VT);
4157 SDValue Ops[] = { Op1, Op2, Op3 };
4158 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4161 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4162 MVT VT, const SDValue *Ops,
4164 SDVTList VTs = getVTList(VT);
4165 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4168 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4169 MVT VT1, MVT VT2, const SDValue *Ops,
4171 SDVTList VTs = getVTList(VT1, VT2);
4172 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4175 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4177 SDVTList VTs = getVTList(VT1, VT2);
4178 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4181 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4182 MVT VT1, MVT VT2, MVT VT3,
4183 const SDValue *Ops, unsigned NumOps) {
4184 SDVTList VTs = getVTList(VT1, VT2, VT3);
4185 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4188 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4191 SDVTList VTs = getVTList(VT1, VT2);
4192 SDValue Ops[] = { Op1 };
4193 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4196 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4198 SDValue Op1, SDValue Op2) {
4199 SDVTList VTs = getVTList(VT1, VT2);
4200 SDValue Ops[] = { Op1, Op2 };
4201 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4204 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4206 SDValue Op1, SDValue Op2,
4208 SDVTList VTs = getVTList(VT1, VT2);
4209 SDValue Ops[] = { Op1, Op2, Op3 };
4210 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4213 /// MorphNodeTo - These *mutate* the specified node to have the specified
4214 /// return type, opcode, and operands.
4216 /// Note that MorphNodeTo returns the resultant node. If there is already a
4217 /// node of the specified opcode and operands, it returns that node instead of
4218 /// the current one.
4220 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4221 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4222 /// node, and because it doesn't require CSE recalculation for any of
4223 /// the node's users.
4225 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4226 SDVTList VTs, const SDValue *Ops,
4228 // If an identical node already exists, use it.
4230 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4231 FoldingSetNodeID ID;
4232 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4233 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4237 if (!RemoveNodeFromCSEMaps(N))
4240 // Start the morphing.
4242 N->ValueList = VTs.VTs;
4243 N->NumValues = VTs.NumVTs;
4245 // Clear the operands list, updating used nodes to remove this from their
4246 // use list. Keep track of any operands that become dead as a result.
4247 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4248 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4250 SDNode *Used = Use.getNode();
4252 if (Used->use_empty())
4253 DeadNodeSet.insert(Used);
4256 // If NumOps is larger than the # of operands we currently have, reallocate
4257 // the operand list.
4258 if (NumOps > N->NumOperands) {
4259 if (N->OperandsNeedDelete)
4260 delete[] N->OperandList;
4262 if (N->isMachineOpcode()) {
4263 // We're creating a final node that will live unmorphed for the
4264 // remainder of the current SelectionDAG iteration, so we can allocate
4265 // the operands directly out of a pool with no recycling metadata.
4266 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4267 N->OperandsNeedDelete = false;
4269 N->OperandList = new SDUse[NumOps];
4270 N->OperandsNeedDelete = true;
4274 // Assign the new operands.
4275 N->NumOperands = NumOps;
4276 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4277 N->OperandList[i].setUser(N);
4278 N->OperandList[i].setInitial(Ops[i]);
4281 // Delete any nodes that are still dead after adding the uses for the
4283 SmallVector<SDNode *, 16> DeadNodes;
4284 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4285 E = DeadNodeSet.end(); I != E; ++I)
4286 if ((*I)->use_empty())
4287 DeadNodes.push_back(*I);
4288 RemoveDeadNodes(DeadNodes);
4291 CSEMap.InsertNode(N, IP); // Memoize the new node.
4296 /// getTargetNode - These are used for target selectors to create a new node
4297 /// with specified return type(s), target opcode, and operands.
4299 /// Note that getTargetNode returns the resultant node. If there is already a
4300 /// node of the specified opcode and operands, it returns that node instead of
4301 /// the current one.
4302 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4303 return getNode(~Opcode, VT).getNode();
4305 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4306 return getNode(~Opcode, VT, Op1).getNode();
4308 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4309 SDValue Op1, SDValue Op2) {
4310 return getNode(~Opcode, VT, Op1, Op2).getNode();
4312 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4313 SDValue Op1, SDValue Op2,
4315 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4317 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4318 const SDValue *Ops, unsigned NumOps) {
4319 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4321 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4322 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4324 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4326 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4327 MVT VT2, SDValue Op1) {
4328 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4329 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4331 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4332 MVT VT2, SDValue Op1,
4334 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4335 SDValue Ops[] = { Op1, Op2 };
4336 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4338 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4339 MVT VT2, SDValue Op1,
4340 SDValue Op2, SDValue Op3) {
4341 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4342 SDValue Ops[] = { Op1, Op2, Op3 };
4343 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4345 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4346 const SDValue *Ops, unsigned NumOps) {
4347 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4348 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4350 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4351 SDValue Op1, SDValue Op2) {
4352 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4353 SDValue Ops[] = { Op1, Op2 };
4354 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4356 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4357 SDValue Op1, SDValue Op2,
4359 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4360 SDValue Ops[] = { Op1, Op2, Op3 };
4361 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4363 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4364 const SDValue *Ops, unsigned NumOps) {
4365 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4366 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4368 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4369 MVT VT2, MVT VT3, MVT VT4,
4370 const SDValue *Ops, unsigned NumOps) {
4371 std::vector<MVT> VTList;
4372 VTList.push_back(VT1);
4373 VTList.push_back(VT2);
4374 VTList.push_back(VT3);
4375 VTList.push_back(VT4);
4376 const MVT *VTs = getNodeValueTypes(VTList);
4377 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4379 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4380 const std::vector<MVT> &ResultTys,
4381 const SDValue *Ops, unsigned NumOps) {
4382 const MVT *VTs = getNodeValueTypes(ResultTys);
4383 return getNode(~Opcode, VTs, ResultTys.size(),
4384 Ops, NumOps).getNode();
4387 /// getNodeIfExists - Get the specified node if it's already available, or
4388 /// else return NULL.
4389 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4390 const SDValue *Ops, unsigned NumOps) {
4391 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4392 FoldingSetNodeID ID;
4393 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4401 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4402 /// This can cause recursive merging of nodes in the DAG.
4404 /// This version assumes From has a single result value.
4406 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4407 DAGUpdateListener *UpdateListener) {
4408 SDNode *From = FromN.getNode();
4409 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4410 "Cannot replace with this method!");
4411 assert(From != To.getNode() && "Cannot replace uses of with self");
4413 // Iterate over all the existing uses of From. New uses will be added
4414 // to the beginning of the use list, which we avoid visiting.
4415 // This specifically avoids visiting uses of From that arise while the
4416 // replacement is happening, because any such uses would be the result
4417 // of CSE: If an existing node looks like From after one of its operands
4418 // is replaced by To, we don't want to replace of all its users with To
4419 // too. See PR3018 for more info.
4420 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4424 // This node is about to morph, remove its old self from the CSE maps.
4425 RemoveNodeFromCSEMaps(User);
4427 // A user can appear in a use list multiple times, and when this
4428 // happens the uses are usually next to each other in the list.
4429 // To help reduce the number of CSE recomputations, process all
4430 // the uses of this user that we can find this way.
4432 SDUse &Use = UI.getUse();
4435 } while (UI != UE && *UI == User);
4437 // Now that we have modified User, add it back to the CSE maps. If it
4438 // already exists there, recursively merge the results together.
4439 AddModifiedNodeToCSEMaps(User, UpdateListener);
4443 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4444 /// This can cause recursive merging of nodes in the DAG.
4446 /// This version assumes From/To have matching types and numbers of result
4449 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4450 DAGUpdateListener *UpdateListener) {
4451 assert(From->getVTList().VTs == To->getVTList().VTs &&
4452 From->getNumValues() == To->getNumValues() &&
4453 "Cannot use this version of ReplaceAllUsesWith!");
4455 // Handle the trivial case.
4459 // Iterate over just the existing users of From. See the comments in
4460 // the ReplaceAllUsesWith above.
4461 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4465 // This node is about to morph, remove its old self from the CSE maps.
4466 RemoveNodeFromCSEMaps(User);
4468 // A user can appear in a use list multiple times, and when this
4469 // happens the uses are usually next to each other in the list.
4470 // To help reduce the number of CSE recomputations, process all
4471 // the uses of this user that we can find this way.
4473 SDUse &Use = UI.getUse();
4476 } while (UI != UE && *UI == User);
4478 // Now that we have modified User, add it back to the CSE maps. If it
4479 // already exists there, recursively merge the results together.
4480 AddModifiedNodeToCSEMaps(User, UpdateListener);
4484 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4485 /// This can cause recursive merging of nodes in the DAG.
4487 /// This version can replace From with any result values. To must match the
4488 /// number and types of values returned by From.
4489 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4491 DAGUpdateListener *UpdateListener) {
4492 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4493 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4495 // Iterate over just the existing users of From. See the comments in
4496 // the ReplaceAllUsesWith above.
4497 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4501 // This node is about to morph, remove its old self from the CSE maps.
4502 RemoveNodeFromCSEMaps(User);
4504 // A user can appear in a use list multiple times, and when this
4505 // happens the uses are usually next to each other in the list.
4506 // To help reduce the number of CSE recomputations, process all
4507 // the uses of this user that we can find this way.
4509 SDUse &Use = UI.getUse();
4510 const SDValue &ToOp = To[Use.getResNo()];
4513 } while (UI != UE && *UI == User);
4515 // Now that we have modified User, add it back to the CSE maps. If it
4516 // already exists there, recursively merge the results together.
4517 AddModifiedNodeToCSEMaps(User, UpdateListener);
4521 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4522 /// uses of other values produced by From.getNode() alone. The Deleted
4523 /// vector is handled the same way as for ReplaceAllUsesWith.
4524 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4525 DAGUpdateListener *UpdateListener){
4526 // Handle the really simple, really trivial case efficiently.
4527 if (From == To) return;
4529 // Handle the simple, trivial, case efficiently.
4530 if (From.getNode()->getNumValues() == 1) {
4531 ReplaceAllUsesWith(From, To, UpdateListener);
4535 // Iterate over just the existing users of From. See the comments in
4536 // the ReplaceAllUsesWith above.
4537 SDNode::use_iterator UI = From.getNode()->use_begin(),
4538 UE = From.getNode()->use_end();
4541 bool UserRemovedFromCSEMaps = false;
4543 // A user can appear in a use list multiple times, and when this
4544 // happens the uses are usually next to each other in the list.
4545 // To help reduce the number of CSE recomputations, process all
4546 // the uses of this user that we can find this way.
4548 SDUse &Use = UI.getUse();
4550 // Skip uses of different values from the same node.
4551 if (Use.getResNo() != From.getResNo()) {
4556 // If this node hasn't been modified yet, it's still in the CSE maps,
4557 // so remove its old self from the CSE maps.
4558 if (!UserRemovedFromCSEMaps) {
4559 RemoveNodeFromCSEMaps(User);
4560 UserRemovedFromCSEMaps = true;
4565 } while (UI != UE && *UI == User);
4567 // We are iterating over all uses of the From node, so if a use
4568 // doesn't use the specific value, no changes are made.
4569 if (!UserRemovedFromCSEMaps)
4572 // Now that we have modified User, add it back to the CSE maps. If it
4573 // already exists there, recursively merge the results together.
4574 AddModifiedNodeToCSEMaps(User, UpdateListener);
4579 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4580 /// to record information about a use.
4587 /// operator< - Sort Memos by User.
4588 bool operator<(const UseMemo &L, const UseMemo &R) {
4589 return (intptr_t)L.User < (intptr_t)R.User;
4593 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4594 /// uses of other values produced by From.getNode() alone. The same value
4595 /// may appear in both the From and To list. The Deleted vector is
4596 /// handled the same way as for ReplaceAllUsesWith.
4597 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4600 DAGUpdateListener *UpdateListener){
4601 // Handle the simple, trivial case efficiently.
4603 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4605 // Read up all the uses and make records of them. This helps
4606 // processing new uses that are introduced during the
4607 // replacement process.
4608 SmallVector<UseMemo, 4> Uses;
4609 for (unsigned i = 0; i != Num; ++i) {
4610 unsigned FromResNo = From[i].getResNo();
4611 SDNode *FromNode = From[i].getNode();
4612 for (SDNode::use_iterator UI = FromNode->use_begin(),
4613 E = FromNode->use_end(); UI != E; ++UI) {
4614 SDUse &Use = UI.getUse();
4615 if (Use.getResNo() == FromResNo) {
4616 UseMemo Memo = { *UI, i, &Use };
4617 Uses.push_back(Memo);
4622 // Sort the uses, so that all the uses from a given User are together.
4623 std::sort(Uses.begin(), Uses.end());
4625 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4626 UseIndex != UseIndexEnd; ) {
4627 // We know that this user uses some value of From. If it is the right
4628 // value, update it.
4629 SDNode *User = Uses[UseIndex].User;
4631 // This node is about to morph, remove its old self from the CSE maps.
4632 RemoveNodeFromCSEMaps(User);
4634 // The Uses array is sorted, so all the uses for a given User
4635 // are next to each other in the list.
4636 // To help reduce the number of CSE recomputations, process all
4637 // the uses of this user that we can find this way.
4639 unsigned i = Uses[UseIndex].Index;
4640 SDUse &Use = *Uses[UseIndex].Use;
4644 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4646 // Now that we have modified User, add it back to the CSE maps. If it
4647 // already exists there, recursively merge the results together.
4648 AddModifiedNodeToCSEMaps(User, UpdateListener);
4652 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4653 /// based on their topological order. It returns the maximum id and a vector
4654 /// of the SDNodes* in assigned order by reference.
4655 unsigned SelectionDAG::AssignTopologicalOrder() {
4657 unsigned DAGSize = 0;
4659 // SortedPos tracks the progress of the algorithm. Nodes before it are
4660 // sorted, nodes after it are unsorted. When the algorithm completes
4661 // it is at the end of the list.
4662 allnodes_iterator SortedPos = allnodes_begin();
4664 // Visit all the nodes. Move nodes with no operands to the front of
4665 // the list immediately. Annotate nodes that do have operands with their
4666 // operand count. Before we do this, the Node Id fields of the nodes
4667 // may contain arbitrary values. After, the Node Id fields for nodes
4668 // before SortedPos will contain the topological sort index, and the
4669 // Node Id fields for nodes At SortedPos and after will contain the
4670 // count of outstanding operands.
4671 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4673 unsigned Degree = N->getNumOperands();
4675 // A node with no uses, add it to the result array immediately.
4676 N->setNodeId(DAGSize++);
4677 allnodes_iterator Q = N;
4679 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4682 // Temporarily use the Node Id as scratch space for the degree count.
4683 N->setNodeId(Degree);
4687 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4688 // such that by the time the end is reached all nodes will be sorted.
4689 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4691 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4694 unsigned Degree = P->getNodeId();
4697 // All of P's operands are sorted, so P may sorted now.
4698 P->setNodeId(DAGSize++);
4700 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4703 // Update P's outstanding operand count.
4704 P->setNodeId(Degree);
4709 assert(SortedPos == AllNodes.end() &&
4710 "Topological sort incomplete!");
4711 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4712 "First node in topological sort is not the entry token!");
4713 assert(AllNodes.front().getNodeId() == 0 &&
4714 "First node in topological sort has non-zero id!");
4715 assert(AllNodes.front().getNumOperands() == 0 &&
4716 "First node in topological sort has operands!");
4717 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4718 "Last node in topologic sort has unexpected id!");
4719 assert(AllNodes.back().use_empty() &&
4720 "Last node in topologic sort has users!");
4721 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4727 //===----------------------------------------------------------------------===//
4729 //===----------------------------------------------------------------------===//
4731 HandleSDNode::~HandleSDNode() {
4735 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4737 : SDNode(isa<GlobalVariable>(GA) &&
4738 cast<GlobalVariable>(GA)->isThreadLocal() ?
4740 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4742 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4743 getSDVTList(VT)), Offset(o) {
4744 TheGlobal = const_cast<GlobalValue*>(GA);
4747 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4748 const Value *srcValue, int SVO,
4749 unsigned alignment, bool vol)
4750 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4751 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4753 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4754 assert(getAlignment() == alignment && "Alignment representation error!");
4755 assert(isVolatile() == vol && "Volatile representation error!");
4758 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4759 unsigned NumOps, MVT memvt, const Value *srcValue,
4760 int SVO, unsigned alignment, bool vol)
4761 : SDNode(Opc, VTs, Ops, NumOps),
4762 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4763 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4764 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4765 assert(getAlignment() == alignment && "Alignment representation error!");
4766 assert(isVolatile() == vol && "Volatile representation error!");
4769 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4770 const Value *srcValue, int SVO,
4771 unsigned alignment, bool vol)
4772 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4773 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4775 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4776 assert(getAlignment() == alignment && "Alignment representation error!");
4777 assert(isVolatile() == vol && "Volatile representation error!");
4780 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4782 unsigned NumOps, MVT memvt, const Value *srcValue,
4783 int SVO, unsigned alignment, bool vol)
4784 : SDNode(Opc, dl, VTs, Ops, NumOps),
4785 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4786 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4787 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4788 assert(getAlignment() == alignment && "Alignment representation error!");
4789 assert(isVolatile() == vol && "Volatile representation error!");
4792 /// getMemOperand - Return a MachineMemOperand object describing the memory
4793 /// reference performed by this memory reference.
4794 MachineMemOperand MemSDNode::getMemOperand() const {
4796 if (isa<LoadSDNode>(this))
4797 Flags = MachineMemOperand::MOLoad;
4798 else if (isa<StoreSDNode>(this))
4799 Flags = MachineMemOperand::MOStore;
4800 else if (isa<AtomicSDNode>(this)) {
4801 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4804 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4805 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4806 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4807 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4810 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4811 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4813 // Check if the memory reference references a frame index
4814 const FrameIndexSDNode *FI =
4815 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4816 if (!getSrcValue() && FI)
4817 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4818 Flags, 0, Size, getAlignment());
4820 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4821 Size, getAlignment());
4824 /// Profile - Gather unique data for the node.
4826 void SDNode::Profile(FoldingSetNodeID &ID) const {
4827 AddNodeIDNode(ID, this);
4830 /// getValueTypeList - Return a pointer to the specified value type.
4832 const MVT *SDNode::getValueTypeList(MVT VT) {
4833 if (VT.isExtended()) {
4834 static std::set<MVT, MVT::compareRawBits> EVTs;
4835 return &(*EVTs.insert(VT).first);
4837 static MVT VTs[MVT::LAST_VALUETYPE];
4838 VTs[VT.getSimpleVT()] = VT;
4839 return &VTs[VT.getSimpleVT()];
4843 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4844 /// indicated value. This method ignores uses of other values defined by this
4846 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4847 assert(Value < getNumValues() && "Bad value!");
4849 // TODO: Only iterate over uses of a given value of the node
4850 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4851 if (UI.getUse().getResNo() == Value) {
4858 // Found exactly the right number of uses?
4863 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4864 /// value. This method ignores uses of other values defined by this operation.
4865 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4866 assert(Value < getNumValues() && "Bad value!");
4868 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4869 if (UI.getUse().getResNo() == Value)
4876 /// isOnlyUserOf - Return true if this node is the only use of N.
4878 bool SDNode::isOnlyUserOf(SDNode *N) const {
4880 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4891 /// isOperand - Return true if this node is an operand of N.
4893 bool SDValue::isOperandOf(SDNode *N) const {
4894 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4895 if (*this == N->getOperand(i))
4900 bool SDNode::isOperandOf(SDNode *N) const {
4901 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4902 if (this == N->OperandList[i].getNode())
4907 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4908 /// be a chain) reaches the specified operand without crossing any
4909 /// side-effecting instructions. In practice, this looks through token
4910 /// factors and non-volatile loads. In order to remain efficient, this only
4911 /// looks a couple of nodes in, it does not do an exhaustive search.
4912 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4913 unsigned Depth) const {
4914 if (*this == Dest) return true;
4916 // Don't search too deeply, we just want to be able to see through
4917 // TokenFactor's etc.
4918 if (Depth == 0) return false;
4920 // If this is a token factor, all inputs to the TF happen in parallel. If any
4921 // of the operands of the TF reach dest, then we can do the xform.
4922 if (getOpcode() == ISD::TokenFactor) {
4923 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4924 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4929 // Loads don't have side effects, look through them.
4930 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4931 if (!Ld->isVolatile())
4932 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4938 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4939 SmallPtrSet<SDNode *, 32> &Visited) {
4940 if (found || !Visited.insert(N))
4943 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4944 SDNode *Op = N->getOperand(i).getNode();
4949 findPredecessor(Op, P, found, Visited);
4953 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4954 /// is either an operand of N or it can be reached by recursively traversing
4955 /// up the operands.
4956 /// NOTE: this is an expensive method. Use it carefully.
4957 bool SDNode::isPredecessorOf(SDNode *N) const {
4958 SmallPtrSet<SDNode *, 32> Visited;
4960 findPredecessor(N, this, found, Visited);
4964 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4965 assert(Num < NumOperands && "Invalid child # of SDNode!");
4966 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4969 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4970 switch (getOpcode()) {
4972 if (getOpcode() < ISD::BUILTIN_OP_END)
4973 return "<<Unknown DAG Node>>";
4974 if (isMachineOpcode()) {
4976 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4977 if (getMachineOpcode() < TII->getNumOpcodes())
4978 return TII->get(getMachineOpcode()).getName();
4979 return "<<Unknown Machine Node>>";
4982 const TargetLowering &TLI = G->getTargetLoweringInfo();
4983 const char *Name = TLI.getTargetNodeName(getOpcode());
4984 if (Name) return Name;
4985 return "<<Unknown Target Node>>";
4987 return "<<Unknown Node>>";
4990 case ISD::DELETED_NODE:
4991 return "<<Deleted Node!>>";
4993 case ISD::PREFETCH: return "Prefetch";
4994 case ISD::MEMBARRIER: return "MemBarrier";
4995 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
4996 case ISD::ATOMIC_SWAP: return "AtomicSwap";
4997 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
4998 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
4999 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5000 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5001 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5002 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5003 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5004 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5005 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5006 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5007 case ISD::PCMARKER: return "PCMarker";
5008 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5009 case ISD::SRCVALUE: return "SrcValue";
5010 case ISD::MEMOPERAND: return "MemOperand";
5011 case ISD::EntryToken: return "EntryToken";
5012 case ISD::TokenFactor: return "TokenFactor";
5013 case ISD::AssertSext: return "AssertSext";
5014 case ISD::AssertZext: return "AssertZext";
5016 case ISD::BasicBlock: return "BasicBlock";
5017 case ISD::ARG_FLAGS: return "ArgFlags";
5018 case ISD::VALUETYPE: return "ValueType";
5019 case ISD::Register: return "Register";
5021 case ISD::Constant: return "Constant";
5022 case ISD::ConstantFP: return "ConstantFP";
5023 case ISD::GlobalAddress: return "GlobalAddress";
5024 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5025 case ISD::FrameIndex: return "FrameIndex";
5026 case ISD::JumpTable: return "JumpTable";
5027 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5028 case ISD::RETURNADDR: return "RETURNADDR";
5029 case ISD::FRAMEADDR: return "FRAMEADDR";
5030 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5031 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5032 case ISD::EHSELECTION: return "EHSELECTION";
5033 case ISD::EH_RETURN: return "EH_RETURN";
5034 case ISD::ConstantPool: return "ConstantPool";
5035 case ISD::ExternalSymbol: return "ExternalSymbol";
5036 case ISD::INTRINSIC_WO_CHAIN: {
5037 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5038 return Intrinsic::getName((Intrinsic::ID)IID);
5040 case ISD::INTRINSIC_VOID:
5041 case ISD::INTRINSIC_W_CHAIN: {
5042 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5043 return Intrinsic::getName((Intrinsic::ID)IID);
5046 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5047 case ISD::TargetConstant: return "TargetConstant";
5048 case ISD::TargetConstantFP:return "TargetConstantFP";
5049 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5050 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5051 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5052 case ISD::TargetJumpTable: return "TargetJumpTable";
5053 case ISD::TargetConstantPool: return "TargetConstantPool";
5054 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5056 case ISD::CopyToReg: return "CopyToReg";
5057 case ISD::CopyFromReg: return "CopyFromReg";
5058 case ISD::UNDEF: return "undef";
5059 case ISD::MERGE_VALUES: return "merge_values";
5060 case ISD::INLINEASM: return "inlineasm";
5061 case ISD::DBG_LABEL: return "dbg_label";
5062 case ISD::EH_LABEL: return "eh_label";
5063 case ISD::DECLARE: return "declare";
5064 case ISD::HANDLENODE: return "handlenode";
5065 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5066 case ISD::CALL: return "call";
5069 case ISD::FABS: return "fabs";
5070 case ISD::FNEG: return "fneg";
5071 case ISD::FSQRT: return "fsqrt";
5072 case ISD::FSIN: return "fsin";
5073 case ISD::FCOS: return "fcos";
5074 case ISD::FPOWI: return "fpowi";
5075 case ISD::FPOW: return "fpow";
5076 case ISD::FTRUNC: return "ftrunc";
5077 case ISD::FFLOOR: return "ffloor";
5078 case ISD::FCEIL: return "fceil";
5079 case ISD::FRINT: return "frint";
5080 case ISD::FNEARBYINT: return "fnearbyint";
5083 case ISD::ADD: return "add";
5084 case ISD::SUB: return "sub";
5085 case ISD::MUL: return "mul";
5086 case ISD::MULHU: return "mulhu";
5087 case ISD::MULHS: return "mulhs";
5088 case ISD::SDIV: return "sdiv";
5089 case ISD::UDIV: return "udiv";
5090 case ISD::SREM: return "srem";
5091 case ISD::UREM: return "urem";
5092 case ISD::SMUL_LOHI: return "smul_lohi";
5093 case ISD::UMUL_LOHI: return "umul_lohi";
5094 case ISD::SDIVREM: return "sdivrem";
5095 case ISD::UDIVREM: return "udivrem";
5096 case ISD::AND: return "and";
5097 case ISD::OR: return "or";
5098 case ISD::XOR: return "xor";
5099 case ISD::SHL: return "shl";
5100 case ISD::SRA: return "sra";
5101 case ISD::SRL: return "srl";
5102 case ISD::ROTL: return "rotl";
5103 case ISD::ROTR: return "rotr";
5104 case ISD::FADD: return "fadd";
5105 case ISD::FSUB: return "fsub";
5106 case ISD::FMUL: return "fmul";
5107 case ISD::FDIV: return "fdiv";
5108 case ISD::FREM: return "frem";
5109 case ISD::FCOPYSIGN: return "fcopysign";
5110 case ISD::FGETSIGN: return "fgetsign";
5112 case ISD::SETCC: return "setcc";
5113 case ISD::VSETCC: return "vsetcc";
5114 case ISD::SELECT: return "select";
5115 case ISD::SELECT_CC: return "select_cc";
5116 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5117 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5118 case ISD::CONCAT_VECTORS: return "concat_vectors";
5119 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5120 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5121 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5122 case ISD::CARRY_FALSE: return "carry_false";
5123 case ISD::ADDC: return "addc";
5124 case ISD::ADDE: return "adde";
5125 case ISD::SADDO: return "saddo";
5126 case ISD::UADDO: return "uaddo";
5127 case ISD::SSUBO: return "ssubo";
5128 case ISD::USUBO: return "usubo";
5129 case ISD::SMULO: return "smulo";
5130 case ISD::UMULO: return "umulo";
5131 case ISD::SUBC: return "subc";
5132 case ISD::SUBE: return "sube";
5133 case ISD::SHL_PARTS: return "shl_parts";
5134 case ISD::SRA_PARTS: return "sra_parts";
5135 case ISD::SRL_PARTS: return "srl_parts";
5137 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5138 case ISD::INSERT_SUBREG: return "insert_subreg";
5140 // Conversion operators.
5141 case ISD::SIGN_EXTEND: return "sign_extend";
5142 case ISD::ZERO_EXTEND: return "zero_extend";
5143 case ISD::ANY_EXTEND: return "any_extend";
5144 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5145 case ISD::TRUNCATE: return "truncate";
5146 case ISD::FP_ROUND: return "fp_round";
5147 case ISD::FLT_ROUNDS_: return "flt_rounds";
5148 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5149 case ISD::FP_EXTEND: return "fp_extend";
5151 case ISD::SINT_TO_FP: return "sint_to_fp";
5152 case ISD::UINT_TO_FP: return "uint_to_fp";
5153 case ISD::FP_TO_SINT: return "fp_to_sint";
5154 case ISD::FP_TO_UINT: return "fp_to_uint";
5155 case ISD::BIT_CONVERT: return "bit_convert";
5157 case ISD::CONVERT_RNDSAT: {
5158 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5159 default: assert(0 && "Unknown cvt code!");
5160 case ISD::CVT_FF: return "cvt_ff";
5161 case ISD::CVT_FS: return "cvt_fs";
5162 case ISD::CVT_FU: return "cvt_fu";
5163 case ISD::CVT_SF: return "cvt_sf";
5164 case ISD::CVT_UF: return "cvt_uf";
5165 case ISD::CVT_SS: return "cvt_ss";
5166 case ISD::CVT_SU: return "cvt_su";
5167 case ISD::CVT_US: return "cvt_us";
5168 case ISD::CVT_UU: return "cvt_uu";
5172 // Control flow instructions
5173 case ISD::BR: return "br";
5174 case ISD::BRIND: return "brind";
5175 case ISD::BR_JT: return "br_jt";
5176 case ISD::BRCOND: return "brcond";
5177 case ISD::BR_CC: return "br_cc";
5178 case ISD::RET: return "ret";
5179 case ISD::CALLSEQ_START: return "callseq_start";
5180 case ISD::CALLSEQ_END: return "callseq_end";
5183 case ISD::LOAD: return "load";
5184 case ISD::STORE: return "store";
5185 case ISD::VAARG: return "vaarg";
5186 case ISD::VACOPY: return "vacopy";
5187 case ISD::VAEND: return "vaend";
5188 case ISD::VASTART: return "vastart";
5189 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5190 case ISD::EXTRACT_ELEMENT: return "extract_element";
5191 case ISD::BUILD_PAIR: return "build_pair";
5192 case ISD::STACKSAVE: return "stacksave";
5193 case ISD::STACKRESTORE: return "stackrestore";
5194 case ISD::TRAP: return "trap";
5197 case ISD::BSWAP: return "bswap";
5198 case ISD::CTPOP: return "ctpop";
5199 case ISD::CTTZ: return "cttz";
5200 case ISD::CTLZ: return "ctlz";
5203 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5204 case ISD::DEBUG_LOC: return "debug_loc";
5207 case ISD::TRAMPOLINE: return "trampoline";
5210 switch (cast<CondCodeSDNode>(this)->get()) {
5211 default: assert(0 && "Unknown setcc condition!");
5212 case ISD::SETOEQ: return "setoeq";
5213 case ISD::SETOGT: return "setogt";
5214 case ISD::SETOGE: return "setoge";
5215 case ISD::SETOLT: return "setolt";
5216 case ISD::SETOLE: return "setole";
5217 case ISD::SETONE: return "setone";
5219 case ISD::SETO: return "seto";
5220 case ISD::SETUO: return "setuo";
5221 case ISD::SETUEQ: return "setue";
5222 case ISD::SETUGT: return "setugt";
5223 case ISD::SETUGE: return "setuge";
5224 case ISD::SETULT: return "setult";
5225 case ISD::SETULE: return "setule";
5226 case ISD::SETUNE: return "setune";
5228 case ISD::SETEQ: return "seteq";
5229 case ISD::SETGT: return "setgt";
5230 case ISD::SETGE: return "setge";
5231 case ISD::SETLT: return "setlt";
5232 case ISD::SETLE: return "setle";
5233 case ISD::SETNE: return "setne";
5238 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5247 return "<post-inc>";
5249 return "<post-dec>";
5253 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5254 std::string S = "< ";
5268 if (getByValAlign())
5269 S += "byval-align:" + utostr(getByValAlign()) + " ";
5271 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5273 S += "byval-size:" + utostr(getByValSize()) + " ";
5277 void SDNode::dump() const { dump(0); }
5278 void SDNode::dump(const SelectionDAG *G) const {
5283 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5284 OS << (void*)this << ": ";
5286 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5288 if (getValueType(i) == MVT::Other)
5291 OS << getValueType(i).getMVTString();
5293 OS << " = " << getOperationName(G);
5296 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5298 OS << (void*)getOperand(i).getNode();
5299 if (unsigned RN = getOperand(i).getResNo())
5303 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5304 SDNode *Mask = getOperand(2).getNode();
5306 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5308 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5311 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5316 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5317 OS << '<' << CSDN->getAPIntValue() << '>';
5318 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5319 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5320 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5321 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5322 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5325 CSDN->getValueAPF().bitcastToAPInt().dump();
5328 } else if (const GlobalAddressSDNode *GADN =
5329 dyn_cast<GlobalAddressSDNode>(this)) {
5330 int64_t offset = GADN->getOffset();
5332 WriteAsOperand(OS, GADN->getGlobal());
5335 OS << " + " << offset;
5337 OS << " " << offset;
5338 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5339 OS << "<" << FIDN->getIndex() << ">";
5340 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5341 OS << "<" << JTDN->getIndex() << ">";
5342 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5343 int offset = CP->getOffset();
5344 if (CP->isMachineConstantPoolEntry())
5345 OS << "<" << *CP->getMachineCPVal() << ">";
5347 OS << "<" << *CP->getConstVal() << ">";
5349 OS << " + " << offset;
5351 OS << " " << offset;
5352 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5354 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5356 OS << LBB->getName() << " ";
5357 OS << (const void*)BBDN->getBasicBlock() << ">";
5358 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5359 if (G && R->getReg() &&
5360 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5361 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5363 OS << " #" << R->getReg();
5365 } else if (const ExternalSymbolSDNode *ES =
5366 dyn_cast<ExternalSymbolSDNode>(this)) {
5367 OS << "'" << ES->getSymbol() << "'";
5368 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5370 OS << "<" << M->getValue() << ">";
5373 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5374 if (M->MO.getValue())
5375 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5377 OS << "<null:" << M->MO.getOffset() << ">";
5378 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5379 OS << N->getArgFlags().getArgFlagsString();
5380 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5381 OS << ":" << N->getVT().getMVTString();
5383 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5384 const Value *SrcValue = LD->getSrcValue();
5385 int SrcOffset = LD->getSrcValueOffset();
5391 OS << ":" << SrcOffset << ">";
5394 switch (LD->getExtensionType()) {
5395 default: doExt = false; break;
5396 case ISD::EXTLOAD: OS << " <anyext "; break;
5397 case ISD::SEXTLOAD: OS << " <sext "; break;
5398 case ISD::ZEXTLOAD: OS << " <zext "; break;
5401 OS << LD->getMemoryVT().getMVTString() << ">";
5403 const char *AM = getIndexedModeName(LD->getAddressingMode());
5406 if (LD->isVolatile())
5407 OS << " <volatile>";
5408 OS << " alignment=" << LD->getAlignment();
5409 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5410 const Value *SrcValue = ST->getSrcValue();
5411 int SrcOffset = ST->getSrcValueOffset();
5417 OS << ":" << SrcOffset << ">";
5419 if (ST->isTruncatingStore())
5420 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5422 const char *AM = getIndexedModeName(ST->getAddressingMode());
5425 if (ST->isVolatile())
5426 OS << " <volatile>";
5427 OS << " alignment=" << ST->getAlignment();
5428 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5429 const Value *SrcValue = AT->getSrcValue();
5430 int SrcOffset = AT->getSrcValueOffset();
5436 OS << ":" << SrcOffset << ">";
5437 if (AT->isVolatile())
5438 OS << " <volatile>";
5439 OS << " alignment=" << AT->getAlignment();
5443 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5444 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5445 if (N->getOperand(i).getNode()->hasOneUse())
5446 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5448 cerr << "\n" << std::string(indent+2, ' ')
5449 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5452 cerr << "\n" << std::string(indent, ' ');
5456 void SelectionDAG::dump() const {
5457 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5459 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5461 const SDNode *N = I;
5462 if (!N->hasOneUse() && N != getRoot().getNode())
5463 DumpNodes(N, 2, this);
5466 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5471 const Type *ConstantPoolSDNode::getType() const {
5472 if (isMachineConstantPoolEntry())
5473 return Val.MachineCPVal->getType();
5474 return Val.ConstVal->getType();