1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "llvm/Constants.h"
17 #include "llvm/Analysis/ValueTracking.h"
18 #include "llvm/Function.h"
19 #include "llvm/GlobalAlias.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Intrinsics.h"
22 #include "llvm/DerivedTypes.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetFrameInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Target/TargetIntrinsicInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Support/CommandLine.h"
39 #include "llvm/Support/Debug.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/ManagedStatic.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/System/Mutex.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallPtrSet.h"
47 #include "llvm/ADT/SmallSet.h"
48 #include "llvm/ADT/SmallVector.h"
49 #include "llvm/ADT/StringExtras.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
62 switch (VT.getSimpleVT().SimpleTy) {
63 default: llvm_unreachable("Unknown FP format");
64 case MVT::f32: return &APFloat::IEEEsingle;
65 case MVT::f64: return &APFloat::IEEEdouble;
66 case MVT::f80: return &APFloat::x87DoubleExtended;
67 case MVT::f128: return &APFloat::IEEEquad;
68 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
72 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
74 //===----------------------------------------------------------------------===//
75 // ConstantFPSDNode Class
76 //===----------------------------------------------------------------------===//
78 /// isExactlyValue - We don't rely on operator== working on double values, as
79 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
80 /// As such, this method can be used to do an exact bit-for-bit comparison of
81 /// two floating point values.
82 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
83 return getValueAPF().bitwiseIsEqual(V);
86 bool ConstantFPSDNode::isValueValidForType(EVT VT,
88 assert(VT.isFloatingPoint() && "Can only convert between FP types");
90 // PPC long double cannot be converted to any other type.
91 if (VT == MVT::ppcf128 ||
92 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BIT_CONVERT)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
127 SDValue NotZero = N->getOperand(i);
128 if (isa<ConstantSDNode>(NotZero)) {
129 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
131 } else if (isa<ConstantFPSDNode>(NotZero)) {
132 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
133 bitcastToAPInt().isAllOnesValue())
138 // Okay, we have at least one ~0 value, check to see if the rest match or are
140 for (++i; i != e; ++i)
141 if (N->getOperand(i) != NotZero &&
142 N->getOperand(i).getOpcode() != ISD::UNDEF)
148 /// isBuildVectorAllZeros - Return true if the specified node is a
149 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
151 // Look through a bit convert.
152 if (N->getOpcode() == ISD::BIT_CONVERT)
153 N = N->getOperand(0).getNode();
155 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
157 unsigned i = 0, e = N->getNumOperands();
159 // Skip over all of the undef values.
160 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163 // Do not accept an all-undef vector.
164 if (i == e) return false;
166 // Do not accept build_vectors that aren't all constants or which have non-0
168 SDValue Zero = N->getOperand(i);
169 if (isa<ConstantSDNode>(Zero)) {
170 if (!cast<ConstantSDNode>(Zero)->isNullValue())
172 } else if (isa<ConstantFPSDNode>(Zero)) {
173 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
178 // Okay, we have at least one 0 value, check to see if the rest match or are
180 for (++i; i != e; ++i)
181 if (N->getOperand(i) != Zero &&
182 N->getOperand(i).getOpcode() != ISD::UNDEF)
187 /// isScalarToVector - Return true if the specified node is a
188 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 /// element is not an undef.
190 bool ISD::isScalarToVector(const SDNode *N) {
191 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194 if (N->getOpcode() != ISD::BUILD_VECTOR)
196 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
198 unsigned NumElems = N->getNumOperands();
199 for (unsigned i = 1; i < NumElems; ++i) {
200 SDValue V = N->getOperand(i);
201 if (V.getOpcode() != ISD::UNDEF)
207 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
208 /// when given the operation for (X op Y).
209 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
210 // To perform this operation, we just need to swap the L and G bits of the
212 unsigned OldL = (Operation >> 2) & 1;
213 unsigned OldG = (Operation >> 1) & 1;
214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
215 (OldL << 1) | // New G bit
216 (OldG << 2)); // New L bit.
219 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
220 /// 'op' is a valid SetCC operation.
221 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
222 unsigned Operation = Op;
224 Operation ^= 7; // Flip L, G, E bits, but not U.
226 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: llvm_unreachable("Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return MF->getTarget();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
485 //===----------------------------------------------------------------------===//
486 // SelectionDAG Class
487 //===----------------------------------------------------------------------===//
489 /// doNotCSE - Return true if CSE should not be performed for this node.
490 static bool doNotCSE(SDNode *N) {
491 if (N->getValueType(0) == MVT::Flag)
492 return true; // Never CSE anything that produces a flag.
494 switch (N->getOpcode()) {
496 case ISD::HANDLENODE:
498 return true; // Never CSE these nodes.
501 // Check that remaining values produced are not flags.
502 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
503 if (N->getValueType(i) == MVT::Flag)
504 return true; // Never CSE anything that produces a flag.
509 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
511 void SelectionDAG::RemoveDeadNodes() {
512 // Create a dummy node (which is not added to allnodes), that adds a reference
513 // to the root node, preventing it from being deleted.
514 HandleSDNode Dummy(getRoot());
516 SmallVector<SDNode*, 128> DeadNodes;
518 // Add all obviously-dead nodes to the DeadNodes worklist.
519 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
521 DeadNodes.push_back(I);
523 RemoveDeadNodes(DeadNodes);
525 // If the root changed (e.g. it was a dead load, update the root).
526 setRoot(Dummy.getValue());
529 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
530 /// given list, and any nodes that become unreachable as a result.
531 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
532 DAGUpdateListener *UpdateListener) {
534 // Process the worklist, deleting the nodes and adding their uses to the
536 while (!DeadNodes.empty()) {
537 SDNode *N = DeadNodes.pop_back_val();
540 UpdateListener->NodeDeleted(N, 0);
542 // Take the node out of the appropriate CSE map.
543 RemoveNodeFromCSEMaps(N);
545 // Next, brutally remove the operand list. This is safe to do, as there are
546 // no cycles in the graph.
547 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
549 SDNode *Operand = Use.getNode();
552 // Now that we removed this operand, see if there are no uses of it left.
553 if (Operand->use_empty())
554 DeadNodes.push_back(Operand);
561 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
562 SmallVector<SDNode*, 16> DeadNodes(1, N);
563 RemoveDeadNodes(DeadNodes, UpdateListener);
566 void SelectionDAG::DeleteNode(SDNode *N) {
567 // First take this out of the appropriate CSE map.
568 RemoveNodeFromCSEMaps(N);
570 // Finally, remove uses due to operands of this node, remove from the
571 // AllNodes list, and delete the node.
572 DeleteNodeNotInCSEMaps(N);
575 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
576 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
577 assert(N->use_empty() && "Cannot delete a node that is not dead!");
579 // Drop all of the operands and decrement used node's use counts.
585 void SelectionDAG::DeallocateNode(SDNode *N) {
586 if (N->OperandsNeedDelete)
587 delete[] N->OperandList;
589 // Set the opcode to DELETED_NODE to help catch bugs when node
590 // memory is reallocated.
591 N->NodeType = ISD::DELETED_NODE;
593 NodeAllocator.Deallocate(AllNodes.remove(N));
595 // Remove the ordering of this node.
599 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
600 /// correspond to it. This is useful when we're about to delete or repurpose
601 /// the node. We don't want future request for structurally identical nodes
602 /// to return N anymore.
603 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
605 switch (N->getOpcode()) {
606 case ISD::EntryToken:
607 llvm_unreachable("EntryToken should not be in CSEMaps!");
609 case ISD::HANDLENODE: return false; // noop.
611 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
612 "Cond code doesn't exist!");
613 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
614 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
616 case ISD::ExternalSymbol:
617 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
619 case ISD::TargetExternalSymbol: {
620 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
621 Erased = TargetExternalSymbols.erase(
622 std::pair<std::string,unsigned char>(ESN->getSymbol(),
623 ESN->getTargetFlags()));
626 case ISD::VALUETYPE: {
627 EVT VT = cast<VTSDNode>(N)->getVT();
628 if (VT.isExtended()) {
629 Erased = ExtendedValueTypeNodes.erase(VT);
631 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
632 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
637 // Remove it from the CSE Map.
638 Erased = CSEMap.RemoveNode(N);
642 // Verify that the node was actually in one of the CSE maps, unless it has a
643 // flag result (which cannot be CSE'd) or is one of the special cases that are
644 // not subject to CSE.
645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
646 !N->isMachineOpcode() && !doNotCSE(N)) {
649 llvm_unreachable("Node is not in map!");
655 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
656 /// maps and modified in place. Add it back to the CSE maps, unless an identical
657 /// node already exists, in which case transfer all its users to the existing
658 /// node. This transfer can potentially trigger recursive merging.
661 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
662 DAGUpdateListener *UpdateListener) {
663 // For node types that aren't CSE'd, just act as if no identical node
666 SDNode *Existing = CSEMap.GetOrInsertNode(N);
668 // If there was already an existing matching node, use ReplaceAllUsesWith
669 // to replace the dead one with the existing one. This can cause
670 // recursive merging of other unrelated nodes down the line.
671 ReplaceAllUsesWith(N, Existing, UpdateListener);
673 // N is now dead. Inform the listener if it exists and delete it.
675 UpdateListener->NodeDeleted(N, Existing);
676 DeleteNodeNotInCSEMaps(N);
681 // If the node doesn't already exist, we updated it. Inform a listener if
684 UpdateListener->NodeUpdated(N);
687 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
688 /// were replaced with those specified. If this node is never memoized,
689 /// return null, otherwise return a pointer to the slot it would take. If a
690 /// node already exists with these operands, the slot will be non-null.
691 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
696 SDValue Ops[] = { Op };
698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
699 AddNodeIDCustom(ID, N);
700 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
704 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
705 /// were replaced with those specified. If this node is never memoized,
706 /// return null, otherwise return a pointer to the slot it would take. If a
707 /// node already exists with these operands, the slot will be non-null.
708 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
709 SDValue Op1, SDValue Op2,
714 SDValue Ops[] = { Op1, Op2 };
716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
717 AddNodeIDCustom(ID, N);
718 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
723 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
724 /// were replaced with those specified. If this node is never memoized,
725 /// return null, otherwise return a pointer to the slot it would take. If a
726 /// node already exists with these operands, the slot will be non-null.
727 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
728 const SDValue *Ops,unsigned NumOps,
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
735 AddNodeIDCustom(ID, N);
736 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
740 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
741 void SelectionDAG::VerifyNode(SDNode *N) {
742 switch (N->getOpcode()) {
745 case ISD::BUILD_PAIR: {
746 EVT VT = N->getValueType(0);
747 assert(N->getNumValues() == 1 && "Too many results!");
748 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
749 "Wrong return type!");
750 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
751 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
752 "Mismatched operand types!");
753 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
754 "Wrong operand type!");
755 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
756 "Wrong return type size");
759 case ISD::BUILD_VECTOR: {
760 assert(N->getNumValues() == 1 && "Too many results!");
761 assert(N->getValueType(0).isVector() && "Wrong return type!");
762 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
763 "Wrong number of operands!");
764 EVT EltVT = N->getValueType(0).getVectorElementType();
765 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
766 assert((I->getValueType() == EltVT ||
767 (EltVT.isInteger() && I->getValueType().isInteger() &&
768 EltVT.bitsLE(I->getValueType()))) &&
769 "Wrong operand type!");
775 /// getEVTAlignment - Compute the default alignment value for the
778 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
779 const Type *Ty = VT == MVT::iPTR ?
780 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
781 VT.getTypeForEVT(*getContext());
783 return TLI.getTargetData()->getABITypeAlignment(Ty);
786 // EntryNode could meaningfully have debug info if we can find it...
787 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
788 : TLI(tli), FLI(fli), DW(0),
789 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
790 getVTList(MVT::Other)),
791 Root(getEntryNode()), Ordering(0) {
792 AllNodes.push_back(&EntryNode);
793 Ordering = new SDNodeOrdering();
796 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
801 Context = &mf.getFunction()->getContext();
804 SelectionDAG::~SelectionDAG() {
809 void SelectionDAG::allnodes_clear() {
810 assert(&*AllNodes.begin() == &EntryNode);
811 AllNodes.remove(AllNodes.begin());
812 while (!AllNodes.empty())
813 DeallocateNode(AllNodes.begin());
816 void SelectionDAG::clear() {
818 OperandAllocator.Reset();
821 ExtendedValueTypeNodes.clear();
822 ExternalSymbols.clear();
823 TargetExternalSymbols.clear();
824 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
825 static_cast<CondCodeSDNode*>(0));
826 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
827 static_cast<SDNode*>(0));
829 EntryNode.UseList = 0;
830 AllNodes.push_back(&EntryNode);
831 Root = getEntryNode();
832 Ordering = new SDNodeOrdering();
835 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
836 return VT.bitsGT(Op.getValueType()) ?
837 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
838 getNode(ISD::TRUNCATE, DL, VT, Op);
841 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
842 return VT.bitsGT(Op.getValueType()) ?
843 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
844 getNode(ISD::TRUNCATE, DL, VT, Op);
847 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
848 assert(!VT.isVector() &&
849 "getZeroExtendInReg should use the vector element type instead of "
851 if (Op.getValueType() == VT) return Op;
852 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
853 APInt Imm = APInt::getLowBitsSet(BitWidth,
855 return getNode(ISD::AND, DL, Op.getValueType(), Op,
856 getConstant(Imm, Op.getValueType()));
859 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
861 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
862 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
864 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
865 return getNode(ISD::XOR, DL, VT, Val, NegOne);
868 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
869 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
870 assert((EltVT.getSizeInBits() >= 64 ||
871 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
872 "getConstant with a uint64_t value that doesn't fit in the type!");
873 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
876 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
877 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
880 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
881 assert(VT.isInteger() && "Cannot create FP integer constant!");
883 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
884 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
885 "APInt size does not match type size!");
887 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
889 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
893 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
895 return SDValue(N, 0);
898 N = NodeAllocator.Allocate<ConstantSDNode>();
899 new (N) ConstantSDNode(isT, &Val, EltVT);
900 CSEMap.InsertNode(N, IP);
901 AllNodes.push_back(N);
904 SDValue Result(N, 0);
906 SmallVector<SDValue, 8> Ops;
907 Ops.assign(VT.getVectorNumElements(), Result);
908 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
909 VT, &Ops[0], Ops.size());
914 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
915 return getConstant(Val, TLI.getPointerTy(), isTarget);
919 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
920 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
923 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
924 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
927 VT.isVector() ? VT.getVectorElementType() : VT;
929 // Do the map lookup using the actual bit pattern for the floating point
930 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
931 // we don't have issues with SNANs.
932 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
934 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
938 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
940 return SDValue(N, 0);
943 N = NodeAllocator.Allocate<ConstantFPSDNode>();
944 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 // FIXME DebugLoc info might be appropriate here
954 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
955 VT, &Ops[0], Ops.size());
960 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
962 VT.isVector() ? VT.getVectorElementType() : VT;
964 return getConstantFP(APFloat((float)Val), VT, isTarget);
966 return getConstantFP(APFloat(Val), VT, isTarget);
969 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
970 EVT VT, int64_t Offset,
972 unsigned char TargetFlags) {
973 assert((TargetFlags == 0 || isTargetGA) &&
974 "Cannot set target flags on target-independent globals");
976 // Truncate (with sign-extension) the offset value to the pointer size.
977 EVT PTy = TLI.getPointerTy();
978 unsigned BitWidth = PTy.getSizeInBits();
980 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
982 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
984 // If GV is an alias then use the aliasee for determining thread-localness.
985 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
986 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
990 if (GVar && GVar->isThreadLocal())
991 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
993 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
996 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
998 ID.AddInteger(Offset);
999 ID.AddInteger(TargetFlags);
1001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1002 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
1005 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1012 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1013 FoldingSetNodeID ID;
1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1018 return SDValue(E, 0);
1020 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1021 new (N) FrameIndexSDNode(FI, VT, isTarget);
1022 CSEMap.InsertNode(N, IP);
1023 AllNodes.push_back(N);
1024 return SDValue(N, 0);
1027 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1028 unsigned char TargetFlags) {
1029 assert((TargetFlags == 0 || isTarget) &&
1030 "Cannot set target flags on target-independent jump tables");
1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1032 FoldingSetNodeID ID;
1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1035 ID.AddInteger(TargetFlags);
1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1038 return SDValue(E, 0);
1040 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1041 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1042 CSEMap.InsertNode(N, IP);
1043 AllNodes.push_back(N);
1044 return SDValue(N, 0);
1047 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1048 unsigned Alignment, int Offset,
1050 unsigned char TargetFlags) {
1051 assert((TargetFlags == 0 || isTarget) &&
1052 "Cannot set target flags on target-independent globals");
1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1056 FoldingSetNodeID ID;
1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1058 ID.AddInteger(Alignment);
1059 ID.AddInteger(Offset);
1061 ID.AddInteger(TargetFlags);
1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1064 return SDValue(E, 0);
1066 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1067 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1068 CSEMap.InsertNode(N, IP);
1069 AllNodes.push_back(N);
1070 return SDValue(N, 0);
1074 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1075 unsigned Alignment, int Offset,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent globals");
1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1083 FoldingSetNodeID ID;
1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1085 ID.AddInteger(Alignment);
1086 ID.AddInteger(Offset);
1087 C->AddSelectionDAGCSEId(ID);
1088 ID.AddInteger(TargetFlags);
1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1091 return SDValue(E, 0);
1093 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1094 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1095 CSEMap.InsertNode(N, IP);
1096 AllNodes.push_back(N);
1097 return SDValue(N, 0);
1100 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1101 FoldingSetNodeID ID;
1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1106 return SDValue(E, 0);
1108 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1109 new (N) BasicBlockSDNode(MBB);
1110 CSEMap.InsertNode(N, IP);
1111 AllNodes.push_back(N);
1112 return SDValue(N, 0);
1115 SDValue SelectionDAG::getValueType(EVT VT) {
1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1117 ValueTypeNodes.size())
1118 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1120 SDNode *&N = VT.isExtended() ?
1121 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1123 if (N) return SDValue(N, 0);
1124 N = NodeAllocator.Allocate<VTSDNode>();
1125 new (N) VTSDNode(VT);
1126 AllNodes.push_back(N);
1127 return SDValue(N, 0);
1130 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1131 SDNode *&N = ExternalSymbols[Sym];
1132 if (N) return SDValue(N, 0);
1133 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1134 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1135 AllNodes.push_back(N);
1136 return SDValue(N, 0);
1139 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1140 unsigned char TargetFlags) {
1142 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1144 if (N) return SDValue(N, 0);
1145 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1146 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1147 AllNodes.push_back(N);
1148 return SDValue(N, 0);
1151 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1152 if ((unsigned)Cond >= CondCodeNodes.size())
1153 CondCodeNodes.resize(Cond+1);
1155 if (CondCodeNodes[Cond] == 0) {
1156 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1157 new (N) CondCodeSDNode(Cond);
1158 CondCodeNodes[Cond] = N;
1159 AllNodes.push_back(N);
1162 return SDValue(CondCodeNodes[Cond], 0);
1165 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1166 // the shuffle mask M that point at N1 to point at N2, and indices that point
1167 // N2 to point at N1.
1168 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1170 int NElts = M.size();
1171 for (int i = 0; i != NElts; ++i) {
1179 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1180 SDValue N2, const int *Mask) {
1181 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1182 assert(VT.isVector() && N1.getValueType().isVector() &&
1183 "Vector Shuffle VTs must be a vectors");
1184 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1185 && "Vector Shuffle VTs must have same element type");
1187 // Canonicalize shuffle undef, undef -> undef
1188 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1189 return getUNDEF(VT);
1191 // Validate that all indices in Mask are within the range of the elements
1192 // input to the shuffle.
1193 unsigned NElts = VT.getVectorNumElements();
1194 SmallVector<int, 8> MaskVec;
1195 for (unsigned i = 0; i != NElts; ++i) {
1196 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1197 MaskVec.push_back(Mask[i]);
1200 // Canonicalize shuffle v, v -> v, undef
1203 for (unsigned i = 0; i != NElts; ++i)
1204 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1207 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1208 if (N1.getOpcode() == ISD::UNDEF)
1209 commuteShuffle(N1, N2, MaskVec);
1211 // Canonicalize all index into lhs, -> shuffle lhs, undef
1212 // Canonicalize all index into rhs, -> shuffle rhs, undef
1213 bool AllLHS = true, AllRHS = true;
1214 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1215 for (unsigned i = 0; i != NElts; ++i) {
1216 if (MaskVec[i] >= (int)NElts) {
1221 } else if (MaskVec[i] >= 0) {
1225 if (AllLHS && AllRHS)
1226 return getUNDEF(VT);
1227 if (AllLHS && !N2Undef)
1231 commuteShuffle(N1, N2, MaskVec);
1234 // If Identity shuffle, or all shuffle in to undef, return that node.
1235 bool AllUndef = true;
1236 bool Identity = true;
1237 for (unsigned i = 0; i != NElts; ++i) {
1238 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1239 if (MaskVec[i] >= 0) AllUndef = false;
1241 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1244 return getUNDEF(VT);
1246 FoldingSetNodeID ID;
1247 SDValue Ops[2] = { N1, N2 };
1248 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1249 for (unsigned i = 0; i != NElts; ++i)
1250 ID.AddInteger(MaskVec[i]);
1253 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1254 return SDValue(E, 0);
1256 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1257 // SDNode doesn't have access to it. This memory will be "leaked" when
1258 // the node is deallocated, but recovered when the NodeAllocator is released.
1259 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1260 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1262 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1263 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1264 CSEMap.InsertNode(N, IP);
1265 AllNodes.push_back(N);
1266 return SDValue(N, 0);
1269 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1270 SDValue Val, SDValue DTy,
1271 SDValue STy, SDValue Rnd, SDValue Sat,
1272 ISD::CvtCode Code) {
1273 // If the src and dest types are the same and the conversion is between
1274 // integer types of the same sign or two floats, no conversion is necessary.
1276 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1279 FoldingSetNodeID ID;
1280 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1281 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1287 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1288 CSEMap.InsertNode(N, IP);
1289 AllNodes.push_back(N);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1294 FoldingSetNodeID ID;
1295 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1296 ID.AddInteger(RegNo);
1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1299 return SDValue(E, 0);
1301 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1302 new (N) RegisterSDNode(RegNo, VT);
1303 CSEMap.InsertNode(N, IP);
1304 AllNodes.push_back(N);
1305 return SDValue(N, 0);
1308 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1311 FoldingSetNodeID ID;
1312 SDValue Ops[] = { Root };
1313 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1314 ID.AddInteger(LabelID);
1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1317 return SDValue(E, 0);
1319 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1320 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1321 CSEMap.InsertNode(N, IP);
1322 AllNodes.push_back(N);
1323 return SDValue(N, 0);
1326 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1328 unsigned char TargetFlags) {
1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1331 FoldingSetNodeID ID;
1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1334 ID.AddInteger(TargetFlags);
1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1337 return SDValue(E, 0);
1339 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1340 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1341 CSEMap.InsertNode(N, IP);
1342 AllNodes.push_back(N);
1343 return SDValue(N, 0);
1346 SDValue SelectionDAG::getSrcValue(const Value *V) {
1347 assert((!V || isa<PointerType>(V->getType())) &&
1348 "SrcValue is not a pointer?");
1350 FoldingSetNodeID ID;
1351 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1356 return SDValue(E, 0);
1358 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1359 new (N) SrcValueSDNode(V);
1360 CSEMap.InsertNode(N, IP);
1361 AllNodes.push_back(N);
1362 return SDValue(N, 0);
1365 /// getShiftAmountOperand - Return the specified value casted to
1366 /// the target's desired shift amount type.
1367 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1368 EVT OpTy = Op.getValueType();
1369 MVT ShTy = TLI.getShiftAmountTy();
1370 if (OpTy == ShTy || OpTy.isVector()) return Op;
1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1376 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1377 /// specified value type.
1378 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1380 unsigned ByteSize = VT.getStoreSize();
1381 const Type *Ty = VT.getTypeForEVT(*getContext());
1382 unsigned StackAlign =
1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1386 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1389 /// CreateStackTemporary - Create a stack temporary suitable for holding
1390 /// either of the specified value types.
1391 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1393 VT2.getStoreSizeInBits())/8;
1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1396 const TargetData *TD = TLI.getTargetData();
1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1398 TD->getPrefTypeAlignment(Ty2));
1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1402 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1405 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1407 // These setcc operations always fold.
1411 case ISD::SETFALSE2: return getConstant(0, VT);
1413 case ISD::SETTRUE2: return getConstant(1, VT);
1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1430 const APInt &C2 = N2C->getAPIntValue();
1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1432 const APInt &C1 = N1C->getAPIntValue();
1435 default: llvm_unreachable("Unknown integer setcc!");
1436 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1437 case ISD::SETNE: return getConstant(C1 != C2, VT);
1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1451 // No compile time operations on this type yet.
1452 if (N1C->getValueType(0) == MVT::ppcf128)
1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1459 return getUNDEF(VT);
1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1462 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1466 R==APFloat::cmpLessThan, VT);
1467 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1471 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1475 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1476 return getUNDEF(VT);
1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1479 R==APFloat::cmpEqual, VT);
1480 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1481 return getUNDEF(VT);
1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1484 R==APFloat::cmpEqual, VT);
1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1488 R==APFloat::cmpEqual, VT);
1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1491 R==APFloat::cmpLessThan, VT);
1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1493 R==APFloat::cmpUnordered, VT);
1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1498 // Ensure that the constant occurs on the RHS.
1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1503 // Could not fold it.
1507 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1508 /// use this predicate to simplify operations downstream.
1509 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1510 // This predicate is not safe for vector operations.
1511 if (Op.getValueType().isVector())
1514 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1518 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1519 /// this predicate to simplify operations downstream. Mask is known to be zero
1520 /// for bits that V cannot have.
1521 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1522 unsigned Depth) const {
1523 APInt KnownZero, KnownOne;
1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1526 return (KnownZero & Mask) == Mask;
1529 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1530 /// known to be either zero or one and return them in the KnownZero/KnownOne
1531 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1533 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1534 APInt &KnownZero, APInt &KnownOne,
1535 unsigned Depth) const {
1536 unsigned BitWidth = Mask.getBitWidth();
1537 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1538 "Mask size mismatches value type size!");
1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1541 if (Depth == 6 || Mask == 0)
1542 return; // Limit search depth.
1544 APInt KnownZero2, KnownOne2;
1546 switch (Op.getOpcode()) {
1548 // We know all of the bits for a constant!
1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1550 KnownZero = ~KnownOne & Mask;
1553 // If either the LHS or the RHS are Zero, the result is zero.
1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1556 KnownZero2, KnownOne2, Depth+1);
1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1560 // Output known-1 bits are only known if set in both the LHS & RHS.
1561 KnownOne &= KnownOne2;
1562 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1563 KnownZero |= KnownZero2;
1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1568 KnownZero2, KnownOne2, Depth+1);
1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1572 // Output known-0 bits are only known if clear in both the LHS & RHS.
1573 KnownZero &= KnownZero2;
1574 // Output known-1 are known to be set if set in either the LHS | RHS.
1575 KnownOne |= KnownOne2;
1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1583 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1585 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1587 KnownZero = KnownZeroOut;
1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1597 // If low bits are zero in either operand, output low known-0 bits.
1598 // Also compute a conserative estimate for high known-0 bits.
1599 // More trickiness is possible, but this is sufficient for the
1600 // interesting case of alignment computation.
1602 unsigned TrailZ = KnownZero.countTrailingOnes() +
1603 KnownZero2.countTrailingOnes();
1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1605 KnownZero2.countLeadingOnes(),
1606 BitWidth) - BitWidth;
1608 TrailZ = std::min(TrailZ, BitWidth);
1609 LeadZ = std::min(LeadZ, BitWidth);
1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1611 APInt::getHighBitsSet(BitWidth, LeadZ);
1616 // For the purposes of computing leading zeros we can conservatively
1617 // treat a udiv as a logical right shift by the power of 2 known to
1618 // be less than the denominator.
1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1620 ComputeMaskedBits(Op.getOperand(0),
1621 AllOnes, KnownZero2, KnownOne2, Depth+1);
1622 unsigned LeadZ = KnownZero2.countLeadingOnes();
1626 ComputeMaskedBits(Op.getOperand(1),
1627 AllOnes, KnownZero2, KnownOne2, Depth+1);
1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1629 if (RHSUnknownLeadingOnes != BitWidth)
1630 LeadZ = std::min(BitWidth,
1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 // Only known if known in both the LHS and RHS.
1643 KnownOne &= KnownOne2;
1644 KnownZero &= KnownZero2;
1646 case ISD::SELECT_CC:
1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1652 // Only known if known in both the LHS and RHS.
1653 KnownOne &= KnownOne2;
1654 KnownZero &= KnownZero2;
1662 if (Op.getResNo() != 1)
1664 // The boolean result conforms to getBooleanContents. Fall through.
1666 // If we know the result of a setcc has the top bits zero, use this info.
1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1674 unsigned ShAmt = SA->getZExtValue();
1676 // If the shift count is an invalid immediate, don't do anything.
1677 if (ShAmt >= BitWidth)
1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1681 KnownZero, KnownOne, Depth+1);
1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 KnownZero <<= ShAmt;
1685 // low bits known zero.
1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1692 unsigned ShAmt = SA->getZExtValue();
1694 // If the shift count is an invalid immediate, don't do anything.
1695 if (ShAmt >= BitWidth)
1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1699 KnownZero, KnownOne, Depth+1);
1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1701 KnownZero = KnownZero.lshr(ShAmt);
1702 KnownOne = KnownOne.lshr(ShAmt);
1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1705 KnownZero |= HighBits; // High bits known zero.
1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1710 unsigned ShAmt = SA->getZExtValue();
1712 // If the shift count is an invalid immediate, don't do anything.
1713 if (ShAmt >= BitWidth)
1716 APInt InDemandedMask = (Mask << ShAmt);
1717 // If any of the demanded bits are produced by the sign extension, we also
1718 // demand the input sign bit.
1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1720 if (HighBits.getBoolValue())
1721 InDemandedMask |= APInt::getSignBit(BitWidth);
1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1726 KnownZero = KnownZero.lshr(ShAmt);
1727 KnownOne = KnownOne.lshr(ShAmt);
1729 // Handle the sign bits.
1730 APInt SignBit = APInt::getSignBit(BitWidth);
1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1733 if (KnownZero.intersects(SignBit)) {
1734 KnownZero |= HighBits; // New bits are known zero.
1735 } else if (KnownOne.intersects(SignBit)) {
1736 KnownOne |= HighBits; // New bits are known one.
1740 case ISD::SIGN_EXTEND_INREG: {
1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1742 unsigned EBits = EVT.getScalarType().getSizeInBits();
1744 // Sign extension. Compute the demanded bits in the result that are not
1745 // present in the input.
1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1748 APInt InSignBit = APInt::getSignBit(EBits);
1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1751 // If the sign extended bits are demanded, we know that the sign
1753 InSignBit.zext(BitWidth);
1754 if (NewBits.getBoolValue())
1755 InputDemandedBits |= InSignBit;
1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1758 KnownZero, KnownOne, Depth+1);
1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1761 // If the sign bit of the input is known set or clear, then we know the
1762 // top bits of the result.
1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1764 KnownZero |= NewBits;
1765 KnownOne &= ~NewBits;
1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1767 KnownOne |= NewBits;
1768 KnownZero &= ~NewBits;
1769 } else { // Input sign bit unknown
1770 KnownZero &= ~NewBits;
1771 KnownOne &= ~NewBits;
1778 unsigned LowBits = Log2_32(BitWidth)+1;
1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1784 if (ISD::isZEXTLoad(Op.getNode())) {
1785 LoadSDNode *LD = cast<LoadSDNode>(Op);
1786 EVT VT = LD->getMemoryVT();
1787 unsigned MemBits = VT.getScalarType().getSizeInBits();
1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1792 case ISD::ZERO_EXTEND: {
1793 EVT InVT = Op.getOperand(0).getValueType();
1794 unsigned InBits = InVT.getScalarType().getSizeInBits();
1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1796 APInt InMask = Mask;
1797 InMask.trunc(InBits);
1798 KnownZero.trunc(InBits);
1799 KnownOne.trunc(InBits);
1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1801 KnownZero.zext(BitWidth);
1802 KnownOne.zext(BitWidth);
1803 KnownZero |= NewBits;
1806 case ISD::SIGN_EXTEND: {
1807 EVT InVT = Op.getOperand(0).getValueType();
1808 unsigned InBits = InVT.getScalarType().getSizeInBits();
1809 APInt InSignBit = APInt::getSignBit(InBits);
1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1811 APInt InMask = Mask;
1812 InMask.trunc(InBits);
1814 // If any of the sign extended bits are demanded, we know that the sign
1815 // bit is demanded. Temporarily set this bit in the mask for our callee.
1816 if (NewBits.getBoolValue())
1817 InMask |= InSignBit;
1819 KnownZero.trunc(InBits);
1820 KnownOne.trunc(InBits);
1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1823 // Note if the sign bit is known to be zero or one.
1824 bool SignBitKnownZero = KnownZero.isNegative();
1825 bool SignBitKnownOne = KnownOne.isNegative();
1826 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1827 "Sign bit can't be known to be both zero and one!");
1829 // If the sign bit wasn't actually demanded by our caller, we don't
1830 // want it set in the KnownZero and KnownOne result values. Reset the
1831 // mask and reapply it to the result values.
1833 InMask.trunc(InBits);
1834 KnownZero &= InMask;
1837 KnownZero.zext(BitWidth);
1838 KnownOne.zext(BitWidth);
1840 // If the sign bit is known zero or one, the top bits match.
1841 if (SignBitKnownZero)
1842 KnownZero |= NewBits;
1843 else if (SignBitKnownOne)
1844 KnownOne |= NewBits;
1847 case ISD::ANY_EXTEND: {
1848 EVT InVT = Op.getOperand(0).getValueType();
1849 unsigned InBits = InVT.getScalarType().getSizeInBits();
1850 APInt InMask = Mask;
1851 InMask.trunc(InBits);
1852 KnownZero.trunc(InBits);
1853 KnownOne.trunc(InBits);
1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1855 KnownZero.zext(BitWidth);
1856 KnownOne.zext(BitWidth);
1859 case ISD::TRUNCATE: {
1860 EVT InVT = Op.getOperand(0).getValueType();
1861 unsigned InBits = InVT.getScalarType().getSizeInBits();
1862 APInt InMask = Mask;
1863 InMask.zext(InBits);
1864 KnownZero.zext(InBits);
1865 KnownOne.zext(InBits);
1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1868 KnownZero.trunc(BitWidth);
1869 KnownOne.trunc(BitWidth);
1872 case ISD::AssertZext: {
1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1877 KnownZero |= (~InMask) & Mask;
1881 // All bits are zero except the low bit.
1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1887 // We know that the top bits of C-X are clear if X contains less bits
1888 // than C (i.e. no wrap-around can happen). For example, 20-X is
1889 // positive if we can prove that X is >= 0 and < 16.
1890 if (CLHS->getAPIntValue().isNonNegative()) {
1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1892 // NLZ can't be BitWidth with no sign bit
1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1897 // If all of the MaskV bits are known to be zero, then we know the
1898 // output top bits are zero, because we now know that the output is
1900 if ((KnownZero2 & MaskV) == MaskV) {
1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1902 // Top bits known zero.
1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1910 // Output known-0 bits are known if clear or set in both the low clear bits
1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1912 // low 3 bits clear.
1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1920 KnownZeroOut = std::min(KnownZeroOut,
1921 KnownZero2.countTrailingOnes());
1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1928 const APInt &RA = Rem->getAPIntValue().abs();
1929 if (RA.isPowerOf2()) {
1930 APInt LowBits = RA - 1;
1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1934 // The low bits of the first operand are unchanged by the srem.
1935 KnownZero = KnownZero2 & LowBits;
1936 KnownOne = KnownOne2 & LowBits;
1938 // If the first operand is non-negative or has all low bits zero, then
1939 // the upper bits are all zero.
1940 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1941 KnownZero |= ~LowBits;
1943 // If the first operand is negative and not all low bits are zero, then
1944 // the upper bits are all one.
1945 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1946 KnownOne |= ~LowBits;
1951 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1956 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1957 const APInt &RA = Rem->getAPIntValue();
1958 if (RA.isPowerOf2()) {
1959 APInt LowBits = (RA - 1);
1960 APInt Mask2 = LowBits & Mask;
1961 KnownZero |= ~LowBits & Mask;
1962 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1963 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1968 // Since the result is less than or equal to either operand, any leading
1969 // zero bits in either operand must also exist in the result.
1970 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1971 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1973 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1976 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1977 KnownZero2.countLeadingOnes());
1979 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1983 // Allow the target to implement this method for its nodes.
1984 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1985 case ISD::INTRINSIC_WO_CHAIN:
1986 case ISD::INTRINSIC_W_CHAIN:
1987 case ISD::INTRINSIC_VOID:
1988 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1995 /// ComputeNumSignBits - Return the number of times the sign bit of the
1996 /// register is replicated into the other bits. We know that at least 1 bit
1997 /// is always equal to the sign bit (itself), but other cases can give us
1998 /// information. For example, immediately after an "SRA X, 2", we know that
1999 /// the top 3 bits are all equal to each other, so we return 3.
2000 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2001 EVT VT = Op.getValueType();
2002 assert(VT.isInteger() && "Invalid VT!");
2003 unsigned VTBits = VT.getScalarType().getSizeInBits();
2005 unsigned FirstAnswer = 1;
2008 return 1; // Limit search depth.
2010 switch (Op.getOpcode()) {
2012 case ISD::AssertSext:
2013 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2014 return VTBits-Tmp+1;
2015 case ISD::AssertZext:
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2019 case ISD::Constant: {
2020 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2021 // If negative, return # leading ones.
2022 if (Val.isNegative())
2023 return Val.countLeadingOnes();
2025 // Return # leading zeros.
2026 return Val.countLeadingZeros();
2029 case ISD::SIGN_EXTEND:
2030 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2031 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2033 case ISD::SIGN_EXTEND_INREG:
2034 // Max of the input and what this extends.
2036 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2039 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2040 return std::max(Tmp, Tmp2);
2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2044 // SRA X, C -> adds C sign bits.
2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2046 Tmp += C->getZExtValue();
2047 if (Tmp > VTBits) Tmp = VTBits;
2051 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2052 // shl destroys sign bits.
2053 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2054 if (C->getZExtValue() >= VTBits || // Bad shift.
2055 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2056 return Tmp - C->getZExtValue();
2061 case ISD::XOR: // NOT is handled here.
2062 // Logical binary ops preserve the number of sign bits at the worst.
2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2065 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2066 FirstAnswer = std::min(Tmp, Tmp2);
2067 // We computed what we know about the sign bits as our first
2068 // answer. Now proceed to the generic code that uses
2069 // ComputeMaskedBits, and pick whichever answer is better.
2074 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2075 if (Tmp == 1) return 1; // Early out.
2076 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2077 return std::min(Tmp, Tmp2);
2085 if (Op.getResNo() != 1)
2087 // The boolean result conforms to getBooleanContents. Fall through.
2089 // If setcc returns 0/-1, all bits are sign bits.
2090 if (TLI.getBooleanContents() ==
2091 TargetLowering::ZeroOrNegativeOneBooleanContent)
2096 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2097 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2099 // Handle rotate right by N like a rotate left by 32-N.
2100 if (Op.getOpcode() == ISD::ROTR)
2101 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2103 // If we aren't rotating out all of the known-in sign bits, return the
2104 // number that are left. This handles rotl(sext(x), 1) for example.
2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2106 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2110 // Add can have at most one carry bit. Thus we know that the output
2111 // is, at worst, one more bit than the inputs.
2112 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2113 if (Tmp == 1) return 1; // Early out.
2115 // Special case decrementing a value (ADD X, -1):
2116 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2117 if (CRHS->isAllOnesValue()) {
2118 APInt KnownZero, KnownOne;
2119 APInt Mask = APInt::getAllOnesValue(VTBits);
2120 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2122 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2124 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2127 // If we are subtracting one from a positive number, there is no carry
2128 // out of the result.
2129 if (KnownZero.isNegative())
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2134 if (Tmp2 == 1) return 1;
2135 return std::min(Tmp, Tmp2)-1;
2139 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2140 if (Tmp2 == 1) return 1;
2143 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2144 if (CLHS->isNullValue()) {
2145 APInt KnownZero, KnownOne;
2146 APInt Mask = APInt::getAllOnesValue(VTBits);
2147 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2148 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2150 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2153 // If the input is known to be positive (the sign bit is known clear),
2154 // the output of the NEG has the same number of sign bits as the input.
2155 if (KnownZero.isNegative())
2158 // Otherwise, we treat this like a SUB.
2161 // Sub can have at most one carry bit. Thus we know that the output
2162 // is, at worst, one more bit than the inputs.
2163 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2164 if (Tmp == 1) return 1; // Early out.
2165 return std::min(Tmp, Tmp2)-1;
2168 // FIXME: it's tricky to do anything useful for this, but it is an important
2169 // case for targets like X86.
2173 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2174 if (Op.getOpcode() == ISD::LOAD) {
2175 LoadSDNode *LD = cast<LoadSDNode>(Op);
2176 unsigned ExtType = LD->getExtensionType();
2179 case ISD::SEXTLOAD: // '17' bits known
2180 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2181 return VTBits-Tmp+1;
2182 case ISD::ZEXTLOAD: // '16' bits known
2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2188 // Allow the target to implement this method for its nodes.
2189 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2190 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2191 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2192 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2193 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2194 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2197 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2198 // use this information.
2199 APInt KnownZero, KnownOne;
2200 APInt Mask = APInt::getAllOnesValue(VTBits);
2201 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2203 if (KnownZero.isNegative()) { // sign bit is 0
2205 } else if (KnownOne.isNegative()) { // sign bit is 1;
2212 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2213 // the number of identical bits in the top of the input value.
2215 Mask <<= Mask.getBitWidth()-VTBits;
2216 // Return # leading zeros. We use 'min' here in case Val was zero before
2217 // shifting. We don't want to return '64' as for an i32 "0".
2218 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2221 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2222 // If we're told that NaNs won't happen, assume they won't.
2223 if (FiniteOnlyFPMath())
2226 // If the value is a constant, we can obviously see if it is a NaN or not.
2227 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2228 return !C->getValueAPF().isNaN();
2230 // TODO: Recognize more cases here.
2235 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2236 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2237 if (!GA) return false;
2238 if (GA->getOffset() != 0) return false;
2239 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2240 if (!GV) return false;
2241 MachineModuleInfo *MMI = getMachineModuleInfo();
2242 return MMI && MMI->hasDebugInfo();
2246 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2247 /// element of the result of the vector shuffle.
2248 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2250 EVT VT = N->getValueType(0);
2251 DebugLoc dl = N->getDebugLoc();
2252 if (N->getMaskElt(i) < 0)
2253 return getUNDEF(VT.getVectorElementType());
2254 unsigned Index = N->getMaskElt(i);
2255 unsigned NumElems = VT.getVectorNumElements();
2256 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2259 if (V.getOpcode() == ISD::BIT_CONVERT) {
2260 V = V.getOperand(0);
2261 EVT VVT = V.getValueType();
2262 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2265 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2266 return (Index == 0) ? V.getOperand(0)
2267 : getUNDEF(VT.getVectorElementType());
2268 if (V.getOpcode() == ISD::BUILD_VECTOR)
2269 return V.getOperand(Index);
2270 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2271 return getShuffleScalarElt(SVN, Index);
2276 /// getNode - Gets or creates the specified node.
2278 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2279 FoldingSetNodeID ID;
2280 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2283 return SDValue(E, 0);
2285 SDNode *N = NodeAllocator.Allocate<SDNode>();
2286 new (N) SDNode(Opcode, DL, getVTList(VT));
2287 CSEMap.InsertNode(N, IP);
2289 AllNodes.push_back(N);
2293 return SDValue(N, 0);
2296 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2297 EVT VT, SDValue Operand) {
2298 // Constant fold unary operations with an integer constant operand.
2299 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2300 const APInt &Val = C->getAPIntValue();
2301 unsigned BitWidth = VT.getSizeInBits();
2304 case ISD::SIGN_EXTEND:
2305 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2306 case ISD::ANY_EXTEND:
2307 case ISD::ZERO_EXTEND:
2309 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2310 case ISD::UINT_TO_FP:
2311 case ISD::SINT_TO_FP: {
2312 const uint64_t zero[] = {0, 0};
2313 // No compile time operations on this type.
2314 if (VT==MVT::ppcf128)
2316 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2317 (void)apf.convertFromAPInt(Val,
2318 Opcode==ISD::SINT_TO_FP,
2319 APFloat::rmNearestTiesToEven);
2320 return getConstantFP(apf, VT);
2322 case ISD::BIT_CONVERT:
2323 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2324 return getConstantFP(Val.bitsToFloat(), VT);
2325 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2326 return getConstantFP(Val.bitsToDouble(), VT);
2329 return getConstant(Val.byteSwap(), VT);
2331 return getConstant(Val.countPopulation(), VT);
2333 return getConstant(Val.countLeadingZeros(), VT);
2335 return getConstant(Val.countTrailingZeros(), VT);
2339 // Constant fold unary operations with a floating point constant operand.
2340 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2341 APFloat V = C->getValueAPF(); // make copy
2342 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2346 return getConstantFP(V, VT);
2349 return getConstantFP(V, VT);
2351 case ISD::FP_EXTEND: {
2353 // This can return overflow, underflow, or inexact; we don't care.
2354 // FIXME need to be more flexible about rounding mode.
2355 (void)V.convert(*EVTToAPFloatSemantics(VT),
2356 APFloat::rmNearestTiesToEven, &ignored);
2357 return getConstantFP(V, VT);
2359 case ISD::FP_TO_SINT:
2360 case ISD::FP_TO_UINT: {
2363 assert(integerPartWidth >= 64);
2364 // FIXME need to be more flexible about rounding mode.
2365 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2366 Opcode==ISD::FP_TO_SINT,
2367 APFloat::rmTowardZero, &ignored);
2368 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2370 APInt api(VT.getSizeInBits(), 2, x);
2371 return getConstant(api, VT);
2373 case ISD::BIT_CONVERT:
2374 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2375 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2376 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2377 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2383 unsigned OpOpcode = Operand.getNode()->getOpcode();
2385 case ISD::TokenFactor:
2386 case ISD::MERGE_VALUES:
2387 case ISD::CONCAT_VECTORS:
2388 return Operand; // Factor, merge or concat of one node? No need.
2389 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2390 case ISD::FP_EXTEND:
2391 assert(VT.isFloatingPoint() &&
2392 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2393 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2394 assert((!VT.isVector() ||
2395 VT.getVectorNumElements() ==
2396 Operand.getValueType().getVectorNumElements()) &&
2397 "Vector element count mismatch!");
2398 if (Operand.getOpcode() == ISD::UNDEF)
2399 return getUNDEF(VT);
2401 case ISD::SIGN_EXTEND:
2402 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2403 "Invalid SIGN_EXTEND!");
2404 if (Operand.getValueType() == VT) return Operand; // noop extension
2405 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2406 "Invalid sext node, dst < src!");
2407 assert((!VT.isVector() ||
2408 VT.getVectorNumElements() ==
2409 Operand.getValueType().getVectorNumElements()) &&
2410 "Vector element count mismatch!");
2411 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2412 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2414 case ISD::ZERO_EXTEND:
2415 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2416 "Invalid ZERO_EXTEND!");
2417 if (Operand.getValueType() == VT) return Operand; // noop extension
2418 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2419 "Invalid zext node, dst < src!");
2420 assert((!VT.isVector() ||
2421 VT.getVectorNumElements() ==
2422 Operand.getValueType().getVectorNumElements()) &&
2423 "Vector element count mismatch!");
2424 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2425 return getNode(ISD::ZERO_EXTEND, DL, VT,
2426 Operand.getNode()->getOperand(0));
2428 case ISD::ANY_EXTEND:
2429 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2430 "Invalid ANY_EXTEND!");
2431 if (Operand.getValueType() == VT) return Operand; // noop extension
2432 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2433 "Invalid anyext node, dst < src!");
2434 assert((!VT.isVector() ||
2435 VT.getVectorNumElements() ==
2436 Operand.getValueType().getVectorNumElements()) &&
2437 "Vector element count mismatch!");
2438 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2439 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2440 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2443 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2444 "Invalid TRUNCATE!");
2445 if (Operand.getValueType() == VT) return Operand; // noop truncate
2446 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2447 "Invalid truncate node, src < dst!");
2448 assert((!VT.isVector() ||
2449 VT.getVectorNumElements() ==
2450 Operand.getValueType().getVectorNumElements()) &&
2451 "Vector element count mismatch!");
2452 if (OpOpcode == ISD::TRUNCATE)
2453 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2454 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2455 OpOpcode == ISD::ANY_EXTEND) {
2456 // If the source is smaller than the dest, we still need an extend.
2457 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2458 .bitsLT(VT.getScalarType()))
2459 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2460 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2461 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2463 return Operand.getNode()->getOperand(0);
2466 case ISD::BIT_CONVERT:
2467 // Basic sanity checking.
2468 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2469 && "Cannot BIT_CONVERT between types of different sizes!");
2470 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2471 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2472 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2473 if (OpOpcode == ISD::UNDEF)
2474 return getUNDEF(VT);
2476 case ISD::SCALAR_TO_VECTOR:
2477 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2478 (VT.getVectorElementType() == Operand.getValueType() ||
2479 (VT.getVectorElementType().isInteger() &&
2480 Operand.getValueType().isInteger() &&
2481 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2482 "Illegal SCALAR_TO_VECTOR node!");
2483 if (OpOpcode == ISD::UNDEF)
2484 return getUNDEF(VT);
2485 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2486 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2487 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2488 Operand.getConstantOperandVal(1) == 0 &&
2489 Operand.getOperand(0).getValueType() == VT)
2490 return Operand.getOperand(0);
2493 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2494 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2495 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2496 Operand.getNode()->getOperand(0));
2497 if (OpOpcode == ISD::FNEG) // --X -> X
2498 return Operand.getNode()->getOperand(0);
2501 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2502 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2507 SDVTList VTs = getVTList(VT);
2508 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2509 FoldingSetNodeID ID;
2510 SDValue Ops[1] = { Operand };
2511 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2513 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2514 return SDValue(E, 0);
2516 N = NodeAllocator.Allocate<UnarySDNode>();
2517 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2518 CSEMap.InsertNode(N, IP);
2520 N = NodeAllocator.Allocate<UnarySDNode>();
2521 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2524 AllNodes.push_back(N);
2528 return SDValue(N, 0);
2531 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2533 ConstantSDNode *Cst1,
2534 ConstantSDNode *Cst2) {
2535 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2538 case ISD::ADD: return getConstant(C1 + C2, VT);
2539 case ISD::SUB: return getConstant(C1 - C2, VT);
2540 case ISD::MUL: return getConstant(C1 * C2, VT);
2542 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2545 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2548 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2551 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2553 case ISD::AND: return getConstant(C1 & C2, VT);
2554 case ISD::OR: return getConstant(C1 | C2, VT);
2555 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2556 case ISD::SHL: return getConstant(C1 << C2, VT);
2557 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2558 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2559 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2560 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2567 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2568 SDValue N1, SDValue N2) {
2569 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2570 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2573 case ISD::TokenFactor:
2574 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2575 N2.getValueType() == MVT::Other && "Invalid token factor!");
2576 // Fold trivial token factors.
2577 if (N1.getOpcode() == ISD::EntryToken) return N2;
2578 if (N2.getOpcode() == ISD::EntryToken) return N1;
2579 if (N1 == N2) return N1;
2581 case ISD::CONCAT_VECTORS:
2582 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2583 // one big BUILD_VECTOR.
2584 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2585 N2.getOpcode() == ISD::BUILD_VECTOR) {
2586 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2587 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2588 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2592 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2593 N1.getValueType() == VT && "Binary operator types must match!");
2594 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2595 // worth handling here.
2596 if (N2C && N2C->isNullValue())
2598 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2605 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2606 N1.getValueType() == VT && "Binary operator types must match!");
2607 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2608 // it's worth handling here.
2609 if (N2C && N2C->isNullValue())
2619 assert(VT.isInteger() && "This operator does not apply to FP types!");
2627 if (Opcode == ISD::FADD) {
2629 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2630 if (CFP->getValueAPF().isZero())
2633 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2634 if (CFP->getValueAPF().isZero())
2636 } else if (Opcode == ISD::FSUB) {
2638 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2639 if (CFP->getValueAPF().isZero())
2643 assert(N1.getValueType() == N2.getValueType() &&
2644 N1.getValueType() == VT && "Binary operator types must match!");
2646 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2647 assert(N1.getValueType() == VT &&
2648 N1.getValueType().isFloatingPoint() &&
2649 N2.getValueType().isFloatingPoint() &&
2650 "Invalid FCOPYSIGN!");
2657 assert(VT == N1.getValueType() &&
2658 "Shift operators return type must be the same as their first arg");
2659 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2660 "Shifts only work on integers");
2662 // Always fold shifts of i1 values so the code generator doesn't need to
2663 // handle them. Since we know the size of the shift has to be less than the
2664 // size of the value, the shift/rotate count is guaranteed to be zero.
2667 if (N2C && N2C->isNullValue())
2670 case ISD::FP_ROUND_INREG: {
2671 EVT EVT = cast<VTSDNode>(N2)->getVT();
2672 assert(VT == N1.getValueType() && "Not an inreg round!");
2673 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2674 "Cannot FP_ROUND_INREG integer types");
2675 assert(EVT.isVector() == VT.isVector() &&
2676 "FP_ROUND_INREG type should be vector iff the operand "
2678 assert((!EVT.isVector() ||
2679 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2680 "Vector element counts must match in FP_ROUND_INREG");
2681 assert(EVT.bitsLE(VT) && "Not rounding down!");
2682 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2686 assert(VT.isFloatingPoint() &&
2687 N1.getValueType().isFloatingPoint() &&
2688 VT.bitsLE(N1.getValueType()) &&
2689 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2690 if (N1.getValueType() == VT) return N1; // noop conversion.
2692 case ISD::AssertSext:
2693 case ISD::AssertZext: {
2694 EVT EVT = cast<VTSDNode>(N2)->getVT();
2695 assert(VT == N1.getValueType() && "Not an inreg extend!");
2696 assert(VT.isInteger() && EVT.isInteger() &&
2697 "Cannot *_EXTEND_INREG FP types");
2698 assert(!EVT.isVector() &&
2699 "AssertSExt/AssertZExt type should be the vector element type "
2700 "rather than the vector type!");
2701 assert(EVT.bitsLE(VT) && "Not extending!");
2702 if (VT == EVT) return N1; // noop assertion.
2705 case ISD::SIGN_EXTEND_INREG: {
2706 EVT EVT = cast<VTSDNode>(N2)->getVT();
2707 assert(VT == N1.getValueType() && "Not an inreg extend!");
2708 assert(VT.isInteger() && EVT.isInteger() &&
2709 "Cannot *_EXTEND_INREG FP types");
2710 assert(EVT.isVector() == VT.isVector() &&
2711 "SIGN_EXTEND_INREG type should be vector iff the operand "
2713 assert((!EVT.isVector() ||
2714 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2715 "Vector element counts must match in SIGN_EXTEND_INREG");
2716 assert(EVT.bitsLE(VT) && "Not extending!");
2717 if (EVT == VT) return N1; // Not actually extending
2720 APInt Val = N1C->getAPIntValue();
2721 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2722 Val <<= Val.getBitWidth()-FromBits;
2723 Val = Val.ashr(Val.getBitWidth()-FromBits);
2724 return getConstant(Val, VT);
2728 case ISD::EXTRACT_VECTOR_ELT:
2729 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2730 if (N1.getOpcode() == ISD::UNDEF)
2731 return getUNDEF(VT);
2733 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2734 // expanding copies of large vectors from registers.
2736 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2737 N1.getNumOperands() > 0) {
2739 N1.getOperand(0).getValueType().getVectorNumElements();
2740 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2741 N1.getOperand(N2C->getZExtValue() / Factor),
2742 getConstant(N2C->getZExtValue() % Factor,
2743 N2.getValueType()));
2746 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2747 // expanding large vector constants.
2748 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2749 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2750 EVT VEltTy = N1.getValueType().getVectorElementType();
2751 if (Elt.getValueType() != VEltTy) {
2752 // If the vector element type is not legal, the BUILD_VECTOR operands
2753 // are promoted and implicitly truncated. Make that explicit here.
2754 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2757 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2758 // result is implicitly extended.
2759 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2764 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2765 // operations are lowered to scalars.
2766 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2767 // If the indices are the same, return the inserted element else
2768 // if the indices are known different, extract the element from
2769 // the original vector.
2770 if (N1.getOperand(2) == N2) {
2771 if (VT == N1.getOperand(1).getValueType())
2772 return N1.getOperand(1);
2774 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2775 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2776 isa<ConstantSDNode>(N2))
2777 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2780 case ISD::EXTRACT_ELEMENT:
2781 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2782 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2783 (N1.getValueType().isInteger() == VT.isInteger()) &&
2784 "Wrong types for EXTRACT_ELEMENT!");
2786 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2787 // 64-bit integers into 32-bit parts. Instead of building the extract of
2788 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2789 if (N1.getOpcode() == ISD::BUILD_PAIR)
2790 return N1.getOperand(N2C->getZExtValue());
2792 // EXTRACT_ELEMENT of a constant int is also very common.
2793 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2794 unsigned ElementSize = VT.getSizeInBits();
2795 unsigned Shift = ElementSize * N2C->getZExtValue();
2796 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2797 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2800 case ISD::EXTRACT_SUBVECTOR:
2801 if (N1.getValueType() == VT) // Trivial extraction.
2808 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2809 if (SV.getNode()) return SV;
2810 } else { // Cannonicalize constant to RHS if commutative
2811 if (isCommutativeBinOp(Opcode)) {
2812 std::swap(N1C, N2C);
2818 // Constant fold FP operations.
2819 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2820 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2822 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2823 // Cannonicalize constant to RHS if commutative
2824 std::swap(N1CFP, N2CFP);
2826 } else if (N2CFP && VT != MVT::ppcf128) {
2827 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2828 APFloat::opStatus s;
2831 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2832 if (s != APFloat::opInvalidOp)
2833 return getConstantFP(V1, VT);
2836 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2837 if (s!=APFloat::opInvalidOp)
2838 return getConstantFP(V1, VT);
2841 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2842 if (s!=APFloat::opInvalidOp)
2843 return getConstantFP(V1, VT);
2846 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2847 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2848 return getConstantFP(V1, VT);
2851 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2852 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2853 return getConstantFP(V1, VT);
2855 case ISD::FCOPYSIGN:
2857 return getConstantFP(V1, VT);
2863 // Canonicalize an UNDEF to the RHS, even over a constant.
2864 if (N1.getOpcode() == ISD::UNDEF) {
2865 if (isCommutativeBinOp(Opcode)) {
2869 case ISD::FP_ROUND_INREG:
2870 case ISD::SIGN_EXTEND_INREG:
2876 return N1; // fold op(undef, arg2) -> undef
2884 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2885 // For vectors, we can't easily build an all zero vector, just return
2892 // Fold a bunch of operators when the RHS is undef.
2893 if (N2.getOpcode() == ISD::UNDEF) {
2896 if (N1.getOpcode() == ISD::UNDEF)
2897 // Handle undef ^ undef -> 0 special case. This is a common
2899 return getConstant(0, VT);
2909 return N2; // fold op(arg1, undef) -> undef
2923 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2924 // For vectors, we can't easily build an all zero vector, just return
2929 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2930 // For vectors, we can't easily build an all one vector, just return
2938 // Memoize this node if possible.
2940 SDVTList VTs = getVTList(VT);
2941 if (VT != MVT::Flag) {
2942 SDValue Ops[] = { N1, N2 };
2943 FoldingSetNodeID ID;
2944 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2946 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2947 return SDValue(E, 0);
2949 N = NodeAllocator.Allocate<BinarySDNode>();
2950 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2951 CSEMap.InsertNode(N, IP);
2953 N = NodeAllocator.Allocate<BinarySDNode>();
2954 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2957 AllNodes.push_back(N);
2961 return SDValue(N, 0);
2964 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2965 SDValue N1, SDValue N2, SDValue N3) {
2966 // Perform various simplifications.
2967 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2968 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2970 case ISD::CONCAT_VECTORS:
2971 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2972 // one big BUILD_VECTOR.
2973 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2974 N2.getOpcode() == ISD::BUILD_VECTOR &&
2975 N3.getOpcode() == ISD::BUILD_VECTOR) {
2976 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2977 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2978 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2979 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2983 // Use FoldSetCC to simplify SETCC's.
2984 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2985 if (Simp.getNode()) return Simp;
2990 if (N1C->getZExtValue())
2991 return N2; // select true, X, Y -> X
2993 return N3; // select false, X, Y -> Y
2996 if (N2 == N3) return N2; // select C, X, X -> X
3000 if (N2C->getZExtValue()) // Unconditional branch
3001 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3003 return N1; // Never-taken branch
3006 case ISD::VECTOR_SHUFFLE:
3007 llvm_unreachable("should use getVectorShuffle constructor!");
3009 case ISD::BIT_CONVERT:
3010 // Fold bit_convert nodes from a type to themselves.
3011 if (N1.getValueType() == VT)
3016 // Memoize node if it doesn't produce a flag.
3018 SDVTList VTs = getVTList(VT);
3019 if (VT != MVT::Flag) {
3020 SDValue Ops[] = { N1, N2, N3 };
3021 FoldingSetNodeID ID;
3022 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3025 return SDValue(E, 0);
3027 N = NodeAllocator.Allocate<TernarySDNode>();
3028 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3029 CSEMap.InsertNode(N, IP);
3031 N = NodeAllocator.Allocate<TernarySDNode>();
3032 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3035 AllNodes.push_back(N);
3039 return SDValue(N, 0);
3042 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3043 SDValue N1, SDValue N2, SDValue N3,
3045 SDValue Ops[] = { N1, N2, N3, N4 };
3046 return getNode(Opcode, DL, VT, Ops, 4);
3049 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3050 SDValue N1, SDValue N2, SDValue N3,
3051 SDValue N4, SDValue N5) {
3052 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3053 return getNode(Opcode, DL, VT, Ops, 5);
3056 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3057 /// the incoming stack arguments to be loaded from the stack.
3058 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3059 SmallVector<SDValue, 8> ArgChains;
3061 // Include the original chain at the beginning of the list. When this is
3062 // used by target LowerCall hooks, this helps legalize find the
3063 // CALLSEQ_BEGIN node.
3064 ArgChains.push_back(Chain);
3066 // Add a chain value for each stack argument.
3067 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3068 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3069 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3070 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3071 if (FI->getIndex() < 0)
3072 ArgChains.push_back(SDValue(L, 1));
3074 // Build a tokenfactor for all the chains.
3075 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3076 &ArgChains[0], ArgChains.size());
3079 /// getMemsetValue - Vectorized representation of the memset value
3081 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3083 unsigned NumBits = VT.isVector() ?
3084 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3085 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3086 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3088 for (unsigned i = NumBits; i > 8; i >>= 1) {
3089 Val = (Val << Shift) | Val;
3093 return DAG.getConstant(Val, VT);
3094 return DAG.getConstantFP(APFloat(Val), VT);
3097 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3098 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3100 for (unsigned i = NumBits; i > 8; i >>= 1) {
3101 Value = DAG.getNode(ISD::OR, dl, VT,
3102 DAG.getNode(ISD::SHL, dl, VT, Value,
3103 DAG.getConstant(Shift,
3104 TLI.getShiftAmountTy())),
3112 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3113 /// used when a memcpy is turned into a memset when the source is a constant
3115 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3116 const TargetLowering &TLI,
3117 std::string &Str, unsigned Offset) {
3118 // Handle vector with all elements zero.
3121 return DAG.getConstant(0, VT);
3122 unsigned NumElts = VT.getVectorNumElements();
3123 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3124 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3126 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3129 assert(!VT.isVector() && "Can't handle vector type here!");
3130 unsigned NumBits = VT.getSizeInBits();
3131 unsigned MSB = NumBits / 8;
3133 if (TLI.isLittleEndian())
3134 Offset = Offset + MSB - 1;
3135 for (unsigned i = 0; i != MSB; ++i) {
3136 Val = (Val << 8) | (unsigned char)Str[Offset];
3137 Offset += TLI.isLittleEndian() ? -1 : 1;
3139 return DAG.getConstant(Val, VT);
3142 /// getMemBasePlusOffset - Returns base and offset node for the
3144 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3145 SelectionDAG &DAG) {
3146 EVT VT = Base.getValueType();
3147 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3148 VT, Base, DAG.getConstant(Offset, VT));
3151 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3153 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3154 unsigned SrcDelta = 0;
3155 GlobalAddressSDNode *G = NULL;
3156 if (Src.getOpcode() == ISD::GlobalAddress)
3157 G = cast<GlobalAddressSDNode>(Src);
3158 else if (Src.getOpcode() == ISD::ADD &&
3159 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3160 Src.getOperand(1).getOpcode() == ISD::Constant) {
3161 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3162 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3167 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3168 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3174 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3175 /// to replace the memset / memcpy is below the threshold. It also returns the
3176 /// types of the sequence of memory ops to perform memset / memcpy.
3178 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3179 SDValue Dst, SDValue Src,
3180 unsigned Limit, uint64_t Size, unsigned &Align,
3181 std::string &Str, bool &isSrcStr,
3183 const TargetLowering &TLI) {
3184 isSrcStr = isMemSrcFromString(Src, Str);
3185 bool isSrcConst = isa<ConstantSDNode>(Src);
3186 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3187 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3188 if (VT != MVT::iAny) {
3189 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3190 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3191 // If source is a string constant, this will require an unaligned load.
3192 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3193 if (Dst.getOpcode() != ISD::FrameIndex) {
3194 // Can't change destination alignment. It requires a unaligned store.
3198 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3199 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3200 if (MFI->isFixedObjectIndex(FI)) {
3201 // Can't change destination alignment. It requires a unaligned store.
3205 // Give the stack frame object a larger alignment if needed.
3206 if (MFI->getObjectAlignment(FI) < NewAlign)
3207 MFI->setObjectAlignment(FI, NewAlign);
3214 if (VT == MVT::iAny) {
3215 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3218 switch (Align & 7) {
3219 case 0: VT = MVT::i64; break;
3220 case 4: VT = MVT::i32; break;
3221 case 2: VT = MVT::i16; break;
3222 default: VT = MVT::i8; break;
3227 while (!TLI.isTypeLegal(LVT))
3228 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3229 assert(LVT.isInteger());
3235 unsigned NumMemOps = 0;
3237 unsigned VTSize = VT.getSizeInBits() / 8;
3238 while (VTSize > Size) {
3239 // For now, only use non-vector load / store's for the left-over pieces.
3240 if (VT.isVector()) {
3242 while (!TLI.isTypeLegal(VT))
3243 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3244 VTSize = VT.getSizeInBits() / 8;
3246 // This can result in a type that is not legal on the target, e.g.
3247 // 1 or 2 bytes on PPC.
3248 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3253 if (++NumMemOps > Limit)
3255 MemOps.push_back(VT);
3262 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3263 SDValue Chain, SDValue Dst,
3264 SDValue Src, uint64_t Size,
3265 unsigned Align, bool AlwaysInline,
3266 const Value *DstSV, uint64_t DstSVOff,
3267 const Value *SrcSV, uint64_t SrcSVOff){
3268 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3270 // Expand memcpy to a series of load and store ops if the size operand falls
3271 // below a certain threshold.
3272 std::vector<EVT> MemOps;
3273 uint64_t Limit = -1ULL;
3275 Limit = TLI.getMaxStoresPerMemcpy();
3276 unsigned DstAlign = Align; // Destination alignment can change.
3279 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3280 Str, CopyFromStr, DAG, TLI))
3284 bool isZeroStr = CopyFromStr && Str.empty();
3285 SmallVector<SDValue, 8> OutChains;
3286 unsigned NumMemOps = MemOps.size();
3287 uint64_t SrcOff = 0, DstOff = 0;
3288 for (unsigned i = 0; i != NumMemOps; ++i) {
3290 unsigned VTSize = VT.getSizeInBits() / 8;
3291 SDValue Value, Store;
3293 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3294 // It's unlikely a store of a vector immediate can be done in a single
3295 // instruction. It would require a load from a constantpool first.
3296 // We also handle store a vector with all zero's.
3297 // FIXME: Handle other cases where store of vector immediate is done in
3298 // a single instruction.
3299 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3300 Store = DAG.getStore(Chain, dl, Value,
3301 getMemBasePlusOffset(Dst, DstOff, DAG),
3302 DstSV, DstSVOff + DstOff, false, DstAlign);
3304 // The type might not be legal for the target. This should only happen
3305 // if the type is smaller than a legal type, as on PPC, so the right
3306 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3307 // to Load/Store if NVT==VT.
3308 // FIXME does the case above also need this?
3309 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3310 assert(NVT.bitsGE(VT));
3311 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3312 getMemBasePlusOffset(Src, SrcOff, DAG),
3313 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3314 Store = DAG.getTruncStore(Chain, dl, Value,
3315 getMemBasePlusOffset(Dst, DstOff, DAG),
3316 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3318 OutChains.push_back(Store);
3323 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3324 &OutChains[0], OutChains.size());
3327 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3328 SDValue Chain, SDValue Dst,
3329 SDValue Src, uint64_t Size,
3330 unsigned Align, bool AlwaysInline,
3331 const Value *DstSV, uint64_t DstSVOff,
3332 const Value *SrcSV, uint64_t SrcSVOff){
3333 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3335 // Expand memmove to a series of load and store ops if the size operand falls
3336 // below a certain threshold.
3337 std::vector<EVT> MemOps;
3338 uint64_t Limit = -1ULL;
3340 Limit = TLI.getMaxStoresPerMemmove();
3341 unsigned DstAlign = Align; // Destination alignment can change.
3344 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3345 Str, CopyFromStr, DAG, TLI))
3348 uint64_t SrcOff = 0, DstOff = 0;
3350 SmallVector<SDValue, 8> LoadValues;
3351 SmallVector<SDValue, 8> LoadChains;
3352 SmallVector<SDValue, 8> OutChains;
3353 unsigned NumMemOps = MemOps.size();
3354 for (unsigned i = 0; i < NumMemOps; i++) {
3356 unsigned VTSize = VT.getSizeInBits() / 8;
3357 SDValue Value, Store;
3359 Value = DAG.getLoad(VT, dl, Chain,
3360 getMemBasePlusOffset(Src, SrcOff, DAG),
3361 SrcSV, SrcSVOff + SrcOff, false, Align);
3362 LoadValues.push_back(Value);
3363 LoadChains.push_back(Value.getValue(1));
3366 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3367 &LoadChains[0], LoadChains.size());
3369 for (unsigned i = 0; i < NumMemOps; i++) {
3371 unsigned VTSize = VT.getSizeInBits() / 8;
3372 SDValue Value, Store;
3374 Store = DAG.getStore(Chain, dl, LoadValues[i],
3375 getMemBasePlusOffset(Dst, DstOff, DAG),
3376 DstSV, DstSVOff + DstOff, false, DstAlign);
3377 OutChains.push_back(Store);
3381 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3382 &OutChains[0], OutChains.size());
3385 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3386 SDValue Chain, SDValue Dst,
3387 SDValue Src, uint64_t Size,
3389 const Value *DstSV, uint64_t DstSVOff) {
3390 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3392 // Expand memset to a series of load/store ops if the size operand
3393 // falls below a certain threshold.
3394 std::vector<EVT> MemOps;
3397 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3398 Size, Align, Str, CopyFromStr, DAG, TLI))
3401 SmallVector<SDValue, 8> OutChains;
3402 uint64_t DstOff = 0;
3404 unsigned NumMemOps = MemOps.size();
3405 for (unsigned i = 0; i < NumMemOps; i++) {
3407 unsigned VTSize = VT.getSizeInBits() / 8;
3408 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3409 SDValue Store = DAG.getStore(Chain, dl, Value,
3410 getMemBasePlusOffset(Dst, DstOff, DAG),
3411 DstSV, DstSVOff + DstOff);
3412 OutChains.push_back(Store);
3416 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3417 &OutChains[0], OutChains.size());
3420 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3421 SDValue Src, SDValue Size,
3422 unsigned Align, bool AlwaysInline,
3423 const Value *DstSV, uint64_t DstSVOff,
3424 const Value *SrcSV, uint64_t SrcSVOff) {
3426 // Check to see if we should lower the memcpy to loads and stores first.
3427 // For cases within the target-specified limits, this is the best choice.
3428 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3430 // Memcpy with size zero? Just return the original chain.
3431 if (ConstantSize->isNullValue())
3435 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3436 ConstantSize->getZExtValue(),
3437 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3438 if (Result.getNode())
3442 // Then check to see if we should lower the memcpy with target-specific
3443 // code. If the target chooses to do this, this is the next best.
3445 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3447 DstSV, DstSVOff, SrcSV, SrcSVOff);
3448 if (Result.getNode())
3451 // If we really need inline code and the target declined to provide it,
3452 // use a (potentially long) sequence of loads and stores.
3454 assert(ConstantSize && "AlwaysInline requires a constant size!");
3455 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3456 ConstantSize->getZExtValue(), Align, true,
3457 DstSV, DstSVOff, SrcSV, SrcSVOff);
3460 // Emit a library call.
3461 TargetLowering::ArgListTy Args;
3462 TargetLowering::ArgListEntry Entry;
3463 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3464 Entry.Node = Dst; Args.push_back(Entry);
3465 Entry.Node = Src; Args.push_back(Entry);
3466 Entry.Node = Size; Args.push_back(Entry);
3467 // FIXME: pass in DebugLoc
3468 std::pair<SDValue,SDValue> CallResult =
3469 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3470 false, false, false, false, 0,
3471 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3472 /*isReturnValueUsed=*/false,
3473 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3474 TLI.getPointerTy()),
3475 Args, *this, dl, GetOrdering(Chain.getNode()));
3476 return CallResult.second;
3479 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3480 SDValue Src, SDValue Size,
3482 const Value *DstSV, uint64_t DstSVOff,
3483 const Value *SrcSV, uint64_t SrcSVOff) {
3485 // Check to see if we should lower the memmove to loads and stores first.
3486 // For cases within the target-specified limits, this is the best choice.
3487 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3489 // Memmove with size zero? Just return the original chain.
3490 if (ConstantSize->isNullValue())
3494 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3495 ConstantSize->getZExtValue(),
3496 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3497 if (Result.getNode())
3501 // Then check to see if we should lower the memmove with target-specific
3502 // code. If the target chooses to do this, this is the next best.
3504 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3505 DstSV, DstSVOff, SrcSV, SrcSVOff);
3506 if (Result.getNode())
3509 // Emit a library call.
3510 TargetLowering::ArgListTy Args;
3511 TargetLowering::ArgListEntry Entry;
3512 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3513 Entry.Node = Dst; Args.push_back(Entry);
3514 Entry.Node = Src; Args.push_back(Entry);
3515 Entry.Node = Size; Args.push_back(Entry);
3516 // FIXME: pass in DebugLoc
3517 std::pair<SDValue,SDValue> CallResult =
3518 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3519 false, false, false, false, 0,
3520 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3521 /*isReturnValueUsed=*/false,
3522 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3523 TLI.getPointerTy()),
3524 Args, *this, dl, GetOrdering(Chain.getNode()));
3525 return CallResult.second;
3528 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3529 SDValue Src, SDValue Size,
3531 const Value *DstSV, uint64_t DstSVOff) {
3533 // Check to see if we should lower the memset to stores first.
3534 // For cases within the target-specified limits, this is the best choice.
3535 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3537 // Memset with size zero? Just return the original chain.
3538 if (ConstantSize->isNullValue())
3542 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3543 Align, DstSV, DstSVOff);
3544 if (Result.getNode())
3548 // Then check to see if we should lower the memset with target-specific
3549 // code. If the target chooses to do this, this is the next best.
3551 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3553 if (Result.getNode())
3556 // Emit a library call.
3557 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3558 TargetLowering::ArgListTy Args;
3559 TargetLowering::ArgListEntry Entry;
3560 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3561 Args.push_back(Entry);
3562 // Extend or truncate the argument to be an i32 value for the call.
3563 if (Src.getValueType().bitsGT(MVT::i32))
3564 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3566 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3568 Entry.Ty = Type::getInt32Ty(*getContext());
3569 Entry.isSExt = true;
3570 Args.push_back(Entry);
3572 Entry.Ty = IntPtrTy;
3573 Entry.isSExt = false;
3574 Args.push_back(Entry);
3575 // FIXME: pass in DebugLoc
3576 std::pair<SDValue,SDValue> CallResult =
3577 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3578 false, false, false, false, 0,
3579 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3580 /*isReturnValueUsed=*/false,
3581 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3582 TLI.getPointerTy()),
3583 Args, *this, dl, GetOrdering(Chain.getNode()));
3584 return CallResult.second;
3587 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3589 SDValue Ptr, SDValue Cmp,
3590 SDValue Swp, const Value* PtrVal,
3591 unsigned Alignment) {
3592 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3593 Alignment = getEVTAlignment(MemVT);
3595 // Check if the memory reference references a frame index
3597 if (const FrameIndexSDNode *FI =
3598 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3599 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3601 MachineFunction &MF = getMachineFunction();
3602 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3604 // For now, atomics are considered to be volatile always.
3605 Flags |= MachineMemOperand::MOVolatile;
3607 MachineMemOperand *MMO =
3608 MF.getMachineMemOperand(PtrVal, Flags, 0,
3609 MemVT.getStoreSize(), Alignment);
3611 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3614 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3616 SDValue Ptr, SDValue Cmp,
3617 SDValue Swp, MachineMemOperand *MMO) {
3618 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3619 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3621 EVT VT = Cmp.getValueType();
3623 SDVTList VTs = getVTList(VT, MVT::Other);
3624 FoldingSetNodeID ID;
3625 ID.AddInteger(MemVT.getRawBits());
3626 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3627 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3629 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3630 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3631 return SDValue(E, 0);
3633 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3634 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3635 CSEMap.InsertNode(N, IP);
3636 AllNodes.push_back(N);
3637 return SDValue(N, 0);
3640 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3642 SDValue Ptr, SDValue Val,
3643 const Value* PtrVal,
3644 unsigned Alignment) {
3645 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3646 Alignment = getEVTAlignment(MemVT);
3648 // Check if the memory reference references a frame index
3650 if (const FrameIndexSDNode *FI =
3651 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3652 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3654 MachineFunction &MF = getMachineFunction();
3655 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3657 // For now, atomics are considered to be volatile always.
3658 Flags |= MachineMemOperand::MOVolatile;
3660 MachineMemOperand *MMO =
3661 MF.getMachineMemOperand(PtrVal, Flags, 0,
3662 MemVT.getStoreSize(), Alignment);
3664 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3667 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3669 SDValue Ptr, SDValue Val,
3670 MachineMemOperand *MMO) {
3671 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3672 Opcode == ISD::ATOMIC_LOAD_SUB ||
3673 Opcode == ISD::ATOMIC_LOAD_AND ||
3674 Opcode == ISD::ATOMIC_LOAD_OR ||
3675 Opcode == ISD::ATOMIC_LOAD_XOR ||
3676 Opcode == ISD::ATOMIC_LOAD_NAND ||
3677 Opcode == ISD::ATOMIC_LOAD_MIN ||
3678 Opcode == ISD::ATOMIC_LOAD_MAX ||
3679 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3680 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3681 Opcode == ISD::ATOMIC_SWAP) &&
3682 "Invalid Atomic Op");
3684 EVT VT = Val.getValueType();
3686 SDVTList VTs = getVTList(VT, MVT::Other);
3687 FoldingSetNodeID ID;
3688 ID.AddInteger(MemVT.getRawBits());
3689 SDValue Ops[] = {Chain, Ptr, Val};
3690 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3692 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3693 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3694 return SDValue(E, 0);
3696 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3697 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3698 CSEMap.InsertNode(N, IP);
3699 AllNodes.push_back(N);
3700 return SDValue(N, 0);
3703 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3704 /// Allowed to return something different (and simpler) if Simplify is true.
3705 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3710 SmallVector<EVT, 4> VTs;
3711 VTs.reserve(NumOps);
3712 for (unsigned i = 0; i < NumOps; ++i)
3713 VTs.push_back(Ops[i].getValueType());
3714 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3719 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3720 const EVT *VTs, unsigned NumVTs,
3721 const SDValue *Ops, unsigned NumOps,
3722 EVT MemVT, const Value *srcValue, int SVOff,
3723 unsigned Align, bool Vol,
3724 bool ReadMem, bool WriteMem) {
3725 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3726 MemVT, srcValue, SVOff, Align, Vol,
3731 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3732 const SDValue *Ops, unsigned NumOps,
3733 EVT MemVT, const Value *srcValue, int SVOff,
3734 unsigned Align, bool Vol,
3735 bool ReadMem, bool WriteMem) {
3736 if (Align == 0) // Ensure that codegen never sees alignment 0
3737 Align = getEVTAlignment(MemVT);
3739 MachineFunction &MF = getMachineFunction();
3742 Flags |= MachineMemOperand::MOStore;
3744 Flags |= MachineMemOperand::MOLoad;
3746 Flags |= MachineMemOperand::MOVolatile;
3747 MachineMemOperand *MMO =
3748 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3749 MemVT.getStoreSize(), Align);
3751 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3755 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3756 const SDValue *Ops, unsigned NumOps,
3757 EVT MemVT, MachineMemOperand *MMO) {
3758 assert((Opcode == ISD::INTRINSIC_VOID ||
3759 Opcode == ISD::INTRINSIC_W_CHAIN ||
3760 (Opcode <= INT_MAX &&
3761 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3762 "Opcode is not a memory-accessing opcode!");
3764 // Memoize the node unless it returns a flag.
3765 MemIntrinsicSDNode *N;
3766 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3767 FoldingSetNodeID ID;
3768 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3770 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3771 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3772 return SDValue(E, 0);
3775 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3776 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3777 CSEMap.InsertNode(N, IP);
3779 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3780 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3782 AllNodes.push_back(N);
3783 return SDValue(N, 0);
3787 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3788 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3789 SDValue Ptr, SDValue Offset,
3790 const Value *SV, int SVOffset, EVT MemVT,
3791 bool isVolatile, unsigned Alignment) {
3792 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3793 Alignment = getEVTAlignment(VT);
3795 // Check if the memory reference references a frame index
3797 if (const FrameIndexSDNode *FI =
3798 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3799 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3801 MachineFunction &MF = getMachineFunction();
3802 unsigned Flags = MachineMemOperand::MOLoad;
3804 Flags |= MachineMemOperand::MOVolatile;
3805 MachineMemOperand *MMO =
3806 MF.getMachineMemOperand(SV, Flags, SVOffset,
3807 MemVT.getStoreSize(), Alignment);
3808 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3812 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3813 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3814 SDValue Ptr, SDValue Offset, EVT MemVT,
3815 MachineMemOperand *MMO) {
3817 ExtType = ISD::NON_EXTLOAD;
3818 } else if (ExtType == ISD::NON_EXTLOAD) {
3819 assert(VT == MemVT && "Non-extending load from different memory type!");
3822 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3823 "Should only be an extending load, not truncating!");
3824 assert(VT.isInteger() == MemVT.isInteger() &&
3825 "Cannot convert from FP to Int or Int -> FP!");
3826 assert(VT.isVector() == MemVT.isVector() &&
3827 "Cannot use trunc store to convert to or from a vector!");
3828 assert((!VT.isVector() ||
3829 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3830 "Cannot use trunc store to change the number of vector elements!");
3833 bool Indexed = AM != ISD::UNINDEXED;
3834 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3835 "Unindexed load with an offset!");
3837 SDVTList VTs = Indexed ?
3838 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3839 SDValue Ops[] = { Chain, Ptr, Offset };
3840 FoldingSetNodeID ID;
3841 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3842 ID.AddInteger(MemVT.getRawBits());
3843 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile()));
3845 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3846 cast<LoadSDNode>(E)->refineAlignment(MMO);
3847 return SDValue(E, 0);
3849 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3850 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3851 CSEMap.InsertNode(N, IP);
3852 AllNodes.push_back(N);
3853 return SDValue(N, 0);
3856 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3857 SDValue Chain, SDValue Ptr,
3858 const Value *SV, int SVOffset,
3859 bool isVolatile, unsigned Alignment) {
3860 SDValue Undef = getUNDEF(Ptr.getValueType());
3861 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3862 SV, SVOffset, VT, isVolatile, Alignment);
3865 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3866 SDValue Chain, SDValue Ptr,
3868 int SVOffset, EVT MemVT,
3869 bool isVolatile, unsigned Alignment) {
3870 SDValue Undef = getUNDEF(Ptr.getValueType());
3871 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3872 SV, SVOffset, MemVT, isVolatile, Alignment);
3876 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3877 SDValue Offset, ISD::MemIndexedMode AM) {
3878 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3879 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3880 "Load is already a indexed load!");
3881 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3882 LD->getChain(), Base, Offset, LD->getSrcValue(),
3883 LD->getSrcValueOffset(), LD->getMemoryVT(),
3884 LD->isVolatile(), LD->getAlignment());
3887 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3888 SDValue Ptr, const Value *SV, int SVOffset,
3889 bool isVolatile, unsigned Alignment) {
3890 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3891 Alignment = getEVTAlignment(Val.getValueType());
3893 // Check if the memory reference references a frame index
3895 if (const FrameIndexSDNode *FI =
3896 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3897 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3899 MachineFunction &MF = getMachineFunction();
3900 unsigned Flags = MachineMemOperand::MOStore;
3902 Flags |= MachineMemOperand::MOVolatile;
3903 MachineMemOperand *MMO =
3904 MF.getMachineMemOperand(SV, Flags, SVOffset,
3905 Val.getValueType().getStoreSize(), Alignment);
3907 return getStore(Chain, dl, Val, Ptr, MMO);
3910 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3911 SDValue Ptr, MachineMemOperand *MMO) {
3912 EVT VT = Val.getValueType();
3913 SDVTList VTs = getVTList(MVT::Other);
3914 SDValue Undef = getUNDEF(Ptr.getValueType());
3915 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3916 FoldingSetNodeID ID;
3917 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3918 ID.AddInteger(VT.getRawBits());
3919 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile()));
3921 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3922 cast<StoreSDNode>(E)->refineAlignment(MMO);
3923 return SDValue(E, 0);
3925 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3926 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3927 CSEMap.InsertNode(N, IP);
3928 AllNodes.push_back(N);
3929 return SDValue(N, 0);
3932 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3933 SDValue Ptr, const Value *SV,
3934 int SVOffset, EVT SVT,
3935 bool isVolatile, unsigned Alignment) {
3936 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3937 Alignment = getEVTAlignment(SVT);
3939 // Check if the memory reference references a frame index
3941 if (const FrameIndexSDNode *FI =
3942 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3943 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3945 MachineFunction &MF = getMachineFunction();
3946 unsigned Flags = MachineMemOperand::MOStore;
3948 Flags |= MachineMemOperand::MOVolatile;
3949 MachineMemOperand *MMO =
3950 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3952 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3955 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3956 SDValue Ptr, EVT SVT,
3957 MachineMemOperand *MMO) {
3958 EVT VT = Val.getValueType();
3961 return getStore(Chain, dl, Val, Ptr, MMO);
3963 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
3964 "Should only be a truncating store, not extending!");
3965 assert(VT.isInteger() == SVT.isInteger() &&
3966 "Can't do FP-INT conversion!");
3967 assert(VT.isVector() == SVT.isVector() &&
3968 "Cannot use trunc store to convert to or from a vector!");
3969 assert((!VT.isVector() ||
3970 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
3971 "Cannot use trunc store to change the number of vector elements!");
3973 SDVTList VTs = getVTList(MVT::Other);
3974 SDValue Undef = getUNDEF(Ptr.getValueType());
3975 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3976 FoldingSetNodeID ID;
3977 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3978 ID.AddInteger(SVT.getRawBits());
3979 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile()));
3981 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3982 cast<StoreSDNode>(E)->refineAlignment(MMO);
3983 return SDValue(E, 0);
3985 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3986 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
3987 CSEMap.InsertNode(N, IP);
3988 AllNodes.push_back(N);
3989 return SDValue(N, 0);
3993 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3994 SDValue Offset, ISD::MemIndexedMode AM) {
3995 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3996 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3997 "Store is already a indexed store!");
3998 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3999 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4000 FoldingSetNodeID ID;
4001 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4002 ID.AddInteger(ST->getMemoryVT().getRawBits());
4003 ID.AddInteger(ST->getRawSubclassData());
4005 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4006 return SDValue(E, 0);
4008 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4009 new (N) StoreSDNode(Ops, dl, VTs, AM,
4010 ST->isTruncatingStore(), ST->getMemoryVT(),
4011 ST->getMemOperand());
4012 CSEMap.InsertNode(N, IP);
4013 AllNodes.push_back(N);
4014 return SDValue(N, 0);
4017 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4018 SDValue Chain, SDValue Ptr,
4020 SDValue Ops[] = { Chain, Ptr, SV };
4021 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4024 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4025 const SDUse *Ops, unsigned NumOps) {
4027 case 0: return getNode(Opcode, DL, VT);
4028 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4029 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4030 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4034 // Copy from an SDUse array into an SDValue array for use with
4035 // the regular getNode logic.
4036 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4037 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4040 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4041 const SDValue *Ops, unsigned NumOps) {
4043 case 0: return getNode(Opcode, DL, VT);
4044 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4045 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4046 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4052 case ISD::SELECT_CC: {
4053 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4054 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4055 "LHS and RHS of condition must have same type!");
4056 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4057 "True and False arms of SelectCC must have same type!");
4058 assert(Ops[2].getValueType() == VT &&
4059 "select_cc node must be of same type as true and false value!");
4063 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4064 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4065 "LHS/RHS of comparison should match types!");
4072 SDVTList VTs = getVTList(VT);
4074 if (VT != MVT::Flag) {
4075 FoldingSetNodeID ID;
4076 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4079 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4080 return SDValue(E, 0);
4082 N = NodeAllocator.Allocate<SDNode>();
4083 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4084 CSEMap.InsertNode(N, IP);
4086 N = NodeAllocator.Allocate<SDNode>();
4087 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4090 AllNodes.push_back(N);
4094 return SDValue(N, 0);
4097 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4098 const std::vector<EVT> &ResultTys,
4099 const SDValue *Ops, unsigned NumOps) {
4100 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4104 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4105 const EVT *VTs, unsigned NumVTs,
4106 const SDValue *Ops, unsigned NumOps) {
4108 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4109 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4112 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4113 const SDValue *Ops, unsigned NumOps) {
4114 if (VTList.NumVTs == 1)
4115 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4119 // FIXME: figure out how to safely handle things like
4120 // int foo(int x) { return 1 << (x & 255); }
4121 // int bar() { return foo(256); }
4122 case ISD::SRA_PARTS:
4123 case ISD::SRL_PARTS:
4124 case ISD::SHL_PARTS:
4125 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4126 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4127 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4128 else if (N3.getOpcode() == ISD::AND)
4129 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4130 // If the and is only masking out bits that cannot effect the shift,
4131 // eliminate the and.
4132 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4133 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4134 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4140 // Memoize the node unless it returns a flag.
4142 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4143 FoldingSetNodeID ID;
4144 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4146 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4147 return SDValue(E, 0);
4150 N = NodeAllocator.Allocate<UnarySDNode>();
4151 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4152 } else if (NumOps == 2) {
4153 N = NodeAllocator.Allocate<BinarySDNode>();
4154 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4155 } else if (NumOps == 3) {
4156 N = NodeAllocator.Allocate<TernarySDNode>();
4157 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4159 N = NodeAllocator.Allocate<SDNode>();
4160 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4162 CSEMap.InsertNode(N, IP);
4165 N = NodeAllocator.Allocate<UnarySDNode>();
4166 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4167 } else if (NumOps == 2) {
4168 N = NodeAllocator.Allocate<BinarySDNode>();
4169 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4170 } else if (NumOps == 3) {
4171 N = NodeAllocator.Allocate<TernarySDNode>();
4172 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4174 N = NodeAllocator.Allocate<SDNode>();
4175 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4178 AllNodes.push_back(N);
4182 return SDValue(N, 0);
4185 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4186 return getNode(Opcode, DL, VTList, 0, 0);
4189 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4191 SDValue Ops[] = { N1 };
4192 return getNode(Opcode, DL, VTList, Ops, 1);
4195 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4196 SDValue N1, SDValue N2) {
4197 SDValue Ops[] = { N1, N2 };
4198 return getNode(Opcode, DL, VTList, Ops, 2);
4201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4202 SDValue N1, SDValue N2, SDValue N3) {
4203 SDValue Ops[] = { N1, N2, N3 };
4204 return getNode(Opcode, DL, VTList, Ops, 3);
4207 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4208 SDValue N1, SDValue N2, SDValue N3,
4210 SDValue Ops[] = { N1, N2, N3, N4 };
4211 return getNode(Opcode, DL, VTList, Ops, 4);
4214 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4215 SDValue N1, SDValue N2, SDValue N3,
4216 SDValue N4, SDValue N5) {
4217 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4218 return getNode(Opcode, DL, VTList, Ops, 5);
4221 SDVTList SelectionDAG::getVTList(EVT VT) {
4222 return makeVTList(SDNode::getValueTypeList(VT), 1);
4225 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4226 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4227 E = VTList.rend(); I != E; ++I)
4228 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4231 EVT *Array = Allocator.Allocate<EVT>(2);
4234 SDVTList Result = makeVTList(Array, 2);
4235 VTList.push_back(Result);
4239 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4240 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4241 E = VTList.rend(); I != E; ++I)
4242 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4246 EVT *Array = Allocator.Allocate<EVT>(3);
4250 SDVTList Result = makeVTList(Array, 3);
4251 VTList.push_back(Result);
4255 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4256 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4257 E = VTList.rend(); I != E; ++I)
4258 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4259 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4262 EVT *Array = Allocator.Allocate<EVT>(4);
4267 SDVTList Result = makeVTList(Array, 4);
4268 VTList.push_back(Result);
4272 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4274 case 0: llvm_unreachable("Cannot have nodes without results!");
4275 case 1: return getVTList(VTs[0]);
4276 case 2: return getVTList(VTs[0], VTs[1]);
4277 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4278 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4282 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4283 E = VTList.rend(); I != E; ++I) {
4284 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4287 bool NoMatch = false;
4288 for (unsigned i = 2; i != NumVTs; ++i)
4289 if (VTs[i] != I->VTs[i]) {
4297 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4298 std::copy(VTs, VTs+NumVTs, Array);
4299 SDVTList Result = makeVTList(Array, NumVTs);
4300 VTList.push_back(Result);
4305 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4306 /// specified operands. If the resultant node already exists in the DAG,
4307 /// this does not modify the specified node, instead it returns the node that
4308 /// already exists. If the resultant node does not exist in the DAG, the
4309 /// input node is returned. As a degenerate case, if you specify the same
4310 /// input operands as the node already has, the input node is returned.
4311 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4312 SDNode *N = InN.getNode();
4313 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4315 // Check to see if there is no change.
4316 if (Op == N->getOperand(0)) return InN;
4318 // See if the modified node already exists.
4319 void *InsertPos = 0;
4320 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4321 return SDValue(Existing, InN.getResNo());
4323 // Nope it doesn't. Remove the node from its current place in the maps.
4325 if (!RemoveNodeFromCSEMaps(N))
4328 // Now we update the operands.
4329 N->OperandList[0].set(Op);
4331 // If this gets put into a CSE map, add it.
4332 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4336 SDValue SelectionDAG::
4337 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4338 SDNode *N = InN.getNode();
4339 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4341 // Check to see if there is no change.
4342 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4343 return InN; // No operands changed, just return the input node.
4345 // See if the modified node already exists.
4346 void *InsertPos = 0;
4347 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4348 return SDValue(Existing, InN.getResNo());
4350 // Nope it doesn't. Remove the node from its current place in the maps.
4352 if (!RemoveNodeFromCSEMaps(N))
4355 // Now we update the operands.
4356 if (N->OperandList[0] != Op1)
4357 N->OperandList[0].set(Op1);
4358 if (N->OperandList[1] != Op2)
4359 N->OperandList[1].set(Op2);
4361 // If this gets put into a CSE map, add it.
4362 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4366 SDValue SelectionDAG::
4367 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4368 SDValue Ops[] = { Op1, Op2, Op3 };
4369 return UpdateNodeOperands(N, Ops, 3);
4372 SDValue SelectionDAG::
4373 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4374 SDValue Op3, SDValue Op4) {
4375 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4376 return UpdateNodeOperands(N, Ops, 4);
4379 SDValue SelectionDAG::
4380 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4381 SDValue Op3, SDValue Op4, SDValue Op5) {
4382 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4383 return UpdateNodeOperands(N, Ops, 5);
4386 SDValue SelectionDAG::
4387 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4388 SDNode *N = InN.getNode();
4389 assert(N->getNumOperands() == NumOps &&
4390 "Update with wrong number of operands");
4392 // Check to see if there is no change.
4393 bool AnyChange = false;
4394 for (unsigned i = 0; i != NumOps; ++i) {
4395 if (Ops[i] != N->getOperand(i)) {
4401 // No operands changed, just return the input node.
4402 if (!AnyChange) return InN;
4404 // See if the modified node already exists.
4405 void *InsertPos = 0;
4406 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4407 return SDValue(Existing, InN.getResNo());
4409 // Nope it doesn't. Remove the node from its current place in the maps.
4411 if (!RemoveNodeFromCSEMaps(N))
4414 // Now we update the operands.
4415 for (unsigned i = 0; i != NumOps; ++i)
4416 if (N->OperandList[i] != Ops[i])
4417 N->OperandList[i].set(Ops[i]);
4419 // If this gets put into a CSE map, add it.
4420 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4424 /// DropOperands - Release the operands and set this node to have
4426 void SDNode::DropOperands() {
4427 // Unlike the code in MorphNodeTo that does this, we don't need to
4428 // watch for dead nodes here.
4429 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4435 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4438 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4440 SDVTList VTs = getVTList(VT);
4441 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4444 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4445 EVT VT, SDValue Op1) {
4446 SDVTList VTs = getVTList(VT);
4447 SDValue Ops[] = { Op1 };
4448 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4451 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4452 EVT VT, SDValue Op1,
4454 SDVTList VTs = getVTList(VT);
4455 SDValue Ops[] = { Op1, Op2 };
4456 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4459 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4460 EVT VT, SDValue Op1,
4461 SDValue Op2, SDValue Op3) {
4462 SDVTList VTs = getVTList(VT);
4463 SDValue Ops[] = { Op1, Op2, Op3 };
4464 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4467 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4468 EVT VT, const SDValue *Ops,
4470 SDVTList VTs = getVTList(VT);
4471 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4474 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4475 EVT VT1, EVT VT2, const SDValue *Ops,
4477 SDVTList VTs = getVTList(VT1, VT2);
4478 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4481 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4483 SDVTList VTs = getVTList(VT1, VT2);
4484 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4487 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4488 EVT VT1, EVT VT2, EVT VT3,
4489 const SDValue *Ops, unsigned NumOps) {
4490 SDVTList VTs = getVTList(VT1, VT2, VT3);
4491 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4494 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4495 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4496 const SDValue *Ops, unsigned NumOps) {
4497 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4498 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4501 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4504 SDVTList VTs = getVTList(VT1, VT2);
4505 SDValue Ops[] = { Op1 };
4506 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4509 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4511 SDValue Op1, SDValue Op2) {
4512 SDVTList VTs = getVTList(VT1, VT2);
4513 SDValue Ops[] = { Op1, Op2 };
4514 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4517 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4519 SDValue Op1, SDValue Op2,
4521 SDVTList VTs = getVTList(VT1, VT2);
4522 SDValue Ops[] = { Op1, Op2, Op3 };
4523 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4526 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4527 EVT VT1, EVT VT2, EVT VT3,
4528 SDValue Op1, SDValue Op2,
4530 SDVTList VTs = getVTList(VT1, VT2, VT3);
4531 SDValue Ops[] = { Op1, Op2, Op3 };
4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4535 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4536 SDVTList VTs, const SDValue *Ops,
4538 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4541 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4543 SDVTList VTs = getVTList(VT);
4544 return MorphNodeTo(N, Opc, VTs, 0, 0);
4547 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4548 EVT VT, SDValue Op1) {
4549 SDVTList VTs = getVTList(VT);
4550 SDValue Ops[] = { Op1 };
4551 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4554 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4555 EVT VT, SDValue Op1,
4557 SDVTList VTs = getVTList(VT);
4558 SDValue Ops[] = { Op1, Op2 };
4559 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4562 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4563 EVT VT, SDValue Op1,
4564 SDValue Op2, SDValue Op3) {
4565 SDVTList VTs = getVTList(VT);
4566 SDValue Ops[] = { Op1, Op2, Op3 };
4567 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4570 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4571 EVT VT, const SDValue *Ops,
4573 SDVTList VTs = getVTList(VT);
4574 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4577 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4578 EVT VT1, EVT VT2, const SDValue *Ops,
4580 SDVTList VTs = getVTList(VT1, VT2);
4581 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4584 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4586 SDVTList VTs = getVTList(VT1, VT2);
4587 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4590 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4591 EVT VT1, EVT VT2, EVT VT3,
4592 const SDValue *Ops, unsigned NumOps) {
4593 SDVTList VTs = getVTList(VT1, VT2, VT3);
4594 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4597 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4600 SDVTList VTs = getVTList(VT1, VT2);
4601 SDValue Ops[] = { Op1 };
4602 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4605 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4607 SDValue Op1, SDValue Op2) {
4608 SDVTList VTs = getVTList(VT1, VT2);
4609 SDValue Ops[] = { Op1, Op2 };
4610 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4613 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4615 SDValue Op1, SDValue Op2,
4617 SDVTList VTs = getVTList(VT1, VT2);
4618 SDValue Ops[] = { Op1, Op2, Op3 };
4619 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4622 /// MorphNodeTo - These *mutate* the specified node to have the specified
4623 /// return type, opcode, and operands.
4625 /// Note that MorphNodeTo returns the resultant node. If there is already a
4626 /// node of the specified opcode and operands, it returns that node instead of
4627 /// the current one. Note that the DebugLoc need not be the same.
4629 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4630 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4631 /// node, and because it doesn't require CSE recalculation for any of
4632 /// the node's users.
4634 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4635 SDVTList VTs, const SDValue *Ops,
4637 // If an identical node already exists, use it.
4639 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4640 FoldingSetNodeID ID;
4641 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4642 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4646 if (!RemoveNodeFromCSEMaps(N))
4649 // Start the morphing.
4651 N->ValueList = VTs.VTs;
4652 N->NumValues = VTs.NumVTs;
4654 // Clear the operands list, updating used nodes to remove this from their
4655 // use list. Keep track of any operands that become dead as a result.
4656 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4657 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4659 SDNode *Used = Use.getNode();
4661 if (Used->use_empty())
4662 DeadNodeSet.insert(Used);
4665 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4666 // Initialize the memory references information.
4667 MN->setMemRefs(0, 0);
4668 // If NumOps is larger than the # of operands we can have in a
4669 // MachineSDNode, reallocate the operand list.
4670 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4671 if (MN->OperandsNeedDelete)
4672 delete[] MN->OperandList;
4673 if (NumOps > array_lengthof(MN->LocalOperands))
4674 // We're creating a final node that will live unmorphed for the
4675 // remainder of the current SelectionDAG iteration, so we can allocate
4676 // the operands directly out of a pool with no recycling metadata.
4677 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4680 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4681 MN->OperandsNeedDelete = false;
4683 MN->InitOperands(MN->OperandList, Ops, NumOps);
4685 // If NumOps is larger than the # of operands we currently have, reallocate
4686 // the operand list.
4687 if (NumOps > N->NumOperands) {
4688 if (N->OperandsNeedDelete)
4689 delete[] N->OperandList;
4690 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4691 N->OperandsNeedDelete = true;
4693 N->InitOperands(N->OperandList, Ops, NumOps);
4696 // Delete any nodes that are still dead after adding the uses for the
4698 SmallVector<SDNode *, 16> DeadNodes;
4699 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4700 E = DeadNodeSet.end(); I != E; ++I)
4701 if ((*I)->use_empty())
4702 DeadNodes.push_back(*I);
4703 RemoveDeadNodes(DeadNodes);
4706 CSEMap.InsertNode(N, IP); // Memoize the new node.
4711 /// getMachineNode - These are used for target selectors to create a new node
4712 /// with specified return type(s), MachineInstr opcode, and operands.
4714 /// Note that getMachineNode returns the resultant node. If there is already a
4715 /// node of the specified opcode and operands, it returns that node instead of
4716 /// the current one.
4718 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4719 SDVTList VTs = getVTList(VT);
4720 return getMachineNode(Opcode, dl, VTs, 0, 0);
4724 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4725 SDVTList VTs = getVTList(VT);
4726 SDValue Ops[] = { Op1 };
4727 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4731 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4732 SDValue Op1, SDValue Op2) {
4733 SDVTList VTs = getVTList(VT);
4734 SDValue Ops[] = { Op1, Op2 };
4735 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4739 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4740 SDValue Op1, SDValue Op2, SDValue Op3) {
4741 SDVTList VTs = getVTList(VT);
4742 SDValue Ops[] = { Op1, Op2, Op3 };
4743 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4747 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4748 const SDValue *Ops, unsigned NumOps) {
4749 SDVTList VTs = getVTList(VT);
4750 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4754 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4755 SDVTList VTs = getVTList(VT1, VT2);
4756 return getMachineNode(Opcode, dl, VTs, 0, 0);
4760 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4761 EVT VT1, EVT VT2, SDValue Op1) {
4762 SDVTList VTs = getVTList(VT1, VT2);
4763 SDValue Ops[] = { Op1 };
4764 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4768 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4769 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4770 SDVTList VTs = getVTList(VT1, VT2);
4771 SDValue Ops[] = { Op1, Op2 };
4772 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4776 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4777 EVT VT1, EVT VT2, SDValue Op1,
4778 SDValue Op2, SDValue Op3) {
4779 SDVTList VTs = getVTList(VT1, VT2);
4780 SDValue Ops[] = { Op1, Op2, Op3 };
4781 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4785 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4787 const SDValue *Ops, unsigned NumOps) {
4788 SDVTList VTs = getVTList(VT1, VT2);
4789 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4793 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4794 EVT VT1, EVT VT2, EVT VT3,
4795 SDValue Op1, SDValue Op2) {
4796 SDVTList VTs = getVTList(VT1, VT2, VT3);
4797 SDValue Ops[] = { Op1, Op2 };
4798 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4802 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4803 EVT VT1, EVT VT2, EVT VT3,
4804 SDValue Op1, SDValue Op2, SDValue Op3) {
4805 SDVTList VTs = getVTList(VT1, VT2, VT3);
4806 SDValue Ops[] = { Op1, Op2, Op3 };
4807 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4811 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4812 EVT VT1, EVT VT2, EVT VT3,
4813 const SDValue *Ops, unsigned NumOps) {
4814 SDVTList VTs = getVTList(VT1, VT2, VT3);
4815 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4819 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4820 EVT VT2, EVT VT3, EVT VT4,
4821 const SDValue *Ops, unsigned NumOps) {
4822 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4823 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4827 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4828 const std::vector<EVT> &ResultTys,
4829 const SDValue *Ops, unsigned NumOps) {
4830 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4831 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4835 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4836 const SDValue *Ops, unsigned NumOps) {
4837 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4842 FoldingSetNodeID ID;
4843 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4845 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4846 return cast<MachineSDNode>(E);
4849 // Allocate a new MachineSDNode.
4850 N = NodeAllocator.Allocate<MachineSDNode>();
4851 new (N) MachineSDNode(~Opcode, DL, VTs);
4853 // Initialize the operands list.
4854 if (NumOps > array_lengthof(N->LocalOperands))
4855 // We're creating a final node that will live unmorphed for the
4856 // remainder of the current SelectionDAG iteration, so we can allocate
4857 // the operands directly out of a pool with no recycling metadata.
4858 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4861 N->InitOperands(N->LocalOperands, Ops, NumOps);
4862 N->OperandsNeedDelete = false;
4865 CSEMap.InsertNode(N, IP);
4867 AllNodes.push_back(N);
4874 /// getTargetExtractSubreg - A convenience function for creating
4875 /// TargetOpcode::EXTRACT_SUBREG nodes.
4877 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4879 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4880 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4881 VT, Operand, SRIdxVal);
4882 return SDValue(Subreg, 0);
4885 /// getTargetInsertSubreg - A convenience function for creating
4886 /// TargetOpcode::INSERT_SUBREG nodes.
4888 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4889 SDValue Operand, SDValue Subreg) {
4890 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4891 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4892 VT, Operand, Subreg, SRIdxVal);
4893 return SDValue(Result, 0);
4896 /// getNodeIfExists - Get the specified node if it's already available, or
4897 /// else return NULL.
4898 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4899 const SDValue *Ops, unsigned NumOps) {
4900 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4901 FoldingSetNodeID ID;
4902 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4910 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4911 /// This can cause recursive merging of nodes in the DAG.
4913 /// This version assumes From has a single result value.
4915 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4916 DAGUpdateListener *UpdateListener) {
4917 SDNode *From = FromN.getNode();
4918 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4919 "Cannot replace with this method!");
4920 assert(From != To.getNode() && "Cannot replace uses of with self");
4922 // Iterate over all the existing uses of From. New uses will be added
4923 // to the beginning of the use list, which we avoid visiting.
4924 // This specifically avoids visiting uses of From that arise while the
4925 // replacement is happening, because any such uses would be the result
4926 // of CSE: If an existing node looks like From after one of its operands
4927 // is replaced by To, we don't want to replace of all its users with To
4928 // too. See PR3018 for more info.
4929 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4933 // This node is about to morph, remove its old self from the CSE maps.
4934 RemoveNodeFromCSEMaps(User);
4936 // A user can appear in a use list multiple times, and when this
4937 // happens the uses are usually next to each other in the list.
4938 // To help reduce the number of CSE recomputations, process all
4939 // the uses of this user that we can find this way.
4941 SDUse &Use = UI.getUse();
4944 } while (UI != UE && *UI == User);
4946 // Now that we have modified User, add it back to the CSE maps. If it
4947 // already exists there, recursively merge the results together.
4948 AddModifiedNodeToCSEMaps(User, UpdateListener);
4952 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4953 /// This can cause recursive merging of nodes in the DAG.
4955 /// This version assumes that for each value of From, there is a
4956 /// corresponding value in To in the same position with the same type.
4958 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4959 DAGUpdateListener *UpdateListener) {
4961 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4962 assert((!From->hasAnyUseOfValue(i) ||
4963 From->getValueType(i) == To->getValueType(i)) &&
4964 "Cannot use this version of ReplaceAllUsesWith!");
4967 // Handle the trivial case.
4971 // Iterate over just the existing users of From. See the comments in
4972 // the ReplaceAllUsesWith above.
4973 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4977 // This node is about to morph, remove its old self from the CSE maps.
4978 RemoveNodeFromCSEMaps(User);
4980 // A user can appear in a use list multiple times, and when this
4981 // happens the uses are usually next to each other in the list.
4982 // To help reduce the number of CSE recomputations, process all
4983 // the uses of this user that we can find this way.
4985 SDUse &Use = UI.getUse();
4988 } while (UI != UE && *UI == User);
4990 // Now that we have modified User, add it back to the CSE maps. If it
4991 // already exists there, recursively merge the results together.
4992 AddModifiedNodeToCSEMaps(User, UpdateListener);
4996 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4997 /// This can cause recursive merging of nodes in the DAG.
4999 /// This version can replace From with any result values. To must match the
5000 /// number and types of values returned by From.
5001 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5003 DAGUpdateListener *UpdateListener) {
5004 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5005 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5007 // Iterate over just the existing users of From. See the comments in
5008 // the ReplaceAllUsesWith above.
5009 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5013 // This node is about to morph, remove its old self from the CSE maps.
5014 RemoveNodeFromCSEMaps(User);
5016 // A user can appear in a use list multiple times, and when this
5017 // happens the uses are usually next to each other in the list.
5018 // To help reduce the number of CSE recomputations, process all
5019 // the uses of this user that we can find this way.
5021 SDUse &Use = UI.getUse();
5022 const SDValue &ToOp = To[Use.getResNo()];
5025 } while (UI != UE && *UI == User);
5027 // Now that we have modified User, add it back to the CSE maps. If it
5028 // already exists there, recursively merge the results together.
5029 AddModifiedNodeToCSEMaps(User, UpdateListener);
5033 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5034 /// uses of other values produced by From.getNode() alone. The Deleted
5035 /// vector is handled the same way as for ReplaceAllUsesWith.
5036 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5037 DAGUpdateListener *UpdateListener){
5038 // Handle the really simple, really trivial case efficiently.
5039 if (From == To) return;
5041 // Handle the simple, trivial, case efficiently.
5042 if (From.getNode()->getNumValues() == 1) {
5043 ReplaceAllUsesWith(From, To, UpdateListener);
5047 // Iterate over just the existing users of From. See the comments in
5048 // the ReplaceAllUsesWith above.
5049 SDNode::use_iterator UI = From.getNode()->use_begin(),
5050 UE = From.getNode()->use_end();
5053 bool UserRemovedFromCSEMaps = false;
5055 // A user can appear in a use list multiple times, and when this
5056 // happens the uses are usually next to each other in the list.
5057 // To help reduce the number of CSE recomputations, process all
5058 // the uses of this user that we can find this way.
5060 SDUse &Use = UI.getUse();
5062 // Skip uses of different values from the same node.
5063 if (Use.getResNo() != From.getResNo()) {
5068 // If this node hasn't been modified yet, it's still in the CSE maps,
5069 // so remove its old self from the CSE maps.
5070 if (!UserRemovedFromCSEMaps) {
5071 RemoveNodeFromCSEMaps(User);
5072 UserRemovedFromCSEMaps = true;
5077 } while (UI != UE && *UI == User);
5079 // We are iterating over all uses of the From node, so if a use
5080 // doesn't use the specific value, no changes are made.
5081 if (!UserRemovedFromCSEMaps)
5084 // Now that we have modified User, add it back to the CSE maps. If it
5085 // already exists there, recursively merge the results together.
5086 AddModifiedNodeToCSEMaps(User, UpdateListener);
5091 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5092 /// to record information about a use.
5099 /// operator< - Sort Memos by User.
5100 bool operator<(const UseMemo &L, const UseMemo &R) {
5101 return (intptr_t)L.User < (intptr_t)R.User;
5105 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5106 /// uses of other values produced by From.getNode() alone. The same value
5107 /// may appear in both the From and To list. The Deleted vector is
5108 /// handled the same way as for ReplaceAllUsesWith.
5109 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5112 DAGUpdateListener *UpdateListener){
5113 // Handle the simple, trivial case efficiently.
5115 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5117 // Read up all the uses and make records of them. This helps
5118 // processing new uses that are introduced during the
5119 // replacement process.
5120 SmallVector<UseMemo, 4> Uses;
5121 for (unsigned i = 0; i != Num; ++i) {
5122 unsigned FromResNo = From[i].getResNo();
5123 SDNode *FromNode = From[i].getNode();
5124 for (SDNode::use_iterator UI = FromNode->use_begin(),
5125 E = FromNode->use_end(); UI != E; ++UI) {
5126 SDUse &Use = UI.getUse();
5127 if (Use.getResNo() == FromResNo) {
5128 UseMemo Memo = { *UI, i, &Use };
5129 Uses.push_back(Memo);
5134 // Sort the uses, so that all the uses from a given User are together.
5135 std::sort(Uses.begin(), Uses.end());
5137 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5138 UseIndex != UseIndexEnd; ) {
5139 // We know that this user uses some value of From. If it is the right
5140 // value, update it.
5141 SDNode *User = Uses[UseIndex].User;
5143 // This node is about to morph, remove its old self from the CSE maps.
5144 RemoveNodeFromCSEMaps(User);
5146 // The Uses array is sorted, so all the uses for a given User
5147 // are next to each other in the list.
5148 // To help reduce the number of CSE recomputations, process all
5149 // the uses of this user that we can find this way.
5151 unsigned i = Uses[UseIndex].Index;
5152 SDUse &Use = *Uses[UseIndex].Use;
5156 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5158 // Now that we have modified User, add it back to the CSE maps. If it
5159 // already exists there, recursively merge the results together.
5160 AddModifiedNodeToCSEMaps(User, UpdateListener);
5164 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5165 /// based on their topological order. It returns the maximum id and a vector
5166 /// of the SDNodes* in assigned order by reference.
5167 unsigned SelectionDAG::AssignTopologicalOrder() {
5169 unsigned DAGSize = 0;
5171 // SortedPos tracks the progress of the algorithm. Nodes before it are
5172 // sorted, nodes after it are unsorted. When the algorithm completes
5173 // it is at the end of the list.
5174 allnodes_iterator SortedPos = allnodes_begin();
5176 // Visit all the nodes. Move nodes with no operands to the front of
5177 // the list immediately. Annotate nodes that do have operands with their
5178 // operand count. Before we do this, the Node Id fields of the nodes
5179 // may contain arbitrary values. After, the Node Id fields for nodes
5180 // before SortedPos will contain the topological sort index, and the
5181 // Node Id fields for nodes At SortedPos and after will contain the
5182 // count of outstanding operands.
5183 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5186 unsigned Degree = N->getNumOperands();
5188 // A node with no uses, add it to the result array immediately.
5189 N->setNodeId(DAGSize++);
5190 allnodes_iterator Q = N;
5192 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5193 assert(SortedPos != AllNodes.end() && "Overran node list");
5196 // Temporarily use the Node Id as scratch space for the degree count.
5197 N->setNodeId(Degree);
5201 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5202 // such that by the time the end is reached all nodes will be sorted.
5203 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5206 // N is in sorted position, so all its uses have one less operand
5207 // that needs to be sorted.
5208 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5211 unsigned Degree = P->getNodeId();
5212 assert(Degree != 0 && "Invalid node degree");
5215 // All of P's operands are sorted, so P may sorted now.
5216 P->setNodeId(DAGSize++);
5218 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5219 assert(SortedPos != AllNodes.end() && "Overran node list");
5222 // Update P's outstanding operand count.
5223 P->setNodeId(Degree);
5226 if (I == SortedPos) {
5227 allnodes_iterator J = I;
5229 dbgs() << "Offending node:\n";
5231 assert(0 && "Overran sorted position");
5235 assert(SortedPos == AllNodes.end() &&
5236 "Topological sort incomplete!");
5237 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5238 "First node in topological sort is not the entry token!");
5239 assert(AllNodes.front().getNodeId() == 0 &&
5240 "First node in topological sort has non-zero id!");
5241 assert(AllNodes.front().getNumOperands() == 0 &&
5242 "First node in topological sort has operands!");
5243 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5244 "Last node in topologic sort has unexpected id!");
5245 assert(AllNodes.back().use_empty() &&
5246 "Last node in topologic sort has users!");
5247 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5251 /// AssignOrdering - Assign an order to the SDNode.
5252 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5253 assert(SD && "Trying to assign an order to a null node!");
5254 Ordering->add(SD, Order);
5257 /// GetOrdering - Get the order for the SDNode.
5258 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5259 assert(SD && "Trying to get the order of a null node!");
5260 return Ordering->getOrder(SD);
5264 //===----------------------------------------------------------------------===//
5266 //===----------------------------------------------------------------------===//
5268 HandleSDNode::~HandleSDNode() {
5272 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5273 EVT VT, int64_t o, unsigned char TF)
5274 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5275 Offset(o), TargetFlags(TF) {
5276 TheGlobal = const_cast<GlobalValue*>(GA);
5279 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5280 MachineMemOperand *mmo)
5281 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5282 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5283 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5284 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5287 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5288 const SDValue *Ops, unsigned NumOps, EVT memvt,
5289 MachineMemOperand *mmo)
5290 : SDNode(Opc, dl, VTs, Ops, NumOps),
5291 MemoryVT(memvt), MMO(mmo) {
5292 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5293 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5294 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5297 /// Profile - Gather unique data for the node.
5299 void SDNode::Profile(FoldingSetNodeID &ID) const {
5300 AddNodeIDNode(ID, this);
5305 std::vector<EVT> VTs;
5308 VTs.reserve(MVT::LAST_VALUETYPE);
5309 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5310 VTs.push_back(MVT((MVT::SimpleValueType)i));
5315 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5316 static ManagedStatic<EVTArray> SimpleVTArray;
5317 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5319 /// getValueTypeList - Return a pointer to the specified value type.
5321 const EVT *SDNode::getValueTypeList(EVT VT) {
5322 if (VT.isExtended()) {
5323 sys::SmartScopedLock<true> Lock(*VTMutex);
5324 return &(*EVTs->insert(VT).first);
5326 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5330 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5331 /// indicated value. This method ignores uses of other values defined by this
5333 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5334 assert(Value < getNumValues() && "Bad value!");
5336 // TODO: Only iterate over uses of a given value of the node
5337 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5338 if (UI.getUse().getResNo() == Value) {
5345 // Found exactly the right number of uses?
5350 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5351 /// value. This method ignores uses of other values defined by this operation.
5352 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5353 assert(Value < getNumValues() && "Bad value!");
5355 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5356 if (UI.getUse().getResNo() == Value)
5363 /// isOnlyUserOf - Return true if this node is the only use of N.
5365 bool SDNode::isOnlyUserOf(SDNode *N) const {
5367 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5378 /// isOperand - Return true if this node is an operand of N.
5380 bool SDValue::isOperandOf(SDNode *N) const {
5381 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5382 if (*this == N->getOperand(i))
5387 bool SDNode::isOperandOf(SDNode *N) const {
5388 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5389 if (this == N->OperandList[i].getNode())
5394 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5395 /// be a chain) reaches the specified operand without crossing any
5396 /// side-effecting instructions. In practice, this looks through token
5397 /// factors and non-volatile loads. In order to remain efficient, this only
5398 /// looks a couple of nodes in, it does not do an exhaustive search.
5399 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5400 unsigned Depth) const {
5401 if (*this == Dest) return true;
5403 // Don't search too deeply, we just want to be able to see through
5404 // TokenFactor's etc.
5405 if (Depth == 0) return false;
5407 // If this is a token factor, all inputs to the TF happen in parallel. If any
5408 // of the operands of the TF reach dest, then we can do the xform.
5409 if (getOpcode() == ISD::TokenFactor) {
5410 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5411 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5416 // Loads don't have side effects, look through them.
5417 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5418 if (!Ld->isVolatile())
5419 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5424 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5425 /// is either an operand of N or it can be reached by traversing up the operands.
5426 /// NOTE: this is an expensive method. Use it carefully.
5427 bool SDNode::isPredecessorOf(SDNode *N) const {
5428 SmallPtrSet<SDNode *, 32> Visited;
5429 SmallVector<SDNode *, 16> Worklist;
5430 Worklist.push_back(N);
5433 N = Worklist.pop_back_val();
5434 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5435 SDNode *Op = N->getOperand(i).getNode();
5438 if (Visited.insert(Op))
5439 Worklist.push_back(Op);
5441 } while (!Worklist.empty());
5446 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5447 assert(Num < NumOperands && "Invalid child # of SDNode!");
5448 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5451 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5452 switch (getOpcode()) {
5454 if (getOpcode() < ISD::BUILTIN_OP_END)
5455 return "<<Unknown DAG Node>>";
5456 if (isMachineOpcode()) {
5458 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5459 if (getMachineOpcode() < TII->getNumOpcodes())
5460 return TII->get(getMachineOpcode()).getName();
5461 return "<<Unknown Machine Node>>";
5464 const TargetLowering &TLI = G->getTargetLoweringInfo();
5465 const char *Name = TLI.getTargetNodeName(getOpcode());
5466 if (Name) return Name;
5467 return "<<Unknown Target Node>>";
5469 return "<<Unknown Node>>";
5472 case ISD::DELETED_NODE:
5473 return "<<Deleted Node!>>";
5475 case ISD::PREFETCH: return "Prefetch";
5476 case ISD::MEMBARRIER: return "MemBarrier";
5477 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5478 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5479 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5480 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5481 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5482 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5483 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5484 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5485 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5486 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5487 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5488 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5489 case ISD::PCMARKER: return "PCMarker";
5490 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5491 case ISD::SRCVALUE: return "SrcValue";
5492 case ISD::EntryToken: return "EntryToken";
5493 case ISD::TokenFactor: return "TokenFactor";
5494 case ISD::AssertSext: return "AssertSext";
5495 case ISD::AssertZext: return "AssertZext";
5497 case ISD::BasicBlock: return "BasicBlock";
5498 case ISD::VALUETYPE: return "ValueType";
5499 case ISD::Register: return "Register";
5501 case ISD::Constant: return "Constant";
5502 case ISD::ConstantFP: return "ConstantFP";
5503 case ISD::GlobalAddress: return "GlobalAddress";
5504 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5505 case ISD::FrameIndex: return "FrameIndex";
5506 case ISD::JumpTable: return "JumpTable";
5507 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5508 case ISD::RETURNADDR: return "RETURNADDR";
5509 case ISD::FRAMEADDR: return "FRAMEADDR";
5510 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5511 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5512 case ISD::LSDAADDR: return "LSDAADDR";
5513 case ISD::EHSELECTION: return "EHSELECTION";
5514 case ISD::EH_RETURN: return "EH_RETURN";
5515 case ISD::ConstantPool: return "ConstantPool";
5516 case ISD::ExternalSymbol: return "ExternalSymbol";
5517 case ISD::BlockAddress: return "BlockAddress";
5518 case ISD::INTRINSIC_WO_CHAIN:
5519 case ISD::INTRINSIC_VOID:
5520 case ISD::INTRINSIC_W_CHAIN: {
5521 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5522 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5523 if (IID < Intrinsic::num_intrinsics)
5524 return Intrinsic::getName((Intrinsic::ID)IID);
5525 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5526 return TII->getName(IID);
5527 llvm_unreachable("Invalid intrinsic ID");
5530 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5531 case ISD::TargetConstant: return "TargetConstant";
5532 case ISD::TargetConstantFP:return "TargetConstantFP";
5533 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5534 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5535 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5536 case ISD::TargetJumpTable: return "TargetJumpTable";
5537 case ISD::TargetConstantPool: return "TargetConstantPool";
5538 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5539 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5541 case ISD::CopyToReg: return "CopyToReg";
5542 case ISD::CopyFromReg: return "CopyFromReg";
5543 case ISD::UNDEF: return "undef";
5544 case ISD::MERGE_VALUES: return "merge_values";
5545 case ISD::INLINEASM: return "inlineasm";
5546 case ISD::EH_LABEL: return "eh_label";
5547 case ISD::HANDLENODE: return "handlenode";
5550 case ISD::FABS: return "fabs";
5551 case ISD::FNEG: return "fneg";
5552 case ISD::FSQRT: return "fsqrt";
5553 case ISD::FSIN: return "fsin";
5554 case ISD::FCOS: return "fcos";
5555 case ISD::FPOWI: return "fpowi";
5556 case ISD::FPOW: return "fpow";
5557 case ISD::FTRUNC: return "ftrunc";
5558 case ISD::FFLOOR: return "ffloor";
5559 case ISD::FCEIL: return "fceil";
5560 case ISD::FRINT: return "frint";
5561 case ISD::FNEARBYINT: return "fnearbyint";
5564 case ISD::ADD: return "add";
5565 case ISD::SUB: return "sub";
5566 case ISD::MUL: return "mul";
5567 case ISD::MULHU: return "mulhu";
5568 case ISD::MULHS: return "mulhs";
5569 case ISD::SDIV: return "sdiv";
5570 case ISD::UDIV: return "udiv";
5571 case ISD::SREM: return "srem";
5572 case ISD::UREM: return "urem";
5573 case ISD::SMUL_LOHI: return "smul_lohi";
5574 case ISD::UMUL_LOHI: return "umul_lohi";
5575 case ISD::SDIVREM: return "sdivrem";
5576 case ISD::UDIVREM: return "udivrem";
5577 case ISD::AND: return "and";
5578 case ISD::OR: return "or";
5579 case ISD::XOR: return "xor";
5580 case ISD::SHL: return "shl";
5581 case ISD::SRA: return "sra";
5582 case ISD::SRL: return "srl";
5583 case ISD::ROTL: return "rotl";
5584 case ISD::ROTR: return "rotr";
5585 case ISD::FADD: return "fadd";
5586 case ISD::FSUB: return "fsub";
5587 case ISD::FMUL: return "fmul";
5588 case ISD::FDIV: return "fdiv";
5589 case ISD::FREM: return "frem";
5590 case ISD::FCOPYSIGN: return "fcopysign";
5591 case ISD::FGETSIGN: return "fgetsign";
5593 case ISD::SETCC: return "setcc";
5594 case ISD::VSETCC: return "vsetcc";
5595 case ISD::SELECT: return "select";
5596 case ISD::SELECT_CC: return "select_cc";
5597 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5598 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5599 case ISD::CONCAT_VECTORS: return "concat_vectors";
5600 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5601 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5602 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5603 case ISD::CARRY_FALSE: return "carry_false";
5604 case ISD::ADDC: return "addc";
5605 case ISD::ADDE: return "adde";
5606 case ISD::SADDO: return "saddo";
5607 case ISD::UADDO: return "uaddo";
5608 case ISD::SSUBO: return "ssubo";
5609 case ISD::USUBO: return "usubo";
5610 case ISD::SMULO: return "smulo";
5611 case ISD::UMULO: return "umulo";
5612 case ISD::SUBC: return "subc";
5613 case ISD::SUBE: return "sube";
5614 case ISD::SHL_PARTS: return "shl_parts";
5615 case ISD::SRA_PARTS: return "sra_parts";
5616 case ISD::SRL_PARTS: return "srl_parts";
5618 // Conversion operators.
5619 case ISD::SIGN_EXTEND: return "sign_extend";
5620 case ISD::ZERO_EXTEND: return "zero_extend";
5621 case ISD::ANY_EXTEND: return "any_extend";
5622 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5623 case ISD::TRUNCATE: return "truncate";
5624 case ISD::FP_ROUND: return "fp_round";
5625 case ISD::FLT_ROUNDS_: return "flt_rounds";
5626 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5627 case ISD::FP_EXTEND: return "fp_extend";
5629 case ISD::SINT_TO_FP: return "sint_to_fp";
5630 case ISD::UINT_TO_FP: return "uint_to_fp";
5631 case ISD::FP_TO_SINT: return "fp_to_sint";
5632 case ISD::FP_TO_UINT: return "fp_to_uint";
5633 case ISD::BIT_CONVERT: return "bit_convert";
5635 case ISD::CONVERT_RNDSAT: {
5636 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5637 default: llvm_unreachable("Unknown cvt code!");
5638 case ISD::CVT_FF: return "cvt_ff";
5639 case ISD::CVT_FS: return "cvt_fs";
5640 case ISD::CVT_FU: return "cvt_fu";
5641 case ISD::CVT_SF: return "cvt_sf";
5642 case ISD::CVT_UF: return "cvt_uf";
5643 case ISD::CVT_SS: return "cvt_ss";
5644 case ISD::CVT_SU: return "cvt_su";
5645 case ISD::CVT_US: return "cvt_us";
5646 case ISD::CVT_UU: return "cvt_uu";
5650 // Control flow instructions
5651 case ISD::BR: return "br";
5652 case ISD::BRIND: return "brind";
5653 case ISD::BR_JT: return "br_jt";
5654 case ISD::BRCOND: return "brcond";
5655 case ISD::BR_CC: return "br_cc";
5656 case ISD::CALLSEQ_START: return "callseq_start";
5657 case ISD::CALLSEQ_END: return "callseq_end";
5660 case ISD::LOAD: return "load";
5661 case ISD::STORE: return "store";
5662 case ISD::VAARG: return "vaarg";
5663 case ISD::VACOPY: return "vacopy";
5664 case ISD::VAEND: return "vaend";
5665 case ISD::VASTART: return "vastart";
5666 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5667 case ISD::EXTRACT_ELEMENT: return "extract_element";
5668 case ISD::BUILD_PAIR: return "build_pair";
5669 case ISD::STACKSAVE: return "stacksave";
5670 case ISD::STACKRESTORE: return "stackrestore";
5671 case ISD::TRAP: return "trap";
5674 case ISD::BSWAP: return "bswap";
5675 case ISD::CTPOP: return "ctpop";
5676 case ISD::CTTZ: return "cttz";
5677 case ISD::CTLZ: return "ctlz";
5680 case ISD::TRAMPOLINE: return "trampoline";
5683 switch (cast<CondCodeSDNode>(this)->get()) {
5684 default: llvm_unreachable("Unknown setcc condition!");
5685 case ISD::SETOEQ: return "setoeq";
5686 case ISD::SETOGT: return "setogt";
5687 case ISD::SETOGE: return "setoge";
5688 case ISD::SETOLT: return "setolt";
5689 case ISD::SETOLE: return "setole";
5690 case ISD::SETONE: return "setone";
5692 case ISD::SETO: return "seto";
5693 case ISD::SETUO: return "setuo";
5694 case ISD::SETUEQ: return "setue";
5695 case ISD::SETUGT: return "setugt";
5696 case ISD::SETUGE: return "setuge";
5697 case ISD::SETULT: return "setult";
5698 case ISD::SETULE: return "setule";
5699 case ISD::SETUNE: return "setune";
5701 case ISD::SETEQ: return "seteq";
5702 case ISD::SETGT: return "setgt";
5703 case ISD::SETGE: return "setge";
5704 case ISD::SETLT: return "setlt";
5705 case ISD::SETLE: return "setle";
5706 case ISD::SETNE: return "setne";
5711 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5720 return "<post-inc>";
5722 return "<post-dec>";
5726 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5727 std::string S = "< ";
5741 if (getByValAlign())
5742 S += "byval-align:" + utostr(getByValAlign()) + " ";
5744 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5746 S += "byval-size:" + utostr(getByValSize()) + " ";
5750 void SDNode::dump() const { dump(0); }
5751 void SDNode::dump(const SelectionDAG *G) const {
5755 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5756 OS << (void*)this << ": ";
5758 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5760 if (getValueType(i) == MVT::Other)
5763 OS << getValueType(i).getEVTString();
5765 OS << " = " << getOperationName(G);
5768 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5769 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5770 if (!MN->memoperands_empty()) {
5773 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5774 e = MN->memoperands_end(); i != e; ++i) {
5781 } else if (const ShuffleVectorSDNode *SVN =
5782 dyn_cast<ShuffleVectorSDNode>(this)) {
5784 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5785 int Idx = SVN->getMaskElt(i);
5793 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5794 OS << '<' << CSDN->getAPIntValue() << '>';
5795 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5796 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5797 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5798 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5799 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5802 CSDN->getValueAPF().bitcastToAPInt().dump();
5805 } else if (const GlobalAddressSDNode *GADN =
5806 dyn_cast<GlobalAddressSDNode>(this)) {
5807 int64_t offset = GADN->getOffset();
5809 WriteAsOperand(OS, GADN->getGlobal());
5812 OS << " + " << offset;
5814 OS << " " << offset;
5815 if (unsigned int TF = GADN->getTargetFlags())
5816 OS << " [TF=" << TF << ']';
5817 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5818 OS << "<" << FIDN->getIndex() << ">";
5819 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5820 OS << "<" << JTDN->getIndex() << ">";
5821 if (unsigned int TF = JTDN->getTargetFlags())
5822 OS << " [TF=" << TF << ']';
5823 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5824 int offset = CP->getOffset();
5825 if (CP->isMachineConstantPoolEntry())
5826 OS << "<" << *CP->getMachineCPVal() << ">";
5828 OS << "<" << *CP->getConstVal() << ">";
5830 OS << " + " << offset;
5832 OS << " " << offset;
5833 if (unsigned int TF = CP->getTargetFlags())
5834 OS << " [TF=" << TF << ']';
5835 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5837 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5839 OS << LBB->getName() << " ";
5840 OS << (const void*)BBDN->getBasicBlock() << ">";
5841 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5842 if (G && R->getReg() &&
5843 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5844 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5846 OS << " %reg" << R->getReg();
5848 } else if (const ExternalSymbolSDNode *ES =
5849 dyn_cast<ExternalSymbolSDNode>(this)) {
5850 OS << "'" << ES->getSymbol() << "'";
5851 if (unsigned int TF = ES->getTargetFlags())
5852 OS << " [TF=" << TF << ']';
5853 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5855 OS << "<" << M->getValue() << ">";
5858 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5859 OS << ":" << N->getVT().getEVTString();
5861 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5862 OS << "<" << *LD->getMemOperand();
5865 switch (LD->getExtensionType()) {
5866 default: doExt = false; break;
5867 case ISD::EXTLOAD: OS << ", anyext"; break;
5868 case ISD::SEXTLOAD: OS << ", sext"; break;
5869 case ISD::ZEXTLOAD: OS << ", zext"; break;
5872 OS << " from " << LD->getMemoryVT().getEVTString();
5874 const char *AM = getIndexedModeName(LD->getAddressingMode());
5879 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5880 OS << "<" << *ST->getMemOperand();
5882 if (ST->isTruncatingStore())
5883 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5885 const char *AM = getIndexedModeName(ST->getAddressingMode());
5890 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5891 OS << "<" << *M->getMemOperand() << ">";
5892 } else if (const BlockAddressSDNode *BA =
5893 dyn_cast<BlockAddressSDNode>(this)) {
5895 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5897 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5899 if (unsigned int TF = BA->getTargetFlags())
5900 OS << " [TF=" << TF << ']';
5904 if (unsigned Order = G->GetOrdering(this))
5905 OS << " [ORD=" << Order << ']';
5908 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5910 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5911 if (i) OS << ", "; else OS << " ";
5912 OS << (void*)getOperand(i).getNode();
5913 if (unsigned RN = getOperand(i).getResNo())
5916 print_details(OS, G);
5919 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
5920 const SelectionDAG *G, unsigned depth,
5933 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5935 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
5939 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
5940 unsigned depth) const {
5941 printrWithDepthHelper(OS, this, G, depth, 0);
5944 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
5945 // Don't print impossibly deep things.
5946 printrWithDepth(OS, G, 100);
5949 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
5950 printrWithDepth(dbgs(), G, depth);
5953 void SDNode::dumprFull(const SelectionDAG *G) const {
5954 // Don't print impossibly deep things.
5955 dumprWithDepth(G, 100);
5958 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5959 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5960 if (N->getOperand(i).getNode()->hasOneUse())
5961 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5963 dbgs() << "\n" << std::string(indent+2, ' ')
5964 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5968 dbgs().indent(indent);
5972 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5973 assert(N->getNumValues() == 1 &&
5974 "Can't unroll a vector with multiple results!");
5976 EVT VT = N->getValueType(0);
5977 unsigned NE = VT.getVectorNumElements();
5978 EVT EltVT = VT.getVectorElementType();
5979 DebugLoc dl = N->getDebugLoc();
5981 SmallVector<SDValue, 8> Scalars;
5982 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5984 // If ResNE is 0, fully unroll the vector op.
5987 else if (NE > ResNE)
5991 for (i= 0; i != NE; ++i) {
5992 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
5993 SDValue Operand = N->getOperand(j);
5994 EVT OperandVT = Operand.getValueType();
5995 if (OperandVT.isVector()) {
5996 // A vector operand; extract a single element.
5997 EVT OperandEltVT = OperandVT.getVectorElementType();
5998 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6001 getConstant(i, MVT::i32));
6003 // A scalar operand; just use it as is.
6004 Operands[j] = Operand;
6008 switch (N->getOpcode()) {
6010 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6011 &Operands[0], Operands.size()));
6018 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6019 getShiftAmountOperand(Operands[1])));
6021 case ISD::SIGN_EXTEND_INREG:
6022 case ISD::FP_ROUND_INREG: {
6023 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6024 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6026 getValueType(ExtVT)));
6031 for (; i < ResNE; ++i)
6032 Scalars.push_back(getUNDEF(EltVT));
6034 return getNode(ISD::BUILD_VECTOR, dl,
6035 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6036 &Scalars[0], Scalars.size());
6040 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6041 /// location that is 'Dist' units away from the location that the 'Base' load
6042 /// is loading from.
6043 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6044 unsigned Bytes, int Dist) const {
6045 if (LD->getChain() != Base->getChain())
6047 EVT VT = LD->getValueType(0);
6048 if (VT.getSizeInBits() / 8 != Bytes)
6051 SDValue Loc = LD->getOperand(1);
6052 SDValue BaseLoc = Base->getOperand(1);
6053 if (Loc.getOpcode() == ISD::FrameIndex) {
6054 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6056 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6057 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6058 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6059 int FS = MFI->getObjectSize(FI);
6060 int BFS = MFI->getObjectSize(BFI);
6061 if (FS != BFS || FS != (int)Bytes) return false;
6062 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6064 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6065 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6066 if (V && (V->getSExtValue() == Dist*Bytes))
6070 GlobalValue *GV1 = NULL;
6071 GlobalValue *GV2 = NULL;
6072 int64_t Offset1 = 0;
6073 int64_t Offset2 = 0;
6074 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6075 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6076 if (isGA1 && isGA2 && GV1 == GV2)
6077 return Offset1 == (Offset2 + Dist*Bytes);
6082 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6083 /// it cannot be inferred.
6084 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6085 // If this is a GlobalAddress + cst, return the alignment.
6087 int64_t GVOffset = 0;
6088 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
6089 return MinAlign(GV->getAlignment(), GVOffset);
6091 // If this is a direct reference to a stack slot, use information about the
6092 // stack slot's alignment.
6093 int FrameIdx = 1 << 31;
6094 int64_t FrameOffset = 0;
6095 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6096 FrameIdx = FI->getIndex();
6097 } else if (Ptr.getOpcode() == ISD::ADD &&
6098 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6099 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6100 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6101 FrameOffset = Ptr.getConstantOperandVal(1);
6104 if (FrameIdx != (1 << 31)) {
6105 // FIXME: Handle FI+CST.
6106 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6107 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6109 if (MFI.isFixedObjectIndex(FrameIdx)) {
6110 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6112 // The alignment of the frame index can be determined from its offset from
6113 // the incoming frame position. If the frame object is at offset 32 and
6114 // the stack is guaranteed to be 16-byte aligned, then we know that the
6115 // object is 16-byte aligned.
6116 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6117 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6119 // Finally, the frame object itself may have a known alignment. Factor
6120 // the alignment + offset into a new alignment. For example, if we know
6121 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6122 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6123 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6124 return std::max(Align, FIInfoAlign);
6132 void SelectionDAG::dump() const {
6133 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6135 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6137 const SDNode *N = I;
6138 if (!N->hasOneUse() && N != getRoot().getNode())
6139 DumpNodes(N, 2, this);
6142 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6147 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6149 print_details(OS, G);
6152 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6153 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6154 const SelectionDAG *G, VisitedSDNodeSet &once) {
6155 if (!once.insert(N)) // If we've been here before, return now.
6158 // Dump the current SDNode, but don't end the line yet.
6159 OS << std::string(indent, ' ');
6162 // Having printed this SDNode, walk the children:
6163 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6164 const SDNode *child = N->getOperand(i).getNode();
6169 if (child->getNumOperands() == 0) {
6170 // This child has no grandchildren; print it inline right here.
6171 child->printr(OS, G);
6173 } else { // Just the address. FIXME: also print the child's opcode.
6175 if (unsigned RN = N->getOperand(i).getResNo())
6182 // Dump children that have grandchildren on their own line(s).
6183 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6184 const SDNode *child = N->getOperand(i).getNode();
6185 DumpNodesr(OS, child, indent+2, G, once);
6189 void SDNode::dumpr() const {
6190 VisitedSDNodeSet once;
6191 DumpNodesr(dbgs(), this, 0, 0, once);
6194 void SDNode::dumpr(const SelectionDAG *G) const {
6195 VisitedSDNodeSet once;
6196 DumpNodesr(dbgs(), this, 0, G, once);
6200 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6201 unsigned GlobalAddressSDNode::getAddressSpace() const {
6202 return getGlobal()->getType()->getAddressSpace();
6206 const Type *ConstantPoolSDNode::getType() const {
6207 if (isMachineConstantPoolEntry())
6208 return Val.MachineCPVal->getType();
6209 return Val.ConstVal->getType();
6212 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6214 unsigned &SplatBitSize,
6216 unsigned MinSplatBits,
6218 EVT VT = getValueType(0);
6219 assert(VT.isVector() && "Expected a vector type");
6220 unsigned sz = VT.getSizeInBits();
6221 if (MinSplatBits > sz)
6224 SplatValue = APInt(sz, 0);
6225 SplatUndef = APInt(sz, 0);
6227 // Get the bits. Bits with undefined values (when the corresponding element
6228 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6229 // in SplatValue. If any of the values are not constant, give up and return
6231 unsigned int nOps = getNumOperands();
6232 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6233 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6235 for (unsigned j = 0; j < nOps; ++j) {
6236 unsigned i = isBigEndian ? nOps-1-j : j;
6237 SDValue OpVal = getOperand(i);
6238 unsigned BitPos = j * EltBitSize;
6240 if (OpVal.getOpcode() == ISD::UNDEF)
6241 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6242 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6243 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6244 zextOrTrunc(sz) << BitPos);
6245 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6246 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6251 // The build_vector is all constants or undefs. Find the smallest element
6252 // size that splats the vector.
6254 HasAnyUndefs = (SplatUndef != 0);
6257 unsigned HalfSize = sz / 2;
6258 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6259 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6260 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6261 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6263 // If the two halves do not match (ignoring undef bits), stop here.
6264 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6265 MinSplatBits > HalfSize)
6268 SplatValue = HighValue | LowValue;
6269 SplatUndef = HighUndef & LowUndef;
6278 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6279 // Find the first non-undef value in the shuffle mask.
6281 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6284 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6286 // Make sure all remaining elements are either undef or the same as the first
6288 for (int Idx = Mask[i]; i != e; ++i)
6289 if (Mask[i] >= 0 && Mask[i] != Idx)
6294 static void checkForCyclesHelper(const SDNode *N,
6295 std::set<const SDNode *> &visited) {
6296 if (visited.find(N) != visited.end()) {
6297 dbgs() << "Offending node:\n";
6299 assert(0 && "Detected cycle in SelectionDAG");
6302 std::set<const SDNode*>::iterator i;
6305 tie(i, inserted) = visited.insert(N);
6306 assert(inserted && "Missed cycle");
6308 for(unsigned i = 0; i < N->getNumOperands(); ++i) {
6309 checkForCyclesHelper(N->getOperand(i).getNode(), visited);
6314 void llvm::checkForCycles(const llvm::SDNode *N) {
6316 assert(N && "Checking nonexistant SDNode");
6317 std::set<const SDNode *> visited;
6318 checkForCyclesHelper(N, visited);
6322 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6323 checkForCycles(DAG->getRoot().getNode());