1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getAddressingMode());
433 ID.AddInteger(LD->getExtensionType());
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawFlags());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getAddressingMode());
441 ID.AddInteger(ST->isTruncatingStore());
442 ID.AddInteger(ST->getMemoryVT().getRawBits());
443 ID.AddInteger(ST->getRawFlags());
446 case ISD::ATOMIC_CMP_SWAP:
447 case ISD::ATOMIC_SWAP:
448 case ISD::ATOMIC_LOAD_ADD:
449 case ISD::ATOMIC_LOAD_SUB:
450 case ISD::ATOMIC_LOAD_AND:
451 case ISD::ATOMIC_LOAD_OR:
452 case ISD::ATOMIC_LOAD_XOR:
453 case ISD::ATOMIC_LOAD_NAND:
454 case ISD::ATOMIC_LOAD_MIN:
455 case ISD::ATOMIC_LOAD_MAX:
456 case ISD::ATOMIC_LOAD_UMIN:
457 case ISD::ATOMIC_LOAD_UMAX: {
458 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
459 ID.AddInteger(AT->getRawFlags());
462 } // end switch (N->getOpcode())
465 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
467 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
468 AddNodeIDOpcode(ID, N->getOpcode());
469 // Add the return value info.
470 AddNodeIDValueTypes(ID, N->getVTList());
471 // Add the operand info.
472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
474 // Handle SDNode leafs with special info.
475 AddNodeIDCustom(ID, N);
478 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
479 /// the CSE map that carries both alignment and volatility information.
481 static inline unsigned
482 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
483 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 case ISD::DBG_STOPPOINT:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Flag)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
600 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
601 /// correspond to it. This is useful when we're about to delete or repurpose
602 /// the node. We don't want future request for structurally identical nodes
603 /// to return N anymore.
604 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
606 switch (N->getOpcode()) {
607 case ISD::EntryToken:
608 assert(0 && "EntryToken should not be in CSEMaps!");
610 case ISD::HANDLENODE: return false; // noop.
612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
613 "Cond code doesn't exist!");
614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
617 case ISD::ExternalSymbol:
618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
620 case ISD::TargetExternalSymbol:
622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624 case ISD::VALUETYPE: {
625 MVT VT = cast<VTSDNode>(N)->getVT();
626 if (VT.isExtended()) {
627 Erased = ExtendedValueTypeNodes.erase(VT);
629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
630 ValueTypeNodes[VT.getSimpleVT()] = 0;
635 // Remove it from the CSE Map.
636 Erased = CSEMap.RemoveNode(N);
640 // Verify that the node was actually in one of the CSE maps, unless it has a
641 // flag result (which cannot be CSE'd) or is one of the special cases that are
642 // not subject to CSE.
643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
644 !N->isMachineOpcode() && !doNotCSE(N)) {
647 assert(0 && "Node is not in map!");
653 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
654 /// maps and modified in place. Add it back to the CSE maps, unless an identical
655 /// node already exists, in which case transfer all its users to the existing
656 /// node. This transfer can potentially trigger recursive merging.
659 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
660 DAGUpdateListener *UpdateListener) {
661 // For node types that aren't CSE'd, just act as if no identical node
664 SDNode *Existing = CSEMap.GetOrInsertNode(N);
666 // If there was already an existing matching node, use ReplaceAllUsesWith
667 // to replace the dead one with the existing one. This can cause
668 // recursive merging of other unrelated nodes down the line.
669 ReplaceAllUsesWith(N, Existing, UpdateListener);
671 // N is now dead. Inform the listener if it exists and delete it.
673 UpdateListener->NodeDeleted(N, Existing);
674 DeleteNodeNotInCSEMaps(N);
679 // If the node doesn't already exist, we updated it. Inform a listener if
682 UpdateListener->NodeUpdated(N);
685 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
686 /// were replaced with those specified. If this node is never memoized,
687 /// return null, otherwise return a pointer to the slot it would take. If a
688 /// node already exists with these operands, the slot will be non-null.
689 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
694 SDValue Ops[] = { Op };
696 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
697 AddNodeIDCustom(ID, N);
698 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
706 SDValue Op1, SDValue Op2,
711 SDValue Ops[] = { Op1, Op2 };
713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
714 AddNodeIDCustom(ID, N);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
720 /// were replaced with those specified. If this node is never memoized,
721 /// return null, otherwise return a pointer to the slot it would take. If a
722 /// node already exists with these operands, the slot will be non-null.
723 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
724 const SDValue *Ops,unsigned NumOps,
730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
731 AddNodeIDCustom(ID, N);
732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
736 void SelectionDAG::VerifyNode(SDNode *N) {
737 switch (N->getOpcode()) {
740 case ISD::BUILD_PAIR: {
741 MVT VT = N->getValueType(0);
742 assert(N->getNumValues() == 1 && "Too many results!");
743 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
744 "Wrong return type!");
745 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
746 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
747 "Mismatched operand types!");
748 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
749 "Wrong operand type!");
750 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
751 "Wrong return type size");
754 case ISD::BUILD_VECTOR: {
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(N->getValueType(0).isVector() && "Wrong return type!");
757 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
758 "Wrong number of operands!");
759 // FIXME: Change vector_shuffle to a variadic node with mask elements being
760 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
761 // operand, and it is not always possible to legalize it. Turning off the
762 // following checks at least makes it possible to legalize most of the time.
763 // MVT EltVT = N->getValueType(0).getVectorElementType();
764 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
765 // assert(I->getValueType() == EltVT &&
766 // "Wrong operand type!");
772 /// getMVTAlignment - Compute the default alignment value for the
775 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
776 const Type *Ty = VT == MVT::iPTR ?
777 PointerType::get(Type::Int8Ty, 0) :
780 return TLI.getTargetData()->getABITypeAlignment(Ty);
783 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
784 : TLI(tli), FLI(fli),
785 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
786 Root(getEntryNode()) {
787 AllNodes.push_back(&EntryNode);
790 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
797 SelectionDAG::~SelectionDAG() {
801 void SelectionDAG::allnodes_clear() {
802 assert(&*AllNodes.begin() == &EntryNode);
803 AllNodes.remove(AllNodes.begin());
804 while (!AllNodes.empty())
805 DeallocateNode(AllNodes.begin());
808 void SelectionDAG::clear() {
810 OperandAllocator.Reset();
813 ExtendedValueTypeNodes.clear();
814 ExternalSymbols.clear();
815 TargetExternalSymbols.clear();
816 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
817 static_cast<CondCodeSDNode*>(0));
818 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
819 static_cast<SDNode*>(0));
821 EntryNode.UseList = 0;
822 AllNodes.push_back(&EntryNode);
823 Root = getEntryNode();
826 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
827 if (Op.getValueType() == VT) return Op;
828 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
830 return getNode(ISD::AND, Op.getValueType(), Op,
831 getConstant(Imm, Op.getValueType()));
834 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
835 if (Op.getValueType() == VT) return Op;
836 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
838 return getNode(ISD::AND, DL, Op.getValueType(), Op,
839 getConstant(Imm, Op.getValueType()));
842 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
844 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
847 MVT EltVT = VT.getVectorElementType();
848 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT);
849 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
850 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT,
851 &NegOnes[0], NegOnes.size());
853 NegOne = getConstant(VT.getIntegerVTBitMask(), VT);
856 return getNode(ISD::XOR, DL, VT, Val, NegOne);
859 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
860 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
861 assert((EltVT.getSizeInBits() >= 64 ||
862 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
863 "getConstant with a uint64_t value that doesn't fit in the type!");
864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
868 return getConstant(*ConstantInt::get(Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
872 assert(VT.isInteger() && "Cannot create FP integer constant!");
874 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
875 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
876 "APInt size does not match type size!");
878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
886 return SDValue(N, 0);
888 N = NodeAllocator.Allocate<ConstantSDNode>();
889 new (N) ConstantSDNode(isT, &Val, EltVT);
890 CSEMap.InsertNode(N, IP);
891 AllNodes.push_back(N);
894 SDValue Result(N, 0);
896 SmallVector<SDValue, 8> Ops;
897 Ops.assign(VT.getVectorNumElements(), Result);
898 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
903 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
904 return getConstant(Val, TLI.getPointerTy(), isTarget);
908 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
909 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
912 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
913 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
916 VT.isVector() ? VT.getVectorElementType() : VT;
918 // Do the map lookup using the actual bit pattern for the floating point
919 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
920 // we don't have issues with SNANs.
921 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
923 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
927 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
929 return SDValue(N, 0);
931 N = NodeAllocator.Allocate<ConstantFPSDNode>();
932 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
933 CSEMap.InsertNode(N, IP);
934 AllNodes.push_back(N);
937 SDValue Result(N, 0);
939 SmallVector<SDValue, 8> Ops;
940 Ops.assign(VT.getVectorNumElements(), Result);
941 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
946 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
948 VT.isVector() ? VT.getVectorElementType() : VT;
950 return getConstantFP(APFloat((float)Val), VT, isTarget);
952 return getConstantFP(APFloat(Val), VT, isTarget);
955 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
956 MVT VT, int64_t Offset,
960 // Truncate (with sign-extension) the offset value to the pointer size.
961 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
963 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
965 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
967 // If GV is an alias then use the aliasee for determining thread-localness.
968 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
969 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
972 if (GVar && GVar->isThreadLocal())
973 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
975 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
978 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
980 ID.AddInteger(Offset);
982 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
983 return SDValue(E, 0);
984 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
985 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
986 CSEMap.InsertNode(N, IP);
987 AllNodes.push_back(N);
988 return SDValue(N, 0);
991 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
992 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
994 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
998 return SDValue(E, 0);
999 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1000 new (N) FrameIndexSDNode(FI, VT, isTarget);
1001 CSEMap.InsertNode(N, IP);
1002 AllNodes.push_back(N);
1003 return SDValue(N, 0);
1006 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1007 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1008 FoldingSetNodeID ID;
1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1013 return SDValue(E, 0);
1014 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1015 new (N) JumpTableSDNode(JTI, VT, isTarget);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1018 return SDValue(N, 0);
1021 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1022 unsigned Alignment, int Offset,
1026 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1027 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1028 FoldingSetNodeID ID;
1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1030 ID.AddInteger(Alignment);
1031 ID.AddInteger(Offset);
1034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1035 return SDValue(E, 0);
1036 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1037 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1038 CSEMap.InsertNode(N, IP);
1039 AllNodes.push_back(N);
1040 return SDValue(N, 0);
1044 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1045 unsigned Alignment, int Offset,
1049 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1050 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1053 ID.AddInteger(Alignment);
1054 ID.AddInteger(Offset);
1055 C->AddSelectionDAGCSEId(ID);
1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1058 return SDValue(E, 0);
1059 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1060 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1061 CSEMap.InsertNode(N, IP);
1062 AllNodes.push_back(N);
1063 return SDValue(N, 0);
1067 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1073 return SDValue(E, 0);
1074 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1075 new (N) BasicBlockSDNode(MBB);
1076 CSEMap.InsertNode(N, IP);
1077 AllNodes.push_back(N);
1078 return SDValue(N, 0);
1081 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1082 FoldingSetNodeID ID;
1083 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1088 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1089 new (N) BasicBlockSDNode(MBB, dl);
1090 CSEMap.InsertNode(N, IP);
1091 AllNodes.push_back(N);
1092 return SDValue(N, 0);
1095 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1096 FoldingSetNodeID ID;
1097 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1098 ID.AddInteger(Flags.getRawBits());
1100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1101 return SDValue(E, 0);
1102 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1103 new (N) ARG_FLAGSSDNode(Flags);
1104 CSEMap.InsertNode(N, IP);
1105 AllNodes.push_back(N);
1106 return SDValue(N, 0);
1109 SDValue SelectionDAG::getValueType(MVT VT) {
1110 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1111 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1113 SDNode *&N = VT.isExtended() ?
1114 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1116 if (N) return SDValue(N, 0);
1117 N = NodeAllocator.Allocate<VTSDNode>();
1118 new (N) VTSDNode(VT);
1119 AllNodes.push_back(N);
1120 return SDValue(N, 0);
1123 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1124 SDNode *&N = ExternalSymbols[Sym];
1125 if (N) return SDValue(N, 0);
1126 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1127 new (N) ExternalSymbolSDNode(false, Sym, VT);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1133 SDNode *&N = ExternalSymbols[Sym];
1134 if (N) return SDValue(N, 0);
1135 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1136 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1142 SDNode *&N = TargetExternalSymbols[Sym];
1143 if (N) return SDValue(N, 0);
1144 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1145 new (N) ExternalSymbolSDNode(true, Sym, VT);
1146 AllNodes.push_back(N);
1147 return SDValue(N, 0);
1150 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1152 SDNode *&N = TargetExternalSymbols[Sym];
1153 if (N) return SDValue(N, 0);
1154 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1155 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1156 AllNodes.push_back(N);
1157 return SDValue(N, 0);
1160 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1161 if ((unsigned)Cond >= CondCodeNodes.size())
1162 CondCodeNodes.resize(Cond+1);
1164 if (CondCodeNodes[Cond] == 0) {
1165 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1166 new (N) CondCodeSDNode(Cond);
1167 CondCodeNodes[Cond] = N;
1168 AllNodes.push_back(N);
1170 return SDValue(CondCodeNodes[Cond], 0);
1173 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1174 SDValue STy, SDValue Rnd, SDValue Sat,
1175 ISD::CvtCode Code) {
1176 // If the src and dest types are the same, no conversion is necessary.
1180 FoldingSetNodeID ID;
1182 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1183 return SDValue(E, 0);
1184 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1185 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1186 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1187 CSEMap.InsertNode(N, IP);
1188 AllNodes.push_back(N);
1189 return SDValue(N, 0);
1192 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1193 FoldingSetNodeID ID;
1194 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1195 ID.AddInteger(RegNo);
1197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1198 return SDValue(E, 0);
1199 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1200 new (N) RegisterSDNode(RegNo, VT);
1201 CSEMap.InsertNode(N, IP);
1202 AllNodes.push_back(N);
1203 return SDValue(N, 0);
1206 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1207 unsigned Line, unsigned Col,
1209 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1210 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1211 AllNodes.push_back(N);
1212 return SDValue(N, 0);
1215 SDValue SelectionDAG::getLabel(unsigned Opcode,
1218 FoldingSetNodeID ID;
1219 SDValue Ops[] = { Root };
1220 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1221 ID.AddInteger(LabelID);
1223 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1224 return SDValue(E, 0);
1225 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1226 new (N) LabelSDNode(Opcode, Root, LabelID);
1227 CSEMap.InsertNode(N, IP);
1228 AllNodes.push_back(N);
1229 return SDValue(N, 0);
1232 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1235 FoldingSetNodeID ID;
1236 SDValue Ops[] = { Root };
1237 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1238 ID.AddInteger(LabelID);
1240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1241 return SDValue(E, 0);
1242 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1243 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1244 CSEMap.InsertNode(N, IP);
1245 AllNodes.push_back(N);
1246 return SDValue(N, 0);
1249 SDValue SelectionDAG::getSrcValue(const Value *V) {
1250 assert((!V || isa<PointerType>(V->getType())) &&
1251 "SrcValue is not a pointer?");
1253 FoldingSetNodeID ID;
1254 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1259 return SDValue(E, 0);
1261 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1262 new (N) SrcValueSDNode(V);
1263 CSEMap.InsertNode(N, IP);
1264 AllNodes.push_back(N);
1265 return SDValue(N, 0);
1268 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1270 const Value *v = MO.getValue();
1271 assert((!v || isa<PointerType>(v->getType())) &&
1272 "SrcValue is not a pointer?");
1275 FoldingSetNodeID ID;
1276 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1280 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1281 return SDValue(E, 0);
1283 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1284 new (N) MemOperandSDNode(MO);
1285 CSEMap.InsertNode(N, IP);
1286 AllNodes.push_back(N);
1287 return SDValue(N, 0);
1290 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1291 /// specified value type.
1292 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1293 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1294 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1295 const Type *Ty = VT.getTypeForMVT();
1296 unsigned StackAlign =
1297 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1299 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1300 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1303 /// CreateStackTemporary - Create a stack temporary suitable for holding
1304 /// either of the specified value types.
1305 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1306 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1307 VT2.getStoreSizeInBits())/8;
1308 const Type *Ty1 = VT1.getTypeForMVT();
1309 const Type *Ty2 = VT2.getTypeForMVT();
1310 const TargetData *TD = TLI.getTargetData();
1311 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1312 TD->getPrefTypeAlignment(Ty2));
1314 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1315 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1316 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1319 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1320 SDValue N2, ISD::CondCode Cond) {
1321 // These setcc operations always fold.
1325 case ISD::SETFALSE2: return getConstant(0, VT);
1327 case ISD::SETTRUE2: return getConstant(1, VT);
1339 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1343 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1344 const APInt &C2 = N2C->getAPIntValue();
1345 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1346 const APInt &C1 = N1C->getAPIntValue();
1349 default: assert(0 && "Unknown integer setcc!");
1350 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1351 case ISD::SETNE: return getConstant(C1 != C2, VT);
1352 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1353 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1354 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1355 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1356 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1357 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1358 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1359 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1363 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1364 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1365 // No compile time operations on this type yet.
1366 if (N1C->getValueType(0) == MVT::ppcf128)
1369 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1372 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1373 return getNode(ISD::UNDEF, VT);
1375 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1376 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1377 return getNode(ISD::UNDEF, VT);
1379 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1380 R==APFloat::cmpLessThan, VT);
1381 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1382 return getNode(ISD::UNDEF, VT);
1384 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1385 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1386 return getNode(ISD::UNDEF, VT);
1388 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1389 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1390 return getNode(ISD::UNDEF, VT);
1392 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1393 R==APFloat::cmpEqual, VT);
1394 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1395 return getNode(ISD::UNDEF, VT);
1397 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1398 R==APFloat::cmpEqual, VT);
1399 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1400 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1401 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1402 R==APFloat::cmpEqual, VT);
1403 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1404 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1405 R==APFloat::cmpLessThan, VT);
1406 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1407 R==APFloat::cmpUnordered, VT);
1408 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1409 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1412 // Ensure that the constant occurs on the RHS.
1413 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1417 // Could not fold it.
1421 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1422 /// use this predicate to simplify operations downstream.
1423 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1424 unsigned BitWidth = Op.getValueSizeInBits();
1425 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1428 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1429 /// this predicate to simplify operations downstream. Mask is known to be zero
1430 /// for bits that V cannot have.
1431 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1432 unsigned Depth) const {
1433 APInt KnownZero, KnownOne;
1434 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1435 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1436 return (KnownZero & Mask) == Mask;
1439 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1440 /// known to be either zero or one and return them in the KnownZero/KnownOne
1441 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1443 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1444 APInt &KnownZero, APInt &KnownOne,
1445 unsigned Depth) const {
1446 unsigned BitWidth = Mask.getBitWidth();
1447 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1448 "Mask size mismatches value type size!");
1450 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1451 if (Depth == 6 || Mask == 0)
1452 return; // Limit search depth.
1454 APInt KnownZero2, KnownOne2;
1456 switch (Op.getOpcode()) {
1458 // We know all of the bits for a constant!
1459 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1460 KnownZero = ~KnownOne & Mask;
1463 // If either the LHS or the RHS are Zero, the result is zero.
1464 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1465 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1466 KnownZero2, KnownOne2, Depth+1);
1467 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1468 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1470 // Output known-1 bits are only known if set in both the LHS & RHS.
1471 KnownOne &= KnownOne2;
1472 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1473 KnownZero |= KnownZero2;
1476 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1477 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1478 KnownZero2, KnownOne2, Depth+1);
1479 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1480 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1482 // Output known-0 bits are only known if clear in both the LHS & RHS.
1483 KnownZero &= KnownZero2;
1484 // Output known-1 are known to be set if set in either the LHS | RHS.
1485 KnownOne |= KnownOne2;
1488 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1489 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1490 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1491 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1493 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1494 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1495 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1496 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1497 KnownZero = KnownZeroOut;
1501 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1502 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1503 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1504 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1505 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1507 // If low bits are zero in either operand, output low known-0 bits.
1508 // Also compute a conserative estimate for high known-0 bits.
1509 // More trickiness is possible, but this is sufficient for the
1510 // interesting case of alignment computation.
1512 unsigned TrailZ = KnownZero.countTrailingOnes() +
1513 KnownZero2.countTrailingOnes();
1514 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1515 KnownZero2.countLeadingOnes(),
1516 BitWidth) - BitWidth;
1518 TrailZ = std::min(TrailZ, BitWidth);
1519 LeadZ = std::min(LeadZ, BitWidth);
1520 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1521 APInt::getHighBitsSet(BitWidth, LeadZ);
1526 // For the purposes of computing leading zeros we can conservatively
1527 // treat a udiv as a logical right shift by the power of 2 known to
1528 // be less than the denominator.
1529 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1530 ComputeMaskedBits(Op.getOperand(0),
1531 AllOnes, KnownZero2, KnownOne2, Depth+1);
1532 unsigned LeadZ = KnownZero2.countLeadingOnes();
1536 ComputeMaskedBits(Op.getOperand(1),
1537 AllOnes, KnownZero2, KnownOne2, Depth+1);
1538 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1539 if (RHSUnknownLeadingOnes != BitWidth)
1540 LeadZ = std::min(BitWidth,
1541 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1543 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1547 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1548 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1549 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1550 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1552 // Only known if known in both the LHS and RHS.
1553 KnownOne &= KnownOne2;
1554 KnownZero &= KnownZero2;
1556 case ISD::SELECT_CC:
1557 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1558 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1560 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1562 // Only known if known in both the LHS and RHS.
1563 KnownOne &= KnownOne2;
1564 KnownZero &= KnownZero2;
1572 if (Op.getResNo() != 1)
1574 // The boolean result conforms to getBooleanContents. Fall through.
1576 // If we know the result of a setcc has the top bits zero, use this info.
1577 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1579 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1582 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1583 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1584 unsigned ShAmt = SA->getZExtValue();
1586 // If the shift count is an invalid immediate, don't do anything.
1587 if (ShAmt >= BitWidth)
1590 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1591 KnownZero, KnownOne, Depth+1);
1592 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1593 KnownZero <<= ShAmt;
1595 // low bits known zero.
1596 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1600 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1601 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1602 unsigned ShAmt = SA->getZExtValue();
1604 // If the shift count is an invalid immediate, don't do anything.
1605 if (ShAmt >= BitWidth)
1608 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1609 KnownZero, KnownOne, Depth+1);
1610 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1611 KnownZero = KnownZero.lshr(ShAmt);
1612 KnownOne = KnownOne.lshr(ShAmt);
1614 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1615 KnownZero |= HighBits; // High bits known zero.
1619 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1620 unsigned ShAmt = SA->getZExtValue();
1622 // If the shift count is an invalid immediate, don't do anything.
1623 if (ShAmt >= BitWidth)
1626 APInt InDemandedMask = (Mask << ShAmt);
1627 // If any of the demanded bits are produced by the sign extension, we also
1628 // demand the input sign bit.
1629 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1630 if (HighBits.getBoolValue())
1631 InDemandedMask |= APInt::getSignBit(BitWidth);
1633 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1635 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1636 KnownZero = KnownZero.lshr(ShAmt);
1637 KnownOne = KnownOne.lshr(ShAmt);
1639 // Handle the sign bits.
1640 APInt SignBit = APInt::getSignBit(BitWidth);
1641 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1643 if (KnownZero.intersects(SignBit)) {
1644 KnownZero |= HighBits; // New bits are known zero.
1645 } else if (KnownOne.intersects(SignBit)) {
1646 KnownOne |= HighBits; // New bits are known one.
1650 case ISD::SIGN_EXTEND_INREG: {
1651 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1652 unsigned EBits = EVT.getSizeInBits();
1654 // Sign extension. Compute the demanded bits in the result that are not
1655 // present in the input.
1656 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1658 APInt InSignBit = APInt::getSignBit(EBits);
1659 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1661 // If the sign extended bits are demanded, we know that the sign
1663 InSignBit.zext(BitWidth);
1664 if (NewBits.getBoolValue())
1665 InputDemandedBits |= InSignBit;
1667 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1668 KnownZero, KnownOne, Depth+1);
1669 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1671 // If the sign bit of the input is known set or clear, then we know the
1672 // top bits of the result.
1673 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1674 KnownZero |= NewBits;
1675 KnownOne &= ~NewBits;
1676 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1677 KnownOne |= NewBits;
1678 KnownZero &= ~NewBits;
1679 } else { // Input sign bit unknown
1680 KnownZero &= ~NewBits;
1681 KnownOne &= ~NewBits;
1688 unsigned LowBits = Log2_32(BitWidth)+1;
1689 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1694 if (ISD::isZEXTLoad(Op.getNode())) {
1695 LoadSDNode *LD = cast<LoadSDNode>(Op);
1696 MVT VT = LD->getMemoryVT();
1697 unsigned MemBits = VT.getSizeInBits();
1698 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1702 case ISD::ZERO_EXTEND: {
1703 MVT InVT = Op.getOperand(0).getValueType();
1704 unsigned InBits = InVT.getSizeInBits();
1705 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1706 APInt InMask = Mask;
1707 InMask.trunc(InBits);
1708 KnownZero.trunc(InBits);
1709 KnownOne.trunc(InBits);
1710 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1711 KnownZero.zext(BitWidth);
1712 KnownOne.zext(BitWidth);
1713 KnownZero |= NewBits;
1716 case ISD::SIGN_EXTEND: {
1717 MVT InVT = Op.getOperand(0).getValueType();
1718 unsigned InBits = InVT.getSizeInBits();
1719 APInt InSignBit = APInt::getSignBit(InBits);
1720 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1721 APInt InMask = Mask;
1722 InMask.trunc(InBits);
1724 // If any of the sign extended bits are demanded, we know that the sign
1725 // bit is demanded. Temporarily set this bit in the mask for our callee.
1726 if (NewBits.getBoolValue())
1727 InMask |= InSignBit;
1729 KnownZero.trunc(InBits);
1730 KnownOne.trunc(InBits);
1731 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1733 // Note if the sign bit is known to be zero or one.
1734 bool SignBitKnownZero = KnownZero.isNegative();
1735 bool SignBitKnownOne = KnownOne.isNegative();
1736 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1737 "Sign bit can't be known to be both zero and one!");
1739 // If the sign bit wasn't actually demanded by our caller, we don't
1740 // want it set in the KnownZero and KnownOne result values. Reset the
1741 // mask and reapply it to the result values.
1743 InMask.trunc(InBits);
1744 KnownZero &= InMask;
1747 KnownZero.zext(BitWidth);
1748 KnownOne.zext(BitWidth);
1750 // If the sign bit is known zero or one, the top bits match.
1751 if (SignBitKnownZero)
1752 KnownZero |= NewBits;
1753 else if (SignBitKnownOne)
1754 KnownOne |= NewBits;
1757 case ISD::ANY_EXTEND: {
1758 MVT InVT = Op.getOperand(0).getValueType();
1759 unsigned InBits = InVT.getSizeInBits();
1760 APInt InMask = Mask;
1761 InMask.trunc(InBits);
1762 KnownZero.trunc(InBits);
1763 KnownOne.trunc(InBits);
1764 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1765 KnownZero.zext(BitWidth);
1766 KnownOne.zext(BitWidth);
1769 case ISD::TRUNCATE: {
1770 MVT InVT = Op.getOperand(0).getValueType();
1771 unsigned InBits = InVT.getSizeInBits();
1772 APInt InMask = Mask;
1773 InMask.zext(InBits);
1774 KnownZero.zext(InBits);
1775 KnownOne.zext(InBits);
1776 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 KnownZero.trunc(BitWidth);
1779 KnownOne.trunc(BitWidth);
1782 case ISD::AssertZext: {
1783 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1784 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1785 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1787 KnownZero |= (~InMask) & Mask;
1791 // All bits are zero except the low bit.
1792 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1796 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1797 // We know that the top bits of C-X are clear if X contains less bits
1798 // than C (i.e. no wrap-around can happen). For example, 20-X is
1799 // positive if we can prove that X is >= 0 and < 16.
1800 if (CLHS->getAPIntValue().isNonNegative()) {
1801 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1802 // NLZ can't be BitWidth with no sign bit
1803 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1804 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1807 // If all of the MaskV bits are known to be zero, then we know the
1808 // output top bits are zero, because we now know that the output is
1810 if ((KnownZero2 & MaskV) == MaskV) {
1811 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1812 // Top bits known zero.
1813 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1820 // Output known-0 bits are known if clear or set in both the low clear bits
1821 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1822 // low 3 bits clear.
1823 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1824 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1825 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1826 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1828 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1829 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1830 KnownZeroOut = std::min(KnownZeroOut,
1831 KnownZero2.countTrailingOnes());
1833 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1837 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1838 const APInt &RA = Rem->getAPIntValue();
1839 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1840 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1841 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1842 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1844 // If the sign bit of the first operand is zero, the sign bit of
1845 // the result is zero. If the first operand has no one bits below
1846 // the second operand's single 1 bit, its sign will be zero.
1847 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1848 KnownZero2 |= ~LowBits;
1850 KnownZero |= KnownZero2 & Mask;
1852 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1857 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1858 const APInt &RA = Rem->getAPIntValue();
1859 if (RA.isPowerOf2()) {
1860 APInt LowBits = (RA - 1);
1861 APInt Mask2 = LowBits & Mask;
1862 KnownZero |= ~LowBits & Mask;
1863 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1864 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1869 // Since the result is less than or equal to either operand, any leading
1870 // zero bits in either operand must also exist in the result.
1871 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1872 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1874 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1877 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1878 KnownZero2.countLeadingOnes());
1880 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1884 // Allow the target to implement this method for its nodes.
1885 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1886 case ISD::INTRINSIC_WO_CHAIN:
1887 case ISD::INTRINSIC_W_CHAIN:
1888 case ISD::INTRINSIC_VOID:
1889 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1895 /// ComputeNumSignBits - Return the number of times the sign bit of the
1896 /// register is replicated into the other bits. We know that at least 1 bit
1897 /// is always equal to the sign bit (itself), but other cases can give us
1898 /// information. For example, immediately after an "SRA X, 2", we know that
1899 /// the top 3 bits are all equal to each other, so we return 3.
1900 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1901 MVT VT = Op.getValueType();
1902 assert(VT.isInteger() && "Invalid VT!");
1903 unsigned VTBits = VT.getSizeInBits();
1905 unsigned FirstAnswer = 1;
1908 return 1; // Limit search depth.
1910 switch (Op.getOpcode()) {
1912 case ISD::AssertSext:
1913 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1914 return VTBits-Tmp+1;
1915 case ISD::AssertZext:
1916 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1919 case ISD::Constant: {
1920 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1921 // If negative, return # leading ones.
1922 if (Val.isNegative())
1923 return Val.countLeadingOnes();
1925 // Return # leading zeros.
1926 return Val.countLeadingZeros();
1929 case ISD::SIGN_EXTEND:
1930 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1931 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1933 case ISD::SIGN_EXTEND_INREG:
1934 // Max of the input and what this extends.
1935 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1938 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1939 return std::max(Tmp, Tmp2);
1942 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1943 // SRA X, C -> adds C sign bits.
1944 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1945 Tmp += C->getZExtValue();
1946 if (Tmp > VTBits) Tmp = VTBits;
1950 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1951 // shl destroys sign bits.
1952 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1953 if (C->getZExtValue() >= VTBits || // Bad shift.
1954 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1955 return Tmp - C->getZExtValue();
1960 case ISD::XOR: // NOT is handled here.
1961 // Logical binary ops preserve the number of sign bits at the worst.
1962 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1964 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1965 FirstAnswer = std::min(Tmp, Tmp2);
1966 // We computed what we know about the sign bits as our first
1967 // answer. Now proceed to the generic code that uses
1968 // ComputeMaskedBits, and pick whichever answer is better.
1973 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1974 if (Tmp == 1) return 1; // Early out.
1975 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1976 return std::min(Tmp, Tmp2);
1984 if (Op.getResNo() != 1)
1986 // The boolean result conforms to getBooleanContents. Fall through.
1988 // If setcc returns 0/-1, all bits are sign bits.
1989 if (TLI.getBooleanContents() ==
1990 TargetLowering::ZeroOrNegativeOneBooleanContent)
1995 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1996 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1998 // Handle rotate right by N like a rotate left by 32-N.
1999 if (Op.getOpcode() == ISD::ROTR)
2000 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2002 // If we aren't rotating out all of the known-in sign bits, return the
2003 // number that are left. This handles rotl(sext(x), 1) for example.
2004 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2005 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2009 // Add can have at most one carry bit. Thus we know that the output
2010 // is, at worst, one more bit than the inputs.
2011 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2012 if (Tmp == 1) return 1; // Early out.
2014 // Special case decrementing a value (ADD X, -1):
2015 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2016 if (CRHS->isAllOnesValue()) {
2017 APInt KnownZero, KnownOne;
2018 APInt Mask = APInt::getAllOnesValue(VTBits);
2019 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2021 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2023 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2026 // If we are subtracting one from a positive number, there is no carry
2027 // out of the result.
2028 if (KnownZero.isNegative())
2032 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2033 if (Tmp2 == 1) return 1;
2034 return std::min(Tmp, Tmp2)-1;
2038 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2039 if (Tmp2 == 1) return 1;
2042 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2043 if (CLHS->isNullValue()) {
2044 APInt KnownZero, KnownOne;
2045 APInt Mask = APInt::getAllOnesValue(VTBits);
2046 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2047 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2049 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2052 // If the input is known to be positive (the sign bit is known clear),
2053 // the output of the NEG has the same number of sign bits as the input.
2054 if (KnownZero.isNegative())
2057 // Otherwise, we treat this like a SUB.
2060 // Sub can have at most one carry bit. Thus we know that the output
2061 // is, at worst, one more bit than the inputs.
2062 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2063 if (Tmp == 1) return 1; // Early out.
2064 return std::min(Tmp, Tmp2)-1;
2067 // FIXME: it's tricky to do anything useful for this, but it is an important
2068 // case for targets like X86.
2072 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2073 if (Op.getOpcode() == ISD::LOAD) {
2074 LoadSDNode *LD = cast<LoadSDNode>(Op);
2075 unsigned ExtType = LD->getExtensionType();
2078 case ISD::SEXTLOAD: // '17' bits known
2079 Tmp = LD->getMemoryVT().getSizeInBits();
2080 return VTBits-Tmp+1;
2081 case ISD::ZEXTLOAD: // '16' bits known
2082 Tmp = LD->getMemoryVT().getSizeInBits();
2087 // Allow the target to implement this method for its nodes.
2088 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2089 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2090 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2091 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2092 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2093 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2096 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2097 // use this information.
2098 APInt KnownZero, KnownOne;
2099 APInt Mask = APInt::getAllOnesValue(VTBits);
2100 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2102 if (KnownZero.isNegative()) { // sign bit is 0
2104 } else if (KnownOne.isNegative()) { // sign bit is 1;
2111 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2112 // the number of identical bits in the top of the input value.
2114 Mask <<= Mask.getBitWidth()-VTBits;
2115 // Return # leading zeros. We use 'min' here in case Val was zero before
2116 // shifting. We don't want to return '64' as for an i32 "0".
2117 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2121 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2122 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2123 if (!GA) return false;
2124 if (GA->getOffset() != 0) return false;
2125 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2126 if (!GV) return false;
2127 MachineModuleInfo *MMI = getMachineModuleInfo();
2128 return MMI && MMI->hasDebugInfo();
2132 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2133 /// element of the result of the vector shuffle.
2134 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2135 MVT VT = N->getValueType(0);
2136 SDValue PermMask = N->getOperand(2);
2137 SDValue Idx = PermMask.getOperand(i);
2138 if (Idx.getOpcode() == ISD::UNDEF)
2139 return getNode(ISD::UNDEF, VT.getVectorElementType());
2140 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2141 unsigned NumElems = PermMask.getNumOperands();
2142 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2145 if (V.getOpcode() == ISD::BIT_CONVERT) {
2146 V = V.getOperand(0);
2147 MVT VVT = V.getValueType();
2148 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2151 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2152 return (Index == 0) ? V.getOperand(0)
2153 : getNode(ISD::UNDEF, VT.getVectorElementType());
2154 if (V.getOpcode() == ISD::BUILD_VECTOR)
2155 return V.getOperand(Index);
2156 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2157 return getShuffleScalarElt(V.getNode(), Index);
2162 /// getNode - Gets or creates the specified node.
2164 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2165 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2168 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2169 FoldingSetNodeID ID;
2170 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2173 return SDValue(E, 0);
2174 SDNode *N = NodeAllocator.Allocate<SDNode>();
2175 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2176 CSEMap.InsertNode(N, IP);
2178 AllNodes.push_back(N);
2182 return SDValue(N, 0);
2185 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2186 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2189 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2190 MVT VT, SDValue Operand) {
2191 // Constant fold unary operations with an integer constant operand.
2192 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2193 const APInt &Val = C->getAPIntValue();
2194 unsigned BitWidth = VT.getSizeInBits();
2197 case ISD::SIGN_EXTEND:
2198 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2199 case ISD::ANY_EXTEND:
2200 case ISD::ZERO_EXTEND:
2202 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2203 case ISD::UINT_TO_FP:
2204 case ISD::SINT_TO_FP: {
2205 const uint64_t zero[] = {0, 0};
2206 // No compile time operations on this type.
2207 if (VT==MVT::ppcf128)
2209 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2210 (void)apf.convertFromAPInt(Val,
2211 Opcode==ISD::SINT_TO_FP,
2212 APFloat::rmNearestTiesToEven);
2213 return getConstantFP(apf, VT);
2215 case ISD::BIT_CONVERT:
2216 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2217 return getConstantFP(Val.bitsToFloat(), VT);
2218 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2219 return getConstantFP(Val.bitsToDouble(), VT);
2222 return getConstant(Val.byteSwap(), VT);
2224 return getConstant(Val.countPopulation(), VT);
2226 return getConstant(Val.countLeadingZeros(), VT);
2228 return getConstant(Val.countTrailingZeros(), VT);
2232 // Constant fold unary operations with a floating point constant operand.
2233 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2234 APFloat V = C->getValueAPF(); // make copy
2235 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2239 return getConstantFP(V, VT);
2242 return getConstantFP(V, VT);
2244 case ISD::FP_EXTEND: {
2246 // This can return overflow, underflow, or inexact; we don't care.
2247 // FIXME need to be more flexible about rounding mode.
2248 (void)V.convert(*MVTToAPFloatSemantics(VT),
2249 APFloat::rmNearestTiesToEven, &ignored);
2250 return getConstantFP(V, VT);
2252 case ISD::FP_TO_SINT:
2253 case ISD::FP_TO_UINT: {
2256 assert(integerPartWidth >= 64);
2257 // FIXME need to be more flexible about rounding mode.
2258 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2259 Opcode==ISD::FP_TO_SINT,
2260 APFloat::rmTowardZero, &ignored);
2261 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2263 return getConstant(x, VT);
2265 case ISD::BIT_CONVERT:
2266 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2267 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2268 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2269 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2275 unsigned OpOpcode = Operand.getNode()->getOpcode();
2277 case ISD::TokenFactor:
2278 case ISD::MERGE_VALUES:
2279 case ISD::CONCAT_VECTORS:
2280 return Operand; // Factor, merge or concat of one node? No need.
2281 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2282 case ISD::FP_EXTEND:
2283 assert(VT.isFloatingPoint() &&
2284 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2285 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2286 if (Operand.getOpcode() == ISD::UNDEF)
2287 return getNode(ISD::UNDEF, VT);
2289 case ISD::SIGN_EXTEND:
2290 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2291 "Invalid SIGN_EXTEND!");
2292 if (Operand.getValueType() == VT) return Operand; // noop extension
2293 assert(Operand.getValueType().bitsLT(VT)
2294 && "Invalid sext node, dst < src!");
2295 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2296 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2298 case ISD::ZERO_EXTEND:
2299 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2300 "Invalid ZERO_EXTEND!");
2301 if (Operand.getValueType() == VT) return Operand; // noop extension
2302 assert(Operand.getValueType().bitsLT(VT)
2303 && "Invalid zext node, dst < src!");
2304 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2305 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2307 case ISD::ANY_EXTEND:
2308 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2309 "Invalid ANY_EXTEND!");
2310 if (Operand.getValueType() == VT) return Operand; // noop extension
2311 assert(Operand.getValueType().bitsLT(VT)
2312 && "Invalid anyext node, dst < src!");
2313 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2314 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2315 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2318 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2319 "Invalid TRUNCATE!");
2320 if (Operand.getValueType() == VT) return Operand; // noop truncate
2321 assert(Operand.getValueType().bitsGT(VT)
2322 && "Invalid truncate node, src < dst!");
2323 if (OpOpcode == ISD::TRUNCATE)
2324 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2325 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2326 OpOpcode == ISD::ANY_EXTEND) {
2327 // If the source is smaller than the dest, we still need an extend.
2328 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2329 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2330 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2331 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2333 return Operand.getNode()->getOperand(0);
2336 case ISD::BIT_CONVERT:
2337 // Basic sanity checking.
2338 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2339 && "Cannot BIT_CONVERT between types of different sizes!");
2340 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2341 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2342 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2343 if (OpOpcode == ISD::UNDEF)
2344 return getNode(ISD::UNDEF, VT);
2346 case ISD::SCALAR_TO_VECTOR:
2347 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2348 VT.getVectorElementType() == Operand.getValueType() &&
2349 "Illegal SCALAR_TO_VECTOR node!");
2350 if (OpOpcode == ISD::UNDEF)
2351 return getNode(ISD::UNDEF, VT);
2352 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2353 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2354 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2355 Operand.getConstantOperandVal(1) == 0 &&
2356 Operand.getOperand(0).getValueType() == VT)
2357 return Operand.getOperand(0);
2360 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2361 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2362 Operand.getNode()->getOperand(0));
2363 if (OpOpcode == ISD::FNEG) // --X -> X
2364 return Operand.getNode()->getOperand(0);
2367 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2368 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2373 SDVTList VTs = getVTList(VT);
2374 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2375 FoldingSetNodeID ID;
2376 SDValue Ops[1] = { Operand };
2377 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2379 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2380 return SDValue(E, 0);
2381 N = NodeAllocator.Allocate<UnarySDNode>();
2382 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2383 CSEMap.InsertNode(N, IP);
2385 N = NodeAllocator.Allocate<UnarySDNode>();
2386 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2389 AllNodes.push_back(N);
2393 return SDValue(N, 0);
2396 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2398 ConstantSDNode *Cst1,
2399 ConstantSDNode *Cst2) {
2400 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2403 case ISD::ADD: return getConstant(C1 + C2, VT);
2404 case ISD::SUB: return getConstant(C1 - C2, VT);
2405 case ISD::MUL: return getConstant(C1 * C2, VT);
2407 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2410 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2413 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2416 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2418 case ISD::AND: return getConstant(C1 & C2, VT);
2419 case ISD::OR: return getConstant(C1 | C2, VT);
2420 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2421 case ISD::SHL: return getConstant(C1 << C2, VT);
2422 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2423 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2424 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2425 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2432 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2433 SDValue N1, SDValue N2) {
2434 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2437 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2438 SDValue N1, SDValue N2) {
2439 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2440 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2443 case ISD::TokenFactor:
2444 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2445 N2.getValueType() == MVT::Other && "Invalid token factor!");
2446 // Fold trivial token factors.
2447 if (N1.getOpcode() == ISD::EntryToken) return N2;
2448 if (N2.getOpcode() == ISD::EntryToken) return N1;
2449 if (N1 == N2) return N1;
2451 case ISD::CONCAT_VECTORS:
2452 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2453 // one big BUILD_VECTOR.
2454 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2455 N2.getOpcode() == ISD::BUILD_VECTOR) {
2456 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2457 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2458 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2462 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2463 N1.getValueType() == VT && "Binary operator types must match!");
2464 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2465 // worth handling here.
2466 if (N2C && N2C->isNullValue())
2468 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2475 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2476 N1.getValueType() == VT && "Binary operator types must match!");
2477 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2478 // it's worth handling here.
2479 if (N2C && N2C->isNullValue())
2489 assert(VT.isInteger() && "This operator does not apply to FP types!");
2497 if (Opcode == ISD::FADD) {
2499 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2500 if (CFP->getValueAPF().isZero())
2503 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2504 if (CFP->getValueAPF().isZero())
2506 } else if (Opcode == ISD::FSUB) {
2508 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2509 if (CFP->getValueAPF().isZero())
2513 assert(N1.getValueType() == N2.getValueType() &&
2514 N1.getValueType() == VT && "Binary operator types must match!");
2516 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2517 assert(N1.getValueType() == VT &&
2518 N1.getValueType().isFloatingPoint() &&
2519 N2.getValueType().isFloatingPoint() &&
2520 "Invalid FCOPYSIGN!");
2527 assert(VT == N1.getValueType() &&
2528 "Shift operators return type must be the same as their first arg");
2529 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2530 "Shifts only work on integers");
2531 assert((N2.getValueType() == TLI.getShiftAmountTy() ||
2532 (N2.getValueType().isVector() && N2.getValueType().isInteger())) &&
2533 "Wrong type for shift amount");
2535 // Always fold shifts of i1 values so the code generator doesn't need to
2536 // handle them. Since we know the size of the shift has to be less than the
2537 // size of the value, the shift/rotate count is guaranteed to be zero.
2541 case ISD::FP_ROUND_INREG: {
2542 MVT EVT = cast<VTSDNode>(N2)->getVT();
2543 assert(VT == N1.getValueType() && "Not an inreg round!");
2544 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2545 "Cannot FP_ROUND_INREG integer types");
2546 assert(EVT.bitsLE(VT) && "Not rounding down!");
2547 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2551 assert(VT.isFloatingPoint() &&
2552 N1.getValueType().isFloatingPoint() &&
2553 VT.bitsLE(N1.getValueType()) &&
2554 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2555 if (N1.getValueType() == VT) return N1; // noop conversion.
2557 case ISD::AssertSext:
2558 case ISD::AssertZext: {
2559 MVT EVT = cast<VTSDNode>(N2)->getVT();
2560 assert(VT == N1.getValueType() && "Not an inreg extend!");
2561 assert(VT.isInteger() && EVT.isInteger() &&
2562 "Cannot *_EXTEND_INREG FP types");
2563 assert(EVT.bitsLE(VT) && "Not extending!");
2564 if (VT == EVT) return N1; // noop assertion.
2567 case ISD::SIGN_EXTEND_INREG: {
2568 MVT EVT = cast<VTSDNode>(N2)->getVT();
2569 assert(VT == N1.getValueType() && "Not an inreg extend!");
2570 assert(VT.isInteger() && EVT.isInteger() &&
2571 "Cannot *_EXTEND_INREG FP types");
2572 assert(EVT.bitsLE(VT) && "Not extending!");
2573 if (EVT == VT) return N1; // Not actually extending
2576 APInt Val = N1C->getAPIntValue();
2577 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2578 Val <<= Val.getBitWidth()-FromBits;
2579 Val = Val.ashr(Val.getBitWidth()-FromBits);
2580 return getConstant(Val, VT);
2584 case ISD::EXTRACT_VECTOR_ELT:
2585 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2586 if (N1.getOpcode() == ISD::UNDEF)
2587 return getNode(ISD::UNDEF, VT);
2589 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2590 // expanding copies of large vectors from registers.
2592 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2593 N1.getNumOperands() > 0) {
2595 N1.getOperand(0).getValueType().getVectorNumElements();
2596 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2597 N1.getOperand(N2C->getZExtValue() / Factor),
2598 getConstant(N2C->getZExtValue() % Factor,
2599 N2.getValueType()));
2602 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2603 // expanding large vector constants.
2604 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2605 return N1.getOperand(N2C->getZExtValue());
2607 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2608 // operations are lowered to scalars.
2609 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2610 // If the indices are the same, return the inserted element.
2611 if (N1.getOperand(2) == N2)
2612 return N1.getOperand(1);
2613 // If the indices are known different, extract the element from
2614 // the original vector.
2615 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2616 isa<ConstantSDNode>(N2))
2617 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2620 case ISD::EXTRACT_ELEMENT:
2621 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2622 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2623 (N1.getValueType().isInteger() == VT.isInteger()) &&
2624 "Wrong types for EXTRACT_ELEMENT!");
2626 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2627 // 64-bit integers into 32-bit parts. Instead of building the extract of
2628 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2629 if (N1.getOpcode() == ISD::BUILD_PAIR)
2630 return N1.getOperand(N2C->getZExtValue());
2632 // EXTRACT_ELEMENT of a constant int is also very common.
2633 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2634 unsigned ElementSize = VT.getSizeInBits();
2635 unsigned Shift = ElementSize * N2C->getZExtValue();
2636 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2637 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2640 case ISD::EXTRACT_SUBVECTOR:
2641 if (N1.getValueType() == VT) // Trivial extraction.
2648 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2649 if (SV.getNode()) return SV;
2650 } else { // Cannonicalize constant to RHS if commutative
2651 if (isCommutativeBinOp(Opcode)) {
2652 std::swap(N1C, N2C);
2658 // Constant fold FP operations.
2659 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2660 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2662 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2663 // Cannonicalize constant to RHS if commutative
2664 std::swap(N1CFP, N2CFP);
2666 } else if (N2CFP && VT != MVT::ppcf128) {
2667 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2668 APFloat::opStatus s;
2671 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2672 if (s != APFloat::opInvalidOp)
2673 return getConstantFP(V1, VT);
2676 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2677 if (s!=APFloat::opInvalidOp)
2678 return getConstantFP(V1, VT);
2681 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2682 if (s!=APFloat::opInvalidOp)
2683 return getConstantFP(V1, VT);
2686 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2687 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2688 return getConstantFP(V1, VT);
2691 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2692 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2693 return getConstantFP(V1, VT);
2695 case ISD::FCOPYSIGN:
2697 return getConstantFP(V1, VT);
2703 // Canonicalize an UNDEF to the RHS, even over a constant.
2704 if (N1.getOpcode() == ISD::UNDEF) {
2705 if (isCommutativeBinOp(Opcode)) {
2709 case ISD::FP_ROUND_INREG:
2710 case ISD::SIGN_EXTEND_INREG:
2716 return N1; // fold op(undef, arg2) -> undef
2724 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2725 // For vectors, we can't easily build an all zero vector, just return
2732 // Fold a bunch of operators when the RHS is undef.
2733 if (N2.getOpcode() == ISD::UNDEF) {
2736 if (N1.getOpcode() == ISD::UNDEF)
2737 // Handle undef ^ undef -> 0 special case. This is a common
2739 return getConstant(0, VT);
2754 return N2; // fold op(arg1, undef) -> undef
2760 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2761 // For vectors, we can't easily build an all zero vector, just return
2766 return getConstant(VT.getIntegerVTBitMask(), VT);
2767 // For vectors, we can't easily build an all one vector, just return
2775 // Memoize this node if possible.
2777 SDVTList VTs = getVTList(VT);
2778 if (VT != MVT::Flag) {
2779 SDValue Ops[] = { N1, N2 };
2780 FoldingSetNodeID ID;
2781 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2783 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2784 return SDValue(E, 0);
2785 N = NodeAllocator.Allocate<BinarySDNode>();
2786 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2787 CSEMap.InsertNode(N, IP);
2789 N = NodeAllocator.Allocate<BinarySDNode>();
2790 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2793 AllNodes.push_back(N);
2797 return SDValue(N, 0);
2800 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2801 SDValue N1, SDValue N2, SDValue N3) {
2802 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2805 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2806 SDValue N1, SDValue N2, SDValue N3) {
2807 // Perform various simplifications.
2808 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2809 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2811 case ISD::CONCAT_VECTORS:
2812 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2813 // one big BUILD_VECTOR.
2814 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2815 N2.getOpcode() == ISD::BUILD_VECTOR &&
2816 N3.getOpcode() == ISD::BUILD_VECTOR) {
2817 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2818 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2819 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2820 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2824 // Use FoldSetCC to simplify SETCC's.
2825 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2826 if (Simp.getNode()) return Simp;
2831 if (N1C->getZExtValue())
2832 return N2; // select true, X, Y -> X
2834 return N3; // select false, X, Y -> Y
2837 if (N2 == N3) return N2; // select C, X, X -> X
2841 if (N2C->getZExtValue()) // Unconditional branch
2842 return getNode(ISD::BR, MVT::Other, N1, N3);
2844 return N1; // Never-taken branch
2847 case ISD::VECTOR_SHUFFLE:
2848 assert(N1.getValueType() == N2.getValueType() &&
2849 N1.getValueType().isVector() &&
2850 VT.isVector() && N3.getValueType().isVector() &&
2851 N3.getOpcode() == ISD::BUILD_VECTOR &&
2852 VT.getVectorNumElements() == N3.getNumOperands() &&
2853 "Illegal VECTOR_SHUFFLE node!");
2855 case ISD::BIT_CONVERT:
2856 // Fold bit_convert nodes from a type to themselves.
2857 if (N1.getValueType() == VT)
2862 // Memoize node if it doesn't produce a flag.
2864 SDVTList VTs = getVTList(VT);
2865 if (VT != MVT::Flag) {
2866 SDValue Ops[] = { N1, N2, N3 };
2867 FoldingSetNodeID ID;
2868 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2870 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2871 return SDValue(E, 0);
2872 N = NodeAllocator.Allocate<TernarySDNode>();
2873 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2874 CSEMap.InsertNode(N, IP);
2876 N = NodeAllocator.Allocate<TernarySDNode>();
2877 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2879 AllNodes.push_back(N);
2883 return SDValue(N, 0);
2886 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2887 SDValue N1, SDValue N2, SDValue N3,
2889 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2892 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2893 SDValue N1, SDValue N2, SDValue N3,
2895 SDValue Ops[] = { N1, N2, N3, N4 };
2896 return getNode(Opcode, DL, VT, Ops, 4);
2899 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2900 SDValue N1, SDValue N2, SDValue N3,
2901 SDValue N4, SDValue N5) {
2902 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2905 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2906 SDValue N1, SDValue N2, SDValue N3,
2907 SDValue N4, SDValue N5) {
2908 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2909 return getNode(Opcode, DL, VT, Ops, 5);
2912 /// getMemsetValue - Vectorized representation of the memset value
2914 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2915 unsigned NumBits = VT.isVector() ?
2916 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2917 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2918 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2920 for (unsigned i = NumBits; i > 8; i >>= 1) {
2921 Val = (Val << Shift) | Val;
2925 return DAG.getConstant(Val, VT);
2926 return DAG.getConstantFP(APFloat(Val), VT);
2929 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2930 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2932 for (unsigned i = NumBits; i > 8; i >>= 1) {
2933 Value = DAG.getNode(ISD::OR, VT,
2934 DAG.getNode(ISD::SHL, VT, Value,
2935 DAG.getConstant(Shift,
2936 TLI.getShiftAmountTy())),
2944 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2945 /// used when a memcpy is turned into a memset when the source is a constant
2947 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2948 const TargetLowering &TLI,
2949 std::string &Str, unsigned Offset) {
2950 // Handle vector with all elements zero.
2953 return DAG.getConstant(0, VT);
2954 unsigned NumElts = VT.getVectorNumElements();
2955 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2956 return DAG.getNode(ISD::BIT_CONVERT, VT,
2957 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2960 assert(!VT.isVector() && "Can't handle vector type here!");
2961 unsigned NumBits = VT.getSizeInBits();
2962 unsigned MSB = NumBits / 8;
2964 if (TLI.isLittleEndian())
2965 Offset = Offset + MSB - 1;
2966 for (unsigned i = 0; i != MSB; ++i) {
2967 Val = (Val << 8) | (unsigned char)Str[Offset];
2968 Offset += TLI.isLittleEndian() ? -1 : 1;
2970 return DAG.getConstant(Val, VT);
2973 /// getMemBasePlusOffset - Returns base and offset node for the
2975 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2976 SelectionDAG &DAG) {
2977 MVT VT = Base.getValueType();
2978 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2981 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2983 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2984 unsigned SrcDelta = 0;
2985 GlobalAddressSDNode *G = NULL;
2986 if (Src.getOpcode() == ISD::GlobalAddress)
2987 G = cast<GlobalAddressSDNode>(Src);
2988 else if (Src.getOpcode() == ISD::ADD &&
2989 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2990 Src.getOperand(1).getOpcode() == ISD::Constant) {
2991 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2992 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2997 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2998 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3004 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3005 /// to replace the memset / memcpy is below the threshold. It also returns the
3006 /// types of the sequence of memory ops to perform memset / memcpy.
3008 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3009 SDValue Dst, SDValue Src,
3010 unsigned Limit, uint64_t Size, unsigned &Align,
3011 std::string &Str, bool &isSrcStr,
3013 const TargetLowering &TLI) {
3014 isSrcStr = isMemSrcFromString(Src, Str);
3015 bool isSrcConst = isa<ConstantSDNode>(Src);
3016 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3017 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3018 if (VT != MVT::iAny) {
3019 unsigned NewAlign = (unsigned)
3020 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3021 // If source is a string constant, this will require an unaligned load.
3022 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3023 if (Dst.getOpcode() != ISD::FrameIndex) {
3024 // Can't change destination alignment. It requires a unaligned store.
3028 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3029 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3030 if (MFI->isFixedObjectIndex(FI)) {
3031 // Can't change destination alignment. It requires a unaligned store.
3035 // Give the stack frame object a larger alignment if needed.
3036 if (MFI->getObjectAlignment(FI) < NewAlign)
3037 MFI->setObjectAlignment(FI, NewAlign);
3044 if (VT == MVT::iAny) {
3048 switch (Align & 7) {
3049 case 0: VT = MVT::i64; break;
3050 case 4: VT = MVT::i32; break;
3051 case 2: VT = MVT::i16; break;
3052 default: VT = MVT::i8; break;
3057 while (!TLI.isTypeLegal(LVT))
3058 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3059 assert(LVT.isInteger());
3065 unsigned NumMemOps = 0;
3067 unsigned VTSize = VT.getSizeInBits() / 8;
3068 while (VTSize > Size) {
3069 // For now, only use non-vector load / store's for the left-over pieces.
3070 if (VT.isVector()) {
3072 while (!TLI.isTypeLegal(VT))
3073 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3074 VTSize = VT.getSizeInBits() / 8;
3076 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3081 if (++NumMemOps > Limit)
3083 MemOps.push_back(VT);
3090 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
3091 SDValue Chain, SDValue Dst,
3092 SDValue Src, uint64_t Size,
3093 unsigned Align, bool AlwaysInline,
3094 const Value *DstSV, uint64_t DstSVOff,
3095 const Value *SrcSV, uint64_t SrcSVOff){
3096 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3098 // Expand memcpy to a series of load and store ops if the size operand falls
3099 // below a certain threshold.
3100 std::vector<MVT> MemOps;
3101 uint64_t Limit = -1ULL;
3103 Limit = TLI.getMaxStoresPerMemcpy();
3104 unsigned DstAlign = Align; // Destination alignment can change.
3107 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3108 Str, CopyFromStr, DAG, TLI))
3112 bool isZeroStr = CopyFromStr && Str.empty();
3113 SmallVector<SDValue, 8> OutChains;
3114 unsigned NumMemOps = MemOps.size();
3115 uint64_t SrcOff = 0, DstOff = 0;
3116 for (unsigned i = 0; i < NumMemOps; i++) {
3118 unsigned VTSize = VT.getSizeInBits() / 8;
3119 SDValue Value, Store;
3121 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3122 // It's unlikely a store of a vector immediate can be done in a single
3123 // instruction. It would require a load from a constantpool first.
3124 // We also handle store a vector with all zero's.
3125 // FIXME: Handle other cases where store of vector immediate is done in
3126 // a single instruction.
3127 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3128 Store = DAG.getStore(Chain, Value,
3129 getMemBasePlusOffset(Dst, DstOff, DAG),
3130 DstSV, DstSVOff + DstOff, false, DstAlign);
3132 Value = DAG.getLoad(VT, Chain,
3133 getMemBasePlusOffset(Src, SrcOff, DAG),
3134 SrcSV, SrcSVOff + SrcOff, false, Align);
3135 Store = DAG.getStore(Chain, Value,
3136 getMemBasePlusOffset(Dst, DstOff, DAG),
3137 DstSV, DstSVOff + DstOff, false, DstAlign);
3139 OutChains.push_back(Store);
3144 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3145 &OutChains[0], OutChains.size());
3148 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3149 SDValue Chain, SDValue Dst,
3150 SDValue Src, uint64_t Size,
3151 unsigned Align, bool AlwaysInline,
3152 const Value *DstSV, uint64_t DstSVOff,
3153 const Value *SrcSV, uint64_t SrcSVOff){
3154 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3156 // Expand memmove to a series of load and store ops if the size operand falls
3157 // below a certain threshold.
3158 std::vector<MVT> MemOps;
3159 uint64_t Limit = -1ULL;
3161 Limit = TLI.getMaxStoresPerMemmove();
3162 unsigned DstAlign = Align; // Destination alignment can change.
3165 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3166 Str, CopyFromStr, DAG, TLI))
3169 uint64_t SrcOff = 0, DstOff = 0;
3171 SmallVector<SDValue, 8> LoadValues;
3172 SmallVector<SDValue, 8> LoadChains;
3173 SmallVector<SDValue, 8> OutChains;
3174 unsigned NumMemOps = MemOps.size();
3175 for (unsigned i = 0; i < NumMemOps; i++) {
3177 unsigned VTSize = VT.getSizeInBits() / 8;
3178 SDValue Value, Store;
3180 Value = DAG.getLoad(VT, Chain,
3181 getMemBasePlusOffset(Src, SrcOff, DAG),
3182 SrcSV, SrcSVOff + SrcOff, false, Align);
3183 LoadValues.push_back(Value);
3184 LoadChains.push_back(Value.getValue(1));
3187 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3188 &LoadChains[0], LoadChains.size());
3190 for (unsigned i = 0; i < NumMemOps; i++) {
3192 unsigned VTSize = VT.getSizeInBits() / 8;
3193 SDValue Value, Store;
3195 Store = DAG.getStore(Chain, LoadValues[i],
3196 getMemBasePlusOffset(Dst, DstOff, DAG),
3197 DstSV, DstSVOff + DstOff, false, DstAlign);
3198 OutChains.push_back(Store);
3202 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3203 &OutChains[0], OutChains.size());
3206 static SDValue getMemsetStores(SelectionDAG &DAG,
3207 SDValue Chain, SDValue Dst,
3208 SDValue Src, uint64_t Size,
3210 const Value *DstSV, uint64_t DstSVOff) {
3211 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3213 // Expand memset to a series of load/store ops if the size operand
3214 // falls below a certain threshold.
3215 std::vector<MVT> MemOps;
3218 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3219 Size, Align, Str, CopyFromStr, DAG, TLI))
3222 SmallVector<SDValue, 8> OutChains;
3223 uint64_t DstOff = 0;
3225 unsigned NumMemOps = MemOps.size();
3226 for (unsigned i = 0; i < NumMemOps; i++) {
3228 unsigned VTSize = VT.getSizeInBits() / 8;
3229 SDValue Value = getMemsetValue(Src, VT, DAG);
3230 SDValue Store = DAG.getStore(Chain, Value,
3231 getMemBasePlusOffset(Dst, DstOff, DAG),
3232 DstSV, DstSVOff + DstOff);
3233 OutChains.push_back(Store);
3237 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3238 &OutChains[0], OutChains.size());
3241 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3242 SDValue Src, SDValue Size,
3243 unsigned Align, bool AlwaysInline,
3244 const Value *DstSV, uint64_t DstSVOff,
3245 const Value *SrcSV, uint64_t SrcSVOff) {
3247 // Check to see if we should lower the memcpy to loads and stores first.
3248 // For cases within the target-specified limits, this is the best choice.
3249 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3251 // Memcpy with size zero? Just return the original chain.
3252 if (ConstantSize->isNullValue())
3256 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3257 ConstantSize->getZExtValue(),
3258 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3259 if (Result.getNode())
3263 // Then check to see if we should lower the memcpy with target-specific
3264 // code. If the target chooses to do this, this is the next best.
3266 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3268 DstSV, DstSVOff, SrcSV, SrcSVOff);
3269 if (Result.getNode())
3272 // If we really need inline code and the target declined to provide it,
3273 // use a (potentially long) sequence of loads and stores.
3275 assert(ConstantSize && "AlwaysInline requires a constant size!");
3276 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3277 ConstantSize->getZExtValue(), Align, true,
3278 DstSV, DstSVOff, SrcSV, SrcSVOff);
3281 // Emit a library call.
3282 TargetLowering::ArgListTy Args;
3283 TargetLowering::ArgListEntry Entry;
3284 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3285 Entry.Node = Dst; Args.push_back(Entry);
3286 Entry.Node = Src; Args.push_back(Entry);
3287 Entry.Node = Size; Args.push_back(Entry);
3288 std::pair<SDValue,SDValue> CallResult =
3289 TLI.LowerCallTo(Chain, Type::VoidTy,
3290 false, false, false, false, CallingConv::C, false,
3291 getExternalSymbol("memcpy", TLI.getPointerTy()),
3293 return CallResult.second;
3296 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3297 SDValue Src, SDValue Size,
3299 const Value *DstSV, uint64_t DstSVOff,
3300 const Value *SrcSV, uint64_t SrcSVOff) {
3302 // Check to see if we should lower the memmove to loads and stores first.
3303 // For cases within the target-specified limits, this is the best choice.
3304 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3306 // Memmove with size zero? Just return the original chain.
3307 if (ConstantSize->isNullValue())
3311 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3312 ConstantSize->getZExtValue(),
3313 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3314 if (Result.getNode())
3318 // Then check to see if we should lower the memmove with target-specific
3319 // code. If the target chooses to do this, this is the next best.
3321 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3322 DstSV, DstSVOff, SrcSV, SrcSVOff);
3323 if (Result.getNode())
3326 // Emit a library call.
3327 TargetLowering::ArgListTy Args;
3328 TargetLowering::ArgListEntry Entry;
3329 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3330 Entry.Node = Dst; Args.push_back(Entry);
3331 Entry.Node = Src; Args.push_back(Entry);
3332 Entry.Node = Size; Args.push_back(Entry);
3333 std::pair<SDValue,SDValue> CallResult =
3334 TLI.LowerCallTo(Chain, Type::VoidTy,
3335 false, false, false, false, CallingConv::C, false,
3336 getExternalSymbol("memmove", TLI.getPointerTy()),
3338 return CallResult.second;
3341 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3342 SDValue Src, SDValue Size,
3344 const Value *DstSV, uint64_t DstSVOff) {
3346 // Check to see if we should lower the memset to stores first.
3347 // For cases within the target-specified limits, this is the best choice.
3348 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3350 // Memset with size zero? Just return the original chain.
3351 if (ConstantSize->isNullValue())
3355 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3356 Align, DstSV, DstSVOff);
3357 if (Result.getNode())
3361 // Then check to see if we should lower the memset with target-specific
3362 // code. If the target chooses to do this, this is the next best.
3364 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3366 if (Result.getNode())
3369 // Emit a library call.
3370 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3371 TargetLowering::ArgListTy Args;
3372 TargetLowering::ArgListEntry Entry;
3373 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3374 Args.push_back(Entry);
3375 // Extend or truncate the argument to be an i32 value for the call.
3376 if (Src.getValueType().bitsGT(MVT::i32))
3377 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3379 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3380 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3381 Args.push_back(Entry);
3382 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3383 Args.push_back(Entry);
3384 std::pair<SDValue,SDValue> CallResult =
3385 TLI.LowerCallTo(Chain, Type::VoidTy,
3386 false, false, false, false, CallingConv::C, false,
3387 getExternalSymbol("memset", TLI.getPointerTy()),
3389 return CallResult.second;
3392 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3394 SDValue Ptr, SDValue Cmp,
3395 SDValue Swp, const Value* PtrVal,
3396 unsigned Alignment) {
3397 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3398 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3400 MVT VT = Cmp.getValueType();
3402 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3403 Alignment = getMVTAlignment(MemVT);
3405 SDVTList VTs = getVTList(VT, MVT::Other);
3406 FoldingSetNodeID ID;
3407 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3408 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3411 return SDValue(E, 0);
3412 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3413 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3414 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3415 CSEMap.InsertNode(N, IP);
3416 AllNodes.push_back(N);
3417 return SDValue(N, 0);
3420 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3422 SDValue Ptr, SDValue Cmp,
3423 SDValue Swp, const Value* PtrVal,
3424 unsigned Alignment) {
3425 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3426 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3428 MVT VT = Cmp.getValueType();
3430 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3431 Alignment = getMVTAlignment(MemVT);
3433 SDVTList VTs = getVTList(VT, MVT::Other);
3434 FoldingSetNodeID ID;
3435 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3436 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3439 return SDValue(E, 0);
3440 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3441 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3442 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3443 CSEMap.InsertNode(N, IP);
3444 AllNodes.push_back(N);
3445 return SDValue(N, 0);
3448 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3450 SDValue Ptr, SDValue Val,
3451 const Value* PtrVal,
3452 unsigned Alignment) {
3453 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3454 Opcode == ISD::ATOMIC_LOAD_SUB ||
3455 Opcode == ISD::ATOMIC_LOAD_AND ||
3456 Opcode == ISD::ATOMIC_LOAD_OR ||
3457 Opcode == ISD::ATOMIC_LOAD_XOR ||
3458 Opcode == ISD::ATOMIC_LOAD_NAND ||
3459 Opcode == ISD::ATOMIC_LOAD_MIN ||
3460 Opcode == ISD::ATOMIC_LOAD_MAX ||
3461 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3462 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3463 Opcode == ISD::ATOMIC_SWAP) &&
3464 "Invalid Atomic Op");
3466 MVT VT = Val.getValueType();
3468 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3469 Alignment = getMVTAlignment(MemVT);
3471 SDVTList VTs = getVTList(VT, MVT::Other);
3472 FoldingSetNodeID ID;
3473 SDValue Ops[] = {Chain, Ptr, Val};
3474 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3476 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3477 return SDValue(E, 0);
3478 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3479 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3480 Chain, Ptr, Val, PtrVal, Alignment);
3481 CSEMap.InsertNode(N, IP);
3482 AllNodes.push_back(N);
3483 return SDValue(N, 0);
3486 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3488 SDValue Ptr, SDValue Val,
3489 const Value* PtrVal,
3490 unsigned Alignment) {
3491 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3492 Opcode == ISD::ATOMIC_LOAD_SUB ||
3493 Opcode == ISD::ATOMIC_LOAD_AND ||
3494 Opcode == ISD::ATOMIC_LOAD_OR ||
3495 Opcode == ISD::ATOMIC_LOAD_XOR ||
3496 Opcode == ISD::ATOMIC_LOAD_NAND ||
3497 Opcode == ISD::ATOMIC_LOAD_MIN ||
3498 Opcode == ISD::ATOMIC_LOAD_MAX ||
3499 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3500 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3501 Opcode == ISD::ATOMIC_SWAP) &&
3502 "Invalid Atomic Op");
3504 MVT VT = Val.getValueType();
3506 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3507 Alignment = getMVTAlignment(MemVT);
3509 SDVTList VTs = getVTList(VT, MVT::Other);
3510 FoldingSetNodeID ID;
3511 SDValue Ops[] = {Chain, Ptr, Val};
3512 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3514 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3515 return SDValue(E, 0);
3516 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3517 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3518 Chain, Ptr, Val, PtrVal, Alignment);
3519 CSEMap.InsertNode(N, IP);
3520 AllNodes.push_back(N);
3521 return SDValue(N, 0);
3524 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3525 /// Allowed to return something different (and simpler) if Simplify is true.
3526 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3530 SmallVector<MVT, 4> VTs;
3531 VTs.reserve(NumOps);
3532 for (unsigned i = 0; i < NumOps; ++i)
3533 VTs.push_back(Ops[i].getValueType());
3534 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3538 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3539 const MVT *VTs, unsigned NumVTs,
3540 const SDValue *Ops, unsigned NumOps,
3541 MVT MemVT, const Value *srcValue, int SVOff,
3542 unsigned Align, bool Vol,
3543 bool ReadMem, bool WriteMem) {
3544 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3545 MemVT, srcValue, SVOff, Align, Vol,
3550 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3551 const MVT *VTs, unsigned NumVTs,
3552 const SDValue *Ops, unsigned NumOps,
3553 MVT MemVT, const Value *srcValue, int SVOff,
3554 unsigned Align, bool Vol,
3555 bool ReadMem, bool WriteMem) {
3556 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3557 MemVT, srcValue, SVOff, Align, Vol,
3562 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3563 const SDValue *Ops, unsigned NumOps,
3564 MVT MemVT, const Value *srcValue, int SVOff,
3565 unsigned Align, bool Vol,
3566 bool ReadMem, bool WriteMem) {
3567 // Memoize the node unless it returns a flag.
3568 MemIntrinsicSDNode *N;
3569 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3570 FoldingSetNodeID ID;
3571 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3573 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3574 return SDValue(E, 0);
3576 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3577 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3578 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3579 CSEMap.InsertNode(N, IP);
3581 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3582 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3583 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3585 AllNodes.push_back(N);
3586 return SDValue(N, 0);
3590 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3591 const SDValue *Ops, unsigned NumOps,
3592 MVT MemVT, const Value *srcValue, int SVOff,
3593 unsigned Align, bool Vol,
3594 bool ReadMem, bool WriteMem) {
3595 // Memoize the node unless it returns a flag.
3596 MemIntrinsicSDNode *N;
3597 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3598 FoldingSetNodeID ID;
3599 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3601 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3602 return SDValue(E, 0);
3604 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3605 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3606 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3607 CSEMap.InsertNode(N, IP);
3609 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3610 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3611 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3613 AllNodes.push_back(N);
3614 return SDValue(N, 0);
3618 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3619 bool IsInreg, SDVTList VTs,
3620 const SDValue *Operands, unsigned NumOperands) {
3621 // Do not include isTailCall in the folding set profile.
3622 FoldingSetNodeID ID;
3623 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3624 ID.AddInteger(CallingConv);
3625 ID.AddInteger(IsVarArgs);
3627 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3628 // Instead of including isTailCall in the folding set, we just
3629 // set the flag of the existing node.
3631 cast<CallSDNode>(E)->setNotTailCall();
3632 return SDValue(E, 0);
3634 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3635 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3636 VTs, Operands, NumOperands);
3637 CSEMap.InsertNode(N, IP);
3638 AllNodes.push_back(N);
3639 return SDValue(N, 0);
3643 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3644 bool IsTailCall, bool IsInreg, SDVTList VTs,
3645 const SDValue *Operands, unsigned NumOperands) {
3646 // Do not include isTailCall in the folding set profile.
3647 FoldingSetNodeID ID;
3648 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3649 ID.AddInteger(CallingConv);
3650 ID.AddInteger(IsVarArgs);
3652 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3653 // Instead of including isTailCall in the folding set, we just
3654 // set the flag of the existing node.
3656 cast<CallSDNode>(E)->setNotTailCall();
3657 return SDValue(E, 0);
3659 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3660 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3661 VTs, Operands, NumOperands);
3662 CSEMap.InsertNode(N, IP);
3663 AllNodes.push_back(N);
3664 return SDValue(N, 0);
3668 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3669 MVT VT, SDValue Chain,
3670 SDValue Ptr, SDValue Offset,
3671 const Value *SV, int SVOffset, MVT EVT,
3672 bool isVolatile, unsigned Alignment) {
3673 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3674 Alignment = getMVTAlignment(VT);
3677 ExtType = ISD::NON_EXTLOAD;
3678 } else if (ExtType == ISD::NON_EXTLOAD) {
3679 assert(VT == EVT && "Non-extending load from different memory type!");
3683 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3684 "Invalid vector extload!");
3686 assert(EVT.bitsLT(VT) &&
3687 "Should only be an extending load, not truncating!");
3688 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3689 "Cannot sign/zero extend a FP/Vector load!");
3690 assert(VT.isInteger() == EVT.isInteger() &&
3691 "Cannot convert from FP to Int or Int -> FP!");
3694 bool Indexed = AM != ISD::UNINDEXED;
3695 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3696 "Unindexed load with an offset!");
3698 SDVTList VTs = Indexed ?
3699 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3700 SDValue Ops[] = { Chain, Ptr, Offset };
3701 FoldingSetNodeID ID;
3702 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3704 ID.AddInteger(ExtType);
3705 ID.AddInteger(EVT.getRawBits());
3706 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3708 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3709 return SDValue(E, 0);
3710 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3711 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3712 Alignment, isVolatile);
3713 CSEMap.InsertNode(N, IP);
3714 AllNodes.push_back(N);
3715 return SDValue(N, 0);
3719 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3720 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3721 SDValue Ptr, SDValue Offset,
3722 const Value *SV, int SVOffset, MVT EVT,
3723 bool isVolatile, unsigned Alignment) {
3724 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3725 Alignment = getMVTAlignment(VT);
3728 ExtType = ISD::NON_EXTLOAD;
3729 } else if (ExtType == ISD::NON_EXTLOAD) {
3730 assert(VT == EVT && "Non-extending load from different memory type!");
3734 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3735 "Invalid vector extload!");
3737 assert(EVT.bitsLT(VT) &&
3738 "Should only be an extending load, not truncating!");
3739 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3740 "Cannot sign/zero extend a FP/Vector load!");
3741 assert(VT.isInteger() == EVT.isInteger() &&
3742 "Cannot convert from FP to Int or Int -> FP!");
3745 bool Indexed = AM != ISD::UNINDEXED;
3746 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3747 "Unindexed load with an offset!");
3749 SDVTList VTs = Indexed ?
3750 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3751 SDValue Ops[] = { Chain, Ptr, Offset };
3752 FoldingSetNodeID ID;
3753 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3755 ID.AddInteger(ExtType);
3756 ID.AddInteger(EVT.getRawBits());
3757 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3759 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3760 return SDValue(E, 0);
3761 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3762 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3763 Alignment, isVolatile);
3764 CSEMap.InsertNode(N, IP);
3765 AllNodes.push_back(N);
3766 return SDValue(N, 0);
3769 SDValue SelectionDAG::getLoad(MVT VT,
3770 SDValue Chain, SDValue Ptr,
3771 const Value *SV, int SVOffset,
3772 bool isVolatile, unsigned Alignment) {
3773 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3774 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3775 SV, SVOffset, VT, isVolatile, Alignment);
3778 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3779 SDValue Chain, SDValue Ptr,
3780 const Value *SV, int SVOffset,
3781 bool isVolatile, unsigned Alignment) {
3782 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3783 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3784 SV, SVOffset, VT, isVolatile, Alignment);
3787 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3788 SDValue Chain, SDValue Ptr,
3790 int SVOffset, MVT EVT,
3791 bool isVolatile, unsigned Alignment) {
3792 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3793 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3794 SV, SVOffset, EVT, isVolatile, Alignment);
3797 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3798 SDValue Chain, SDValue Ptr,
3800 int SVOffset, MVT EVT,
3801 bool isVolatile, unsigned Alignment) {
3802 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3803 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3804 SV, SVOffset, EVT, isVolatile, Alignment);
3808 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3809 SDValue Offset, ISD::MemIndexedMode AM) {
3810 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3811 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3812 "Load is already a indexed load!");
3813 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3814 LD->getChain(), Base, Offset, LD->getSrcValue(),
3815 LD->getSrcValueOffset(), LD->getMemoryVT(),
3816 LD->isVolatile(), LD->getAlignment());
3820 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3821 SDValue Offset, ISD::MemIndexedMode AM) {
3822 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3823 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3824 "Load is already a indexed load!");
3825 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3826 LD->getChain(), Base, Offset, LD->getSrcValue(),
3827 LD->getSrcValueOffset(), LD->getMemoryVT(),
3828 LD->isVolatile(), LD->getAlignment());
3831 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3832 SDValue Ptr, const Value *SV, int SVOffset,
3833 bool isVolatile, unsigned Alignment) {
3834 MVT VT = Val.getValueType();
3836 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3837 Alignment = getMVTAlignment(VT);
3839 SDVTList VTs = getVTList(MVT::Other);
3840 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3841 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3842 FoldingSetNodeID ID;
3843 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3844 ID.AddInteger(ISD::UNINDEXED);
3845 ID.AddInteger(false);
3846 ID.AddInteger(VT.getRawBits());
3847 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3849 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3850 return SDValue(E, 0);
3851 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3852 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3853 VT, SV, SVOffset, Alignment, isVolatile);
3854 CSEMap.InsertNode(N, IP);
3855 AllNodes.push_back(N);
3856 return SDValue(N, 0);
3859 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3860 SDValue Ptr, const Value *SV, int SVOffset,
3861 bool isVolatile, unsigned Alignment) {
3862 MVT VT = Val.getValueType();
3864 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3865 Alignment = getMVTAlignment(VT);
3867 SDVTList VTs = getVTList(MVT::Other);
3868 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3869 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3870 FoldingSetNodeID ID;
3871 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3872 ID.AddInteger(ISD::UNINDEXED);
3873 ID.AddInteger(false);
3874 ID.AddInteger(VT.getRawBits());
3875 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3877 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3878 return SDValue(E, 0);
3879 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3880 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3881 VT, SV, SVOffset, Alignment, isVolatile);
3882 CSEMap.InsertNode(N, IP);
3883 AllNodes.push_back(N);
3884 return SDValue(N, 0);
3887 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3888 SDValue Ptr, const Value *SV,
3889 int SVOffset, MVT SVT,
3890 bool isVolatile, unsigned Alignment) {
3891 MVT VT = Val.getValueType();
3894 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3896 assert(VT.bitsGT(SVT) && "Not a truncation?");
3897 assert(VT.isInteger() == SVT.isInteger() &&
3898 "Can't do FP-INT conversion!");
3900 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3901 Alignment = getMVTAlignment(VT);
3903 SDVTList VTs = getVTList(MVT::Other);
3904 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3905 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3906 FoldingSetNodeID ID;
3907 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3908 ID.AddInteger(ISD::UNINDEXED);
3910 ID.AddInteger(SVT.getRawBits());
3911 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3913 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3914 return SDValue(E, 0);
3915 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3916 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3917 SVT, SV, SVOffset, Alignment, isVolatile);
3918 CSEMap.InsertNode(N, IP);
3919 AllNodes.push_back(N);
3920 return SDValue(N, 0);
3923 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3924 SDValue Ptr, const Value *SV,
3925 int SVOffset, MVT SVT,
3926 bool isVolatile, unsigned Alignment) {
3927 MVT VT = Val.getValueType();
3930 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3932 assert(VT.bitsGT(SVT) && "Not a truncation?");
3933 assert(VT.isInteger() == SVT.isInteger() &&
3934 "Can't do FP-INT conversion!");
3936 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3937 Alignment = getMVTAlignment(VT);
3939 SDVTList VTs = getVTList(MVT::Other);
3940 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3941 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3942 FoldingSetNodeID ID;
3943 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3944 ID.AddInteger(ISD::UNINDEXED);
3946 ID.AddInteger(SVT.getRawBits());
3947 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3950 return SDValue(E, 0);
3951 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3952 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3953 SVT, SV, SVOffset, Alignment, isVolatile);
3954 CSEMap.InsertNode(N, IP);
3955 AllNodes.push_back(N);
3956 return SDValue(N, 0);
3960 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3961 SDValue Offset, ISD::MemIndexedMode AM) {
3962 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3963 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3964 "Store is already a indexed store!");
3965 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3966 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3967 FoldingSetNodeID ID;
3968 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3970 ID.AddInteger(ST->isTruncatingStore());
3971 ID.AddInteger(ST->getMemoryVT().getRawBits());
3972 ID.AddInteger(ST->getRawFlags());
3974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3975 return SDValue(E, 0);
3976 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3977 new (N) StoreSDNode(Ops, VTs, AM,
3978 ST->isTruncatingStore(), ST->getMemoryVT(),
3979 ST->getSrcValue(), ST->getSrcValueOffset(),
3980 ST->getAlignment(), ST->isVolatile());
3981 CSEMap.InsertNode(N, IP);
3982 AllNodes.push_back(N);
3983 return SDValue(N, 0);
3987 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3988 SDValue Offset, ISD::MemIndexedMode AM) {
3989 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3990 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3991 "Store is already a indexed store!");
3992 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3993 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3994 FoldingSetNodeID ID;
3995 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3997 ID.AddInteger(ST->isTruncatingStore());
3998 ID.AddInteger(ST->getMemoryVT().getRawBits());
3999 ID.AddInteger(ST->getRawFlags());
4001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4002 return SDValue(E, 0);
4003 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4004 new (N) StoreSDNode(Ops, dl, VTs, AM,
4005 ST->isTruncatingStore(), ST->getMemoryVT(),
4006 ST->getSrcValue(), ST->getSrcValueOffset(),
4007 ST->getAlignment(), ST->isVolatile());
4008 CSEMap.InsertNode(N, IP);
4009 AllNodes.push_back(N);
4010 return SDValue(N, 0);
4013 SDValue SelectionDAG::getVAArg(MVT VT,
4014 SDValue Chain, SDValue Ptr,
4016 SDValue Ops[] = { Chain, Ptr, SV };
4017 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
4020 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4021 const SDUse *Ops, unsigned NumOps) {
4022 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4025 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4026 const SDUse *Ops, unsigned NumOps) {
4028 case 0: return getNode(Opcode, DL, VT);
4029 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4030 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4031 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4035 // Copy from an SDUse array into an SDValue array for use with
4036 // the regular getNode logic.
4037 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4038 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4041 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4042 const SDValue *Ops, unsigned NumOps) {
4043 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4046 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4047 const SDValue *Ops, unsigned NumOps) {
4049 case 0: return getNode(Opcode, DL, VT);
4050 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4051 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4052 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4058 case ISD::SELECT_CC: {
4059 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4060 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4061 "LHS and RHS of condition must have same type!");
4062 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4063 "True and False arms of SelectCC must have same type!");
4064 assert(Ops[2].getValueType() == VT &&
4065 "select_cc node must be of same type as true and false value!");
4069 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4070 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4071 "LHS/RHS of comparison should match types!");
4078 SDVTList VTs = getVTList(VT);
4080 if (VT != MVT::Flag) {
4081 FoldingSetNodeID ID;
4082 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4086 return SDValue(E, 0);
4088 N = NodeAllocator.Allocate<SDNode>();
4089 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4090 CSEMap.InsertNode(N, IP);
4092 N = NodeAllocator.Allocate<SDNode>();
4093 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4096 AllNodes.push_back(N);
4100 return SDValue(N, 0);
4103 SDValue SelectionDAG::getNode(unsigned Opcode,
4104 const std::vector<MVT> &ResultTys,
4105 const SDValue *Ops, unsigned NumOps) {
4106 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
4109 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4110 const std::vector<MVT> &ResultTys,
4111 const SDValue *Ops, unsigned NumOps) {
4112 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
4116 SDValue SelectionDAG::getNode(unsigned Opcode,
4117 const MVT *VTs, unsigned NumVTs,
4118 const SDValue *Ops, unsigned NumOps) {
4119 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
4122 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4123 const MVT *VTs, unsigned NumVTs,
4124 const SDValue *Ops, unsigned NumOps) {
4126 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4127 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4130 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4131 const SDValue *Ops, unsigned NumOps) {
4132 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
4135 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4136 const SDValue *Ops, unsigned NumOps) {
4137 if (VTList.NumVTs == 1)
4138 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4141 // FIXME: figure out how to safely handle things like
4142 // int foo(int x) { return 1 << (x & 255); }
4143 // int bar() { return foo(256); }
4145 case ISD::SRA_PARTS:
4146 case ISD::SRL_PARTS:
4147 case ISD::SHL_PARTS:
4148 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4149 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4150 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4151 else if (N3.getOpcode() == ISD::AND)
4152 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4153 // If the and is only masking out bits that cannot effect the shift,
4154 // eliminate the and.
4155 unsigned NumBits = VT.getSizeInBits()*2;
4156 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4157 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4163 // Memoize the node unless it returns a flag.
4165 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4166 FoldingSetNodeID ID;
4167 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4170 return SDValue(E, 0);
4172 N = NodeAllocator.Allocate<UnarySDNode>();
4173 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4174 } else if (NumOps == 2) {
4175 N = NodeAllocator.Allocate<BinarySDNode>();
4176 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4177 } else if (NumOps == 3) {
4178 N = NodeAllocator.Allocate<TernarySDNode>();
4179 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4181 N = NodeAllocator.Allocate<SDNode>();
4182 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4184 CSEMap.InsertNode(N, IP);
4187 N = NodeAllocator.Allocate<UnarySDNode>();
4188 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4189 } else if (NumOps == 2) {
4190 N = NodeAllocator.Allocate<BinarySDNode>();
4191 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4192 } else if (NumOps == 3) {
4193 N = NodeAllocator.Allocate<TernarySDNode>();
4194 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4196 N = NodeAllocator.Allocate<SDNode>();
4197 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4200 AllNodes.push_back(N);
4204 return SDValue(N, 0);
4207 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
4208 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList);
4211 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4212 return getNode(Opcode, DL, VTList, 0, 0);
4215 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4217 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1);
4220 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4222 SDValue Ops[] = { N1 };
4223 return getNode(Opcode, DL, VTList, Ops, 1);
4226 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4227 SDValue N1, SDValue N2) {
4228 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2);
4231 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4232 SDValue N1, SDValue N2) {
4233 SDValue Ops[] = { N1, N2 };
4234 return getNode(Opcode, DL, VTList, Ops, 2);
4237 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4238 SDValue N1, SDValue N2, SDValue N3) {
4239 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3);
4242 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4243 SDValue N1, SDValue N2, SDValue N3) {
4244 SDValue Ops[] = { N1, N2, N3 };
4245 return getNode(Opcode, DL, VTList, Ops, 3);
4248 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4249 SDValue N1, SDValue N2, SDValue N3,
4251 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4);
4254 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4255 SDValue N1, SDValue N2, SDValue N3,
4257 SDValue Ops[] = { N1, N2, N3, N4 };
4258 return getNode(Opcode, DL, VTList, Ops, 4);
4261 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4262 SDValue N1, SDValue N2, SDValue N3,
4263 SDValue N4, SDValue N5) {
4264 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5);
4267 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4268 SDValue N1, SDValue N2, SDValue N3,
4269 SDValue N4, SDValue N5) {
4270 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4271 return getNode(Opcode, DL, VTList, Ops, 5);
4274 SDVTList SelectionDAG::getVTList(MVT VT) {
4275 return makeVTList(SDNode::getValueTypeList(VT), 1);
4278 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4279 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4280 E = VTList.rend(); I != E; ++I)
4281 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4284 MVT *Array = Allocator.Allocate<MVT>(2);
4287 SDVTList Result = makeVTList(Array, 2);
4288 VTList.push_back(Result);
4292 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4293 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4294 E = VTList.rend(); I != E; ++I)
4295 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4299 MVT *Array = Allocator.Allocate<MVT>(3);
4303 SDVTList Result = makeVTList(Array, 3);
4304 VTList.push_back(Result);
4308 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4309 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4310 E = VTList.rend(); I != E; ++I)
4311 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4312 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4315 MVT *Array = Allocator.Allocate<MVT>(3);
4320 SDVTList Result = makeVTList(Array, 4);
4321 VTList.push_back(Result);
4325 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4327 case 0: assert(0 && "Cannot have nodes without results!");
4328 case 1: return getVTList(VTs[0]);
4329 case 2: return getVTList(VTs[0], VTs[1]);
4330 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4334 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4335 E = VTList.rend(); I != E; ++I) {
4336 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4339 bool NoMatch = false;
4340 for (unsigned i = 2; i != NumVTs; ++i)
4341 if (VTs[i] != I->VTs[i]) {
4349 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4350 std::copy(VTs, VTs+NumVTs, Array);
4351 SDVTList Result = makeVTList(Array, NumVTs);
4352 VTList.push_back(Result);
4357 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4358 /// specified operands. If the resultant node already exists in the DAG,
4359 /// this does not modify the specified node, instead it returns the node that
4360 /// already exists. If the resultant node does not exist in the DAG, the
4361 /// input node is returned. As a degenerate case, if you specify the same
4362 /// input operands as the node already has, the input node is returned.
4363 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4364 SDNode *N = InN.getNode();
4365 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4367 // Check to see if there is no change.
4368 if (Op == N->getOperand(0)) return InN;
4370 // See if the modified node already exists.
4371 void *InsertPos = 0;
4372 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4373 return SDValue(Existing, InN.getResNo());
4375 // Nope it doesn't. Remove the node from its current place in the maps.
4377 if (!RemoveNodeFromCSEMaps(N))
4380 // Now we update the operands.
4381 N->OperandList[0].set(Op);
4383 // If this gets put into a CSE map, add it.
4384 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4388 SDValue SelectionDAG::
4389 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4390 SDNode *N = InN.getNode();
4391 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4393 // Check to see if there is no change.
4394 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4395 return InN; // No operands changed, just return the input node.
4397 // See if the modified node already exists.
4398 void *InsertPos = 0;
4399 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4400 return SDValue(Existing, InN.getResNo());
4402 // Nope it doesn't. Remove the node from its current place in the maps.
4404 if (!RemoveNodeFromCSEMaps(N))
4407 // Now we update the operands.
4408 if (N->OperandList[0] != Op1)
4409 N->OperandList[0].set(Op1);
4410 if (N->OperandList[1] != Op2)
4411 N->OperandList[1].set(Op2);
4413 // If this gets put into a CSE map, add it.
4414 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4418 SDValue SelectionDAG::
4419 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4420 SDValue Ops[] = { Op1, Op2, Op3 };
4421 return UpdateNodeOperands(N, Ops, 3);
4424 SDValue SelectionDAG::
4425 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4426 SDValue Op3, SDValue Op4) {
4427 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4428 return UpdateNodeOperands(N, Ops, 4);
4431 SDValue SelectionDAG::
4432 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4433 SDValue Op3, SDValue Op4, SDValue Op5) {
4434 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4435 return UpdateNodeOperands(N, Ops, 5);
4438 SDValue SelectionDAG::
4439 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4440 SDNode *N = InN.getNode();
4441 assert(N->getNumOperands() == NumOps &&
4442 "Update with wrong number of operands");
4444 // Check to see if there is no change.
4445 bool AnyChange = false;
4446 for (unsigned i = 0; i != NumOps; ++i) {
4447 if (Ops[i] != N->getOperand(i)) {
4453 // No operands changed, just return the input node.
4454 if (!AnyChange) return InN;
4456 // See if the modified node already exists.
4457 void *InsertPos = 0;
4458 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4459 return SDValue(Existing, InN.getResNo());
4461 // Nope it doesn't. Remove the node from its current place in the maps.
4463 if (!RemoveNodeFromCSEMaps(N))
4466 // Now we update the operands.
4467 for (unsigned i = 0; i != NumOps; ++i)
4468 if (N->OperandList[i] != Ops[i])
4469 N->OperandList[i].set(Ops[i]);
4471 // If this gets put into a CSE map, add it.
4472 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4476 /// DropOperands - Release the operands and set this node to have
4478 void SDNode::DropOperands() {
4479 // Unlike the code in MorphNodeTo that does this, we don't need to
4480 // watch for dead nodes here.
4481 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4487 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4490 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4492 SDVTList VTs = getVTList(VT);
4493 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4496 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4497 MVT VT, SDValue Op1) {
4498 SDVTList VTs = getVTList(VT);
4499 SDValue Ops[] = { Op1 };
4500 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4503 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4504 MVT VT, SDValue Op1,
4506 SDVTList VTs = getVTList(VT);
4507 SDValue Ops[] = { Op1, Op2 };
4508 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4511 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4512 MVT VT, SDValue Op1,
4513 SDValue Op2, SDValue Op3) {
4514 SDVTList VTs = getVTList(VT);
4515 SDValue Ops[] = { Op1, Op2, Op3 };
4516 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4519 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4520 MVT VT, const SDValue *Ops,
4522 SDVTList VTs = getVTList(VT);
4523 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4526 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4527 MVT VT1, MVT VT2, const SDValue *Ops,
4529 SDVTList VTs = getVTList(VT1, VT2);
4530 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4533 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4535 SDVTList VTs = getVTList(VT1, VT2);
4536 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4539 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4540 MVT VT1, MVT VT2, MVT VT3,
4541 const SDValue *Ops, unsigned NumOps) {
4542 SDVTList VTs = getVTList(VT1, VT2, VT3);
4543 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4546 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4547 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4548 const SDValue *Ops, unsigned NumOps) {
4549 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4553 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4556 SDVTList VTs = getVTList(VT1, VT2);
4557 SDValue Ops[] = { Op1 };
4558 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4561 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4563 SDValue Op1, SDValue Op2) {
4564 SDVTList VTs = getVTList(VT1, VT2);
4565 SDValue Ops[] = { Op1, Op2 };
4566 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4569 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4571 SDValue Op1, SDValue Op2,
4573 SDVTList VTs = getVTList(VT1, VT2);
4574 SDValue Ops[] = { Op1, Op2, Op3 };
4575 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4578 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4579 MVT VT1, MVT VT2, MVT VT3,
4580 SDValue Op1, SDValue Op2,
4582 SDVTList VTs = getVTList(VT1, VT2, VT3);
4583 SDValue Ops[] = { Op1, Op2, Op3 };
4584 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4587 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4588 SDVTList VTs, const SDValue *Ops,
4590 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4593 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4595 SDVTList VTs = getVTList(VT);
4596 return MorphNodeTo(N, Opc, VTs, 0, 0);
4599 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4600 MVT VT, SDValue Op1) {
4601 SDVTList VTs = getVTList(VT);
4602 SDValue Ops[] = { Op1 };
4603 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4606 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4607 MVT VT, SDValue Op1,
4609 SDVTList VTs = getVTList(VT);
4610 SDValue Ops[] = { Op1, Op2 };
4611 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4614 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4615 MVT VT, SDValue Op1,
4616 SDValue Op2, SDValue Op3) {
4617 SDVTList VTs = getVTList(VT);
4618 SDValue Ops[] = { Op1, Op2, Op3 };
4619 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4622 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4623 MVT VT, const SDValue *Ops,
4625 SDVTList VTs = getVTList(VT);
4626 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4629 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4630 MVT VT1, MVT VT2, const SDValue *Ops,
4632 SDVTList VTs = getVTList(VT1, VT2);
4633 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4636 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4638 SDVTList VTs = getVTList(VT1, VT2);
4639 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4642 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4643 MVT VT1, MVT VT2, MVT VT3,
4644 const SDValue *Ops, unsigned NumOps) {
4645 SDVTList VTs = getVTList(VT1, VT2, VT3);
4646 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4649 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4652 SDVTList VTs = getVTList(VT1, VT2);
4653 SDValue Ops[] = { Op1 };
4654 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4657 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4659 SDValue Op1, SDValue Op2) {
4660 SDVTList VTs = getVTList(VT1, VT2);
4661 SDValue Ops[] = { Op1, Op2 };
4662 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4665 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4667 SDValue Op1, SDValue Op2,
4669 SDVTList VTs = getVTList(VT1, VT2);
4670 SDValue Ops[] = { Op1, Op2, Op3 };
4671 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4674 /// MorphNodeTo - These *mutate* the specified node to have the specified
4675 /// return type, opcode, and operands.
4677 /// Note that MorphNodeTo returns the resultant node. If there is already a
4678 /// node of the specified opcode and operands, it returns that node instead of
4679 /// the current one.
4681 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4682 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4683 /// node, and because it doesn't require CSE recalculation for any of
4684 /// the node's users.
4686 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4687 SDVTList VTs, const SDValue *Ops,
4689 // If an identical node already exists, use it.
4691 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4692 FoldingSetNodeID ID;
4693 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4694 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4698 if (!RemoveNodeFromCSEMaps(N))
4701 // Start the morphing.
4703 N->ValueList = VTs.VTs;
4704 N->NumValues = VTs.NumVTs;
4706 // Clear the operands list, updating used nodes to remove this from their
4707 // use list. Keep track of any operands that become dead as a result.
4708 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4709 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4711 SDNode *Used = Use.getNode();
4713 if (Used->use_empty())
4714 DeadNodeSet.insert(Used);
4717 // If NumOps is larger than the # of operands we currently have, reallocate
4718 // the operand list.
4719 if (NumOps > N->NumOperands) {
4720 if (N->OperandsNeedDelete)
4721 delete[] N->OperandList;
4723 if (N->isMachineOpcode()) {
4724 // We're creating a final node that will live unmorphed for the
4725 // remainder of the current SelectionDAG iteration, so we can allocate
4726 // the operands directly out of a pool with no recycling metadata.
4727 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4728 N->OperandsNeedDelete = false;
4730 N->OperandList = new SDUse[NumOps];
4731 N->OperandsNeedDelete = true;
4735 // Assign the new operands.
4736 N->NumOperands = NumOps;
4737 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4738 N->OperandList[i].setUser(N);
4739 N->OperandList[i].setInitial(Ops[i]);
4742 // Delete any nodes that are still dead after adding the uses for the
4744 SmallVector<SDNode *, 16> DeadNodes;
4745 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4746 E = DeadNodeSet.end(); I != E; ++I)
4747 if ((*I)->use_empty())
4748 DeadNodes.push_back(*I);
4749 RemoveDeadNodes(DeadNodes);
4752 CSEMap.InsertNode(N, IP); // Memoize the new node.
4757 /// getTargetNode - These are used for target selectors to create a new node
4758 /// with specified return type(s), target opcode, and operands.
4760 /// Note that getTargetNode returns the resultant node. If there is already a
4761 /// node of the specified opcode and operands, it returns that node instead of
4762 /// the current one.
4763 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4764 return getNode(~Opcode, VT).getNode();
4766 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4767 return getNode(~Opcode, dl, VT).getNode();
4770 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4771 return getNode(~Opcode, VT, Op1).getNode();
4773 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4775 return getNode(~Opcode, dl, VT, Op1).getNode();
4778 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4779 SDValue Op1, SDValue Op2) {
4780 return getNode(~Opcode, VT, Op1, Op2).getNode();
4782 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4783 SDValue Op1, SDValue Op2) {
4784 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4787 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4788 SDValue Op1, SDValue Op2,
4790 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4792 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4793 SDValue Op1, SDValue Op2,
4795 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4798 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4799 const SDValue *Ops, unsigned NumOps) {
4800 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4802 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4803 const SDValue *Ops, unsigned NumOps) {
4804 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4807 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4808 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4810 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4812 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4814 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4816 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4819 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4820 MVT VT2, SDValue Op1) {
4821 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4822 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4824 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4825 MVT VT2, SDValue Op1) {
4826 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4827 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4830 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4831 MVT VT2, SDValue Op1,
4833 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4834 SDValue Ops[] = { Op1, Op2 };
4835 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4837 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4838 MVT VT2, SDValue Op1,
4840 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4841 SDValue Ops[] = { Op1, Op2 };
4842 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4845 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4846 MVT VT2, SDValue Op1,
4847 SDValue Op2, SDValue Op3) {
4848 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4849 SDValue Ops[] = { Op1, Op2, Op3 };
4850 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4852 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4853 MVT VT2, SDValue Op1,
4854 SDValue Op2, SDValue Op3) {
4855 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4856 SDValue Ops[] = { Op1, Op2, Op3 };
4857 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4860 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4861 const SDValue *Ops, unsigned NumOps) {
4862 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4863 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4865 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4867 const SDValue *Ops, unsigned NumOps) {
4868 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4869 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4872 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4873 SDValue Op1, SDValue Op2) {
4874 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4875 SDValue Ops[] = { Op1, Op2 };
4876 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4878 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4879 MVT VT1, MVT VT2, MVT VT3,
4880 SDValue Op1, SDValue Op2) {
4881 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4882 SDValue Ops[] = { Op1, Op2 };
4883 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4886 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4887 SDValue Op1, SDValue Op2,
4889 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4890 SDValue Ops[] = { Op1, Op2, Op3 };
4891 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4893 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4894 MVT VT1, MVT VT2, MVT VT3,
4895 SDValue Op1, SDValue Op2,
4897 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4898 SDValue Ops[] = { Op1, Op2, Op3 };
4899 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4902 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4903 const SDValue *Ops, unsigned NumOps) {
4904 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4905 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4907 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4908 MVT VT1, MVT VT2, MVT VT3,
4909 const SDValue *Ops, unsigned NumOps) {
4910 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4911 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4914 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4915 MVT VT2, MVT VT3, MVT VT4,
4916 const SDValue *Ops, unsigned NumOps) {
4917 std::vector<MVT> VTList;
4918 VTList.push_back(VT1);
4919 VTList.push_back(VT2);
4920 VTList.push_back(VT3);
4921 VTList.push_back(VT4);
4922 const MVT *VTs = getNodeValueTypes(VTList);
4923 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4925 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4926 MVT VT2, MVT VT3, MVT VT4,
4927 const SDValue *Ops, unsigned NumOps) {
4928 std::vector<MVT> VTList;
4929 VTList.push_back(VT1);
4930 VTList.push_back(VT2);
4931 VTList.push_back(VT3);
4932 VTList.push_back(VT4);
4933 const MVT *VTs = getNodeValueTypes(VTList);
4934 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4937 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4938 const std::vector<MVT> &ResultTys,
4939 const SDValue *Ops, unsigned NumOps) {
4940 const MVT *VTs = getNodeValueTypes(ResultTys);
4941 return getNode(~Opcode, VTs, ResultTys.size(),
4942 Ops, NumOps).getNode();
4944 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4945 const std::vector<MVT> &ResultTys,
4946 const SDValue *Ops, unsigned NumOps) {
4947 const MVT *VTs = getNodeValueTypes(ResultTys);
4948 return getNode(~Opcode, dl, VTs, ResultTys.size(),
4949 Ops, NumOps).getNode();
4952 /// getNodeIfExists - Get the specified node if it's already available, or
4953 /// else return NULL.
4954 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4955 const SDValue *Ops, unsigned NumOps) {
4956 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4957 FoldingSetNodeID ID;
4958 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4966 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4967 /// This can cause recursive merging of nodes in the DAG.
4969 /// This version assumes From has a single result value.
4971 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4972 DAGUpdateListener *UpdateListener) {
4973 SDNode *From = FromN.getNode();
4974 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4975 "Cannot replace with this method!");
4976 assert(From != To.getNode() && "Cannot replace uses of with self");
4978 // Iterate over all the existing uses of From. New uses will be added
4979 // to the beginning of the use list, which we avoid visiting.
4980 // This specifically avoids visiting uses of From that arise while the
4981 // replacement is happening, because any such uses would be the result
4982 // of CSE: If an existing node looks like From after one of its operands
4983 // is replaced by To, we don't want to replace of all its users with To
4984 // too. See PR3018 for more info.
4985 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4989 // This node is about to morph, remove its old self from the CSE maps.
4990 RemoveNodeFromCSEMaps(User);
4992 // A user can appear in a use list multiple times, and when this
4993 // happens the uses are usually next to each other in the list.
4994 // To help reduce the number of CSE recomputations, process all
4995 // the uses of this user that we can find this way.
4997 SDUse &Use = UI.getUse();
5000 } while (UI != UE && *UI == User);
5002 // Now that we have modified User, add it back to the CSE maps. If it
5003 // already exists there, recursively merge the results together.
5004 AddModifiedNodeToCSEMaps(User, UpdateListener);
5008 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5009 /// This can cause recursive merging of nodes in the DAG.
5011 /// This version assumes From/To have matching types and numbers of result
5014 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5015 DAGUpdateListener *UpdateListener) {
5016 assert(From->getVTList().VTs == To->getVTList().VTs &&
5017 From->getNumValues() == To->getNumValues() &&
5018 "Cannot use this version of ReplaceAllUsesWith!");
5020 // Handle the trivial case.
5024 // Iterate over just the existing users of From. See the comments in
5025 // the ReplaceAllUsesWith above.
5026 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5030 // This node is about to morph, remove its old self from the CSE maps.
5031 RemoveNodeFromCSEMaps(User);
5033 // A user can appear in a use list multiple times, and when this
5034 // happens the uses are usually next to each other in the list.
5035 // To help reduce the number of CSE recomputations, process all
5036 // the uses of this user that we can find this way.
5038 SDUse &Use = UI.getUse();
5041 } while (UI != UE && *UI == User);
5043 // Now that we have modified User, add it back to the CSE maps. If it
5044 // already exists there, recursively merge the results together.
5045 AddModifiedNodeToCSEMaps(User, UpdateListener);
5049 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5050 /// This can cause recursive merging of nodes in the DAG.
5052 /// This version can replace From with any result values. To must match the
5053 /// number and types of values returned by From.
5054 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5056 DAGUpdateListener *UpdateListener) {
5057 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5058 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5060 // Iterate over just the existing users of From. See the comments in
5061 // the ReplaceAllUsesWith above.
5062 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5066 // This node is about to morph, remove its old self from the CSE maps.
5067 RemoveNodeFromCSEMaps(User);
5069 // A user can appear in a use list multiple times, and when this
5070 // happens the uses are usually next to each other in the list.
5071 // To help reduce the number of CSE recomputations, process all
5072 // the uses of this user that we can find this way.
5074 SDUse &Use = UI.getUse();
5075 const SDValue &ToOp = To[Use.getResNo()];
5078 } while (UI != UE && *UI == User);
5080 // Now that we have modified User, add it back to the CSE maps. If it
5081 // already exists there, recursively merge the results together.
5082 AddModifiedNodeToCSEMaps(User, UpdateListener);
5086 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5087 /// uses of other values produced by From.getNode() alone. The Deleted
5088 /// vector is handled the same way as for ReplaceAllUsesWith.
5089 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5090 DAGUpdateListener *UpdateListener){
5091 // Handle the really simple, really trivial case efficiently.
5092 if (From == To) return;
5094 // Handle the simple, trivial, case efficiently.
5095 if (From.getNode()->getNumValues() == 1) {
5096 ReplaceAllUsesWith(From, To, UpdateListener);
5100 // Iterate over just the existing users of From. See the comments in
5101 // the ReplaceAllUsesWith above.
5102 SDNode::use_iterator UI = From.getNode()->use_begin(),
5103 UE = From.getNode()->use_end();
5106 bool UserRemovedFromCSEMaps = false;
5108 // A user can appear in a use list multiple times, and when this
5109 // happens the uses are usually next to each other in the list.
5110 // To help reduce the number of CSE recomputations, process all
5111 // the uses of this user that we can find this way.
5113 SDUse &Use = UI.getUse();
5115 // Skip uses of different values from the same node.
5116 if (Use.getResNo() != From.getResNo()) {
5121 // If this node hasn't been modified yet, it's still in the CSE maps,
5122 // so remove its old self from the CSE maps.
5123 if (!UserRemovedFromCSEMaps) {
5124 RemoveNodeFromCSEMaps(User);
5125 UserRemovedFromCSEMaps = true;
5130 } while (UI != UE && *UI == User);
5132 // We are iterating over all uses of the From node, so if a use
5133 // doesn't use the specific value, no changes are made.
5134 if (!UserRemovedFromCSEMaps)
5137 // Now that we have modified User, add it back to the CSE maps. If it
5138 // already exists there, recursively merge the results together.
5139 AddModifiedNodeToCSEMaps(User, UpdateListener);
5144 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5145 /// to record information about a use.
5152 /// operator< - Sort Memos by User.
5153 bool operator<(const UseMemo &L, const UseMemo &R) {
5154 return (intptr_t)L.User < (intptr_t)R.User;
5158 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5159 /// uses of other values produced by From.getNode() alone. The same value
5160 /// may appear in both the From and To list. The Deleted vector is
5161 /// handled the same way as for ReplaceAllUsesWith.
5162 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5165 DAGUpdateListener *UpdateListener){
5166 // Handle the simple, trivial case efficiently.
5168 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5170 // Read up all the uses and make records of them. This helps
5171 // processing new uses that are introduced during the
5172 // replacement process.
5173 SmallVector<UseMemo, 4> Uses;
5174 for (unsigned i = 0; i != Num; ++i) {
5175 unsigned FromResNo = From[i].getResNo();
5176 SDNode *FromNode = From[i].getNode();
5177 for (SDNode::use_iterator UI = FromNode->use_begin(),
5178 E = FromNode->use_end(); UI != E; ++UI) {
5179 SDUse &Use = UI.getUse();
5180 if (Use.getResNo() == FromResNo) {
5181 UseMemo Memo = { *UI, i, &Use };
5182 Uses.push_back(Memo);
5187 // Sort the uses, so that all the uses from a given User are together.
5188 std::sort(Uses.begin(), Uses.end());
5190 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5191 UseIndex != UseIndexEnd; ) {
5192 // We know that this user uses some value of From. If it is the right
5193 // value, update it.
5194 SDNode *User = Uses[UseIndex].User;
5196 // This node is about to morph, remove its old self from the CSE maps.
5197 RemoveNodeFromCSEMaps(User);
5199 // The Uses array is sorted, so all the uses for a given User
5200 // are next to each other in the list.
5201 // To help reduce the number of CSE recomputations, process all
5202 // the uses of this user that we can find this way.
5204 unsigned i = Uses[UseIndex].Index;
5205 SDUse &Use = *Uses[UseIndex].Use;
5209 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5211 // Now that we have modified User, add it back to the CSE maps. If it
5212 // already exists there, recursively merge the results together.
5213 AddModifiedNodeToCSEMaps(User, UpdateListener);
5217 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5218 /// based on their topological order. It returns the maximum id and a vector
5219 /// of the SDNodes* in assigned order by reference.
5220 unsigned SelectionDAG::AssignTopologicalOrder() {
5222 unsigned DAGSize = 0;
5224 // SortedPos tracks the progress of the algorithm. Nodes before it are
5225 // sorted, nodes after it are unsorted. When the algorithm completes
5226 // it is at the end of the list.
5227 allnodes_iterator SortedPos = allnodes_begin();
5229 // Visit all the nodes. Move nodes with no operands to the front of
5230 // the list immediately. Annotate nodes that do have operands with their
5231 // operand count. Before we do this, the Node Id fields of the nodes
5232 // may contain arbitrary values. After, the Node Id fields for nodes
5233 // before SortedPos will contain the topological sort index, and the
5234 // Node Id fields for nodes At SortedPos and after will contain the
5235 // count of outstanding operands.
5236 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5238 unsigned Degree = N->getNumOperands();
5240 // A node with no uses, add it to the result array immediately.
5241 N->setNodeId(DAGSize++);
5242 allnodes_iterator Q = N;
5244 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5247 // Temporarily use the Node Id as scratch space for the degree count.
5248 N->setNodeId(Degree);
5252 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5253 // such that by the time the end is reached all nodes will be sorted.
5254 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5256 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5259 unsigned Degree = P->getNodeId();
5262 // All of P's operands are sorted, so P may sorted now.
5263 P->setNodeId(DAGSize++);
5265 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5268 // Update P's outstanding operand count.
5269 P->setNodeId(Degree);
5274 assert(SortedPos == AllNodes.end() &&
5275 "Topological sort incomplete!");
5276 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5277 "First node in topological sort is not the entry token!");
5278 assert(AllNodes.front().getNodeId() == 0 &&
5279 "First node in topological sort has non-zero id!");
5280 assert(AllNodes.front().getNumOperands() == 0 &&
5281 "First node in topological sort has operands!");
5282 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5283 "Last node in topologic sort has unexpected id!");
5284 assert(AllNodes.back().use_empty() &&
5285 "Last node in topologic sort has users!");
5286 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5292 //===----------------------------------------------------------------------===//
5294 //===----------------------------------------------------------------------===//
5296 HandleSDNode::~HandleSDNode() {
5300 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
5302 : SDNode(isa<GlobalVariable>(GA) &&
5303 cast<GlobalVariable>(GA)->isThreadLocal() ?
5305 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
5307 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
5308 getSDVTList(VT)), Offset(o) {
5309 TheGlobal = const_cast<GlobalValue*>(GA);
5312 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
5313 const Value *srcValue, int SVO,
5314 unsigned alignment, bool vol)
5315 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5316 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5318 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5319 assert(getAlignment() == alignment && "Alignment representation error!");
5320 assert(isVolatile() == vol && "Volatile representation error!");
5323 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
5324 unsigned NumOps, MVT memvt, const Value *srcValue,
5325 int SVO, unsigned alignment, bool vol)
5326 : SDNode(Opc, VTs, Ops, NumOps),
5327 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5328 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5329 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5330 assert(getAlignment() == alignment && "Alignment representation error!");
5331 assert(isVolatile() == vol && "Volatile representation error!");
5334 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
5335 const Value *srcValue, int SVO,
5336 unsigned alignment, bool vol)
5337 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5338 Flags(encodeMemSDNodeFlags(vol, alignment)) {
5340 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5341 assert(getAlignment() == alignment && "Alignment representation error!");
5342 assert(isVolatile() == vol && "Volatile representation error!");
5345 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5347 unsigned NumOps, MVT memvt, const Value *srcValue,
5348 int SVO, unsigned alignment, bool vol)
5349 : SDNode(Opc, dl, VTs, Ops, NumOps),
5350 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
5351 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
5352 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5353 assert(getAlignment() == alignment && "Alignment representation error!");
5354 assert(isVolatile() == vol && "Volatile representation error!");
5357 /// getMemOperand - Return a MachineMemOperand object describing the memory
5358 /// reference performed by this memory reference.
5359 MachineMemOperand MemSDNode::getMemOperand() const {
5361 if (isa<LoadSDNode>(this))
5362 Flags = MachineMemOperand::MOLoad;
5363 else if (isa<StoreSDNode>(this))
5364 Flags = MachineMemOperand::MOStore;
5365 else if (isa<AtomicSDNode>(this)) {
5366 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5369 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5370 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5371 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5372 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5375 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5376 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5378 // Check if the memory reference references a frame index
5379 const FrameIndexSDNode *FI =
5380 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5381 if (!getSrcValue() && FI)
5382 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5383 Flags, 0, Size, getAlignment());
5385 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5386 Size, getAlignment());
5389 /// Profile - Gather unique data for the node.
5391 void SDNode::Profile(FoldingSetNodeID &ID) const {
5392 AddNodeIDNode(ID, this);
5395 /// getValueTypeList - Return a pointer to the specified value type.
5397 const MVT *SDNode::getValueTypeList(MVT VT) {
5398 if (VT.isExtended()) {
5399 static std::set<MVT, MVT::compareRawBits> EVTs;
5400 return &(*EVTs.insert(VT).first);
5402 static MVT VTs[MVT::LAST_VALUETYPE];
5403 VTs[VT.getSimpleVT()] = VT;
5404 return &VTs[VT.getSimpleVT()];
5408 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5409 /// indicated value. This method ignores uses of other values defined by this
5411 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5412 assert(Value < getNumValues() && "Bad value!");
5414 // TODO: Only iterate over uses of a given value of the node
5415 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5416 if (UI.getUse().getResNo() == Value) {
5423 // Found exactly the right number of uses?
5428 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5429 /// value. This method ignores uses of other values defined by this operation.
5430 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5431 assert(Value < getNumValues() && "Bad value!");
5433 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5434 if (UI.getUse().getResNo() == Value)
5441 /// isOnlyUserOf - Return true if this node is the only use of N.
5443 bool SDNode::isOnlyUserOf(SDNode *N) const {
5445 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5456 /// isOperand - Return true if this node is an operand of N.
5458 bool SDValue::isOperandOf(SDNode *N) const {
5459 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5460 if (*this == N->getOperand(i))
5465 bool SDNode::isOperandOf(SDNode *N) const {
5466 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5467 if (this == N->OperandList[i].getNode())
5472 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5473 /// be a chain) reaches the specified operand without crossing any
5474 /// side-effecting instructions. In practice, this looks through token
5475 /// factors and non-volatile loads. In order to remain efficient, this only
5476 /// looks a couple of nodes in, it does not do an exhaustive search.
5477 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5478 unsigned Depth) const {
5479 if (*this == Dest) return true;
5481 // Don't search too deeply, we just want to be able to see through
5482 // TokenFactor's etc.
5483 if (Depth == 0) return false;
5485 // If this is a token factor, all inputs to the TF happen in parallel. If any
5486 // of the operands of the TF reach dest, then we can do the xform.
5487 if (getOpcode() == ISD::TokenFactor) {
5488 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5489 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5494 // Loads don't have side effects, look through them.
5495 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5496 if (!Ld->isVolatile())
5497 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5503 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5504 SmallPtrSet<SDNode *, 32> &Visited) {
5505 if (found || !Visited.insert(N))
5508 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5509 SDNode *Op = N->getOperand(i).getNode();
5514 findPredecessor(Op, P, found, Visited);
5518 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5519 /// is either an operand of N or it can be reached by recursively traversing
5520 /// up the operands.
5521 /// NOTE: this is an expensive method. Use it carefully.
5522 bool SDNode::isPredecessorOf(SDNode *N) const {
5523 SmallPtrSet<SDNode *, 32> Visited;
5525 findPredecessor(N, this, found, Visited);
5529 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5530 assert(Num < NumOperands && "Invalid child # of SDNode!");
5531 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5534 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5535 switch (getOpcode()) {
5537 if (getOpcode() < ISD::BUILTIN_OP_END)
5538 return "<<Unknown DAG Node>>";
5539 if (isMachineOpcode()) {
5541 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5542 if (getMachineOpcode() < TII->getNumOpcodes())
5543 return TII->get(getMachineOpcode()).getName();
5544 return "<<Unknown Machine Node>>";
5547 const TargetLowering &TLI = G->getTargetLoweringInfo();
5548 const char *Name = TLI.getTargetNodeName(getOpcode());
5549 if (Name) return Name;
5550 return "<<Unknown Target Node>>";
5552 return "<<Unknown Node>>";
5555 case ISD::DELETED_NODE:
5556 return "<<Deleted Node!>>";
5558 case ISD::PREFETCH: return "Prefetch";
5559 case ISD::MEMBARRIER: return "MemBarrier";
5560 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5561 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5562 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5563 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5564 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5565 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5566 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5567 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5568 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5569 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5570 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5571 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5572 case ISD::PCMARKER: return "PCMarker";
5573 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5574 case ISD::SRCVALUE: return "SrcValue";
5575 case ISD::MEMOPERAND: return "MemOperand";
5576 case ISD::EntryToken: return "EntryToken";
5577 case ISD::TokenFactor: return "TokenFactor";
5578 case ISD::AssertSext: return "AssertSext";
5579 case ISD::AssertZext: return "AssertZext";
5581 case ISD::BasicBlock: return "BasicBlock";
5582 case ISD::ARG_FLAGS: return "ArgFlags";
5583 case ISD::VALUETYPE: return "ValueType";
5584 case ISD::Register: return "Register";
5586 case ISD::Constant: return "Constant";
5587 case ISD::ConstantFP: return "ConstantFP";
5588 case ISD::GlobalAddress: return "GlobalAddress";
5589 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5590 case ISD::FrameIndex: return "FrameIndex";
5591 case ISD::JumpTable: return "JumpTable";
5592 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5593 case ISD::RETURNADDR: return "RETURNADDR";
5594 case ISD::FRAMEADDR: return "FRAMEADDR";
5595 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5596 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5597 case ISD::EHSELECTION: return "EHSELECTION";
5598 case ISD::EH_RETURN: return "EH_RETURN";
5599 case ISD::ConstantPool: return "ConstantPool";
5600 case ISD::ExternalSymbol: return "ExternalSymbol";
5601 case ISD::INTRINSIC_WO_CHAIN: {
5602 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5603 return Intrinsic::getName((Intrinsic::ID)IID);
5605 case ISD::INTRINSIC_VOID:
5606 case ISD::INTRINSIC_W_CHAIN: {
5607 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5608 return Intrinsic::getName((Intrinsic::ID)IID);
5611 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5612 case ISD::TargetConstant: return "TargetConstant";
5613 case ISD::TargetConstantFP:return "TargetConstantFP";
5614 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5615 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5616 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5617 case ISD::TargetJumpTable: return "TargetJumpTable";
5618 case ISD::TargetConstantPool: return "TargetConstantPool";
5619 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5621 case ISD::CopyToReg: return "CopyToReg";
5622 case ISD::CopyFromReg: return "CopyFromReg";
5623 case ISD::UNDEF: return "undef";
5624 case ISD::MERGE_VALUES: return "merge_values";
5625 case ISD::INLINEASM: return "inlineasm";
5626 case ISD::DBG_LABEL: return "dbg_label";
5627 case ISD::EH_LABEL: return "eh_label";
5628 case ISD::DECLARE: return "declare";
5629 case ISD::HANDLENODE: return "handlenode";
5630 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5631 case ISD::CALL: return "call";
5634 case ISD::FABS: return "fabs";
5635 case ISD::FNEG: return "fneg";
5636 case ISD::FSQRT: return "fsqrt";
5637 case ISD::FSIN: return "fsin";
5638 case ISD::FCOS: return "fcos";
5639 case ISD::FPOWI: return "fpowi";
5640 case ISD::FPOW: return "fpow";
5641 case ISD::FTRUNC: return "ftrunc";
5642 case ISD::FFLOOR: return "ffloor";
5643 case ISD::FCEIL: return "fceil";
5644 case ISD::FRINT: return "frint";
5645 case ISD::FNEARBYINT: return "fnearbyint";
5648 case ISD::ADD: return "add";
5649 case ISD::SUB: return "sub";
5650 case ISD::MUL: return "mul";
5651 case ISD::MULHU: return "mulhu";
5652 case ISD::MULHS: return "mulhs";
5653 case ISD::SDIV: return "sdiv";
5654 case ISD::UDIV: return "udiv";
5655 case ISD::SREM: return "srem";
5656 case ISD::UREM: return "urem";
5657 case ISD::SMUL_LOHI: return "smul_lohi";
5658 case ISD::UMUL_LOHI: return "umul_lohi";
5659 case ISD::SDIVREM: return "sdivrem";
5660 case ISD::UDIVREM: return "udivrem";
5661 case ISD::AND: return "and";
5662 case ISD::OR: return "or";
5663 case ISD::XOR: return "xor";
5664 case ISD::SHL: return "shl";
5665 case ISD::SRA: return "sra";
5666 case ISD::SRL: return "srl";
5667 case ISD::ROTL: return "rotl";
5668 case ISD::ROTR: return "rotr";
5669 case ISD::FADD: return "fadd";
5670 case ISD::FSUB: return "fsub";
5671 case ISD::FMUL: return "fmul";
5672 case ISD::FDIV: return "fdiv";
5673 case ISD::FREM: return "frem";
5674 case ISD::FCOPYSIGN: return "fcopysign";
5675 case ISD::FGETSIGN: return "fgetsign";
5677 case ISD::SETCC: return "setcc";
5678 case ISD::VSETCC: return "vsetcc";
5679 case ISD::SELECT: return "select";
5680 case ISD::SELECT_CC: return "select_cc";
5681 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5682 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5683 case ISD::CONCAT_VECTORS: return "concat_vectors";
5684 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5685 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5686 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5687 case ISD::CARRY_FALSE: return "carry_false";
5688 case ISD::ADDC: return "addc";
5689 case ISD::ADDE: return "adde";
5690 case ISD::SADDO: return "saddo";
5691 case ISD::UADDO: return "uaddo";
5692 case ISD::SSUBO: return "ssubo";
5693 case ISD::USUBO: return "usubo";
5694 case ISD::SMULO: return "smulo";
5695 case ISD::UMULO: return "umulo";
5696 case ISD::SUBC: return "subc";
5697 case ISD::SUBE: return "sube";
5698 case ISD::SHL_PARTS: return "shl_parts";
5699 case ISD::SRA_PARTS: return "sra_parts";
5700 case ISD::SRL_PARTS: return "srl_parts";
5702 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5703 case ISD::INSERT_SUBREG: return "insert_subreg";
5705 // Conversion operators.
5706 case ISD::SIGN_EXTEND: return "sign_extend";
5707 case ISD::ZERO_EXTEND: return "zero_extend";
5708 case ISD::ANY_EXTEND: return "any_extend";
5709 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5710 case ISD::TRUNCATE: return "truncate";
5711 case ISD::FP_ROUND: return "fp_round";
5712 case ISD::FLT_ROUNDS_: return "flt_rounds";
5713 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5714 case ISD::FP_EXTEND: return "fp_extend";
5716 case ISD::SINT_TO_FP: return "sint_to_fp";
5717 case ISD::UINT_TO_FP: return "uint_to_fp";
5718 case ISD::FP_TO_SINT: return "fp_to_sint";
5719 case ISD::FP_TO_UINT: return "fp_to_uint";
5720 case ISD::BIT_CONVERT: return "bit_convert";
5722 case ISD::CONVERT_RNDSAT: {
5723 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5724 default: assert(0 && "Unknown cvt code!");
5725 case ISD::CVT_FF: return "cvt_ff";
5726 case ISD::CVT_FS: return "cvt_fs";
5727 case ISD::CVT_FU: return "cvt_fu";
5728 case ISD::CVT_SF: return "cvt_sf";
5729 case ISD::CVT_UF: return "cvt_uf";
5730 case ISD::CVT_SS: return "cvt_ss";
5731 case ISD::CVT_SU: return "cvt_su";
5732 case ISD::CVT_US: return "cvt_us";
5733 case ISD::CVT_UU: return "cvt_uu";
5737 // Control flow instructions
5738 case ISD::BR: return "br";
5739 case ISD::BRIND: return "brind";
5740 case ISD::BR_JT: return "br_jt";
5741 case ISD::BRCOND: return "brcond";
5742 case ISD::BR_CC: return "br_cc";
5743 case ISD::RET: return "ret";
5744 case ISD::CALLSEQ_START: return "callseq_start";
5745 case ISD::CALLSEQ_END: return "callseq_end";
5748 case ISD::LOAD: return "load";
5749 case ISD::STORE: return "store";
5750 case ISD::VAARG: return "vaarg";
5751 case ISD::VACOPY: return "vacopy";
5752 case ISD::VAEND: return "vaend";
5753 case ISD::VASTART: return "vastart";
5754 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5755 case ISD::EXTRACT_ELEMENT: return "extract_element";
5756 case ISD::BUILD_PAIR: return "build_pair";
5757 case ISD::STACKSAVE: return "stacksave";
5758 case ISD::STACKRESTORE: return "stackrestore";
5759 case ISD::TRAP: return "trap";
5762 case ISD::BSWAP: return "bswap";
5763 case ISD::CTPOP: return "ctpop";
5764 case ISD::CTTZ: return "cttz";
5765 case ISD::CTLZ: return "ctlz";
5768 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5769 case ISD::DEBUG_LOC: return "debug_loc";
5772 case ISD::TRAMPOLINE: return "trampoline";
5775 switch (cast<CondCodeSDNode>(this)->get()) {
5776 default: assert(0 && "Unknown setcc condition!");
5777 case ISD::SETOEQ: return "setoeq";
5778 case ISD::SETOGT: return "setogt";
5779 case ISD::SETOGE: return "setoge";
5780 case ISD::SETOLT: return "setolt";
5781 case ISD::SETOLE: return "setole";
5782 case ISD::SETONE: return "setone";
5784 case ISD::SETO: return "seto";
5785 case ISD::SETUO: return "setuo";
5786 case ISD::SETUEQ: return "setue";
5787 case ISD::SETUGT: return "setugt";
5788 case ISD::SETUGE: return "setuge";
5789 case ISD::SETULT: return "setult";
5790 case ISD::SETULE: return "setule";
5791 case ISD::SETUNE: return "setune";
5793 case ISD::SETEQ: return "seteq";
5794 case ISD::SETGT: return "setgt";
5795 case ISD::SETGE: return "setge";
5796 case ISD::SETLT: return "setlt";
5797 case ISD::SETLE: return "setle";
5798 case ISD::SETNE: return "setne";
5803 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5812 return "<post-inc>";
5814 return "<post-dec>";
5818 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5819 std::string S = "< ";
5833 if (getByValAlign())
5834 S += "byval-align:" + utostr(getByValAlign()) + " ";
5836 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5838 S += "byval-size:" + utostr(getByValSize()) + " ";
5842 void SDNode::dump() const { dump(0); }
5843 void SDNode::dump(const SelectionDAG *G) const {
5848 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5849 OS << (void*)this << ": ";
5851 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5853 if (getValueType(i) == MVT::Other)
5856 OS << getValueType(i).getMVTString();
5858 OS << " = " << getOperationName(G);
5861 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5863 OS << (void*)getOperand(i).getNode();
5864 if (unsigned RN = getOperand(i).getResNo())
5868 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5869 SDNode *Mask = getOperand(2).getNode();
5871 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5873 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5876 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5881 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5882 OS << '<' << CSDN->getAPIntValue() << '>';
5883 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5884 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5885 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5886 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5887 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5890 CSDN->getValueAPF().bitcastToAPInt().dump();
5893 } else if (const GlobalAddressSDNode *GADN =
5894 dyn_cast<GlobalAddressSDNode>(this)) {
5895 int64_t offset = GADN->getOffset();
5897 WriteAsOperand(OS, GADN->getGlobal());
5900 OS << " + " << offset;
5902 OS << " " << offset;
5903 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5904 OS << "<" << FIDN->getIndex() << ">";
5905 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5906 OS << "<" << JTDN->getIndex() << ">";
5907 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5908 int offset = CP->getOffset();
5909 if (CP->isMachineConstantPoolEntry())
5910 OS << "<" << *CP->getMachineCPVal() << ">";
5912 OS << "<" << *CP->getConstVal() << ">";
5914 OS << " + " << offset;
5916 OS << " " << offset;
5917 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5919 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5921 OS << LBB->getName() << " ";
5922 OS << (const void*)BBDN->getBasicBlock() << ">";
5923 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5924 if (G && R->getReg() &&
5925 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5926 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5928 OS << " #" << R->getReg();
5930 } else if (const ExternalSymbolSDNode *ES =
5931 dyn_cast<ExternalSymbolSDNode>(this)) {
5932 OS << "'" << ES->getSymbol() << "'";
5933 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5935 OS << "<" << M->getValue() << ">";
5938 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5939 if (M->MO.getValue())
5940 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5942 OS << "<null:" << M->MO.getOffset() << ">";
5943 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5944 OS << N->getArgFlags().getArgFlagsString();
5945 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5946 OS << ":" << N->getVT().getMVTString();
5948 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5949 const Value *SrcValue = LD->getSrcValue();
5950 int SrcOffset = LD->getSrcValueOffset();
5956 OS << ":" << SrcOffset << ">";
5959 switch (LD->getExtensionType()) {
5960 default: doExt = false; break;
5961 case ISD::EXTLOAD: OS << " <anyext "; break;
5962 case ISD::SEXTLOAD: OS << " <sext "; break;
5963 case ISD::ZEXTLOAD: OS << " <zext "; break;
5966 OS << LD->getMemoryVT().getMVTString() << ">";
5968 const char *AM = getIndexedModeName(LD->getAddressingMode());
5971 if (LD->isVolatile())
5972 OS << " <volatile>";
5973 OS << " alignment=" << LD->getAlignment();
5974 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5975 const Value *SrcValue = ST->getSrcValue();
5976 int SrcOffset = ST->getSrcValueOffset();
5982 OS << ":" << SrcOffset << ">";
5984 if (ST->isTruncatingStore())
5985 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5987 const char *AM = getIndexedModeName(ST->getAddressingMode());
5990 if (ST->isVolatile())
5991 OS << " <volatile>";
5992 OS << " alignment=" << ST->getAlignment();
5993 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5994 const Value *SrcValue = AT->getSrcValue();
5995 int SrcOffset = AT->getSrcValueOffset();
6001 OS << ":" << SrcOffset << ">";
6002 if (AT->isVolatile())
6003 OS << " <volatile>";
6004 OS << " alignment=" << AT->getAlignment();
6008 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6009 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6010 if (N->getOperand(i).getNode()->hasOneUse())
6011 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6013 cerr << "\n" << std::string(indent+2, ' ')
6014 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6017 cerr << "\n" << std::string(indent, ' ');
6021 void SelectionDAG::dump() const {
6022 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
6024 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6026 const SDNode *N = I;
6027 if (!N->hasOneUse() && N != getRoot().getNode())
6028 DumpNodes(N, 2, this);
6031 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6036 const Type *ConstantPoolSDNode::getType() const {
6037 if (isMachineConstantPoolEntry())
6038 return Val.MachineCPVal->getType();
6039 return Val.ConstVal->getType();