1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
200 /// all ConstantFPSDNode or undef.
201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
205 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
206 SDValue Op = N->getOperand(i);
207 if (Op.getOpcode() == ISD::UNDEF)
209 if (!isa<ConstantFPSDNode>(Op))
215 /// isScalarToVector - Return true if the specified node is a
216 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
217 /// element is not an undef.
218 bool ISD::isScalarToVector(const SDNode *N) {
219 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
222 if (N->getOpcode() != ISD::BUILD_VECTOR)
224 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
226 unsigned NumElems = N->getNumOperands();
229 for (unsigned i = 1; i < NumElems; ++i) {
230 SDValue V = N->getOperand(i);
231 if (V.getOpcode() != ISD::UNDEF)
237 /// allOperandsUndef - Return true if the node has at least one operand
238 /// and all operands of the specified node are ISD::UNDEF.
239 bool ISD::allOperandsUndef(const SDNode *N) {
240 // Return false if the node has no operands.
241 // This is "logically inconsistent" with the definition of "all" but
242 // is probably the desired behavior.
243 if (N->getNumOperands() == 0)
246 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
247 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
253 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
256 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
258 return ISD::SIGN_EXTEND;
260 return ISD::ZERO_EXTEND;
265 llvm_unreachable("Invalid LoadExtType");
268 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
269 /// when given the operation for (X op Y).
270 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
271 // To perform this operation, we just need to swap the L and G bits of the
273 unsigned OldL = (Operation >> 2) & 1;
274 unsigned OldG = (Operation >> 1) & 1;
275 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
276 (OldL << 1) | // New G bit
277 (OldG << 2)); // New L bit.
280 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
281 /// 'op' is a valid SetCC operation.
282 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
283 unsigned Operation = Op;
285 Operation ^= 7; // Flip L, G, E bits, but not U.
287 Operation ^= 15; // Flip all of the condition bits.
289 if (Operation > ISD::SETTRUE2)
290 Operation &= ~8; // Don't let N and U bits get set.
292 return ISD::CondCode(Operation);
296 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
297 /// signed operation and 2 if the result is an unsigned comparison. Return zero
298 /// if the operation does not depend on the sign of the input (setne and seteq).
299 static int isSignedOp(ISD::CondCode Opcode) {
301 default: llvm_unreachable("Illegal integer setcc operation!");
303 case ISD::SETNE: return 0;
307 case ISD::SETGE: return 1;
311 case ISD::SETUGE: return 2;
315 /// getSetCCOrOperation - Return the result of a logical OR between different
316 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
317 /// returns SETCC_INVALID if it is not possible to represent the resultant
319 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
321 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
322 // Cannot fold a signed integer setcc with an unsigned integer setcc.
323 return ISD::SETCC_INVALID;
325 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
327 // If the N and U bits get set then the resultant comparison DOES suddenly
328 // care about orderedness, and is true when ordered.
329 if (Op > ISD::SETTRUE2)
330 Op &= ~16; // Clear the U bit if the N bit is set.
332 // Canonicalize illegal integer setcc's.
333 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
336 return ISD::CondCode(Op);
339 /// getSetCCAndOperation - Return the result of a logical AND between different
340 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
341 /// function returns zero if it is not possible to represent the resultant
343 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
345 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
346 // Cannot fold a signed setcc with an unsigned setcc.
347 return ISD::SETCC_INVALID;
349 // Combine all of the condition bits.
350 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
352 // Canonicalize illegal integer setcc's.
356 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
357 case ISD::SETOEQ: // SETEQ & SETU[LG]E
358 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
359 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
360 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
367 //===----------------------------------------------------------------------===//
368 // SDNode Profile Support
369 //===----------------------------------------------------------------------===//
371 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
373 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
377 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
378 /// solely with their pointer.
379 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
380 ID.AddPointer(VTList.VTs);
383 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
385 static void AddNodeIDOperands(FoldingSetNodeID &ID,
386 ArrayRef<SDValue> Ops) {
387 for (auto& Op : Ops) {
388 ID.AddPointer(Op.getNode());
389 ID.AddInteger(Op.getResNo());
393 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
395 static void AddNodeIDOperands(FoldingSetNodeID &ID,
396 ArrayRef<SDUse> Ops) {
397 for (auto& Op : Ops) {
398 ID.AddPointer(Op.getNode());
399 ID.AddInteger(Op.getResNo());
403 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
407 ID.AddBoolean(exact);
410 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
411 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
412 bool nuw, bool nsw, bool exact) {
413 if (isBinOpWithFlags(Opcode))
414 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
417 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
418 SDVTList VTList, ArrayRef<SDValue> OpList) {
419 AddNodeIDOpcode(ID, OpC);
420 AddNodeIDValueTypes(ID, VTList);
421 AddNodeIDOperands(ID, OpList);
424 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
426 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
427 switch (N->getOpcode()) {
428 case ISD::TargetExternalSymbol:
429 case ISD::ExternalSymbol:
430 llvm_unreachable("Should only be used on nodes with operands");
431 default: break; // Normal nodes don't need extra info.
432 case ISD::TargetConstant:
433 case ISD::Constant: {
434 const ConstantSDNode *C = cast<ConstantSDNode>(N);
435 ID.AddPointer(C->getConstantIntValue());
436 ID.AddBoolean(C->isOpaque());
439 case ISD::TargetConstantFP:
440 case ISD::ConstantFP: {
441 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
444 case ISD::TargetGlobalAddress:
445 case ISD::GlobalAddress:
446 case ISD::TargetGlobalTLSAddress:
447 case ISD::GlobalTLSAddress: {
448 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
449 ID.AddPointer(GA->getGlobal());
450 ID.AddInteger(GA->getOffset());
451 ID.AddInteger(GA->getTargetFlags());
452 ID.AddInteger(GA->getAddressSpace());
455 case ISD::BasicBlock:
456 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
459 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
461 case ISD::RegisterMask:
462 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
465 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
467 case ISD::FrameIndex:
468 case ISD::TargetFrameIndex:
469 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
472 case ISD::TargetJumpTable:
473 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
474 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
476 case ISD::ConstantPool:
477 case ISD::TargetConstantPool: {
478 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
479 ID.AddInteger(CP->getAlignment());
480 ID.AddInteger(CP->getOffset());
481 if (CP->isMachineConstantPoolEntry())
482 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
484 ID.AddPointer(CP->getConstVal());
485 ID.AddInteger(CP->getTargetFlags());
488 case ISD::TargetIndex: {
489 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
490 ID.AddInteger(TI->getIndex());
491 ID.AddInteger(TI->getOffset());
492 ID.AddInteger(TI->getTargetFlags());
496 const LoadSDNode *LD = cast<LoadSDNode>(N);
497 ID.AddInteger(LD->getMemoryVT().getRawBits());
498 ID.AddInteger(LD->getRawSubclassData());
499 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
503 const StoreSDNode *ST = cast<StoreSDNode>(N);
504 ID.AddInteger(ST->getMemoryVT().getRawBits());
505 ID.AddInteger(ST->getRawSubclassData());
506 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
517 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
518 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
519 BinNode->hasNoSignedWrap(), BinNode->isExact());
522 case ISD::ATOMIC_CMP_SWAP:
523 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
524 case ISD::ATOMIC_SWAP:
525 case ISD::ATOMIC_LOAD_ADD:
526 case ISD::ATOMIC_LOAD_SUB:
527 case ISD::ATOMIC_LOAD_AND:
528 case ISD::ATOMIC_LOAD_OR:
529 case ISD::ATOMIC_LOAD_XOR:
530 case ISD::ATOMIC_LOAD_NAND:
531 case ISD::ATOMIC_LOAD_MIN:
532 case ISD::ATOMIC_LOAD_MAX:
533 case ISD::ATOMIC_LOAD_UMIN:
534 case ISD::ATOMIC_LOAD_UMAX:
535 case ISD::ATOMIC_LOAD:
536 case ISD::ATOMIC_STORE: {
537 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
538 ID.AddInteger(AT->getMemoryVT().getRawBits());
539 ID.AddInteger(AT->getRawSubclassData());
540 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
543 case ISD::PREFETCH: {
544 const MemSDNode *PF = cast<MemSDNode>(N);
545 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
548 case ISD::VECTOR_SHUFFLE: {
549 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
550 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
552 ID.AddInteger(SVN->getMaskElt(i));
555 case ISD::TargetBlockAddress:
556 case ISD::BlockAddress: {
557 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
558 ID.AddPointer(BA->getBlockAddress());
559 ID.AddInteger(BA->getOffset());
560 ID.AddInteger(BA->getTargetFlags());
563 } // end switch (N->getOpcode())
565 // Target specific memory nodes could also have address spaces to check.
566 if (N->isTargetMemoryOpcode())
567 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
570 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
572 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
573 AddNodeIDOpcode(ID, N->getOpcode());
574 // Add the return value info.
575 AddNodeIDValueTypes(ID, N->getVTList());
576 // Add the operand info.
577 AddNodeIDOperands(ID, N->ops());
579 // Handle SDNode leafs with special info.
580 AddNodeIDCustom(ID, N);
583 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
584 /// the CSE map that carries volatility, temporalness, indexing mode, and
585 /// extension/truncation information.
587 static inline unsigned
588 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
589 bool isNonTemporal, bool isInvariant) {
590 assert((ConvType & 3) == ConvType &&
591 "ConvType may not require more than 2 bits!");
592 assert((AM & 7) == AM &&
593 "AM may not require more than 3 bits!");
597 (isNonTemporal << 6) |
601 //===----------------------------------------------------------------------===//
602 // SelectionDAG Class
603 //===----------------------------------------------------------------------===//
605 /// doNotCSE - Return true if CSE should not be performed for this node.
606 static bool doNotCSE(SDNode *N) {
607 if (N->getValueType(0) == MVT::Glue)
608 return true; // Never CSE anything that produces a flag.
610 switch (N->getOpcode()) {
612 case ISD::HANDLENODE:
614 return true; // Never CSE these nodes.
617 // Check that remaining values produced are not flags.
618 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
619 if (N->getValueType(i) == MVT::Glue)
620 return true; // Never CSE anything that produces a flag.
625 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
627 void SelectionDAG::RemoveDeadNodes() {
628 // Create a dummy node (which is not added to allnodes), that adds a reference
629 // to the root node, preventing it from being deleted.
630 HandleSDNode Dummy(getRoot());
632 SmallVector<SDNode*, 128> DeadNodes;
634 // Add all obviously-dead nodes to the DeadNodes worklist.
635 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
637 DeadNodes.push_back(I);
639 RemoveDeadNodes(DeadNodes);
641 // If the root changed (e.g. it was a dead load, update the root).
642 setRoot(Dummy.getValue());
645 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
646 /// given list, and any nodes that become unreachable as a result.
647 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
649 // Process the worklist, deleting the nodes and adding their uses to the
651 while (!DeadNodes.empty()) {
652 SDNode *N = DeadNodes.pop_back_val();
654 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
655 DUL->NodeDeleted(N, nullptr);
657 // Take the node out of the appropriate CSE map.
658 RemoveNodeFromCSEMaps(N);
660 // Next, brutally remove the operand list. This is safe to do, as there are
661 // no cycles in the graph.
662 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
664 SDNode *Operand = Use.getNode();
667 // Now that we removed this operand, see if there are no uses of it left.
668 if (Operand->use_empty())
669 DeadNodes.push_back(Operand);
676 void SelectionDAG::RemoveDeadNode(SDNode *N){
677 SmallVector<SDNode*, 16> DeadNodes(1, N);
679 // Create a dummy node that adds a reference to the root node, preventing
680 // it from being deleted. (This matters if the root is an operand of the
682 HandleSDNode Dummy(getRoot());
684 RemoveDeadNodes(DeadNodes);
687 void SelectionDAG::DeleteNode(SDNode *N) {
688 // First take this out of the appropriate CSE map.
689 RemoveNodeFromCSEMaps(N);
691 // Finally, remove uses due to operands of this node, remove from the
692 // AllNodes list, and delete the node.
693 DeleteNodeNotInCSEMaps(N);
696 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
697 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
698 assert(N->use_empty() && "Cannot delete a node that is not dead!");
700 // Drop all of the operands and decrement used node's use counts.
706 void SDDbgInfo::erase(const SDNode *Node) {
707 DbgValMapType::iterator I = DbgValMap.find(Node);
708 if (I == DbgValMap.end())
710 for (auto &Val: I->second)
711 Val->setIsInvalidated();
715 void SelectionDAG::DeallocateNode(SDNode *N) {
716 if (N->OperandsNeedDelete)
717 delete[] N->OperandList;
719 // Set the opcode to DELETED_NODE to help catch bugs when node
720 // memory is reallocated.
721 N->NodeType = ISD::DELETED_NODE;
723 NodeAllocator.Deallocate(AllNodes.remove(N));
725 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
726 // them and forget about that node.
731 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
732 static void VerifySDNode(SDNode *N) {
733 switch (N->getOpcode()) {
736 case ISD::BUILD_PAIR: {
737 EVT VT = N->getValueType(0);
738 assert(N->getNumValues() == 1 && "Too many results!");
739 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
740 "Wrong return type!");
741 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
742 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
743 "Mismatched operand types!");
744 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
745 "Wrong operand type!");
746 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
747 "Wrong return type size");
750 case ISD::BUILD_VECTOR: {
751 assert(N->getNumValues() == 1 && "Too many results!");
752 assert(N->getValueType(0).isVector() && "Wrong return type!");
753 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
754 "Wrong number of operands!");
755 EVT EltVT = N->getValueType(0).getVectorElementType();
756 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
757 assert((I->getValueType() == EltVT ||
758 (EltVT.isInteger() && I->getValueType().isInteger() &&
759 EltVT.bitsLE(I->getValueType()))) &&
760 "Wrong operand type!");
761 assert(I->getValueType() == N->getOperand(0).getValueType() &&
762 "Operands must all have the same type");
770 /// \brief Insert a newly allocated node into the DAG.
772 /// Handles insertion into the all nodes list and CSE map, as well as
773 /// verification and other common operations when a new node is allocated.
774 void SelectionDAG::InsertNode(SDNode *N) {
775 AllNodes.push_back(N);
781 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
782 /// correspond to it. This is useful when we're about to delete or repurpose
783 /// the node. We don't want future request for structurally identical nodes
784 /// to return N anymore.
785 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
787 switch (N->getOpcode()) {
788 case ISD::HANDLENODE: return false; // noop.
790 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
791 "Cond code doesn't exist!");
792 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
793 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
795 case ISD::ExternalSymbol:
796 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
798 case ISD::TargetExternalSymbol: {
799 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
800 Erased = TargetExternalSymbols.erase(
801 std::pair<std::string,unsigned char>(ESN->getSymbol(),
802 ESN->getTargetFlags()));
805 case ISD::VALUETYPE: {
806 EVT VT = cast<VTSDNode>(N)->getVT();
807 if (VT.isExtended()) {
808 Erased = ExtendedValueTypeNodes.erase(VT);
810 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
811 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
816 // Remove it from the CSE Map.
817 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
818 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
819 Erased = CSEMap.RemoveNode(N);
823 // Verify that the node was actually in one of the CSE maps, unless it has a
824 // flag result (which cannot be CSE'd) or is one of the special cases that are
825 // not subject to CSE.
826 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
827 !N->isMachineOpcode() && !doNotCSE(N)) {
830 llvm_unreachable("Node is not in map!");
836 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
837 /// maps and modified in place. Add it back to the CSE maps, unless an identical
838 /// node already exists, in which case transfer all its users to the existing
839 /// node. This transfer can potentially trigger recursive merging.
842 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
843 // For node types that aren't CSE'd, just act as if no identical node
846 SDNode *Existing = CSEMap.GetOrInsertNode(N);
848 // If there was already an existing matching node, use ReplaceAllUsesWith
849 // to replace the dead one with the existing one. This can cause
850 // recursive merging of other unrelated nodes down the line.
851 ReplaceAllUsesWith(N, Existing);
853 // N is now dead. Inform the listeners and delete it.
854 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
855 DUL->NodeDeleted(N, Existing);
856 DeleteNodeNotInCSEMaps(N);
861 // If the node doesn't already exist, we updated it. Inform listeners.
862 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
866 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
867 /// were replaced with those specified. If this node is never memoized,
868 /// return null, otherwise return a pointer to the slot it would take. If a
869 /// node already exists with these operands, the slot will be non-null.
870 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
875 SDValue Ops[] = { Op };
877 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
878 AddNodeIDCustom(ID, N);
879 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
883 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
884 /// were replaced with those specified. If this node is never memoized,
885 /// return null, otherwise return a pointer to the slot it would take. If a
886 /// node already exists with these operands, the slot will be non-null.
887 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
888 SDValue Op1, SDValue Op2,
893 SDValue Ops[] = { Op1, Op2 };
895 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
896 AddNodeIDCustom(ID, N);
897 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
903 /// were replaced with those specified. If this node is never memoized,
904 /// return null, otherwise return a pointer to the slot it would take. If a
905 /// node already exists with these operands, the slot will be non-null.
906 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
912 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
913 AddNodeIDCustom(ID, N);
914 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
918 /// getEVTAlignment - Compute the default alignment value for the
921 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
922 Type *Ty = VT == MVT::iPTR ?
923 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
924 VT.getTypeForEVT(*getContext());
926 return TLI->getDataLayout()->getABITypeAlignment(Ty);
929 // EntryNode could meaningfully have debug info if we can find it...
930 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
931 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
932 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
933 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
934 UpdateListeners(nullptr) {
935 AllNodes.push_back(&EntryNode);
936 DbgInfo = new SDDbgInfo();
939 void SelectionDAG::init(MachineFunction &mf) {
941 TLI = getSubtarget().getTargetLowering();
942 TSI = getSubtarget().getSelectionDAGInfo();
943 Context = &mf.getFunction()->getContext();
946 SelectionDAG::~SelectionDAG() {
947 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
952 void SelectionDAG::allnodes_clear() {
953 assert(&*AllNodes.begin() == &EntryNode);
954 AllNodes.remove(AllNodes.begin());
955 while (!AllNodes.empty())
956 DeallocateNode(AllNodes.begin());
959 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
960 SDVTList VTs, SDValue N1,
961 SDValue N2, bool nuw, bool nsw,
963 if (isBinOpWithFlags(Opcode)) {
964 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
965 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
966 FN->setHasNoUnsignedWrap(nuw);
967 FN->setHasNoSignedWrap(nsw);
968 FN->setIsExact(exact);
973 BinarySDNode *N = new (NodeAllocator)
974 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
978 void SelectionDAG::clear() {
980 OperandAllocator.Reset();
983 ExtendedValueTypeNodes.clear();
984 ExternalSymbols.clear();
985 TargetExternalSymbols.clear();
986 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
987 static_cast<CondCodeSDNode*>(nullptr));
988 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
989 static_cast<SDNode*>(nullptr));
991 EntryNode.UseList = nullptr;
992 AllNodes.push_back(&EntryNode);
993 Root = getEntryNode();
997 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
998 return VT.bitsGT(Op.getValueType()) ?
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1000 getNode(ISD::TRUNCATE, DL, VT, Op);
1003 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1004 return VT.bitsGT(Op.getValueType()) ?
1005 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1006 getNode(ISD::TRUNCATE, DL, VT, Op);
1009 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1010 return VT.bitsGT(Op.getValueType()) ?
1011 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1012 getNode(ISD::TRUNCATE, DL, VT, Op);
1015 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1017 if (VT.bitsLE(Op.getValueType()))
1018 return getNode(ISD::TRUNCATE, SL, VT, Op);
1020 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1021 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1024 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1025 assert(!VT.isVector() &&
1026 "getZeroExtendInReg should use the vector element type instead of "
1027 "the vector type!");
1028 if (Op.getValueType() == VT) return Op;
1029 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1030 APInt Imm = APInt::getLowBitsSet(BitWidth,
1031 VT.getSizeInBits());
1032 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1033 getConstant(Imm, Op.getValueType()));
1036 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1037 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1038 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1039 "The sizes of the input and result must match in order to perform the "
1040 "extend in-register.");
1041 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1042 "The destination vector type must have fewer lanes than the input.");
1043 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1046 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1047 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1048 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1049 "The sizes of the input and result must match in order to perform the "
1050 "extend in-register.");
1051 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1052 "The destination vector type must have fewer lanes than the input.");
1053 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1056 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1057 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1058 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1059 "The sizes of the input and result must match in order to perform the "
1060 "extend in-register.");
1061 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1062 "The destination vector type must have fewer lanes than the input.");
1063 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1066 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1068 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1069 EVT EltVT = VT.getScalarType();
1071 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1072 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1075 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1076 EVT EltVT = VT.getScalarType();
1078 switch (TLI->getBooleanContents(VT)) {
1079 case TargetLowering::ZeroOrOneBooleanContent:
1080 case TargetLowering::UndefinedBooleanContent:
1081 TrueValue = getConstant(1, VT);
1083 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1084 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1088 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1091 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1092 EVT EltVT = VT.getScalarType();
1093 assert((EltVT.getSizeInBits() >= 64 ||
1094 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1095 "getConstant with a uint64_t value that doesn't fit in the type!");
1096 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1099 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1101 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1104 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1106 assert(VT.isInteger() && "Cannot create FP integer constant!");
1108 EVT EltVT = VT.getScalarType();
1109 const ConstantInt *Elt = &Val;
1111 // In some cases the vector type is legal but the element type is illegal and
1112 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1113 // inserted value (the type does not need to match the vector element type).
1114 // Any extra bits introduced will be truncated away.
1115 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1116 TargetLowering::TypePromoteInteger) {
1117 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1118 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1119 Elt = ConstantInt::get(*getContext(), NewVal);
1121 // In other cases the element type is illegal and needs to be expanded, for
1122 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1123 // the value into n parts and use a vector type with n-times the elements.
1124 // Then bitcast to the type requested.
1125 // Legalizing constants too early makes the DAGCombiner's job harder so we
1126 // only legalize if the DAG tells us we must produce legal types.
1127 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1128 TLI->getTypeAction(*getContext(), EltVT) ==
1129 TargetLowering::TypeExpandInteger) {
1130 APInt NewVal = Elt->getValue();
1131 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1132 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1133 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1134 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1136 // Check the temporary vector is the correct size. If this fails then
1137 // getTypeToTransformTo() probably returned a type whose size (in bits)
1138 // isn't a power-of-2 factor of the requested type size.
1139 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1141 SmallVector<SDValue, 2> EltParts;
1142 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1143 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1144 .trunc(ViaEltSizeInBits),
1145 ViaEltVT, isT, isO));
1148 // EltParts is currently in little endian order. If we actually want
1149 // big-endian order then reverse it now.
1150 if (TLI->isBigEndian())
1151 std::reverse(EltParts.begin(), EltParts.end());
1153 // The elements must be reversed when the element order is different
1154 // to the endianness of the elements (because the BITCAST is itself a
1155 // vector shuffle in this situation). However, we do not need any code to
1156 // perform this reversal because getConstant() is producing a vector
1158 // This situation occurs in MIPS MSA.
1160 SmallVector<SDValue, 8> Ops;
1161 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1162 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1164 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1165 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1170 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1171 "APInt size does not match type size!");
1172 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1178 SDNode *N = nullptr;
1179 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1181 return SDValue(N, 0);
1184 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1185 CSEMap.InsertNode(N, IP);
1189 SDValue Result(N, 0);
1190 if (VT.isVector()) {
1191 SmallVector<SDValue, 8> Ops;
1192 Ops.assign(VT.getVectorNumElements(), Result);
1193 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1198 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1199 return getConstant(Val, TLI->getPointerTy(), isTarget);
1203 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1204 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1207 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1208 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1210 EVT EltVT = VT.getScalarType();
1212 // Do the map lookup using the actual bit pattern for the floating point
1213 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1214 // we don't have issues with SNANs.
1215 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1216 FoldingSetNodeID ID;
1217 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1220 SDNode *N = nullptr;
1221 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1223 return SDValue(N, 0);
1226 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1227 CSEMap.InsertNode(N, IP);
1231 SDValue Result(N, 0);
1232 if (VT.isVector()) {
1233 SmallVector<SDValue, 8> Ops;
1234 Ops.assign(VT.getVectorNumElements(), Result);
1235 // FIXME SDLoc info might be appropriate here
1236 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1241 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1242 EVT EltVT = VT.getScalarType();
1243 if (EltVT==MVT::f32)
1244 return getConstantFP(APFloat((float)Val), VT, isTarget);
1245 else if (EltVT==MVT::f64)
1246 return getConstantFP(APFloat(Val), VT, isTarget);
1247 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1250 APFloat apf = APFloat(Val);
1251 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1253 return getConstantFP(apf, VT, isTarget);
1255 llvm_unreachable("Unsupported type in getConstantFP");
1258 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1259 EVT VT, int64_t Offset,
1261 unsigned char TargetFlags) {
1262 assert((TargetFlags == 0 || isTargetGA) &&
1263 "Cannot set target flags on target-independent globals");
1265 // Truncate (with sign-extension) the offset value to the pointer size.
1266 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1268 Offset = SignExtend64(Offset, BitWidth);
1271 if (GV->isThreadLocal())
1272 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1274 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1276 FoldingSetNodeID ID;
1277 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1279 ID.AddInteger(Offset);
1280 ID.AddInteger(TargetFlags);
1281 ID.AddInteger(GV->getType()->getAddressSpace());
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1287 DL.getDebugLoc(), GV, VT,
1288 Offset, TargetFlags);
1289 CSEMap.InsertNode(N, IP);
1291 return SDValue(N, 0);
1294 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1295 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1296 FoldingSetNodeID ID;
1297 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1301 return SDValue(E, 0);
1303 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1304 CSEMap.InsertNode(N, IP);
1306 return SDValue(N, 0);
1309 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1310 unsigned char TargetFlags) {
1311 assert((TargetFlags == 0 || isTarget) &&
1312 "Cannot set target flags on target-independent jump tables");
1313 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1314 FoldingSetNodeID ID;
1315 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1317 ID.AddInteger(TargetFlags);
1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1324 CSEMap.InsertNode(N, IP);
1326 return SDValue(N, 0);
1329 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1330 unsigned Alignment, int Offset,
1332 unsigned char TargetFlags) {
1333 assert((TargetFlags == 0 || isTarget) &&
1334 "Cannot set target flags on target-independent globals");
1336 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1337 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1340 ID.AddInteger(Alignment);
1341 ID.AddInteger(Offset);
1343 ID.AddInteger(TargetFlags);
1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1346 return SDValue(E, 0);
1348 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1349 Alignment, TargetFlags);
1350 CSEMap.InsertNode(N, IP);
1352 return SDValue(N, 0);
1356 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1357 unsigned Alignment, int Offset,
1359 unsigned char TargetFlags) {
1360 assert((TargetFlags == 0 || isTarget) &&
1361 "Cannot set target flags on target-independent globals");
1363 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1364 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1367 ID.AddInteger(Alignment);
1368 ID.AddInteger(Offset);
1369 C->addSelectionDAGCSEId(ID);
1370 ID.AddInteger(TargetFlags);
1372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1373 return SDValue(E, 0);
1375 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1376 Alignment, TargetFlags);
1377 CSEMap.InsertNode(N, IP);
1379 return SDValue(N, 0);
1382 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1383 unsigned char TargetFlags) {
1384 FoldingSetNodeID ID;
1385 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1386 ID.AddInteger(Index);
1387 ID.AddInteger(Offset);
1388 ID.AddInteger(TargetFlags);
1390 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1391 return SDValue(E, 0);
1393 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1395 CSEMap.InsertNode(N, IP);
1397 return SDValue(N, 0);
1400 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1401 FoldingSetNodeID ID;
1402 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1405 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1406 return SDValue(E, 0);
1408 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1409 CSEMap.InsertNode(N, IP);
1411 return SDValue(N, 0);
1414 SDValue SelectionDAG::getValueType(EVT VT) {
1415 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1416 ValueTypeNodes.size())
1417 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1419 SDNode *&N = VT.isExtended() ?
1420 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1422 if (N) return SDValue(N, 0);
1423 N = new (NodeAllocator) VTSDNode(VT);
1425 return SDValue(N, 0);
1428 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1429 SDNode *&N = ExternalSymbols[Sym];
1430 if (N) return SDValue(N, 0);
1431 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1437 unsigned char TargetFlags) {
1439 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1441 if (N) return SDValue(N, 0);
1442 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1444 return SDValue(N, 0);
1447 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1448 if ((unsigned)Cond >= CondCodeNodes.size())
1449 CondCodeNodes.resize(Cond+1);
1451 if (!CondCodeNodes[Cond]) {
1452 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1453 CondCodeNodes[Cond] = N;
1457 return SDValue(CondCodeNodes[Cond], 0);
1460 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1461 // the shuffle mask M that point at N1 to point at N2, and indices that point
1462 // N2 to point at N1.
1463 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1465 ShuffleVectorSDNode::commuteMask(M);
1468 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1469 SDValue N2, const int *Mask) {
1470 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1471 "Invalid VECTOR_SHUFFLE");
1473 // Canonicalize shuffle undef, undef -> undef
1474 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1475 return getUNDEF(VT);
1477 // Validate that all indices in Mask are within the range of the elements
1478 // input to the shuffle.
1479 unsigned NElts = VT.getVectorNumElements();
1480 SmallVector<int, 8> MaskVec;
1481 for (unsigned i = 0; i != NElts; ++i) {
1482 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1483 MaskVec.push_back(Mask[i]);
1486 // Canonicalize shuffle v, v -> v, undef
1489 for (unsigned i = 0; i != NElts; ++i)
1490 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1493 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1494 if (N1.getOpcode() == ISD::UNDEF)
1495 commuteShuffle(N1, N2, MaskVec);
1497 // If shuffling a splat, try to blend the splat instead. We do this here so
1498 // that even when this arises during lowering we don't have to re-handle it.
1499 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1500 BitVector UndefElements;
1501 SDValue Splat = BV->getSplatValue(&UndefElements);
1505 for (int i = 0; i < (int)NElts; ++i) {
1506 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1509 // If this input comes from undef, mark it as such.
1510 if (UndefElements[MaskVec[i] - Offset]) {
1515 // If we can blend a non-undef lane, use that instead.
1516 if (!UndefElements[i])
1517 MaskVec[i] = i + Offset;
1520 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1521 BlendSplat(N1BV, 0);
1522 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1523 BlendSplat(N2BV, NElts);
1525 // Canonicalize all index into lhs, -> shuffle lhs, undef
1526 // Canonicalize all index into rhs, -> shuffle rhs, undef
1527 bool AllLHS = true, AllRHS = true;
1528 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1529 for (unsigned i = 0; i != NElts; ++i) {
1530 if (MaskVec[i] >= (int)NElts) {
1535 } else if (MaskVec[i] >= 0) {
1539 if (AllLHS && AllRHS)
1540 return getUNDEF(VT);
1541 if (AllLHS && !N2Undef)
1545 commuteShuffle(N1, N2, MaskVec);
1547 // Reset our undef status after accounting for the mask.
1548 N2Undef = N2.getOpcode() == ISD::UNDEF;
1549 // Re-check whether both sides ended up undef.
1550 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1551 return getUNDEF(VT);
1553 // If Identity shuffle return that node.
1554 bool Identity = true, AllSame = true;
1555 for (unsigned i = 0; i != NElts; ++i) {
1556 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1557 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1559 if (Identity && NElts)
1562 // Shuffling a constant splat doesn't change the result.
1566 // Look through any bitcasts. We check that these don't change the number
1567 // (and size) of elements and just changes their types.
1568 while (V.getOpcode() == ISD::BITCAST)
1569 V = V->getOperand(0);
1571 // A splat should always show up as a build vector node.
1572 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1573 BitVector UndefElements;
1574 SDValue Splat = BV->getSplatValue(&UndefElements);
1575 // If this is a splat of an undef, shuffling it is also undef.
1576 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1577 return getUNDEF(VT);
1580 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1582 // We only have a splat which can skip shuffles if there is a splatted
1583 // value and no undef lanes rearranged by the shuffle.
1584 if (Splat && UndefElements.none()) {
1585 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1586 // number of elements match or the value splatted is a zero constant.
1589 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1590 if (C->isNullValue())
1594 // If the shuffle itself creates a splat, build the vector directly.
1595 if (AllSame && SameNumElts) {
1596 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1597 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1599 EVT BuildVT = BV->getValueType(0);
1600 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1602 // We may have jumped through bitcasts, so the type of the
1603 // BUILD_VECTOR may not match the type of the shuffle.
1605 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1611 FoldingSetNodeID ID;
1612 SDValue Ops[2] = { N1, N2 };
1613 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1614 for (unsigned i = 0; i != NElts; ++i)
1615 ID.AddInteger(MaskVec[i]);
1618 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1619 return SDValue(E, 0);
1621 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1622 // SDNode doesn't have access to it. This memory will be "leaked" when
1623 // the node is deallocated, but recovered when the NodeAllocator is released.
1624 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1625 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1627 ShuffleVectorSDNode *N =
1628 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1629 dl.getDebugLoc(), N1, N2,
1631 CSEMap.InsertNode(N, IP);
1633 return SDValue(N, 0);
1636 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1637 MVT VT = SV.getSimpleValueType(0);
1638 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1639 ShuffleVectorSDNode::commuteMask(MaskVec);
1641 SDValue Op0 = SV.getOperand(0);
1642 SDValue Op1 = SV.getOperand(1);
1643 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1646 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1647 SDValue Val, SDValue DTy,
1648 SDValue STy, SDValue Rnd, SDValue Sat,
1649 ISD::CvtCode Code) {
1650 // If the src and dest types are the same and the conversion is between
1651 // integer types of the same sign or two floats, no conversion is necessary.
1653 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1656 FoldingSetNodeID ID;
1657 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1658 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1661 return SDValue(E, 0);
1663 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1666 CSEMap.InsertNode(N, IP);
1668 return SDValue(N, 0);
1671 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1672 FoldingSetNodeID ID;
1673 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1674 ID.AddInteger(RegNo);
1676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1677 return SDValue(E, 0);
1679 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1680 CSEMap.InsertNode(N, IP);
1682 return SDValue(N, 0);
1685 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1686 FoldingSetNodeID ID;
1687 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1688 ID.AddPointer(RegMask);
1690 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1691 return SDValue(E, 0);
1693 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1694 CSEMap.InsertNode(N, IP);
1696 return SDValue(N, 0);
1699 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1700 FoldingSetNodeID ID;
1701 SDValue Ops[] = { Root };
1702 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1703 ID.AddPointer(Label);
1705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1706 return SDValue(E, 0);
1708 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1709 dl.getDebugLoc(), Root, Label);
1710 CSEMap.InsertNode(N, IP);
1712 return SDValue(N, 0);
1716 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1719 unsigned char TargetFlags) {
1720 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1722 FoldingSetNodeID ID;
1723 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1725 ID.AddInteger(Offset);
1726 ID.AddInteger(TargetFlags);
1728 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1729 return SDValue(E, 0);
1731 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1733 CSEMap.InsertNode(N, IP);
1735 return SDValue(N, 0);
1738 SDValue SelectionDAG::getSrcValue(const Value *V) {
1739 assert((!V || V->getType()->isPointerTy()) &&
1740 "SrcValue is not a pointer?");
1742 FoldingSetNodeID ID;
1743 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1747 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1748 return SDValue(E, 0);
1750 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1751 CSEMap.InsertNode(N, IP);
1753 return SDValue(N, 0);
1756 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1757 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1758 FoldingSetNodeID ID;
1759 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1764 return SDValue(E, 0);
1766 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1767 CSEMap.InsertNode(N, IP);
1769 return SDValue(N, 0);
1772 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1773 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1774 unsigned SrcAS, unsigned DestAS) {
1775 SDValue Ops[] = {Ptr};
1776 FoldingSetNodeID ID;
1777 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1778 ID.AddInteger(SrcAS);
1779 ID.AddInteger(DestAS);
1782 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1783 return SDValue(E, 0);
1785 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1787 VT, Ptr, SrcAS, DestAS);
1788 CSEMap.InsertNode(N, IP);
1790 return SDValue(N, 0);
1793 /// getShiftAmountOperand - Return the specified value casted to
1794 /// the target's desired shift amount type.
1795 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1796 EVT OpTy = Op.getValueType();
1797 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1798 if (OpTy == ShTy || OpTy.isVector()) return Op;
1800 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1801 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1804 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1805 /// specified value type.
1806 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1807 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1808 unsigned ByteSize = VT.getStoreSize();
1809 Type *Ty = VT.getTypeForEVT(*getContext());
1810 unsigned StackAlign =
1811 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1813 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1814 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1817 /// CreateStackTemporary - Create a stack temporary suitable for holding
1818 /// either of the specified value types.
1819 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1820 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1821 VT2.getStoreSizeInBits())/8;
1822 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1823 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1824 const DataLayout *TD = TLI->getDataLayout();
1825 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1826 TD->getPrefTypeAlignment(Ty2));
1828 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1829 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1830 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1833 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1834 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1835 // These setcc operations always fold.
1839 case ISD::SETFALSE2: return getConstant(0, VT);
1841 case ISD::SETTRUE2: {
1842 TargetLowering::BooleanContent Cnt =
1843 TLI->getBooleanContents(N1->getValueType(0));
1845 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1858 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1862 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1863 const APInt &C2 = N2C->getAPIntValue();
1864 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1865 const APInt &C1 = N1C->getAPIntValue();
1868 default: llvm_unreachable("Unknown integer setcc!");
1869 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1870 case ISD::SETNE: return getConstant(C1 != C2, VT);
1871 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1872 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1873 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1874 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1875 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1876 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1877 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1878 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1882 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1883 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1884 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1887 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1888 return getUNDEF(VT);
1890 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1891 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1892 return getUNDEF(VT);
1894 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1895 R==APFloat::cmpLessThan, VT);
1896 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1897 return getUNDEF(VT);
1899 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1900 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1901 return getUNDEF(VT);
1903 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1904 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1905 return getUNDEF(VT);
1907 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1908 R==APFloat::cmpEqual, VT);
1909 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1910 return getUNDEF(VT);
1912 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1913 R==APFloat::cmpEqual, VT);
1914 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1915 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1916 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1917 R==APFloat::cmpEqual, VT);
1918 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1919 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1920 R==APFloat::cmpLessThan, VT);
1921 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1922 R==APFloat::cmpUnordered, VT);
1923 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1924 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1927 // Ensure that the constant occurs on the RHS.
1928 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1929 MVT CompVT = N1.getValueType().getSimpleVT();
1930 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1933 return getSetCC(dl, VT, N2, N1, SwappedCond);
1937 // Could not fold it.
1941 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1942 /// use this predicate to simplify operations downstream.
1943 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1944 // This predicate is not safe for vector operations.
1945 if (Op.getValueType().isVector())
1948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1949 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1952 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1953 /// this predicate to simplify operations downstream. Mask is known to be zero
1954 /// for bits that V cannot have.
1955 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1956 unsigned Depth) const {
1957 APInt KnownZero, KnownOne;
1958 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1959 return (KnownZero & Mask) == Mask;
1962 /// Determine which bits of Op are known to be either zero or one and return
1963 /// them in the KnownZero/KnownOne bitsets.
1964 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1965 APInt &KnownOne, unsigned Depth) const {
1966 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1968 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1970 return; // Limit search depth.
1972 APInt KnownZero2, KnownOne2;
1974 switch (Op.getOpcode()) {
1976 // We know all of the bits for a constant!
1977 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1978 KnownZero = ~KnownOne;
1981 // If either the LHS or the RHS are Zero, the result is zero.
1982 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1983 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1985 // Output known-1 bits are only known if set in both the LHS & RHS.
1986 KnownOne &= KnownOne2;
1987 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1988 KnownZero |= KnownZero2;
1991 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1992 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1994 // Output known-0 bits are only known if clear in both the LHS & RHS.
1995 KnownZero &= KnownZero2;
1996 // Output known-1 are known to be set if set in either the LHS | RHS.
1997 KnownOne |= KnownOne2;
2000 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2001 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2003 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2004 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2005 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2006 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2007 KnownZero = KnownZeroOut;
2011 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2012 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2014 // If low bits are zero in either operand, output low known-0 bits.
2015 // Also compute a conserative estimate for high known-0 bits.
2016 // More trickiness is possible, but this is sufficient for the
2017 // interesting case of alignment computation.
2018 KnownOne.clearAllBits();
2019 unsigned TrailZ = KnownZero.countTrailingOnes() +
2020 KnownZero2.countTrailingOnes();
2021 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2022 KnownZero2.countLeadingOnes(),
2023 BitWidth) - BitWidth;
2025 TrailZ = std::min(TrailZ, BitWidth);
2026 LeadZ = std::min(LeadZ, BitWidth);
2027 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2028 APInt::getHighBitsSet(BitWidth, LeadZ);
2032 // For the purposes of computing leading zeros we can conservatively
2033 // treat a udiv as a logical right shift by the power of 2 known to
2034 // be less than the denominator.
2035 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2036 unsigned LeadZ = KnownZero2.countLeadingOnes();
2038 KnownOne2.clearAllBits();
2039 KnownZero2.clearAllBits();
2040 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2041 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2042 if (RHSUnknownLeadingOnes != BitWidth)
2043 LeadZ = std::min(BitWidth,
2044 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2046 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2050 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2051 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2053 // Only known if known in both the LHS and RHS.
2054 KnownOne &= KnownOne2;
2055 KnownZero &= KnownZero2;
2057 case ISD::SELECT_CC:
2058 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2059 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2061 // Only known if known in both the LHS and RHS.
2062 KnownOne &= KnownOne2;
2063 KnownZero &= KnownZero2;
2071 if (Op.getResNo() != 1)
2073 // The boolean result conforms to getBooleanContents.
2074 // If we know the result of a setcc has the top bits zero, use this info.
2075 // We know that we have an integer-based boolean since these operations
2076 // are only available for integer.
2077 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2078 TargetLowering::ZeroOrOneBooleanContent &&
2080 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2083 // If we know the result of a setcc has the top bits zero, use this info.
2084 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2085 TargetLowering::ZeroOrOneBooleanContent &&
2087 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2090 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2091 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2092 unsigned ShAmt = SA->getZExtValue();
2094 // If the shift count is an invalid immediate, don't do anything.
2095 if (ShAmt >= BitWidth)
2098 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2099 KnownZero <<= ShAmt;
2101 // low bits known zero.
2102 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2106 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2107 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2108 unsigned ShAmt = SA->getZExtValue();
2110 // If the shift count is an invalid immediate, don't do anything.
2111 if (ShAmt >= BitWidth)
2114 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2115 KnownZero = KnownZero.lshr(ShAmt);
2116 KnownOne = KnownOne.lshr(ShAmt);
2118 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2119 KnownZero |= HighBits; // High bits known zero.
2123 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2124 unsigned ShAmt = SA->getZExtValue();
2126 // If the shift count is an invalid immediate, don't do anything.
2127 if (ShAmt >= BitWidth)
2130 // If any of the demanded bits are produced by the sign extension, we also
2131 // demand the input sign bit.
2132 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2134 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2135 KnownZero = KnownZero.lshr(ShAmt);
2136 KnownOne = KnownOne.lshr(ShAmt);
2138 // Handle the sign bits.
2139 APInt SignBit = APInt::getSignBit(BitWidth);
2140 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2142 if (KnownZero.intersects(SignBit)) {
2143 KnownZero |= HighBits; // New bits are known zero.
2144 } else if (KnownOne.intersects(SignBit)) {
2145 KnownOne |= HighBits; // New bits are known one.
2149 case ISD::SIGN_EXTEND_INREG: {
2150 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2151 unsigned EBits = EVT.getScalarType().getSizeInBits();
2153 // Sign extension. Compute the demanded bits in the result that are not
2154 // present in the input.
2155 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2157 APInt InSignBit = APInt::getSignBit(EBits);
2158 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2160 // If the sign extended bits are demanded, we know that the sign
2162 InSignBit = InSignBit.zext(BitWidth);
2163 if (NewBits.getBoolValue())
2164 InputDemandedBits |= InSignBit;
2166 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2167 KnownOne &= InputDemandedBits;
2168 KnownZero &= InputDemandedBits;
2170 // If the sign bit of the input is known set or clear, then we know the
2171 // top bits of the result.
2172 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2173 KnownZero |= NewBits;
2174 KnownOne &= ~NewBits;
2175 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2176 KnownOne |= NewBits;
2177 KnownZero &= ~NewBits;
2178 } else { // Input sign bit unknown
2179 KnownZero &= ~NewBits;
2180 KnownOne &= ~NewBits;
2185 case ISD::CTTZ_ZERO_UNDEF:
2187 case ISD::CTLZ_ZERO_UNDEF:
2189 unsigned LowBits = Log2_32(BitWidth)+1;
2190 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2191 KnownOne.clearAllBits();
2195 LoadSDNode *LD = cast<LoadSDNode>(Op);
2196 // If this is a ZEXTLoad and we are looking at the loaded value.
2197 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2198 EVT VT = LD->getMemoryVT();
2199 unsigned MemBits = VT.getScalarType().getSizeInBits();
2200 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2201 } else if (const MDNode *Ranges = LD->getRanges()) {
2202 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2206 case ISD::ZERO_EXTEND: {
2207 EVT InVT = Op.getOperand(0).getValueType();
2208 unsigned InBits = InVT.getScalarType().getSizeInBits();
2209 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2210 KnownZero = KnownZero.trunc(InBits);
2211 KnownOne = KnownOne.trunc(InBits);
2212 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2213 KnownZero = KnownZero.zext(BitWidth);
2214 KnownOne = KnownOne.zext(BitWidth);
2215 KnownZero |= NewBits;
2218 case ISD::SIGN_EXTEND: {
2219 EVT InVT = Op.getOperand(0).getValueType();
2220 unsigned InBits = InVT.getScalarType().getSizeInBits();
2221 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2223 KnownZero = KnownZero.trunc(InBits);
2224 KnownOne = KnownOne.trunc(InBits);
2225 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2227 // Note if the sign bit is known to be zero or one.
2228 bool SignBitKnownZero = KnownZero.isNegative();
2229 bool SignBitKnownOne = KnownOne.isNegative();
2231 KnownZero = KnownZero.zext(BitWidth);
2232 KnownOne = KnownOne.zext(BitWidth);
2234 // If the sign bit is known zero or one, the top bits match.
2235 if (SignBitKnownZero)
2236 KnownZero |= NewBits;
2237 else if (SignBitKnownOne)
2238 KnownOne |= NewBits;
2241 case ISD::ANY_EXTEND: {
2242 EVT InVT = Op.getOperand(0).getValueType();
2243 unsigned InBits = InVT.getScalarType().getSizeInBits();
2244 KnownZero = KnownZero.trunc(InBits);
2245 KnownOne = KnownOne.trunc(InBits);
2246 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2247 KnownZero = KnownZero.zext(BitWidth);
2248 KnownOne = KnownOne.zext(BitWidth);
2251 case ISD::TRUNCATE: {
2252 EVT InVT = Op.getOperand(0).getValueType();
2253 unsigned InBits = InVT.getScalarType().getSizeInBits();
2254 KnownZero = KnownZero.zext(InBits);
2255 KnownOne = KnownOne.zext(InBits);
2256 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2257 KnownZero = KnownZero.trunc(BitWidth);
2258 KnownOne = KnownOne.trunc(BitWidth);
2261 case ISD::AssertZext: {
2262 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2263 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2264 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2265 KnownZero |= (~InMask);
2266 KnownOne &= (~KnownZero);
2270 // All bits are zero except the low bit.
2271 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2275 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2276 // We know that the top bits of C-X are clear if X contains less bits
2277 // than C (i.e. no wrap-around can happen). For example, 20-X is
2278 // positive if we can prove that X is >= 0 and < 16.
2279 if (CLHS->getAPIntValue().isNonNegative()) {
2280 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2281 // NLZ can't be BitWidth with no sign bit
2282 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2283 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2285 // If all of the MaskV bits are known to be zero, then we know the
2286 // output top bits are zero, because we now know that the output is
2288 if ((KnownZero2 & MaskV) == MaskV) {
2289 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2290 // Top bits known zero.
2291 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2299 // Output known-0 bits are known if clear or set in both the low clear bits
2300 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2301 // low 3 bits clear.
2302 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2303 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2305 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2306 KnownZeroOut = std::min(KnownZeroOut,
2307 KnownZero2.countTrailingOnes());
2309 if (Op.getOpcode() == ISD::ADD) {
2310 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2314 // With ADDE, a carry bit may be added in, so we can only use this
2315 // information if we know (at least) that the low two bits are clear. We
2316 // then return to the caller that the low bit is unknown but that other bits
2318 if (KnownZeroOut >= 2) // ADDE
2319 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2323 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2324 const APInt &RA = Rem->getAPIntValue().abs();
2325 if (RA.isPowerOf2()) {
2326 APInt LowBits = RA - 1;
2327 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2329 // The low bits of the first operand are unchanged by the srem.
2330 KnownZero = KnownZero2 & LowBits;
2331 KnownOne = KnownOne2 & LowBits;
2333 // If the first operand is non-negative or has all low bits zero, then
2334 // the upper bits are all zero.
2335 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2336 KnownZero |= ~LowBits;
2338 // If the first operand is negative and not all low bits are zero, then
2339 // the upper bits are all one.
2340 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2341 KnownOne |= ~LowBits;
2342 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2347 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2348 const APInt &RA = Rem->getAPIntValue();
2349 if (RA.isPowerOf2()) {
2350 APInt LowBits = (RA - 1);
2351 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2353 // The upper bits are all zero, the lower ones are unchanged.
2354 KnownZero = KnownZero2 | ~LowBits;
2355 KnownOne = KnownOne2 & LowBits;
2360 // Since the result is less than or equal to either operand, any leading
2361 // zero bits in either operand must also exist in the result.
2362 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2363 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2365 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2366 KnownZero2.countLeadingOnes());
2367 KnownOne.clearAllBits();
2368 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2371 case ISD::EXTRACT_ELEMENT: {
2372 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2373 const unsigned Index =
2374 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2375 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2377 // Remove low part of known bits mask
2378 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2379 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2381 // Remove high part of known bit mask
2382 KnownZero = KnownZero.trunc(BitWidth);
2383 KnownOne = KnownOne.trunc(BitWidth);
2386 case ISD::FrameIndex:
2387 case ISD::TargetFrameIndex:
2388 if (unsigned Align = InferPtrAlignment(Op)) {
2389 // The low bits are known zero if the pointer is aligned.
2390 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2396 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2399 case ISD::INTRINSIC_WO_CHAIN:
2400 case ISD::INTRINSIC_W_CHAIN:
2401 case ISD::INTRINSIC_VOID:
2402 // Allow the target to implement this method for its nodes.
2403 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2407 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2410 /// ComputeNumSignBits - Return the number of times the sign bit of the
2411 /// register is replicated into the other bits. We know that at least 1 bit
2412 /// is always equal to the sign bit (itself), but other cases can give us
2413 /// information. For example, immediately after an "SRA X, 2", we know that
2414 /// the top 3 bits are all equal to each other, so we return 3.
2415 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2416 EVT VT = Op.getValueType();
2417 assert(VT.isInteger() && "Invalid VT!");
2418 unsigned VTBits = VT.getScalarType().getSizeInBits();
2420 unsigned FirstAnswer = 1;
2423 return 1; // Limit search depth.
2425 switch (Op.getOpcode()) {
2427 case ISD::AssertSext:
2428 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2429 return VTBits-Tmp+1;
2430 case ISD::AssertZext:
2431 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2434 case ISD::Constant: {
2435 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2436 return Val.getNumSignBits();
2439 case ISD::SIGN_EXTEND:
2441 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2442 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2444 case ISD::SIGN_EXTEND_INREG:
2445 // Max of the input and what this extends.
2447 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2450 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2451 return std::max(Tmp, Tmp2);
2454 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2455 // SRA X, C -> adds C sign bits.
2456 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2457 Tmp += C->getZExtValue();
2458 if (Tmp > VTBits) Tmp = VTBits;
2462 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2463 // shl destroys sign bits.
2464 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2465 if (C->getZExtValue() >= VTBits || // Bad shift.
2466 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2467 return Tmp - C->getZExtValue();
2472 case ISD::XOR: // NOT is handled here.
2473 // Logical binary ops preserve the number of sign bits at the worst.
2474 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2476 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2477 FirstAnswer = std::min(Tmp, Tmp2);
2478 // We computed what we know about the sign bits as our first
2479 // answer. Now proceed to the generic code that uses
2480 // computeKnownBits, and pick whichever answer is better.
2485 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2486 if (Tmp == 1) return 1; // Early out.
2487 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2488 return std::min(Tmp, Tmp2);
2496 if (Op.getResNo() != 1)
2498 // The boolean result conforms to getBooleanContents. Fall through.
2499 // If setcc returns 0/-1, all bits are sign bits.
2500 // We know that we have an integer-based boolean since these operations
2501 // are only available for integer.
2502 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2503 TargetLowering::ZeroOrNegativeOneBooleanContent)
2507 // If setcc returns 0/-1, all bits are sign bits.
2508 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2509 TargetLowering::ZeroOrNegativeOneBooleanContent)
2514 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2515 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2517 // Handle rotate right by N like a rotate left by 32-N.
2518 if (Op.getOpcode() == ISD::ROTR)
2519 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2521 // If we aren't rotating out all of the known-in sign bits, return the
2522 // number that are left. This handles rotl(sext(x), 1) for example.
2523 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2524 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2528 // Add can have at most one carry bit. Thus we know that the output
2529 // is, at worst, one more bit than the inputs.
2530 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2531 if (Tmp == 1) return 1; // Early out.
2533 // Special case decrementing a value (ADD X, -1):
2534 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2535 if (CRHS->isAllOnesValue()) {
2536 APInt KnownZero, KnownOne;
2537 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2539 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2541 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2544 // If we are subtracting one from a positive number, there is no carry
2545 // out of the result.
2546 if (KnownZero.isNegative())
2550 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2551 if (Tmp2 == 1) return 1;
2552 return std::min(Tmp, Tmp2)-1;
2555 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2556 if (Tmp2 == 1) return 1;
2559 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2560 if (CLHS->isNullValue()) {
2561 APInt KnownZero, KnownOne;
2562 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2563 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2565 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2568 // If the input is known to be positive (the sign bit is known clear),
2569 // the output of the NEG has the same number of sign bits as the input.
2570 if (KnownZero.isNegative())
2573 // Otherwise, we treat this like a SUB.
2576 // Sub can have at most one carry bit. Thus we know that the output
2577 // is, at worst, one more bit than the inputs.
2578 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2579 if (Tmp == 1) return 1; // Early out.
2580 return std::min(Tmp, Tmp2)-1;
2582 // FIXME: it's tricky to do anything useful for this, but it is an important
2583 // case for targets like X86.
2585 case ISD::EXTRACT_ELEMENT: {
2586 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2587 const int BitWidth = Op.getValueType().getSizeInBits();
2589 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2591 // Get reverse index (starting from 1), Op1 value indexes elements from
2592 // little end. Sign starts at big end.
2593 const int rIndex = Items - 1 -
2594 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2596 // If the sign portion ends in our element the substraction gives correct
2597 // result. Otherwise it gives either negative or > bitwidth result
2598 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2602 // If we are looking at the loaded value of the SDNode.
2603 if (Op.getResNo() == 0) {
2604 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2605 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2606 unsigned ExtType = LD->getExtensionType();
2609 case ISD::SEXTLOAD: // '17' bits known
2610 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2611 return VTBits-Tmp+1;
2612 case ISD::ZEXTLOAD: // '16' bits known
2613 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2619 // Allow the target to implement this method for its nodes.
2620 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2621 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2622 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2623 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2624 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2625 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2628 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2629 // use this information.
2630 APInt KnownZero, KnownOne;
2631 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2634 if (KnownZero.isNegative()) { // sign bit is 0
2636 } else if (KnownOne.isNegative()) { // sign bit is 1;
2643 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2644 // the number of identical bits in the top of the input value.
2646 Mask <<= Mask.getBitWidth()-VTBits;
2647 // Return # leading zeros. We use 'min' here in case Val was zero before
2648 // shifting. We don't want to return '64' as for an i32 "0".
2649 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2652 /// isBaseWithConstantOffset - Return true if the specified operand is an
2653 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2654 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2655 /// semantics as an ADD. This handles the equivalence:
2656 /// X|Cst == X+Cst iff X&Cst = 0.
2657 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2658 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2659 !isa<ConstantSDNode>(Op.getOperand(1)))
2662 if (Op.getOpcode() == ISD::OR &&
2663 !MaskedValueIsZero(Op.getOperand(0),
2664 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2671 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2672 // If we're told that NaNs won't happen, assume they won't.
2673 if (getTarget().Options.NoNaNsFPMath)
2676 // If the value is a constant, we can obviously see if it is a NaN or not.
2677 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2678 return !C->getValueAPF().isNaN();
2680 // TODO: Recognize more cases here.
2685 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2686 // If the value is a constant, we can obviously see if it is a zero or not.
2687 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2688 return !C->isZero();
2690 // TODO: Recognize more cases here.
2691 switch (Op.getOpcode()) {
2694 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2695 return !C->isNullValue();
2702 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2703 // Check the obvious case.
2704 if (A == B) return true;
2706 // For for negative and positive zero.
2707 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2708 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2709 if (CA->isZero() && CB->isZero()) return true;
2711 // Otherwise they may not be equal.
2715 /// getNode - Gets or creates the specified node.
2717 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2718 FoldingSetNodeID ID;
2719 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2722 return SDValue(E, 0);
2724 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2725 DL.getDebugLoc(), getVTList(VT));
2726 CSEMap.InsertNode(N, IP);
2729 return SDValue(N, 0);
2732 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2733 EVT VT, SDValue Operand) {
2734 // Constant fold unary operations with an integer constant operand. Even
2735 // opaque constant will be folded, because the folding of unary operations
2736 // doesn't create new constants with different values. Nevertheless, the
2737 // opaque flag is preserved during folding to prevent future folding with
2739 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2740 const APInt &Val = C->getAPIntValue();
2743 case ISD::SIGN_EXTEND:
2744 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2745 C->isTargetOpcode(), C->isOpaque());
2746 case ISD::ANY_EXTEND:
2747 case ISD::ZERO_EXTEND:
2749 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2750 C->isTargetOpcode(), C->isOpaque());
2751 case ISD::UINT_TO_FP:
2752 case ISD::SINT_TO_FP: {
2753 APFloat apf(EVTToAPFloatSemantics(VT),
2754 APInt::getNullValue(VT.getSizeInBits()));
2755 (void)apf.convertFromAPInt(Val,
2756 Opcode==ISD::SINT_TO_FP,
2757 APFloat::rmNearestTiesToEven);
2758 return getConstantFP(apf, VT);
2761 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2762 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), VT);
2763 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2764 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2765 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2766 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2769 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2772 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2775 case ISD::CTLZ_ZERO_UNDEF:
2776 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2779 case ISD::CTTZ_ZERO_UNDEF:
2780 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2785 // Constant fold unary operations with a floating point constant operand.
2786 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2787 APFloat V = C->getValueAPF(); // make copy
2791 return getConstantFP(V, VT);
2794 return getConstantFP(V, VT);
2796 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2797 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2798 return getConstantFP(V, VT);
2802 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2803 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2804 return getConstantFP(V, VT);
2808 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2809 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2810 return getConstantFP(V, VT);
2813 case ISD::FP_EXTEND: {
2815 // This can return overflow, underflow, or inexact; we don't care.
2816 // FIXME need to be more flexible about rounding mode.
2817 (void)V.convert(EVTToAPFloatSemantics(VT),
2818 APFloat::rmNearestTiesToEven, &ignored);
2819 return getConstantFP(V, VT);
2821 case ISD::FP_TO_SINT:
2822 case ISD::FP_TO_UINT: {
2825 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2826 // FIXME need to be more flexible about rounding mode.
2827 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2828 Opcode==ISD::FP_TO_SINT,
2829 APFloat::rmTowardZero, &ignored);
2830 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2832 APInt api(VT.getSizeInBits(), x);
2833 return getConstant(api, VT);
2836 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2837 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), VT);
2838 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2839 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2840 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2841 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2846 // Constant fold unary operations with a vector integer or float operand.
2847 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2848 if (BV->isConstant()) {
2851 // FIXME: Entirely reasonable to perform folding of other unary
2852 // operations here as the need arises.
2859 case ISD::FP_EXTEND:
2861 case ISD::UINT_TO_FP:
2862 case ISD::SINT_TO_FP: {
2863 // Let the above scalar folding handle the folding of each element.
2864 SmallVector<SDValue, 8> Ops;
2865 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2866 SDValue OpN = BV->getOperand(i);
2867 OpN = getNode(Opcode, DL, VT.getVectorElementType(), OpN);
2868 if (OpN.getOpcode() != ISD::UNDEF &&
2869 OpN.getOpcode() != ISD::Constant &&
2870 OpN.getOpcode() != ISD::ConstantFP)
2874 if (Ops.size() == VT.getVectorNumElements())
2875 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2882 unsigned OpOpcode = Operand.getNode()->getOpcode();
2884 case ISD::TokenFactor:
2885 case ISD::MERGE_VALUES:
2886 case ISD::CONCAT_VECTORS:
2887 return Operand; // Factor, merge or concat of one node? No need.
2888 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2889 case ISD::FP_EXTEND:
2890 assert(VT.isFloatingPoint() &&
2891 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2892 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2893 assert((!VT.isVector() ||
2894 VT.getVectorNumElements() ==
2895 Operand.getValueType().getVectorNumElements()) &&
2896 "Vector element count mismatch!");
2897 if (Operand.getOpcode() == ISD::UNDEF)
2898 return getUNDEF(VT);
2900 case ISD::SIGN_EXTEND:
2901 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2902 "Invalid SIGN_EXTEND!");
2903 if (Operand.getValueType() == VT) return Operand; // noop extension
2904 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2905 "Invalid sext node, dst < src!");
2906 assert((!VT.isVector() ||
2907 VT.getVectorNumElements() ==
2908 Operand.getValueType().getVectorNumElements()) &&
2909 "Vector element count mismatch!");
2910 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2911 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2912 else if (OpOpcode == ISD::UNDEF)
2913 // sext(undef) = 0, because the top bits will all be the same.
2914 return getConstant(0, VT);
2916 case ISD::ZERO_EXTEND:
2917 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2918 "Invalid ZERO_EXTEND!");
2919 if (Operand.getValueType() == VT) return Operand; // noop extension
2920 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2921 "Invalid zext node, dst < src!");
2922 assert((!VT.isVector() ||
2923 VT.getVectorNumElements() ==
2924 Operand.getValueType().getVectorNumElements()) &&
2925 "Vector element count mismatch!");
2926 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2927 return getNode(ISD::ZERO_EXTEND, DL, VT,
2928 Operand.getNode()->getOperand(0));
2929 else if (OpOpcode == ISD::UNDEF)
2930 // zext(undef) = 0, because the top bits will be zero.
2931 return getConstant(0, VT);
2933 case ISD::ANY_EXTEND:
2934 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2935 "Invalid ANY_EXTEND!");
2936 if (Operand.getValueType() == VT) return Operand; // noop extension
2937 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2938 "Invalid anyext node, dst < src!");
2939 assert((!VT.isVector() ||
2940 VT.getVectorNumElements() ==
2941 Operand.getValueType().getVectorNumElements()) &&
2942 "Vector element count mismatch!");
2944 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2945 OpOpcode == ISD::ANY_EXTEND)
2946 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2947 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2948 else if (OpOpcode == ISD::UNDEF)
2949 return getUNDEF(VT);
2951 // (ext (trunx x)) -> x
2952 if (OpOpcode == ISD::TRUNCATE) {
2953 SDValue OpOp = Operand.getNode()->getOperand(0);
2954 if (OpOp.getValueType() == VT)
2959 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2960 "Invalid TRUNCATE!");
2961 if (Operand.getValueType() == VT) return Operand; // noop truncate
2962 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2963 "Invalid truncate node, src < dst!");
2964 assert((!VT.isVector() ||
2965 VT.getVectorNumElements() ==
2966 Operand.getValueType().getVectorNumElements()) &&
2967 "Vector element count mismatch!");
2968 if (OpOpcode == ISD::TRUNCATE)
2969 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2970 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2971 OpOpcode == ISD::ANY_EXTEND) {
2972 // If the source is smaller than the dest, we still need an extend.
2973 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2974 .bitsLT(VT.getScalarType()))
2975 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2976 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2977 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2978 return Operand.getNode()->getOperand(0);
2980 if (OpOpcode == ISD::UNDEF)
2981 return getUNDEF(VT);
2984 // Basic sanity checking.
2985 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2986 && "Cannot BITCAST between types of different sizes!");
2987 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2988 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2989 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2990 if (OpOpcode == ISD::UNDEF)
2991 return getUNDEF(VT);
2993 case ISD::SCALAR_TO_VECTOR:
2994 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2995 (VT.getVectorElementType() == Operand.getValueType() ||
2996 (VT.getVectorElementType().isInteger() &&
2997 Operand.getValueType().isInteger() &&
2998 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2999 "Illegal SCALAR_TO_VECTOR node!");
3000 if (OpOpcode == ISD::UNDEF)
3001 return getUNDEF(VT);
3002 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3003 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3004 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3005 Operand.getConstantOperandVal(1) == 0 &&
3006 Operand.getOperand(0).getValueType() == VT)
3007 return Operand.getOperand(0);
3010 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3011 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3012 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3013 Operand.getNode()->getOperand(0));
3014 if (OpOpcode == ISD::FNEG) // --X -> X
3015 return Operand.getNode()->getOperand(0);
3018 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3019 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3024 SDVTList VTs = getVTList(VT);
3025 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3026 FoldingSetNodeID ID;
3027 SDValue Ops[1] = { Operand };
3028 AddNodeIDNode(ID, Opcode, VTs, Ops);
3030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3031 return SDValue(E, 0);
3033 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3034 DL.getDebugLoc(), VTs, Operand);
3035 CSEMap.InsertNode(N, IP);
3037 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3038 DL.getDebugLoc(), VTs, Operand);
3042 return SDValue(N, 0);
3045 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
3046 SDNode *Cst1, SDNode *Cst2) {
3047 // If the opcode is a target-specific ISD node, there's nothing we can
3048 // do here and the operand rules may not line up with the below, so
3050 if (Opcode >= ISD::BUILTIN_OP_END)
3053 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
3054 SmallVector<SDValue, 4> Outputs;
3055 EVT SVT = VT.getScalarType();
3057 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
3058 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
3059 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
3062 if (Scalar1 && Scalar2)
3063 // Scalar instruction.
3064 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
3066 // For vectors extract each constant element into Inputs so we can constant
3067 // fold them individually.
3068 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3069 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3073 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3075 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3076 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3077 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3078 if (!V1 || !V2) // Not a constant, bail.
3081 if (V1->isOpaque() || V2->isOpaque())
3084 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3085 // FIXME: This is valid and could be handled by truncating the APInts.
3086 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3089 Inputs.push_back(std::make_pair(V1, V2));
3093 // We have a number of constant values, constant fold them element by element.
3094 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3095 const APInt &C1 = Inputs[I].first->getAPIntValue();
3096 const APInt &C2 = Inputs[I].second->getAPIntValue();
3100 Outputs.push_back(getConstant(C1 + C2, SVT));
3103 Outputs.push_back(getConstant(C1 - C2, SVT));
3106 Outputs.push_back(getConstant(C1 * C2, SVT));
3109 if (!C2.getBoolValue())
3111 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3114 if (!C2.getBoolValue())
3116 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3119 if (!C2.getBoolValue())
3121 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3124 if (!C2.getBoolValue())
3126 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3129 Outputs.push_back(getConstant(C1 & C2, SVT));
3132 Outputs.push_back(getConstant(C1 | C2, SVT));
3135 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3138 Outputs.push_back(getConstant(C1 << C2, SVT));
3141 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3144 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3147 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3150 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3157 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3158 "Expected a scalar or vector!"));
3160 // Handle the scalar case first.
3162 return Outputs.back();
3164 // We may have a vector type but a scalar result. Create a splat.
3165 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3167 // Build a big vector out of the scalar elements we generated.
3168 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3171 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3172 SDValue N2, bool nuw, bool nsw, bool exact) {
3173 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3174 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3177 case ISD::TokenFactor:
3178 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3179 N2.getValueType() == MVT::Other && "Invalid token factor!");
3180 // Fold trivial token factors.
3181 if (N1.getOpcode() == ISD::EntryToken) return N2;
3182 if (N2.getOpcode() == ISD::EntryToken) return N1;
3183 if (N1 == N2) return N1;
3185 case ISD::CONCAT_VECTORS:
3186 // Concat of UNDEFs is UNDEF.
3187 if (N1.getOpcode() == ISD::UNDEF &&
3188 N2.getOpcode() == ISD::UNDEF)
3189 return getUNDEF(VT);
3191 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3192 // one big BUILD_VECTOR.
3193 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3194 N2.getOpcode() == ISD::BUILD_VECTOR) {
3195 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3196 N1.getNode()->op_end());
3197 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3198 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3202 assert(VT.isInteger() && "This operator does not apply to FP types!");
3203 assert(N1.getValueType() == N2.getValueType() &&
3204 N1.getValueType() == VT && "Binary operator types must match!");
3205 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3206 // worth handling here.
3207 if (N2C && N2C->isNullValue())
3209 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3216 assert(VT.isInteger() && "This operator does not apply to FP types!");
3217 assert(N1.getValueType() == N2.getValueType() &&
3218 N1.getValueType() == VT && "Binary operator types must match!");
3219 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3220 // it's worth handling here.
3221 if (N2C && N2C->isNullValue())
3231 assert(VT.isInteger() && "This operator does not apply to FP types!");
3232 assert(N1.getValueType() == N2.getValueType() &&
3233 N1.getValueType() == VT && "Binary operator types must match!");
3240 if (getTarget().Options.UnsafeFPMath) {
3241 if (Opcode == ISD::FADD) {
3243 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3244 if (CFP->getValueAPF().isZero())
3247 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3248 if (CFP->getValueAPF().isZero())
3250 } else if (Opcode == ISD::FSUB) {
3252 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3253 if (CFP->getValueAPF().isZero())
3255 } else if (Opcode == ISD::FMUL) {
3256 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3259 // If the first operand isn't the constant, try the second
3261 CFP = dyn_cast<ConstantFPSDNode>(N2);
3268 return SDValue(CFP,0);
3270 if (CFP->isExactlyValue(1.0))
3275 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3276 assert(N1.getValueType() == N2.getValueType() &&
3277 N1.getValueType() == VT && "Binary operator types must match!");
3279 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3280 assert(N1.getValueType() == VT &&
3281 N1.getValueType().isFloatingPoint() &&
3282 N2.getValueType().isFloatingPoint() &&
3283 "Invalid FCOPYSIGN!");
3290 assert(VT == N1.getValueType() &&
3291 "Shift operators return type must be the same as their first arg");
3292 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3293 "Shifts only work on integers");
3294 assert((!VT.isVector() || VT == N2.getValueType()) &&
3295 "Vector shift amounts must be in the same as their first arg");
3296 // Verify that the shift amount VT is bit enough to hold valid shift
3297 // amounts. This catches things like trying to shift an i1024 value by an
3298 // i8, which is easy to fall into in generic code that uses
3299 // TLI.getShiftAmount().
3300 assert(N2.getValueType().getSizeInBits() >=
3301 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3302 "Invalid use of small shift amount with oversized value!");
3304 // Always fold shifts of i1 values so the code generator doesn't need to
3305 // handle them. Since we know the size of the shift has to be less than the
3306 // size of the value, the shift/rotate count is guaranteed to be zero.
3309 if (N2C && N2C->isNullValue())
3312 case ISD::FP_ROUND_INREG: {
3313 EVT EVT = cast<VTSDNode>(N2)->getVT();
3314 assert(VT == N1.getValueType() && "Not an inreg round!");
3315 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3316 "Cannot FP_ROUND_INREG integer types");
3317 assert(EVT.isVector() == VT.isVector() &&
3318 "FP_ROUND_INREG type should be vector iff the operand "
3320 assert((!EVT.isVector() ||
3321 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3322 "Vector element counts must match in FP_ROUND_INREG");
3323 assert(EVT.bitsLE(VT) && "Not rounding down!");
3325 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3329 assert(VT.isFloatingPoint() &&
3330 N1.getValueType().isFloatingPoint() &&
3331 VT.bitsLE(N1.getValueType()) &&
3332 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3333 if (N1.getValueType() == VT) return N1; // noop conversion.
3335 case ISD::AssertSext:
3336 case ISD::AssertZext: {
3337 EVT EVT = cast<VTSDNode>(N2)->getVT();
3338 assert(VT == N1.getValueType() && "Not an inreg extend!");
3339 assert(VT.isInteger() && EVT.isInteger() &&
3340 "Cannot *_EXTEND_INREG FP types");
3341 assert(!EVT.isVector() &&
3342 "AssertSExt/AssertZExt type should be the vector element type "
3343 "rather than the vector type!");
3344 assert(EVT.bitsLE(VT) && "Not extending!");
3345 if (VT == EVT) return N1; // noop assertion.
3348 case ISD::SIGN_EXTEND_INREG: {
3349 EVT EVT = cast<VTSDNode>(N2)->getVT();
3350 assert(VT == N1.getValueType() && "Not an inreg extend!");
3351 assert(VT.isInteger() && EVT.isInteger() &&
3352 "Cannot *_EXTEND_INREG FP types");
3353 assert(EVT.isVector() == VT.isVector() &&
3354 "SIGN_EXTEND_INREG type should be vector iff the operand "
3356 assert((!EVT.isVector() ||
3357 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3358 "Vector element counts must match in SIGN_EXTEND_INREG");
3359 assert(EVT.bitsLE(VT) && "Not extending!");
3360 if (EVT == VT) return N1; // Not actually extending
3363 APInt Val = N1C->getAPIntValue();
3364 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3365 Val <<= Val.getBitWidth()-FromBits;
3366 Val = Val.ashr(Val.getBitWidth()-FromBits);
3367 return getConstant(Val, VT);
3371 case ISD::EXTRACT_VECTOR_ELT:
3372 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3373 if (N1.getOpcode() == ISD::UNDEF)
3374 return getUNDEF(VT);
3376 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3377 // expanding copies of large vectors from registers.
3379 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3380 N1.getNumOperands() > 0) {
3382 N1.getOperand(0).getValueType().getVectorNumElements();
3383 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3384 N1.getOperand(N2C->getZExtValue() / Factor),
3385 getConstant(N2C->getZExtValue() % Factor,
3386 N2.getValueType()));
3389 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3390 // expanding large vector constants.
3391 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3392 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3394 if (VT != Elt.getValueType())
3395 // If the vector element type is not legal, the BUILD_VECTOR operands
3396 // are promoted and implicitly truncated, and the result implicitly
3397 // extended. Make that explicit here.
3398 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3403 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3404 // operations are lowered to scalars.
3405 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3406 // If the indices are the same, return the inserted element else
3407 // if the indices are known different, extract the element from
3408 // the original vector.
3409 SDValue N1Op2 = N1.getOperand(2);
3410 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3412 if (N1Op2C && N2C) {
3413 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3414 if (VT == N1.getOperand(1).getValueType())
3415 return N1.getOperand(1);
3417 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3420 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3424 case ISD::EXTRACT_ELEMENT:
3425 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3426 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3427 (N1.getValueType().isInteger() == VT.isInteger()) &&
3428 N1.getValueType() != VT &&
3429 "Wrong types for EXTRACT_ELEMENT!");
3431 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3432 // 64-bit integers into 32-bit parts. Instead of building the extract of
3433 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3434 if (N1.getOpcode() == ISD::BUILD_PAIR)
3435 return N1.getOperand(N2C->getZExtValue());
3437 // EXTRACT_ELEMENT of a constant int is also very common.
3438 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3439 unsigned ElementSize = VT.getSizeInBits();
3440 unsigned Shift = ElementSize * N2C->getZExtValue();
3441 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3442 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3445 case ISD::EXTRACT_SUBVECTOR: {
3447 if (VT.isSimple() && N1.getValueType().isSimple()) {
3448 assert(VT.isVector() && N1.getValueType().isVector() &&
3449 "Extract subvector VTs must be a vectors!");
3450 assert(VT.getVectorElementType() ==
3451 N1.getValueType().getVectorElementType() &&
3452 "Extract subvector VTs must have the same element type!");
3453 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3454 "Extract subvector must be from larger vector to smaller vector!");
3456 if (isa<ConstantSDNode>(Index.getNode())) {
3457 assert((VT.getVectorNumElements() +
3458 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3459 <= N1.getValueType().getVectorNumElements())
3460 && "Extract subvector overflow!");
3463 // Trivial extraction.
3464 if (VT.getSimpleVT() == N1.getSimpleValueType())
3471 // Perform trivial constant folding.
3473 FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()))
3476 // Canonicalize constant to RHS if commutative.
3477 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3478 std::swap(N1C, N2C);
3482 // Constant fold FP operations.
3483 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3484 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3485 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3487 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3488 // Canonicalize constant to RHS if commutative.
3489 std::swap(N1CFP, N2CFP);
3492 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3493 APFloat::opStatus s;
3496 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3497 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3498 return getConstantFP(V1, VT);
3501 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3502 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3503 return getConstantFP(V1, VT);
3506 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3507 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3508 return getConstantFP(V1, VT);
3511 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3512 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3513 s!=APFloat::opDivByZero)) {
3514 return getConstantFP(V1, VT);
3518 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3519 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3520 s!=APFloat::opDivByZero)) {
3521 return getConstantFP(V1, VT);
3524 case ISD::FCOPYSIGN:
3526 return getConstantFP(V1, VT);
3531 if (Opcode == ISD::FP_ROUND) {
3532 APFloat V = N1CFP->getValueAPF(); // make copy
3534 // This can return overflow, underflow, or inexact; we don't care.
3535 // FIXME need to be more flexible about rounding mode.
3536 (void)V.convert(EVTToAPFloatSemantics(VT),
3537 APFloat::rmNearestTiesToEven, &ignored);
3538 return getConstantFP(V, VT);
3542 // Canonicalize an UNDEF to the RHS, even over a constant.
3543 if (N1.getOpcode() == ISD::UNDEF) {
3544 if (isCommutativeBinOp(Opcode)) {
3548 case ISD::FP_ROUND_INREG:
3549 case ISD::SIGN_EXTEND_INREG:
3555 return N1; // fold op(undef, arg2) -> undef
3563 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3564 // For vectors, we can't easily build an all zero vector, just return
3571 // Fold a bunch of operators when the RHS is undef.
3572 if (N2.getOpcode() == ISD::UNDEF) {
3575 if (N1.getOpcode() == ISD::UNDEF)
3576 // Handle undef ^ undef -> 0 special case. This is a common
3578 return getConstant(0, VT);
3588 return N2; // fold op(arg1, undef) -> undef
3594 if (getTarget().Options.UnsafeFPMath)
3602 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3603 // For vectors, we can't easily build an all zero vector, just return
3608 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3609 // For vectors, we can't easily build an all one vector, just return
3617 // Memoize this node if possible.
3619 SDVTList VTs = getVTList(VT);
3620 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3621 if (VT != MVT::Glue) {
3622 SDValue Ops[] = {N1, N2};
3623 FoldingSetNodeID ID;
3624 AddNodeIDNode(ID, Opcode, VTs, Ops);
3626 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3629 return SDValue(E, 0);
3631 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3633 CSEMap.InsertNode(N, IP);
3635 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3639 return SDValue(N, 0);
3642 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3643 SDValue N1, SDValue N2, SDValue N3) {
3644 // Perform various simplifications.
3645 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3648 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3649 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3650 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3651 if (N1CFP && N2CFP && N3CFP) {
3652 APFloat V1 = N1CFP->getValueAPF();
3653 const APFloat &V2 = N2CFP->getValueAPF();
3654 const APFloat &V3 = N3CFP->getValueAPF();
3655 APFloat::opStatus s =
3656 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3657 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3658 return getConstantFP(V1, VT);
3662 case ISD::CONCAT_VECTORS:
3663 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3664 // one big BUILD_VECTOR.
3665 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3666 N2.getOpcode() == ISD::BUILD_VECTOR &&
3667 N3.getOpcode() == ISD::BUILD_VECTOR) {
3668 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3669 N1.getNode()->op_end());
3670 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3671 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3672 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3676 // Use FoldSetCC to simplify SETCC's.
3677 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3678 if (Simp.getNode()) return Simp;
3683 if (N1C->getZExtValue())
3684 return N2; // select true, X, Y -> X
3685 return N3; // select false, X, Y -> Y
3688 if (N2 == N3) return N2; // select C, X, X -> X
3690 case ISD::VECTOR_SHUFFLE:
3691 llvm_unreachable("should use getVectorShuffle constructor!");
3692 case ISD::INSERT_SUBVECTOR: {
3694 if (VT.isSimple() && N1.getValueType().isSimple()
3695 && N2.getValueType().isSimple()) {
3696 assert(VT.isVector() && N1.getValueType().isVector() &&
3697 N2.getValueType().isVector() &&
3698 "Insert subvector VTs must be a vectors");
3699 assert(VT == N1.getValueType() &&
3700 "Dest and insert subvector source types must match!");
3701 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3702 "Insert subvector must be from smaller vector to larger vector!");
3703 if (isa<ConstantSDNode>(Index.getNode())) {
3704 assert((N2.getValueType().getVectorNumElements() +
3705 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3706 <= VT.getVectorNumElements())
3707 && "Insert subvector overflow!");
3710 // Trivial insertion.
3711 if (VT.getSimpleVT() == N2.getSimpleValueType())
3717 // Fold bit_convert nodes from a type to themselves.
3718 if (N1.getValueType() == VT)
3723 // Memoize node if it doesn't produce a flag.
3725 SDVTList VTs = getVTList(VT);
3726 if (VT != MVT::Glue) {
3727 SDValue Ops[] = { N1, N2, N3 };
3728 FoldingSetNodeID ID;
3729 AddNodeIDNode(ID, Opcode, VTs, Ops);
3731 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3732 return SDValue(E, 0);
3734 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3735 DL.getDebugLoc(), VTs, N1, N2, N3);
3736 CSEMap.InsertNode(N, IP);
3738 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3739 DL.getDebugLoc(), VTs, N1, N2, N3);
3743 return SDValue(N, 0);
3746 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3747 SDValue N1, SDValue N2, SDValue N3,
3749 SDValue Ops[] = { N1, N2, N3, N4 };
3750 return getNode(Opcode, DL, VT, Ops);
3753 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3754 SDValue N1, SDValue N2, SDValue N3,
3755 SDValue N4, SDValue N5) {
3756 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3757 return getNode(Opcode, DL, VT, Ops);
3760 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3761 /// the incoming stack arguments to be loaded from the stack.
3762 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3763 SmallVector<SDValue, 8> ArgChains;
3765 // Include the original chain at the beginning of the list. When this is
3766 // used by target LowerCall hooks, this helps legalize find the
3767 // CALLSEQ_BEGIN node.
3768 ArgChains.push_back(Chain);
3770 // Add a chain value for each stack argument.
3771 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3772 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3773 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3774 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3775 if (FI->getIndex() < 0)
3776 ArgChains.push_back(SDValue(L, 1));
3778 // Build a tokenfactor for all the chains.
3779 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3782 /// getMemsetValue - Vectorized representation of the memset value
3784 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3786 assert(Value.getOpcode() != ISD::UNDEF);
3788 unsigned NumBits = VT.getScalarType().getSizeInBits();
3789 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3790 assert(C->getAPIntValue().getBitWidth() == 8);
3791 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3793 return DAG.getConstant(Val, VT);
3794 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3797 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
3798 EVT IntVT = VT.getScalarType();
3799 if (!IntVT.isInteger())
3800 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
3802 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
3804 // Use a multiplication with 0x010101... to extend the input to the
3806 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3807 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
3808 DAG.getConstant(Magic, IntVT));
3811 if (VT != Value.getValueType() && !VT.isInteger())
3812 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
3813 if (VT != Value.getValueType()) {
3814 assert(VT.getVectorElementType() == Value.getValueType() &&
3815 "value type should be one vector element here");
3816 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
3817 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
3823 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3824 /// used when a memcpy is turned into a memset when the source is a constant
3826 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3827 const TargetLowering &TLI, StringRef Str) {
3828 // Handle vector with all elements zero.
3831 return DAG.getConstant(0, VT);
3832 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3833 return DAG.getConstantFP(0.0, VT);
3834 else if (VT.isVector()) {
3835 unsigned NumElts = VT.getVectorNumElements();
3836 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3837 return DAG.getNode(ISD::BITCAST, dl, VT,
3838 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3841 llvm_unreachable("Expected type!");
3844 assert(!VT.isVector() && "Can't handle vector type here!");
3845 unsigned NumVTBits = VT.getSizeInBits();
3846 unsigned NumVTBytes = NumVTBits / 8;
3847 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3849 APInt Val(NumVTBits, 0);
3850 if (TLI.isLittleEndian()) {
3851 for (unsigned i = 0; i != NumBytes; ++i)
3852 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3854 for (unsigned i = 0; i != NumBytes; ++i)
3855 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3858 // If the "cost" of materializing the integer immediate is less than the cost
3859 // of a load, then it is cost effective to turn the load into the immediate.
3860 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3861 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3862 return DAG.getConstant(Val, VT);
3863 return SDValue(nullptr, 0);
3866 /// getMemBasePlusOffset - Returns base and offset node for the
3868 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3869 SelectionDAG &DAG) {
3870 EVT VT = Base.getValueType();
3871 return DAG.getNode(ISD::ADD, dl,
3872 VT, Base, DAG.getConstant(Offset, VT));
3875 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3877 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3878 unsigned SrcDelta = 0;
3879 GlobalAddressSDNode *G = nullptr;
3880 if (Src.getOpcode() == ISD::GlobalAddress)
3881 G = cast<GlobalAddressSDNode>(Src);
3882 else if (Src.getOpcode() == ISD::ADD &&
3883 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3884 Src.getOperand(1).getOpcode() == ISD::Constant) {
3885 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3886 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3891 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3894 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3895 /// to replace the memset / memcpy. Return true if the number of memory ops
3896 /// is below the threshold. It returns the types of the sequence of
3897 /// memory ops to perform memset / memcpy by reference.
3898 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3899 unsigned Limit, uint64_t Size,
3900 unsigned DstAlign, unsigned SrcAlign,
3906 const TargetLowering &TLI) {
3907 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3908 "Expecting memcpy / memset source to meet alignment requirement!");
3909 // If 'SrcAlign' is zero, that means the memory operation does not need to
3910 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3911 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3912 // is the specified alignment of the memory operation. If it is zero, that
3913 // means it's possible to change the alignment of the destination.
3914 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3915 // not need to be loaded.
3916 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3917 IsMemset, ZeroMemset, MemcpyStrSrc,
3918 DAG.getMachineFunction());
3920 if (VT == MVT::Other) {
3922 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3923 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3924 VT = TLI.getPointerTy();
3926 switch (DstAlign & 7) {
3927 case 0: VT = MVT::i64; break;
3928 case 4: VT = MVT::i32; break;
3929 case 2: VT = MVT::i16; break;
3930 default: VT = MVT::i8; break;
3935 while (!TLI.isTypeLegal(LVT))
3936 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3937 assert(LVT.isInteger());
3943 unsigned NumMemOps = 0;
3945 unsigned VTSize = VT.getSizeInBits() / 8;
3946 while (VTSize > Size) {
3947 // For now, only use non-vector load / store's for the left-over pieces.
3952 if (VT.isVector() || VT.isFloatingPoint()) {
3953 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3954 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3955 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3957 else if (NewVT == MVT::i64 &&
3958 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3959 TLI.isSafeMemOpType(MVT::f64)) {
3960 // i64 is usually not legal on 32-bit targets, but f64 may be.
3968 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3969 if (NewVT == MVT::i8)
3971 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3973 NewVTSize = NewVT.getSizeInBits() / 8;
3975 // If the new VT cannot cover all of the remaining bits, then consider
3976 // issuing a (or a pair of) unaligned and overlapping load / store.
3977 // FIXME: Only does this for 64-bit or more since we don't have proper
3978 // cost model for unaligned load / store.
3981 if (NumMemOps && AllowOverlap &&
3982 VTSize >= 8 && NewVTSize < Size &&
3983 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3991 if (++NumMemOps > Limit)
3994 MemOps.push_back(VT);
4001 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4002 SDValue Chain, SDValue Dst,
4003 SDValue Src, uint64_t Size,
4004 unsigned Align, bool isVol,
4006 MachinePointerInfo DstPtrInfo,
4007 MachinePointerInfo SrcPtrInfo) {
4008 // Turn a memcpy of undef to nop.
4009 if (Src.getOpcode() == ISD::UNDEF)
4012 // Expand memcpy to a series of load and store ops if the size operand falls
4013 // below a certain threshold.
4014 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4015 // rather than maybe a humongous number of loads and stores.
4016 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4017 std::vector<EVT> MemOps;
4018 bool DstAlignCanChange = false;
4019 MachineFunction &MF = DAG.getMachineFunction();
4020 MachineFrameInfo *MFI = MF.getFrameInfo();
4021 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4022 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4023 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4024 DstAlignCanChange = true;
4025 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4026 if (Align > SrcAlign)
4029 bool CopyFromStr = isMemSrcFromString(Src, Str);
4030 bool isZeroStr = CopyFromStr && Str.empty();
4031 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4033 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4034 (DstAlignCanChange ? 0 : Align),
4035 (isZeroStr ? 0 : SrcAlign),
4036 false, false, CopyFromStr, true, DAG, TLI))
4039 if (DstAlignCanChange) {
4040 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4041 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4043 // Don't promote to an alignment that would require dynamic stack
4045 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4046 if (!TRI->needsStackRealignment(MF))
4047 while (NewAlign > Align &&
4048 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
4051 if (NewAlign > Align) {
4052 // Give the stack frame object a larger alignment if needed.
4053 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4054 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4059 SmallVector<SDValue, 8> OutChains;
4060 unsigned NumMemOps = MemOps.size();
4061 uint64_t SrcOff = 0, DstOff = 0;
4062 for (unsigned i = 0; i != NumMemOps; ++i) {
4064 unsigned VTSize = VT.getSizeInBits() / 8;
4065 SDValue Value, Store;
4067 if (VTSize > Size) {
4068 // Issuing an unaligned load / store pair that overlaps with the previous
4069 // pair. Adjust the offset accordingly.
4070 assert(i == NumMemOps-1 && i != 0);
4071 SrcOff -= VTSize - Size;
4072 DstOff -= VTSize - Size;
4076 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4077 // It's unlikely a store of a vector immediate can be done in a single
4078 // instruction. It would require a load from a constantpool first.
4079 // We only handle zero vectors here.
4080 // FIXME: Handle other cases where store of vector immediate is done in
4081 // a single instruction.
4082 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4083 if (Value.getNode())
4084 Store = DAG.getStore(Chain, dl, Value,
4085 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4086 DstPtrInfo.getWithOffset(DstOff), isVol,
4090 if (!Store.getNode()) {
4091 // The type might not be legal for the target. This should only happen
4092 // if the type is smaller than a legal type, as on PPC, so the right
4093 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4094 // to Load/Store if NVT==VT.
4095 // FIXME does the case above also need this?
4096 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4097 assert(NVT.bitsGE(VT));
4098 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4099 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4100 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4101 false, MinAlign(SrcAlign, SrcOff));
4102 Store = DAG.getTruncStore(Chain, dl, Value,
4103 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4104 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4107 OutChains.push_back(Store);
4113 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4116 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4117 SDValue Chain, SDValue Dst,
4118 SDValue Src, uint64_t Size,
4119 unsigned Align, bool isVol,
4121 MachinePointerInfo DstPtrInfo,
4122 MachinePointerInfo SrcPtrInfo) {
4123 // Turn a memmove of undef to nop.
4124 if (Src.getOpcode() == ISD::UNDEF)
4127 // Expand memmove to a series of load and store ops if the size operand falls
4128 // below a certain threshold.
4129 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4130 std::vector<EVT> MemOps;
4131 bool DstAlignCanChange = false;
4132 MachineFunction &MF = DAG.getMachineFunction();
4133 MachineFrameInfo *MFI = MF.getFrameInfo();
4134 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4135 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4136 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4137 DstAlignCanChange = true;
4138 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4139 if (Align > SrcAlign)
4141 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4143 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4144 (DstAlignCanChange ? 0 : Align), SrcAlign,
4145 false, false, false, false, DAG, TLI))
4148 if (DstAlignCanChange) {
4149 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4150 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4151 if (NewAlign > Align) {
4152 // Give the stack frame object a larger alignment if needed.
4153 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4154 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4159 uint64_t SrcOff = 0, DstOff = 0;
4160 SmallVector<SDValue, 8> LoadValues;
4161 SmallVector<SDValue, 8> LoadChains;
4162 SmallVector<SDValue, 8> OutChains;
4163 unsigned NumMemOps = MemOps.size();
4164 for (unsigned i = 0; i < NumMemOps; i++) {
4166 unsigned VTSize = VT.getSizeInBits() / 8;
4169 Value = DAG.getLoad(VT, dl, Chain,
4170 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4171 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4172 false, false, SrcAlign);
4173 LoadValues.push_back(Value);
4174 LoadChains.push_back(Value.getValue(1));
4177 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4179 for (unsigned i = 0; i < NumMemOps; i++) {
4181 unsigned VTSize = VT.getSizeInBits() / 8;
4184 Store = DAG.getStore(Chain, dl, LoadValues[i],
4185 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4186 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4187 OutChains.push_back(Store);
4191 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4194 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4197 /// \param DAG Selection DAG where lowered code is placed.
4198 /// \param dl Link to corresponding IR location.
4199 /// \param Chain Control flow dependency.
4200 /// \param Dst Pointer to destination memory location.
4201 /// \param Src Value of byte to write into the memory.
4202 /// \param Size Number of bytes to write.
4203 /// \param Align Alignment of the destination in bytes.
4204 /// \param isVol True if destination is volatile.
4205 /// \param DstPtrInfo IR information on the memory pointer.
4206 /// \returns New head in the control flow, if lowering was successful, empty
4207 /// SDValue otherwise.
4209 /// The function tries to replace 'llvm.memset' intrinsic with several store
4210 /// operations and value calculation code. This is usually profitable for small
4212 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4213 SDValue Chain, SDValue Dst,
4214 SDValue Src, uint64_t Size,
4215 unsigned Align, bool isVol,
4216 MachinePointerInfo DstPtrInfo) {
4217 // Turn a memset of undef to nop.
4218 if (Src.getOpcode() == ISD::UNDEF)
4221 // Expand memset to a series of load/store ops if the size operand
4222 // falls below a certain threshold.
4223 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4224 std::vector<EVT> MemOps;
4225 bool DstAlignCanChange = false;
4226 MachineFunction &MF = DAG.getMachineFunction();
4227 MachineFrameInfo *MFI = MF.getFrameInfo();
4228 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4229 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4230 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4231 DstAlignCanChange = true;
4233 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4234 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4235 Size, (DstAlignCanChange ? 0 : Align), 0,
4236 true, IsZeroVal, false, true, DAG, TLI))
4239 if (DstAlignCanChange) {
4240 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4241 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4242 if (NewAlign > Align) {
4243 // Give the stack frame object a larger alignment if needed.
4244 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4245 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4250 SmallVector<SDValue, 8> OutChains;
4251 uint64_t DstOff = 0;
4252 unsigned NumMemOps = MemOps.size();
4254 // Find the largest store and generate the bit pattern for it.
4255 EVT LargestVT = MemOps[0];
4256 for (unsigned i = 1; i < NumMemOps; i++)
4257 if (MemOps[i].bitsGT(LargestVT))
4258 LargestVT = MemOps[i];
4259 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4261 for (unsigned i = 0; i < NumMemOps; i++) {
4263 unsigned VTSize = VT.getSizeInBits() / 8;
4264 if (VTSize > Size) {
4265 // Issuing an unaligned load / store pair that overlaps with the previous
4266 // pair. Adjust the offset accordingly.
4267 assert(i == NumMemOps-1 && i != 0);
4268 DstOff -= VTSize - Size;
4271 // If this store is smaller than the largest store see whether we can get
4272 // the smaller value for free with a truncate.
4273 SDValue Value = MemSetValue;
4274 if (VT.bitsLT(LargestVT)) {
4275 if (!LargestVT.isVector() && !VT.isVector() &&
4276 TLI.isTruncateFree(LargestVT, VT))
4277 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4279 Value = getMemsetValue(Src, VT, DAG, dl);
4281 assert(Value.getValueType() == VT && "Value with wrong type.");
4282 SDValue Store = DAG.getStore(Chain, dl, Value,
4283 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4284 DstPtrInfo.getWithOffset(DstOff),
4285 isVol, false, Align);
4286 OutChains.push_back(Store);
4287 DstOff += VT.getSizeInBits() / 8;
4291 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4294 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4295 SDValue Src, SDValue Size,
4296 unsigned Align, bool isVol, bool AlwaysInline,
4297 MachinePointerInfo DstPtrInfo,
4298 MachinePointerInfo SrcPtrInfo) {
4299 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4301 // Check to see if we should lower the memcpy to loads and stores first.
4302 // For cases within the target-specified limits, this is the best choice.
4303 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4305 // Memcpy with size zero? Just return the original chain.
4306 if (ConstantSize->isNullValue())
4309 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4310 ConstantSize->getZExtValue(),Align,
4311 isVol, false, DstPtrInfo, SrcPtrInfo);
4312 if (Result.getNode())
4316 // Then check to see if we should lower the memcpy with target-specific
4317 // code. If the target chooses to do this, this is the next best.
4319 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4320 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4321 DstPtrInfo, SrcPtrInfo);
4322 if (Result.getNode())
4326 // If we really need inline code and the target declined to provide it,
4327 // use a (potentially long) sequence of loads and stores.
4329 assert(ConstantSize && "AlwaysInline requires a constant size!");
4330 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4331 ConstantSize->getZExtValue(), Align, isVol,
4332 true, DstPtrInfo, SrcPtrInfo);
4335 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4336 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4337 // respect volatile, so they may do things like read or write memory
4338 // beyond the given memory regions. But fixing this isn't easy, and most
4339 // people don't care.
4341 // Emit a library call.
4342 TargetLowering::ArgListTy Args;
4343 TargetLowering::ArgListEntry Entry;
4344 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4345 Entry.Node = Dst; Args.push_back(Entry);
4346 Entry.Node = Src; Args.push_back(Entry);
4347 Entry.Node = Size; Args.push_back(Entry);
4348 // FIXME: pass in SDLoc
4349 TargetLowering::CallLoweringInfo CLI(*this);
4350 CLI.setDebugLoc(dl).setChain(Chain)
4351 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4352 Type::getVoidTy(*getContext()),
4353 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4354 TLI->getPointerTy()), std::move(Args), 0)
4355 .setDiscardResult();
4356 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4358 return CallResult.second;
4361 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4362 SDValue Src, SDValue Size,
4363 unsigned Align, bool isVol,
4364 MachinePointerInfo DstPtrInfo,
4365 MachinePointerInfo SrcPtrInfo) {
4366 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4368 // Check to see if we should lower the memmove to loads and stores first.
4369 // For cases within the target-specified limits, this is the best choice.
4370 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4372 // Memmove with size zero? Just return the original chain.
4373 if (ConstantSize->isNullValue())
4377 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4378 ConstantSize->getZExtValue(), Align, isVol,
4379 false, DstPtrInfo, SrcPtrInfo);
4380 if (Result.getNode())
4384 // Then check to see if we should lower the memmove with target-specific
4385 // code. If the target chooses to do this, this is the next best.
4387 SDValue Result = TSI->EmitTargetCodeForMemmove(
4388 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4389 if (Result.getNode())
4393 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4394 // not be safe. See memcpy above for more details.
4396 // Emit a library call.
4397 TargetLowering::ArgListTy Args;
4398 TargetLowering::ArgListEntry Entry;
4399 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4400 Entry.Node = Dst; Args.push_back(Entry);
4401 Entry.Node = Src; Args.push_back(Entry);
4402 Entry.Node = Size; Args.push_back(Entry);
4403 // FIXME: pass in SDLoc
4404 TargetLowering::CallLoweringInfo CLI(*this);
4405 CLI.setDebugLoc(dl).setChain(Chain)
4406 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4407 Type::getVoidTy(*getContext()),
4408 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4409 TLI->getPointerTy()), std::move(Args), 0)
4410 .setDiscardResult();
4411 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4413 return CallResult.second;
4416 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4417 SDValue Src, SDValue Size,
4418 unsigned Align, bool isVol,
4419 MachinePointerInfo DstPtrInfo) {
4420 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4422 // Check to see if we should lower the memset to stores first.
4423 // For cases within the target-specified limits, this is the best choice.
4424 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4426 // Memset with size zero? Just return the original chain.
4427 if (ConstantSize->isNullValue())
4431 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4432 Align, isVol, DstPtrInfo);
4434 if (Result.getNode())
4438 // Then check to see if we should lower the memset with target-specific
4439 // code. If the target chooses to do this, this is the next best.
4441 SDValue Result = TSI->EmitTargetCodeForMemset(
4442 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4443 if (Result.getNode())
4447 // Emit a library call.
4448 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4449 TargetLowering::ArgListTy Args;
4450 TargetLowering::ArgListEntry Entry;
4451 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4452 Args.push_back(Entry);
4454 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4455 Args.push_back(Entry);
4457 Entry.Ty = IntPtrTy;
4458 Args.push_back(Entry);
4460 // FIXME: pass in SDLoc
4461 TargetLowering::CallLoweringInfo CLI(*this);
4462 CLI.setDebugLoc(dl).setChain(Chain)
4463 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4464 Type::getVoidTy(*getContext()),
4465 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4466 TLI->getPointerTy()), std::move(Args), 0)
4467 .setDiscardResult();
4469 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4470 return CallResult.second;
4473 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4474 SDVTList VTList, ArrayRef<SDValue> Ops,
4475 MachineMemOperand *MMO,
4476 AtomicOrdering SuccessOrdering,
4477 AtomicOrdering FailureOrdering,
4478 SynchronizationScope SynchScope) {
4479 FoldingSetNodeID ID;
4480 ID.AddInteger(MemVT.getRawBits());
4481 AddNodeIDNode(ID, Opcode, VTList, Ops);
4482 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4484 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4485 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4486 return SDValue(E, 0);
4489 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4490 // SDNode doesn't have access to it. This memory will be "leaked" when
4491 // the node is deallocated, but recovered when the allocator is released.
4492 // If the number of operands is less than 5 we use AtomicSDNode's internal
4494 unsigned NumOps = Ops.size();
4495 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4498 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4499 dl.getDebugLoc(), VTList, MemVT,
4500 Ops.data(), DynOps, NumOps, MMO,
4501 SuccessOrdering, FailureOrdering,
4503 CSEMap.InsertNode(N, IP);
4505 return SDValue(N, 0);
4508 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4509 SDVTList VTList, ArrayRef<SDValue> Ops,
4510 MachineMemOperand *MMO,
4511 AtomicOrdering Ordering,
4512 SynchronizationScope SynchScope) {
4513 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4514 Ordering, SynchScope);
4517 SDValue SelectionDAG::getAtomicCmpSwap(
4518 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4519 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4520 unsigned Alignment, AtomicOrdering SuccessOrdering,
4521 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4522 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4523 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4524 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4526 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4527 Alignment = getEVTAlignment(MemVT);
4529 MachineFunction &MF = getMachineFunction();
4531 // FIXME: Volatile isn't really correct; we should keep track of atomic
4532 // orderings in the memoperand.
4533 unsigned Flags = MachineMemOperand::MOVolatile;
4534 Flags |= MachineMemOperand::MOLoad;
4535 Flags |= MachineMemOperand::MOStore;
4537 MachineMemOperand *MMO =
4538 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4540 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4541 SuccessOrdering, FailureOrdering, SynchScope);
4544 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4545 SDVTList VTs, SDValue Chain, SDValue Ptr,
4546 SDValue Cmp, SDValue Swp,
4547 MachineMemOperand *MMO,
4548 AtomicOrdering SuccessOrdering,
4549 AtomicOrdering FailureOrdering,
4550 SynchronizationScope SynchScope) {
4551 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4552 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4553 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4555 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4556 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4557 SuccessOrdering, FailureOrdering, SynchScope);
4560 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4562 SDValue Ptr, SDValue Val,
4563 const Value* PtrVal,
4565 AtomicOrdering Ordering,
4566 SynchronizationScope SynchScope) {
4567 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4568 Alignment = getEVTAlignment(MemVT);
4570 MachineFunction &MF = getMachineFunction();
4571 // An atomic store does not load. An atomic load does not store.
4572 // (An atomicrmw obviously both loads and stores.)
4573 // For now, atomics are considered to be volatile always, and they are
4575 // FIXME: Volatile isn't really correct; we should keep track of atomic
4576 // orderings in the memoperand.
4577 unsigned Flags = MachineMemOperand::MOVolatile;
4578 if (Opcode != ISD::ATOMIC_STORE)
4579 Flags |= MachineMemOperand::MOLoad;
4580 if (Opcode != ISD::ATOMIC_LOAD)
4581 Flags |= MachineMemOperand::MOStore;
4583 MachineMemOperand *MMO =
4584 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4585 MemVT.getStoreSize(), Alignment);
4587 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4588 Ordering, SynchScope);
4591 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4593 SDValue Ptr, SDValue Val,
4594 MachineMemOperand *MMO,
4595 AtomicOrdering Ordering,
4596 SynchronizationScope SynchScope) {
4597 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4598 Opcode == ISD::ATOMIC_LOAD_SUB ||
4599 Opcode == ISD::ATOMIC_LOAD_AND ||
4600 Opcode == ISD::ATOMIC_LOAD_OR ||
4601 Opcode == ISD::ATOMIC_LOAD_XOR ||
4602 Opcode == ISD::ATOMIC_LOAD_NAND ||
4603 Opcode == ISD::ATOMIC_LOAD_MIN ||
4604 Opcode == ISD::ATOMIC_LOAD_MAX ||
4605 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4606 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4607 Opcode == ISD::ATOMIC_SWAP ||
4608 Opcode == ISD::ATOMIC_STORE) &&
4609 "Invalid Atomic Op");
4611 EVT VT = Val.getValueType();
4613 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4614 getVTList(VT, MVT::Other);
4615 SDValue Ops[] = {Chain, Ptr, Val};
4616 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4619 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4620 EVT VT, SDValue Chain,
4622 MachineMemOperand *MMO,
4623 AtomicOrdering Ordering,
4624 SynchronizationScope SynchScope) {
4625 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4627 SDVTList VTs = getVTList(VT, MVT::Other);
4628 SDValue Ops[] = {Chain, Ptr};
4629 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4632 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4633 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4634 if (Ops.size() == 1)
4637 SmallVector<EVT, 4> VTs;
4638 VTs.reserve(Ops.size());
4639 for (unsigned i = 0; i < Ops.size(); ++i)
4640 VTs.push_back(Ops[i].getValueType());
4641 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4645 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4646 ArrayRef<SDValue> Ops,
4647 EVT MemVT, MachinePointerInfo PtrInfo,
4648 unsigned Align, bool Vol,
4649 bool ReadMem, bool WriteMem, unsigned Size) {
4650 if (Align == 0) // Ensure that codegen never sees alignment 0
4651 Align = getEVTAlignment(MemVT);
4653 MachineFunction &MF = getMachineFunction();
4656 Flags |= MachineMemOperand::MOStore;
4658 Flags |= MachineMemOperand::MOLoad;
4660 Flags |= MachineMemOperand::MOVolatile;
4662 Size = MemVT.getStoreSize();
4663 MachineMemOperand *MMO =
4664 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4666 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4670 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4671 ArrayRef<SDValue> Ops, EVT MemVT,
4672 MachineMemOperand *MMO) {
4673 assert((Opcode == ISD::INTRINSIC_VOID ||
4674 Opcode == ISD::INTRINSIC_W_CHAIN ||
4675 Opcode == ISD::PREFETCH ||
4676 Opcode == ISD::LIFETIME_START ||
4677 Opcode == ISD::LIFETIME_END ||
4678 (Opcode <= INT_MAX &&
4679 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4680 "Opcode is not a memory-accessing opcode!");
4682 // Memoize the node unless it returns a flag.
4683 MemIntrinsicSDNode *N;
4684 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4685 FoldingSetNodeID ID;
4686 AddNodeIDNode(ID, Opcode, VTList, Ops);
4687 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4689 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4690 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4691 return SDValue(E, 0);
4694 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4695 dl.getDebugLoc(), VTList, Ops,
4697 CSEMap.InsertNode(N, IP);
4699 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4700 dl.getDebugLoc(), VTList, Ops,
4704 return SDValue(N, 0);
4707 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4708 /// MachinePointerInfo record from it. This is particularly useful because the
4709 /// code generator has many cases where it doesn't bother passing in a
4710 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4711 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4712 // If this is FI+Offset, we can model it.
4713 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4714 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4716 // If this is (FI+Offset1)+Offset2, we can model it.
4717 if (Ptr.getOpcode() != ISD::ADD ||
4718 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4719 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4720 return MachinePointerInfo();
4722 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4723 return MachinePointerInfo::getFixedStack(FI, Offset+
4724 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4727 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4728 /// MachinePointerInfo record from it. This is particularly useful because the
4729 /// code generator has many cases where it doesn't bother passing in a
4730 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4731 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4732 // If the 'Offset' value isn't a constant, we can't handle this.
4733 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4734 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4735 if (OffsetOp.getOpcode() == ISD::UNDEF)
4736 return InferPointerInfo(Ptr);
4737 return MachinePointerInfo();
4742 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4743 EVT VT, SDLoc dl, SDValue Chain,
4744 SDValue Ptr, SDValue Offset,
4745 MachinePointerInfo PtrInfo, EVT MemVT,
4746 bool isVolatile, bool isNonTemporal, bool isInvariant,
4747 unsigned Alignment, const AAMDNodes &AAInfo,
4748 const MDNode *Ranges) {
4749 assert(Chain.getValueType() == MVT::Other &&
4750 "Invalid chain type");
4751 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4752 Alignment = getEVTAlignment(VT);
4754 unsigned Flags = MachineMemOperand::MOLoad;
4756 Flags |= MachineMemOperand::MOVolatile;
4758 Flags |= MachineMemOperand::MONonTemporal;
4760 Flags |= MachineMemOperand::MOInvariant;
4762 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4764 if (PtrInfo.V.isNull())
4765 PtrInfo = InferPointerInfo(Ptr, Offset);
4767 MachineFunction &MF = getMachineFunction();
4768 MachineMemOperand *MMO =
4769 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4771 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4775 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4776 EVT VT, SDLoc dl, SDValue Chain,
4777 SDValue Ptr, SDValue Offset, EVT MemVT,
4778 MachineMemOperand *MMO) {
4780 ExtType = ISD::NON_EXTLOAD;
4781 } else if (ExtType == ISD::NON_EXTLOAD) {
4782 assert(VT == MemVT && "Non-extending load from different memory type!");
4785 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4786 "Should only be an extending load, not truncating!");
4787 assert(VT.isInteger() == MemVT.isInteger() &&
4788 "Cannot convert from FP to Int or Int -> FP!");
4789 assert(VT.isVector() == MemVT.isVector() &&
4790 "Cannot use an ext load to convert to or from a vector!");
4791 assert((!VT.isVector() ||
4792 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4793 "Cannot use an ext load to change the number of vector elements!");
4796 bool Indexed = AM != ISD::UNINDEXED;
4797 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4798 "Unindexed load with an offset!");
4800 SDVTList VTs = Indexed ?
4801 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4802 SDValue Ops[] = { Chain, Ptr, Offset };
4803 FoldingSetNodeID ID;
4804 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4805 ID.AddInteger(MemVT.getRawBits());
4806 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4807 MMO->isNonTemporal(),
4808 MMO->isInvariant()));
4809 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4811 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4812 cast<LoadSDNode>(E)->refineAlignment(MMO);
4813 return SDValue(E, 0);
4815 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4816 dl.getDebugLoc(), VTs, AM, ExtType,
4818 CSEMap.InsertNode(N, IP);
4820 return SDValue(N, 0);
4823 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4824 SDValue Chain, SDValue Ptr,
4825 MachinePointerInfo PtrInfo,
4826 bool isVolatile, bool isNonTemporal,
4827 bool isInvariant, unsigned Alignment,
4828 const AAMDNodes &AAInfo,
4829 const MDNode *Ranges) {
4830 SDValue Undef = getUNDEF(Ptr.getValueType());
4831 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4832 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4836 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4837 SDValue Chain, SDValue Ptr,
4838 MachineMemOperand *MMO) {
4839 SDValue Undef = getUNDEF(Ptr.getValueType());
4840 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4844 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4845 SDValue Chain, SDValue Ptr,
4846 MachinePointerInfo PtrInfo, EVT MemVT,
4847 bool isVolatile, bool isNonTemporal,
4848 bool isInvariant, unsigned Alignment,
4849 const AAMDNodes &AAInfo) {
4850 SDValue Undef = getUNDEF(Ptr.getValueType());
4851 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4852 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4857 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4858 SDValue Chain, SDValue Ptr, EVT MemVT,
4859 MachineMemOperand *MMO) {
4860 SDValue Undef = getUNDEF(Ptr.getValueType());
4861 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4866 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4867 SDValue Offset, ISD::MemIndexedMode AM) {
4868 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4869 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4870 "Load is already a indexed load!");
4871 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4872 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4873 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4874 false, LD->getAlignment());
4877 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4878 SDValue Ptr, MachinePointerInfo PtrInfo,
4879 bool isVolatile, bool isNonTemporal,
4880 unsigned Alignment, const AAMDNodes &AAInfo) {
4881 assert(Chain.getValueType() == MVT::Other &&
4882 "Invalid chain type");
4883 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4884 Alignment = getEVTAlignment(Val.getValueType());
4886 unsigned Flags = MachineMemOperand::MOStore;
4888 Flags |= MachineMemOperand::MOVolatile;
4890 Flags |= MachineMemOperand::MONonTemporal;
4892 if (PtrInfo.V.isNull())
4893 PtrInfo = InferPointerInfo(Ptr);
4895 MachineFunction &MF = getMachineFunction();
4896 MachineMemOperand *MMO =
4897 MF.getMachineMemOperand(PtrInfo, Flags,
4898 Val.getValueType().getStoreSize(), Alignment,
4901 return getStore(Chain, dl, Val, Ptr, MMO);
4904 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4905 SDValue Ptr, MachineMemOperand *MMO) {
4906 assert(Chain.getValueType() == MVT::Other &&
4907 "Invalid chain type");
4908 EVT VT = Val.getValueType();
4909 SDVTList VTs = getVTList(MVT::Other);
4910 SDValue Undef = getUNDEF(Ptr.getValueType());
4911 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4912 FoldingSetNodeID ID;
4913 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4914 ID.AddInteger(VT.getRawBits());
4915 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4916 MMO->isNonTemporal(), MMO->isInvariant()));
4917 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4919 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4920 cast<StoreSDNode>(E)->refineAlignment(MMO);
4921 return SDValue(E, 0);
4923 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4924 dl.getDebugLoc(), VTs,
4925 ISD::UNINDEXED, false, VT, MMO);
4926 CSEMap.InsertNode(N, IP);
4928 return SDValue(N, 0);
4931 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4932 SDValue Ptr, MachinePointerInfo PtrInfo,
4933 EVT SVT,bool isVolatile, bool isNonTemporal,
4935 const AAMDNodes &AAInfo) {
4936 assert(Chain.getValueType() == MVT::Other &&
4937 "Invalid chain type");
4938 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4939 Alignment = getEVTAlignment(SVT);
4941 unsigned Flags = MachineMemOperand::MOStore;
4943 Flags |= MachineMemOperand::MOVolatile;
4945 Flags |= MachineMemOperand::MONonTemporal;
4947 if (PtrInfo.V.isNull())
4948 PtrInfo = InferPointerInfo(Ptr);
4950 MachineFunction &MF = getMachineFunction();
4951 MachineMemOperand *MMO =
4952 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4955 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4958 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4959 SDValue Ptr, EVT SVT,
4960 MachineMemOperand *MMO) {
4961 EVT VT = Val.getValueType();
4963 assert(Chain.getValueType() == MVT::Other &&
4964 "Invalid chain type");
4966 return getStore(Chain, dl, Val, Ptr, MMO);
4968 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4969 "Should only be a truncating store, not extending!");
4970 assert(VT.isInteger() == SVT.isInteger() &&
4971 "Can't do FP-INT conversion!");
4972 assert(VT.isVector() == SVT.isVector() &&
4973 "Cannot use trunc store to convert to or from a vector!");
4974 assert((!VT.isVector() ||
4975 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4976 "Cannot use trunc store to change the number of vector elements!");
4978 SDVTList VTs = getVTList(MVT::Other);
4979 SDValue Undef = getUNDEF(Ptr.getValueType());
4980 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4981 FoldingSetNodeID ID;
4982 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4983 ID.AddInteger(SVT.getRawBits());
4984 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4985 MMO->isNonTemporal(), MMO->isInvariant()));
4986 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4988 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4989 cast<StoreSDNode>(E)->refineAlignment(MMO);
4990 return SDValue(E, 0);
4992 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4993 dl.getDebugLoc(), VTs,
4994 ISD::UNINDEXED, true, SVT, MMO);
4995 CSEMap.InsertNode(N, IP);
4997 return SDValue(N, 0);
5001 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5002 SDValue Offset, ISD::MemIndexedMode AM) {
5003 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5004 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5005 "Store is already a indexed store!");
5006 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5007 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5008 FoldingSetNodeID ID;
5009 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5010 ID.AddInteger(ST->getMemoryVT().getRawBits());
5011 ID.AddInteger(ST->getRawSubclassData());
5012 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5015 return SDValue(E, 0);
5017 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5018 dl.getDebugLoc(), VTs, AM,
5019 ST->isTruncatingStore(),
5021 ST->getMemOperand());
5022 CSEMap.InsertNode(N, IP);
5024 return SDValue(N, 0);
5028 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5029 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5030 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5032 SDVTList VTs = getVTList(VT, MVT::Other);
5033 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5034 FoldingSetNodeID ID;
5035 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5036 ID.AddInteger(VT.getRawBits());
5037 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5039 MMO->isNonTemporal(),
5040 MMO->isInvariant()));
5041 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5044 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5045 return SDValue(E, 0);
5047 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5048 dl.getDebugLoc(), Ops, 4, VTs,
5050 CSEMap.InsertNode(N, IP);
5052 return SDValue(N, 0);
5055 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5056 SDValue Ptr, SDValue Mask, EVT MemVT,
5057 MachineMemOperand *MMO, bool isTrunc) {
5058 assert(Chain.getValueType() == MVT::Other &&
5059 "Invalid chain type");
5060 EVT VT = Val.getValueType();
5061 SDVTList VTs = getVTList(MVT::Other);
5062 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5063 FoldingSetNodeID ID;
5064 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5065 ID.AddInteger(VT.getRawBits());
5066 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5067 MMO->isNonTemporal(), MMO->isInvariant()));
5068 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5070 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5071 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5072 return SDValue(E, 0);
5074 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5075 dl.getDebugLoc(), Ops, 4,
5076 VTs, isTrunc, MemVT, MMO);
5077 CSEMap.InsertNode(N, IP);
5079 return SDValue(N, 0);
5082 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5083 SDValue Chain, SDValue Ptr,
5086 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
5087 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5090 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5091 ArrayRef<SDUse> Ops) {
5092 switch (Ops.size()) {
5093 case 0: return getNode(Opcode, DL, VT);
5094 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5095 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5096 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5100 // Copy from an SDUse array into an SDValue array for use with
5101 // the regular getNode logic.
5102 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5103 return getNode(Opcode, DL, VT, NewOps);
5106 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5107 ArrayRef<SDValue> Ops) {
5108 unsigned NumOps = Ops.size();
5110 case 0: return getNode(Opcode, DL, VT);
5111 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5112 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5113 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5119 case ISD::SELECT_CC: {
5120 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5121 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5122 "LHS and RHS of condition must have same type!");
5123 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5124 "True and False arms of SelectCC must have same type!");
5125 assert(Ops[2].getValueType() == VT &&
5126 "select_cc node must be of same type as true and false value!");
5130 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5131 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5132 "LHS/RHS of comparison should match types!");
5139 SDVTList VTs = getVTList(VT);
5141 if (VT != MVT::Glue) {
5142 FoldingSetNodeID ID;
5143 AddNodeIDNode(ID, Opcode, VTs, Ops);
5146 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5147 return SDValue(E, 0);
5149 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5151 CSEMap.InsertNode(N, IP);
5153 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5158 return SDValue(N, 0);
5161 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5162 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5163 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5166 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5167 ArrayRef<SDValue> Ops) {
5168 if (VTList.NumVTs == 1)
5169 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5173 // FIXME: figure out how to safely handle things like
5174 // int foo(int x) { return 1 << (x & 255); }
5175 // int bar() { return foo(256); }
5176 case ISD::SRA_PARTS:
5177 case ISD::SRL_PARTS:
5178 case ISD::SHL_PARTS:
5179 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5180 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5181 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5182 else if (N3.getOpcode() == ISD::AND)
5183 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5184 // If the and is only masking out bits that cannot effect the shift,
5185 // eliminate the and.
5186 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5187 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5188 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5194 // Memoize the node unless it returns a flag.
5196 unsigned NumOps = Ops.size();
5197 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5198 FoldingSetNodeID ID;
5199 AddNodeIDNode(ID, Opcode, VTList, Ops);
5201 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5202 return SDValue(E, 0);
5205 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5206 DL.getDebugLoc(), VTList, Ops[0]);
5207 } else if (NumOps == 2) {
5208 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5209 DL.getDebugLoc(), VTList, Ops[0],
5211 } else if (NumOps == 3) {
5212 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5213 DL.getDebugLoc(), VTList, Ops[0],
5216 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5219 CSEMap.InsertNode(N, IP);
5222 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5223 DL.getDebugLoc(), VTList, Ops[0]);
5224 } else if (NumOps == 2) {
5225 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5226 DL.getDebugLoc(), VTList, Ops[0],
5228 } else if (NumOps == 3) {
5229 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5230 DL.getDebugLoc(), VTList, Ops[0],
5233 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5238 return SDValue(N, 0);
5241 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5242 return getNode(Opcode, DL, VTList, None);
5245 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5247 SDValue Ops[] = { N1 };
5248 return getNode(Opcode, DL, VTList, Ops);
5251 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5252 SDValue N1, SDValue N2) {
5253 SDValue Ops[] = { N1, N2 };
5254 return getNode(Opcode, DL, VTList, Ops);
5257 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5258 SDValue N1, SDValue N2, SDValue N3) {
5259 SDValue Ops[] = { N1, N2, N3 };
5260 return getNode(Opcode, DL, VTList, Ops);
5263 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5264 SDValue N1, SDValue N2, SDValue N3,
5266 SDValue Ops[] = { N1, N2, N3, N4 };
5267 return getNode(Opcode, DL, VTList, Ops);
5270 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5271 SDValue N1, SDValue N2, SDValue N3,
5272 SDValue N4, SDValue N5) {
5273 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5274 return getNode(Opcode, DL, VTList, Ops);
5277 SDVTList SelectionDAG::getVTList(EVT VT) {
5278 return makeVTList(SDNode::getValueTypeList(VT), 1);
5281 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5282 FoldingSetNodeID ID;
5284 ID.AddInteger(VT1.getRawBits());
5285 ID.AddInteger(VT2.getRawBits());
5288 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5290 EVT *Array = Allocator.Allocate<EVT>(2);
5293 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5294 VTListMap.InsertNode(Result, IP);
5296 return Result->getSDVTList();
5299 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5300 FoldingSetNodeID ID;
5302 ID.AddInteger(VT1.getRawBits());
5303 ID.AddInteger(VT2.getRawBits());
5304 ID.AddInteger(VT3.getRawBits());
5307 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5309 EVT *Array = Allocator.Allocate<EVT>(3);
5313 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5314 VTListMap.InsertNode(Result, IP);
5316 return Result->getSDVTList();
5319 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5320 FoldingSetNodeID ID;
5322 ID.AddInteger(VT1.getRawBits());
5323 ID.AddInteger(VT2.getRawBits());
5324 ID.AddInteger(VT3.getRawBits());
5325 ID.AddInteger(VT4.getRawBits());
5328 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5330 EVT *Array = Allocator.Allocate<EVT>(4);
5335 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5336 VTListMap.InsertNode(Result, IP);
5338 return Result->getSDVTList();
5341 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5342 unsigned NumVTs = VTs.size();
5343 FoldingSetNodeID ID;
5344 ID.AddInteger(NumVTs);
5345 for (unsigned index = 0; index < NumVTs; index++) {
5346 ID.AddInteger(VTs[index].getRawBits());
5350 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5352 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5353 std::copy(VTs.begin(), VTs.end(), Array);
5354 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5355 VTListMap.InsertNode(Result, IP);
5357 return Result->getSDVTList();
5361 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5362 /// specified operands. If the resultant node already exists in the DAG,
5363 /// this does not modify the specified node, instead it returns the node that
5364 /// already exists. If the resultant node does not exist in the DAG, the
5365 /// input node is returned. As a degenerate case, if you specify the same
5366 /// input operands as the node already has, the input node is returned.
5367 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5368 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5370 // Check to see if there is no change.
5371 if (Op == N->getOperand(0)) return N;
5373 // See if the modified node already exists.
5374 void *InsertPos = nullptr;
5375 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5378 // Nope it doesn't. Remove the node from its current place in the maps.
5380 if (!RemoveNodeFromCSEMaps(N))
5381 InsertPos = nullptr;
5383 // Now we update the operands.
5384 N->OperandList[0].set(Op);
5386 // If this gets put into a CSE map, add it.
5387 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5391 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5392 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5394 // Check to see if there is no change.
5395 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5396 return N; // No operands changed, just return the input node.
5398 // See if the modified node already exists.
5399 void *InsertPos = nullptr;
5400 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5403 // Nope it doesn't. Remove the node from its current place in the maps.
5405 if (!RemoveNodeFromCSEMaps(N))
5406 InsertPos = nullptr;
5408 // Now we update the operands.
5409 if (N->OperandList[0] != Op1)
5410 N->OperandList[0].set(Op1);
5411 if (N->OperandList[1] != Op2)
5412 N->OperandList[1].set(Op2);
5414 // If this gets put into a CSE map, add it.
5415 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5419 SDNode *SelectionDAG::
5420 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5421 SDValue Ops[] = { Op1, Op2, Op3 };
5422 return UpdateNodeOperands(N, Ops);
5425 SDNode *SelectionDAG::
5426 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5427 SDValue Op3, SDValue Op4) {
5428 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5429 return UpdateNodeOperands(N, Ops);
5432 SDNode *SelectionDAG::
5433 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5434 SDValue Op3, SDValue Op4, SDValue Op5) {
5435 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5436 return UpdateNodeOperands(N, Ops);
5439 SDNode *SelectionDAG::
5440 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5441 unsigned NumOps = Ops.size();
5442 assert(N->getNumOperands() == NumOps &&
5443 "Update with wrong number of operands");
5445 // If no operands changed just return the input node.
5446 if (Ops.empty() || std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5449 // See if the modified node already exists.
5450 void *InsertPos = nullptr;
5451 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5454 // Nope it doesn't. Remove the node from its current place in the maps.
5456 if (!RemoveNodeFromCSEMaps(N))
5457 InsertPos = nullptr;
5459 // Now we update the operands.
5460 for (unsigned i = 0; i != NumOps; ++i)
5461 if (N->OperandList[i] != Ops[i])
5462 N->OperandList[i].set(Ops[i]);
5464 // If this gets put into a CSE map, add it.
5465 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5469 /// DropOperands - Release the operands and set this node to have
5471 void SDNode::DropOperands() {
5472 // Unlike the code in MorphNodeTo that does this, we don't need to
5473 // watch for dead nodes here.
5474 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5480 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5483 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5485 SDVTList VTs = getVTList(VT);
5486 return SelectNodeTo(N, MachineOpc, VTs, None);
5489 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5490 EVT VT, SDValue Op1) {
5491 SDVTList VTs = getVTList(VT);
5492 SDValue Ops[] = { Op1 };
5493 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5496 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5497 EVT VT, SDValue Op1,
5499 SDVTList VTs = getVTList(VT);
5500 SDValue Ops[] = { Op1, Op2 };
5501 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5504 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5505 EVT VT, SDValue Op1,
5506 SDValue Op2, SDValue Op3) {
5507 SDVTList VTs = getVTList(VT);
5508 SDValue Ops[] = { Op1, Op2, Op3 };
5509 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5512 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5513 EVT VT, ArrayRef<SDValue> Ops) {
5514 SDVTList VTs = getVTList(VT);
5515 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5518 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5519 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5520 SDVTList VTs = getVTList(VT1, VT2);
5521 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5524 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5526 SDVTList VTs = getVTList(VT1, VT2);
5527 return SelectNodeTo(N, MachineOpc, VTs, None);
5530 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5531 EVT VT1, EVT VT2, EVT VT3,
5532 ArrayRef<SDValue> Ops) {
5533 SDVTList VTs = getVTList(VT1, VT2, VT3);
5534 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5537 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5538 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5539 ArrayRef<SDValue> Ops) {
5540 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5541 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5544 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5547 SDVTList VTs = getVTList(VT1, VT2);
5548 SDValue Ops[] = { Op1 };
5549 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5552 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5554 SDValue Op1, SDValue Op2) {
5555 SDVTList VTs = getVTList(VT1, VT2);
5556 SDValue Ops[] = { Op1, Op2 };
5557 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5560 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5562 SDValue Op1, SDValue Op2,
5564 SDVTList VTs = getVTList(VT1, VT2);
5565 SDValue Ops[] = { Op1, Op2, Op3 };
5566 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5569 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5570 EVT VT1, EVT VT2, EVT VT3,
5571 SDValue Op1, SDValue Op2,
5573 SDVTList VTs = getVTList(VT1, VT2, VT3);
5574 SDValue Ops[] = { Op1, Op2, Op3 };
5575 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5578 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5579 SDVTList VTs,ArrayRef<SDValue> Ops) {
5580 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5581 // Reset the NodeID to -1.
5586 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5587 /// the line number information on the merged node since it is not possible to
5588 /// preserve the information that operation is associated with multiple lines.
5589 /// This will make the debugger working better at -O0, were there is a higher
5590 /// probability having other instructions associated with that line.
5592 /// For IROrder, we keep the smaller of the two
5593 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5594 DebugLoc NLoc = N->getDebugLoc();
5595 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5596 N->setDebugLoc(DebugLoc());
5598 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5599 N->setIROrder(Order);
5603 /// MorphNodeTo - This *mutates* the specified node to have the specified
5604 /// return type, opcode, and operands.
5606 /// Note that MorphNodeTo returns the resultant node. If there is already a
5607 /// node of the specified opcode and operands, it returns that node instead of
5608 /// the current one. Note that the SDLoc need not be the same.
5610 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5611 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5612 /// node, and because it doesn't require CSE recalculation for any of
5613 /// the node's users.
5615 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5616 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5617 /// the legalizer which maintain worklists that would need to be updated when
5618 /// deleting things.
5619 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5620 SDVTList VTs, ArrayRef<SDValue> Ops) {
5621 unsigned NumOps = Ops.size();
5622 // If an identical node already exists, use it.
5624 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5625 FoldingSetNodeID ID;
5626 AddNodeIDNode(ID, Opc, VTs, Ops);
5627 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5628 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5631 if (!RemoveNodeFromCSEMaps(N))
5634 // Start the morphing.
5636 N->ValueList = VTs.VTs;
5637 N->NumValues = VTs.NumVTs;
5639 // Clear the operands list, updating used nodes to remove this from their
5640 // use list. Keep track of any operands that become dead as a result.
5641 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5642 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5644 SDNode *Used = Use.getNode();
5646 if (Used->use_empty())
5647 DeadNodeSet.insert(Used);
5650 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5651 // Initialize the memory references information.
5652 MN->setMemRefs(nullptr, nullptr);
5653 // If NumOps is larger than the # of operands we can have in a
5654 // MachineSDNode, reallocate the operand list.
5655 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5656 if (MN->OperandsNeedDelete)
5657 delete[] MN->OperandList;
5658 if (NumOps > array_lengthof(MN->LocalOperands))
5659 // We're creating a final node that will live unmorphed for the
5660 // remainder of the current SelectionDAG iteration, so we can allocate
5661 // the operands directly out of a pool with no recycling metadata.
5662 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5663 Ops.data(), NumOps);
5665 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5666 MN->OperandsNeedDelete = false;
5668 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5670 // If NumOps is larger than the # of operands we currently have, reallocate
5671 // the operand list.
5672 if (NumOps > N->NumOperands) {
5673 if (N->OperandsNeedDelete)
5674 delete[] N->OperandList;
5675 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5676 N->OperandsNeedDelete = true;
5678 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5681 // Delete any nodes that are still dead after adding the uses for the
5683 if (!DeadNodeSet.empty()) {
5684 SmallVector<SDNode *, 16> DeadNodes;
5685 for (SDNode *N : DeadNodeSet)
5687 DeadNodes.push_back(N);
5688 RemoveDeadNodes(DeadNodes);
5692 CSEMap.InsertNode(N, IP); // Memoize the new node.
5697 /// getMachineNode - These are used for target selectors to create a new node
5698 /// with specified return type(s), MachineInstr opcode, and operands.
5700 /// Note that getMachineNode returns the resultant node. If there is already a
5701 /// node of the specified opcode and operands, it returns that node instead of
5702 /// the current one.
5704 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5705 SDVTList VTs = getVTList(VT);
5706 return getMachineNode(Opcode, dl, VTs, None);
5710 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5711 SDVTList VTs = getVTList(VT);
5712 SDValue Ops[] = { Op1 };
5713 return getMachineNode(Opcode, dl, VTs, Ops);
5717 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5718 SDValue Op1, SDValue Op2) {
5719 SDVTList VTs = getVTList(VT);
5720 SDValue Ops[] = { Op1, Op2 };
5721 return getMachineNode(Opcode, dl, VTs, Ops);
5725 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5726 SDValue Op1, SDValue Op2, SDValue Op3) {
5727 SDVTList VTs = getVTList(VT);
5728 SDValue Ops[] = { Op1, Op2, Op3 };
5729 return getMachineNode(Opcode, dl, VTs, Ops);
5733 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5734 ArrayRef<SDValue> Ops) {
5735 SDVTList VTs = getVTList(VT);
5736 return getMachineNode(Opcode, dl, VTs, Ops);
5740 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5741 SDVTList VTs = getVTList(VT1, VT2);
5742 return getMachineNode(Opcode, dl, VTs, None);
5746 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5747 EVT VT1, EVT VT2, SDValue Op1) {
5748 SDVTList VTs = getVTList(VT1, VT2);
5749 SDValue Ops[] = { Op1 };
5750 return getMachineNode(Opcode, dl, VTs, Ops);
5754 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5755 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5756 SDVTList VTs = getVTList(VT1, VT2);
5757 SDValue Ops[] = { Op1, Op2 };
5758 return getMachineNode(Opcode, dl, VTs, Ops);
5762 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5763 EVT VT1, EVT VT2, SDValue Op1,
5764 SDValue Op2, SDValue Op3) {
5765 SDVTList VTs = getVTList(VT1, VT2);
5766 SDValue Ops[] = { Op1, Op2, Op3 };
5767 return getMachineNode(Opcode, dl, VTs, Ops);
5771 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5773 ArrayRef<SDValue> Ops) {
5774 SDVTList VTs = getVTList(VT1, VT2);
5775 return getMachineNode(Opcode, dl, VTs, Ops);
5779 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5780 EVT VT1, EVT VT2, EVT VT3,
5781 SDValue Op1, SDValue Op2) {
5782 SDVTList VTs = getVTList(VT1, VT2, VT3);
5783 SDValue Ops[] = { Op1, Op2 };
5784 return getMachineNode(Opcode, dl, VTs, Ops);
5788 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5789 EVT VT1, EVT VT2, EVT VT3,
5790 SDValue Op1, SDValue Op2, SDValue Op3) {
5791 SDVTList VTs = getVTList(VT1, VT2, VT3);
5792 SDValue Ops[] = { Op1, Op2, Op3 };
5793 return getMachineNode(Opcode, dl, VTs, Ops);
5797 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5798 EVT VT1, EVT VT2, EVT VT3,
5799 ArrayRef<SDValue> Ops) {
5800 SDVTList VTs = getVTList(VT1, VT2, VT3);
5801 return getMachineNode(Opcode, dl, VTs, Ops);
5805 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5806 EVT VT2, EVT VT3, EVT VT4,
5807 ArrayRef<SDValue> Ops) {
5808 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5809 return getMachineNode(Opcode, dl, VTs, Ops);
5813 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5814 ArrayRef<EVT> ResultTys,
5815 ArrayRef<SDValue> Ops) {
5816 SDVTList VTs = getVTList(ResultTys);
5817 return getMachineNode(Opcode, dl, VTs, Ops);
5821 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5822 ArrayRef<SDValue> OpsArray) {
5823 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5826 const SDValue *Ops = OpsArray.data();
5827 unsigned NumOps = OpsArray.size();
5830 FoldingSetNodeID ID;
5831 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5833 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5834 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5838 // Allocate a new MachineSDNode.
5839 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5840 DL.getDebugLoc(), VTs);
5842 // Initialize the operands list.
5843 if (NumOps > array_lengthof(N->LocalOperands))
5844 // We're creating a final node that will live unmorphed for the
5845 // remainder of the current SelectionDAG iteration, so we can allocate
5846 // the operands directly out of a pool with no recycling metadata.
5847 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5850 N->InitOperands(N->LocalOperands, Ops, NumOps);
5851 N->OperandsNeedDelete = false;
5854 CSEMap.InsertNode(N, IP);
5860 /// getTargetExtractSubreg - A convenience function for creating
5861 /// TargetOpcode::EXTRACT_SUBREG nodes.
5863 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5865 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5866 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5867 VT, Operand, SRIdxVal);
5868 return SDValue(Subreg, 0);
5871 /// getTargetInsertSubreg - A convenience function for creating
5872 /// TargetOpcode::INSERT_SUBREG nodes.
5874 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5875 SDValue Operand, SDValue Subreg) {
5876 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5877 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5878 VT, Operand, Subreg, SRIdxVal);
5879 return SDValue(Result, 0);
5882 /// getNodeIfExists - Get the specified node if it's already available, or
5883 /// else return NULL.
5884 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5885 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5887 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5888 FoldingSetNodeID ID;
5889 AddNodeIDNode(ID, Opcode, VTList, Ops);
5890 if (isBinOpWithFlags(Opcode))
5891 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5893 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5899 /// getDbgValue - Creates a SDDbgValue node.
5902 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5903 unsigned R, bool IsIndirect, uint64_t Off,
5904 DebugLoc DL, unsigned O) {
5905 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5906 "Expected inlined-at fields to agree");
5907 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5911 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5912 const Value *C, uint64_t Off,
5913 DebugLoc DL, unsigned O) {
5914 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5915 "Expected inlined-at fields to agree");
5916 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5920 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5921 unsigned FI, uint64_t Off,
5922 DebugLoc DL, unsigned O) {
5923 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5924 "Expected inlined-at fields to agree");
5925 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5930 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5931 /// pointed to by a use iterator is deleted, increment the use iterator
5932 /// so that it doesn't dangle.
5934 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5935 SDNode::use_iterator &UI;
5936 SDNode::use_iterator &UE;
5938 void NodeDeleted(SDNode *N, SDNode *E) override {
5939 // Increment the iterator as needed.
5940 while (UI != UE && N == *UI)
5945 RAUWUpdateListener(SelectionDAG &d,
5946 SDNode::use_iterator &ui,
5947 SDNode::use_iterator &ue)
5948 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5953 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5954 /// This can cause recursive merging of nodes in the DAG.
5956 /// This version assumes From has a single result value.
5958 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5959 SDNode *From = FromN.getNode();
5960 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5961 "Cannot replace with this method!");
5962 assert(From != To.getNode() && "Cannot replace uses of with self");
5964 // Iterate over all the existing uses of From. New uses will be added
5965 // to the beginning of the use list, which we avoid visiting.
5966 // This specifically avoids visiting uses of From that arise while the
5967 // replacement is happening, because any such uses would be the result
5968 // of CSE: If an existing node looks like From after one of its operands
5969 // is replaced by To, we don't want to replace of all its users with To
5970 // too. See PR3018 for more info.
5971 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5972 RAUWUpdateListener Listener(*this, UI, UE);
5976 // This node is about to morph, remove its old self from the CSE maps.
5977 RemoveNodeFromCSEMaps(User);
5979 // A user can appear in a use list multiple times, and when this
5980 // happens the uses are usually next to each other in the list.
5981 // To help reduce the number of CSE recomputations, process all
5982 // the uses of this user that we can find this way.
5984 SDUse &Use = UI.getUse();
5987 } while (UI != UE && *UI == User);
5989 // Now that we have modified User, add it back to the CSE maps. If it
5990 // already exists there, recursively merge the results together.
5991 AddModifiedNodeToCSEMaps(User);
5994 // If we just RAUW'd the root, take note.
5995 if (FromN == getRoot())
5999 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6000 /// This can cause recursive merging of nodes in the DAG.
6002 /// This version assumes that for each value of From, there is a
6003 /// corresponding value in To in the same position with the same type.
6005 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6007 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6008 assert((!From->hasAnyUseOfValue(i) ||
6009 From->getValueType(i) == To->getValueType(i)) &&
6010 "Cannot use this version of ReplaceAllUsesWith!");
6013 // Handle the trivial case.
6017 // Iterate over just the existing users of From. See the comments in
6018 // the ReplaceAllUsesWith above.
6019 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6020 RAUWUpdateListener Listener(*this, UI, UE);
6024 // This node is about to morph, remove its old self from the CSE maps.
6025 RemoveNodeFromCSEMaps(User);
6027 // A user can appear in a use list multiple times, and when this
6028 // happens the uses are usually next to each other in the list.
6029 // To help reduce the number of CSE recomputations, process all
6030 // the uses of this user that we can find this way.
6032 SDUse &Use = UI.getUse();
6035 } while (UI != UE && *UI == User);
6037 // Now that we have modified User, add it back to the CSE maps. If it
6038 // already exists there, recursively merge the results together.
6039 AddModifiedNodeToCSEMaps(User);
6042 // If we just RAUW'd the root, take note.
6043 if (From == getRoot().getNode())
6044 setRoot(SDValue(To, getRoot().getResNo()));
6047 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6048 /// This can cause recursive merging of nodes in the DAG.
6050 /// This version can replace From with any result values. To must match the
6051 /// number and types of values returned by From.
6052 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6053 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6054 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6056 // Iterate over just the existing users of From. See the comments in
6057 // the ReplaceAllUsesWith above.
6058 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6059 RAUWUpdateListener Listener(*this, UI, UE);
6063 // This node is about to morph, remove its old self from the CSE maps.
6064 RemoveNodeFromCSEMaps(User);
6066 // A user can appear in a use list multiple times, and when this
6067 // happens the uses are usually next to each other in the list.
6068 // To help reduce the number of CSE recomputations, process all
6069 // the uses of this user that we can find this way.
6071 SDUse &Use = UI.getUse();
6072 const SDValue &ToOp = To[Use.getResNo()];
6075 } while (UI != UE && *UI == User);
6077 // Now that we have modified User, add it back to the CSE maps. If it
6078 // already exists there, recursively merge the results together.
6079 AddModifiedNodeToCSEMaps(User);
6082 // If we just RAUW'd the root, take note.
6083 if (From == getRoot().getNode())
6084 setRoot(SDValue(To[getRoot().getResNo()]));
6087 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6088 /// uses of other values produced by From.getNode() alone. The Deleted
6089 /// vector is handled the same way as for ReplaceAllUsesWith.
6090 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6091 // Handle the really simple, really trivial case efficiently.
6092 if (From == To) return;
6094 // Handle the simple, trivial, case efficiently.
6095 if (From.getNode()->getNumValues() == 1) {
6096 ReplaceAllUsesWith(From, To);
6100 // Iterate over just the existing users of From. See the comments in
6101 // the ReplaceAllUsesWith above.
6102 SDNode::use_iterator UI = From.getNode()->use_begin(),
6103 UE = From.getNode()->use_end();
6104 RAUWUpdateListener Listener(*this, UI, UE);
6107 bool UserRemovedFromCSEMaps = false;
6109 // A user can appear in a use list multiple times, and when this
6110 // happens the uses are usually next to each other in the list.
6111 // To help reduce the number of CSE recomputations, process all
6112 // the uses of this user that we can find this way.
6114 SDUse &Use = UI.getUse();
6116 // Skip uses of different values from the same node.
6117 if (Use.getResNo() != From.getResNo()) {
6122 // If this node hasn't been modified yet, it's still in the CSE maps,
6123 // so remove its old self from the CSE maps.
6124 if (!UserRemovedFromCSEMaps) {
6125 RemoveNodeFromCSEMaps(User);
6126 UserRemovedFromCSEMaps = true;
6131 } while (UI != UE && *UI == User);
6133 // We are iterating over all uses of the From node, so if a use
6134 // doesn't use the specific value, no changes are made.
6135 if (!UserRemovedFromCSEMaps)
6138 // Now that we have modified User, add it back to the CSE maps. If it
6139 // already exists there, recursively merge the results together.
6140 AddModifiedNodeToCSEMaps(User);
6143 // If we just RAUW'd the root, take note.
6144 if (From == getRoot())
6149 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6150 /// to record information about a use.
6157 /// operator< - Sort Memos by User.
6158 bool operator<(const UseMemo &L, const UseMemo &R) {
6159 return (intptr_t)L.User < (intptr_t)R.User;
6163 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6164 /// uses of other values produced by From.getNode() alone. The same value
6165 /// may appear in both the From and To list. The Deleted vector is
6166 /// handled the same way as for ReplaceAllUsesWith.
6167 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6170 // Handle the simple, trivial case efficiently.
6172 return ReplaceAllUsesOfValueWith(*From, *To);
6174 // Read up all the uses and make records of them. This helps
6175 // processing new uses that are introduced during the
6176 // replacement process.
6177 SmallVector<UseMemo, 4> Uses;
6178 for (unsigned i = 0; i != Num; ++i) {
6179 unsigned FromResNo = From[i].getResNo();
6180 SDNode *FromNode = From[i].getNode();
6181 for (SDNode::use_iterator UI = FromNode->use_begin(),
6182 E = FromNode->use_end(); UI != E; ++UI) {
6183 SDUse &Use = UI.getUse();
6184 if (Use.getResNo() == FromResNo) {
6185 UseMemo Memo = { *UI, i, &Use };
6186 Uses.push_back(Memo);
6191 // Sort the uses, so that all the uses from a given User are together.
6192 std::sort(Uses.begin(), Uses.end());
6194 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6195 UseIndex != UseIndexEnd; ) {
6196 // We know that this user uses some value of From. If it is the right
6197 // value, update it.
6198 SDNode *User = Uses[UseIndex].User;
6200 // This node is about to morph, remove its old self from the CSE maps.
6201 RemoveNodeFromCSEMaps(User);
6203 // The Uses array is sorted, so all the uses for a given User
6204 // are next to each other in the list.
6205 // To help reduce the number of CSE recomputations, process all
6206 // the uses of this user that we can find this way.
6208 unsigned i = Uses[UseIndex].Index;
6209 SDUse &Use = *Uses[UseIndex].Use;
6213 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6215 // Now that we have modified User, add it back to the CSE maps. If it
6216 // already exists there, recursively merge the results together.
6217 AddModifiedNodeToCSEMaps(User);
6221 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6222 /// based on their topological order. It returns the maximum id and a vector
6223 /// of the SDNodes* in assigned order by reference.
6224 unsigned SelectionDAG::AssignTopologicalOrder() {
6226 unsigned DAGSize = 0;
6228 // SortedPos tracks the progress of the algorithm. Nodes before it are
6229 // sorted, nodes after it are unsorted. When the algorithm completes
6230 // it is at the end of the list.
6231 allnodes_iterator SortedPos = allnodes_begin();
6233 // Visit all the nodes. Move nodes with no operands to the front of
6234 // the list immediately. Annotate nodes that do have operands with their
6235 // operand count. Before we do this, the Node Id fields of the nodes
6236 // may contain arbitrary values. After, the Node Id fields for nodes
6237 // before SortedPos will contain the topological sort index, and the
6238 // Node Id fields for nodes At SortedPos and after will contain the
6239 // count of outstanding operands.
6240 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6242 checkForCycles(N, this);
6243 unsigned Degree = N->getNumOperands();
6245 // A node with no uses, add it to the result array immediately.
6246 N->setNodeId(DAGSize++);
6247 allnodes_iterator Q = N;
6249 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6250 assert(SortedPos != AllNodes.end() && "Overran node list");
6253 // Temporarily use the Node Id as scratch space for the degree count.
6254 N->setNodeId(Degree);
6258 // Visit all the nodes. As we iterate, move nodes into sorted order,
6259 // such that by the time the end is reached all nodes will be sorted.
6260 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6262 checkForCycles(N, this);
6263 // N is in sorted position, so all its uses have one less operand
6264 // that needs to be sorted.
6265 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6268 unsigned Degree = P->getNodeId();
6269 assert(Degree != 0 && "Invalid node degree");
6272 // All of P's operands are sorted, so P may sorted now.
6273 P->setNodeId(DAGSize++);
6275 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6276 assert(SortedPos != AllNodes.end() && "Overran node list");
6279 // Update P's outstanding operand count.
6280 P->setNodeId(Degree);
6283 if (I == SortedPos) {
6286 dbgs() << "Overran sorted position:\n";
6287 S->dumprFull(this); dbgs() << "\n";
6288 dbgs() << "Checking if this is due to cycles\n";
6289 checkForCycles(this, true);
6291 llvm_unreachable(nullptr);
6295 assert(SortedPos == AllNodes.end() &&
6296 "Topological sort incomplete!");
6297 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6298 "First node in topological sort is not the entry token!");
6299 assert(AllNodes.front().getNodeId() == 0 &&
6300 "First node in topological sort has non-zero id!");
6301 assert(AllNodes.front().getNumOperands() == 0 &&
6302 "First node in topological sort has operands!");
6303 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6304 "Last node in topologic sort has unexpected id!");
6305 assert(AllNodes.back().use_empty() &&
6306 "Last node in topologic sort has users!");
6307 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6311 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6312 /// value is produced by SD.
6313 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6315 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6316 SD->setHasDebugValue(true);
6318 DbgInfo->add(DB, SD, isParameter);
6321 /// TransferDbgValues - Transfer SDDbgValues.
6322 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6323 if (From == To || !From.getNode()->getHasDebugValue())
6325 SDNode *FromNode = From.getNode();
6326 SDNode *ToNode = To.getNode();
6327 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6328 SmallVector<SDDbgValue *, 2> ClonedDVs;
6329 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6331 SDDbgValue *Dbg = *I;
6332 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6334 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6335 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6336 Dbg->getDebugLoc(), Dbg->getOrder());
6337 ClonedDVs.push_back(Clone);
6340 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6341 E = ClonedDVs.end(); I != E; ++I)
6342 AddDbgValue(*I, ToNode, false);
6345 //===----------------------------------------------------------------------===//
6347 //===----------------------------------------------------------------------===//
6349 HandleSDNode::~HandleSDNode() {
6353 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6354 DebugLoc DL, const GlobalValue *GA,
6355 EVT VT, int64_t o, unsigned char TF)
6356 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6360 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6361 SDValue X, unsigned SrcAS,
6363 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6364 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6366 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6367 EVT memvt, MachineMemOperand *mmo)
6368 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6369 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6370 MMO->isNonTemporal(), MMO->isInvariant());
6371 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6372 assert(isNonTemporal() == MMO->isNonTemporal() &&
6373 "Non-temporal encoding error!");
6374 // We check here that the size of the memory operand fits within the size of
6375 // the MMO. This is because the MMO might indicate only a possible address
6376 // range instead of specifying the affected memory addresses precisely.
6377 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6380 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6381 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6382 : SDNode(Opc, Order, dl, VTs, Ops),
6383 MemoryVT(memvt), MMO(mmo) {
6384 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6385 MMO->isNonTemporal(), MMO->isInvariant());
6386 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6387 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6390 /// Profile - Gather unique data for the node.
6392 void SDNode::Profile(FoldingSetNodeID &ID) const {
6393 AddNodeIDNode(ID, this);
6398 std::vector<EVT> VTs;
6401 VTs.reserve(MVT::LAST_VALUETYPE);
6402 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6403 VTs.push_back(MVT((MVT::SimpleValueType)i));
6408 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6409 static ManagedStatic<EVTArray> SimpleVTArray;
6410 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6412 /// getValueTypeList - Return a pointer to the specified value type.
6414 const EVT *SDNode::getValueTypeList(EVT VT) {
6415 if (VT.isExtended()) {
6416 sys::SmartScopedLock<true> Lock(*VTMutex);
6417 return &(*EVTs->insert(VT).first);
6419 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6420 "Value type out of range!");
6421 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6425 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6426 /// indicated value. This method ignores uses of other values defined by this
6428 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6429 assert(Value < getNumValues() && "Bad value!");
6431 // TODO: Only iterate over uses of a given value of the node
6432 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6433 if (UI.getUse().getResNo() == Value) {
6440 // Found exactly the right number of uses?
6445 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6446 /// value. This method ignores uses of other values defined by this operation.
6447 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6448 assert(Value < getNumValues() && "Bad value!");
6450 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6451 if (UI.getUse().getResNo() == Value)
6458 /// isOnlyUserOf - Return true if this node is the only use of N.
6460 bool SDNode::isOnlyUserOf(SDNode *N) const {
6462 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6473 /// isOperand - Return true if this node is an operand of N.
6475 bool SDValue::isOperandOf(SDNode *N) const {
6476 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6477 if (*this == N->getOperand(i))
6482 bool SDNode::isOperandOf(SDNode *N) const {
6483 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6484 if (this == N->OperandList[i].getNode())
6489 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6490 /// be a chain) reaches the specified operand without crossing any
6491 /// side-effecting instructions on any chain path. In practice, this looks
6492 /// through token factors and non-volatile loads. In order to remain efficient,
6493 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6494 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6495 unsigned Depth) const {
6496 if (*this == Dest) return true;
6498 // Don't search too deeply, we just want to be able to see through
6499 // TokenFactor's etc.
6500 if (Depth == 0) return false;
6502 // If this is a token factor, all inputs to the TF happen in parallel. If any
6503 // of the operands of the TF does not reach dest, then we cannot do the xform.
6504 if (getOpcode() == ISD::TokenFactor) {
6505 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6506 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6511 // Loads don't have side effects, look through them.
6512 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6513 if (!Ld->isVolatile())
6514 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6519 /// hasPredecessor - Return true if N is a predecessor of this node.
6520 /// N is either an operand of this node, or can be reached by recursively
6521 /// traversing up the operands.
6522 /// NOTE: This is an expensive method. Use it carefully.
6523 bool SDNode::hasPredecessor(const SDNode *N) const {
6524 SmallPtrSet<const SDNode *, 32> Visited;
6525 SmallVector<const SDNode *, 16> Worklist;
6526 return hasPredecessorHelper(N, Visited, Worklist);
6530 SDNode::hasPredecessorHelper(const SDNode *N,
6531 SmallPtrSetImpl<const SDNode *> &Visited,
6532 SmallVectorImpl<const SDNode *> &Worklist) const {
6533 if (Visited.empty()) {
6534 Worklist.push_back(this);
6536 // Take a look in the visited set. If we've already encountered this node
6537 // we needn't search further.
6538 if (Visited.count(N))
6542 // Haven't visited N yet. Continue the search.
6543 while (!Worklist.empty()) {
6544 const SDNode *M = Worklist.pop_back_val();
6545 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6546 SDNode *Op = M->getOperand(i).getNode();
6547 if (Visited.insert(Op).second)
6548 Worklist.push_back(Op);
6557 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6558 assert(Num < NumOperands && "Invalid child # of SDNode!");
6559 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6562 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6563 assert(N->getNumValues() == 1 &&
6564 "Can't unroll a vector with multiple results!");
6566 EVT VT = N->getValueType(0);
6567 unsigned NE = VT.getVectorNumElements();
6568 EVT EltVT = VT.getVectorElementType();
6571 SmallVector<SDValue, 8> Scalars;
6572 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6574 // If ResNE is 0, fully unroll the vector op.
6577 else if (NE > ResNE)
6581 for (i= 0; i != NE; ++i) {
6582 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6583 SDValue Operand = N->getOperand(j);
6584 EVT OperandVT = Operand.getValueType();
6585 if (OperandVT.isVector()) {
6586 // A vector operand; extract a single element.
6587 EVT OperandEltVT = OperandVT.getVectorElementType();
6588 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6591 getConstant(i, TLI->getVectorIdxTy()));
6593 // A scalar operand; just use it as is.
6594 Operands[j] = Operand;
6598 switch (N->getOpcode()) {
6600 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6603 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6610 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6611 getShiftAmountOperand(Operands[0].getValueType(),
6614 case ISD::SIGN_EXTEND_INREG:
6615 case ISD::FP_ROUND_INREG: {
6616 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6617 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6619 getValueType(ExtVT)));
6624 for (; i < ResNE; ++i)
6625 Scalars.push_back(getUNDEF(EltVT));
6627 return getNode(ISD::BUILD_VECTOR, dl,
6628 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6632 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6633 /// location that is 'Dist' units away from the location that the 'Base' load
6634 /// is loading from.
6635 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6636 unsigned Bytes, int Dist) const {
6637 if (LD->getChain() != Base->getChain())
6639 EVT VT = LD->getValueType(0);
6640 if (VT.getSizeInBits() / 8 != Bytes)
6643 SDValue Loc = LD->getOperand(1);
6644 SDValue BaseLoc = Base->getOperand(1);
6645 if (Loc.getOpcode() == ISD::FrameIndex) {
6646 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6648 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6649 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6650 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6651 int FS = MFI->getObjectSize(FI);
6652 int BFS = MFI->getObjectSize(BFI);
6653 if (FS != BFS || FS != (int)Bytes) return false;
6654 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6658 if (isBaseWithConstantOffset(Loc)) {
6659 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6660 if (Loc.getOperand(0) == BaseLoc) {
6661 // If the base location is a simple address with no offset itself, then
6662 // the second load's first add operand should be the base address.
6663 if (LocOffset == Dist * (int)Bytes)
6665 } else if (isBaseWithConstantOffset(BaseLoc)) {
6666 // The base location itself has an offset, so subtract that value from the
6667 // second load's offset before comparing to distance * size.
6669 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6670 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6671 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6676 const GlobalValue *GV1 = nullptr;
6677 const GlobalValue *GV2 = nullptr;
6678 int64_t Offset1 = 0;
6679 int64_t Offset2 = 0;
6680 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6681 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6682 if (isGA1 && isGA2 && GV1 == GV2)
6683 return Offset1 == (Offset2 + Dist*Bytes);
6688 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6689 /// it cannot be inferred.
6690 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6691 // If this is a GlobalAddress + cst, return the alignment.
6692 const GlobalValue *GV;
6693 int64_t GVOffset = 0;
6694 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6695 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6696 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6697 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6698 *TLI->getDataLayout());
6699 unsigned AlignBits = KnownZero.countTrailingOnes();
6700 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6702 return MinAlign(Align, GVOffset);
6705 // If this is a direct reference to a stack slot, use information about the
6706 // stack slot's alignment.
6707 int FrameIdx = 1 << 31;
6708 int64_t FrameOffset = 0;
6709 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6710 FrameIdx = FI->getIndex();
6711 } else if (isBaseWithConstantOffset(Ptr) &&
6712 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6714 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6715 FrameOffset = Ptr.getConstantOperandVal(1);
6718 if (FrameIdx != (1 << 31)) {
6719 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6720 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6728 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6729 /// which is split (or expanded) into two not necessarily identical pieces.
6730 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6731 // Currently all types are split in half.
6733 if (!VT.isVector()) {
6734 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6736 unsigned NumElements = VT.getVectorNumElements();
6737 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6738 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6741 return std::make_pair(LoVT, HiVT);
6744 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6746 std::pair<SDValue, SDValue>
6747 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6749 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6750 N.getValueType().getVectorNumElements() &&
6751 "More vector elements requested than available!");
6753 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6754 getConstant(0, TLI->getVectorIdxTy()));
6755 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6756 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6757 return std::make_pair(Lo, Hi);
6760 void SelectionDAG::ExtractVectorElements(SDValue Op,
6761 SmallVectorImpl<SDValue> &Args,
6762 unsigned Start, unsigned Count) {
6763 EVT VT = Op.getValueType();
6765 Count = VT.getVectorNumElements();
6767 EVT EltVT = VT.getVectorElementType();
6768 EVT IdxTy = TLI->getVectorIdxTy();
6770 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6771 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6772 Op, getConstant(i, IdxTy)));
6776 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6777 unsigned GlobalAddressSDNode::getAddressSpace() const {
6778 return getGlobal()->getType()->getAddressSpace();
6782 Type *ConstantPoolSDNode::getType() const {
6783 if (isMachineConstantPoolEntry())
6784 return Val.MachineCPVal->getType();
6785 return Val.ConstVal->getType();
6788 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6790 unsigned &SplatBitSize,
6792 unsigned MinSplatBits,
6793 bool isBigEndian) const {
6794 EVT VT = getValueType(0);
6795 assert(VT.isVector() && "Expected a vector type");
6796 unsigned sz = VT.getSizeInBits();
6797 if (MinSplatBits > sz)
6800 SplatValue = APInt(sz, 0);
6801 SplatUndef = APInt(sz, 0);
6803 // Get the bits. Bits with undefined values (when the corresponding element
6804 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6805 // in SplatValue. If any of the values are not constant, give up and return
6807 unsigned int nOps = getNumOperands();
6808 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6809 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6811 for (unsigned j = 0; j < nOps; ++j) {
6812 unsigned i = isBigEndian ? nOps-1-j : j;
6813 SDValue OpVal = getOperand(i);
6814 unsigned BitPos = j * EltBitSize;
6816 if (OpVal.getOpcode() == ISD::UNDEF)
6817 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6818 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6819 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6820 zextOrTrunc(sz) << BitPos;
6821 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6822 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6827 // The build_vector is all constants or undefs. Find the smallest element
6828 // size that splats the vector.
6830 HasAnyUndefs = (SplatUndef != 0);
6833 unsigned HalfSize = sz / 2;
6834 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6835 APInt LowValue = SplatValue.trunc(HalfSize);
6836 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6837 APInt LowUndef = SplatUndef.trunc(HalfSize);
6839 // If the two halves do not match (ignoring undef bits), stop here.
6840 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6841 MinSplatBits > HalfSize)
6844 SplatValue = HighValue | LowValue;
6845 SplatUndef = HighUndef & LowUndef;
6854 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6855 if (UndefElements) {
6856 UndefElements->clear();
6857 UndefElements->resize(getNumOperands());
6860 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6861 SDValue Op = getOperand(i);
6862 if (Op.getOpcode() == ISD::UNDEF) {
6864 (*UndefElements)[i] = true;
6865 } else if (!Splatted) {
6867 } else if (Splatted != Op) {
6873 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6874 "Can only have a splat without a constant for all undefs.");
6875 return getOperand(0);
6882 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6883 return dyn_cast_or_null<ConstantSDNode>(
6884 getSplatValue(UndefElements).getNode());
6888 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6889 return dyn_cast_or_null<ConstantFPSDNode>(
6890 getSplatValue(UndefElements).getNode());
6893 bool BuildVectorSDNode::isConstant() const {
6894 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6895 unsigned Opc = getOperand(i).getOpcode();
6896 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6902 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6903 // Find the first non-undef value in the shuffle mask.
6905 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6908 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6910 // Make sure all remaining elements are either undef or the same as the first
6912 for (int Idx = Mask[i]; i != e; ++i)
6913 if (Mask[i] >= 0 && Mask[i] != Idx)
6919 static void checkForCyclesHelper(const SDNode *N,
6920 SmallPtrSetImpl<const SDNode*> &Visited,
6921 SmallPtrSetImpl<const SDNode*> &Checked,
6922 const llvm::SelectionDAG *DAG) {
6923 // If this node has already been checked, don't check it again.
6924 if (Checked.count(N))
6927 // If a node has already been visited on this depth-first walk, reject it as
6929 if (!Visited.insert(N).second) {
6930 errs() << "Detected cycle in SelectionDAG\n";
6931 dbgs() << "Offending node:\n";
6932 N->dumprFull(DAG); dbgs() << "\n";
6936 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6937 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6944 void llvm::checkForCycles(const llvm::SDNode *N,
6945 const llvm::SelectionDAG *DAG,
6953 assert(N && "Checking nonexistent SDNode");
6954 SmallPtrSet<const SDNode*, 32> visited;
6955 SmallPtrSet<const SDNode*, 32> checked;
6956 checkForCyclesHelper(N, visited, checked, DAG);
6961 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6962 checkForCycles(DAG->getRoot().getNode(), DAG, force);