1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/Function.h"
17 #include "llvm/GlobalAlias.h"
18 #include "llvm/GlobalVariable.h"
19 #include "llvm/Intrinsics.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/CallingConv.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/PseudoSourceValue.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetFrameInfo.h"
31 #include "llvm/Target/TargetLowering.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/Target/TargetInstrInfo.h"
34 #include "llvm/Target/TargetIntrinsicInfo.h"
35 #include "llvm/Target/TargetMachine.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/raw_ostream.h"
41 #include "llvm/System/Mutex.h"
42 #include "llvm/ADT/SetVector.h"
43 #include "llvm/ADT/SmallPtrSet.h"
44 #include "llvm/ADT/SmallSet.h"
45 #include "llvm/ADT/SmallVector.h"
46 #include "llvm/ADT/StringExtras.h"
51 /// makeVTList - Return an instance of the SDVTList struct initialized with the
52 /// specified members.
53 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
54 SDVTList Res = {VTs, NumVTs};
58 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
59 switch (VT.getSimpleVT().SimpleTy) {
60 default: llvm_unreachable("Unknown FP format");
61 case MVT::f32: return &APFloat::IEEEsingle;
62 case MVT::f64: return &APFloat::IEEEdouble;
63 case MVT::f80: return &APFloat::x87DoubleExtended;
64 case MVT::f128: return &APFloat::IEEEquad;
65 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
69 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
71 //===----------------------------------------------------------------------===//
72 // ConstantFPSDNode Class
73 //===----------------------------------------------------------------------===//
75 /// isExactlyValue - We don't rely on operator== working on double values, as
76 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
77 /// As such, this method can be used to do an exact bit-for-bit comparison of
78 /// two floating point values.
79 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
80 return getValueAPF().bitwiseIsEqual(V);
83 bool ConstantFPSDNode::isValueValidForType(EVT VT,
85 assert(VT.isFloatingPoint() && "Can only convert between FP types");
87 // PPC long double cannot be converted to any other type.
88 if (VT == MVT::ppcf128 ||
89 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
92 // convert modifies in place, so make a copy.
93 APFloat Val2 = APFloat(Val);
95 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
100 //===----------------------------------------------------------------------===//
102 //===----------------------------------------------------------------------===//
104 /// isBuildVectorAllOnes - Return true if the specified node is a
105 /// BUILD_VECTOR where all of the elements are ~0 or undef.
106 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
107 // Look through a bit convert.
108 if (N->getOpcode() == ISD::BIT_CONVERT)
109 N = N->getOperand(0).getNode();
111 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
113 unsigned i = 0, e = N->getNumOperands();
115 // Skip over all of the undef values.
116 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
119 // Do not accept an all-undef vector.
120 if (i == e) return false;
122 // Do not accept build_vectors that aren't all constants or which have non-~0
124 SDValue NotZero = N->getOperand(i);
125 if (isa<ConstantSDNode>(NotZero)) {
126 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
128 } else if (isa<ConstantFPSDNode>(NotZero)) {
129 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
130 bitcastToAPInt().isAllOnesValue())
135 // Okay, we have at least one ~0 value, check to see if the rest match or are
137 for (++i; i != e; ++i)
138 if (N->getOperand(i) != NotZero &&
139 N->getOperand(i).getOpcode() != ISD::UNDEF)
145 /// isBuildVectorAllZeros - Return true if the specified node is a
146 /// BUILD_VECTOR where all of the elements are 0 or undef.
147 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
148 // Look through a bit convert.
149 if (N->getOpcode() == ISD::BIT_CONVERT)
150 N = N->getOperand(0).getNode();
152 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
154 unsigned i = 0, e = N->getNumOperands();
156 // Skip over all of the undef values.
157 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
160 // Do not accept an all-undef vector.
161 if (i == e) return false;
163 // Do not accept build_vectors that aren't all constants or which have non-0
165 SDValue Zero = N->getOperand(i);
166 if (isa<ConstantSDNode>(Zero)) {
167 if (!cast<ConstantSDNode>(Zero)->isNullValue())
169 } else if (isa<ConstantFPSDNode>(Zero)) {
170 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
175 // Okay, we have at least one 0 value, check to see if the rest match or are
177 for (++i; i != e; ++i)
178 if (N->getOperand(i) != Zero &&
179 N->getOperand(i).getOpcode() != ISD::UNDEF)
184 /// isScalarToVector - Return true if the specified node is a
185 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
186 /// element is not an undef.
187 bool ISD::isScalarToVector(const SDNode *N) {
188 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
191 if (N->getOpcode() != ISD::BUILD_VECTOR)
193 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
195 unsigned NumElems = N->getNumOperands();
196 for (unsigned i = 1; i < NumElems; ++i) {
197 SDValue V = N->getOperand(i);
198 if (V.getOpcode() != ISD::UNDEF)
204 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
205 /// when given the operation for (X op Y).
206 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
207 // To perform this operation, we just need to swap the L and G bits of the
209 unsigned OldL = (Operation >> 2) & 1;
210 unsigned OldG = (Operation >> 1) & 1;
211 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
212 (OldL << 1) | // New G bit
213 (OldG << 2)); // New L bit.
216 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
217 /// 'op' is a valid SetCC operation.
218 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
219 unsigned Operation = Op;
221 Operation ^= 7; // Flip L, G, E bits, but not U.
223 Operation ^= 15; // Flip all of the condition bits.
225 if (Operation > ISD::SETTRUE2)
226 Operation &= ~8; // Don't let N and U bits get set.
228 return ISD::CondCode(Operation);
232 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
233 /// signed operation and 2 if the result is an unsigned comparison. Return zero
234 /// if the operation does not depend on the sign of the input (setne and seteq).
235 static int isSignedOp(ISD::CondCode Opcode) {
237 default: llvm_unreachable("Illegal integer setcc operation!");
239 case ISD::SETNE: return 0;
243 case ISD::SETGE: return 1;
247 case ISD::SETUGE: return 2;
251 /// getSetCCOrOperation - Return the result of a logical OR between different
252 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
253 /// returns SETCC_INVALID if it is not possible to represent the resultant
255 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
257 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
258 // Cannot fold a signed integer setcc with an unsigned integer setcc.
259 return ISD::SETCC_INVALID;
261 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
263 // If the N and U bits get set then the resultant comparison DOES suddenly
264 // care about orderedness, and is true when ordered.
265 if (Op > ISD::SETTRUE2)
266 Op &= ~16; // Clear the U bit if the N bit is set.
268 // Canonicalize illegal integer setcc's.
269 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
272 return ISD::CondCode(Op);
275 /// getSetCCAndOperation - Return the result of a logical AND between different
276 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
277 /// function returns zero if it is not possible to represent the resultant
279 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
281 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
282 // Cannot fold a signed setcc with an unsigned setcc.
283 return ISD::SETCC_INVALID;
285 // Combine all of the condition bits.
286 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
288 // Canonicalize illegal integer setcc's.
292 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
293 case ISD::SETOEQ: // SETEQ & SETU[LG]E
294 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
295 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
296 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
303 const TargetMachine &SelectionDAG::getTarget() const {
304 return MF->getTarget();
307 //===----------------------------------------------------------------------===//
308 // SDNode Profile Support
309 //===----------------------------------------------------------------------===//
311 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
313 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
317 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
318 /// solely with their pointer.
319 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
320 ID.AddPointer(VTList.VTs);
323 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
325 static void AddNodeIDOperands(FoldingSetNodeID &ID,
326 const SDValue *Ops, unsigned NumOps) {
327 for (; NumOps; --NumOps, ++Ops) {
328 ID.AddPointer(Ops->getNode());
329 ID.AddInteger(Ops->getResNo());
333 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
335 static void AddNodeIDOperands(FoldingSetNodeID &ID,
336 const SDUse *Ops, unsigned NumOps) {
337 for (; NumOps; --NumOps, ++Ops) {
338 ID.AddPointer(Ops->getNode());
339 ID.AddInteger(Ops->getResNo());
343 static void AddNodeIDNode(FoldingSetNodeID &ID,
344 unsigned short OpC, SDVTList VTList,
345 const SDValue *OpList, unsigned N) {
346 AddNodeIDOpcode(ID, OpC);
347 AddNodeIDValueTypes(ID, VTList);
348 AddNodeIDOperands(ID, OpList, N);
351 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
353 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
354 switch (N->getOpcode()) {
355 case ISD::TargetExternalSymbol:
356 case ISD::ExternalSymbol:
357 llvm_unreachable("Should only be used on nodes with operands");
358 default: break; // Normal nodes don't need extra info.
359 case ISD::TargetConstant:
361 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
363 case ISD::TargetConstantFP:
364 case ISD::ConstantFP: {
365 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
368 case ISD::TargetGlobalAddress:
369 case ISD::GlobalAddress:
370 case ISD::TargetGlobalTLSAddress:
371 case ISD::GlobalTLSAddress: {
372 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
373 ID.AddPointer(GA->getGlobal());
374 ID.AddInteger(GA->getOffset());
375 ID.AddInteger(GA->getTargetFlags());
378 case ISD::BasicBlock:
379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
386 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
388 case ISD::FrameIndex:
389 case ISD::TargetFrameIndex:
390 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
393 case ISD::TargetJumpTable:
394 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
395 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
397 case ISD::ConstantPool:
398 case ISD::TargetConstantPool: {
399 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
400 ID.AddInteger(CP->getAlignment());
401 ID.AddInteger(CP->getOffset());
402 if (CP->isMachineConstantPoolEntry())
403 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
405 ID.AddPointer(CP->getConstVal());
406 ID.AddInteger(CP->getTargetFlags());
410 const LoadSDNode *LD = cast<LoadSDNode>(N);
411 ID.AddInteger(LD->getMemoryVT().getRawBits());
412 ID.AddInteger(LD->getRawSubclassData());
416 const StoreSDNode *ST = cast<StoreSDNode>(N);
417 ID.AddInteger(ST->getMemoryVT().getRawBits());
418 ID.AddInteger(ST->getRawSubclassData());
421 case ISD::ATOMIC_CMP_SWAP:
422 case ISD::ATOMIC_SWAP:
423 case ISD::ATOMIC_LOAD_ADD:
424 case ISD::ATOMIC_LOAD_SUB:
425 case ISD::ATOMIC_LOAD_AND:
426 case ISD::ATOMIC_LOAD_OR:
427 case ISD::ATOMIC_LOAD_XOR:
428 case ISD::ATOMIC_LOAD_NAND:
429 case ISD::ATOMIC_LOAD_MIN:
430 case ISD::ATOMIC_LOAD_MAX:
431 case ISD::ATOMIC_LOAD_UMIN:
432 case ISD::ATOMIC_LOAD_UMAX: {
433 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
434 ID.AddInteger(AT->getMemoryVT().getRawBits());
435 ID.AddInteger(AT->getRawSubclassData());
438 case ISD::VECTOR_SHUFFLE: {
439 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
440 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
442 ID.AddInteger(SVN->getMaskElt(i));
445 case ISD::TargetBlockAddress:
446 case ISD::BlockAddress: {
447 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
448 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
451 } // end switch (N->getOpcode())
454 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
456 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
457 AddNodeIDOpcode(ID, N->getOpcode());
458 // Add the return value info.
459 AddNodeIDValueTypes(ID, N->getVTList());
460 // Add the operand info.
461 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
463 // Handle SDNode leafs with special info.
464 AddNodeIDCustom(ID, N);
467 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
468 /// the CSE map that carries volatility, indexing mode, and
469 /// extension/truncation information.
471 static inline unsigned
472 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) {
473 assert((ConvType & 3) == ConvType &&
474 "ConvType may not require more than 2 bits!");
475 assert((AM & 7) == AM &&
476 "AM may not require more than 3 bits!");
482 //===----------------------------------------------------------------------===//
483 // SelectionDAG Class
484 //===----------------------------------------------------------------------===//
486 /// doNotCSE - Return true if CSE should not be performed for this node.
487 static bool doNotCSE(SDNode *N) {
488 if (N->getValueType(0) == MVT::Flag)
489 return true; // Never CSE anything that produces a flag.
491 switch (N->getOpcode()) {
493 case ISD::HANDLENODE:
495 return true; // Never CSE these nodes.
498 // Check that remaining values produced are not flags.
499 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
500 if (N->getValueType(i) == MVT::Flag)
501 return true; // Never CSE anything that produces a flag.
506 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
508 void SelectionDAG::RemoveDeadNodes() {
509 // Create a dummy node (which is not added to allnodes), that adds a reference
510 // to the root node, preventing it from being deleted.
511 HandleSDNode Dummy(getRoot());
513 SmallVector<SDNode*, 128> DeadNodes;
515 // Add all obviously-dead nodes to the DeadNodes worklist.
516 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
518 DeadNodes.push_back(I);
520 RemoveDeadNodes(DeadNodes);
522 // If the root changed (e.g. it was a dead load, update the root).
523 setRoot(Dummy.getValue());
526 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
527 /// given list, and any nodes that become unreachable as a result.
528 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
529 DAGUpdateListener *UpdateListener) {
531 // Process the worklist, deleting the nodes and adding their uses to the
533 while (!DeadNodes.empty()) {
534 SDNode *N = DeadNodes.pop_back_val();
537 UpdateListener->NodeDeleted(N, 0);
539 // Take the node out of the appropriate CSE map.
540 RemoveNodeFromCSEMaps(N);
542 // Next, brutally remove the operand list. This is safe to do, as there are
543 // no cycles in the graph.
544 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
546 SDNode *Operand = Use.getNode();
549 // Now that we removed this operand, see if there are no uses of it left.
550 if (Operand->use_empty())
551 DeadNodes.push_back(Operand);
558 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
559 SmallVector<SDNode*, 16> DeadNodes(1, N);
560 RemoveDeadNodes(DeadNodes, UpdateListener);
563 void SelectionDAG::DeleteNode(SDNode *N) {
564 // First take this out of the appropriate CSE map.
565 RemoveNodeFromCSEMaps(N);
567 // Finally, remove uses due to operands of this node, remove from the
568 // AllNodes list, and delete the node.
569 DeleteNodeNotInCSEMaps(N);
572 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
573 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
574 assert(N->use_empty() && "Cannot delete a node that is not dead!");
576 // Drop all of the operands and decrement used node's use counts.
582 void SelectionDAG::DeallocateNode(SDNode *N) {
583 if (N->OperandsNeedDelete)
584 delete[] N->OperandList;
586 // Set the opcode to DELETED_NODE to help catch bugs when node
587 // memory is reallocated.
588 N->NodeType = ISD::DELETED_NODE;
590 NodeAllocator.Deallocate(AllNodes.remove(N));
593 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
594 /// correspond to it. This is useful when we're about to delete or repurpose
595 /// the node. We don't want future request for structurally identical nodes
596 /// to return N anymore.
597 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
599 switch (N->getOpcode()) {
600 case ISD::EntryToken:
601 llvm_unreachable("EntryToken should not be in CSEMaps!");
603 case ISD::HANDLENODE: return false; // noop.
605 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
606 "Cond code doesn't exist!");
607 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
608 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
610 case ISD::ExternalSymbol:
611 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
613 case ISD::TargetExternalSymbol: {
614 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
615 Erased = TargetExternalSymbols.erase(
616 std::pair<std::string,unsigned char>(ESN->getSymbol(),
617 ESN->getTargetFlags()));
620 case ISD::VALUETYPE: {
621 EVT VT = cast<VTSDNode>(N)->getVT();
622 if (VT.isExtended()) {
623 Erased = ExtendedValueTypeNodes.erase(VT);
625 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
626 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
631 // Remove it from the CSE Map.
632 Erased = CSEMap.RemoveNode(N);
636 // Verify that the node was actually in one of the CSE maps, unless it has a
637 // flag result (which cannot be CSE'd) or is one of the special cases that are
638 // not subject to CSE.
639 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
640 !N->isMachineOpcode() && !doNotCSE(N)) {
643 llvm_unreachable("Node is not in map!");
649 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
650 /// maps and modified in place. Add it back to the CSE maps, unless an identical
651 /// node already exists, in which case transfer all its users to the existing
652 /// node. This transfer can potentially trigger recursive merging.
655 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
656 DAGUpdateListener *UpdateListener) {
657 // For node types that aren't CSE'd, just act as if no identical node
660 SDNode *Existing = CSEMap.GetOrInsertNode(N);
662 // If there was already an existing matching node, use ReplaceAllUsesWith
663 // to replace the dead one with the existing one. This can cause
664 // recursive merging of other unrelated nodes down the line.
665 ReplaceAllUsesWith(N, Existing, UpdateListener);
667 // N is now dead. Inform the listener if it exists and delete it.
669 UpdateListener->NodeDeleted(N, Existing);
670 DeleteNodeNotInCSEMaps(N);
675 // If the node doesn't already exist, we updated it. Inform a listener if
678 UpdateListener->NodeUpdated(N);
681 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
682 /// were replaced with those specified. If this node is never memoized,
683 /// return null, otherwise return a pointer to the slot it would take. If a
684 /// node already exists with these operands, the slot will be non-null.
685 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
690 SDValue Ops[] = { Op };
692 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
693 AddNodeIDCustom(ID, N);
694 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
697 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
698 /// were replaced with those specified. If this node is never memoized,
699 /// return null, otherwise return a pointer to the slot it would take. If a
700 /// node already exists with these operands, the slot will be non-null.
701 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
702 SDValue Op1, SDValue Op2,
707 SDValue Ops[] = { Op1, Op2 };
709 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
710 AddNodeIDCustom(ID, N);
711 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
715 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
716 /// were replaced with those specified. If this node is never memoized,
717 /// return null, otherwise return a pointer to the slot it would take. If a
718 /// node already exists with these operands, the slot will be non-null.
719 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
720 const SDValue *Ops,unsigned NumOps,
726 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
727 AddNodeIDCustom(ID, N);
728 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
732 void SelectionDAG::VerifyNode(SDNode *N) {
733 switch (N->getOpcode()) {
736 case ISD::BUILD_PAIR: {
737 EVT VT = N->getValueType(0);
738 assert(N->getNumValues() == 1 && "Too many results!");
739 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
740 "Wrong return type!");
741 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
742 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
743 "Mismatched operand types!");
744 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
745 "Wrong operand type!");
746 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
747 "Wrong return type size");
750 case ISD::BUILD_VECTOR: {
751 assert(N->getNumValues() == 1 && "Too many results!");
752 assert(N->getValueType(0).isVector() && "Wrong return type!");
753 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
754 "Wrong number of operands!");
755 EVT EltVT = N->getValueType(0).getVectorElementType();
756 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
757 assert((I->getValueType() == EltVT ||
758 (EltVT.isInteger() && I->getValueType().isInteger() &&
759 EltVT.bitsLE(I->getValueType()))) &&
760 "Wrong operand type!");
766 /// getEVTAlignment - Compute the default alignment value for the
769 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
770 const Type *Ty = VT == MVT::iPTR ?
771 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
772 VT.getTypeForEVT(*getContext());
774 return TLI.getTargetData()->getABITypeAlignment(Ty);
777 // EntryNode could meaningfully have debug info if we can find it...
778 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
779 : TLI(tli), FLI(fli), DW(0),
780 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
781 getVTList(MVT::Other)), Root(getEntryNode()) {
782 AllNodes.push_back(&EntryNode);
785 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
790 Context = &mf.getFunction()->getContext();
793 SelectionDAG::~SelectionDAG() {
797 void SelectionDAG::allnodes_clear() {
798 assert(&*AllNodes.begin() == &EntryNode);
799 AllNodes.remove(AllNodes.begin());
800 while (!AllNodes.empty())
801 DeallocateNode(AllNodes.begin());
804 void SelectionDAG::clear() {
806 OperandAllocator.Reset();
809 ExtendedValueTypeNodes.clear();
810 ExternalSymbols.clear();
811 TargetExternalSymbols.clear();
812 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
813 static_cast<CondCodeSDNode*>(0));
814 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
815 static_cast<SDNode*>(0));
817 EntryNode.UseList = 0;
818 AllNodes.push_back(&EntryNode);
819 Root = getEntryNode();
822 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
823 return VT.bitsGT(Op.getValueType()) ?
824 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
825 getNode(ISD::TRUNCATE, DL, VT, Op);
828 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
829 return VT.bitsGT(Op.getValueType()) ?
830 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
831 getNode(ISD::TRUNCATE, DL, VT, Op);
834 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
835 assert(!VT.isVector() &&
836 "getZeroExtendInReg should use the vector element type instead of "
838 if (Op.getValueType() == VT) return Op;
839 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
840 APInt Imm = APInt::getLowBitsSet(BitWidth,
842 return getNode(ISD::AND, DL, Op.getValueType(), Op,
843 getConstant(Imm, Op.getValueType()));
846 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
848 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
849 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
851 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
852 return getNode(ISD::XOR, DL, VT, Val, NegOne);
855 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
856 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
857 assert((EltVT.getSizeInBits() >= 64 ||
858 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
859 "getConstant with a uint64_t value that doesn't fit in the type!");
860 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
863 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
864 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
868 assert(VT.isInteger() && "Cannot create FP integer constant!");
870 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
871 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
872 "APInt size does not match type size!");
874 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
876 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
880 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
882 return SDValue(N, 0);
884 N = NodeAllocator.Allocate<ConstantSDNode>();
885 new (N) ConstantSDNode(isT, &Val, EltVT);
886 CSEMap.InsertNode(N, IP);
887 AllNodes.push_back(N);
890 SDValue Result(N, 0);
892 SmallVector<SDValue, 8> Ops;
893 Ops.assign(VT.getVectorNumElements(), Result);
894 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
895 VT, &Ops[0], Ops.size());
900 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
901 return getConstant(Val, TLI.getPointerTy(), isTarget);
905 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
906 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
909 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
910 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
913 VT.isVector() ? VT.getVectorElementType() : VT;
915 // Do the map lookup using the actual bit pattern for the floating point
916 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
917 // we don't have issues with SNANs.
918 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
920 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
924 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
926 return SDValue(N, 0);
928 N = NodeAllocator.Allocate<ConstantFPSDNode>();
929 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
930 CSEMap.InsertNode(N, IP);
931 AllNodes.push_back(N);
934 SDValue Result(N, 0);
936 SmallVector<SDValue, 8> Ops;
937 Ops.assign(VT.getVectorNumElements(), Result);
938 // FIXME DebugLoc info might be appropriate here
939 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
940 VT, &Ops[0], Ops.size());
945 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
947 VT.isVector() ? VT.getVectorElementType() : VT;
949 return getConstantFP(APFloat((float)Val), VT, isTarget);
951 return getConstantFP(APFloat(Val), VT, isTarget);
954 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
955 EVT VT, int64_t Offset,
957 unsigned char TargetFlags) {
958 assert((TargetFlags == 0 || isTargetGA) &&
959 "Cannot set target flags on target-independent globals");
961 // Truncate (with sign-extension) the offset value to the pointer size.
962 EVT PTy = TLI.getPointerTy();
963 unsigned BitWidth = PTy.getSizeInBits();
965 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
967 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
969 // If GV is an alias then use the aliasee for determining thread-localness.
970 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
971 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
975 if (GVar && GVar->isThreadLocal())
976 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
978 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
981 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
983 ID.AddInteger(Offset);
984 ID.AddInteger(TargetFlags);
986 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
987 return SDValue(E, 0);
988 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
989 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
990 CSEMap.InsertNode(N, IP);
991 AllNodes.push_back(N);
992 return SDValue(N, 0);
995 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
996 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
998 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1002 return SDValue(E, 0);
1003 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1004 new (N) FrameIndexSDNode(FI, VT, isTarget);
1005 CSEMap.InsertNode(N, IP);
1006 AllNodes.push_back(N);
1007 return SDValue(N, 0);
1010 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1011 unsigned char TargetFlags) {
1012 assert((TargetFlags == 0 || isTarget) &&
1013 "Cannot set target flags on target-independent jump tables");
1014 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1015 FoldingSetNodeID ID;
1016 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1018 ID.AddInteger(TargetFlags);
1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1021 return SDValue(E, 0);
1022 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1023 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1024 CSEMap.InsertNode(N, IP);
1025 AllNodes.push_back(N);
1026 return SDValue(N, 0);
1029 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1030 unsigned Alignment, int Offset,
1032 unsigned char TargetFlags) {
1033 assert((TargetFlags == 0 || isTarget) &&
1034 "Cannot set target flags on target-independent globals");
1036 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1037 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1038 FoldingSetNodeID ID;
1039 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1040 ID.AddInteger(Alignment);
1041 ID.AddInteger(Offset);
1043 ID.AddInteger(TargetFlags);
1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1046 return SDValue(E, 0);
1047 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1048 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1049 CSEMap.InsertNode(N, IP);
1050 AllNodes.push_back(N);
1051 return SDValue(N, 0);
1055 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1056 unsigned Alignment, int Offset,
1058 unsigned char TargetFlags) {
1059 assert((TargetFlags == 0 || isTarget) &&
1060 "Cannot set target flags on target-independent globals");
1062 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1063 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1064 FoldingSetNodeID ID;
1065 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1066 ID.AddInteger(Alignment);
1067 ID.AddInteger(Offset);
1068 C->AddSelectionDAGCSEId(ID);
1069 ID.AddInteger(TargetFlags);
1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1072 return SDValue(E, 0);
1073 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1074 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1075 CSEMap.InsertNode(N, IP);
1076 AllNodes.push_back(N);
1077 return SDValue(N, 0);
1080 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1086 return SDValue(E, 0);
1087 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1088 new (N) BasicBlockSDNode(MBB);
1089 CSEMap.InsertNode(N, IP);
1090 AllNodes.push_back(N);
1091 return SDValue(N, 0);
1094 SDValue SelectionDAG::getValueType(EVT VT) {
1095 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1096 ValueTypeNodes.size())
1097 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1099 SDNode *&N = VT.isExtended() ?
1100 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1102 if (N) return SDValue(N, 0);
1103 N = NodeAllocator.Allocate<VTSDNode>();
1104 new (N) VTSDNode(VT);
1105 AllNodes.push_back(N);
1106 return SDValue(N, 0);
1109 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1110 SDNode *&N = ExternalSymbols[Sym];
1111 if (N) return SDValue(N, 0);
1112 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1113 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1119 unsigned char TargetFlags) {
1121 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1123 if (N) return SDValue(N, 0);
1124 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1125 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1126 AllNodes.push_back(N);
1127 return SDValue(N, 0);
1130 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1131 if ((unsigned)Cond >= CondCodeNodes.size())
1132 CondCodeNodes.resize(Cond+1);
1134 if (CondCodeNodes[Cond] == 0) {
1135 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1136 new (N) CondCodeSDNode(Cond);
1137 CondCodeNodes[Cond] = N;
1138 AllNodes.push_back(N);
1140 return SDValue(CondCodeNodes[Cond], 0);
1143 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1144 // the shuffle mask M that point at N1 to point at N2, and indices that point
1145 // N2 to point at N1.
1146 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1148 int NElts = M.size();
1149 for (int i = 0; i != NElts; ++i) {
1157 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1158 SDValue N2, const int *Mask) {
1159 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1160 assert(VT.isVector() && N1.getValueType().isVector() &&
1161 "Vector Shuffle VTs must be a vectors");
1162 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1163 && "Vector Shuffle VTs must have same element type");
1165 // Canonicalize shuffle undef, undef -> undef
1166 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1167 return getUNDEF(VT);
1169 // Validate that all indices in Mask are within the range of the elements
1170 // input to the shuffle.
1171 unsigned NElts = VT.getVectorNumElements();
1172 SmallVector<int, 8> MaskVec;
1173 for (unsigned i = 0; i != NElts; ++i) {
1174 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1175 MaskVec.push_back(Mask[i]);
1178 // Canonicalize shuffle v, v -> v, undef
1181 for (unsigned i = 0; i != NElts; ++i)
1182 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1185 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1186 if (N1.getOpcode() == ISD::UNDEF)
1187 commuteShuffle(N1, N2, MaskVec);
1189 // Canonicalize all index into lhs, -> shuffle lhs, undef
1190 // Canonicalize all index into rhs, -> shuffle rhs, undef
1191 bool AllLHS = true, AllRHS = true;
1192 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1193 for (unsigned i = 0; i != NElts; ++i) {
1194 if (MaskVec[i] >= (int)NElts) {
1199 } else if (MaskVec[i] >= 0) {
1203 if (AllLHS && AllRHS)
1204 return getUNDEF(VT);
1205 if (AllLHS && !N2Undef)
1209 commuteShuffle(N1, N2, MaskVec);
1212 // If Identity shuffle, or all shuffle in to undef, return that node.
1213 bool AllUndef = true;
1214 bool Identity = true;
1215 for (unsigned i = 0; i != NElts; ++i) {
1216 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1217 if (MaskVec[i] >= 0) AllUndef = false;
1219 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1222 return getUNDEF(VT);
1224 FoldingSetNodeID ID;
1225 SDValue Ops[2] = { N1, N2 };
1226 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1227 for (unsigned i = 0; i != NElts; ++i)
1228 ID.AddInteger(MaskVec[i]);
1231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1232 return SDValue(E, 0);
1234 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1235 // SDNode doesn't have access to it. This memory will be "leaked" when
1236 // the node is deallocated, but recovered when the NodeAllocator is released.
1237 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1238 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1240 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1241 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1242 CSEMap.InsertNode(N, IP);
1243 AllNodes.push_back(N);
1244 return SDValue(N, 0);
1247 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1248 SDValue Val, SDValue DTy,
1249 SDValue STy, SDValue Rnd, SDValue Sat,
1250 ISD::CvtCode Code) {
1251 // If the src and dest types are the same and the conversion is between
1252 // integer types of the same sign or two floats, no conversion is necessary.
1254 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1257 FoldingSetNodeID ID;
1258 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1259 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1261 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1262 return SDValue(E, 0);
1263 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1264 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1265 CSEMap.InsertNode(N, IP);
1266 AllNodes.push_back(N);
1267 return SDValue(N, 0);
1270 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1271 FoldingSetNodeID ID;
1272 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1273 ID.AddInteger(RegNo);
1275 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1276 return SDValue(E, 0);
1277 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1278 new (N) RegisterSDNode(RegNo, VT);
1279 CSEMap.InsertNode(N, IP);
1280 AllNodes.push_back(N);
1281 return SDValue(N, 0);
1284 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1287 FoldingSetNodeID ID;
1288 SDValue Ops[] = { Root };
1289 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1290 ID.AddInteger(LabelID);
1292 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1293 return SDValue(E, 0);
1294 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1295 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1296 CSEMap.InsertNode(N, IP);
1297 AllNodes.push_back(N);
1298 return SDValue(N, 0);
1301 SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
1303 unsigned char TargetFlags) {
1304 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1306 FoldingSetNodeID ID;
1307 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1309 ID.AddInteger(TargetFlags);
1311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1312 return SDValue(E, 0);
1313 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
1314 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1315 CSEMap.InsertNode(N, IP);
1316 AllNodes.push_back(N);
1317 return SDValue(N, 0);
1320 SDValue SelectionDAG::getSrcValue(const Value *V) {
1321 assert((!V || isa<PointerType>(V->getType())) &&
1322 "SrcValue is not a pointer?");
1324 FoldingSetNodeID ID;
1325 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1330 return SDValue(E, 0);
1332 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1333 new (N) SrcValueSDNode(V);
1334 CSEMap.InsertNode(N, IP);
1335 AllNodes.push_back(N);
1336 return SDValue(N, 0);
1339 /// getShiftAmountOperand - Return the specified value casted to
1340 /// the target's desired shift amount type.
1341 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1342 EVT OpTy = Op.getValueType();
1343 MVT ShTy = TLI.getShiftAmountTy();
1344 if (OpTy == ShTy || OpTy.isVector()) return Op;
1346 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1347 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1350 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1351 /// specified value type.
1352 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1353 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1354 unsigned ByteSize = VT.getStoreSize();
1355 const Type *Ty = VT.getTypeForEVT(*getContext());
1356 unsigned StackAlign =
1357 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1359 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1360 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1363 /// CreateStackTemporary - Create a stack temporary suitable for holding
1364 /// either of the specified value types.
1365 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1366 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1367 VT2.getStoreSizeInBits())/8;
1368 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1369 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1370 const TargetData *TD = TLI.getTargetData();
1371 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1372 TD->getPrefTypeAlignment(Ty2));
1374 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1375 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1376 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1379 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1380 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1381 // These setcc operations always fold.
1385 case ISD::SETFALSE2: return getConstant(0, VT);
1387 case ISD::SETTRUE2: return getConstant(1, VT);
1399 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1403 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1404 const APInt &C2 = N2C->getAPIntValue();
1405 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1406 const APInt &C1 = N1C->getAPIntValue();
1409 default: llvm_unreachable("Unknown integer setcc!");
1410 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1411 case ISD::SETNE: return getConstant(C1 != C2, VT);
1412 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1413 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1414 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1415 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1416 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1417 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1418 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1419 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1423 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1424 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1425 // No compile time operations on this type yet.
1426 if (N1C->getValueType(0) == MVT::ppcf128)
1429 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1432 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1433 return getUNDEF(VT);
1435 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1436 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1437 return getUNDEF(VT);
1439 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1440 R==APFloat::cmpLessThan, VT);
1441 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1442 return getUNDEF(VT);
1444 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1445 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1446 return getUNDEF(VT);
1448 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1449 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1450 return getUNDEF(VT);
1452 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1453 R==APFloat::cmpEqual, VT);
1454 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1455 return getUNDEF(VT);
1457 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1458 R==APFloat::cmpEqual, VT);
1459 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1460 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1461 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1462 R==APFloat::cmpEqual, VT);
1463 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1464 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1465 R==APFloat::cmpLessThan, VT);
1466 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1467 R==APFloat::cmpUnordered, VT);
1468 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1469 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1472 // Ensure that the constant occurs on the RHS.
1473 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1477 // Could not fold it.
1481 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1482 /// use this predicate to simplify operations downstream.
1483 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1484 // This predicate is not safe for vector operations.
1485 if (Op.getValueType().isVector())
1488 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1489 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1492 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1493 /// this predicate to simplify operations downstream. Mask is known to be zero
1494 /// for bits that V cannot have.
1495 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1496 unsigned Depth) const {
1497 APInt KnownZero, KnownOne;
1498 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1499 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1500 return (KnownZero & Mask) == Mask;
1503 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1504 /// known to be either zero or one and return them in the KnownZero/KnownOne
1505 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1507 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1508 APInt &KnownZero, APInt &KnownOne,
1509 unsigned Depth) const {
1510 unsigned BitWidth = Mask.getBitWidth();
1511 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1512 "Mask size mismatches value type size!");
1514 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1515 if (Depth == 6 || Mask == 0)
1516 return; // Limit search depth.
1518 APInt KnownZero2, KnownOne2;
1520 switch (Op.getOpcode()) {
1522 // We know all of the bits for a constant!
1523 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1524 KnownZero = ~KnownOne & Mask;
1527 // If either the LHS or the RHS are Zero, the result is zero.
1528 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1529 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1530 KnownZero2, KnownOne2, Depth+1);
1531 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1532 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1534 // Output known-1 bits are only known if set in both the LHS & RHS.
1535 KnownOne &= KnownOne2;
1536 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1537 KnownZero |= KnownZero2;
1540 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1541 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1542 KnownZero2, KnownOne2, Depth+1);
1543 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1544 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1546 // Output known-0 bits are only known if clear in both the LHS & RHS.
1547 KnownZero &= KnownZero2;
1548 // Output known-1 are known to be set if set in either the LHS | RHS.
1549 KnownOne |= KnownOne2;
1552 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1553 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1554 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1555 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1557 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1558 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1559 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1560 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1561 KnownZero = KnownZeroOut;
1565 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1566 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1567 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1568 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1569 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1571 // If low bits are zero in either operand, output low known-0 bits.
1572 // Also compute a conserative estimate for high known-0 bits.
1573 // More trickiness is possible, but this is sufficient for the
1574 // interesting case of alignment computation.
1576 unsigned TrailZ = KnownZero.countTrailingOnes() +
1577 KnownZero2.countTrailingOnes();
1578 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1579 KnownZero2.countLeadingOnes(),
1580 BitWidth) - BitWidth;
1582 TrailZ = std::min(TrailZ, BitWidth);
1583 LeadZ = std::min(LeadZ, BitWidth);
1584 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1585 APInt::getHighBitsSet(BitWidth, LeadZ);
1590 // For the purposes of computing leading zeros we can conservatively
1591 // treat a udiv as a logical right shift by the power of 2 known to
1592 // be less than the denominator.
1593 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1594 ComputeMaskedBits(Op.getOperand(0),
1595 AllOnes, KnownZero2, KnownOne2, Depth+1);
1596 unsigned LeadZ = KnownZero2.countLeadingOnes();
1600 ComputeMaskedBits(Op.getOperand(1),
1601 AllOnes, KnownZero2, KnownOne2, Depth+1);
1602 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1603 if (RHSUnknownLeadingOnes != BitWidth)
1604 LeadZ = std::min(BitWidth,
1605 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1607 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1611 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1612 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // Only known if known in both the LHS and RHS.
1617 KnownOne &= KnownOne2;
1618 KnownZero &= KnownZero2;
1620 case ISD::SELECT_CC:
1621 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1622 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1626 // Only known if known in both the LHS and RHS.
1627 KnownOne &= KnownOne2;
1628 KnownZero &= KnownZero2;
1636 if (Op.getResNo() != 1)
1638 // The boolean result conforms to getBooleanContents. Fall through.
1640 // If we know the result of a setcc has the top bits zero, use this info.
1641 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1643 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1646 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1647 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1648 unsigned ShAmt = SA->getZExtValue();
1650 // If the shift count is an invalid immediate, don't do anything.
1651 if (ShAmt >= BitWidth)
1654 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1655 KnownZero, KnownOne, Depth+1);
1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1657 KnownZero <<= ShAmt;
1659 // low bits known zero.
1660 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1664 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1665 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1666 unsigned ShAmt = SA->getZExtValue();
1668 // If the shift count is an invalid immediate, don't do anything.
1669 if (ShAmt >= BitWidth)
1672 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1673 KnownZero, KnownOne, Depth+1);
1674 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1675 KnownZero = KnownZero.lshr(ShAmt);
1676 KnownOne = KnownOne.lshr(ShAmt);
1678 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1679 KnownZero |= HighBits; // High bits known zero.
1683 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1684 unsigned ShAmt = SA->getZExtValue();
1686 // If the shift count is an invalid immediate, don't do anything.
1687 if (ShAmt >= BitWidth)
1690 APInt InDemandedMask = (Mask << ShAmt);
1691 // If any of the demanded bits are produced by the sign extension, we also
1692 // demand the input sign bit.
1693 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1694 if (HighBits.getBoolValue())
1695 InDemandedMask |= APInt::getSignBit(BitWidth);
1697 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1699 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1700 KnownZero = KnownZero.lshr(ShAmt);
1701 KnownOne = KnownOne.lshr(ShAmt);
1703 // Handle the sign bits.
1704 APInt SignBit = APInt::getSignBit(BitWidth);
1705 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1707 if (KnownZero.intersects(SignBit)) {
1708 KnownZero |= HighBits; // New bits are known zero.
1709 } else if (KnownOne.intersects(SignBit)) {
1710 KnownOne |= HighBits; // New bits are known one.
1714 case ISD::SIGN_EXTEND_INREG: {
1715 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1716 unsigned EBits = EVT.getSizeInBits();
1718 // Sign extension. Compute the demanded bits in the result that are not
1719 // present in the input.
1720 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1722 APInt InSignBit = APInt::getSignBit(EBits);
1723 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1725 // If the sign extended bits are demanded, we know that the sign
1727 InSignBit.zext(BitWidth);
1728 if (NewBits.getBoolValue())
1729 InputDemandedBits |= InSignBit;
1731 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1732 KnownZero, KnownOne, Depth+1);
1733 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1735 // If the sign bit of the input is known set or clear, then we know the
1736 // top bits of the result.
1737 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1738 KnownZero |= NewBits;
1739 KnownOne &= ~NewBits;
1740 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1741 KnownOne |= NewBits;
1742 KnownZero &= ~NewBits;
1743 } else { // Input sign bit unknown
1744 KnownZero &= ~NewBits;
1745 KnownOne &= ~NewBits;
1752 unsigned LowBits = Log2_32(BitWidth)+1;
1753 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1758 if (ISD::isZEXTLoad(Op.getNode())) {
1759 LoadSDNode *LD = cast<LoadSDNode>(Op);
1760 EVT VT = LD->getMemoryVT();
1761 unsigned MemBits = VT.getSizeInBits();
1762 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1766 case ISD::ZERO_EXTEND: {
1767 EVT InVT = Op.getOperand(0).getValueType();
1768 unsigned InBits = InVT.getScalarType().getSizeInBits();
1769 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1770 APInt InMask = Mask;
1771 InMask.trunc(InBits);
1772 KnownZero.trunc(InBits);
1773 KnownOne.trunc(InBits);
1774 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1775 KnownZero.zext(BitWidth);
1776 KnownOne.zext(BitWidth);
1777 KnownZero |= NewBits;
1780 case ISD::SIGN_EXTEND: {
1781 EVT InVT = Op.getOperand(0).getValueType();
1782 unsigned InBits = InVT.getScalarType().getSizeInBits();
1783 APInt InSignBit = APInt::getSignBit(InBits);
1784 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1785 APInt InMask = Mask;
1786 InMask.trunc(InBits);
1788 // If any of the sign extended bits are demanded, we know that the sign
1789 // bit is demanded. Temporarily set this bit in the mask for our callee.
1790 if (NewBits.getBoolValue())
1791 InMask |= InSignBit;
1793 KnownZero.trunc(InBits);
1794 KnownOne.trunc(InBits);
1795 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1797 // Note if the sign bit is known to be zero or one.
1798 bool SignBitKnownZero = KnownZero.isNegative();
1799 bool SignBitKnownOne = KnownOne.isNegative();
1800 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1801 "Sign bit can't be known to be both zero and one!");
1803 // If the sign bit wasn't actually demanded by our caller, we don't
1804 // want it set in the KnownZero and KnownOne result values. Reset the
1805 // mask and reapply it to the result values.
1807 InMask.trunc(InBits);
1808 KnownZero &= InMask;
1811 KnownZero.zext(BitWidth);
1812 KnownOne.zext(BitWidth);
1814 // If the sign bit is known zero or one, the top bits match.
1815 if (SignBitKnownZero)
1816 KnownZero |= NewBits;
1817 else if (SignBitKnownOne)
1818 KnownOne |= NewBits;
1821 case ISD::ANY_EXTEND: {
1822 EVT InVT = Op.getOperand(0).getValueType();
1823 unsigned InBits = InVT.getScalarType().getSizeInBits();
1824 APInt InMask = Mask;
1825 InMask.trunc(InBits);
1826 KnownZero.trunc(InBits);
1827 KnownOne.trunc(InBits);
1828 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1829 KnownZero.zext(BitWidth);
1830 KnownOne.zext(BitWidth);
1833 case ISD::TRUNCATE: {
1834 EVT InVT = Op.getOperand(0).getValueType();
1835 unsigned InBits = InVT.getScalarType().getSizeInBits();
1836 APInt InMask = Mask;
1837 InMask.zext(InBits);
1838 KnownZero.zext(InBits);
1839 KnownOne.zext(InBits);
1840 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1841 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1842 KnownZero.trunc(BitWidth);
1843 KnownOne.trunc(BitWidth);
1846 case ISD::AssertZext: {
1847 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1848 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1849 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1851 KnownZero |= (~InMask) & Mask;
1855 // All bits are zero except the low bit.
1856 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1860 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1861 // We know that the top bits of C-X are clear if X contains less bits
1862 // than C (i.e. no wrap-around can happen). For example, 20-X is
1863 // positive if we can prove that X is >= 0 and < 16.
1864 if (CLHS->getAPIntValue().isNonNegative()) {
1865 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1866 // NLZ can't be BitWidth with no sign bit
1867 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1868 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1871 // If all of the MaskV bits are known to be zero, then we know the
1872 // output top bits are zero, because we now know that the output is
1874 if ((KnownZero2 & MaskV) == MaskV) {
1875 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1876 // Top bits known zero.
1877 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1884 // Output known-0 bits are known if clear or set in both the low clear bits
1885 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1886 // low 3 bits clear.
1887 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1888 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1889 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1890 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1892 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1893 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1894 KnownZeroOut = std::min(KnownZeroOut,
1895 KnownZero2.countTrailingOnes());
1897 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1901 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1902 const APInt &RA = Rem->getAPIntValue();
1903 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1904 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1905 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1906 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1908 // If the sign bit of the first operand is zero, the sign bit of
1909 // the result is zero. If the first operand has no one bits below
1910 // the second operand's single 1 bit, its sign will be zero.
1911 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1912 KnownZero2 |= ~LowBits;
1914 KnownZero |= KnownZero2 & Mask;
1916 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1921 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1922 const APInt &RA = Rem->getAPIntValue();
1923 if (RA.isPowerOf2()) {
1924 APInt LowBits = (RA - 1);
1925 APInt Mask2 = LowBits & Mask;
1926 KnownZero |= ~LowBits & Mask;
1927 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1928 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1933 // Since the result is less than or equal to either operand, any leading
1934 // zero bits in either operand must also exist in the result.
1935 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1936 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1938 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1941 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1942 KnownZero2.countLeadingOnes());
1944 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1948 // Allow the target to implement this method for its nodes.
1949 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1950 case ISD::INTRINSIC_WO_CHAIN:
1951 case ISD::INTRINSIC_W_CHAIN:
1952 case ISD::INTRINSIC_VOID:
1953 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1960 /// ComputeNumSignBits - Return the number of times the sign bit of the
1961 /// register is replicated into the other bits. We know that at least 1 bit
1962 /// is always equal to the sign bit (itself), but other cases can give us
1963 /// information. For example, immediately after an "SRA X, 2", we know that
1964 /// the top 3 bits are all equal to each other, so we return 3.
1965 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1966 EVT VT = Op.getValueType();
1967 assert(VT.isInteger() && "Invalid VT!");
1968 unsigned VTBits = VT.getScalarType().getSizeInBits();
1970 unsigned FirstAnswer = 1;
1973 return 1; // Limit search depth.
1975 switch (Op.getOpcode()) {
1977 case ISD::AssertSext:
1978 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1979 return VTBits-Tmp+1;
1980 case ISD::AssertZext:
1981 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1984 case ISD::Constant: {
1985 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1986 // If negative, return # leading ones.
1987 if (Val.isNegative())
1988 return Val.countLeadingOnes();
1990 // Return # leading zeros.
1991 return Val.countLeadingZeros();
1994 case ISD::SIGN_EXTEND:
1995 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
1996 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1998 case ISD::SIGN_EXTEND_INREG:
1999 // Max of the input and what this extends.
2000 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2003 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2004 return std::max(Tmp, Tmp2);
2007 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2008 // SRA X, C -> adds C sign bits.
2009 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2010 Tmp += C->getZExtValue();
2011 if (Tmp > VTBits) Tmp = VTBits;
2015 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2016 // shl destroys sign bits.
2017 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2018 if (C->getZExtValue() >= VTBits || // Bad shift.
2019 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2020 return Tmp - C->getZExtValue();
2025 case ISD::XOR: // NOT is handled here.
2026 // Logical binary ops preserve the number of sign bits at the worst.
2027 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2029 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2030 FirstAnswer = std::min(Tmp, Tmp2);
2031 // We computed what we know about the sign bits as our first
2032 // answer. Now proceed to the generic code that uses
2033 // ComputeMaskedBits, and pick whichever answer is better.
2038 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2039 if (Tmp == 1) return 1; // Early out.
2040 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2041 return std::min(Tmp, Tmp2);
2049 if (Op.getResNo() != 1)
2051 // The boolean result conforms to getBooleanContents. Fall through.
2053 // If setcc returns 0/-1, all bits are sign bits.
2054 if (TLI.getBooleanContents() ==
2055 TargetLowering::ZeroOrNegativeOneBooleanContent)
2060 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2061 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2063 // Handle rotate right by N like a rotate left by 32-N.
2064 if (Op.getOpcode() == ISD::ROTR)
2065 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2067 // If we aren't rotating out all of the known-in sign bits, return the
2068 // number that are left. This handles rotl(sext(x), 1) for example.
2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2070 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2074 // Add can have at most one carry bit. Thus we know that the output
2075 // is, at worst, one more bit than the inputs.
2076 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2077 if (Tmp == 1) return 1; // Early out.
2079 // Special case decrementing a value (ADD X, -1):
2080 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2081 if (CRHS->isAllOnesValue()) {
2082 APInt KnownZero, KnownOne;
2083 APInt Mask = APInt::getAllOnesValue(VTBits);
2084 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2086 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2088 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2091 // If we are subtracting one from a positive number, there is no carry
2092 // out of the result.
2093 if (KnownZero.isNegative())
2097 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2098 if (Tmp2 == 1) return 1;
2099 return std::min(Tmp, Tmp2)-1;
2103 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2104 if (Tmp2 == 1) return 1;
2107 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2108 if (CLHS->isNullValue()) {
2109 APInt KnownZero, KnownOne;
2110 APInt Mask = APInt::getAllOnesValue(VTBits);
2111 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2112 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2114 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2117 // If the input is known to be positive (the sign bit is known clear),
2118 // the output of the NEG has the same number of sign bits as the input.
2119 if (KnownZero.isNegative())
2122 // Otherwise, we treat this like a SUB.
2125 // Sub can have at most one carry bit. Thus we know that the output
2126 // is, at worst, one more bit than the inputs.
2127 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2128 if (Tmp == 1) return 1; // Early out.
2129 return std::min(Tmp, Tmp2)-1;
2132 // FIXME: it's tricky to do anything useful for this, but it is an important
2133 // case for targets like X86.
2137 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2138 if (Op.getOpcode() == ISD::LOAD) {
2139 LoadSDNode *LD = cast<LoadSDNode>(Op);
2140 unsigned ExtType = LD->getExtensionType();
2143 case ISD::SEXTLOAD: // '17' bits known
2144 Tmp = LD->getMemoryVT().getSizeInBits();
2145 return VTBits-Tmp+1;
2146 case ISD::ZEXTLOAD: // '16' bits known
2147 Tmp = LD->getMemoryVT().getSizeInBits();
2152 // Allow the target to implement this method for its nodes.
2153 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2154 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2155 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2156 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2157 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2158 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2161 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2162 // use this information.
2163 APInt KnownZero, KnownOne;
2164 APInt Mask = APInt::getAllOnesValue(VTBits);
2165 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2167 if (KnownZero.isNegative()) { // sign bit is 0
2169 } else if (KnownOne.isNegative()) { // sign bit is 1;
2176 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2177 // the number of identical bits in the top of the input value.
2179 Mask <<= Mask.getBitWidth()-VTBits;
2180 // Return # leading zeros. We use 'min' here in case Val was zero before
2181 // shifting. We don't want to return '64' as for an i32 "0".
2182 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2185 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2186 // If we're told that NaNs won't happen, assume they won't.
2187 if (FiniteOnlyFPMath())
2190 // If the value is a constant, we can obviously see if it is a NaN or not.
2191 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2192 return !C->getValueAPF().isNaN();
2194 // TODO: Recognize more cases here.
2199 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2200 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2201 if (!GA) return false;
2202 if (GA->getOffset() != 0) return false;
2203 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2204 if (!GV) return false;
2205 MachineModuleInfo *MMI = getMachineModuleInfo();
2206 return MMI && MMI->hasDebugInfo();
2210 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2211 /// element of the result of the vector shuffle.
2212 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2214 EVT VT = N->getValueType(0);
2215 DebugLoc dl = N->getDebugLoc();
2216 if (N->getMaskElt(i) < 0)
2217 return getUNDEF(VT.getVectorElementType());
2218 unsigned Index = N->getMaskElt(i);
2219 unsigned NumElems = VT.getVectorNumElements();
2220 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2223 if (V.getOpcode() == ISD::BIT_CONVERT) {
2224 V = V.getOperand(0);
2225 EVT VVT = V.getValueType();
2226 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2229 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2230 return (Index == 0) ? V.getOperand(0)
2231 : getUNDEF(VT.getVectorElementType());
2232 if (V.getOpcode() == ISD::BUILD_VECTOR)
2233 return V.getOperand(Index);
2234 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2235 return getShuffleScalarElt(SVN, Index);
2240 /// getNode - Gets or creates the specified node.
2242 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2243 FoldingSetNodeID ID;
2244 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2247 return SDValue(E, 0);
2248 SDNode *N = NodeAllocator.Allocate<SDNode>();
2249 new (N) SDNode(Opcode, DL, getVTList(VT));
2250 CSEMap.InsertNode(N, IP);
2252 AllNodes.push_back(N);
2256 return SDValue(N, 0);
2259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2260 EVT VT, SDValue Operand) {
2261 // Constant fold unary operations with an integer constant operand.
2262 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2263 const APInt &Val = C->getAPIntValue();
2264 unsigned BitWidth = VT.getSizeInBits();
2267 case ISD::SIGN_EXTEND:
2268 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2269 case ISD::ANY_EXTEND:
2270 case ISD::ZERO_EXTEND:
2272 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2273 case ISD::UINT_TO_FP:
2274 case ISD::SINT_TO_FP: {
2275 const uint64_t zero[] = {0, 0};
2276 // No compile time operations on this type.
2277 if (VT==MVT::ppcf128)
2279 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2280 (void)apf.convertFromAPInt(Val,
2281 Opcode==ISD::SINT_TO_FP,
2282 APFloat::rmNearestTiesToEven);
2283 return getConstantFP(apf, VT);
2285 case ISD::BIT_CONVERT:
2286 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2287 return getConstantFP(Val.bitsToFloat(), VT);
2288 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2289 return getConstantFP(Val.bitsToDouble(), VT);
2292 return getConstant(Val.byteSwap(), VT);
2294 return getConstant(Val.countPopulation(), VT);
2296 return getConstant(Val.countLeadingZeros(), VT);
2298 return getConstant(Val.countTrailingZeros(), VT);
2302 // Constant fold unary operations with a floating point constant operand.
2303 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2304 APFloat V = C->getValueAPF(); // make copy
2305 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2309 return getConstantFP(V, VT);
2312 return getConstantFP(V, VT);
2314 case ISD::FP_EXTEND: {
2316 // This can return overflow, underflow, or inexact; we don't care.
2317 // FIXME need to be more flexible about rounding mode.
2318 (void)V.convert(*EVTToAPFloatSemantics(VT),
2319 APFloat::rmNearestTiesToEven, &ignored);
2320 return getConstantFP(V, VT);
2322 case ISD::FP_TO_SINT:
2323 case ISD::FP_TO_UINT: {
2326 assert(integerPartWidth >= 64);
2327 // FIXME need to be more flexible about rounding mode.
2328 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2329 Opcode==ISD::FP_TO_SINT,
2330 APFloat::rmTowardZero, &ignored);
2331 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2333 APInt api(VT.getSizeInBits(), 2, x);
2334 return getConstant(api, VT);
2336 case ISD::BIT_CONVERT:
2337 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2338 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2339 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2340 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2346 unsigned OpOpcode = Operand.getNode()->getOpcode();
2348 case ISD::TokenFactor:
2349 case ISD::MERGE_VALUES:
2350 case ISD::CONCAT_VECTORS:
2351 return Operand; // Factor, merge or concat of one node? No need.
2352 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2353 case ISD::FP_EXTEND:
2354 assert(VT.isFloatingPoint() &&
2355 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2356 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2357 if (Operand.getOpcode() == ISD::UNDEF)
2358 return getUNDEF(VT);
2360 case ISD::SIGN_EXTEND:
2361 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2362 "Invalid SIGN_EXTEND!");
2363 if (Operand.getValueType() == VT) return Operand; // noop extension
2364 assert(Operand.getValueType().bitsLT(VT)
2365 && "Invalid sext node, dst < src!");
2366 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2367 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2369 case ISD::ZERO_EXTEND:
2370 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2371 "Invalid ZERO_EXTEND!");
2372 if (Operand.getValueType() == VT) return Operand; // noop extension
2373 assert(Operand.getValueType().bitsLT(VT)
2374 && "Invalid zext node, dst < src!");
2375 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2376 return getNode(ISD::ZERO_EXTEND, DL, VT,
2377 Operand.getNode()->getOperand(0));
2379 case ISD::ANY_EXTEND:
2380 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2381 "Invalid ANY_EXTEND!");
2382 if (Operand.getValueType() == VT) return Operand; // noop extension
2383 assert(Operand.getValueType().bitsLT(VT)
2384 && "Invalid anyext node, dst < src!");
2385 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2386 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2387 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2390 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2391 "Invalid TRUNCATE!");
2392 if (Operand.getValueType() == VT) return Operand; // noop truncate
2393 assert(Operand.getValueType().bitsGT(VT)
2394 && "Invalid truncate node, src < dst!");
2395 if (OpOpcode == ISD::TRUNCATE)
2396 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2397 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2398 OpOpcode == ISD::ANY_EXTEND) {
2399 // If the source is smaller than the dest, we still need an extend.
2400 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2401 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2402 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2403 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2405 return Operand.getNode()->getOperand(0);
2408 case ISD::BIT_CONVERT:
2409 // Basic sanity checking.
2410 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2411 && "Cannot BIT_CONVERT between types of different sizes!");
2412 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2413 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2414 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2415 if (OpOpcode == ISD::UNDEF)
2416 return getUNDEF(VT);
2418 case ISD::SCALAR_TO_VECTOR:
2419 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2420 (VT.getVectorElementType() == Operand.getValueType() ||
2421 (VT.getVectorElementType().isInteger() &&
2422 Operand.getValueType().isInteger() &&
2423 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2424 "Illegal SCALAR_TO_VECTOR node!");
2425 if (OpOpcode == ISD::UNDEF)
2426 return getUNDEF(VT);
2427 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2428 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2429 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2430 Operand.getConstantOperandVal(1) == 0 &&
2431 Operand.getOperand(0).getValueType() == VT)
2432 return Operand.getOperand(0);
2435 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2436 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2437 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2438 Operand.getNode()->getOperand(0));
2439 if (OpOpcode == ISD::FNEG) // --X -> X
2440 return Operand.getNode()->getOperand(0);
2443 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2444 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2449 SDVTList VTs = getVTList(VT);
2450 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2451 FoldingSetNodeID ID;
2452 SDValue Ops[1] = { Operand };
2453 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2455 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2456 return SDValue(E, 0);
2457 N = NodeAllocator.Allocate<UnarySDNode>();
2458 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2459 CSEMap.InsertNode(N, IP);
2461 N = NodeAllocator.Allocate<UnarySDNode>();
2462 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2465 AllNodes.push_back(N);
2469 return SDValue(N, 0);
2472 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2474 ConstantSDNode *Cst1,
2475 ConstantSDNode *Cst2) {
2476 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2479 case ISD::ADD: return getConstant(C1 + C2, VT);
2480 case ISD::SUB: return getConstant(C1 - C2, VT);
2481 case ISD::MUL: return getConstant(C1 * C2, VT);
2483 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2486 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2489 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2492 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2494 case ISD::AND: return getConstant(C1 & C2, VT);
2495 case ISD::OR: return getConstant(C1 | C2, VT);
2496 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2497 case ISD::SHL: return getConstant(C1 << C2, VT);
2498 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2499 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2500 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2501 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2508 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2509 SDValue N1, SDValue N2) {
2510 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2511 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2514 case ISD::TokenFactor:
2515 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2516 N2.getValueType() == MVT::Other && "Invalid token factor!");
2517 // Fold trivial token factors.
2518 if (N1.getOpcode() == ISD::EntryToken) return N2;
2519 if (N2.getOpcode() == ISD::EntryToken) return N1;
2520 if (N1 == N2) return N1;
2522 case ISD::CONCAT_VECTORS:
2523 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2524 // one big BUILD_VECTOR.
2525 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2526 N2.getOpcode() == ISD::BUILD_VECTOR) {
2527 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2528 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2529 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2533 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2534 N1.getValueType() == VT && "Binary operator types must match!");
2535 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2536 // worth handling here.
2537 if (N2C && N2C->isNullValue())
2539 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2546 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2547 N1.getValueType() == VT && "Binary operator types must match!");
2548 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2549 // it's worth handling here.
2550 if (N2C && N2C->isNullValue())
2560 assert(VT.isInteger() && "This operator does not apply to FP types!");
2568 if (Opcode == ISD::FADD) {
2570 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2571 if (CFP->getValueAPF().isZero())
2574 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2575 if (CFP->getValueAPF().isZero())
2577 } else if (Opcode == ISD::FSUB) {
2579 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2580 if (CFP->getValueAPF().isZero())
2584 assert(N1.getValueType() == N2.getValueType() &&
2585 N1.getValueType() == VT && "Binary operator types must match!");
2587 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2588 assert(N1.getValueType() == VT &&
2589 N1.getValueType().isFloatingPoint() &&
2590 N2.getValueType().isFloatingPoint() &&
2591 "Invalid FCOPYSIGN!");
2598 assert(VT == N1.getValueType() &&
2599 "Shift operators return type must be the same as their first arg");
2600 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2601 "Shifts only work on integers");
2603 // Always fold shifts of i1 values so the code generator doesn't need to
2604 // handle them. Since we know the size of the shift has to be less than the
2605 // size of the value, the shift/rotate count is guaranteed to be zero.
2609 case ISD::FP_ROUND_INREG: {
2610 EVT EVT = cast<VTSDNode>(N2)->getVT();
2611 assert(VT == N1.getValueType() && "Not an inreg round!");
2612 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2613 "Cannot FP_ROUND_INREG integer types");
2614 assert(EVT.bitsLE(VT) && "Not rounding down!");
2615 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2619 assert(VT.isFloatingPoint() &&
2620 N1.getValueType().isFloatingPoint() &&
2621 VT.bitsLE(N1.getValueType()) &&
2622 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2623 if (N1.getValueType() == VT) return N1; // noop conversion.
2625 case ISD::AssertSext:
2626 case ISD::AssertZext: {
2627 EVT EVT = cast<VTSDNode>(N2)->getVT();
2628 assert(VT == N1.getValueType() && "Not an inreg extend!");
2629 assert(VT.isInteger() && EVT.isInteger() &&
2630 "Cannot *_EXTEND_INREG FP types");
2631 assert(!EVT.isVector() &&
2632 "AssertSExt/AssertZExt type should be the vector element type "
2633 "rather than the vector type!");
2634 assert(EVT.bitsLE(VT) && "Not extending!");
2635 if (VT == EVT) return N1; // noop assertion.
2638 case ISD::SIGN_EXTEND_INREG: {
2639 EVT EVT = cast<VTSDNode>(N2)->getVT();
2640 assert(VT == N1.getValueType() && "Not an inreg extend!");
2641 assert(VT.isInteger() && EVT.isInteger() &&
2642 "Cannot *_EXTEND_INREG FP types");
2643 assert(!EVT.isVector() &&
2644 "SIGN_EXTEND_INREG type should be the vector element type rather "
2645 "than the vector type!");
2646 assert(EVT.bitsLE(VT.getScalarType()) && "Not extending!");
2647 if (EVT == VT) return N1; // Not actually extending
2650 APInt Val = N1C->getAPIntValue();
2651 unsigned FromBits = EVT.getSizeInBits();
2652 Val <<= Val.getBitWidth()-FromBits;
2653 Val = Val.ashr(Val.getBitWidth()-FromBits);
2654 return getConstant(Val, VT);
2658 case ISD::EXTRACT_VECTOR_ELT:
2659 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2660 if (N1.getOpcode() == ISD::UNDEF)
2661 return getUNDEF(VT);
2663 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2664 // expanding copies of large vectors from registers.
2666 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2667 N1.getNumOperands() > 0) {
2669 N1.getOperand(0).getValueType().getVectorNumElements();
2670 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2671 N1.getOperand(N2C->getZExtValue() / Factor),
2672 getConstant(N2C->getZExtValue() % Factor,
2673 N2.getValueType()));
2676 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2677 // expanding large vector constants.
2678 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2679 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2680 EVT VEltTy = N1.getValueType().getVectorElementType();
2681 if (Elt.getValueType() != VEltTy) {
2682 // If the vector element type is not legal, the BUILD_VECTOR operands
2683 // are promoted and implicitly truncated. Make that explicit here.
2684 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2687 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2688 // result is implicitly extended.
2689 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2694 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2695 // operations are lowered to scalars.
2696 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2697 // If the indices are the same, return the inserted element.
2698 if (N1.getOperand(2) == N2)
2699 return N1.getOperand(1);
2700 // If the indices are known different, extract the element from
2701 // the original vector.
2702 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2703 isa<ConstantSDNode>(N2))
2704 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2707 case ISD::EXTRACT_ELEMENT:
2708 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2709 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2710 (N1.getValueType().isInteger() == VT.isInteger()) &&
2711 "Wrong types for EXTRACT_ELEMENT!");
2713 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2714 // 64-bit integers into 32-bit parts. Instead of building the extract of
2715 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2716 if (N1.getOpcode() == ISD::BUILD_PAIR)
2717 return N1.getOperand(N2C->getZExtValue());
2719 // EXTRACT_ELEMENT of a constant int is also very common.
2720 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2721 unsigned ElementSize = VT.getSizeInBits();
2722 unsigned Shift = ElementSize * N2C->getZExtValue();
2723 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2724 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2727 case ISD::EXTRACT_SUBVECTOR:
2728 if (N1.getValueType() == VT) // Trivial extraction.
2735 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2736 if (SV.getNode()) return SV;
2737 } else { // Cannonicalize constant to RHS if commutative
2738 if (isCommutativeBinOp(Opcode)) {
2739 std::swap(N1C, N2C);
2745 // Constant fold FP operations.
2746 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2747 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2749 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2750 // Cannonicalize constant to RHS if commutative
2751 std::swap(N1CFP, N2CFP);
2753 } else if (N2CFP && VT != MVT::ppcf128) {
2754 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2755 APFloat::opStatus s;
2758 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2759 if (s != APFloat::opInvalidOp)
2760 return getConstantFP(V1, VT);
2763 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2764 if (s!=APFloat::opInvalidOp)
2765 return getConstantFP(V1, VT);
2768 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2769 if (s!=APFloat::opInvalidOp)
2770 return getConstantFP(V1, VT);
2773 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2774 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2775 return getConstantFP(V1, VT);
2778 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2779 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2780 return getConstantFP(V1, VT);
2782 case ISD::FCOPYSIGN:
2784 return getConstantFP(V1, VT);
2790 // Canonicalize an UNDEF to the RHS, even over a constant.
2791 if (N1.getOpcode() == ISD::UNDEF) {
2792 if (isCommutativeBinOp(Opcode)) {
2796 case ISD::FP_ROUND_INREG:
2797 case ISD::SIGN_EXTEND_INREG:
2803 return N1; // fold op(undef, arg2) -> undef
2811 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2812 // For vectors, we can't easily build an all zero vector, just return
2819 // Fold a bunch of operators when the RHS is undef.
2820 if (N2.getOpcode() == ISD::UNDEF) {
2823 if (N1.getOpcode() == ISD::UNDEF)
2824 // Handle undef ^ undef -> 0 special case. This is a common
2826 return getConstant(0, VT);
2836 return N2; // fold op(arg1, undef) -> undef
2850 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2851 // For vectors, we can't easily build an all zero vector, just return
2856 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2857 // For vectors, we can't easily build an all one vector, just return
2865 // Memoize this node if possible.
2867 SDVTList VTs = getVTList(VT);
2868 if (VT != MVT::Flag) {
2869 SDValue Ops[] = { N1, N2 };
2870 FoldingSetNodeID ID;
2871 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2873 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2874 return SDValue(E, 0);
2875 N = NodeAllocator.Allocate<BinarySDNode>();
2876 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2877 CSEMap.InsertNode(N, IP);
2879 N = NodeAllocator.Allocate<BinarySDNode>();
2880 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2883 AllNodes.push_back(N);
2887 return SDValue(N, 0);
2890 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2891 SDValue N1, SDValue N2, SDValue N3) {
2892 // Perform various simplifications.
2893 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2894 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2896 case ISD::CONCAT_VECTORS:
2897 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2898 // one big BUILD_VECTOR.
2899 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2900 N2.getOpcode() == ISD::BUILD_VECTOR &&
2901 N3.getOpcode() == ISD::BUILD_VECTOR) {
2902 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2903 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2904 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2905 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2909 // Use FoldSetCC to simplify SETCC's.
2910 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2911 if (Simp.getNode()) return Simp;
2916 if (N1C->getZExtValue())
2917 return N2; // select true, X, Y -> X
2919 return N3; // select false, X, Y -> Y
2922 if (N2 == N3) return N2; // select C, X, X -> X
2926 if (N2C->getZExtValue()) // Unconditional branch
2927 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2929 return N1; // Never-taken branch
2932 case ISD::VECTOR_SHUFFLE:
2933 llvm_unreachable("should use getVectorShuffle constructor!");
2935 case ISD::BIT_CONVERT:
2936 // Fold bit_convert nodes from a type to themselves.
2937 if (N1.getValueType() == VT)
2942 // Memoize node if it doesn't produce a flag.
2944 SDVTList VTs = getVTList(VT);
2945 if (VT != MVT::Flag) {
2946 SDValue Ops[] = { N1, N2, N3 };
2947 FoldingSetNodeID ID;
2948 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2951 return SDValue(E, 0);
2952 N = NodeAllocator.Allocate<TernarySDNode>();
2953 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2954 CSEMap.InsertNode(N, IP);
2956 N = NodeAllocator.Allocate<TernarySDNode>();
2957 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2959 AllNodes.push_back(N);
2963 return SDValue(N, 0);
2966 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2967 SDValue N1, SDValue N2, SDValue N3,
2969 SDValue Ops[] = { N1, N2, N3, N4 };
2970 return getNode(Opcode, DL, VT, Ops, 4);
2973 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2974 SDValue N1, SDValue N2, SDValue N3,
2975 SDValue N4, SDValue N5) {
2976 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2977 return getNode(Opcode, DL, VT, Ops, 5);
2980 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
2981 /// the incoming stack arguments to be loaded from the stack.
2982 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
2983 SmallVector<SDValue, 8> ArgChains;
2985 // Include the original chain at the beginning of the list. When this is
2986 // used by target LowerCall hooks, this helps legalize find the
2987 // CALLSEQ_BEGIN node.
2988 ArgChains.push_back(Chain);
2990 // Add a chain value for each stack argument.
2991 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
2992 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
2993 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
2994 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
2995 if (FI->getIndex() < 0)
2996 ArgChains.push_back(SDValue(L, 1));
2998 // Build a tokenfactor for all the chains.
2999 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3000 &ArgChains[0], ArgChains.size());
3003 /// getMemsetValue - Vectorized representation of the memset value
3005 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3007 unsigned NumBits = VT.isVector() ?
3008 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3009 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3010 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3012 for (unsigned i = NumBits; i > 8; i >>= 1) {
3013 Val = (Val << Shift) | Val;
3017 return DAG.getConstant(Val, VT);
3018 return DAG.getConstantFP(APFloat(Val), VT);
3021 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3022 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3024 for (unsigned i = NumBits; i > 8; i >>= 1) {
3025 Value = DAG.getNode(ISD::OR, dl, VT,
3026 DAG.getNode(ISD::SHL, dl, VT, Value,
3027 DAG.getConstant(Shift,
3028 TLI.getShiftAmountTy())),
3036 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3037 /// used when a memcpy is turned into a memset when the source is a constant
3039 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3040 const TargetLowering &TLI,
3041 std::string &Str, unsigned Offset) {
3042 // Handle vector with all elements zero.
3045 return DAG.getConstant(0, VT);
3046 unsigned NumElts = VT.getVectorNumElements();
3047 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3048 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3050 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3053 assert(!VT.isVector() && "Can't handle vector type here!");
3054 unsigned NumBits = VT.getSizeInBits();
3055 unsigned MSB = NumBits / 8;
3057 if (TLI.isLittleEndian())
3058 Offset = Offset + MSB - 1;
3059 for (unsigned i = 0; i != MSB; ++i) {
3060 Val = (Val << 8) | (unsigned char)Str[Offset];
3061 Offset += TLI.isLittleEndian() ? -1 : 1;
3063 return DAG.getConstant(Val, VT);
3066 /// getMemBasePlusOffset - Returns base and offset node for the
3068 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3069 SelectionDAG &DAG) {
3070 EVT VT = Base.getValueType();
3071 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3072 VT, Base, DAG.getConstant(Offset, VT));
3075 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3077 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3078 unsigned SrcDelta = 0;
3079 GlobalAddressSDNode *G = NULL;
3080 if (Src.getOpcode() == ISD::GlobalAddress)
3081 G = cast<GlobalAddressSDNode>(Src);
3082 else if (Src.getOpcode() == ISD::ADD &&
3083 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3084 Src.getOperand(1).getOpcode() == ISD::Constant) {
3085 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3086 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3091 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3092 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3098 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3099 /// to replace the memset / memcpy is below the threshold. It also returns the
3100 /// types of the sequence of memory ops to perform memset / memcpy.
3102 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3103 SDValue Dst, SDValue Src,
3104 unsigned Limit, uint64_t Size, unsigned &Align,
3105 std::string &Str, bool &isSrcStr,
3107 const TargetLowering &TLI) {
3108 isSrcStr = isMemSrcFromString(Src, Str);
3109 bool isSrcConst = isa<ConstantSDNode>(Src);
3110 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3111 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3112 if (VT != MVT::iAny) {
3113 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3114 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3115 // If source is a string constant, this will require an unaligned load.
3116 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3117 if (Dst.getOpcode() != ISD::FrameIndex) {
3118 // Can't change destination alignment. It requires a unaligned store.
3122 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3123 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3124 if (MFI->isFixedObjectIndex(FI)) {
3125 // Can't change destination alignment. It requires a unaligned store.
3129 // Give the stack frame object a larger alignment if needed.
3130 if (MFI->getObjectAlignment(FI) < NewAlign)
3131 MFI->setObjectAlignment(FI, NewAlign);
3138 if (VT == MVT::iAny) {
3139 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3142 switch (Align & 7) {
3143 case 0: VT = MVT::i64; break;
3144 case 4: VT = MVT::i32; break;
3145 case 2: VT = MVT::i16; break;
3146 default: VT = MVT::i8; break;
3151 while (!TLI.isTypeLegal(LVT))
3152 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3153 assert(LVT.isInteger());
3159 unsigned NumMemOps = 0;
3161 unsigned VTSize = VT.getSizeInBits() / 8;
3162 while (VTSize > Size) {
3163 // For now, only use non-vector load / store's for the left-over pieces.
3164 if (VT.isVector()) {
3166 while (!TLI.isTypeLegal(VT))
3167 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3168 VTSize = VT.getSizeInBits() / 8;
3170 // This can result in a type that is not legal on the target, e.g.
3171 // 1 or 2 bytes on PPC.
3172 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3177 if (++NumMemOps > Limit)
3179 MemOps.push_back(VT);
3186 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3187 SDValue Chain, SDValue Dst,
3188 SDValue Src, uint64_t Size,
3189 unsigned Align, bool AlwaysInline,
3190 const Value *DstSV, uint64_t DstSVOff,
3191 const Value *SrcSV, uint64_t SrcSVOff){
3192 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3194 // Expand memcpy to a series of load and store ops if the size operand falls
3195 // below a certain threshold.
3196 std::vector<EVT> MemOps;
3197 uint64_t Limit = -1ULL;
3199 Limit = TLI.getMaxStoresPerMemcpy();
3200 unsigned DstAlign = Align; // Destination alignment can change.
3203 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3204 Str, CopyFromStr, DAG, TLI))
3208 bool isZeroStr = CopyFromStr && Str.empty();
3209 SmallVector<SDValue, 8> OutChains;
3210 unsigned NumMemOps = MemOps.size();
3211 uint64_t SrcOff = 0, DstOff = 0;
3212 for (unsigned i = 0; i != NumMemOps; ++i) {
3214 unsigned VTSize = VT.getSizeInBits() / 8;
3215 SDValue Value, Store;
3217 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3218 // It's unlikely a store of a vector immediate can be done in a single
3219 // instruction. It would require a load from a constantpool first.
3220 // We also handle store a vector with all zero's.
3221 // FIXME: Handle other cases where store of vector immediate is done in
3222 // a single instruction.
3223 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3224 Store = DAG.getStore(Chain, dl, Value,
3225 getMemBasePlusOffset(Dst, DstOff, DAG),
3226 DstSV, DstSVOff + DstOff, false, DstAlign);
3228 // The type might not be legal for the target. This should only happen
3229 // if the type is smaller than a legal type, as on PPC, so the right
3230 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3231 // to Load/Store if NVT==VT.
3232 // FIXME does the case above also need this?
3233 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3234 assert(NVT.bitsGE(VT));
3235 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3236 getMemBasePlusOffset(Src, SrcOff, DAG),
3237 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3238 Store = DAG.getTruncStore(Chain, dl, Value,
3239 getMemBasePlusOffset(Dst, DstOff, DAG),
3240 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3242 OutChains.push_back(Store);
3247 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3248 &OutChains[0], OutChains.size());
3251 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3252 SDValue Chain, SDValue Dst,
3253 SDValue Src, uint64_t Size,
3254 unsigned Align, bool AlwaysInline,
3255 const Value *DstSV, uint64_t DstSVOff,
3256 const Value *SrcSV, uint64_t SrcSVOff){
3257 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3259 // Expand memmove to a series of load and store ops if the size operand falls
3260 // below a certain threshold.
3261 std::vector<EVT> MemOps;
3262 uint64_t Limit = -1ULL;
3264 Limit = TLI.getMaxStoresPerMemmove();
3265 unsigned DstAlign = Align; // Destination alignment can change.
3268 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3269 Str, CopyFromStr, DAG, TLI))
3272 uint64_t SrcOff = 0, DstOff = 0;
3274 SmallVector<SDValue, 8> LoadValues;
3275 SmallVector<SDValue, 8> LoadChains;
3276 SmallVector<SDValue, 8> OutChains;
3277 unsigned NumMemOps = MemOps.size();
3278 for (unsigned i = 0; i < NumMemOps; i++) {
3280 unsigned VTSize = VT.getSizeInBits() / 8;
3281 SDValue Value, Store;
3283 Value = DAG.getLoad(VT, dl, Chain,
3284 getMemBasePlusOffset(Src, SrcOff, DAG),
3285 SrcSV, SrcSVOff + SrcOff, false, Align);
3286 LoadValues.push_back(Value);
3287 LoadChains.push_back(Value.getValue(1));
3290 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3291 &LoadChains[0], LoadChains.size());
3293 for (unsigned i = 0; i < NumMemOps; i++) {
3295 unsigned VTSize = VT.getSizeInBits() / 8;
3296 SDValue Value, Store;
3298 Store = DAG.getStore(Chain, dl, LoadValues[i],
3299 getMemBasePlusOffset(Dst, DstOff, DAG),
3300 DstSV, DstSVOff + DstOff, false, DstAlign);
3301 OutChains.push_back(Store);
3305 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3306 &OutChains[0], OutChains.size());
3309 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3310 SDValue Chain, SDValue Dst,
3311 SDValue Src, uint64_t Size,
3313 const Value *DstSV, uint64_t DstSVOff) {
3314 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3316 // Expand memset to a series of load/store ops if the size operand
3317 // falls below a certain threshold.
3318 std::vector<EVT> MemOps;
3321 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3322 Size, Align, Str, CopyFromStr, DAG, TLI))
3325 SmallVector<SDValue, 8> OutChains;
3326 uint64_t DstOff = 0;
3328 unsigned NumMemOps = MemOps.size();
3329 for (unsigned i = 0; i < NumMemOps; i++) {
3331 unsigned VTSize = VT.getSizeInBits() / 8;
3332 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3333 SDValue Store = DAG.getStore(Chain, dl, Value,
3334 getMemBasePlusOffset(Dst, DstOff, DAG),
3335 DstSV, DstSVOff + DstOff);
3336 OutChains.push_back(Store);
3340 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3341 &OutChains[0], OutChains.size());
3344 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3345 SDValue Src, SDValue Size,
3346 unsigned Align, bool AlwaysInline,
3347 const Value *DstSV, uint64_t DstSVOff,
3348 const Value *SrcSV, uint64_t SrcSVOff) {
3350 // Check to see if we should lower the memcpy to loads and stores first.
3351 // For cases within the target-specified limits, this is the best choice.
3352 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3354 // Memcpy with size zero? Just return the original chain.
3355 if (ConstantSize->isNullValue())
3359 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3360 ConstantSize->getZExtValue(),
3361 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3362 if (Result.getNode())
3366 // Then check to see if we should lower the memcpy with target-specific
3367 // code. If the target chooses to do this, this is the next best.
3369 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3371 DstSV, DstSVOff, SrcSV, SrcSVOff);
3372 if (Result.getNode())
3375 // If we really need inline code and the target declined to provide it,
3376 // use a (potentially long) sequence of loads and stores.
3378 assert(ConstantSize && "AlwaysInline requires a constant size!");
3379 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3380 ConstantSize->getZExtValue(), Align, true,
3381 DstSV, DstSVOff, SrcSV, SrcSVOff);
3384 // Emit a library call.
3385 TargetLowering::ArgListTy Args;
3386 TargetLowering::ArgListEntry Entry;
3387 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3388 Entry.Node = Dst; Args.push_back(Entry);
3389 Entry.Node = Src; Args.push_back(Entry);
3390 Entry.Node = Size; Args.push_back(Entry);
3391 // FIXME: pass in DebugLoc
3392 std::pair<SDValue,SDValue> CallResult =
3393 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3394 false, false, false, false, 0,
3395 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3396 /*isReturnValueUsed=*/false,
3397 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3398 TLI.getPointerTy()),
3400 return CallResult.second;
3403 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3404 SDValue Src, SDValue Size,
3406 const Value *DstSV, uint64_t DstSVOff,
3407 const Value *SrcSV, uint64_t SrcSVOff) {
3409 // Check to see if we should lower the memmove to loads and stores first.
3410 // For cases within the target-specified limits, this is the best choice.
3411 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3413 // Memmove with size zero? Just return the original chain.
3414 if (ConstantSize->isNullValue())
3418 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3419 ConstantSize->getZExtValue(),
3420 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3421 if (Result.getNode())
3425 // Then check to see if we should lower the memmove with target-specific
3426 // code. If the target chooses to do this, this is the next best.
3428 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3429 DstSV, DstSVOff, SrcSV, SrcSVOff);
3430 if (Result.getNode())
3433 // Emit a library call.
3434 TargetLowering::ArgListTy Args;
3435 TargetLowering::ArgListEntry Entry;
3436 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3437 Entry.Node = Dst; Args.push_back(Entry);
3438 Entry.Node = Src; Args.push_back(Entry);
3439 Entry.Node = Size; Args.push_back(Entry);
3440 // FIXME: pass in DebugLoc
3441 std::pair<SDValue,SDValue> CallResult =
3442 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3443 false, false, false, false, 0,
3444 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3445 /*isReturnValueUsed=*/false,
3446 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3447 TLI.getPointerTy()),
3449 return CallResult.second;
3452 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3453 SDValue Src, SDValue Size,
3455 const Value *DstSV, uint64_t DstSVOff) {
3457 // Check to see if we should lower the memset to stores first.
3458 // For cases within the target-specified limits, this is the best choice.
3459 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3461 // Memset with size zero? Just return the original chain.
3462 if (ConstantSize->isNullValue())
3466 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3467 Align, DstSV, DstSVOff);
3468 if (Result.getNode())
3472 // Then check to see if we should lower the memset with target-specific
3473 // code. If the target chooses to do this, this is the next best.
3475 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3477 if (Result.getNode())
3480 // Emit a library call.
3481 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3482 TargetLowering::ArgListTy Args;
3483 TargetLowering::ArgListEntry Entry;
3484 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3485 Args.push_back(Entry);
3486 // Extend or truncate the argument to be an i32 value for the call.
3487 if (Src.getValueType().bitsGT(MVT::i32))
3488 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3490 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3492 Entry.Ty = Type::getInt32Ty(*getContext());
3493 Entry.isSExt = true;
3494 Args.push_back(Entry);
3496 Entry.Ty = IntPtrTy;
3497 Entry.isSExt = false;
3498 Args.push_back(Entry);
3499 // FIXME: pass in DebugLoc
3500 std::pair<SDValue,SDValue> CallResult =
3501 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3502 false, false, false, false, 0,
3503 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3504 /*isReturnValueUsed=*/false,
3505 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3506 TLI.getPointerTy()),
3508 return CallResult.second;
3511 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3513 SDValue Ptr, SDValue Cmp,
3514 SDValue Swp, const Value* PtrVal,
3515 unsigned Alignment) {
3516 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3517 Alignment = getEVTAlignment(MemVT);
3519 // Check if the memory reference references a frame index
3521 if (const FrameIndexSDNode *FI =
3522 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3523 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3525 MachineFunction &MF = getMachineFunction();
3526 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3528 // For now, atomics are considered to be volatile always.
3529 Flags |= MachineMemOperand::MOVolatile;
3531 MachineMemOperand *MMO =
3532 MF.getMachineMemOperand(PtrVal, Flags, 0,
3533 MemVT.getStoreSize(), Alignment);
3535 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3538 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3540 SDValue Ptr, SDValue Cmp,
3541 SDValue Swp, MachineMemOperand *MMO) {
3542 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3543 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3545 EVT VT = Cmp.getValueType();
3547 SDVTList VTs = getVTList(VT, MVT::Other);
3548 FoldingSetNodeID ID;
3549 ID.AddInteger(MemVT.getRawBits());
3550 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3551 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3554 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3555 return SDValue(E, 0);
3557 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3558 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3559 CSEMap.InsertNode(N, IP);
3560 AllNodes.push_back(N);
3561 return SDValue(N, 0);
3564 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3566 SDValue Ptr, SDValue Val,
3567 const Value* PtrVal,
3568 unsigned Alignment) {
3569 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3570 Alignment = getEVTAlignment(MemVT);
3572 // Check if the memory reference references a frame index
3574 if (const FrameIndexSDNode *FI =
3575 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3576 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3578 MachineFunction &MF = getMachineFunction();
3579 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3581 // For now, atomics are considered to be volatile always.
3582 Flags |= MachineMemOperand::MOVolatile;
3584 MachineMemOperand *MMO =
3585 MF.getMachineMemOperand(PtrVal, Flags, 0,
3586 MemVT.getStoreSize(), Alignment);
3588 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3591 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3593 SDValue Ptr, SDValue Val,
3594 MachineMemOperand *MMO) {
3595 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3596 Opcode == ISD::ATOMIC_LOAD_SUB ||
3597 Opcode == ISD::ATOMIC_LOAD_AND ||
3598 Opcode == ISD::ATOMIC_LOAD_OR ||
3599 Opcode == ISD::ATOMIC_LOAD_XOR ||
3600 Opcode == ISD::ATOMIC_LOAD_NAND ||
3601 Opcode == ISD::ATOMIC_LOAD_MIN ||
3602 Opcode == ISD::ATOMIC_LOAD_MAX ||
3603 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3604 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3605 Opcode == ISD::ATOMIC_SWAP) &&
3606 "Invalid Atomic Op");
3608 EVT VT = Val.getValueType();
3610 SDVTList VTs = getVTList(VT, MVT::Other);
3611 FoldingSetNodeID ID;
3612 ID.AddInteger(MemVT.getRawBits());
3613 SDValue Ops[] = {Chain, Ptr, Val};
3614 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3616 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3617 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3618 return SDValue(E, 0);
3620 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3621 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
3622 CSEMap.InsertNode(N, IP);
3623 AllNodes.push_back(N);
3624 return SDValue(N, 0);
3627 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3628 /// Allowed to return something different (and simpler) if Simplify is true.
3629 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3634 SmallVector<EVT, 4> VTs;
3635 VTs.reserve(NumOps);
3636 for (unsigned i = 0; i < NumOps; ++i)
3637 VTs.push_back(Ops[i].getValueType());
3638 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3643 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3644 const EVT *VTs, unsigned NumVTs,
3645 const SDValue *Ops, unsigned NumOps,
3646 EVT MemVT, const Value *srcValue, int SVOff,
3647 unsigned Align, bool Vol,
3648 bool ReadMem, bool WriteMem) {
3649 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3650 MemVT, srcValue, SVOff, Align, Vol,
3655 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3656 const SDValue *Ops, unsigned NumOps,
3657 EVT MemVT, const Value *srcValue, int SVOff,
3658 unsigned Align, bool Vol,
3659 bool ReadMem, bool WriteMem) {
3660 if (Align == 0) // Ensure that codegen never sees alignment 0
3661 Align = getEVTAlignment(MemVT);
3663 MachineFunction &MF = getMachineFunction();
3666 Flags |= MachineMemOperand::MOStore;
3668 Flags |= MachineMemOperand::MOLoad;
3670 Flags |= MachineMemOperand::MOVolatile;
3671 MachineMemOperand *MMO =
3672 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3673 MemVT.getStoreSize(), Align);
3675 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3679 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3680 const SDValue *Ops, unsigned NumOps,
3681 EVT MemVT, MachineMemOperand *MMO) {
3682 assert((Opcode == ISD::INTRINSIC_VOID ||
3683 Opcode == ISD::INTRINSIC_W_CHAIN ||
3684 (Opcode <= INT_MAX &&
3685 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3686 "Opcode is not a memory-accessing opcode!");
3688 // Memoize the node unless it returns a flag.
3689 MemIntrinsicSDNode *N;
3690 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3691 FoldingSetNodeID ID;
3692 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3694 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3695 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3696 return SDValue(E, 0);
3699 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3700 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3701 CSEMap.InsertNode(N, IP);
3703 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3704 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3706 AllNodes.push_back(N);
3707 return SDValue(N, 0);
3711 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3712 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3713 SDValue Ptr, SDValue Offset,
3714 const Value *SV, int SVOffset, EVT MemVT,
3715 bool isVolatile, unsigned Alignment) {
3716 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3717 Alignment = getEVTAlignment(VT);
3719 // Check if the memory reference references a frame index
3721 if (const FrameIndexSDNode *FI =
3722 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3723 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3725 MachineFunction &MF = getMachineFunction();
3726 unsigned Flags = MachineMemOperand::MOLoad;
3728 Flags |= MachineMemOperand::MOVolatile;
3729 MachineMemOperand *MMO =
3730 MF.getMachineMemOperand(SV, Flags, SVOffset,
3731 MemVT.getStoreSize(), Alignment);
3732 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3736 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3737 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3738 SDValue Ptr, SDValue Offset, EVT MemVT,
3739 MachineMemOperand *MMO) {
3741 ExtType = ISD::NON_EXTLOAD;
3742 } else if (ExtType == ISD::NON_EXTLOAD) {
3743 assert(VT == MemVT && "Non-extending load from different memory type!");
3747 assert(MemVT.getVectorNumElements() == VT.getVectorNumElements() &&
3748 "Invalid vector extload!");
3750 assert(MemVT.bitsLT(VT) &&
3751 "Should only be an extending load, not truncating!");
3752 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3753 "Cannot sign/zero extend a FP/Vector load!");
3754 assert(VT.isInteger() == MemVT.isInteger() &&
3755 "Cannot convert from FP to Int or Int -> FP!");
3758 bool Indexed = AM != ISD::UNINDEXED;
3759 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3760 "Unindexed load with an offset!");
3762 SDVTList VTs = Indexed ?
3763 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3764 SDValue Ops[] = { Chain, Ptr, Offset };
3765 FoldingSetNodeID ID;
3766 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3767 ID.AddInteger(MemVT.getRawBits());
3768 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile()));
3770 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3771 cast<LoadSDNode>(E)->refineAlignment(MMO);
3772 return SDValue(E, 0);
3774 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3775 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
3776 CSEMap.InsertNode(N, IP);
3777 AllNodes.push_back(N);
3778 return SDValue(N, 0);
3781 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3782 SDValue Chain, SDValue Ptr,
3783 const Value *SV, int SVOffset,
3784 bool isVolatile, unsigned Alignment) {
3785 SDValue Undef = getUNDEF(Ptr.getValueType());
3786 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3787 SV, SVOffset, VT, isVolatile, Alignment);
3790 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3791 SDValue Chain, SDValue Ptr,
3793 int SVOffset, EVT MemVT,
3794 bool isVolatile, unsigned Alignment) {
3795 SDValue Undef = getUNDEF(Ptr.getValueType());
3796 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3797 SV, SVOffset, MemVT, isVolatile, Alignment);
3801 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3802 SDValue Offset, ISD::MemIndexedMode AM) {
3803 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3804 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3805 "Load is already a indexed load!");
3806 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3807 LD->getChain(), Base, Offset, LD->getSrcValue(),
3808 LD->getSrcValueOffset(), LD->getMemoryVT(),
3809 LD->isVolatile(), LD->getAlignment());
3812 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3813 SDValue Ptr, const Value *SV, int SVOffset,
3814 bool isVolatile, unsigned Alignment) {
3815 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3816 Alignment = getEVTAlignment(Val.getValueType());
3818 // Check if the memory reference references a frame index
3820 if (const FrameIndexSDNode *FI =
3821 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3822 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3824 MachineFunction &MF = getMachineFunction();
3825 unsigned Flags = MachineMemOperand::MOStore;
3827 Flags |= MachineMemOperand::MOVolatile;
3828 MachineMemOperand *MMO =
3829 MF.getMachineMemOperand(SV, Flags, SVOffset,
3830 Val.getValueType().getStoreSize(), Alignment);
3832 return getStore(Chain, dl, Val, Ptr, MMO);
3835 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3836 SDValue Ptr, MachineMemOperand *MMO) {
3837 EVT VT = Val.getValueType();
3838 SDVTList VTs = getVTList(MVT::Other);
3839 SDValue Undef = getUNDEF(Ptr.getValueType());
3840 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3841 FoldingSetNodeID ID;
3842 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3843 ID.AddInteger(VT.getRawBits());
3844 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile()));
3846 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3847 cast<StoreSDNode>(E)->refineAlignment(MMO);
3848 return SDValue(E, 0);
3850 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3851 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
3852 CSEMap.InsertNode(N, IP);
3853 AllNodes.push_back(N);
3854 return SDValue(N, 0);
3857 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3858 SDValue Ptr, const Value *SV,
3859 int SVOffset, EVT SVT,
3860 bool isVolatile, unsigned Alignment) {
3861 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3862 Alignment = getEVTAlignment(SVT);
3864 // Check if the memory reference references a frame index
3866 if (const FrameIndexSDNode *FI =
3867 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3868 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3870 MachineFunction &MF = getMachineFunction();
3871 unsigned Flags = MachineMemOperand::MOStore;
3873 Flags |= MachineMemOperand::MOVolatile;
3874 MachineMemOperand *MMO =
3875 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
3877 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
3880 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3881 SDValue Ptr, EVT SVT,
3882 MachineMemOperand *MMO) {
3883 EVT VT = Val.getValueType();
3886 return getStore(Chain, dl, Val, Ptr, MMO);
3888 assert(VT.bitsGT(SVT) && "Not a truncation?");
3889 assert(VT.isInteger() == SVT.isInteger() &&
3890 "Can't do FP-INT conversion!");
3893 SDVTList VTs = getVTList(MVT::Other);
3894 SDValue Undef = getUNDEF(Ptr.getValueType());
3895 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3896 FoldingSetNodeID ID;
3897 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3898 ID.AddInteger(SVT.getRawBits());
3899 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile()));
3901 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3902 cast<StoreSDNode>(E)->refineAlignment(MMO);
3903 return SDValue(E, 0);
3905 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3906 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
3907 CSEMap.InsertNode(N, IP);
3908 AllNodes.push_back(N);
3909 return SDValue(N, 0);
3913 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3914 SDValue Offset, ISD::MemIndexedMode AM) {
3915 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3916 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3917 "Store is already a indexed store!");
3918 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3919 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3920 FoldingSetNodeID ID;
3921 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3922 ID.AddInteger(ST->getMemoryVT().getRawBits());
3923 ID.AddInteger(ST->getRawSubclassData());
3925 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3926 return SDValue(E, 0);
3927 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3928 new (N) StoreSDNode(Ops, dl, VTs, AM,
3929 ST->isTruncatingStore(), ST->getMemoryVT(),
3930 ST->getMemOperand());
3931 CSEMap.InsertNode(N, IP);
3932 AllNodes.push_back(N);
3933 return SDValue(N, 0);
3936 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
3937 SDValue Chain, SDValue Ptr,
3939 SDValue Ops[] = { Chain, Ptr, SV };
3940 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3943 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3944 const SDUse *Ops, unsigned NumOps) {
3946 case 0: return getNode(Opcode, DL, VT);
3947 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3948 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3949 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3953 // Copy from an SDUse array into an SDValue array for use with
3954 // the regular getNode logic.
3955 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3956 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3959 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3960 const SDValue *Ops, unsigned NumOps) {
3962 case 0: return getNode(Opcode, DL, VT);
3963 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3964 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3965 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3971 case ISD::SELECT_CC: {
3972 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3973 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3974 "LHS and RHS of condition must have same type!");
3975 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3976 "True and False arms of SelectCC must have same type!");
3977 assert(Ops[2].getValueType() == VT &&
3978 "select_cc node must be of same type as true and false value!");
3982 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3983 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3984 "LHS/RHS of comparison should match types!");
3991 SDVTList VTs = getVTList(VT);
3993 if (VT != MVT::Flag) {
3994 FoldingSetNodeID ID;
3995 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3999 return SDValue(E, 0);
4001 N = NodeAllocator.Allocate<SDNode>();
4002 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4003 CSEMap.InsertNode(N, IP);
4005 N = NodeAllocator.Allocate<SDNode>();
4006 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4009 AllNodes.push_back(N);
4013 return SDValue(N, 0);
4016 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4017 const std::vector<EVT> &ResultTys,
4018 const SDValue *Ops, unsigned NumOps) {
4019 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4023 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4024 const EVT *VTs, unsigned NumVTs,
4025 const SDValue *Ops, unsigned NumOps) {
4027 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4028 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4031 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4032 const SDValue *Ops, unsigned NumOps) {
4033 if (VTList.NumVTs == 1)
4034 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4038 // FIXME: figure out how to safely handle things like
4039 // int foo(int x) { return 1 << (x & 255); }
4040 // int bar() { return foo(256); }
4041 case ISD::SRA_PARTS:
4042 case ISD::SRL_PARTS:
4043 case ISD::SHL_PARTS:
4044 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4045 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4046 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4047 else if (N3.getOpcode() == ISD::AND)
4048 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4049 // If the and is only masking out bits that cannot effect the shift,
4050 // eliminate the and.
4051 unsigned NumBits = VT.getSizeInBits()*2;
4052 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4053 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4059 // Memoize the node unless it returns a flag.
4061 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4062 FoldingSetNodeID ID;
4063 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4066 return SDValue(E, 0);
4068 N = NodeAllocator.Allocate<UnarySDNode>();
4069 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4070 } else if (NumOps == 2) {
4071 N = NodeAllocator.Allocate<BinarySDNode>();
4072 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4073 } else if (NumOps == 3) {
4074 N = NodeAllocator.Allocate<TernarySDNode>();
4075 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4077 N = NodeAllocator.Allocate<SDNode>();
4078 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4080 CSEMap.InsertNode(N, IP);
4083 N = NodeAllocator.Allocate<UnarySDNode>();
4084 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4085 } else if (NumOps == 2) {
4086 N = NodeAllocator.Allocate<BinarySDNode>();
4087 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4088 } else if (NumOps == 3) {
4089 N = NodeAllocator.Allocate<TernarySDNode>();
4090 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4092 N = NodeAllocator.Allocate<SDNode>();
4093 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4096 AllNodes.push_back(N);
4100 return SDValue(N, 0);
4103 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4104 return getNode(Opcode, DL, VTList, 0, 0);
4107 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4109 SDValue Ops[] = { N1 };
4110 return getNode(Opcode, DL, VTList, Ops, 1);
4113 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4114 SDValue N1, SDValue N2) {
4115 SDValue Ops[] = { N1, N2 };
4116 return getNode(Opcode, DL, VTList, Ops, 2);
4119 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4120 SDValue N1, SDValue N2, SDValue N3) {
4121 SDValue Ops[] = { N1, N2, N3 };
4122 return getNode(Opcode, DL, VTList, Ops, 3);
4125 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4126 SDValue N1, SDValue N2, SDValue N3,
4128 SDValue Ops[] = { N1, N2, N3, N4 };
4129 return getNode(Opcode, DL, VTList, Ops, 4);
4132 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4133 SDValue N1, SDValue N2, SDValue N3,
4134 SDValue N4, SDValue N5) {
4135 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4136 return getNode(Opcode, DL, VTList, Ops, 5);
4139 SDVTList SelectionDAG::getVTList(EVT VT) {
4140 return makeVTList(SDNode::getValueTypeList(VT), 1);
4143 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4144 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4145 E = VTList.rend(); I != E; ++I)
4146 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4149 EVT *Array = Allocator.Allocate<EVT>(2);
4152 SDVTList Result = makeVTList(Array, 2);
4153 VTList.push_back(Result);
4157 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4158 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4159 E = VTList.rend(); I != E; ++I)
4160 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4164 EVT *Array = Allocator.Allocate<EVT>(3);
4168 SDVTList Result = makeVTList(Array, 3);
4169 VTList.push_back(Result);
4173 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4174 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4175 E = VTList.rend(); I != E; ++I)
4176 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4177 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4180 EVT *Array = Allocator.Allocate<EVT>(3);
4185 SDVTList Result = makeVTList(Array, 4);
4186 VTList.push_back(Result);
4190 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4192 case 0: llvm_unreachable("Cannot have nodes without results!");
4193 case 1: return getVTList(VTs[0]);
4194 case 2: return getVTList(VTs[0], VTs[1]);
4195 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4199 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4200 E = VTList.rend(); I != E; ++I) {
4201 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4204 bool NoMatch = false;
4205 for (unsigned i = 2; i != NumVTs; ++i)
4206 if (VTs[i] != I->VTs[i]) {
4214 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4215 std::copy(VTs, VTs+NumVTs, Array);
4216 SDVTList Result = makeVTList(Array, NumVTs);
4217 VTList.push_back(Result);
4222 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4223 /// specified operands. If the resultant node already exists in the DAG,
4224 /// this does not modify the specified node, instead it returns the node that
4225 /// already exists. If the resultant node does not exist in the DAG, the
4226 /// input node is returned. As a degenerate case, if you specify the same
4227 /// input operands as the node already has, the input node is returned.
4228 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4229 SDNode *N = InN.getNode();
4230 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4232 // Check to see if there is no change.
4233 if (Op == N->getOperand(0)) return InN;
4235 // See if the modified node already exists.
4236 void *InsertPos = 0;
4237 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4238 return SDValue(Existing, InN.getResNo());
4240 // Nope it doesn't. Remove the node from its current place in the maps.
4242 if (!RemoveNodeFromCSEMaps(N))
4245 // Now we update the operands.
4246 N->OperandList[0].set(Op);
4248 // If this gets put into a CSE map, add it.
4249 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4253 SDValue SelectionDAG::
4254 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4255 SDNode *N = InN.getNode();
4256 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4258 // Check to see if there is no change.
4259 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4260 return InN; // No operands changed, just return the input node.
4262 // See if the modified node already exists.
4263 void *InsertPos = 0;
4264 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4265 return SDValue(Existing, InN.getResNo());
4267 // Nope it doesn't. Remove the node from its current place in the maps.
4269 if (!RemoveNodeFromCSEMaps(N))
4272 // Now we update the operands.
4273 if (N->OperandList[0] != Op1)
4274 N->OperandList[0].set(Op1);
4275 if (N->OperandList[1] != Op2)
4276 N->OperandList[1].set(Op2);
4278 // If this gets put into a CSE map, add it.
4279 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4283 SDValue SelectionDAG::
4284 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4285 SDValue Ops[] = { Op1, Op2, Op3 };
4286 return UpdateNodeOperands(N, Ops, 3);
4289 SDValue SelectionDAG::
4290 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4291 SDValue Op3, SDValue Op4) {
4292 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4293 return UpdateNodeOperands(N, Ops, 4);
4296 SDValue SelectionDAG::
4297 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4298 SDValue Op3, SDValue Op4, SDValue Op5) {
4299 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4300 return UpdateNodeOperands(N, Ops, 5);
4303 SDValue SelectionDAG::
4304 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4305 SDNode *N = InN.getNode();
4306 assert(N->getNumOperands() == NumOps &&
4307 "Update with wrong number of operands");
4309 // Check to see if there is no change.
4310 bool AnyChange = false;
4311 for (unsigned i = 0; i != NumOps; ++i) {
4312 if (Ops[i] != N->getOperand(i)) {
4318 // No operands changed, just return the input node.
4319 if (!AnyChange) return InN;
4321 // See if the modified node already exists.
4322 void *InsertPos = 0;
4323 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4324 return SDValue(Existing, InN.getResNo());
4326 // Nope it doesn't. Remove the node from its current place in the maps.
4328 if (!RemoveNodeFromCSEMaps(N))
4331 // Now we update the operands.
4332 for (unsigned i = 0; i != NumOps; ++i)
4333 if (N->OperandList[i] != Ops[i])
4334 N->OperandList[i].set(Ops[i]);
4336 // If this gets put into a CSE map, add it.
4337 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4341 /// DropOperands - Release the operands and set this node to have
4343 void SDNode::DropOperands() {
4344 // Unlike the code in MorphNodeTo that does this, we don't need to
4345 // watch for dead nodes here.
4346 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4352 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4355 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4357 SDVTList VTs = getVTList(VT);
4358 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4361 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4362 EVT VT, SDValue Op1) {
4363 SDVTList VTs = getVTList(VT);
4364 SDValue Ops[] = { Op1 };
4365 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4368 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4369 EVT VT, SDValue Op1,
4371 SDVTList VTs = getVTList(VT);
4372 SDValue Ops[] = { Op1, Op2 };
4373 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4376 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4377 EVT VT, SDValue Op1,
4378 SDValue Op2, SDValue Op3) {
4379 SDVTList VTs = getVTList(VT);
4380 SDValue Ops[] = { Op1, Op2, Op3 };
4381 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4384 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4385 EVT VT, const SDValue *Ops,
4387 SDVTList VTs = getVTList(VT);
4388 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4391 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4392 EVT VT1, EVT VT2, const SDValue *Ops,
4394 SDVTList VTs = getVTList(VT1, VT2);
4395 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4398 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4400 SDVTList VTs = getVTList(VT1, VT2);
4401 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4404 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4405 EVT VT1, EVT VT2, EVT VT3,
4406 const SDValue *Ops, unsigned NumOps) {
4407 SDVTList VTs = getVTList(VT1, VT2, VT3);
4408 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4411 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4412 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4413 const SDValue *Ops, unsigned NumOps) {
4414 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4415 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4418 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4421 SDVTList VTs = getVTList(VT1, VT2);
4422 SDValue Ops[] = { Op1 };
4423 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4426 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4428 SDValue Op1, SDValue Op2) {
4429 SDVTList VTs = getVTList(VT1, VT2);
4430 SDValue Ops[] = { Op1, Op2 };
4431 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4434 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4436 SDValue Op1, SDValue Op2,
4438 SDVTList VTs = getVTList(VT1, VT2);
4439 SDValue Ops[] = { Op1, Op2, Op3 };
4440 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4443 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4444 EVT VT1, EVT VT2, EVT VT3,
4445 SDValue Op1, SDValue Op2,
4447 SDVTList VTs = getVTList(VT1, VT2, VT3);
4448 SDValue Ops[] = { Op1, Op2, Op3 };
4449 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4452 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4453 SDVTList VTs, const SDValue *Ops,
4455 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4458 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4460 SDVTList VTs = getVTList(VT);
4461 return MorphNodeTo(N, Opc, VTs, 0, 0);
4464 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4465 EVT VT, SDValue Op1) {
4466 SDVTList VTs = getVTList(VT);
4467 SDValue Ops[] = { Op1 };
4468 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4471 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4472 EVT VT, SDValue Op1,
4474 SDVTList VTs = getVTList(VT);
4475 SDValue Ops[] = { Op1, Op2 };
4476 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4479 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4480 EVT VT, SDValue Op1,
4481 SDValue Op2, SDValue Op3) {
4482 SDVTList VTs = getVTList(VT);
4483 SDValue Ops[] = { Op1, Op2, Op3 };
4484 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4487 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4488 EVT VT, const SDValue *Ops,
4490 SDVTList VTs = getVTList(VT);
4491 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4494 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4495 EVT VT1, EVT VT2, const SDValue *Ops,
4497 SDVTList VTs = getVTList(VT1, VT2);
4498 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4501 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4503 SDVTList VTs = getVTList(VT1, VT2);
4504 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4507 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4508 EVT VT1, EVT VT2, EVT VT3,
4509 const SDValue *Ops, unsigned NumOps) {
4510 SDVTList VTs = getVTList(VT1, VT2, VT3);
4511 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4514 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4517 SDVTList VTs = getVTList(VT1, VT2);
4518 SDValue Ops[] = { Op1 };
4519 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4522 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4524 SDValue Op1, SDValue Op2) {
4525 SDVTList VTs = getVTList(VT1, VT2);
4526 SDValue Ops[] = { Op1, Op2 };
4527 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4530 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4532 SDValue Op1, SDValue Op2,
4534 SDVTList VTs = getVTList(VT1, VT2);
4535 SDValue Ops[] = { Op1, Op2, Op3 };
4536 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4539 /// MorphNodeTo - These *mutate* the specified node to have the specified
4540 /// return type, opcode, and operands.
4542 /// Note that MorphNodeTo returns the resultant node. If there is already a
4543 /// node of the specified opcode and operands, it returns that node instead of
4544 /// the current one. Note that the DebugLoc need not be the same.
4546 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4547 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4548 /// node, and because it doesn't require CSE recalculation for any of
4549 /// the node's users.
4551 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4552 SDVTList VTs, const SDValue *Ops,
4554 // If an identical node already exists, use it.
4556 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4557 FoldingSetNodeID ID;
4558 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4559 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4563 if (!RemoveNodeFromCSEMaps(N))
4566 // Start the morphing.
4568 N->ValueList = VTs.VTs;
4569 N->NumValues = VTs.NumVTs;
4571 // Clear the operands list, updating used nodes to remove this from their
4572 // use list. Keep track of any operands that become dead as a result.
4573 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4574 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4576 SDNode *Used = Use.getNode();
4578 if (Used->use_empty())
4579 DeadNodeSet.insert(Used);
4582 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4583 // Initialize the memory references information.
4584 MN->setMemRefs(0, 0);
4585 // If NumOps is larger than the # of operands we can have in a
4586 // MachineSDNode, reallocate the operand list.
4587 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4588 if (MN->OperandsNeedDelete)
4589 delete[] MN->OperandList;
4590 if (NumOps > array_lengthof(MN->LocalOperands))
4591 // We're creating a final node that will live unmorphed for the
4592 // remainder of the current SelectionDAG iteration, so we can allocate
4593 // the operands directly out of a pool with no recycling metadata.
4594 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4597 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4598 MN->OperandsNeedDelete = false;
4600 MN->InitOperands(MN->OperandList, Ops, NumOps);
4602 // If NumOps is larger than the # of operands we currently have, reallocate
4603 // the operand list.
4604 if (NumOps > N->NumOperands) {
4605 if (N->OperandsNeedDelete)
4606 delete[] N->OperandList;
4607 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4608 N->OperandsNeedDelete = true;
4610 N->InitOperands(N->OperandList, Ops, NumOps);
4613 // Delete any nodes that are still dead after adding the uses for the
4615 SmallVector<SDNode *, 16> DeadNodes;
4616 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4617 E = DeadNodeSet.end(); I != E; ++I)
4618 if ((*I)->use_empty())
4619 DeadNodes.push_back(*I);
4620 RemoveDeadNodes(DeadNodes);
4623 CSEMap.InsertNode(N, IP); // Memoize the new node.
4628 /// getMachineNode - These are used for target selectors to create a new node
4629 /// with specified return type(s), MachineInstr opcode, and operands.
4631 /// Note that getMachineNode returns the resultant node. If there is already a
4632 /// node of the specified opcode and operands, it returns that node instead of
4633 /// the current one.
4635 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4636 SDVTList VTs = getVTList(VT);
4637 return getMachineNode(Opcode, dl, VTs, 0, 0);
4641 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4642 SDVTList VTs = getVTList(VT);
4643 SDValue Ops[] = { Op1 };
4644 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4648 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4649 SDValue Op1, SDValue Op2) {
4650 SDVTList VTs = getVTList(VT);
4651 SDValue Ops[] = { Op1, Op2 };
4652 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4656 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4657 SDValue Op1, SDValue Op2, SDValue Op3) {
4658 SDVTList VTs = getVTList(VT);
4659 SDValue Ops[] = { Op1, Op2, Op3 };
4660 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4664 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4665 const SDValue *Ops, unsigned NumOps) {
4666 SDVTList VTs = getVTList(VT);
4667 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4671 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4672 SDVTList VTs = getVTList(VT1, VT2);
4673 return getMachineNode(Opcode, dl, VTs, 0, 0);
4677 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4678 EVT VT1, EVT VT2, SDValue Op1) {
4679 SDVTList VTs = getVTList(VT1, VT2);
4680 SDValue Ops[] = { Op1 };
4681 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4685 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4686 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4687 SDVTList VTs = getVTList(VT1, VT2);
4688 SDValue Ops[] = { Op1, Op2 };
4689 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4693 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4694 EVT VT1, EVT VT2, SDValue Op1,
4695 SDValue Op2, SDValue Op3) {
4696 SDVTList VTs = getVTList(VT1, VT2);
4697 SDValue Ops[] = { Op1, Op2, Op3 };
4698 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4702 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4704 const SDValue *Ops, unsigned NumOps) {
4705 SDVTList VTs = getVTList(VT1, VT2);
4706 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4710 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4711 EVT VT1, EVT VT2, EVT VT3,
4712 SDValue Op1, SDValue Op2) {
4713 SDVTList VTs = getVTList(VT1, VT2, VT3);
4714 SDValue Ops[] = { Op1, Op2 };
4715 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4719 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4720 EVT VT1, EVT VT2, EVT VT3,
4721 SDValue Op1, SDValue Op2, SDValue Op3) {
4722 SDVTList VTs = getVTList(VT1, VT2, VT3);
4723 SDValue Ops[] = { Op1, Op2, Op3 };
4724 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4728 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4729 EVT VT1, EVT VT2, EVT VT3,
4730 const SDValue *Ops, unsigned NumOps) {
4731 SDVTList VTs = getVTList(VT1, VT2, VT3);
4732 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4736 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4737 EVT VT2, EVT VT3, EVT VT4,
4738 const SDValue *Ops, unsigned NumOps) {
4739 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4740 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4744 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4745 const std::vector<EVT> &ResultTys,
4746 const SDValue *Ops, unsigned NumOps) {
4747 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4748 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4752 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4753 const SDValue *Ops, unsigned NumOps) {
4754 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4759 FoldingSetNodeID ID;
4760 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4762 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4763 return cast<MachineSDNode>(E);
4766 // Allocate a new MachineSDNode.
4767 N = NodeAllocator.Allocate<MachineSDNode>();
4768 new (N) MachineSDNode(~Opcode, DL, VTs);
4770 // Initialize the operands list.
4771 if (NumOps > array_lengthof(N->LocalOperands))
4772 // We're creating a final node that will live unmorphed for the
4773 // remainder of the current SelectionDAG iteration, so we can allocate
4774 // the operands directly out of a pool with no recycling metadata.
4775 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4778 N->InitOperands(N->LocalOperands, Ops, NumOps);
4779 N->OperandsNeedDelete = false;
4782 CSEMap.InsertNode(N, IP);
4784 AllNodes.push_back(N);
4791 /// getTargetExtractSubreg - A convenience function for creating
4792 /// TargetInstrInfo::EXTRACT_SUBREG nodes.
4794 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4796 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4797 SDNode *Subreg = getMachineNode(TargetInstrInfo::EXTRACT_SUBREG, DL,
4798 VT, Operand, SRIdxVal);
4799 return SDValue(Subreg, 0);
4802 /// getTargetInsertSubreg - A convenience function for creating
4803 /// TargetInstrInfo::INSERT_SUBREG nodes.
4805 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4806 SDValue Operand, SDValue Subreg) {
4807 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4808 SDNode *Result = getMachineNode(TargetInstrInfo::INSERT_SUBREG, DL,
4809 VT, Operand, Subreg, SRIdxVal);
4810 return SDValue(Result, 0);
4813 /// getNodeIfExists - Get the specified node if it's already available, or
4814 /// else return NULL.
4815 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4816 const SDValue *Ops, unsigned NumOps) {
4817 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4818 FoldingSetNodeID ID;
4819 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4821 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4827 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4828 /// This can cause recursive merging of nodes in the DAG.
4830 /// This version assumes From has a single result value.
4832 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4833 DAGUpdateListener *UpdateListener) {
4834 SDNode *From = FromN.getNode();
4835 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4836 "Cannot replace with this method!");
4837 assert(From != To.getNode() && "Cannot replace uses of with self");
4839 // Iterate over all the existing uses of From. New uses will be added
4840 // to the beginning of the use list, which we avoid visiting.
4841 // This specifically avoids visiting uses of From that arise while the
4842 // replacement is happening, because any such uses would be the result
4843 // of CSE: If an existing node looks like From after one of its operands
4844 // is replaced by To, we don't want to replace of all its users with To
4845 // too. See PR3018 for more info.
4846 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4850 // This node is about to morph, remove its old self from the CSE maps.
4851 RemoveNodeFromCSEMaps(User);
4853 // A user can appear in a use list multiple times, and when this
4854 // happens the uses are usually next to each other in the list.
4855 // To help reduce the number of CSE recomputations, process all
4856 // the uses of this user that we can find this way.
4858 SDUse &Use = UI.getUse();
4861 } while (UI != UE && *UI == User);
4863 // Now that we have modified User, add it back to the CSE maps. If it
4864 // already exists there, recursively merge the results together.
4865 AddModifiedNodeToCSEMaps(User, UpdateListener);
4869 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4870 /// This can cause recursive merging of nodes in the DAG.
4872 /// This version assumes that for each value of From, there is a
4873 /// corresponding value in To in the same position with the same type.
4875 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4876 DAGUpdateListener *UpdateListener) {
4878 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4879 assert((!From->hasAnyUseOfValue(i) ||
4880 From->getValueType(i) == To->getValueType(i)) &&
4881 "Cannot use this version of ReplaceAllUsesWith!");
4884 // Handle the trivial case.
4888 // Iterate over just the existing users of From. See the comments in
4889 // the ReplaceAllUsesWith above.
4890 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4894 // This node is about to morph, remove its old self from the CSE maps.
4895 RemoveNodeFromCSEMaps(User);
4897 // A user can appear in a use list multiple times, and when this
4898 // happens the uses are usually next to each other in the list.
4899 // To help reduce the number of CSE recomputations, process all
4900 // the uses of this user that we can find this way.
4902 SDUse &Use = UI.getUse();
4905 } while (UI != UE && *UI == User);
4907 // Now that we have modified User, add it back to the CSE maps. If it
4908 // already exists there, recursively merge the results together.
4909 AddModifiedNodeToCSEMaps(User, UpdateListener);
4913 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4914 /// This can cause recursive merging of nodes in the DAG.
4916 /// This version can replace From with any result values. To must match the
4917 /// number and types of values returned by From.
4918 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4920 DAGUpdateListener *UpdateListener) {
4921 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4922 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4924 // Iterate over just the existing users of From. See the comments in
4925 // the ReplaceAllUsesWith above.
4926 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4930 // This node is about to morph, remove its old self from the CSE maps.
4931 RemoveNodeFromCSEMaps(User);
4933 // A user can appear in a use list multiple times, and when this
4934 // happens the uses are usually next to each other in the list.
4935 // To help reduce the number of CSE recomputations, process all
4936 // the uses of this user that we can find this way.
4938 SDUse &Use = UI.getUse();
4939 const SDValue &ToOp = To[Use.getResNo()];
4942 } while (UI != UE && *UI == User);
4944 // Now that we have modified User, add it back to the CSE maps. If it
4945 // already exists there, recursively merge the results together.
4946 AddModifiedNodeToCSEMaps(User, UpdateListener);
4950 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4951 /// uses of other values produced by From.getNode() alone. The Deleted
4952 /// vector is handled the same way as for ReplaceAllUsesWith.
4953 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4954 DAGUpdateListener *UpdateListener){
4955 // Handle the really simple, really trivial case efficiently.
4956 if (From == To) return;
4958 // Handle the simple, trivial, case efficiently.
4959 if (From.getNode()->getNumValues() == 1) {
4960 ReplaceAllUsesWith(From, To, UpdateListener);
4964 // Iterate over just the existing users of From. See the comments in
4965 // the ReplaceAllUsesWith above.
4966 SDNode::use_iterator UI = From.getNode()->use_begin(),
4967 UE = From.getNode()->use_end();
4970 bool UserRemovedFromCSEMaps = false;
4972 // A user can appear in a use list multiple times, and when this
4973 // happens the uses are usually next to each other in the list.
4974 // To help reduce the number of CSE recomputations, process all
4975 // the uses of this user that we can find this way.
4977 SDUse &Use = UI.getUse();
4979 // Skip uses of different values from the same node.
4980 if (Use.getResNo() != From.getResNo()) {
4985 // If this node hasn't been modified yet, it's still in the CSE maps,
4986 // so remove its old self from the CSE maps.
4987 if (!UserRemovedFromCSEMaps) {
4988 RemoveNodeFromCSEMaps(User);
4989 UserRemovedFromCSEMaps = true;
4994 } while (UI != UE && *UI == User);
4996 // We are iterating over all uses of the From node, so if a use
4997 // doesn't use the specific value, no changes are made.
4998 if (!UserRemovedFromCSEMaps)
5001 // Now that we have modified User, add it back to the CSE maps. If it
5002 // already exists there, recursively merge the results together.
5003 AddModifiedNodeToCSEMaps(User, UpdateListener);
5008 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5009 /// to record information about a use.
5016 /// operator< - Sort Memos by User.
5017 bool operator<(const UseMemo &L, const UseMemo &R) {
5018 return (intptr_t)L.User < (intptr_t)R.User;
5022 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5023 /// uses of other values produced by From.getNode() alone. The same value
5024 /// may appear in both the From and To list. The Deleted vector is
5025 /// handled the same way as for ReplaceAllUsesWith.
5026 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5029 DAGUpdateListener *UpdateListener){
5030 // Handle the simple, trivial case efficiently.
5032 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5034 // Read up all the uses and make records of them. This helps
5035 // processing new uses that are introduced during the
5036 // replacement process.
5037 SmallVector<UseMemo, 4> Uses;
5038 for (unsigned i = 0; i != Num; ++i) {
5039 unsigned FromResNo = From[i].getResNo();
5040 SDNode *FromNode = From[i].getNode();
5041 for (SDNode::use_iterator UI = FromNode->use_begin(),
5042 E = FromNode->use_end(); UI != E; ++UI) {
5043 SDUse &Use = UI.getUse();
5044 if (Use.getResNo() == FromResNo) {
5045 UseMemo Memo = { *UI, i, &Use };
5046 Uses.push_back(Memo);
5051 // Sort the uses, so that all the uses from a given User are together.
5052 std::sort(Uses.begin(), Uses.end());
5054 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5055 UseIndex != UseIndexEnd; ) {
5056 // We know that this user uses some value of From. If it is the right
5057 // value, update it.
5058 SDNode *User = Uses[UseIndex].User;
5060 // This node is about to morph, remove its old self from the CSE maps.
5061 RemoveNodeFromCSEMaps(User);
5063 // The Uses array is sorted, so all the uses for a given User
5064 // are next to each other in the list.
5065 // To help reduce the number of CSE recomputations, process all
5066 // the uses of this user that we can find this way.
5068 unsigned i = Uses[UseIndex].Index;
5069 SDUse &Use = *Uses[UseIndex].Use;
5073 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5075 // Now that we have modified User, add it back to the CSE maps. If it
5076 // already exists there, recursively merge the results together.
5077 AddModifiedNodeToCSEMaps(User, UpdateListener);
5081 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5082 /// based on their topological order. It returns the maximum id and a vector
5083 /// of the SDNodes* in assigned order by reference.
5084 unsigned SelectionDAG::AssignTopologicalOrder() {
5086 unsigned DAGSize = 0;
5088 // SortedPos tracks the progress of the algorithm. Nodes before it are
5089 // sorted, nodes after it are unsorted. When the algorithm completes
5090 // it is at the end of the list.
5091 allnodes_iterator SortedPos = allnodes_begin();
5093 // Visit all the nodes. Move nodes with no operands to the front of
5094 // the list immediately. Annotate nodes that do have operands with their
5095 // operand count. Before we do this, the Node Id fields of the nodes
5096 // may contain arbitrary values. After, the Node Id fields for nodes
5097 // before SortedPos will contain the topological sort index, and the
5098 // Node Id fields for nodes At SortedPos and after will contain the
5099 // count of outstanding operands.
5100 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5102 unsigned Degree = N->getNumOperands();
5104 // A node with no uses, add it to the result array immediately.
5105 N->setNodeId(DAGSize++);
5106 allnodes_iterator Q = N;
5108 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5111 // Temporarily use the Node Id as scratch space for the degree count.
5112 N->setNodeId(Degree);
5116 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5117 // such that by the time the end is reached all nodes will be sorted.
5118 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5120 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5123 unsigned Degree = P->getNodeId();
5126 // All of P's operands are sorted, so P may sorted now.
5127 P->setNodeId(DAGSize++);
5129 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5132 // Update P's outstanding operand count.
5133 P->setNodeId(Degree);
5138 assert(SortedPos == AllNodes.end() &&
5139 "Topological sort incomplete!");
5140 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5141 "First node in topological sort is not the entry token!");
5142 assert(AllNodes.front().getNodeId() == 0 &&
5143 "First node in topological sort has non-zero id!");
5144 assert(AllNodes.front().getNumOperands() == 0 &&
5145 "First node in topological sort has operands!");
5146 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5147 "Last node in topologic sort has unexpected id!");
5148 assert(AllNodes.back().use_empty() &&
5149 "Last node in topologic sort has users!");
5150 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5156 //===----------------------------------------------------------------------===//
5158 //===----------------------------------------------------------------------===//
5160 HandleSDNode::~HandleSDNode() {
5164 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5165 EVT VT, int64_t o, unsigned char TF)
5166 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
5167 Offset(o), TargetFlags(TF) {
5168 TheGlobal = const_cast<GlobalValue*>(GA);
5171 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5172 MachineMemOperand *mmo)
5173 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5174 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5175 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5176 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5179 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5180 const SDValue *Ops, unsigned NumOps, EVT memvt,
5181 MachineMemOperand *mmo)
5182 : SDNode(Opc, dl, VTs, Ops, NumOps),
5183 MemoryVT(memvt), MMO(mmo) {
5184 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile());
5185 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5186 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5189 /// Profile - Gather unique data for the node.
5191 void SDNode::Profile(FoldingSetNodeID &ID) const {
5192 AddNodeIDNode(ID, this);
5197 std::vector<EVT> VTs;
5200 VTs.reserve(MVT::LAST_VALUETYPE);
5201 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5202 VTs.push_back(MVT((MVT::SimpleValueType)i));
5207 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5208 static ManagedStatic<EVTArray> SimpleVTArray;
5209 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5211 /// getValueTypeList - Return a pointer to the specified value type.
5213 const EVT *SDNode::getValueTypeList(EVT VT) {
5214 if (VT.isExtended()) {
5215 sys::SmartScopedLock<true> Lock(*VTMutex);
5216 return &(*EVTs->insert(VT).first);
5218 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5222 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5223 /// indicated value. This method ignores uses of other values defined by this
5225 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5226 assert(Value < getNumValues() && "Bad value!");
5228 // TODO: Only iterate over uses of a given value of the node
5229 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5230 if (UI.getUse().getResNo() == Value) {
5237 // Found exactly the right number of uses?
5242 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5243 /// value. This method ignores uses of other values defined by this operation.
5244 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5245 assert(Value < getNumValues() && "Bad value!");
5247 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5248 if (UI.getUse().getResNo() == Value)
5255 /// isOnlyUserOf - Return true if this node is the only use of N.
5257 bool SDNode::isOnlyUserOf(SDNode *N) const {
5259 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5270 /// isOperand - Return true if this node is an operand of N.
5272 bool SDValue::isOperandOf(SDNode *N) const {
5273 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5274 if (*this == N->getOperand(i))
5279 bool SDNode::isOperandOf(SDNode *N) const {
5280 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5281 if (this == N->OperandList[i].getNode())
5286 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5287 /// be a chain) reaches the specified operand without crossing any
5288 /// side-effecting instructions. In practice, this looks through token
5289 /// factors and non-volatile loads. In order to remain efficient, this only
5290 /// looks a couple of nodes in, it does not do an exhaustive search.
5291 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5292 unsigned Depth) const {
5293 if (*this == Dest) return true;
5295 // Don't search too deeply, we just want to be able to see through
5296 // TokenFactor's etc.
5297 if (Depth == 0) return false;
5299 // If this is a token factor, all inputs to the TF happen in parallel. If any
5300 // of the operands of the TF reach dest, then we can do the xform.
5301 if (getOpcode() == ISD::TokenFactor) {
5302 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5303 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5308 // Loads don't have side effects, look through them.
5309 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5310 if (!Ld->isVolatile())
5311 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5316 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5317 /// is either an operand of N or it can be reached by traversing up the operands.
5318 /// NOTE: this is an expensive method. Use it carefully.
5319 bool SDNode::isPredecessorOf(SDNode *N) const {
5320 SmallPtrSet<SDNode *, 32> Visited;
5321 SmallVector<SDNode *, 16> Worklist;
5322 Worklist.push_back(N);
5325 N = Worklist.pop_back_val();
5326 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5327 SDNode *Op = N->getOperand(i).getNode();
5330 if (Visited.insert(Op))
5331 Worklist.push_back(Op);
5333 } while (!Worklist.empty());
5338 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5339 assert(Num < NumOperands && "Invalid child # of SDNode!");
5340 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5343 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5344 switch (getOpcode()) {
5346 if (getOpcode() < ISD::BUILTIN_OP_END)
5347 return "<<Unknown DAG Node>>";
5348 if (isMachineOpcode()) {
5350 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5351 if (getMachineOpcode() < TII->getNumOpcodes())
5352 return TII->get(getMachineOpcode()).getName();
5353 return "<<Unknown Machine Node>>";
5356 const TargetLowering &TLI = G->getTargetLoweringInfo();
5357 const char *Name = TLI.getTargetNodeName(getOpcode());
5358 if (Name) return Name;
5359 return "<<Unknown Target Node>>";
5361 return "<<Unknown Node>>";
5364 case ISD::DELETED_NODE:
5365 return "<<Deleted Node!>>";
5367 case ISD::PREFETCH: return "Prefetch";
5368 case ISD::MEMBARRIER: return "MemBarrier";
5369 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5370 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5371 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5372 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5373 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5374 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5375 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5376 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5377 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5378 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5379 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5380 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5381 case ISD::PCMARKER: return "PCMarker";
5382 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5383 case ISD::SRCVALUE: return "SrcValue";
5384 case ISD::EntryToken: return "EntryToken";
5385 case ISD::TokenFactor: return "TokenFactor";
5386 case ISD::AssertSext: return "AssertSext";
5387 case ISD::AssertZext: return "AssertZext";
5389 case ISD::BasicBlock: return "BasicBlock";
5390 case ISD::VALUETYPE: return "ValueType";
5391 case ISD::Register: return "Register";
5393 case ISD::Constant: return "Constant";
5394 case ISD::ConstantFP: return "ConstantFP";
5395 case ISD::GlobalAddress: return "GlobalAddress";
5396 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5397 case ISD::FrameIndex: return "FrameIndex";
5398 case ISD::JumpTable: return "JumpTable";
5399 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5400 case ISD::RETURNADDR: return "RETURNADDR";
5401 case ISD::FRAMEADDR: return "FRAMEADDR";
5402 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5403 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5404 case ISD::LSDAADDR: return "LSDAADDR";
5405 case ISD::EHSELECTION: return "EHSELECTION";
5406 case ISD::EH_RETURN: return "EH_RETURN";
5407 case ISD::ConstantPool: return "ConstantPool";
5408 case ISD::ExternalSymbol: return "ExternalSymbol";
5409 case ISD::BlockAddress: return "BlockAddress";
5410 case ISD::INTRINSIC_WO_CHAIN:
5411 case ISD::INTRINSIC_VOID:
5412 case ISD::INTRINSIC_W_CHAIN: {
5413 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5414 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5415 if (IID < Intrinsic::num_intrinsics)
5416 return Intrinsic::getName((Intrinsic::ID)IID);
5417 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5418 return TII->getName(IID);
5419 llvm_unreachable("Invalid intrinsic ID");
5422 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5423 case ISD::TargetConstant: return "TargetConstant";
5424 case ISD::TargetConstantFP:return "TargetConstantFP";
5425 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5426 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5427 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5428 case ISD::TargetJumpTable: return "TargetJumpTable";
5429 case ISD::TargetConstantPool: return "TargetConstantPool";
5430 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5431 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5433 case ISD::CopyToReg: return "CopyToReg";
5434 case ISD::CopyFromReg: return "CopyFromReg";
5435 case ISD::UNDEF: return "undef";
5436 case ISD::MERGE_VALUES: return "merge_values";
5437 case ISD::INLINEASM: return "inlineasm";
5438 case ISD::EH_LABEL: return "eh_label";
5439 case ISD::HANDLENODE: return "handlenode";
5442 case ISD::FABS: return "fabs";
5443 case ISD::FNEG: return "fneg";
5444 case ISD::FSQRT: return "fsqrt";
5445 case ISD::FSIN: return "fsin";
5446 case ISD::FCOS: return "fcos";
5447 case ISD::FPOWI: return "fpowi";
5448 case ISD::FPOW: return "fpow";
5449 case ISD::FTRUNC: return "ftrunc";
5450 case ISD::FFLOOR: return "ffloor";
5451 case ISD::FCEIL: return "fceil";
5452 case ISD::FRINT: return "frint";
5453 case ISD::FNEARBYINT: return "fnearbyint";
5456 case ISD::ADD: return "add";
5457 case ISD::SUB: return "sub";
5458 case ISD::MUL: return "mul";
5459 case ISD::MULHU: return "mulhu";
5460 case ISD::MULHS: return "mulhs";
5461 case ISD::SDIV: return "sdiv";
5462 case ISD::UDIV: return "udiv";
5463 case ISD::SREM: return "srem";
5464 case ISD::UREM: return "urem";
5465 case ISD::SMUL_LOHI: return "smul_lohi";
5466 case ISD::UMUL_LOHI: return "umul_lohi";
5467 case ISD::SDIVREM: return "sdivrem";
5468 case ISD::UDIVREM: return "udivrem";
5469 case ISD::AND: return "and";
5470 case ISD::OR: return "or";
5471 case ISD::XOR: return "xor";
5472 case ISD::SHL: return "shl";
5473 case ISD::SRA: return "sra";
5474 case ISD::SRL: return "srl";
5475 case ISD::ROTL: return "rotl";
5476 case ISD::ROTR: return "rotr";
5477 case ISD::FADD: return "fadd";
5478 case ISD::FSUB: return "fsub";
5479 case ISD::FMUL: return "fmul";
5480 case ISD::FDIV: return "fdiv";
5481 case ISD::FREM: return "frem";
5482 case ISD::FCOPYSIGN: return "fcopysign";
5483 case ISD::FGETSIGN: return "fgetsign";
5485 case ISD::SETCC: return "setcc";
5486 case ISD::VSETCC: return "vsetcc";
5487 case ISD::SELECT: return "select";
5488 case ISD::SELECT_CC: return "select_cc";
5489 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5490 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5491 case ISD::CONCAT_VECTORS: return "concat_vectors";
5492 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5493 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5494 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5495 case ISD::CARRY_FALSE: return "carry_false";
5496 case ISD::ADDC: return "addc";
5497 case ISD::ADDE: return "adde";
5498 case ISD::SADDO: return "saddo";
5499 case ISD::UADDO: return "uaddo";
5500 case ISD::SSUBO: return "ssubo";
5501 case ISD::USUBO: return "usubo";
5502 case ISD::SMULO: return "smulo";
5503 case ISD::UMULO: return "umulo";
5504 case ISD::SUBC: return "subc";
5505 case ISD::SUBE: return "sube";
5506 case ISD::SHL_PARTS: return "shl_parts";
5507 case ISD::SRA_PARTS: return "sra_parts";
5508 case ISD::SRL_PARTS: return "srl_parts";
5510 // Conversion operators.
5511 case ISD::SIGN_EXTEND: return "sign_extend";
5512 case ISD::ZERO_EXTEND: return "zero_extend";
5513 case ISD::ANY_EXTEND: return "any_extend";
5514 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5515 case ISD::TRUNCATE: return "truncate";
5516 case ISD::FP_ROUND: return "fp_round";
5517 case ISD::FLT_ROUNDS_: return "flt_rounds";
5518 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5519 case ISD::FP_EXTEND: return "fp_extend";
5521 case ISD::SINT_TO_FP: return "sint_to_fp";
5522 case ISD::UINT_TO_FP: return "uint_to_fp";
5523 case ISD::FP_TO_SINT: return "fp_to_sint";
5524 case ISD::FP_TO_UINT: return "fp_to_uint";
5525 case ISD::BIT_CONVERT: return "bit_convert";
5527 case ISD::CONVERT_RNDSAT: {
5528 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5529 default: llvm_unreachable("Unknown cvt code!");
5530 case ISD::CVT_FF: return "cvt_ff";
5531 case ISD::CVT_FS: return "cvt_fs";
5532 case ISD::CVT_FU: return "cvt_fu";
5533 case ISD::CVT_SF: return "cvt_sf";
5534 case ISD::CVT_UF: return "cvt_uf";
5535 case ISD::CVT_SS: return "cvt_ss";
5536 case ISD::CVT_SU: return "cvt_su";
5537 case ISD::CVT_US: return "cvt_us";
5538 case ISD::CVT_UU: return "cvt_uu";
5542 // Control flow instructions
5543 case ISD::BR: return "br";
5544 case ISD::BRIND: return "brind";
5545 case ISD::BR_JT: return "br_jt";
5546 case ISD::BRCOND: return "brcond";
5547 case ISD::BR_CC: return "br_cc";
5548 case ISD::CALLSEQ_START: return "callseq_start";
5549 case ISD::CALLSEQ_END: return "callseq_end";
5552 case ISD::LOAD: return "load";
5553 case ISD::STORE: return "store";
5554 case ISD::VAARG: return "vaarg";
5555 case ISD::VACOPY: return "vacopy";
5556 case ISD::VAEND: return "vaend";
5557 case ISD::VASTART: return "vastart";
5558 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5559 case ISD::EXTRACT_ELEMENT: return "extract_element";
5560 case ISD::BUILD_PAIR: return "build_pair";
5561 case ISD::STACKSAVE: return "stacksave";
5562 case ISD::STACKRESTORE: return "stackrestore";
5563 case ISD::TRAP: return "trap";
5566 case ISD::BSWAP: return "bswap";
5567 case ISD::CTPOP: return "ctpop";
5568 case ISD::CTTZ: return "cttz";
5569 case ISD::CTLZ: return "ctlz";
5572 case ISD::TRAMPOLINE: return "trampoline";
5575 switch (cast<CondCodeSDNode>(this)->get()) {
5576 default: llvm_unreachable("Unknown setcc condition!");
5577 case ISD::SETOEQ: return "setoeq";
5578 case ISD::SETOGT: return "setogt";
5579 case ISD::SETOGE: return "setoge";
5580 case ISD::SETOLT: return "setolt";
5581 case ISD::SETOLE: return "setole";
5582 case ISD::SETONE: return "setone";
5584 case ISD::SETO: return "seto";
5585 case ISD::SETUO: return "setuo";
5586 case ISD::SETUEQ: return "setue";
5587 case ISD::SETUGT: return "setugt";
5588 case ISD::SETUGE: return "setuge";
5589 case ISD::SETULT: return "setult";
5590 case ISD::SETULE: return "setule";
5591 case ISD::SETUNE: return "setune";
5593 case ISD::SETEQ: return "seteq";
5594 case ISD::SETGT: return "setgt";
5595 case ISD::SETGE: return "setge";
5596 case ISD::SETLT: return "setlt";
5597 case ISD::SETLE: return "setle";
5598 case ISD::SETNE: return "setne";
5603 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5612 return "<post-inc>";
5614 return "<post-dec>";
5618 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5619 std::string S = "< ";
5633 if (getByValAlign())
5634 S += "byval-align:" + utostr(getByValAlign()) + " ";
5636 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5638 S += "byval-size:" + utostr(getByValSize()) + " ";
5642 void SDNode::dump() const { dump(0); }
5643 void SDNode::dump(const SelectionDAG *G) const {
5647 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5648 OS << (void*)this << ": ";
5650 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5652 if (getValueType(i) == MVT::Other)
5655 OS << getValueType(i).getEVTString();
5657 OS << " = " << getOperationName(G);
5660 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5661 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5662 if (!MN->memoperands_empty()) {
5665 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5666 e = MN->memoperands_end(); i != e; ++i) {
5673 } else if (const ShuffleVectorSDNode *SVN =
5674 dyn_cast<ShuffleVectorSDNode>(this)) {
5676 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5677 int Idx = SVN->getMaskElt(i);
5685 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5686 OS << '<' << CSDN->getAPIntValue() << '>';
5687 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5688 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5689 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5690 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5691 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5694 CSDN->getValueAPF().bitcastToAPInt().dump();
5697 } else if (const GlobalAddressSDNode *GADN =
5698 dyn_cast<GlobalAddressSDNode>(this)) {
5699 int64_t offset = GADN->getOffset();
5701 WriteAsOperand(OS, GADN->getGlobal());
5704 OS << " + " << offset;
5706 OS << " " << offset;
5707 if (unsigned int TF = GADN->getTargetFlags())
5708 OS << " [TF=" << TF << ']';
5709 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5710 OS << "<" << FIDN->getIndex() << ">";
5711 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5712 OS << "<" << JTDN->getIndex() << ">";
5713 if (unsigned int TF = JTDN->getTargetFlags())
5714 OS << " [TF=" << TF << ']';
5715 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5716 int offset = CP->getOffset();
5717 if (CP->isMachineConstantPoolEntry())
5718 OS << "<" << *CP->getMachineCPVal() << ">";
5720 OS << "<" << *CP->getConstVal() << ">";
5722 OS << " + " << offset;
5724 OS << " " << offset;
5725 if (unsigned int TF = CP->getTargetFlags())
5726 OS << " [TF=" << TF << ']';
5727 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5729 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5731 OS << LBB->getName() << " ";
5732 OS << (const void*)BBDN->getBasicBlock() << ">";
5733 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5734 if (G && R->getReg() &&
5735 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5736 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5738 OS << " %reg" << R->getReg();
5740 } else if (const ExternalSymbolSDNode *ES =
5741 dyn_cast<ExternalSymbolSDNode>(this)) {
5742 OS << "'" << ES->getSymbol() << "'";
5743 if (unsigned int TF = ES->getTargetFlags())
5744 OS << " [TF=" << TF << ']';
5745 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5747 OS << "<" << M->getValue() << ">";
5750 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5751 OS << ":" << N->getVT().getEVTString();
5753 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5754 OS << "<" << *LD->getMemOperand();
5757 switch (LD->getExtensionType()) {
5758 default: doExt = false; break;
5759 case ISD::EXTLOAD: OS << ", anyext"; break;
5760 case ISD::SEXTLOAD: OS << ", sext"; break;
5761 case ISD::ZEXTLOAD: OS << ", zext"; break;
5764 OS << " from " << LD->getMemoryVT().getEVTString();
5766 const char *AM = getIndexedModeName(LD->getAddressingMode());
5771 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5772 OS << "<" << *ST->getMemOperand();
5774 if (ST->isTruncatingStore())
5775 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5777 const char *AM = getIndexedModeName(ST->getAddressingMode());
5782 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5783 OS << "<" << *M->getMemOperand() << ">";
5784 } else if (const BlockAddressSDNode *BA =
5785 dyn_cast<BlockAddressSDNode>(this)) {
5787 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5789 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5791 if (unsigned int TF = BA->getTargetFlags())
5792 OS << " [TF=" << TF << ']';
5796 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5798 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5799 if (i) OS << ", "; else OS << " ";
5800 OS << (void*)getOperand(i).getNode();
5801 if (unsigned RN = getOperand(i).getResNo())
5804 print_details(OS, G);
5807 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5808 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5809 if (N->getOperand(i).getNode()->hasOneUse())
5810 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5812 errs() << "\n" << std::string(indent+2, ' ')
5813 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5817 errs().indent(indent);
5821 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5822 assert(N->getNumValues() == 1 &&
5823 "Can't unroll a vector with multiple results!");
5825 EVT VT = N->getValueType(0);
5826 unsigned NE = VT.getVectorNumElements();
5827 EVT EltVT = VT.getVectorElementType();
5828 DebugLoc dl = N->getDebugLoc();
5830 SmallVector<SDValue, 8> Scalars;
5831 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5833 // If ResNE is 0, fully unroll the vector op.
5836 else if (NE > ResNE)
5840 for (i= 0; i != NE; ++i) {
5841 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
5842 SDValue Operand = N->getOperand(j);
5843 EVT OperandVT = Operand.getValueType();
5844 if (OperandVT.isVector()) {
5845 // A vector operand; extract a single element.
5846 EVT OperandEltVT = OperandVT.getVectorElementType();
5847 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5850 getConstant(i, MVT::i32));
5852 // A scalar operand; just use it as is.
5853 Operands[j] = Operand;
5857 switch (N->getOpcode()) {
5859 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5860 &Operands[0], Operands.size()));
5867 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
5868 getShiftAmountOperand(Operands[1])));
5873 for (; i < ResNE; ++i)
5874 Scalars.push_back(getUNDEF(EltVT));
5876 return getNode(ISD::BUILD_VECTOR, dl,
5877 EVT::getVectorVT(*getContext(), EltVT, ResNE),
5878 &Scalars[0], Scalars.size());
5882 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
5883 /// location that is 'Dist' units away from the location that the 'Base' load
5884 /// is loading from.
5885 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
5886 unsigned Bytes, int Dist) const {
5887 if (LD->getChain() != Base->getChain())
5889 EVT VT = LD->getValueType(0);
5890 if (VT.getSizeInBits() / 8 != Bytes)
5893 SDValue Loc = LD->getOperand(1);
5894 SDValue BaseLoc = Base->getOperand(1);
5895 if (Loc.getOpcode() == ISD::FrameIndex) {
5896 if (BaseLoc.getOpcode() != ISD::FrameIndex)
5898 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
5899 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
5900 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
5901 int FS = MFI->getObjectSize(FI);
5902 int BFS = MFI->getObjectSize(BFI);
5903 if (FS != BFS || FS != (int)Bytes) return false;
5904 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
5906 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
5907 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
5908 if (V && (V->getSExtValue() == Dist*Bytes))
5912 GlobalValue *GV1 = NULL;
5913 GlobalValue *GV2 = NULL;
5914 int64_t Offset1 = 0;
5915 int64_t Offset2 = 0;
5916 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
5917 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
5918 if (isGA1 && isGA2 && GV1 == GV2)
5919 return Offset1 == (Offset2 + Dist*Bytes);
5924 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
5925 /// it cannot be inferred.
5926 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
5927 // If this is a GlobalAddress + cst, return the alignment.
5929 int64_t GVOffset = 0;
5930 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset))
5931 return MinAlign(GV->getAlignment(), GVOffset);
5933 // If this is a direct reference to a stack slot, use information about the
5934 // stack slot's alignment.
5935 int FrameIdx = 1 << 31;
5936 int64_t FrameOffset = 0;
5937 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
5938 FrameIdx = FI->getIndex();
5939 } else if (Ptr.getOpcode() == ISD::ADD &&
5940 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
5941 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
5942 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
5943 FrameOffset = Ptr.getConstantOperandVal(1);
5946 if (FrameIdx != (1 << 31)) {
5947 // FIXME: Handle FI+CST.
5948 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
5949 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
5951 if (MFI.isFixedObjectIndex(FrameIdx)) {
5952 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
5954 // The alignment of the frame index can be determined from its offset from
5955 // the incoming frame position. If the frame object is at offset 32 and
5956 // the stack is guaranteed to be 16-byte aligned, then we know that the
5957 // object is 16-byte aligned.
5958 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
5959 unsigned Align = MinAlign(ObjectOffset, StackAlign);
5961 // Finally, the frame object itself may have a known alignment. Factor
5962 // the alignment + offset into a new alignment. For example, if we know
5963 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
5964 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
5965 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
5966 return std::max(Align, FIInfoAlign);
5974 void SelectionDAG::dump() const {
5975 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
5977 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5979 const SDNode *N = I;
5980 if (!N->hasOneUse() && N != getRoot().getNode())
5981 DumpNodes(N, 2, this);
5984 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5989 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5991 print_details(OS, G);
5994 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5995 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5996 const SelectionDAG *G, VisitedSDNodeSet &once) {
5997 if (!once.insert(N)) // If we've been here before, return now.
5999 // Dump the current SDNode, but don't end the line yet.
6000 OS << std::string(indent, ' ');
6002 // Having printed this SDNode, walk the children:
6003 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6004 const SDNode *child = N->getOperand(i).getNode();
6007 if (child->getNumOperands() == 0) {
6008 // This child has no grandchildren; print it inline right here.
6009 child->printr(OS, G);
6011 } else { // Just the address. FIXME: also print the child's opcode
6013 if (unsigned RN = N->getOperand(i).getResNo())
6018 // Dump children that have grandchildren on their own line(s).
6019 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6020 const SDNode *child = N->getOperand(i).getNode();
6021 DumpNodesr(OS, child, indent+2, G, once);
6025 void SDNode::dumpr() const {
6026 VisitedSDNodeSet once;
6027 DumpNodesr(errs(), this, 0, 0, once);
6030 void SDNode::dumpr(const SelectionDAG *G) const {
6031 VisitedSDNodeSet once;
6032 DumpNodesr(errs(), this, 0, G, once);
6036 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6037 unsigned GlobalAddressSDNode::getAddressSpace() const {
6038 return getGlobal()->getType()->getAddressSpace();
6042 const Type *ConstantPoolSDNode::getType() const {
6043 if (isMachineConstantPoolEntry())
6044 return Val.MachineCPVal->getType();
6045 return Val.ConstVal->getType();
6048 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6050 unsigned &SplatBitSize,
6052 unsigned MinSplatBits,
6054 EVT VT = getValueType(0);
6055 assert(VT.isVector() && "Expected a vector type");
6056 unsigned sz = VT.getSizeInBits();
6057 if (MinSplatBits > sz)
6060 SplatValue = APInt(sz, 0);
6061 SplatUndef = APInt(sz, 0);
6063 // Get the bits. Bits with undefined values (when the corresponding element
6064 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6065 // in SplatValue. If any of the values are not constant, give up and return
6067 unsigned int nOps = getNumOperands();
6068 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6069 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6071 for (unsigned j = 0; j < nOps; ++j) {
6072 unsigned i = isBigEndian ? nOps-1-j : j;
6073 SDValue OpVal = getOperand(i);
6074 unsigned BitPos = j * EltBitSize;
6076 if (OpVal.getOpcode() == ISD::UNDEF)
6077 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6078 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6079 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6080 zextOrTrunc(sz) << BitPos);
6081 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6082 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6087 // The build_vector is all constants or undefs. Find the smallest element
6088 // size that splats the vector.
6090 HasAnyUndefs = (SplatUndef != 0);
6093 unsigned HalfSize = sz / 2;
6094 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6095 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6096 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6097 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6099 // If the two halves do not match (ignoring undef bits), stop here.
6100 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6101 MinSplatBits > HalfSize)
6104 SplatValue = HighValue | LowValue;
6105 SplatUndef = HighUndef & LowUndef;
6114 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6115 // Find the first non-undef value in the shuffle mask.
6117 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6120 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6122 // Make sure all remaining elements are either undef or the same as the first
6124 for (int Idx = Mask[i]; i != e; ++i)
6125 if (Mask[i] >= 0 && Mask[i] != Idx)