1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
200 /// all ConstantFPSDNode or undef.
201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
205 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
206 SDValue Op = N->getOperand(i);
207 if (Op.getOpcode() == ISD::UNDEF)
209 if (!isa<ConstantFPSDNode>(Op))
215 /// isScalarToVector - Return true if the specified node is a
216 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
217 /// element is not an undef.
218 bool ISD::isScalarToVector(const SDNode *N) {
219 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
222 if (N->getOpcode() != ISD::BUILD_VECTOR)
224 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
226 unsigned NumElems = N->getNumOperands();
229 for (unsigned i = 1; i < NumElems; ++i) {
230 SDValue V = N->getOperand(i);
231 if (V.getOpcode() != ISD::UNDEF)
237 /// allOperandsUndef - Return true if the node has at least one operand
238 /// and all operands of the specified node are ISD::UNDEF.
239 bool ISD::allOperandsUndef(const SDNode *N) {
240 // Return false if the node has no operands.
241 // This is "logically inconsistent" with the definition of "all" but
242 // is probably the desired behavior.
243 if (N->getNumOperands() == 0)
246 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
247 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
253 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
256 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
258 return ISD::SIGN_EXTEND;
260 return ISD::ZERO_EXTEND;
265 llvm_unreachable("Invalid LoadExtType");
268 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
269 /// when given the operation for (X op Y).
270 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
271 // To perform this operation, we just need to swap the L and G bits of the
273 unsigned OldL = (Operation >> 2) & 1;
274 unsigned OldG = (Operation >> 1) & 1;
275 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
276 (OldL << 1) | // New G bit
277 (OldG << 2)); // New L bit.
280 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
281 /// 'op' is a valid SetCC operation.
282 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
283 unsigned Operation = Op;
285 Operation ^= 7; // Flip L, G, E bits, but not U.
287 Operation ^= 15; // Flip all of the condition bits.
289 if (Operation > ISD::SETTRUE2)
290 Operation &= ~8; // Don't let N and U bits get set.
292 return ISD::CondCode(Operation);
296 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
297 /// signed operation and 2 if the result is an unsigned comparison. Return zero
298 /// if the operation does not depend on the sign of the input (setne and seteq).
299 static int isSignedOp(ISD::CondCode Opcode) {
301 default: llvm_unreachable("Illegal integer setcc operation!");
303 case ISD::SETNE: return 0;
307 case ISD::SETGE: return 1;
311 case ISD::SETUGE: return 2;
315 /// getSetCCOrOperation - Return the result of a logical OR between different
316 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
317 /// returns SETCC_INVALID if it is not possible to represent the resultant
319 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
321 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
322 // Cannot fold a signed integer setcc with an unsigned integer setcc.
323 return ISD::SETCC_INVALID;
325 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
327 // If the N and U bits get set then the resultant comparison DOES suddenly
328 // care about orderedness, and is true when ordered.
329 if (Op > ISD::SETTRUE2)
330 Op &= ~16; // Clear the U bit if the N bit is set.
332 // Canonicalize illegal integer setcc's.
333 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
336 return ISD::CondCode(Op);
339 /// getSetCCAndOperation - Return the result of a logical AND between different
340 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
341 /// function returns zero if it is not possible to represent the resultant
343 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
345 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
346 // Cannot fold a signed setcc with an unsigned setcc.
347 return ISD::SETCC_INVALID;
349 // Combine all of the condition bits.
350 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
352 // Canonicalize illegal integer setcc's.
356 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
357 case ISD::SETOEQ: // SETEQ & SETU[LG]E
358 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
359 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
360 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
367 //===----------------------------------------------------------------------===//
368 // SDNode Profile Support
369 //===----------------------------------------------------------------------===//
371 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
373 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
377 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
378 /// solely with their pointer.
379 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
380 ID.AddPointer(VTList.VTs);
383 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
385 static void AddNodeIDOperands(FoldingSetNodeID &ID,
386 ArrayRef<SDValue> Ops) {
387 for (auto& Op : Ops) {
388 ID.AddPointer(Op.getNode());
389 ID.AddInteger(Op.getResNo());
393 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
395 static void AddNodeIDOperands(FoldingSetNodeID &ID,
396 ArrayRef<SDUse> Ops) {
397 for (auto& Op : Ops) {
398 ID.AddPointer(Op.getNode());
399 ID.AddInteger(Op.getResNo());
403 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
407 ID.AddBoolean(exact);
410 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
411 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
412 bool nuw, bool nsw, bool exact) {
413 if (isBinOpWithFlags(Opcode))
414 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
417 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
418 SDVTList VTList, ArrayRef<SDValue> OpList) {
419 AddNodeIDOpcode(ID, OpC);
420 AddNodeIDValueTypes(ID, VTList);
421 AddNodeIDOperands(ID, OpList);
424 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
426 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
427 switch (N->getOpcode()) {
428 case ISD::TargetExternalSymbol:
429 case ISD::ExternalSymbol:
430 llvm_unreachable("Should only be used on nodes with operands");
431 default: break; // Normal nodes don't need extra info.
432 case ISD::TargetConstant:
433 case ISD::Constant: {
434 const ConstantSDNode *C = cast<ConstantSDNode>(N);
435 ID.AddPointer(C->getConstantIntValue());
436 ID.AddBoolean(C->isOpaque());
439 case ISD::TargetConstantFP:
440 case ISD::ConstantFP: {
441 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
444 case ISD::TargetGlobalAddress:
445 case ISD::GlobalAddress:
446 case ISD::TargetGlobalTLSAddress:
447 case ISD::GlobalTLSAddress: {
448 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
449 ID.AddPointer(GA->getGlobal());
450 ID.AddInteger(GA->getOffset());
451 ID.AddInteger(GA->getTargetFlags());
452 ID.AddInteger(GA->getAddressSpace());
455 case ISD::BasicBlock:
456 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
459 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
461 case ISD::RegisterMask:
462 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
465 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
467 case ISD::FrameIndex:
468 case ISD::TargetFrameIndex:
469 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
472 case ISD::TargetJumpTable:
473 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
474 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
476 case ISD::ConstantPool:
477 case ISD::TargetConstantPool: {
478 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
479 ID.AddInteger(CP->getAlignment());
480 ID.AddInteger(CP->getOffset());
481 if (CP->isMachineConstantPoolEntry())
482 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
484 ID.AddPointer(CP->getConstVal());
485 ID.AddInteger(CP->getTargetFlags());
488 case ISD::TargetIndex: {
489 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
490 ID.AddInteger(TI->getIndex());
491 ID.AddInteger(TI->getOffset());
492 ID.AddInteger(TI->getTargetFlags());
496 const LoadSDNode *LD = cast<LoadSDNode>(N);
497 ID.AddInteger(LD->getMemoryVT().getRawBits());
498 ID.AddInteger(LD->getRawSubclassData());
499 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
503 const StoreSDNode *ST = cast<StoreSDNode>(N);
504 ID.AddInteger(ST->getMemoryVT().getRawBits());
505 ID.AddInteger(ST->getRawSubclassData());
506 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
517 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
518 AddBinaryNodeIDCustom(
519 ID, N->getOpcode(), BinNode->Flags.hasNoUnsignedWrap(),
520 BinNode->Flags.hasNoSignedWrap(), BinNode->Flags.hasExact());
523 case ISD::ATOMIC_CMP_SWAP:
524 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
525 case ISD::ATOMIC_SWAP:
526 case ISD::ATOMIC_LOAD_ADD:
527 case ISD::ATOMIC_LOAD_SUB:
528 case ISD::ATOMIC_LOAD_AND:
529 case ISD::ATOMIC_LOAD_OR:
530 case ISD::ATOMIC_LOAD_XOR:
531 case ISD::ATOMIC_LOAD_NAND:
532 case ISD::ATOMIC_LOAD_MIN:
533 case ISD::ATOMIC_LOAD_MAX:
534 case ISD::ATOMIC_LOAD_UMIN:
535 case ISD::ATOMIC_LOAD_UMAX:
536 case ISD::ATOMIC_LOAD:
537 case ISD::ATOMIC_STORE: {
538 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
539 ID.AddInteger(AT->getMemoryVT().getRawBits());
540 ID.AddInteger(AT->getRawSubclassData());
541 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
544 case ISD::PREFETCH: {
545 const MemSDNode *PF = cast<MemSDNode>(N);
546 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
549 case ISD::VECTOR_SHUFFLE: {
550 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
551 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
553 ID.AddInteger(SVN->getMaskElt(i));
556 case ISD::TargetBlockAddress:
557 case ISD::BlockAddress: {
558 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
559 ID.AddPointer(BA->getBlockAddress());
560 ID.AddInteger(BA->getOffset());
561 ID.AddInteger(BA->getTargetFlags());
564 } // end switch (N->getOpcode())
566 // Target specific memory nodes could also have address spaces to check.
567 if (N->isTargetMemoryOpcode())
568 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
571 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
573 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
574 AddNodeIDOpcode(ID, N->getOpcode());
575 // Add the return value info.
576 AddNodeIDValueTypes(ID, N->getVTList());
577 // Add the operand info.
578 AddNodeIDOperands(ID, N->ops());
580 // Handle SDNode leafs with special info.
581 AddNodeIDCustom(ID, N);
584 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
585 /// the CSE map that carries volatility, temporalness, indexing mode, and
586 /// extension/truncation information.
588 static inline unsigned
589 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
590 bool isNonTemporal, bool isInvariant) {
591 assert((ConvType & 3) == ConvType &&
592 "ConvType may not require more than 2 bits!");
593 assert((AM & 7) == AM &&
594 "AM may not require more than 3 bits!");
598 (isNonTemporal << 6) |
602 //===----------------------------------------------------------------------===//
603 // SelectionDAG Class
604 //===----------------------------------------------------------------------===//
606 /// doNotCSE - Return true if CSE should not be performed for this node.
607 static bool doNotCSE(SDNode *N) {
608 if (N->getValueType(0) == MVT::Glue)
609 return true; // Never CSE anything that produces a flag.
611 switch (N->getOpcode()) {
613 case ISD::HANDLENODE:
615 return true; // Never CSE these nodes.
618 // Check that remaining values produced are not flags.
619 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
620 if (N->getValueType(i) == MVT::Glue)
621 return true; // Never CSE anything that produces a flag.
626 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
628 void SelectionDAG::RemoveDeadNodes() {
629 // Create a dummy node (which is not added to allnodes), that adds a reference
630 // to the root node, preventing it from being deleted.
631 HandleSDNode Dummy(getRoot());
633 SmallVector<SDNode*, 128> DeadNodes;
635 // Add all obviously-dead nodes to the DeadNodes worklist.
636 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
638 DeadNodes.push_back(I);
640 RemoveDeadNodes(DeadNodes);
642 // If the root changed (e.g. it was a dead load, update the root).
643 setRoot(Dummy.getValue());
646 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
647 /// given list, and any nodes that become unreachable as a result.
648 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
650 // Process the worklist, deleting the nodes and adding their uses to the
652 while (!DeadNodes.empty()) {
653 SDNode *N = DeadNodes.pop_back_val();
655 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
656 DUL->NodeDeleted(N, nullptr);
658 // Take the node out of the appropriate CSE map.
659 RemoveNodeFromCSEMaps(N);
661 // Next, brutally remove the operand list. This is safe to do, as there are
662 // no cycles in the graph.
663 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
665 SDNode *Operand = Use.getNode();
668 // Now that we removed this operand, see if there are no uses of it left.
669 if (Operand->use_empty())
670 DeadNodes.push_back(Operand);
677 void SelectionDAG::RemoveDeadNode(SDNode *N){
678 SmallVector<SDNode*, 16> DeadNodes(1, N);
680 // Create a dummy node that adds a reference to the root node, preventing
681 // it from being deleted. (This matters if the root is an operand of the
683 HandleSDNode Dummy(getRoot());
685 RemoveDeadNodes(DeadNodes);
688 void SelectionDAG::DeleteNode(SDNode *N) {
689 // First take this out of the appropriate CSE map.
690 RemoveNodeFromCSEMaps(N);
692 // Finally, remove uses due to operands of this node, remove from the
693 // AllNodes list, and delete the node.
694 DeleteNodeNotInCSEMaps(N);
697 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
698 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
699 assert(N->use_empty() && "Cannot delete a node that is not dead!");
701 // Drop all of the operands and decrement used node's use counts.
707 void SDDbgInfo::erase(const SDNode *Node) {
708 DbgValMapType::iterator I = DbgValMap.find(Node);
709 if (I == DbgValMap.end())
711 for (auto &Val: I->second)
712 Val->setIsInvalidated();
716 void SelectionDAG::DeallocateNode(SDNode *N) {
717 if (N->OperandsNeedDelete)
718 delete[] N->OperandList;
720 // Set the opcode to DELETED_NODE to help catch bugs when node
721 // memory is reallocated.
722 N->NodeType = ISD::DELETED_NODE;
724 NodeAllocator.Deallocate(AllNodes.remove(N));
726 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
727 // them and forget about that node.
732 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
733 static void VerifySDNode(SDNode *N) {
734 switch (N->getOpcode()) {
737 case ISD::BUILD_PAIR: {
738 EVT VT = N->getValueType(0);
739 assert(N->getNumValues() == 1 && "Too many results!");
740 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
741 "Wrong return type!");
742 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
743 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
744 "Mismatched operand types!");
745 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
746 "Wrong operand type!");
747 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
748 "Wrong return type size");
751 case ISD::BUILD_VECTOR: {
752 assert(N->getNumValues() == 1 && "Too many results!");
753 assert(N->getValueType(0).isVector() && "Wrong return type!");
754 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
755 "Wrong number of operands!");
756 EVT EltVT = N->getValueType(0).getVectorElementType();
757 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
758 assert((I->getValueType() == EltVT ||
759 (EltVT.isInteger() && I->getValueType().isInteger() &&
760 EltVT.bitsLE(I->getValueType()))) &&
761 "Wrong operand type!");
762 assert(I->getValueType() == N->getOperand(0).getValueType() &&
763 "Operands must all have the same type");
771 /// \brief Insert a newly allocated node into the DAG.
773 /// Handles insertion into the all nodes list and CSE map, as well as
774 /// verification and other common operations when a new node is allocated.
775 void SelectionDAG::InsertNode(SDNode *N) {
776 AllNodes.push_back(N);
782 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
783 /// correspond to it. This is useful when we're about to delete or repurpose
784 /// the node. We don't want future request for structurally identical nodes
785 /// to return N anymore.
786 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
788 switch (N->getOpcode()) {
789 case ISD::HANDLENODE: return false; // noop.
791 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
792 "Cond code doesn't exist!");
793 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
794 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
796 case ISD::ExternalSymbol:
797 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
799 case ISD::TargetExternalSymbol: {
800 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
801 Erased = TargetExternalSymbols.erase(
802 std::pair<std::string,unsigned char>(ESN->getSymbol(),
803 ESN->getTargetFlags()));
806 case ISD::VALUETYPE: {
807 EVT VT = cast<VTSDNode>(N)->getVT();
808 if (VT.isExtended()) {
809 Erased = ExtendedValueTypeNodes.erase(VT);
811 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
812 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
817 // Remove it from the CSE Map.
818 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
819 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
820 Erased = CSEMap.RemoveNode(N);
824 // Verify that the node was actually in one of the CSE maps, unless it has a
825 // flag result (which cannot be CSE'd) or is one of the special cases that are
826 // not subject to CSE.
827 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
828 !N->isMachineOpcode() && !doNotCSE(N)) {
831 llvm_unreachable("Node is not in map!");
837 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
838 /// maps and modified in place. Add it back to the CSE maps, unless an identical
839 /// node already exists, in which case transfer all its users to the existing
840 /// node. This transfer can potentially trigger recursive merging.
843 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
844 // For node types that aren't CSE'd, just act as if no identical node
847 SDNode *Existing = CSEMap.GetOrInsertNode(N);
849 // If there was already an existing matching node, use ReplaceAllUsesWith
850 // to replace the dead one with the existing one. This can cause
851 // recursive merging of other unrelated nodes down the line.
852 ReplaceAllUsesWith(N, Existing);
854 // N is now dead. Inform the listeners and delete it.
855 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
856 DUL->NodeDeleted(N, Existing);
857 DeleteNodeNotInCSEMaps(N);
862 // If the node doesn't already exist, we updated it. Inform listeners.
863 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
867 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
868 /// were replaced with those specified. If this node is never memoized,
869 /// return null, otherwise return a pointer to the slot it would take. If a
870 /// node already exists with these operands, the slot will be non-null.
871 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
876 SDValue Ops[] = { Op };
878 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
879 AddNodeIDCustom(ID, N);
880 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
884 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
885 /// were replaced with those specified. If this node is never memoized,
886 /// return null, otherwise return a pointer to the slot it would take. If a
887 /// node already exists with these operands, the slot will be non-null.
888 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
889 SDValue Op1, SDValue Op2,
894 SDValue Ops[] = { Op1, Op2 };
896 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
897 AddNodeIDCustom(ID, N);
898 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
903 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
904 /// were replaced with those specified. If this node is never memoized,
905 /// return null, otherwise return a pointer to the slot it would take. If a
906 /// node already exists with these operands, the slot will be non-null.
907 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
913 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
914 AddNodeIDCustom(ID, N);
915 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
919 /// getEVTAlignment - Compute the default alignment value for the
922 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
923 Type *Ty = VT == MVT::iPTR ?
924 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
925 VT.getTypeForEVT(*getContext());
927 return TLI->getDataLayout()->getABITypeAlignment(Ty);
930 // EntryNode could meaningfully have debug info if we can find it...
931 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
932 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
933 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
934 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
935 UpdateListeners(nullptr) {
936 AllNodes.push_back(&EntryNode);
937 DbgInfo = new SDDbgInfo();
940 void SelectionDAG::init(MachineFunction &mf) {
942 TLI = getSubtarget().getTargetLowering();
943 TSI = getSubtarget().getSelectionDAGInfo();
944 Context = &mf.getFunction()->getContext();
947 SelectionDAG::~SelectionDAG() {
948 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
953 void SelectionDAG::allnodes_clear() {
954 assert(&*AllNodes.begin() == &EntryNode);
955 AllNodes.remove(AllNodes.begin());
956 while (!AllNodes.empty())
957 DeallocateNode(AllNodes.begin());
960 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
961 SDVTList VTs, SDValue N1,
962 SDValue N2, bool nuw, bool nsw,
964 if (isBinOpWithFlags(Opcode)) {
965 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
966 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
967 FN->Flags.setNoUnsignedWrap(nuw);
968 FN->Flags.setNoSignedWrap(nsw);
969 FN->Flags.setExact(exact);
974 BinarySDNode *N = new (NodeAllocator)
975 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
979 void SelectionDAG::clear() {
981 OperandAllocator.Reset();
984 ExtendedValueTypeNodes.clear();
985 ExternalSymbols.clear();
986 TargetExternalSymbols.clear();
987 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
988 static_cast<CondCodeSDNode*>(nullptr));
989 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
990 static_cast<SDNode*>(nullptr));
992 EntryNode.UseList = nullptr;
993 AllNodes.push_back(&EntryNode);
994 Root = getEntryNode();
998 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
999 return VT.bitsGT(Op.getValueType()) ?
1000 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1001 getNode(ISD::TRUNCATE, DL, VT, Op);
1004 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1005 return VT.bitsGT(Op.getValueType()) ?
1006 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1007 getNode(ISD::TRUNCATE, DL, VT, Op);
1010 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1011 return VT.bitsGT(Op.getValueType()) ?
1012 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1013 getNode(ISD::TRUNCATE, DL, VT, Op);
1016 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1018 if (VT.bitsLE(Op.getValueType()))
1019 return getNode(ISD::TRUNCATE, SL, VT, Op);
1021 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1022 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1025 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1026 assert(!VT.isVector() &&
1027 "getZeroExtendInReg should use the vector element type instead of "
1028 "the vector type!");
1029 if (Op.getValueType() == VT) return Op;
1030 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1031 APInt Imm = APInt::getLowBitsSet(BitWidth,
1032 VT.getSizeInBits());
1033 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1034 getConstant(Imm, DL, Op.getValueType()));
1037 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1038 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1039 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1040 "The sizes of the input and result must match in order to perform the "
1041 "extend in-register.");
1042 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1043 "The destination vector type must have fewer lanes than the input.");
1044 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1047 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1048 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1049 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1050 "The sizes of the input and result must match in order to perform the "
1051 "extend in-register.");
1052 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1053 "The destination vector type must have fewer lanes than the input.");
1054 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1057 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1058 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1059 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1060 "The sizes of the input and result must match in order to perform the "
1061 "extend in-register.");
1062 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1063 "The destination vector type must have fewer lanes than the input.");
1064 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1067 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1069 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1070 EVT EltVT = VT.getScalarType();
1072 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1073 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1076 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1077 EVT EltVT = VT.getScalarType();
1079 switch (TLI->getBooleanContents(VT)) {
1080 case TargetLowering::ZeroOrOneBooleanContent:
1081 case TargetLowering::UndefinedBooleanContent:
1082 TrueValue = getConstant(1, DL, VT);
1084 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1085 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL,
1089 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1092 SDValue SelectionDAG::getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isT,
1094 EVT EltVT = VT.getScalarType();
1095 assert((EltVT.getSizeInBits() >= 64 ||
1096 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1097 "getConstant with a uint64_t value that doesn't fit in the type!");
1098 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1101 SDValue SelectionDAG::getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isT,
1104 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1107 SDValue SelectionDAG::getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
1108 bool isT, bool isO) {
1109 assert(VT.isInteger() && "Cannot create FP integer constant!");
1111 EVT EltVT = VT.getScalarType();
1112 const ConstantInt *Elt = &Val;
1114 // In some cases the vector type is legal but the element type is illegal and
1115 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1116 // inserted value (the type does not need to match the vector element type).
1117 // Any extra bits introduced will be truncated away.
1118 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1119 TargetLowering::TypePromoteInteger) {
1120 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1121 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1122 Elt = ConstantInt::get(*getContext(), NewVal);
1124 // In other cases the element type is illegal and needs to be expanded, for
1125 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1126 // the value into n parts and use a vector type with n-times the elements.
1127 // Then bitcast to the type requested.
1128 // Legalizing constants too early makes the DAGCombiner's job harder so we
1129 // only legalize if the DAG tells us we must produce legal types.
1130 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1131 TLI->getTypeAction(*getContext(), EltVT) ==
1132 TargetLowering::TypeExpandInteger) {
1133 APInt NewVal = Elt->getValue();
1134 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1135 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1136 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1137 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1139 // Check the temporary vector is the correct size. If this fails then
1140 // getTypeToTransformTo() probably returned a type whose size (in bits)
1141 // isn't a power-of-2 factor of the requested type size.
1142 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1144 SmallVector<SDValue, 2> EltParts;
1145 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1146 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1147 .trunc(ViaEltSizeInBits), DL,
1148 ViaEltVT, isT, isO));
1151 // EltParts is currently in little endian order. If we actually want
1152 // big-endian order then reverse it now.
1153 if (TLI->isBigEndian())
1154 std::reverse(EltParts.begin(), EltParts.end());
1156 // The elements must be reversed when the element order is different
1157 // to the endianness of the elements (because the BITCAST is itself a
1158 // vector shuffle in this situation). However, we do not need any code to
1159 // perform this reversal because getConstant() is producing a vector
1161 // This situation occurs in MIPS MSA.
1163 SmallVector<SDValue, 8> Ops;
1164 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1165 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1167 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1168 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1173 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1174 "APInt size does not match type size!");
1175 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1176 FoldingSetNodeID ID;
1177 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1181 SDNode *N = nullptr;
1182 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1184 return SDValue(N, 0);
1187 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, DL.getDebugLoc(),
1189 CSEMap.InsertNode(N, IP);
1193 SDValue Result(N, 0);
1194 if (VT.isVector()) {
1195 SmallVector<SDValue, 8> Ops;
1196 Ops.assign(VT.getVectorNumElements(), Result);
1197 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1202 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1203 return getConstant(Val, DL, TLI->getPointerTy(), isTarget);
1206 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
1208 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1211 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, SDLoc DL, EVT VT,
1213 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1215 EVT EltVT = VT.getScalarType();
1217 // Do the map lookup using the actual bit pattern for the floating point
1218 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1219 // we don't have issues with SNANs.
1220 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1221 FoldingSetNodeID ID;
1222 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1225 SDNode *N = nullptr;
1226 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1228 return SDValue(N, 0);
1231 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1232 CSEMap.InsertNode(N, IP);
1236 SDValue Result(N, 0);
1237 if (VT.isVector()) {
1238 SmallVector<SDValue, 8> Ops;
1239 Ops.assign(VT.getVectorNumElements(), Result);
1240 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1245 SDValue SelectionDAG::getConstantFP(double Val, SDLoc DL, EVT VT,
1247 EVT EltVT = VT.getScalarType();
1248 if (EltVT==MVT::f32)
1249 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1250 else if (EltVT==MVT::f64)
1251 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1252 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1255 APFloat apf = APFloat(Val);
1256 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1258 return getConstantFP(apf, DL, VT, isTarget);
1260 llvm_unreachable("Unsupported type in getConstantFP");
1263 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1264 EVT VT, int64_t Offset,
1266 unsigned char TargetFlags) {
1267 assert((TargetFlags == 0 || isTargetGA) &&
1268 "Cannot set target flags on target-independent globals");
1270 // Truncate (with sign-extension) the offset value to the pointer size.
1271 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1273 Offset = SignExtend64(Offset, BitWidth);
1276 if (GV->isThreadLocal())
1277 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1279 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1281 FoldingSetNodeID ID;
1282 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1284 ID.AddInteger(Offset);
1285 ID.AddInteger(TargetFlags);
1286 ID.AddInteger(GV->getType()->getAddressSpace());
1288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1289 return SDValue(E, 0);
1291 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1292 DL.getDebugLoc(), GV, VT,
1293 Offset, TargetFlags);
1294 CSEMap.InsertNode(N, IP);
1296 return SDValue(N, 0);
1299 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1300 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1301 FoldingSetNodeID ID;
1302 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1306 return SDValue(E, 0);
1308 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1309 CSEMap.InsertNode(N, IP);
1311 return SDValue(N, 0);
1314 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1315 unsigned char TargetFlags) {
1316 assert((TargetFlags == 0 || isTarget) &&
1317 "Cannot set target flags on target-independent jump tables");
1318 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1319 FoldingSetNodeID ID;
1320 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1322 ID.AddInteger(TargetFlags);
1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1325 return SDValue(E, 0);
1327 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1329 CSEMap.InsertNode(N, IP);
1331 return SDValue(N, 0);
1334 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1335 unsigned Alignment, int Offset,
1337 unsigned char TargetFlags) {
1338 assert((TargetFlags == 0 || isTarget) &&
1339 "Cannot set target flags on target-independent globals");
1341 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1342 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1343 FoldingSetNodeID ID;
1344 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1345 ID.AddInteger(Alignment);
1346 ID.AddInteger(Offset);
1348 ID.AddInteger(TargetFlags);
1350 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1351 return SDValue(E, 0);
1353 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1354 Alignment, TargetFlags);
1355 CSEMap.InsertNode(N, IP);
1357 return SDValue(N, 0);
1361 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1362 unsigned Alignment, int Offset,
1364 unsigned char TargetFlags) {
1365 assert((TargetFlags == 0 || isTarget) &&
1366 "Cannot set target flags on target-independent globals");
1368 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1369 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1370 FoldingSetNodeID ID;
1371 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1372 ID.AddInteger(Alignment);
1373 ID.AddInteger(Offset);
1374 C->addSelectionDAGCSEId(ID);
1375 ID.AddInteger(TargetFlags);
1377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1378 return SDValue(E, 0);
1380 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1381 Alignment, TargetFlags);
1382 CSEMap.InsertNode(N, IP);
1384 return SDValue(N, 0);
1387 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1388 unsigned char TargetFlags) {
1389 FoldingSetNodeID ID;
1390 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1391 ID.AddInteger(Index);
1392 ID.AddInteger(Offset);
1393 ID.AddInteger(TargetFlags);
1395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1396 return SDValue(E, 0);
1398 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1400 CSEMap.InsertNode(N, IP);
1402 return SDValue(N, 0);
1405 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1406 FoldingSetNodeID ID;
1407 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1411 return SDValue(E, 0);
1413 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1414 CSEMap.InsertNode(N, IP);
1416 return SDValue(N, 0);
1419 SDValue SelectionDAG::getValueType(EVT VT) {
1420 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1421 ValueTypeNodes.size())
1422 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1424 SDNode *&N = VT.isExtended() ?
1425 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1427 if (N) return SDValue(N, 0);
1428 N = new (NodeAllocator) VTSDNode(VT);
1430 return SDValue(N, 0);
1433 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1434 SDNode *&N = ExternalSymbols[Sym];
1435 if (N) return SDValue(N, 0);
1436 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1438 return SDValue(N, 0);
1441 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1442 unsigned char TargetFlags) {
1444 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1446 if (N) return SDValue(N, 0);
1447 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1449 return SDValue(N, 0);
1452 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1453 if ((unsigned)Cond >= CondCodeNodes.size())
1454 CondCodeNodes.resize(Cond+1);
1456 if (!CondCodeNodes[Cond]) {
1457 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1458 CondCodeNodes[Cond] = N;
1462 return SDValue(CondCodeNodes[Cond], 0);
1465 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1466 // the shuffle mask M that point at N1 to point at N2, and indices that point
1467 // N2 to point at N1.
1468 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1470 ShuffleVectorSDNode::commuteMask(M);
1473 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1474 SDValue N2, const int *Mask) {
1475 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1476 "Invalid VECTOR_SHUFFLE");
1478 // Canonicalize shuffle undef, undef -> undef
1479 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1480 return getUNDEF(VT);
1482 // Validate that all indices in Mask are within the range of the elements
1483 // input to the shuffle.
1484 unsigned NElts = VT.getVectorNumElements();
1485 SmallVector<int, 8> MaskVec;
1486 for (unsigned i = 0; i != NElts; ++i) {
1487 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1488 MaskVec.push_back(Mask[i]);
1491 // Canonicalize shuffle v, v -> v, undef
1494 for (unsigned i = 0; i != NElts; ++i)
1495 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1498 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1499 if (N1.getOpcode() == ISD::UNDEF)
1500 commuteShuffle(N1, N2, MaskVec);
1502 // If shuffling a splat, try to blend the splat instead. We do this here so
1503 // that even when this arises during lowering we don't have to re-handle it.
1504 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1505 BitVector UndefElements;
1506 SDValue Splat = BV->getSplatValue(&UndefElements);
1510 for (int i = 0; i < (int)NElts; ++i) {
1511 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1514 // If this input comes from undef, mark it as such.
1515 if (UndefElements[MaskVec[i] - Offset]) {
1520 // If we can blend a non-undef lane, use that instead.
1521 if (!UndefElements[i])
1522 MaskVec[i] = i + Offset;
1525 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1526 BlendSplat(N1BV, 0);
1527 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1528 BlendSplat(N2BV, NElts);
1530 // Canonicalize all index into lhs, -> shuffle lhs, undef
1531 // Canonicalize all index into rhs, -> shuffle rhs, undef
1532 bool AllLHS = true, AllRHS = true;
1533 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1534 for (unsigned i = 0; i != NElts; ++i) {
1535 if (MaskVec[i] >= (int)NElts) {
1540 } else if (MaskVec[i] >= 0) {
1544 if (AllLHS && AllRHS)
1545 return getUNDEF(VT);
1546 if (AllLHS && !N2Undef)
1550 commuteShuffle(N1, N2, MaskVec);
1552 // Reset our undef status after accounting for the mask.
1553 N2Undef = N2.getOpcode() == ISD::UNDEF;
1554 // Re-check whether both sides ended up undef.
1555 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1556 return getUNDEF(VT);
1558 // If Identity shuffle return that node.
1559 bool Identity = true, AllSame = true;
1560 for (unsigned i = 0; i != NElts; ++i) {
1561 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1562 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1564 if (Identity && NElts)
1567 // Shuffling a constant splat doesn't change the result.
1571 // Look through any bitcasts. We check that these don't change the number
1572 // (and size) of elements and just changes their types.
1573 while (V.getOpcode() == ISD::BITCAST)
1574 V = V->getOperand(0);
1576 // A splat should always show up as a build vector node.
1577 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1578 BitVector UndefElements;
1579 SDValue Splat = BV->getSplatValue(&UndefElements);
1580 // If this is a splat of an undef, shuffling it is also undef.
1581 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1582 return getUNDEF(VT);
1585 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1587 // We only have a splat which can skip shuffles if there is a splatted
1588 // value and no undef lanes rearranged by the shuffle.
1589 if (Splat && UndefElements.none()) {
1590 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1591 // number of elements match or the value splatted is a zero constant.
1594 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1595 if (C->isNullValue())
1599 // If the shuffle itself creates a splat, build the vector directly.
1600 if (AllSame && SameNumElts) {
1601 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1602 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1604 EVT BuildVT = BV->getValueType(0);
1605 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1607 // We may have jumped through bitcasts, so the type of the
1608 // BUILD_VECTOR may not match the type of the shuffle.
1610 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1616 FoldingSetNodeID ID;
1617 SDValue Ops[2] = { N1, N2 };
1618 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1619 for (unsigned i = 0; i != NElts; ++i)
1620 ID.AddInteger(MaskVec[i]);
1623 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1624 return SDValue(E, 0);
1626 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1627 // SDNode doesn't have access to it. This memory will be "leaked" when
1628 // the node is deallocated, but recovered when the NodeAllocator is released.
1629 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1630 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1632 ShuffleVectorSDNode *N =
1633 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1634 dl.getDebugLoc(), N1, N2,
1636 CSEMap.InsertNode(N, IP);
1638 return SDValue(N, 0);
1641 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1642 MVT VT = SV.getSimpleValueType(0);
1643 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1644 ShuffleVectorSDNode::commuteMask(MaskVec);
1646 SDValue Op0 = SV.getOperand(0);
1647 SDValue Op1 = SV.getOperand(1);
1648 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1651 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1652 SDValue Val, SDValue DTy,
1653 SDValue STy, SDValue Rnd, SDValue Sat,
1654 ISD::CvtCode Code) {
1655 // If the src and dest types are the same and the conversion is between
1656 // integer types of the same sign or two floats, no conversion is necessary.
1658 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1661 FoldingSetNodeID ID;
1662 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1663 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1665 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1666 return SDValue(E, 0);
1668 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1671 CSEMap.InsertNode(N, IP);
1673 return SDValue(N, 0);
1676 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1677 FoldingSetNodeID ID;
1678 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1679 ID.AddInteger(RegNo);
1681 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1682 return SDValue(E, 0);
1684 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1685 CSEMap.InsertNode(N, IP);
1687 return SDValue(N, 0);
1690 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1691 FoldingSetNodeID ID;
1692 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1693 ID.AddPointer(RegMask);
1695 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1696 return SDValue(E, 0);
1698 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1699 CSEMap.InsertNode(N, IP);
1701 return SDValue(N, 0);
1704 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1705 FoldingSetNodeID ID;
1706 SDValue Ops[] = { Root };
1707 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1708 ID.AddPointer(Label);
1710 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1711 return SDValue(E, 0);
1713 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1714 dl.getDebugLoc(), Root, Label);
1715 CSEMap.InsertNode(N, IP);
1717 return SDValue(N, 0);
1721 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1724 unsigned char TargetFlags) {
1725 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1727 FoldingSetNodeID ID;
1728 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1730 ID.AddInteger(Offset);
1731 ID.AddInteger(TargetFlags);
1733 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1734 return SDValue(E, 0);
1736 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1738 CSEMap.InsertNode(N, IP);
1740 return SDValue(N, 0);
1743 SDValue SelectionDAG::getSrcValue(const Value *V) {
1744 assert((!V || V->getType()->isPointerTy()) &&
1745 "SrcValue is not a pointer?");
1747 FoldingSetNodeID ID;
1748 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1752 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1753 return SDValue(E, 0);
1755 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1756 CSEMap.InsertNode(N, IP);
1758 return SDValue(N, 0);
1761 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1762 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1763 FoldingSetNodeID ID;
1764 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1768 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1769 return SDValue(E, 0);
1771 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1772 CSEMap.InsertNode(N, IP);
1774 return SDValue(N, 0);
1777 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1778 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1779 unsigned SrcAS, unsigned DestAS) {
1780 SDValue Ops[] = {Ptr};
1781 FoldingSetNodeID ID;
1782 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1783 ID.AddInteger(SrcAS);
1784 ID.AddInteger(DestAS);
1787 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1788 return SDValue(E, 0);
1790 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1792 VT, Ptr, SrcAS, DestAS);
1793 CSEMap.InsertNode(N, IP);
1795 return SDValue(N, 0);
1798 /// getShiftAmountOperand - Return the specified value casted to
1799 /// the target's desired shift amount type.
1800 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1801 EVT OpTy = Op.getValueType();
1802 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1803 if (OpTy == ShTy || OpTy.isVector()) return Op;
1805 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1806 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1809 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1810 /// specified value type.
1811 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1812 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1813 unsigned ByteSize = VT.getStoreSize();
1814 Type *Ty = VT.getTypeForEVT(*getContext());
1815 unsigned StackAlign =
1816 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1818 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1819 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1822 /// CreateStackTemporary - Create a stack temporary suitable for holding
1823 /// either of the specified value types.
1824 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1825 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1826 VT2.getStoreSizeInBits())/8;
1827 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1828 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1829 const DataLayout *TD = TLI->getDataLayout();
1830 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1831 TD->getPrefTypeAlignment(Ty2));
1833 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1834 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1835 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1838 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1839 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1840 // These setcc operations always fold.
1844 case ISD::SETFALSE2: return getConstant(0, dl, VT);
1846 case ISD::SETTRUE2: {
1847 TargetLowering::BooleanContent Cnt =
1848 TLI->getBooleanContents(N1->getValueType(0));
1850 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, dl,
1864 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1868 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1869 const APInt &C2 = N2C->getAPIntValue();
1870 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1871 const APInt &C1 = N1C->getAPIntValue();
1874 default: llvm_unreachable("Unknown integer setcc!");
1875 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1876 case ISD::SETNE: return getConstant(C1 != C2, dl, VT);
1877 case ISD::SETULT: return getConstant(C1.ult(C2), dl, VT);
1878 case ISD::SETUGT: return getConstant(C1.ugt(C2), dl, VT);
1879 case ISD::SETULE: return getConstant(C1.ule(C2), dl, VT);
1880 case ISD::SETUGE: return getConstant(C1.uge(C2), dl, VT);
1881 case ISD::SETLT: return getConstant(C1.slt(C2), dl, VT);
1882 case ISD::SETGT: return getConstant(C1.sgt(C2), dl, VT);
1883 case ISD::SETLE: return getConstant(C1.sle(C2), dl, VT);
1884 case ISD::SETGE: return getConstant(C1.sge(C2), dl, VT);
1888 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1889 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1890 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1893 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1894 return getUNDEF(VT);
1896 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, dl, VT);
1897 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1898 return getUNDEF(VT);
1900 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1901 R==APFloat::cmpLessThan, dl, VT);
1902 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1903 return getUNDEF(VT);
1905 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, dl, VT);
1906 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1907 return getUNDEF(VT);
1909 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT);
1910 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1911 return getUNDEF(VT);
1913 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1914 R==APFloat::cmpEqual, dl, VT);
1915 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1916 return getUNDEF(VT);
1918 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1919 R==APFloat::cmpEqual, dl, VT);
1920 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
1921 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, dl, VT);
1922 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1923 R==APFloat::cmpEqual, dl, VT);
1924 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, dl, VT);
1925 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1926 R==APFloat::cmpLessThan, dl, VT);
1927 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1928 R==APFloat::cmpUnordered, dl, VT);
1929 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, dl, VT);
1930 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, dl, VT);
1933 // Ensure that the constant occurs on the RHS.
1934 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1935 MVT CompVT = N1.getValueType().getSimpleVT();
1936 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1939 return getSetCC(dl, VT, N2, N1, SwappedCond);
1943 // Could not fold it.
1947 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1948 /// use this predicate to simplify operations downstream.
1949 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1950 // This predicate is not safe for vector operations.
1951 if (Op.getValueType().isVector())
1954 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1955 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1958 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1959 /// this predicate to simplify operations downstream. Mask is known to be zero
1960 /// for bits that V cannot have.
1961 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1962 unsigned Depth) const {
1963 APInt KnownZero, KnownOne;
1964 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1965 return (KnownZero & Mask) == Mask;
1968 /// Determine which bits of Op are known to be either zero or one and return
1969 /// them in the KnownZero/KnownOne bitsets.
1970 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1971 APInt &KnownOne, unsigned Depth) const {
1972 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1974 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1976 return; // Limit search depth.
1978 APInt KnownZero2, KnownOne2;
1980 switch (Op.getOpcode()) {
1982 // We know all of the bits for a constant!
1983 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1984 KnownZero = ~KnownOne;
1987 // If either the LHS or the RHS are Zero, the result is zero.
1988 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1989 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1991 // Output known-1 bits are only known if set in both the LHS & RHS.
1992 KnownOne &= KnownOne2;
1993 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1994 KnownZero |= KnownZero2;
1997 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1998 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2000 // Output known-0 bits are only known if clear in both the LHS & RHS.
2001 KnownZero &= KnownZero2;
2002 // Output known-1 are known to be set if set in either the LHS | RHS.
2003 KnownOne |= KnownOne2;
2006 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2007 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2009 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2010 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2011 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2012 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2013 KnownZero = KnownZeroOut;
2017 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2018 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2020 // If low bits are zero in either operand, output low known-0 bits.
2021 // Also compute a conserative estimate for high known-0 bits.
2022 // More trickiness is possible, but this is sufficient for the
2023 // interesting case of alignment computation.
2024 KnownOne.clearAllBits();
2025 unsigned TrailZ = KnownZero.countTrailingOnes() +
2026 KnownZero2.countTrailingOnes();
2027 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2028 KnownZero2.countLeadingOnes(),
2029 BitWidth) - BitWidth;
2031 TrailZ = std::min(TrailZ, BitWidth);
2032 LeadZ = std::min(LeadZ, BitWidth);
2033 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2034 APInt::getHighBitsSet(BitWidth, LeadZ);
2038 // For the purposes of computing leading zeros we can conservatively
2039 // treat a udiv as a logical right shift by the power of 2 known to
2040 // be less than the denominator.
2041 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2042 unsigned LeadZ = KnownZero2.countLeadingOnes();
2044 KnownOne2.clearAllBits();
2045 KnownZero2.clearAllBits();
2046 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2047 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2048 if (RHSUnknownLeadingOnes != BitWidth)
2049 LeadZ = std::min(BitWidth,
2050 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2052 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2056 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2057 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2059 // Only known if known in both the LHS and RHS.
2060 KnownOne &= KnownOne2;
2061 KnownZero &= KnownZero2;
2063 case ISD::SELECT_CC:
2064 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2065 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2067 // Only known if known in both the LHS and RHS.
2068 KnownOne &= KnownOne2;
2069 KnownZero &= KnownZero2;
2077 if (Op.getResNo() != 1)
2079 // The boolean result conforms to getBooleanContents.
2080 // If we know the result of a setcc has the top bits zero, use this info.
2081 // We know that we have an integer-based boolean since these operations
2082 // are only available for integer.
2083 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2084 TargetLowering::ZeroOrOneBooleanContent &&
2086 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2089 // If we know the result of a setcc has the top bits zero, use this info.
2090 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2091 TargetLowering::ZeroOrOneBooleanContent &&
2093 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2096 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2097 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2098 unsigned ShAmt = SA->getZExtValue();
2100 // If the shift count is an invalid immediate, don't do anything.
2101 if (ShAmt >= BitWidth)
2104 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2105 KnownZero <<= ShAmt;
2107 // low bits known zero.
2108 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2112 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2113 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2114 unsigned ShAmt = SA->getZExtValue();
2116 // If the shift count is an invalid immediate, don't do anything.
2117 if (ShAmt >= BitWidth)
2120 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2121 KnownZero = KnownZero.lshr(ShAmt);
2122 KnownOne = KnownOne.lshr(ShAmt);
2124 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2125 KnownZero |= HighBits; // High bits known zero.
2129 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2130 unsigned ShAmt = SA->getZExtValue();
2132 // If the shift count is an invalid immediate, don't do anything.
2133 if (ShAmt >= BitWidth)
2136 // If any of the demanded bits are produced by the sign extension, we also
2137 // demand the input sign bit.
2138 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2140 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2141 KnownZero = KnownZero.lshr(ShAmt);
2142 KnownOne = KnownOne.lshr(ShAmt);
2144 // Handle the sign bits.
2145 APInt SignBit = APInt::getSignBit(BitWidth);
2146 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2148 if (KnownZero.intersects(SignBit)) {
2149 KnownZero |= HighBits; // New bits are known zero.
2150 } else if (KnownOne.intersects(SignBit)) {
2151 KnownOne |= HighBits; // New bits are known one.
2155 case ISD::SIGN_EXTEND_INREG: {
2156 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2157 unsigned EBits = EVT.getScalarType().getSizeInBits();
2159 // Sign extension. Compute the demanded bits in the result that are not
2160 // present in the input.
2161 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2163 APInt InSignBit = APInt::getSignBit(EBits);
2164 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2166 // If the sign extended bits are demanded, we know that the sign
2168 InSignBit = InSignBit.zext(BitWidth);
2169 if (NewBits.getBoolValue())
2170 InputDemandedBits |= InSignBit;
2172 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2173 KnownOne &= InputDemandedBits;
2174 KnownZero &= InputDemandedBits;
2176 // If the sign bit of the input is known set or clear, then we know the
2177 // top bits of the result.
2178 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2179 KnownZero |= NewBits;
2180 KnownOne &= ~NewBits;
2181 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2182 KnownOne |= NewBits;
2183 KnownZero &= ~NewBits;
2184 } else { // Input sign bit unknown
2185 KnownZero &= ~NewBits;
2186 KnownOne &= ~NewBits;
2191 case ISD::CTTZ_ZERO_UNDEF:
2193 case ISD::CTLZ_ZERO_UNDEF:
2195 unsigned LowBits = Log2_32(BitWidth)+1;
2196 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2197 KnownOne.clearAllBits();
2201 LoadSDNode *LD = cast<LoadSDNode>(Op);
2202 // If this is a ZEXTLoad and we are looking at the loaded value.
2203 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2204 EVT VT = LD->getMemoryVT();
2205 unsigned MemBits = VT.getScalarType().getSizeInBits();
2206 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2207 } else if (const MDNode *Ranges = LD->getRanges()) {
2208 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2212 case ISD::ZERO_EXTEND: {
2213 EVT InVT = Op.getOperand(0).getValueType();
2214 unsigned InBits = InVT.getScalarType().getSizeInBits();
2215 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2216 KnownZero = KnownZero.trunc(InBits);
2217 KnownOne = KnownOne.trunc(InBits);
2218 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2219 KnownZero = KnownZero.zext(BitWidth);
2220 KnownOne = KnownOne.zext(BitWidth);
2221 KnownZero |= NewBits;
2224 case ISD::SIGN_EXTEND: {
2225 EVT InVT = Op.getOperand(0).getValueType();
2226 unsigned InBits = InVT.getScalarType().getSizeInBits();
2227 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2229 KnownZero = KnownZero.trunc(InBits);
2230 KnownOne = KnownOne.trunc(InBits);
2231 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2233 // Note if the sign bit is known to be zero or one.
2234 bool SignBitKnownZero = KnownZero.isNegative();
2235 bool SignBitKnownOne = KnownOne.isNegative();
2237 KnownZero = KnownZero.zext(BitWidth);
2238 KnownOne = KnownOne.zext(BitWidth);
2240 // If the sign bit is known zero or one, the top bits match.
2241 if (SignBitKnownZero)
2242 KnownZero |= NewBits;
2243 else if (SignBitKnownOne)
2244 KnownOne |= NewBits;
2247 case ISD::ANY_EXTEND: {
2248 EVT InVT = Op.getOperand(0).getValueType();
2249 unsigned InBits = InVT.getScalarType().getSizeInBits();
2250 KnownZero = KnownZero.trunc(InBits);
2251 KnownOne = KnownOne.trunc(InBits);
2252 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2253 KnownZero = KnownZero.zext(BitWidth);
2254 KnownOne = KnownOne.zext(BitWidth);
2257 case ISD::TRUNCATE: {
2258 EVT InVT = Op.getOperand(0).getValueType();
2259 unsigned InBits = InVT.getScalarType().getSizeInBits();
2260 KnownZero = KnownZero.zext(InBits);
2261 KnownOne = KnownOne.zext(InBits);
2262 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2263 KnownZero = KnownZero.trunc(BitWidth);
2264 KnownOne = KnownOne.trunc(BitWidth);
2267 case ISD::AssertZext: {
2268 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2269 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2270 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2271 KnownZero |= (~InMask);
2272 KnownOne &= (~KnownZero);
2276 // All bits are zero except the low bit.
2277 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2281 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2282 // We know that the top bits of C-X are clear if X contains less bits
2283 // than C (i.e. no wrap-around can happen). For example, 20-X is
2284 // positive if we can prove that X is >= 0 and < 16.
2285 if (CLHS->getAPIntValue().isNonNegative()) {
2286 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2287 // NLZ can't be BitWidth with no sign bit
2288 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2289 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2291 // If all of the MaskV bits are known to be zero, then we know the
2292 // output top bits are zero, because we now know that the output is
2294 if ((KnownZero2 & MaskV) == MaskV) {
2295 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2296 // Top bits known zero.
2297 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2305 // Output known-0 bits are known if clear or set in both the low clear bits
2306 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2307 // low 3 bits clear.
2308 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2309 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2311 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2312 KnownZeroOut = std::min(KnownZeroOut,
2313 KnownZero2.countTrailingOnes());
2315 if (Op.getOpcode() == ISD::ADD) {
2316 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2320 // With ADDE, a carry bit may be added in, so we can only use this
2321 // information if we know (at least) that the low two bits are clear. We
2322 // then return to the caller that the low bit is unknown but that other bits
2324 if (KnownZeroOut >= 2) // ADDE
2325 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2329 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2330 const APInt &RA = Rem->getAPIntValue().abs();
2331 if (RA.isPowerOf2()) {
2332 APInt LowBits = RA - 1;
2333 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2335 // The low bits of the first operand are unchanged by the srem.
2336 KnownZero = KnownZero2 & LowBits;
2337 KnownOne = KnownOne2 & LowBits;
2339 // If the first operand is non-negative or has all low bits zero, then
2340 // the upper bits are all zero.
2341 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2342 KnownZero |= ~LowBits;
2344 // If the first operand is negative and not all low bits are zero, then
2345 // the upper bits are all one.
2346 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2347 KnownOne |= ~LowBits;
2348 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2353 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2354 const APInt &RA = Rem->getAPIntValue();
2355 if (RA.isPowerOf2()) {
2356 APInt LowBits = (RA - 1);
2357 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2359 // The upper bits are all zero, the lower ones are unchanged.
2360 KnownZero = KnownZero2 | ~LowBits;
2361 KnownOne = KnownOne2 & LowBits;
2366 // Since the result is less than or equal to either operand, any leading
2367 // zero bits in either operand must also exist in the result.
2368 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2369 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2371 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2372 KnownZero2.countLeadingOnes());
2373 KnownOne.clearAllBits();
2374 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2377 case ISD::EXTRACT_ELEMENT: {
2378 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2379 const unsigned Index =
2380 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2381 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2383 // Remove low part of known bits mask
2384 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2385 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2387 // Remove high part of known bit mask
2388 KnownZero = KnownZero.trunc(BitWidth);
2389 KnownOne = KnownOne.trunc(BitWidth);
2392 case ISD::FrameIndex:
2393 case ISD::TargetFrameIndex:
2394 if (unsigned Align = InferPtrAlignment(Op)) {
2395 // The low bits are known zero if the pointer is aligned.
2396 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2402 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2405 case ISD::INTRINSIC_WO_CHAIN:
2406 case ISD::INTRINSIC_W_CHAIN:
2407 case ISD::INTRINSIC_VOID:
2408 // Allow the target to implement this method for its nodes.
2409 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2413 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2416 /// ComputeNumSignBits - Return the number of times the sign bit of the
2417 /// register is replicated into the other bits. We know that at least 1 bit
2418 /// is always equal to the sign bit (itself), but other cases can give us
2419 /// information. For example, immediately after an "SRA X, 2", we know that
2420 /// the top 3 bits are all equal to each other, so we return 3.
2421 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2422 EVT VT = Op.getValueType();
2423 assert(VT.isInteger() && "Invalid VT!");
2424 unsigned VTBits = VT.getScalarType().getSizeInBits();
2426 unsigned FirstAnswer = 1;
2429 return 1; // Limit search depth.
2431 switch (Op.getOpcode()) {
2433 case ISD::AssertSext:
2434 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2435 return VTBits-Tmp+1;
2436 case ISD::AssertZext:
2437 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2440 case ISD::Constant: {
2441 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2442 return Val.getNumSignBits();
2445 case ISD::SIGN_EXTEND:
2447 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2448 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2450 case ISD::SIGN_EXTEND_INREG:
2451 // Max of the input and what this extends.
2453 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2456 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2457 return std::max(Tmp, Tmp2);
2460 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2461 // SRA X, C -> adds C sign bits.
2462 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2463 Tmp += C->getZExtValue();
2464 if (Tmp > VTBits) Tmp = VTBits;
2468 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2469 // shl destroys sign bits.
2470 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2471 if (C->getZExtValue() >= VTBits || // Bad shift.
2472 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2473 return Tmp - C->getZExtValue();
2478 case ISD::XOR: // NOT is handled here.
2479 // Logical binary ops preserve the number of sign bits at the worst.
2480 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2482 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2483 FirstAnswer = std::min(Tmp, Tmp2);
2484 // We computed what we know about the sign bits as our first
2485 // answer. Now proceed to the generic code that uses
2486 // computeKnownBits, and pick whichever answer is better.
2491 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2492 if (Tmp == 1) return 1; // Early out.
2493 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2494 return std::min(Tmp, Tmp2);
2502 if (Op.getResNo() != 1)
2504 // The boolean result conforms to getBooleanContents. Fall through.
2505 // If setcc returns 0/-1, all bits are sign bits.
2506 // We know that we have an integer-based boolean since these operations
2507 // are only available for integer.
2508 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2509 TargetLowering::ZeroOrNegativeOneBooleanContent)
2513 // If setcc returns 0/-1, all bits are sign bits.
2514 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2515 TargetLowering::ZeroOrNegativeOneBooleanContent)
2520 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2521 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2523 // Handle rotate right by N like a rotate left by 32-N.
2524 if (Op.getOpcode() == ISD::ROTR)
2525 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2527 // If we aren't rotating out all of the known-in sign bits, return the
2528 // number that are left. This handles rotl(sext(x), 1) for example.
2529 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2530 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2534 // Add can have at most one carry bit. Thus we know that the output
2535 // is, at worst, one more bit than the inputs.
2536 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2537 if (Tmp == 1) return 1; // Early out.
2539 // Special case decrementing a value (ADD X, -1):
2540 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2541 if (CRHS->isAllOnesValue()) {
2542 APInt KnownZero, KnownOne;
2543 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2545 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2547 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2550 // If we are subtracting one from a positive number, there is no carry
2551 // out of the result.
2552 if (KnownZero.isNegative())
2556 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2557 if (Tmp2 == 1) return 1;
2558 return std::min(Tmp, Tmp2)-1;
2561 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2562 if (Tmp2 == 1) return 1;
2565 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2566 if (CLHS->isNullValue()) {
2567 APInt KnownZero, KnownOne;
2568 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2569 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2571 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2574 // If the input is known to be positive (the sign bit is known clear),
2575 // the output of the NEG has the same number of sign bits as the input.
2576 if (KnownZero.isNegative())
2579 // Otherwise, we treat this like a SUB.
2582 // Sub can have at most one carry bit. Thus we know that the output
2583 // is, at worst, one more bit than the inputs.
2584 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2585 if (Tmp == 1) return 1; // Early out.
2586 return std::min(Tmp, Tmp2)-1;
2588 // FIXME: it's tricky to do anything useful for this, but it is an important
2589 // case for targets like X86.
2591 case ISD::EXTRACT_ELEMENT: {
2592 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2593 const int BitWidth = Op.getValueType().getSizeInBits();
2595 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2597 // Get reverse index (starting from 1), Op1 value indexes elements from
2598 // little end. Sign starts at big end.
2599 const int rIndex = Items - 1 -
2600 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2602 // If the sign portion ends in our element the substraction gives correct
2603 // result. Otherwise it gives either negative or > bitwidth result
2604 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2608 // If we are looking at the loaded value of the SDNode.
2609 if (Op.getResNo() == 0) {
2610 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2611 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2612 unsigned ExtType = LD->getExtensionType();
2615 case ISD::SEXTLOAD: // '17' bits known
2616 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2617 return VTBits-Tmp+1;
2618 case ISD::ZEXTLOAD: // '16' bits known
2619 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2625 // Allow the target to implement this method for its nodes.
2626 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2627 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2628 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2629 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2630 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2631 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2634 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2635 // use this information.
2636 APInt KnownZero, KnownOne;
2637 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2640 if (KnownZero.isNegative()) { // sign bit is 0
2642 } else if (KnownOne.isNegative()) { // sign bit is 1;
2649 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2650 // the number of identical bits in the top of the input value.
2652 Mask <<= Mask.getBitWidth()-VTBits;
2653 // Return # leading zeros. We use 'min' here in case Val was zero before
2654 // shifting. We don't want to return '64' as for an i32 "0".
2655 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2658 /// isBaseWithConstantOffset - Return true if the specified operand is an
2659 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2660 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2661 /// semantics as an ADD. This handles the equivalence:
2662 /// X|Cst == X+Cst iff X&Cst = 0.
2663 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2664 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2665 !isa<ConstantSDNode>(Op.getOperand(1)))
2668 if (Op.getOpcode() == ISD::OR &&
2669 !MaskedValueIsZero(Op.getOperand(0),
2670 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2677 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2678 // If we're told that NaNs won't happen, assume they won't.
2679 if (getTarget().Options.NoNaNsFPMath)
2682 // If the value is a constant, we can obviously see if it is a NaN or not.
2683 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2684 return !C->getValueAPF().isNaN();
2686 // TODO: Recognize more cases here.
2691 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2692 // If the value is a constant, we can obviously see if it is a zero or not.
2693 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2694 return !C->isZero();
2696 // TODO: Recognize more cases here.
2697 switch (Op.getOpcode()) {
2700 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2701 return !C->isNullValue();
2708 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2709 // Check the obvious case.
2710 if (A == B) return true;
2712 // For for negative and positive zero.
2713 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2714 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2715 if (CA->isZero() && CB->isZero()) return true;
2717 // Otherwise they may not be equal.
2721 /// getNode - Gets or creates the specified node.
2723 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2724 FoldingSetNodeID ID;
2725 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2727 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2728 return SDValue(E, 0);
2730 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2731 DL.getDebugLoc(), getVTList(VT));
2732 CSEMap.InsertNode(N, IP);
2735 return SDValue(N, 0);
2738 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2739 EVT VT, SDValue Operand) {
2740 // Constant fold unary operations with an integer constant operand. Even
2741 // opaque constant will be folded, because the folding of unary operations
2742 // doesn't create new constants with different values. Nevertheless, the
2743 // opaque flag is preserved during folding to prevent future folding with
2745 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2746 const APInt &Val = C->getAPIntValue();
2749 case ISD::SIGN_EXTEND:
2750 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
2751 C->isTargetOpcode(), C->isOpaque());
2752 case ISD::ANY_EXTEND:
2753 case ISD::ZERO_EXTEND:
2755 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
2756 C->isTargetOpcode(), C->isOpaque());
2757 case ISD::UINT_TO_FP:
2758 case ISD::SINT_TO_FP: {
2759 APFloat apf(EVTToAPFloatSemantics(VT),
2760 APInt::getNullValue(VT.getSizeInBits()));
2761 (void)apf.convertFromAPInt(Val,
2762 Opcode==ISD::SINT_TO_FP,
2763 APFloat::rmNearestTiesToEven);
2764 return getConstantFP(apf, DL, VT);
2767 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2768 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), DL, VT);
2769 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2770 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), DL, VT);
2771 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2772 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), DL, VT);
2775 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
2778 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
2781 case ISD::CTLZ_ZERO_UNDEF:
2782 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
2785 case ISD::CTTZ_ZERO_UNDEF:
2786 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
2791 // Constant fold unary operations with a floating point constant operand.
2792 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2793 APFloat V = C->getValueAPF(); // make copy
2797 return getConstantFP(V, DL, VT);
2800 return getConstantFP(V, DL, VT);
2802 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2803 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2804 return getConstantFP(V, DL, VT);
2808 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2809 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2810 return getConstantFP(V, DL, VT);
2814 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2815 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2816 return getConstantFP(V, DL, VT);
2819 case ISD::FP_EXTEND: {
2821 // This can return overflow, underflow, or inexact; we don't care.
2822 // FIXME need to be more flexible about rounding mode.
2823 (void)V.convert(EVTToAPFloatSemantics(VT),
2824 APFloat::rmNearestTiesToEven, &ignored);
2825 return getConstantFP(V, DL, VT);
2827 case ISD::FP_TO_SINT:
2828 case ISD::FP_TO_UINT: {
2831 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2832 // FIXME need to be more flexible about rounding mode.
2833 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2834 Opcode==ISD::FP_TO_SINT,
2835 APFloat::rmTowardZero, &ignored);
2836 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2838 APInt api(VT.getSizeInBits(), x);
2839 return getConstant(api, DL, VT);
2842 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2843 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2844 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2845 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2846 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2847 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
2852 // Constant fold unary operations with a vector integer or float operand.
2853 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2854 if (BV->isConstant()) {
2857 // FIXME: Entirely reasonable to perform folding of other unary
2858 // operations here as the need arises.
2865 case ISD::FP_EXTEND:
2866 case ISD::FP_TO_SINT:
2867 case ISD::FP_TO_UINT:
2869 case ISD::UINT_TO_FP:
2870 case ISD::SINT_TO_FP: {
2871 EVT SVT = VT.getScalarType();
2872 EVT InVT = BV->getValueType(0);
2873 EVT InSVT = InVT.getScalarType();
2875 // Find legal integer scalar type for constant promotion and
2876 // ensure that its scalar size is at least as large as source.
2878 if (SVT.isInteger()) {
2879 LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
2880 if (LegalSVT.bitsLT(SVT)) break;
2883 // Let the above scalar folding handle the folding of each element.
2884 SmallVector<SDValue, 8> Ops;
2885 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2886 SDValue OpN = BV->getOperand(i);
2887 EVT OpVT = OpN.getValueType();
2889 // Build vector (integer) scalar operands may need implicit
2890 // truncation - do this before constant folding.
2891 if (OpVT.isInteger() && OpVT.bitsGT(InSVT))
2892 OpN = getNode(ISD::TRUNCATE, DL, InSVT, OpN);
2894 OpN = getNode(Opcode, DL, SVT, OpN);
2896 // Legalize the (integer) scalar constant if necessary.
2897 if (LegalSVT != SVT)
2898 OpN = getNode(ISD::ANY_EXTEND, DL, LegalSVT, OpN);
2900 if (OpN.getOpcode() != ISD::UNDEF &&
2901 OpN.getOpcode() != ISD::Constant &&
2902 OpN.getOpcode() != ISD::ConstantFP)
2906 if (Ops.size() == VT.getVectorNumElements())
2907 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2914 unsigned OpOpcode = Operand.getNode()->getOpcode();
2916 case ISD::TokenFactor:
2917 case ISD::MERGE_VALUES:
2918 case ISD::CONCAT_VECTORS:
2919 return Operand; // Factor, merge or concat of one node? No need.
2920 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2921 case ISD::FP_EXTEND:
2922 assert(VT.isFloatingPoint() &&
2923 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2924 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2925 assert((!VT.isVector() ||
2926 VT.getVectorNumElements() ==
2927 Operand.getValueType().getVectorNumElements()) &&
2928 "Vector element count mismatch!");
2929 if (Operand.getOpcode() == ISD::UNDEF)
2930 return getUNDEF(VT);
2932 case ISD::SIGN_EXTEND:
2933 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2934 "Invalid SIGN_EXTEND!");
2935 if (Operand.getValueType() == VT) return Operand; // noop extension
2936 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2937 "Invalid sext node, dst < src!");
2938 assert((!VT.isVector() ||
2939 VT.getVectorNumElements() ==
2940 Operand.getValueType().getVectorNumElements()) &&
2941 "Vector element count mismatch!");
2942 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2943 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2944 else if (OpOpcode == ISD::UNDEF)
2945 // sext(undef) = 0, because the top bits will all be the same.
2946 return getConstant(0, DL, VT);
2948 case ISD::ZERO_EXTEND:
2949 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2950 "Invalid ZERO_EXTEND!");
2951 if (Operand.getValueType() == VT) return Operand; // noop extension
2952 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2953 "Invalid zext node, dst < src!");
2954 assert((!VT.isVector() ||
2955 VT.getVectorNumElements() ==
2956 Operand.getValueType().getVectorNumElements()) &&
2957 "Vector element count mismatch!");
2958 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2959 return getNode(ISD::ZERO_EXTEND, DL, VT,
2960 Operand.getNode()->getOperand(0));
2961 else if (OpOpcode == ISD::UNDEF)
2962 // zext(undef) = 0, because the top bits will be zero.
2963 return getConstant(0, DL, VT);
2965 case ISD::ANY_EXTEND:
2966 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2967 "Invalid ANY_EXTEND!");
2968 if (Operand.getValueType() == VT) return Operand; // noop extension
2969 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2970 "Invalid anyext node, dst < src!");
2971 assert((!VT.isVector() ||
2972 VT.getVectorNumElements() ==
2973 Operand.getValueType().getVectorNumElements()) &&
2974 "Vector element count mismatch!");
2976 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2977 OpOpcode == ISD::ANY_EXTEND)
2978 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2979 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2980 else if (OpOpcode == ISD::UNDEF)
2981 return getUNDEF(VT);
2983 // (ext (trunx x)) -> x
2984 if (OpOpcode == ISD::TRUNCATE) {
2985 SDValue OpOp = Operand.getNode()->getOperand(0);
2986 if (OpOp.getValueType() == VT)
2991 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2992 "Invalid TRUNCATE!");
2993 if (Operand.getValueType() == VT) return Operand; // noop truncate
2994 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2995 "Invalid truncate node, src < dst!");
2996 assert((!VT.isVector() ||
2997 VT.getVectorNumElements() ==
2998 Operand.getValueType().getVectorNumElements()) &&
2999 "Vector element count mismatch!");
3000 if (OpOpcode == ISD::TRUNCATE)
3001 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3002 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3003 OpOpcode == ISD::ANY_EXTEND) {
3004 // If the source is smaller than the dest, we still need an extend.
3005 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
3006 .bitsLT(VT.getScalarType()))
3007 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3008 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
3009 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3010 return Operand.getNode()->getOperand(0);
3012 if (OpOpcode == ISD::UNDEF)
3013 return getUNDEF(VT);
3016 // Basic sanity checking.
3017 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
3018 && "Cannot BITCAST between types of different sizes!");
3019 if (VT == Operand.getValueType()) return Operand; // noop conversion.
3020 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
3021 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
3022 if (OpOpcode == ISD::UNDEF)
3023 return getUNDEF(VT);
3025 case ISD::SCALAR_TO_VECTOR:
3026 assert(VT.isVector() && !Operand.getValueType().isVector() &&
3027 (VT.getVectorElementType() == Operand.getValueType() ||
3028 (VT.getVectorElementType().isInteger() &&
3029 Operand.getValueType().isInteger() &&
3030 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3031 "Illegal SCALAR_TO_VECTOR node!");
3032 if (OpOpcode == ISD::UNDEF)
3033 return getUNDEF(VT);
3034 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3035 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3036 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3037 Operand.getConstantOperandVal(1) == 0 &&
3038 Operand.getOperand(0).getValueType() == VT)
3039 return Operand.getOperand(0);
3042 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3043 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3044 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3045 Operand.getNode()->getOperand(0));
3046 if (OpOpcode == ISD::FNEG) // --X -> X
3047 return Operand.getNode()->getOperand(0);
3050 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3051 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3056 SDVTList VTs = getVTList(VT);
3057 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3058 FoldingSetNodeID ID;
3059 SDValue Ops[1] = { Operand };
3060 AddNodeIDNode(ID, Opcode, VTs, Ops);
3062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3063 return SDValue(E, 0);
3065 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3066 DL.getDebugLoc(), VTs, Operand);
3067 CSEMap.InsertNode(N, IP);
3069 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3070 DL.getDebugLoc(), VTs, Operand);
3074 return SDValue(N, 0);
3077 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3078 SDNode *Cst1, SDNode *Cst2) {
3079 // If the opcode is a target-specific ISD node, there's nothing we can
3080 // do here and the operand rules may not line up with the below, so
3082 if (Opcode >= ISD::BUILTIN_OP_END)
3085 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
3086 SmallVector<SDValue, 4> Outputs;
3087 EVT SVT = VT.getScalarType();
3089 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
3090 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
3091 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
3094 if (Scalar1 && Scalar2)
3095 // Scalar instruction.
3096 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
3098 // For vectors extract each constant element into Inputs so we can constant
3099 // fold them individually.
3100 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3101 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3105 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3107 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3108 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3109 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3110 if (!V1 || !V2) // Not a constant, bail.
3113 if (V1->isOpaque() || V2->isOpaque())
3116 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3117 // FIXME: This is valid and could be handled by truncating the APInts.
3118 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3121 Inputs.push_back(std::make_pair(V1, V2));
3125 // We have a number of constant values, constant fold them element by element.
3126 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3127 const APInt &C1 = Inputs[I].first->getAPIntValue();
3128 const APInt &C2 = Inputs[I].second->getAPIntValue();
3132 Outputs.push_back(getConstant(C1 + C2, DL, SVT));
3135 Outputs.push_back(getConstant(C1 - C2, DL, SVT));
3138 Outputs.push_back(getConstant(C1 * C2, DL, SVT));
3141 if (!C2.getBoolValue())
3143 Outputs.push_back(getConstant(C1.udiv(C2), DL, SVT));
3146 if (!C2.getBoolValue())
3148 Outputs.push_back(getConstant(C1.urem(C2), DL, SVT));
3151 if (!C2.getBoolValue())
3153 Outputs.push_back(getConstant(C1.sdiv(C2), DL, SVT));
3156 if (!C2.getBoolValue())
3158 Outputs.push_back(getConstant(C1.srem(C2), DL, SVT));
3161 Outputs.push_back(getConstant(C1 & C2, DL, SVT));
3164 Outputs.push_back(getConstant(C1 | C2, DL, SVT));
3167 Outputs.push_back(getConstant(C1 ^ C2, DL, SVT));
3170 Outputs.push_back(getConstant(C1 << C2, DL, SVT));
3173 Outputs.push_back(getConstant(C1.lshr(C2), DL, SVT));
3176 Outputs.push_back(getConstant(C1.ashr(C2), DL, SVT));
3179 Outputs.push_back(getConstant(C1.rotl(C2), DL, SVT));
3182 Outputs.push_back(getConstant(C1.rotr(C2), DL, SVT));
3189 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3190 "Expected a scalar or vector!"));
3192 // Handle the scalar case first.
3194 return Outputs.back();
3196 // We may have a vector type but a scalar result. Create a splat.
3197 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3199 // Build a big vector out of the scalar elements we generated.
3200 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3203 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3204 SDValue N2, bool nuw, bool nsw, bool exact) {
3205 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3206 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3209 case ISD::TokenFactor:
3210 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3211 N2.getValueType() == MVT::Other && "Invalid token factor!");
3212 // Fold trivial token factors.
3213 if (N1.getOpcode() == ISD::EntryToken) return N2;
3214 if (N2.getOpcode() == ISD::EntryToken) return N1;
3215 if (N1 == N2) return N1;
3217 case ISD::CONCAT_VECTORS:
3218 // Concat of UNDEFs is UNDEF.
3219 if (N1.getOpcode() == ISD::UNDEF &&
3220 N2.getOpcode() == ISD::UNDEF)
3221 return getUNDEF(VT);
3223 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3224 // one big BUILD_VECTOR.
3225 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3226 N2.getOpcode() == ISD::BUILD_VECTOR) {
3227 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3228 N1.getNode()->op_end());
3229 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3231 // BUILD_VECTOR requires all inputs to be of the same type, find the
3232 // maximum type and extend them all.
3233 EVT SVT = VT.getScalarType();
3234 for (SDValue Op : Elts)
3235 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3236 if (SVT.bitsGT(VT.getScalarType()))
3237 for (SDValue &Op : Elts)
3238 Op = TLI->isZExtFree(Op.getValueType(), SVT)
3239 ? getZExtOrTrunc(Op, DL, SVT)
3240 : getSExtOrTrunc(Op, DL, SVT);
3242 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3246 assert(VT.isInteger() && "This operator does not apply to FP types!");
3247 assert(N1.getValueType() == N2.getValueType() &&
3248 N1.getValueType() == VT && "Binary operator types must match!");
3249 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3250 // worth handling here.
3251 if (N2C && N2C->isNullValue())
3253 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3260 assert(VT.isInteger() && "This operator does not apply to FP types!");
3261 assert(N1.getValueType() == N2.getValueType() &&
3262 N1.getValueType() == VT && "Binary operator types must match!");
3263 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3264 // it's worth handling here.
3265 if (N2C && N2C->isNullValue())
3275 assert(VT.isInteger() && "This operator does not apply to FP types!");
3276 assert(N1.getValueType() == N2.getValueType() &&
3277 N1.getValueType() == VT && "Binary operator types must match!");
3284 if (getTarget().Options.UnsafeFPMath) {
3285 if (Opcode == ISD::FADD) {
3287 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3288 if (CFP->getValueAPF().isZero())
3291 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3292 if (CFP->getValueAPF().isZero())
3294 } else if (Opcode == ISD::FSUB) {
3296 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3297 if (CFP->getValueAPF().isZero())
3299 } else if (Opcode == ISD::FMUL) {
3300 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3303 // If the first operand isn't the constant, try the second
3305 CFP = dyn_cast<ConstantFPSDNode>(N2);
3312 return SDValue(CFP,0);
3314 if (CFP->isExactlyValue(1.0))
3319 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3320 assert(N1.getValueType() == N2.getValueType() &&
3321 N1.getValueType() == VT && "Binary operator types must match!");
3323 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3324 assert(N1.getValueType() == VT &&
3325 N1.getValueType().isFloatingPoint() &&
3326 N2.getValueType().isFloatingPoint() &&
3327 "Invalid FCOPYSIGN!");
3334 assert(VT == N1.getValueType() &&
3335 "Shift operators return type must be the same as their first arg");
3336 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3337 "Shifts only work on integers");
3338 assert((!VT.isVector() || VT == N2.getValueType()) &&
3339 "Vector shift amounts must be in the same as their first arg");
3340 // Verify that the shift amount VT is bit enough to hold valid shift
3341 // amounts. This catches things like trying to shift an i1024 value by an
3342 // i8, which is easy to fall into in generic code that uses
3343 // TLI.getShiftAmount().
3344 assert(N2.getValueType().getSizeInBits() >=
3345 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3346 "Invalid use of small shift amount with oversized value!");
3348 // Always fold shifts of i1 values so the code generator doesn't need to
3349 // handle them. Since we know the size of the shift has to be less than the
3350 // size of the value, the shift/rotate count is guaranteed to be zero.
3353 if (N2C && N2C->isNullValue())
3356 case ISD::FP_ROUND_INREG: {
3357 EVT EVT = cast<VTSDNode>(N2)->getVT();
3358 assert(VT == N1.getValueType() && "Not an inreg round!");
3359 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3360 "Cannot FP_ROUND_INREG integer types");
3361 assert(EVT.isVector() == VT.isVector() &&
3362 "FP_ROUND_INREG type should be vector iff the operand "
3364 assert((!EVT.isVector() ||
3365 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3366 "Vector element counts must match in FP_ROUND_INREG");
3367 assert(EVT.bitsLE(VT) && "Not rounding down!");
3369 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3373 assert(VT.isFloatingPoint() &&
3374 N1.getValueType().isFloatingPoint() &&
3375 VT.bitsLE(N1.getValueType()) &&
3376 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3377 if (N1.getValueType() == VT) return N1; // noop conversion.
3379 case ISD::AssertSext:
3380 case ISD::AssertZext: {
3381 EVT EVT = cast<VTSDNode>(N2)->getVT();
3382 assert(VT == N1.getValueType() && "Not an inreg extend!");
3383 assert(VT.isInteger() && EVT.isInteger() &&
3384 "Cannot *_EXTEND_INREG FP types");
3385 assert(!EVT.isVector() &&
3386 "AssertSExt/AssertZExt type should be the vector element type "
3387 "rather than the vector type!");
3388 assert(EVT.bitsLE(VT) && "Not extending!");
3389 if (VT == EVT) return N1; // noop assertion.
3392 case ISD::SIGN_EXTEND_INREG: {
3393 EVT EVT = cast<VTSDNode>(N2)->getVT();
3394 assert(VT == N1.getValueType() && "Not an inreg extend!");
3395 assert(VT.isInteger() && EVT.isInteger() &&
3396 "Cannot *_EXTEND_INREG FP types");
3397 assert(EVT.isVector() == VT.isVector() &&
3398 "SIGN_EXTEND_INREG type should be vector iff the operand "
3400 assert((!EVT.isVector() ||
3401 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3402 "Vector element counts must match in SIGN_EXTEND_INREG");
3403 assert(EVT.bitsLE(VT) && "Not extending!");
3404 if (EVT == VT) return N1; // Not actually extending
3407 APInt Val = N1C->getAPIntValue();
3408 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3409 Val <<= Val.getBitWidth()-FromBits;
3410 Val = Val.ashr(Val.getBitWidth()-FromBits);
3411 return getConstant(Val, DL, VT);
3415 case ISD::EXTRACT_VECTOR_ELT:
3416 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3417 if (N1.getOpcode() == ISD::UNDEF)
3418 return getUNDEF(VT);
3420 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
3421 if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
3422 return getUNDEF(VT);
3424 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3425 // expanding copies of large vectors from registers.
3427 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3428 N1.getNumOperands() > 0) {
3430 N1.getOperand(0).getValueType().getVectorNumElements();
3431 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3432 N1.getOperand(N2C->getZExtValue() / Factor),
3433 getConstant(N2C->getZExtValue() % Factor, DL,
3434 N2.getValueType()));
3437 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3438 // expanding large vector constants.
3439 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3440 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3442 if (VT != Elt.getValueType())
3443 // If the vector element type is not legal, the BUILD_VECTOR operands
3444 // are promoted and implicitly truncated, and the result implicitly
3445 // extended. Make that explicit here.
3446 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3451 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3452 // operations are lowered to scalars.
3453 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3454 // If the indices are the same, return the inserted element else
3455 // if the indices are known different, extract the element from
3456 // the original vector.
3457 SDValue N1Op2 = N1.getOperand(2);
3458 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3460 if (N1Op2C && N2C) {
3461 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3462 if (VT == N1.getOperand(1).getValueType())
3463 return N1.getOperand(1);
3465 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3468 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3472 case ISD::EXTRACT_ELEMENT:
3473 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3474 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3475 (N1.getValueType().isInteger() == VT.isInteger()) &&
3476 N1.getValueType() != VT &&
3477 "Wrong types for EXTRACT_ELEMENT!");
3479 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3480 // 64-bit integers into 32-bit parts. Instead of building the extract of
3481 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3482 if (N1.getOpcode() == ISD::BUILD_PAIR)
3483 return N1.getOperand(N2C->getZExtValue());
3485 // EXTRACT_ELEMENT of a constant int is also very common.
3486 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3487 unsigned ElementSize = VT.getSizeInBits();
3488 unsigned Shift = ElementSize * N2C->getZExtValue();
3489 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3490 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
3493 case ISD::EXTRACT_SUBVECTOR: {
3495 if (VT.isSimple() && N1.getValueType().isSimple()) {
3496 assert(VT.isVector() && N1.getValueType().isVector() &&
3497 "Extract subvector VTs must be a vectors!");
3498 assert(VT.getVectorElementType() ==
3499 N1.getValueType().getVectorElementType() &&
3500 "Extract subvector VTs must have the same element type!");
3501 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3502 "Extract subvector must be from larger vector to smaller vector!");
3504 if (isa<ConstantSDNode>(Index.getNode())) {
3505 assert((VT.getVectorNumElements() +
3506 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3507 <= N1.getValueType().getVectorNumElements())
3508 && "Extract subvector overflow!");
3511 // Trivial extraction.
3512 if (VT.getSimpleVT() == N1.getSimpleValueType())
3519 // Perform trivial constant folding.
3521 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
3524 // Canonicalize constant to RHS if commutative.
3525 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3526 std::swap(N1C, N2C);
3530 // Constant fold FP operations.
3531 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3532 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3533 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3535 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3536 // Canonicalize constant to RHS if commutative.
3537 std::swap(N1CFP, N2CFP);
3540 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3541 APFloat::opStatus s;
3544 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3545 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3546 return getConstantFP(V1, DL, VT);
3549 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3550 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3551 return getConstantFP(V1, DL, VT);
3554 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3555 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3556 return getConstantFP(V1, DL, VT);
3559 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3560 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3561 s!=APFloat::opDivByZero)) {
3562 return getConstantFP(V1, DL, VT);
3566 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3567 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3568 s!=APFloat::opDivByZero)) {
3569 return getConstantFP(V1, DL, VT);
3572 case ISD::FCOPYSIGN:
3574 return getConstantFP(V1, DL, VT);
3579 if (Opcode == ISD::FP_ROUND) {
3580 APFloat V = N1CFP->getValueAPF(); // make copy
3582 // This can return overflow, underflow, or inexact; we don't care.
3583 // FIXME need to be more flexible about rounding mode.
3584 (void)V.convert(EVTToAPFloatSemantics(VT),
3585 APFloat::rmNearestTiesToEven, &ignored);
3586 return getConstantFP(V, DL, VT);
3590 // Canonicalize an UNDEF to the RHS, even over a constant.
3591 if (N1.getOpcode() == ISD::UNDEF) {
3592 if (isCommutativeBinOp(Opcode)) {
3596 case ISD::FP_ROUND_INREG:
3597 case ISD::SIGN_EXTEND_INREG:
3603 return N1; // fold op(undef, arg2) -> undef
3611 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3612 // For vectors, we can't easily build an all zero vector, just return
3619 // Fold a bunch of operators when the RHS is undef.
3620 if (N2.getOpcode() == ISD::UNDEF) {
3623 if (N1.getOpcode() == ISD::UNDEF)
3624 // Handle undef ^ undef -> 0 special case. This is a common
3626 return getConstant(0, DL, VT);
3636 return N2; // fold op(arg1, undef) -> undef
3642 if (getTarget().Options.UnsafeFPMath)
3650 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
3651 // For vectors, we can't easily build an all zero vector, just return
3656 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), DL, VT);
3657 // For vectors, we can't easily build an all one vector, just return
3665 // Memoize this node if possible.
3667 SDVTList VTs = getVTList(VT);
3668 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3669 if (VT != MVT::Glue) {
3670 SDValue Ops[] = {N1, N2};
3671 FoldingSetNodeID ID;
3672 AddNodeIDNode(ID, Opcode, VTs, Ops);
3674 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3677 return SDValue(E, 0);
3679 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3681 CSEMap.InsertNode(N, IP);
3683 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3687 return SDValue(N, 0);
3690 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3691 SDValue N1, SDValue N2, SDValue N3) {
3692 // Perform various simplifications.
3693 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3696 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3697 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3698 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3699 if (N1CFP && N2CFP && N3CFP) {
3700 APFloat V1 = N1CFP->getValueAPF();
3701 const APFloat &V2 = N2CFP->getValueAPF();
3702 const APFloat &V3 = N3CFP->getValueAPF();
3703 APFloat::opStatus s =
3704 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3705 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3706 return getConstantFP(V1, DL, VT);
3710 case ISD::CONCAT_VECTORS:
3711 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3712 // one big BUILD_VECTOR.
3713 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3714 N2.getOpcode() == ISD::BUILD_VECTOR &&
3715 N3.getOpcode() == ISD::BUILD_VECTOR) {
3716 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3717 N1.getNode()->op_end());
3718 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3719 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3720 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3724 // Use FoldSetCC to simplify SETCC's.
3725 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3726 if (Simp.getNode()) return Simp;
3731 if (N1C->getZExtValue())
3732 return N2; // select true, X, Y -> X
3733 return N3; // select false, X, Y -> Y
3736 if (N2 == N3) return N2; // select C, X, X -> X
3738 case ISD::VECTOR_SHUFFLE:
3739 llvm_unreachable("should use getVectorShuffle constructor!");
3740 case ISD::INSERT_SUBVECTOR: {
3742 if (VT.isSimple() && N1.getValueType().isSimple()
3743 && N2.getValueType().isSimple()) {
3744 assert(VT.isVector() && N1.getValueType().isVector() &&
3745 N2.getValueType().isVector() &&
3746 "Insert subvector VTs must be a vectors");
3747 assert(VT == N1.getValueType() &&
3748 "Dest and insert subvector source types must match!");
3749 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3750 "Insert subvector must be from smaller vector to larger vector!");
3751 if (isa<ConstantSDNode>(Index.getNode())) {
3752 assert((N2.getValueType().getVectorNumElements() +
3753 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3754 <= VT.getVectorNumElements())
3755 && "Insert subvector overflow!");
3758 // Trivial insertion.
3759 if (VT.getSimpleVT() == N2.getSimpleValueType())
3765 // Fold bit_convert nodes from a type to themselves.
3766 if (N1.getValueType() == VT)
3771 // Memoize node if it doesn't produce a flag.
3773 SDVTList VTs = getVTList(VT);
3774 if (VT != MVT::Glue) {
3775 SDValue Ops[] = { N1, N2, N3 };
3776 FoldingSetNodeID ID;
3777 AddNodeIDNode(ID, Opcode, VTs, Ops);
3779 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3780 return SDValue(E, 0);
3782 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3783 DL.getDebugLoc(), VTs, N1, N2, N3);
3784 CSEMap.InsertNode(N, IP);
3786 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3787 DL.getDebugLoc(), VTs, N1, N2, N3);
3791 return SDValue(N, 0);
3794 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3795 SDValue N1, SDValue N2, SDValue N3,
3797 SDValue Ops[] = { N1, N2, N3, N4 };
3798 return getNode(Opcode, DL, VT, Ops);
3801 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3802 SDValue N1, SDValue N2, SDValue N3,
3803 SDValue N4, SDValue N5) {
3804 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3805 return getNode(Opcode, DL, VT, Ops);
3808 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3809 /// the incoming stack arguments to be loaded from the stack.
3810 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3811 SmallVector<SDValue, 8> ArgChains;
3813 // Include the original chain at the beginning of the list. When this is
3814 // used by target LowerCall hooks, this helps legalize find the
3815 // CALLSEQ_BEGIN node.
3816 ArgChains.push_back(Chain);
3818 // Add a chain value for each stack argument.
3819 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3820 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3821 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3822 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3823 if (FI->getIndex() < 0)
3824 ArgChains.push_back(SDValue(L, 1));
3826 // Build a tokenfactor for all the chains.
3827 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3830 /// getMemsetValue - Vectorized representation of the memset value
3832 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3834 assert(Value.getOpcode() != ISD::UNDEF);
3836 unsigned NumBits = VT.getScalarType().getSizeInBits();
3837 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3838 assert(C->getAPIntValue().getBitWidth() == 8);
3839 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3841 return DAG.getConstant(Val, dl, VT);
3842 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
3846 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
3847 EVT IntVT = VT.getScalarType();
3848 if (!IntVT.isInteger())
3849 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
3851 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
3853 // Use a multiplication with 0x010101... to extend the input to the
3855 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3856 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
3857 DAG.getConstant(Magic, dl, IntVT));
3860 if (VT != Value.getValueType() && !VT.isInteger())
3861 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
3862 if (VT != Value.getValueType()) {
3863 assert(VT.getVectorElementType() == Value.getValueType() &&
3864 "value type should be one vector element here");
3865 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
3866 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
3872 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3873 /// used when a memcpy is turned into a memset when the source is a constant
3875 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3876 const TargetLowering &TLI, StringRef Str) {
3877 // Handle vector with all elements zero.
3880 return DAG.getConstant(0, dl, VT);
3881 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3882 return DAG.getConstantFP(0.0, dl, VT);
3883 else if (VT.isVector()) {
3884 unsigned NumElts = VT.getVectorNumElements();
3885 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3886 return DAG.getNode(ISD::BITCAST, dl, VT,
3887 DAG.getConstant(0, dl,
3888 EVT::getVectorVT(*DAG.getContext(),
3891 llvm_unreachable("Expected type!");
3894 assert(!VT.isVector() && "Can't handle vector type here!");
3895 unsigned NumVTBits = VT.getSizeInBits();
3896 unsigned NumVTBytes = NumVTBits / 8;
3897 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3899 APInt Val(NumVTBits, 0);
3900 if (TLI.isLittleEndian()) {
3901 for (unsigned i = 0; i != NumBytes; ++i)
3902 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3904 for (unsigned i = 0; i != NumBytes; ++i)
3905 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3908 // If the "cost" of materializing the integer immediate is less than the cost
3909 // of a load, then it is cost effective to turn the load into the immediate.
3910 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3911 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3912 return DAG.getConstant(Val, dl, VT);
3913 return SDValue(nullptr, 0);
3916 /// getMemBasePlusOffset - Returns base and offset node for the
3918 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3919 SelectionDAG &DAG) {
3920 EVT VT = Base.getValueType();
3921 return DAG.getNode(ISD::ADD, dl,
3922 VT, Base, DAG.getConstant(Offset, dl, VT));
3925 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3927 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3928 unsigned SrcDelta = 0;
3929 GlobalAddressSDNode *G = nullptr;
3930 if (Src.getOpcode() == ISD::GlobalAddress)
3931 G = cast<GlobalAddressSDNode>(Src);
3932 else if (Src.getOpcode() == ISD::ADD &&
3933 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3934 Src.getOperand(1).getOpcode() == ISD::Constant) {
3935 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3936 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3941 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3944 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3945 /// to replace the memset / memcpy. Return true if the number of memory ops
3946 /// is below the threshold. It returns the types of the sequence of
3947 /// memory ops to perform memset / memcpy by reference.
3948 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3949 unsigned Limit, uint64_t Size,
3950 unsigned DstAlign, unsigned SrcAlign,
3956 const TargetLowering &TLI) {
3957 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3958 "Expecting memcpy / memset source to meet alignment requirement!");
3959 // If 'SrcAlign' is zero, that means the memory operation does not need to
3960 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3961 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3962 // is the specified alignment of the memory operation. If it is zero, that
3963 // means it's possible to change the alignment of the destination.
3964 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3965 // not need to be loaded.
3966 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3967 IsMemset, ZeroMemset, MemcpyStrSrc,
3968 DAG.getMachineFunction());
3970 if (VT == MVT::Other) {
3972 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3973 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3974 VT = TLI.getPointerTy();
3976 switch (DstAlign & 7) {
3977 case 0: VT = MVT::i64; break;
3978 case 4: VT = MVT::i32; break;
3979 case 2: VT = MVT::i16; break;
3980 default: VT = MVT::i8; break;
3985 while (!TLI.isTypeLegal(LVT))
3986 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3987 assert(LVT.isInteger());
3993 unsigned NumMemOps = 0;
3995 unsigned VTSize = VT.getSizeInBits() / 8;
3996 while (VTSize > Size) {
3997 // For now, only use non-vector load / store's for the left-over pieces.
4002 if (VT.isVector() || VT.isFloatingPoint()) {
4003 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
4004 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
4005 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
4007 else if (NewVT == MVT::i64 &&
4008 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
4009 TLI.isSafeMemOpType(MVT::f64)) {
4010 // i64 is usually not legal on 32-bit targets, but f64 may be.
4018 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
4019 if (NewVT == MVT::i8)
4021 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
4023 NewVTSize = NewVT.getSizeInBits() / 8;
4025 // If the new VT cannot cover all of the remaining bits, then consider
4026 // issuing a (or a pair of) unaligned and overlapping load / store.
4027 // FIXME: Only does this for 64-bit or more since we don't have proper
4028 // cost model for unaligned load / store.
4031 if (NumMemOps && AllowOverlap &&
4032 VTSize >= 8 && NewVTSize < Size &&
4033 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
4041 if (++NumMemOps > Limit)
4044 MemOps.push_back(VT);
4051 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4052 SDValue Chain, SDValue Dst,
4053 SDValue Src, uint64_t Size,
4054 unsigned Align, bool isVol,
4056 MachinePointerInfo DstPtrInfo,
4057 MachinePointerInfo SrcPtrInfo) {
4058 // Turn a memcpy of undef to nop.
4059 if (Src.getOpcode() == ISD::UNDEF)
4062 // Expand memcpy to a series of load and store ops if the size operand falls
4063 // below a certain threshold.
4064 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4065 // rather than maybe a humongous number of loads and stores.
4066 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4067 std::vector<EVT> MemOps;
4068 bool DstAlignCanChange = false;
4069 MachineFunction &MF = DAG.getMachineFunction();
4070 MachineFrameInfo *MFI = MF.getFrameInfo();
4071 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4072 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4073 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4074 DstAlignCanChange = true;
4075 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4076 if (Align > SrcAlign)
4079 bool CopyFromStr = isMemSrcFromString(Src, Str);
4080 bool isZeroStr = CopyFromStr && Str.empty();
4081 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4083 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4084 (DstAlignCanChange ? 0 : Align),
4085 (isZeroStr ? 0 : SrcAlign),
4086 false, false, CopyFromStr, true, DAG, TLI))
4089 if (DstAlignCanChange) {
4090 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4091 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4093 // Don't promote to an alignment that would require dynamic stack
4095 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4096 if (!TRI->needsStackRealignment(MF))
4097 while (NewAlign > Align &&
4098 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
4101 if (NewAlign > Align) {
4102 // Give the stack frame object a larger alignment if needed.
4103 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4104 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4109 SmallVector<SDValue, 8> OutChains;
4110 unsigned NumMemOps = MemOps.size();
4111 uint64_t SrcOff = 0, DstOff = 0;
4112 for (unsigned i = 0; i != NumMemOps; ++i) {
4114 unsigned VTSize = VT.getSizeInBits() / 8;
4115 SDValue Value, Store;
4117 if (VTSize > Size) {
4118 // Issuing an unaligned load / store pair that overlaps with the previous
4119 // pair. Adjust the offset accordingly.
4120 assert(i == NumMemOps-1 && i != 0);
4121 SrcOff -= VTSize - Size;
4122 DstOff -= VTSize - Size;
4126 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4127 // It's unlikely a store of a vector immediate can be done in a single
4128 // instruction. It would require a load from a constantpool first.
4129 // We only handle zero vectors here.
4130 // FIXME: Handle other cases where store of vector immediate is done in
4131 // a single instruction.
4132 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4133 if (Value.getNode())
4134 Store = DAG.getStore(Chain, dl, Value,
4135 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4136 DstPtrInfo.getWithOffset(DstOff), isVol,
4140 if (!Store.getNode()) {
4141 // The type might not be legal for the target. This should only happen
4142 // if the type is smaller than a legal type, as on PPC, so the right
4143 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4144 // to Load/Store if NVT==VT.
4145 // FIXME does the case above also need this?
4146 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4147 assert(NVT.bitsGE(VT));
4148 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4149 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4150 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4151 false, MinAlign(SrcAlign, SrcOff));
4152 Store = DAG.getTruncStore(Chain, dl, Value,
4153 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4154 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4157 OutChains.push_back(Store);
4163 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4166 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4167 SDValue Chain, SDValue Dst,
4168 SDValue Src, uint64_t Size,
4169 unsigned Align, bool isVol,
4171 MachinePointerInfo DstPtrInfo,
4172 MachinePointerInfo SrcPtrInfo) {
4173 // Turn a memmove of undef to nop.
4174 if (Src.getOpcode() == ISD::UNDEF)
4177 // Expand memmove to a series of load and store ops if the size operand falls
4178 // below a certain threshold.
4179 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4180 std::vector<EVT> MemOps;
4181 bool DstAlignCanChange = false;
4182 MachineFunction &MF = DAG.getMachineFunction();
4183 MachineFrameInfo *MFI = MF.getFrameInfo();
4184 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4185 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4186 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4187 DstAlignCanChange = true;
4188 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4189 if (Align > SrcAlign)
4191 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4193 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4194 (DstAlignCanChange ? 0 : Align), SrcAlign,
4195 false, false, false, false, DAG, TLI))
4198 if (DstAlignCanChange) {
4199 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4200 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4201 if (NewAlign > Align) {
4202 // Give the stack frame object a larger alignment if needed.
4203 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4204 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4209 uint64_t SrcOff = 0, DstOff = 0;
4210 SmallVector<SDValue, 8> LoadValues;
4211 SmallVector<SDValue, 8> LoadChains;
4212 SmallVector<SDValue, 8> OutChains;
4213 unsigned NumMemOps = MemOps.size();
4214 for (unsigned i = 0; i < NumMemOps; i++) {
4216 unsigned VTSize = VT.getSizeInBits() / 8;
4219 Value = DAG.getLoad(VT, dl, Chain,
4220 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4221 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4222 false, false, SrcAlign);
4223 LoadValues.push_back(Value);
4224 LoadChains.push_back(Value.getValue(1));
4227 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4229 for (unsigned i = 0; i < NumMemOps; i++) {
4231 unsigned VTSize = VT.getSizeInBits() / 8;
4234 Store = DAG.getStore(Chain, dl, LoadValues[i],
4235 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4236 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4237 OutChains.push_back(Store);
4241 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4244 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4247 /// \param DAG Selection DAG where lowered code is placed.
4248 /// \param dl Link to corresponding IR location.
4249 /// \param Chain Control flow dependency.
4250 /// \param Dst Pointer to destination memory location.
4251 /// \param Src Value of byte to write into the memory.
4252 /// \param Size Number of bytes to write.
4253 /// \param Align Alignment of the destination in bytes.
4254 /// \param isVol True if destination is volatile.
4255 /// \param DstPtrInfo IR information on the memory pointer.
4256 /// \returns New head in the control flow, if lowering was successful, empty
4257 /// SDValue otherwise.
4259 /// The function tries to replace 'llvm.memset' intrinsic with several store
4260 /// operations and value calculation code. This is usually profitable for small
4262 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4263 SDValue Chain, SDValue Dst,
4264 SDValue Src, uint64_t Size,
4265 unsigned Align, bool isVol,
4266 MachinePointerInfo DstPtrInfo) {
4267 // Turn a memset of undef to nop.
4268 if (Src.getOpcode() == ISD::UNDEF)
4271 // Expand memset to a series of load/store ops if the size operand
4272 // falls below a certain threshold.
4273 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4274 std::vector<EVT> MemOps;
4275 bool DstAlignCanChange = false;
4276 MachineFunction &MF = DAG.getMachineFunction();
4277 MachineFrameInfo *MFI = MF.getFrameInfo();
4278 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4279 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4280 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4281 DstAlignCanChange = true;
4283 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4284 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4285 Size, (DstAlignCanChange ? 0 : Align), 0,
4286 true, IsZeroVal, false, true, DAG, TLI))
4289 if (DstAlignCanChange) {
4290 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4291 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4292 if (NewAlign > Align) {
4293 // Give the stack frame object a larger alignment if needed.
4294 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4295 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4300 SmallVector<SDValue, 8> OutChains;
4301 uint64_t DstOff = 0;
4302 unsigned NumMemOps = MemOps.size();
4304 // Find the largest store and generate the bit pattern for it.
4305 EVT LargestVT = MemOps[0];
4306 for (unsigned i = 1; i < NumMemOps; i++)
4307 if (MemOps[i].bitsGT(LargestVT))
4308 LargestVT = MemOps[i];
4309 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4311 for (unsigned i = 0; i < NumMemOps; i++) {
4313 unsigned VTSize = VT.getSizeInBits() / 8;
4314 if (VTSize > Size) {
4315 // Issuing an unaligned load / store pair that overlaps with the previous
4316 // pair. Adjust the offset accordingly.
4317 assert(i == NumMemOps-1 && i != 0);
4318 DstOff -= VTSize - Size;
4321 // If this store is smaller than the largest store see whether we can get
4322 // the smaller value for free with a truncate.
4323 SDValue Value = MemSetValue;
4324 if (VT.bitsLT(LargestVT)) {
4325 if (!LargestVT.isVector() && !VT.isVector() &&
4326 TLI.isTruncateFree(LargestVT, VT))
4327 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4329 Value = getMemsetValue(Src, VT, DAG, dl);
4331 assert(Value.getValueType() == VT && "Value with wrong type.");
4332 SDValue Store = DAG.getStore(Chain, dl, Value,
4333 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4334 DstPtrInfo.getWithOffset(DstOff),
4335 isVol, false, Align);
4336 OutChains.push_back(Store);
4337 DstOff += VT.getSizeInBits() / 8;
4341 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4344 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4345 SDValue Src, SDValue Size,
4346 unsigned Align, bool isVol, bool AlwaysInline,
4347 bool isTailCall, MachinePointerInfo DstPtrInfo,
4348 MachinePointerInfo SrcPtrInfo) {
4349 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4351 // Check to see if we should lower the memcpy to loads and stores first.
4352 // For cases within the target-specified limits, this is the best choice.
4353 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4355 // Memcpy with size zero? Just return the original chain.
4356 if (ConstantSize->isNullValue())
4359 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4360 ConstantSize->getZExtValue(),Align,
4361 isVol, false, DstPtrInfo, SrcPtrInfo);
4362 if (Result.getNode())
4366 // Then check to see if we should lower the memcpy with target-specific
4367 // code. If the target chooses to do this, this is the next best.
4369 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4370 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4371 DstPtrInfo, SrcPtrInfo);
4372 if (Result.getNode())
4376 // If we really need inline code and the target declined to provide it,
4377 // use a (potentially long) sequence of loads and stores.
4379 assert(ConstantSize && "AlwaysInline requires a constant size!");
4380 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4381 ConstantSize->getZExtValue(), Align, isVol,
4382 true, DstPtrInfo, SrcPtrInfo);
4385 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4386 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4387 // respect volatile, so they may do things like read or write memory
4388 // beyond the given memory regions. But fixing this isn't easy, and most
4389 // people don't care.
4391 // Emit a library call.
4392 TargetLowering::ArgListTy Args;
4393 TargetLowering::ArgListEntry Entry;
4394 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4395 Entry.Node = Dst; Args.push_back(Entry);
4396 Entry.Node = Src; Args.push_back(Entry);
4397 Entry.Node = Size; Args.push_back(Entry);
4398 // FIXME: pass in SDLoc
4399 TargetLowering::CallLoweringInfo CLI(*this);
4400 CLI.setDebugLoc(dl).setChain(Chain)
4401 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4402 Type::getVoidTy(*getContext()),
4403 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4404 TLI->getPointerTy()), std::move(Args), 0)
4406 .setTailCall(isTailCall);
4408 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4409 return CallResult.second;
4412 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4413 SDValue Src, SDValue Size,
4414 unsigned Align, bool isVol, bool isTailCall,
4415 MachinePointerInfo DstPtrInfo,
4416 MachinePointerInfo SrcPtrInfo) {
4417 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4419 // Check to see if we should lower the memmove to loads and stores first.
4420 // For cases within the target-specified limits, this is the best choice.
4421 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4423 // Memmove with size zero? Just return the original chain.
4424 if (ConstantSize->isNullValue())
4428 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4429 ConstantSize->getZExtValue(), Align, isVol,
4430 false, DstPtrInfo, SrcPtrInfo);
4431 if (Result.getNode())
4435 // Then check to see if we should lower the memmove with target-specific
4436 // code. If the target chooses to do this, this is the next best.
4438 SDValue Result = TSI->EmitTargetCodeForMemmove(
4439 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4440 if (Result.getNode())
4444 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4445 // not be safe. See memcpy above for more details.
4447 // Emit a library call.
4448 TargetLowering::ArgListTy Args;
4449 TargetLowering::ArgListEntry Entry;
4450 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4451 Entry.Node = Dst; Args.push_back(Entry);
4452 Entry.Node = Src; Args.push_back(Entry);
4453 Entry.Node = Size; Args.push_back(Entry);
4454 // FIXME: pass in SDLoc
4455 TargetLowering::CallLoweringInfo CLI(*this);
4456 CLI.setDebugLoc(dl).setChain(Chain)
4457 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4458 Type::getVoidTy(*getContext()),
4459 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4460 TLI->getPointerTy()), std::move(Args), 0)
4462 .setTailCall(isTailCall);
4464 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4465 return CallResult.second;
4468 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4469 SDValue Src, SDValue Size,
4470 unsigned Align, bool isVol, bool isTailCall,
4471 MachinePointerInfo DstPtrInfo) {
4472 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4474 // Check to see if we should lower the memset to stores first.
4475 // For cases within the target-specified limits, this is the best choice.
4476 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4478 // Memset with size zero? Just return the original chain.
4479 if (ConstantSize->isNullValue())
4483 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4484 Align, isVol, DstPtrInfo);
4486 if (Result.getNode())
4490 // Then check to see if we should lower the memset with target-specific
4491 // code. If the target chooses to do this, this is the next best.
4493 SDValue Result = TSI->EmitTargetCodeForMemset(
4494 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4495 if (Result.getNode())
4499 // Emit a library call.
4500 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4501 TargetLowering::ArgListTy Args;
4502 TargetLowering::ArgListEntry Entry;
4503 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4504 Args.push_back(Entry);
4506 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4507 Args.push_back(Entry);
4509 Entry.Ty = IntPtrTy;
4510 Args.push_back(Entry);
4512 // FIXME: pass in SDLoc
4513 TargetLowering::CallLoweringInfo CLI(*this);
4514 CLI.setDebugLoc(dl).setChain(Chain)
4515 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4516 Type::getVoidTy(*getContext()),
4517 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4518 TLI->getPointerTy()), std::move(Args), 0)
4520 .setTailCall(isTailCall);
4522 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4523 return CallResult.second;
4526 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4527 SDVTList VTList, ArrayRef<SDValue> Ops,
4528 MachineMemOperand *MMO,
4529 AtomicOrdering SuccessOrdering,
4530 AtomicOrdering FailureOrdering,
4531 SynchronizationScope SynchScope) {
4532 FoldingSetNodeID ID;
4533 ID.AddInteger(MemVT.getRawBits());
4534 AddNodeIDNode(ID, Opcode, VTList, Ops);
4535 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4537 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4538 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4539 return SDValue(E, 0);
4542 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4543 // SDNode doesn't have access to it. This memory will be "leaked" when
4544 // the node is deallocated, but recovered when the allocator is released.
4545 // If the number of operands is less than 5 we use AtomicSDNode's internal
4547 unsigned NumOps = Ops.size();
4548 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4551 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4552 dl.getDebugLoc(), VTList, MemVT,
4553 Ops.data(), DynOps, NumOps, MMO,
4554 SuccessOrdering, FailureOrdering,
4556 CSEMap.InsertNode(N, IP);
4558 return SDValue(N, 0);
4561 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4562 SDVTList VTList, ArrayRef<SDValue> Ops,
4563 MachineMemOperand *MMO,
4564 AtomicOrdering Ordering,
4565 SynchronizationScope SynchScope) {
4566 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4567 Ordering, SynchScope);
4570 SDValue SelectionDAG::getAtomicCmpSwap(
4571 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4572 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4573 unsigned Alignment, AtomicOrdering SuccessOrdering,
4574 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4575 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4576 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4577 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4579 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4580 Alignment = getEVTAlignment(MemVT);
4582 MachineFunction &MF = getMachineFunction();
4584 // FIXME: Volatile isn't really correct; we should keep track of atomic
4585 // orderings in the memoperand.
4586 unsigned Flags = MachineMemOperand::MOVolatile;
4587 Flags |= MachineMemOperand::MOLoad;
4588 Flags |= MachineMemOperand::MOStore;
4590 MachineMemOperand *MMO =
4591 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4593 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4594 SuccessOrdering, FailureOrdering, SynchScope);
4597 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4598 SDVTList VTs, SDValue Chain, SDValue Ptr,
4599 SDValue Cmp, SDValue Swp,
4600 MachineMemOperand *MMO,
4601 AtomicOrdering SuccessOrdering,
4602 AtomicOrdering FailureOrdering,
4603 SynchronizationScope SynchScope) {
4604 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4605 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4606 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4608 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4609 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4610 SuccessOrdering, FailureOrdering, SynchScope);
4613 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4615 SDValue Ptr, SDValue Val,
4616 const Value* PtrVal,
4618 AtomicOrdering Ordering,
4619 SynchronizationScope SynchScope) {
4620 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4621 Alignment = getEVTAlignment(MemVT);
4623 MachineFunction &MF = getMachineFunction();
4624 // An atomic store does not load. An atomic load does not store.
4625 // (An atomicrmw obviously both loads and stores.)
4626 // For now, atomics are considered to be volatile always, and they are
4628 // FIXME: Volatile isn't really correct; we should keep track of atomic
4629 // orderings in the memoperand.
4630 unsigned Flags = MachineMemOperand::MOVolatile;
4631 if (Opcode != ISD::ATOMIC_STORE)
4632 Flags |= MachineMemOperand::MOLoad;
4633 if (Opcode != ISD::ATOMIC_LOAD)
4634 Flags |= MachineMemOperand::MOStore;
4636 MachineMemOperand *MMO =
4637 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4638 MemVT.getStoreSize(), Alignment);
4640 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4641 Ordering, SynchScope);
4644 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4646 SDValue Ptr, SDValue Val,
4647 MachineMemOperand *MMO,
4648 AtomicOrdering Ordering,
4649 SynchronizationScope SynchScope) {
4650 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4651 Opcode == ISD::ATOMIC_LOAD_SUB ||
4652 Opcode == ISD::ATOMIC_LOAD_AND ||
4653 Opcode == ISD::ATOMIC_LOAD_OR ||
4654 Opcode == ISD::ATOMIC_LOAD_XOR ||
4655 Opcode == ISD::ATOMIC_LOAD_NAND ||
4656 Opcode == ISD::ATOMIC_LOAD_MIN ||
4657 Opcode == ISD::ATOMIC_LOAD_MAX ||
4658 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4659 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4660 Opcode == ISD::ATOMIC_SWAP ||
4661 Opcode == ISD::ATOMIC_STORE) &&
4662 "Invalid Atomic Op");
4664 EVT VT = Val.getValueType();
4666 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4667 getVTList(VT, MVT::Other);
4668 SDValue Ops[] = {Chain, Ptr, Val};
4669 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4672 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4673 EVT VT, SDValue Chain,
4675 MachineMemOperand *MMO,
4676 AtomicOrdering Ordering,
4677 SynchronizationScope SynchScope) {
4678 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4680 SDVTList VTs = getVTList(VT, MVT::Other);
4681 SDValue Ops[] = {Chain, Ptr};
4682 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4685 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4686 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4687 if (Ops.size() == 1)
4690 SmallVector<EVT, 4> VTs;
4691 VTs.reserve(Ops.size());
4692 for (unsigned i = 0; i < Ops.size(); ++i)
4693 VTs.push_back(Ops[i].getValueType());
4694 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4698 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4699 ArrayRef<SDValue> Ops,
4700 EVT MemVT, MachinePointerInfo PtrInfo,
4701 unsigned Align, bool Vol,
4702 bool ReadMem, bool WriteMem, unsigned Size) {
4703 if (Align == 0) // Ensure that codegen never sees alignment 0
4704 Align = getEVTAlignment(MemVT);
4706 MachineFunction &MF = getMachineFunction();
4709 Flags |= MachineMemOperand::MOStore;
4711 Flags |= MachineMemOperand::MOLoad;
4713 Flags |= MachineMemOperand::MOVolatile;
4715 Size = MemVT.getStoreSize();
4716 MachineMemOperand *MMO =
4717 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4719 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4723 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4724 ArrayRef<SDValue> Ops, EVT MemVT,
4725 MachineMemOperand *MMO) {
4726 assert((Opcode == ISD::INTRINSIC_VOID ||
4727 Opcode == ISD::INTRINSIC_W_CHAIN ||
4728 Opcode == ISD::PREFETCH ||
4729 Opcode == ISD::LIFETIME_START ||
4730 Opcode == ISD::LIFETIME_END ||
4731 (Opcode <= INT_MAX &&
4732 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4733 "Opcode is not a memory-accessing opcode!");
4735 // Memoize the node unless it returns a flag.
4736 MemIntrinsicSDNode *N;
4737 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4738 FoldingSetNodeID ID;
4739 AddNodeIDNode(ID, Opcode, VTList, Ops);
4740 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4742 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4743 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4744 return SDValue(E, 0);
4747 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4748 dl.getDebugLoc(), VTList, Ops,
4750 CSEMap.InsertNode(N, IP);
4752 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4753 dl.getDebugLoc(), VTList, Ops,
4757 return SDValue(N, 0);
4760 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4761 /// MachinePointerInfo record from it. This is particularly useful because the
4762 /// code generator has many cases where it doesn't bother passing in a
4763 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4764 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4765 // If this is FI+Offset, we can model it.
4766 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4767 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4769 // If this is (FI+Offset1)+Offset2, we can model it.
4770 if (Ptr.getOpcode() != ISD::ADD ||
4771 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4772 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4773 return MachinePointerInfo();
4775 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4776 return MachinePointerInfo::getFixedStack(FI, Offset+
4777 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4780 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4781 /// MachinePointerInfo record from it. This is particularly useful because the
4782 /// code generator has many cases where it doesn't bother passing in a
4783 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4784 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4785 // If the 'Offset' value isn't a constant, we can't handle this.
4786 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4787 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4788 if (OffsetOp.getOpcode() == ISD::UNDEF)
4789 return InferPointerInfo(Ptr);
4790 return MachinePointerInfo();
4795 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4796 EVT VT, SDLoc dl, SDValue Chain,
4797 SDValue Ptr, SDValue Offset,
4798 MachinePointerInfo PtrInfo, EVT MemVT,
4799 bool isVolatile, bool isNonTemporal, bool isInvariant,
4800 unsigned Alignment, const AAMDNodes &AAInfo,
4801 const MDNode *Ranges) {
4802 assert(Chain.getValueType() == MVT::Other &&
4803 "Invalid chain type");
4804 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4805 Alignment = getEVTAlignment(VT);
4807 unsigned Flags = MachineMemOperand::MOLoad;
4809 Flags |= MachineMemOperand::MOVolatile;
4811 Flags |= MachineMemOperand::MONonTemporal;
4813 Flags |= MachineMemOperand::MOInvariant;
4815 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4817 if (PtrInfo.V.isNull())
4818 PtrInfo = InferPointerInfo(Ptr, Offset);
4820 MachineFunction &MF = getMachineFunction();
4821 MachineMemOperand *MMO =
4822 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4824 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4828 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4829 EVT VT, SDLoc dl, SDValue Chain,
4830 SDValue Ptr, SDValue Offset, EVT MemVT,
4831 MachineMemOperand *MMO) {
4833 ExtType = ISD::NON_EXTLOAD;
4834 } else if (ExtType == ISD::NON_EXTLOAD) {
4835 assert(VT == MemVT && "Non-extending load from different memory type!");
4838 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4839 "Should only be an extending load, not truncating!");
4840 assert(VT.isInteger() == MemVT.isInteger() &&
4841 "Cannot convert from FP to Int or Int -> FP!");
4842 assert(VT.isVector() == MemVT.isVector() &&
4843 "Cannot use an ext load to convert to or from a vector!");
4844 assert((!VT.isVector() ||
4845 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4846 "Cannot use an ext load to change the number of vector elements!");
4849 bool Indexed = AM != ISD::UNINDEXED;
4850 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4851 "Unindexed load with an offset!");
4853 SDVTList VTs = Indexed ?
4854 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4855 SDValue Ops[] = { Chain, Ptr, Offset };
4856 FoldingSetNodeID ID;
4857 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4858 ID.AddInteger(MemVT.getRawBits());
4859 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4860 MMO->isNonTemporal(),
4861 MMO->isInvariant()));
4862 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4864 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4865 cast<LoadSDNode>(E)->refineAlignment(MMO);
4866 return SDValue(E, 0);
4868 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4869 dl.getDebugLoc(), VTs, AM, ExtType,
4871 CSEMap.InsertNode(N, IP);
4873 return SDValue(N, 0);
4876 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4877 SDValue Chain, SDValue Ptr,
4878 MachinePointerInfo PtrInfo,
4879 bool isVolatile, bool isNonTemporal,
4880 bool isInvariant, unsigned Alignment,
4881 const AAMDNodes &AAInfo,
4882 const MDNode *Ranges) {
4883 SDValue Undef = getUNDEF(Ptr.getValueType());
4884 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4885 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4889 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4890 SDValue Chain, SDValue Ptr,
4891 MachineMemOperand *MMO) {
4892 SDValue Undef = getUNDEF(Ptr.getValueType());
4893 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4897 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4898 SDValue Chain, SDValue Ptr,
4899 MachinePointerInfo PtrInfo, EVT MemVT,
4900 bool isVolatile, bool isNonTemporal,
4901 bool isInvariant, unsigned Alignment,
4902 const AAMDNodes &AAInfo) {
4903 SDValue Undef = getUNDEF(Ptr.getValueType());
4904 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4905 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4910 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4911 SDValue Chain, SDValue Ptr, EVT MemVT,
4912 MachineMemOperand *MMO) {
4913 SDValue Undef = getUNDEF(Ptr.getValueType());
4914 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4919 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4920 SDValue Offset, ISD::MemIndexedMode AM) {
4921 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4922 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4923 "Load is already a indexed load!");
4924 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4925 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4926 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4927 false, LD->getAlignment());
4930 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4931 SDValue Ptr, MachinePointerInfo PtrInfo,
4932 bool isVolatile, bool isNonTemporal,
4933 unsigned Alignment, const AAMDNodes &AAInfo) {
4934 assert(Chain.getValueType() == MVT::Other &&
4935 "Invalid chain type");
4936 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4937 Alignment = getEVTAlignment(Val.getValueType());
4939 unsigned Flags = MachineMemOperand::MOStore;
4941 Flags |= MachineMemOperand::MOVolatile;
4943 Flags |= MachineMemOperand::MONonTemporal;
4945 if (PtrInfo.V.isNull())
4946 PtrInfo = InferPointerInfo(Ptr);
4948 MachineFunction &MF = getMachineFunction();
4949 MachineMemOperand *MMO =
4950 MF.getMachineMemOperand(PtrInfo, Flags,
4951 Val.getValueType().getStoreSize(), Alignment,
4954 return getStore(Chain, dl, Val, Ptr, MMO);
4957 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4958 SDValue Ptr, MachineMemOperand *MMO) {
4959 assert(Chain.getValueType() == MVT::Other &&
4960 "Invalid chain type");
4961 EVT VT = Val.getValueType();
4962 SDVTList VTs = getVTList(MVT::Other);
4963 SDValue Undef = getUNDEF(Ptr.getValueType());
4964 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4965 FoldingSetNodeID ID;
4966 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4967 ID.AddInteger(VT.getRawBits());
4968 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4969 MMO->isNonTemporal(), MMO->isInvariant()));
4970 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4973 cast<StoreSDNode>(E)->refineAlignment(MMO);
4974 return SDValue(E, 0);
4976 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4977 dl.getDebugLoc(), VTs,
4978 ISD::UNINDEXED, false, VT, MMO);
4979 CSEMap.InsertNode(N, IP);
4981 return SDValue(N, 0);
4984 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4985 SDValue Ptr, MachinePointerInfo PtrInfo,
4986 EVT SVT,bool isVolatile, bool isNonTemporal,
4988 const AAMDNodes &AAInfo) {
4989 assert(Chain.getValueType() == MVT::Other &&
4990 "Invalid chain type");
4991 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4992 Alignment = getEVTAlignment(SVT);
4994 unsigned Flags = MachineMemOperand::MOStore;
4996 Flags |= MachineMemOperand::MOVolatile;
4998 Flags |= MachineMemOperand::MONonTemporal;
5000 if (PtrInfo.V.isNull())
5001 PtrInfo = InferPointerInfo(Ptr);
5003 MachineFunction &MF = getMachineFunction();
5004 MachineMemOperand *MMO =
5005 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
5008 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
5011 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5012 SDValue Ptr, EVT SVT,
5013 MachineMemOperand *MMO) {
5014 EVT VT = Val.getValueType();
5016 assert(Chain.getValueType() == MVT::Other &&
5017 "Invalid chain type");
5019 return getStore(Chain, dl, Val, Ptr, MMO);
5021 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
5022 "Should only be a truncating store, not extending!");
5023 assert(VT.isInteger() == SVT.isInteger() &&
5024 "Can't do FP-INT conversion!");
5025 assert(VT.isVector() == SVT.isVector() &&
5026 "Cannot use trunc store to convert to or from a vector!");
5027 assert((!VT.isVector() ||
5028 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
5029 "Cannot use trunc store to change the number of vector elements!");
5031 SDVTList VTs = getVTList(MVT::Other);
5032 SDValue Undef = getUNDEF(Ptr.getValueType());
5033 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5034 FoldingSetNodeID ID;
5035 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5036 ID.AddInteger(SVT.getRawBits());
5037 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
5038 MMO->isNonTemporal(), MMO->isInvariant()));
5039 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5042 cast<StoreSDNode>(E)->refineAlignment(MMO);
5043 return SDValue(E, 0);
5045 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5046 dl.getDebugLoc(), VTs,
5047 ISD::UNINDEXED, true, SVT, MMO);
5048 CSEMap.InsertNode(N, IP);
5050 return SDValue(N, 0);
5054 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5055 SDValue Offset, ISD::MemIndexedMode AM) {
5056 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5057 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5058 "Store is already a indexed store!");
5059 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5060 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5061 FoldingSetNodeID ID;
5062 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5063 ID.AddInteger(ST->getMemoryVT().getRawBits());
5064 ID.AddInteger(ST->getRawSubclassData());
5065 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5068 return SDValue(E, 0);
5070 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5071 dl.getDebugLoc(), VTs, AM,
5072 ST->isTruncatingStore(),
5074 ST->getMemOperand());
5075 CSEMap.InsertNode(N, IP);
5077 return SDValue(N, 0);
5081 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5082 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5083 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5085 SDVTList VTs = getVTList(VT, MVT::Other);
5086 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5087 FoldingSetNodeID ID;
5088 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5089 ID.AddInteger(VT.getRawBits());
5090 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5092 MMO->isNonTemporal(),
5093 MMO->isInvariant()));
5094 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5096 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5097 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5098 return SDValue(E, 0);
5100 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5101 dl.getDebugLoc(), Ops, 4, VTs,
5103 CSEMap.InsertNode(N, IP);
5105 return SDValue(N, 0);
5108 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5109 SDValue Ptr, SDValue Mask, EVT MemVT,
5110 MachineMemOperand *MMO, bool isTrunc) {
5111 assert(Chain.getValueType() == MVT::Other &&
5112 "Invalid chain type");
5113 EVT VT = Val.getValueType();
5114 SDVTList VTs = getVTList(MVT::Other);
5115 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5116 FoldingSetNodeID ID;
5117 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5118 ID.AddInteger(VT.getRawBits());
5119 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5120 MMO->isNonTemporal(), MMO->isInvariant()));
5121 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5124 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5125 return SDValue(E, 0);
5127 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5128 dl.getDebugLoc(), Ops, 4,
5129 VTs, isTrunc, MemVT, MMO);
5130 CSEMap.InsertNode(N, IP);
5132 return SDValue(N, 0);
5136 SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl,
5137 ArrayRef<SDValue> Ops,
5138 MachineMemOperand *MMO) {
5140 FoldingSetNodeID ID;
5141 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
5142 ID.AddInteger(VT.getRawBits());
5143 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
5145 MMO->isNonTemporal(),
5146 MMO->isInvariant()));
5147 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5149 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5150 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5151 return SDValue(E, 0);
5153 MaskedGatherSDNode *N =
5154 new (NodeAllocator) MaskedGatherSDNode(dl.getIROrder(), dl.getDebugLoc(),
5156 CSEMap.InsertNode(N, IP);
5158 return SDValue(N, 0);
5161 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl,
5162 ArrayRef<SDValue> Ops,
5163 MachineMemOperand *MMO) {
5164 FoldingSetNodeID ID;
5165 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
5166 ID.AddInteger(VT.getRawBits());
5167 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5168 MMO->isNonTemporal(),
5169 MMO->isInvariant()));
5170 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5173 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5174 return SDValue(E, 0);
5177 new (NodeAllocator) MaskedScatterSDNode(dl.getIROrder(), dl.getDebugLoc(),
5179 CSEMap.InsertNode(N, IP);
5181 return SDValue(N, 0);
5184 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5185 SDValue Chain, SDValue Ptr,
5188 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
5189 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5192 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5193 ArrayRef<SDUse> Ops) {
5194 switch (Ops.size()) {
5195 case 0: return getNode(Opcode, DL, VT);
5196 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5197 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5198 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5202 // Copy from an SDUse array into an SDValue array for use with
5203 // the regular getNode logic.
5204 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5205 return getNode(Opcode, DL, VT, NewOps);
5208 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5209 ArrayRef<SDValue> Ops) {
5210 unsigned NumOps = Ops.size();
5212 case 0: return getNode(Opcode, DL, VT);
5213 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5214 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5215 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5221 case ISD::SELECT_CC: {
5222 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5223 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5224 "LHS and RHS of condition must have same type!");
5225 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5226 "True and False arms of SelectCC must have same type!");
5227 assert(Ops[2].getValueType() == VT &&
5228 "select_cc node must be of same type as true and false value!");
5232 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5233 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5234 "LHS/RHS of comparison should match types!");
5241 SDVTList VTs = getVTList(VT);
5243 if (VT != MVT::Glue) {
5244 FoldingSetNodeID ID;
5245 AddNodeIDNode(ID, Opcode, VTs, Ops);
5248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5249 return SDValue(E, 0);
5251 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5253 CSEMap.InsertNode(N, IP);
5255 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5260 return SDValue(N, 0);
5263 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5264 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5265 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5268 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5269 ArrayRef<SDValue> Ops) {
5270 if (VTList.NumVTs == 1)
5271 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5275 // FIXME: figure out how to safely handle things like
5276 // int foo(int x) { return 1 << (x & 255); }
5277 // int bar() { return foo(256); }
5278 case ISD::SRA_PARTS:
5279 case ISD::SRL_PARTS:
5280 case ISD::SHL_PARTS:
5281 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5282 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5283 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5284 else if (N3.getOpcode() == ISD::AND)
5285 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5286 // If the and is only masking out bits that cannot effect the shift,
5287 // eliminate the and.
5288 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5289 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5290 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5296 // Memoize the node unless it returns a flag.
5298 unsigned NumOps = Ops.size();
5299 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5300 FoldingSetNodeID ID;
5301 AddNodeIDNode(ID, Opcode, VTList, Ops);
5303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5304 return SDValue(E, 0);
5307 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5308 DL.getDebugLoc(), VTList, Ops[0]);
5309 } else if (NumOps == 2) {
5310 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5311 DL.getDebugLoc(), VTList, Ops[0],
5313 } else if (NumOps == 3) {
5314 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5315 DL.getDebugLoc(), VTList, Ops[0],
5318 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5321 CSEMap.InsertNode(N, IP);
5324 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5325 DL.getDebugLoc(), VTList, Ops[0]);
5326 } else if (NumOps == 2) {
5327 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5328 DL.getDebugLoc(), VTList, Ops[0],
5330 } else if (NumOps == 3) {
5331 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5332 DL.getDebugLoc(), VTList, Ops[0],
5335 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5340 return SDValue(N, 0);
5343 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5344 return getNode(Opcode, DL, VTList, None);
5347 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5349 SDValue Ops[] = { N1 };
5350 return getNode(Opcode, DL, VTList, Ops);
5353 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5354 SDValue N1, SDValue N2) {
5355 SDValue Ops[] = { N1, N2 };
5356 return getNode(Opcode, DL, VTList, Ops);
5359 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5360 SDValue N1, SDValue N2, SDValue N3) {
5361 SDValue Ops[] = { N1, N2, N3 };
5362 return getNode(Opcode, DL, VTList, Ops);
5365 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5366 SDValue N1, SDValue N2, SDValue N3,
5368 SDValue Ops[] = { N1, N2, N3, N4 };
5369 return getNode(Opcode, DL, VTList, Ops);
5372 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5373 SDValue N1, SDValue N2, SDValue N3,
5374 SDValue N4, SDValue N5) {
5375 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5376 return getNode(Opcode, DL, VTList, Ops);
5379 SDVTList SelectionDAG::getVTList(EVT VT) {
5380 return makeVTList(SDNode::getValueTypeList(VT), 1);
5383 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5384 FoldingSetNodeID ID;
5386 ID.AddInteger(VT1.getRawBits());
5387 ID.AddInteger(VT2.getRawBits());
5390 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5392 EVT *Array = Allocator.Allocate<EVT>(2);
5395 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5396 VTListMap.InsertNode(Result, IP);
5398 return Result->getSDVTList();
5401 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5402 FoldingSetNodeID ID;
5404 ID.AddInteger(VT1.getRawBits());
5405 ID.AddInteger(VT2.getRawBits());
5406 ID.AddInteger(VT3.getRawBits());
5409 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5411 EVT *Array = Allocator.Allocate<EVT>(3);
5415 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5416 VTListMap.InsertNode(Result, IP);
5418 return Result->getSDVTList();
5421 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5422 FoldingSetNodeID ID;
5424 ID.AddInteger(VT1.getRawBits());
5425 ID.AddInteger(VT2.getRawBits());
5426 ID.AddInteger(VT3.getRawBits());
5427 ID.AddInteger(VT4.getRawBits());
5430 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5432 EVT *Array = Allocator.Allocate<EVT>(4);
5437 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5438 VTListMap.InsertNode(Result, IP);
5440 return Result->getSDVTList();
5443 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5444 unsigned NumVTs = VTs.size();
5445 FoldingSetNodeID ID;
5446 ID.AddInteger(NumVTs);
5447 for (unsigned index = 0; index < NumVTs; index++) {
5448 ID.AddInteger(VTs[index].getRawBits());
5452 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5454 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5455 std::copy(VTs.begin(), VTs.end(), Array);
5456 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5457 VTListMap.InsertNode(Result, IP);
5459 return Result->getSDVTList();
5463 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5464 /// specified operands. If the resultant node already exists in the DAG,
5465 /// this does not modify the specified node, instead it returns the node that
5466 /// already exists. If the resultant node does not exist in the DAG, the
5467 /// input node is returned. As a degenerate case, if you specify the same
5468 /// input operands as the node already has, the input node is returned.
5469 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5470 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5472 // Check to see if there is no change.
5473 if (Op == N->getOperand(0)) return N;
5475 // See if the modified node already exists.
5476 void *InsertPos = nullptr;
5477 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5480 // Nope it doesn't. Remove the node from its current place in the maps.
5482 if (!RemoveNodeFromCSEMaps(N))
5483 InsertPos = nullptr;
5485 // Now we update the operands.
5486 N->OperandList[0].set(Op);
5488 // If this gets put into a CSE map, add it.
5489 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5493 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5494 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5496 // Check to see if there is no change.
5497 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5498 return N; // No operands changed, just return the input node.
5500 // See if the modified node already exists.
5501 void *InsertPos = nullptr;
5502 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5505 // Nope it doesn't. Remove the node from its current place in the maps.
5507 if (!RemoveNodeFromCSEMaps(N))
5508 InsertPos = nullptr;
5510 // Now we update the operands.
5511 if (N->OperandList[0] != Op1)
5512 N->OperandList[0].set(Op1);
5513 if (N->OperandList[1] != Op2)
5514 N->OperandList[1].set(Op2);
5516 // If this gets put into a CSE map, add it.
5517 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5521 SDNode *SelectionDAG::
5522 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5523 SDValue Ops[] = { Op1, Op2, Op3 };
5524 return UpdateNodeOperands(N, Ops);
5527 SDNode *SelectionDAG::
5528 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5529 SDValue Op3, SDValue Op4) {
5530 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5531 return UpdateNodeOperands(N, Ops);
5534 SDNode *SelectionDAG::
5535 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5536 SDValue Op3, SDValue Op4, SDValue Op5) {
5537 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5538 return UpdateNodeOperands(N, Ops);
5541 SDNode *SelectionDAG::
5542 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5543 unsigned NumOps = Ops.size();
5544 assert(N->getNumOperands() == NumOps &&
5545 "Update with wrong number of operands");
5547 // If no operands changed just return the input node.
5548 if (Ops.empty() || std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5551 // See if the modified node already exists.
5552 void *InsertPos = nullptr;
5553 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5556 // Nope it doesn't. Remove the node from its current place in the maps.
5558 if (!RemoveNodeFromCSEMaps(N))
5559 InsertPos = nullptr;
5561 // Now we update the operands.
5562 for (unsigned i = 0; i != NumOps; ++i)
5563 if (N->OperandList[i] != Ops[i])
5564 N->OperandList[i].set(Ops[i]);
5566 // If this gets put into a CSE map, add it.
5567 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5571 /// DropOperands - Release the operands and set this node to have
5573 void SDNode::DropOperands() {
5574 // Unlike the code in MorphNodeTo that does this, we don't need to
5575 // watch for dead nodes here.
5576 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5582 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5585 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5587 SDVTList VTs = getVTList(VT);
5588 return SelectNodeTo(N, MachineOpc, VTs, None);
5591 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5592 EVT VT, SDValue Op1) {
5593 SDVTList VTs = getVTList(VT);
5594 SDValue Ops[] = { Op1 };
5595 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5598 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5599 EVT VT, SDValue Op1,
5601 SDVTList VTs = getVTList(VT);
5602 SDValue Ops[] = { Op1, Op2 };
5603 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5606 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5607 EVT VT, SDValue Op1,
5608 SDValue Op2, SDValue Op3) {
5609 SDVTList VTs = getVTList(VT);
5610 SDValue Ops[] = { Op1, Op2, Op3 };
5611 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5614 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5615 EVT VT, ArrayRef<SDValue> Ops) {
5616 SDVTList VTs = getVTList(VT);
5617 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5620 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5621 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5622 SDVTList VTs = getVTList(VT1, VT2);
5623 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5626 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5628 SDVTList VTs = getVTList(VT1, VT2);
5629 return SelectNodeTo(N, MachineOpc, VTs, None);
5632 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5633 EVT VT1, EVT VT2, EVT VT3,
5634 ArrayRef<SDValue> Ops) {
5635 SDVTList VTs = getVTList(VT1, VT2, VT3);
5636 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5639 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5640 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5641 ArrayRef<SDValue> Ops) {
5642 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5643 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5646 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5649 SDVTList VTs = getVTList(VT1, VT2);
5650 SDValue Ops[] = { Op1 };
5651 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5654 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5656 SDValue Op1, SDValue Op2) {
5657 SDVTList VTs = getVTList(VT1, VT2);
5658 SDValue Ops[] = { Op1, Op2 };
5659 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5662 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5664 SDValue Op1, SDValue Op2,
5666 SDVTList VTs = getVTList(VT1, VT2);
5667 SDValue Ops[] = { Op1, Op2, Op3 };
5668 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5671 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5672 EVT VT1, EVT VT2, EVT VT3,
5673 SDValue Op1, SDValue Op2,
5675 SDVTList VTs = getVTList(VT1, VT2, VT3);
5676 SDValue Ops[] = { Op1, Op2, Op3 };
5677 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5680 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5681 SDVTList VTs,ArrayRef<SDValue> Ops) {
5682 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5683 // Reset the NodeID to -1.
5688 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5689 /// the line number information on the merged node since it is not possible to
5690 /// preserve the information that operation is associated with multiple lines.
5691 /// This will make the debugger working better at -O0, were there is a higher
5692 /// probability having other instructions associated with that line.
5694 /// For IROrder, we keep the smaller of the two
5695 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5696 DebugLoc NLoc = N->getDebugLoc();
5697 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5698 N->setDebugLoc(DebugLoc());
5700 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5701 N->setIROrder(Order);
5705 /// MorphNodeTo - This *mutates* the specified node to have the specified
5706 /// return type, opcode, and operands.
5708 /// Note that MorphNodeTo returns the resultant node. If there is already a
5709 /// node of the specified opcode and operands, it returns that node instead of
5710 /// the current one. Note that the SDLoc need not be the same.
5712 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5713 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5714 /// node, and because it doesn't require CSE recalculation for any of
5715 /// the node's users.
5717 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5718 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5719 /// the legalizer which maintain worklists that would need to be updated when
5720 /// deleting things.
5721 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5722 SDVTList VTs, ArrayRef<SDValue> Ops) {
5723 unsigned NumOps = Ops.size();
5724 // If an identical node already exists, use it.
5726 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5727 FoldingSetNodeID ID;
5728 AddNodeIDNode(ID, Opc, VTs, Ops);
5729 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5730 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5733 if (!RemoveNodeFromCSEMaps(N))
5736 // Start the morphing.
5738 N->ValueList = VTs.VTs;
5739 N->NumValues = VTs.NumVTs;
5741 // Clear the operands list, updating used nodes to remove this from their
5742 // use list. Keep track of any operands that become dead as a result.
5743 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5744 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5746 SDNode *Used = Use.getNode();
5748 if (Used->use_empty())
5749 DeadNodeSet.insert(Used);
5752 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5753 // Initialize the memory references information.
5754 MN->setMemRefs(nullptr, nullptr);
5755 // If NumOps is larger than the # of operands we can have in a
5756 // MachineSDNode, reallocate the operand list.
5757 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5758 if (MN->OperandsNeedDelete)
5759 delete[] MN->OperandList;
5760 if (NumOps > array_lengthof(MN->LocalOperands))
5761 // We're creating a final node that will live unmorphed for the
5762 // remainder of the current SelectionDAG iteration, so we can allocate
5763 // the operands directly out of a pool with no recycling metadata.
5764 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5765 Ops.data(), NumOps);
5767 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5768 MN->OperandsNeedDelete = false;
5770 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5772 // If NumOps is larger than the # of operands we currently have, reallocate
5773 // the operand list.
5774 if (NumOps > N->NumOperands) {
5775 if (N->OperandsNeedDelete)
5776 delete[] N->OperandList;
5777 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5778 N->OperandsNeedDelete = true;
5780 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5783 // Delete any nodes that are still dead after adding the uses for the
5785 if (!DeadNodeSet.empty()) {
5786 SmallVector<SDNode *, 16> DeadNodes;
5787 for (SDNode *N : DeadNodeSet)
5789 DeadNodes.push_back(N);
5790 RemoveDeadNodes(DeadNodes);
5794 CSEMap.InsertNode(N, IP); // Memoize the new node.
5799 /// getMachineNode - These are used for target selectors to create a new node
5800 /// with specified return type(s), MachineInstr opcode, and operands.
5802 /// Note that getMachineNode returns the resultant node. If there is already a
5803 /// node of the specified opcode and operands, it returns that node instead of
5804 /// the current one.
5806 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5807 SDVTList VTs = getVTList(VT);
5808 return getMachineNode(Opcode, dl, VTs, None);
5812 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5813 SDVTList VTs = getVTList(VT);
5814 SDValue Ops[] = { Op1 };
5815 return getMachineNode(Opcode, dl, VTs, Ops);
5819 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5820 SDValue Op1, SDValue Op2) {
5821 SDVTList VTs = getVTList(VT);
5822 SDValue Ops[] = { Op1, Op2 };
5823 return getMachineNode(Opcode, dl, VTs, Ops);
5827 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5828 SDValue Op1, SDValue Op2, SDValue Op3) {
5829 SDVTList VTs = getVTList(VT);
5830 SDValue Ops[] = { Op1, Op2, Op3 };
5831 return getMachineNode(Opcode, dl, VTs, Ops);
5835 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5836 ArrayRef<SDValue> Ops) {
5837 SDVTList VTs = getVTList(VT);
5838 return getMachineNode(Opcode, dl, VTs, Ops);
5842 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5843 SDVTList VTs = getVTList(VT1, VT2);
5844 return getMachineNode(Opcode, dl, VTs, None);
5848 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5849 EVT VT1, EVT VT2, SDValue Op1) {
5850 SDVTList VTs = getVTList(VT1, VT2);
5851 SDValue Ops[] = { Op1 };
5852 return getMachineNode(Opcode, dl, VTs, Ops);
5856 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5857 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5858 SDVTList VTs = getVTList(VT1, VT2);
5859 SDValue Ops[] = { Op1, Op2 };
5860 return getMachineNode(Opcode, dl, VTs, Ops);
5864 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5865 EVT VT1, EVT VT2, SDValue Op1,
5866 SDValue Op2, SDValue Op3) {
5867 SDVTList VTs = getVTList(VT1, VT2);
5868 SDValue Ops[] = { Op1, Op2, Op3 };
5869 return getMachineNode(Opcode, dl, VTs, Ops);
5873 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5875 ArrayRef<SDValue> Ops) {
5876 SDVTList VTs = getVTList(VT1, VT2);
5877 return getMachineNode(Opcode, dl, VTs, Ops);
5881 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5882 EVT VT1, EVT VT2, EVT VT3,
5883 SDValue Op1, SDValue Op2) {
5884 SDVTList VTs = getVTList(VT1, VT2, VT3);
5885 SDValue Ops[] = { Op1, Op2 };
5886 return getMachineNode(Opcode, dl, VTs, Ops);
5890 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5891 EVT VT1, EVT VT2, EVT VT3,
5892 SDValue Op1, SDValue Op2, SDValue Op3) {
5893 SDVTList VTs = getVTList(VT1, VT2, VT3);
5894 SDValue Ops[] = { Op1, Op2, Op3 };
5895 return getMachineNode(Opcode, dl, VTs, Ops);
5899 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5900 EVT VT1, EVT VT2, EVT VT3,
5901 ArrayRef<SDValue> Ops) {
5902 SDVTList VTs = getVTList(VT1, VT2, VT3);
5903 return getMachineNode(Opcode, dl, VTs, Ops);
5907 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5908 EVT VT2, EVT VT3, EVT VT4,
5909 ArrayRef<SDValue> Ops) {
5910 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5911 return getMachineNode(Opcode, dl, VTs, Ops);
5915 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5916 ArrayRef<EVT> ResultTys,
5917 ArrayRef<SDValue> Ops) {
5918 SDVTList VTs = getVTList(ResultTys);
5919 return getMachineNode(Opcode, dl, VTs, Ops);
5923 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5924 ArrayRef<SDValue> OpsArray) {
5925 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5928 const SDValue *Ops = OpsArray.data();
5929 unsigned NumOps = OpsArray.size();
5932 FoldingSetNodeID ID;
5933 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5936 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5940 // Allocate a new MachineSDNode.
5941 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5942 DL.getDebugLoc(), VTs);
5944 // Initialize the operands list.
5945 if (NumOps > array_lengthof(N->LocalOperands))
5946 // We're creating a final node that will live unmorphed for the
5947 // remainder of the current SelectionDAG iteration, so we can allocate
5948 // the operands directly out of a pool with no recycling metadata.
5949 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5952 N->InitOperands(N->LocalOperands, Ops, NumOps);
5953 N->OperandsNeedDelete = false;
5956 CSEMap.InsertNode(N, IP);
5962 /// getTargetExtractSubreg - A convenience function for creating
5963 /// TargetOpcode::EXTRACT_SUBREG nodes.
5965 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5967 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
5968 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5969 VT, Operand, SRIdxVal);
5970 return SDValue(Subreg, 0);
5973 /// getTargetInsertSubreg - A convenience function for creating
5974 /// TargetOpcode::INSERT_SUBREG nodes.
5976 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5977 SDValue Operand, SDValue Subreg) {
5978 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
5979 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5980 VT, Operand, Subreg, SRIdxVal);
5981 return SDValue(Result, 0);
5984 /// getNodeIfExists - Get the specified node if it's already available, or
5985 /// else return NULL.
5986 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5987 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5989 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5990 FoldingSetNodeID ID;
5991 AddNodeIDNode(ID, Opcode, VTList, Ops);
5992 if (isBinOpWithFlags(Opcode))
5993 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5995 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
6001 /// getDbgValue - Creates a SDDbgValue node.
6004 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
6005 unsigned R, bool IsIndirect, uint64_t Off,
6006 DebugLoc DL, unsigned O) {
6007 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6008 "Expected inlined-at fields to agree");
6009 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6013 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
6014 const Value *C, uint64_t Off,
6015 DebugLoc DL, unsigned O) {
6016 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6017 "Expected inlined-at fields to agree");
6018 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
6022 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
6023 unsigned FI, uint64_t Off,
6024 DebugLoc DL, unsigned O) {
6025 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6026 "Expected inlined-at fields to agree");
6027 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
6032 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
6033 /// pointed to by a use iterator is deleted, increment the use iterator
6034 /// so that it doesn't dangle.
6036 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
6037 SDNode::use_iterator &UI;
6038 SDNode::use_iterator &UE;
6040 void NodeDeleted(SDNode *N, SDNode *E) override {
6041 // Increment the iterator as needed.
6042 while (UI != UE && N == *UI)
6047 RAUWUpdateListener(SelectionDAG &d,
6048 SDNode::use_iterator &ui,
6049 SDNode::use_iterator &ue)
6050 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6055 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6056 /// This can cause recursive merging of nodes in the DAG.
6058 /// This version assumes From has a single result value.
6060 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
6061 SDNode *From = FromN.getNode();
6062 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6063 "Cannot replace with this method!");
6064 assert(From != To.getNode() && "Cannot replace uses of with self");
6066 // Iterate over all the existing uses of From. New uses will be added
6067 // to the beginning of the use list, which we avoid visiting.
6068 // This specifically avoids visiting uses of From that arise while the
6069 // replacement is happening, because any such uses would be the result
6070 // of CSE: If an existing node looks like From after one of its operands
6071 // is replaced by To, we don't want to replace of all its users with To
6072 // too. See PR3018 for more info.
6073 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6074 RAUWUpdateListener Listener(*this, UI, UE);
6078 // This node is about to morph, remove its old self from the CSE maps.
6079 RemoveNodeFromCSEMaps(User);
6081 // A user can appear in a use list multiple times, and when this
6082 // happens the uses are usually next to each other in the list.
6083 // To help reduce the number of CSE recomputations, process all
6084 // the uses of this user that we can find this way.
6086 SDUse &Use = UI.getUse();
6089 } while (UI != UE && *UI == User);
6091 // Now that we have modified User, add it back to the CSE maps. If it
6092 // already exists there, recursively merge the results together.
6093 AddModifiedNodeToCSEMaps(User);
6096 // If we just RAUW'd the root, take note.
6097 if (FromN == getRoot())
6101 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6102 /// This can cause recursive merging of nodes in the DAG.
6104 /// This version assumes that for each value of From, there is a
6105 /// corresponding value in To in the same position with the same type.
6107 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6109 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6110 assert((!From->hasAnyUseOfValue(i) ||
6111 From->getValueType(i) == To->getValueType(i)) &&
6112 "Cannot use this version of ReplaceAllUsesWith!");
6115 // Handle the trivial case.
6119 // Iterate over just the existing users of From. See the comments in
6120 // the ReplaceAllUsesWith above.
6121 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6122 RAUWUpdateListener Listener(*this, UI, UE);
6126 // This node is about to morph, remove its old self from the CSE maps.
6127 RemoveNodeFromCSEMaps(User);
6129 // A user can appear in a use list multiple times, and when this
6130 // happens the uses are usually next to each other in the list.
6131 // To help reduce the number of CSE recomputations, process all
6132 // the uses of this user that we can find this way.
6134 SDUse &Use = UI.getUse();
6137 } while (UI != UE && *UI == User);
6139 // Now that we have modified User, add it back to the CSE maps. If it
6140 // already exists there, recursively merge the results together.
6141 AddModifiedNodeToCSEMaps(User);
6144 // If we just RAUW'd the root, take note.
6145 if (From == getRoot().getNode())
6146 setRoot(SDValue(To, getRoot().getResNo()));
6149 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6150 /// This can cause recursive merging of nodes in the DAG.
6152 /// This version can replace From with any result values. To must match the
6153 /// number and types of values returned by From.
6154 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6155 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6156 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6158 // Iterate over just the existing users of From. See the comments in
6159 // the ReplaceAllUsesWith above.
6160 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6161 RAUWUpdateListener Listener(*this, UI, UE);
6165 // This node is about to morph, remove its old self from the CSE maps.
6166 RemoveNodeFromCSEMaps(User);
6168 // A user can appear in a use list multiple times, and when this
6169 // happens the uses are usually next to each other in the list.
6170 // To help reduce the number of CSE recomputations, process all
6171 // the uses of this user that we can find this way.
6173 SDUse &Use = UI.getUse();
6174 const SDValue &ToOp = To[Use.getResNo()];
6177 } while (UI != UE && *UI == User);
6179 // Now that we have modified User, add it back to the CSE maps. If it
6180 // already exists there, recursively merge the results together.
6181 AddModifiedNodeToCSEMaps(User);
6184 // If we just RAUW'd the root, take note.
6185 if (From == getRoot().getNode())
6186 setRoot(SDValue(To[getRoot().getResNo()]));
6189 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6190 /// uses of other values produced by From.getNode() alone. The Deleted
6191 /// vector is handled the same way as for ReplaceAllUsesWith.
6192 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6193 // Handle the really simple, really trivial case efficiently.
6194 if (From == To) return;
6196 // Handle the simple, trivial, case efficiently.
6197 if (From.getNode()->getNumValues() == 1) {
6198 ReplaceAllUsesWith(From, To);
6202 // Iterate over just the existing users of From. See the comments in
6203 // the ReplaceAllUsesWith above.
6204 SDNode::use_iterator UI = From.getNode()->use_begin(),
6205 UE = From.getNode()->use_end();
6206 RAUWUpdateListener Listener(*this, UI, UE);
6209 bool UserRemovedFromCSEMaps = false;
6211 // A user can appear in a use list multiple times, and when this
6212 // happens the uses are usually next to each other in the list.
6213 // To help reduce the number of CSE recomputations, process all
6214 // the uses of this user that we can find this way.
6216 SDUse &Use = UI.getUse();
6218 // Skip uses of different values from the same node.
6219 if (Use.getResNo() != From.getResNo()) {
6224 // If this node hasn't been modified yet, it's still in the CSE maps,
6225 // so remove its old self from the CSE maps.
6226 if (!UserRemovedFromCSEMaps) {
6227 RemoveNodeFromCSEMaps(User);
6228 UserRemovedFromCSEMaps = true;
6233 } while (UI != UE && *UI == User);
6235 // We are iterating over all uses of the From node, so if a use
6236 // doesn't use the specific value, no changes are made.
6237 if (!UserRemovedFromCSEMaps)
6240 // Now that we have modified User, add it back to the CSE maps. If it
6241 // already exists there, recursively merge the results together.
6242 AddModifiedNodeToCSEMaps(User);
6245 // If we just RAUW'd the root, take note.
6246 if (From == getRoot())
6251 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6252 /// to record information about a use.
6259 /// operator< - Sort Memos by User.
6260 bool operator<(const UseMemo &L, const UseMemo &R) {
6261 return (intptr_t)L.User < (intptr_t)R.User;
6265 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6266 /// uses of other values produced by From.getNode() alone. The same value
6267 /// may appear in both the From and To list. The Deleted vector is
6268 /// handled the same way as for ReplaceAllUsesWith.
6269 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6272 // Handle the simple, trivial case efficiently.
6274 return ReplaceAllUsesOfValueWith(*From, *To);
6276 // Read up all the uses and make records of them. This helps
6277 // processing new uses that are introduced during the
6278 // replacement process.
6279 SmallVector<UseMemo, 4> Uses;
6280 for (unsigned i = 0; i != Num; ++i) {
6281 unsigned FromResNo = From[i].getResNo();
6282 SDNode *FromNode = From[i].getNode();
6283 for (SDNode::use_iterator UI = FromNode->use_begin(),
6284 E = FromNode->use_end(); UI != E; ++UI) {
6285 SDUse &Use = UI.getUse();
6286 if (Use.getResNo() == FromResNo) {
6287 UseMemo Memo = { *UI, i, &Use };
6288 Uses.push_back(Memo);
6293 // Sort the uses, so that all the uses from a given User are together.
6294 std::sort(Uses.begin(), Uses.end());
6296 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6297 UseIndex != UseIndexEnd; ) {
6298 // We know that this user uses some value of From. If it is the right
6299 // value, update it.
6300 SDNode *User = Uses[UseIndex].User;
6302 // This node is about to morph, remove its old self from the CSE maps.
6303 RemoveNodeFromCSEMaps(User);
6305 // The Uses array is sorted, so all the uses for a given User
6306 // are next to each other in the list.
6307 // To help reduce the number of CSE recomputations, process all
6308 // the uses of this user that we can find this way.
6310 unsigned i = Uses[UseIndex].Index;
6311 SDUse &Use = *Uses[UseIndex].Use;
6315 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6317 // Now that we have modified User, add it back to the CSE maps. If it
6318 // already exists there, recursively merge the results together.
6319 AddModifiedNodeToCSEMaps(User);
6323 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6324 /// based on their topological order. It returns the maximum id and a vector
6325 /// of the SDNodes* in assigned order by reference.
6326 unsigned SelectionDAG::AssignTopologicalOrder() {
6328 unsigned DAGSize = 0;
6330 // SortedPos tracks the progress of the algorithm. Nodes before it are
6331 // sorted, nodes after it are unsorted. When the algorithm completes
6332 // it is at the end of the list.
6333 allnodes_iterator SortedPos = allnodes_begin();
6335 // Visit all the nodes. Move nodes with no operands to the front of
6336 // the list immediately. Annotate nodes that do have operands with their
6337 // operand count. Before we do this, the Node Id fields of the nodes
6338 // may contain arbitrary values. After, the Node Id fields for nodes
6339 // before SortedPos will contain the topological sort index, and the
6340 // Node Id fields for nodes At SortedPos and after will contain the
6341 // count of outstanding operands.
6342 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6344 checkForCycles(N, this);
6345 unsigned Degree = N->getNumOperands();
6347 // A node with no uses, add it to the result array immediately.
6348 N->setNodeId(DAGSize++);
6349 allnodes_iterator Q = N;
6351 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6352 assert(SortedPos != AllNodes.end() && "Overran node list");
6355 // Temporarily use the Node Id as scratch space for the degree count.
6356 N->setNodeId(Degree);
6360 // Visit all the nodes. As we iterate, move nodes into sorted order,
6361 // such that by the time the end is reached all nodes will be sorted.
6362 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6364 checkForCycles(N, this);
6365 // N is in sorted position, so all its uses have one less operand
6366 // that needs to be sorted.
6367 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6370 unsigned Degree = P->getNodeId();
6371 assert(Degree != 0 && "Invalid node degree");
6374 // All of P's operands are sorted, so P may sorted now.
6375 P->setNodeId(DAGSize++);
6377 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6378 assert(SortedPos != AllNodes.end() && "Overran node list");
6381 // Update P's outstanding operand count.
6382 P->setNodeId(Degree);
6385 if (I == SortedPos) {
6388 dbgs() << "Overran sorted position:\n";
6389 S->dumprFull(this); dbgs() << "\n";
6390 dbgs() << "Checking if this is due to cycles\n";
6391 checkForCycles(this, true);
6393 llvm_unreachable(nullptr);
6397 assert(SortedPos == AllNodes.end() &&
6398 "Topological sort incomplete!");
6399 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6400 "First node in topological sort is not the entry token!");
6401 assert(AllNodes.front().getNodeId() == 0 &&
6402 "First node in topological sort has non-zero id!");
6403 assert(AllNodes.front().getNumOperands() == 0 &&
6404 "First node in topological sort has operands!");
6405 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6406 "Last node in topologic sort has unexpected id!");
6407 assert(AllNodes.back().use_empty() &&
6408 "Last node in topologic sort has users!");
6409 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6413 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6414 /// value is produced by SD.
6415 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6417 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6418 SD->setHasDebugValue(true);
6420 DbgInfo->add(DB, SD, isParameter);
6423 /// TransferDbgValues - Transfer SDDbgValues.
6424 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6425 if (From == To || !From.getNode()->getHasDebugValue())
6427 SDNode *FromNode = From.getNode();
6428 SDNode *ToNode = To.getNode();
6429 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6430 SmallVector<SDDbgValue *, 2> ClonedDVs;
6431 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6433 SDDbgValue *Dbg = *I;
6434 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6436 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6437 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6438 Dbg->getDebugLoc(), Dbg->getOrder());
6439 ClonedDVs.push_back(Clone);
6442 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6443 E = ClonedDVs.end(); I != E; ++I)
6444 AddDbgValue(*I, ToNode, false);
6447 //===----------------------------------------------------------------------===//
6449 //===----------------------------------------------------------------------===//
6451 HandleSDNode::~HandleSDNode() {
6455 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6456 DebugLoc DL, const GlobalValue *GA,
6457 EVT VT, int64_t o, unsigned char TF)
6458 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6462 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6463 SDValue X, unsigned SrcAS,
6465 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6466 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6468 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6469 EVT memvt, MachineMemOperand *mmo)
6470 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6471 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6472 MMO->isNonTemporal(), MMO->isInvariant());
6473 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6474 assert(isNonTemporal() == MMO->isNonTemporal() &&
6475 "Non-temporal encoding error!");
6476 // We check here that the size of the memory operand fits within the size of
6477 // the MMO. This is because the MMO might indicate only a possible address
6478 // range instead of specifying the affected memory addresses precisely.
6479 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6482 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6483 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6484 : SDNode(Opc, Order, dl, VTs, Ops),
6485 MemoryVT(memvt), MMO(mmo) {
6486 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6487 MMO->isNonTemporal(), MMO->isInvariant());
6488 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6489 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6492 /// Profile - Gather unique data for the node.
6494 void SDNode::Profile(FoldingSetNodeID &ID) const {
6495 AddNodeIDNode(ID, this);
6500 std::vector<EVT> VTs;
6503 VTs.reserve(MVT::LAST_VALUETYPE);
6504 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6505 VTs.push_back(MVT((MVT::SimpleValueType)i));
6510 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6511 static ManagedStatic<EVTArray> SimpleVTArray;
6512 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6514 /// getValueTypeList - Return a pointer to the specified value type.
6516 const EVT *SDNode::getValueTypeList(EVT VT) {
6517 if (VT.isExtended()) {
6518 sys::SmartScopedLock<true> Lock(*VTMutex);
6519 return &(*EVTs->insert(VT).first);
6521 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6522 "Value type out of range!");
6523 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6527 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6528 /// indicated value. This method ignores uses of other values defined by this
6530 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6531 assert(Value < getNumValues() && "Bad value!");
6533 // TODO: Only iterate over uses of a given value of the node
6534 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6535 if (UI.getUse().getResNo() == Value) {
6542 // Found exactly the right number of uses?
6547 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6548 /// value. This method ignores uses of other values defined by this operation.
6549 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6550 assert(Value < getNumValues() && "Bad value!");
6552 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6553 if (UI.getUse().getResNo() == Value)
6560 /// isOnlyUserOf - Return true if this node is the only use of N.
6562 bool SDNode::isOnlyUserOf(SDNode *N) const {
6564 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6575 /// isOperand - Return true if this node is an operand of N.
6577 bool SDValue::isOperandOf(SDNode *N) const {
6578 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6579 if (*this == N->getOperand(i))
6584 bool SDNode::isOperandOf(SDNode *N) const {
6585 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6586 if (this == N->OperandList[i].getNode())
6591 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6592 /// be a chain) reaches the specified operand without crossing any
6593 /// side-effecting instructions on any chain path. In practice, this looks
6594 /// through token factors and non-volatile loads. In order to remain efficient,
6595 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6596 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6597 unsigned Depth) const {
6598 if (*this == Dest) return true;
6600 // Don't search too deeply, we just want to be able to see through
6601 // TokenFactor's etc.
6602 if (Depth == 0) return false;
6604 // If this is a token factor, all inputs to the TF happen in parallel. If any
6605 // of the operands of the TF does not reach dest, then we cannot do the xform.
6606 if (getOpcode() == ISD::TokenFactor) {
6607 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6608 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6613 // Loads don't have side effects, look through them.
6614 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6615 if (!Ld->isVolatile())
6616 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6621 /// hasPredecessor - Return true if N is a predecessor of this node.
6622 /// N is either an operand of this node, or can be reached by recursively
6623 /// traversing up the operands.
6624 /// NOTE: This is an expensive method. Use it carefully.
6625 bool SDNode::hasPredecessor(const SDNode *N) const {
6626 SmallPtrSet<const SDNode *, 32> Visited;
6627 SmallVector<const SDNode *, 16> Worklist;
6628 return hasPredecessorHelper(N, Visited, Worklist);
6632 SDNode::hasPredecessorHelper(const SDNode *N,
6633 SmallPtrSetImpl<const SDNode *> &Visited,
6634 SmallVectorImpl<const SDNode *> &Worklist) const {
6635 if (Visited.empty()) {
6636 Worklist.push_back(this);
6638 // Take a look in the visited set. If we've already encountered this node
6639 // we needn't search further.
6640 if (Visited.count(N))
6644 // Haven't visited N yet. Continue the search.
6645 while (!Worklist.empty()) {
6646 const SDNode *M = Worklist.pop_back_val();
6647 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6648 SDNode *Op = M->getOperand(i).getNode();
6649 if (Visited.insert(Op).second)
6650 Worklist.push_back(Op);
6659 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6660 assert(Num < NumOperands && "Invalid child # of SDNode!");
6661 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6664 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6665 assert(N->getNumValues() == 1 &&
6666 "Can't unroll a vector with multiple results!");
6668 EVT VT = N->getValueType(0);
6669 unsigned NE = VT.getVectorNumElements();
6670 EVT EltVT = VT.getVectorElementType();
6673 SmallVector<SDValue, 8> Scalars;
6674 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6676 // If ResNE is 0, fully unroll the vector op.
6679 else if (NE > ResNE)
6683 for (i= 0; i != NE; ++i) {
6684 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6685 SDValue Operand = N->getOperand(j);
6686 EVT OperandVT = Operand.getValueType();
6687 if (OperandVT.isVector()) {
6688 // A vector operand; extract a single element.
6689 EVT OperandEltVT = OperandVT.getVectorElementType();
6690 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6693 getConstant(i, dl, TLI->getVectorIdxTy()));
6695 // A scalar operand; just use it as is.
6696 Operands[j] = Operand;
6700 switch (N->getOpcode()) {
6702 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6705 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6712 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6713 getShiftAmountOperand(Operands[0].getValueType(),
6716 case ISD::SIGN_EXTEND_INREG:
6717 case ISD::FP_ROUND_INREG: {
6718 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6719 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6721 getValueType(ExtVT)));
6726 for (; i < ResNE; ++i)
6727 Scalars.push_back(getUNDEF(EltVT));
6729 return getNode(ISD::BUILD_VECTOR, dl,
6730 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6734 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6735 /// location that is 'Dist' units away from the location that the 'Base' load
6736 /// is loading from.
6737 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6738 unsigned Bytes, int Dist) const {
6739 if (LD->getChain() != Base->getChain())
6741 EVT VT = LD->getValueType(0);
6742 if (VT.getSizeInBits() / 8 != Bytes)
6745 SDValue Loc = LD->getOperand(1);
6746 SDValue BaseLoc = Base->getOperand(1);
6747 if (Loc.getOpcode() == ISD::FrameIndex) {
6748 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6750 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6751 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6752 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6753 int FS = MFI->getObjectSize(FI);
6754 int BFS = MFI->getObjectSize(BFI);
6755 if (FS != BFS || FS != (int)Bytes) return false;
6756 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6760 if (isBaseWithConstantOffset(Loc)) {
6761 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6762 if (Loc.getOperand(0) == BaseLoc) {
6763 // If the base location is a simple address with no offset itself, then
6764 // the second load's first add operand should be the base address.
6765 if (LocOffset == Dist * (int)Bytes)
6767 } else if (isBaseWithConstantOffset(BaseLoc)) {
6768 // The base location itself has an offset, so subtract that value from the
6769 // second load's offset before comparing to distance * size.
6771 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6772 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6773 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6778 const GlobalValue *GV1 = nullptr;
6779 const GlobalValue *GV2 = nullptr;
6780 int64_t Offset1 = 0;
6781 int64_t Offset2 = 0;
6782 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6783 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6784 if (isGA1 && isGA2 && GV1 == GV2)
6785 return Offset1 == (Offset2 + Dist*Bytes);
6790 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6791 /// it cannot be inferred.
6792 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6793 // If this is a GlobalAddress + cst, return the alignment.
6794 const GlobalValue *GV;
6795 int64_t GVOffset = 0;
6796 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6797 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6798 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6799 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6800 *TLI->getDataLayout());
6801 unsigned AlignBits = KnownZero.countTrailingOnes();
6802 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6804 return MinAlign(Align, GVOffset);
6807 // If this is a direct reference to a stack slot, use information about the
6808 // stack slot's alignment.
6809 int FrameIdx = 1 << 31;
6810 int64_t FrameOffset = 0;
6811 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6812 FrameIdx = FI->getIndex();
6813 } else if (isBaseWithConstantOffset(Ptr) &&
6814 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6816 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6817 FrameOffset = Ptr.getConstantOperandVal(1);
6820 if (FrameIdx != (1 << 31)) {
6821 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6822 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6830 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6831 /// which is split (or expanded) into two not necessarily identical pieces.
6832 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6833 // Currently all types are split in half.
6835 if (!VT.isVector()) {
6836 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6838 unsigned NumElements = VT.getVectorNumElements();
6839 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6840 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6843 return std::make_pair(LoVT, HiVT);
6846 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6848 std::pair<SDValue, SDValue>
6849 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6851 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6852 N.getValueType().getVectorNumElements() &&
6853 "More vector elements requested than available!");
6855 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6856 getConstant(0, DL, TLI->getVectorIdxTy()));
6857 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6858 getConstant(LoVT.getVectorNumElements(), DL,
6859 TLI->getVectorIdxTy()));
6860 return std::make_pair(Lo, Hi);
6863 void SelectionDAG::ExtractVectorElements(SDValue Op,
6864 SmallVectorImpl<SDValue> &Args,
6865 unsigned Start, unsigned Count) {
6866 EVT VT = Op.getValueType();
6868 Count = VT.getVectorNumElements();
6870 EVT EltVT = VT.getVectorElementType();
6871 EVT IdxTy = TLI->getVectorIdxTy();
6873 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6874 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6875 Op, getConstant(i, SL, IdxTy)));
6879 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6880 unsigned GlobalAddressSDNode::getAddressSpace() const {
6881 return getGlobal()->getType()->getAddressSpace();
6885 Type *ConstantPoolSDNode::getType() const {
6886 if (isMachineConstantPoolEntry())
6887 return Val.MachineCPVal->getType();
6888 return Val.ConstVal->getType();
6891 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6893 unsigned &SplatBitSize,
6895 unsigned MinSplatBits,
6896 bool isBigEndian) const {
6897 EVT VT = getValueType(0);
6898 assert(VT.isVector() && "Expected a vector type");
6899 unsigned sz = VT.getSizeInBits();
6900 if (MinSplatBits > sz)
6903 SplatValue = APInt(sz, 0);
6904 SplatUndef = APInt(sz, 0);
6906 // Get the bits. Bits with undefined values (when the corresponding element
6907 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6908 // in SplatValue. If any of the values are not constant, give up and return
6910 unsigned int nOps = getNumOperands();
6911 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6912 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6914 for (unsigned j = 0; j < nOps; ++j) {
6915 unsigned i = isBigEndian ? nOps-1-j : j;
6916 SDValue OpVal = getOperand(i);
6917 unsigned BitPos = j * EltBitSize;
6919 if (OpVal.getOpcode() == ISD::UNDEF)
6920 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6921 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6922 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6923 zextOrTrunc(sz) << BitPos;
6924 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6925 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6930 // The build_vector is all constants or undefs. Find the smallest element
6931 // size that splats the vector.
6933 HasAnyUndefs = (SplatUndef != 0);
6936 unsigned HalfSize = sz / 2;
6937 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6938 APInt LowValue = SplatValue.trunc(HalfSize);
6939 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6940 APInt LowUndef = SplatUndef.trunc(HalfSize);
6942 // If the two halves do not match (ignoring undef bits), stop here.
6943 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6944 MinSplatBits > HalfSize)
6947 SplatValue = HighValue | LowValue;
6948 SplatUndef = HighUndef & LowUndef;
6957 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6958 if (UndefElements) {
6959 UndefElements->clear();
6960 UndefElements->resize(getNumOperands());
6963 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6964 SDValue Op = getOperand(i);
6965 if (Op.getOpcode() == ISD::UNDEF) {
6967 (*UndefElements)[i] = true;
6968 } else if (!Splatted) {
6970 } else if (Splatted != Op) {
6976 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6977 "Can only have a splat without a constant for all undefs.");
6978 return getOperand(0);
6985 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6986 return dyn_cast_or_null<ConstantSDNode>(
6987 getSplatValue(UndefElements).getNode());
6991 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6992 return dyn_cast_or_null<ConstantFPSDNode>(
6993 getSplatValue(UndefElements).getNode());
6996 bool BuildVectorSDNode::isConstant() const {
6997 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6998 unsigned Opc = getOperand(i).getOpcode();
6999 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
7005 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
7006 // Find the first non-undef value in the shuffle mask.
7008 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
7011 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
7013 // Make sure all remaining elements are either undef or the same as the first
7015 for (int Idx = Mask[i]; i != e; ++i)
7016 if (Mask[i] >= 0 && Mask[i] != Idx)
7022 static void checkForCyclesHelper(const SDNode *N,
7023 SmallPtrSetImpl<const SDNode*> &Visited,
7024 SmallPtrSetImpl<const SDNode*> &Checked,
7025 const llvm::SelectionDAG *DAG) {
7026 // If this node has already been checked, don't check it again.
7027 if (Checked.count(N))
7030 // If a node has already been visited on this depth-first walk, reject it as
7032 if (!Visited.insert(N).second) {
7033 errs() << "Detected cycle in SelectionDAG\n";
7034 dbgs() << "Offending node:\n";
7035 N->dumprFull(DAG); dbgs() << "\n";
7039 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
7040 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
7047 void llvm::checkForCycles(const llvm::SDNode *N,
7048 const llvm::SelectionDAG *DAG,
7056 assert(N && "Checking nonexistent SDNode");
7057 SmallPtrSet<const SDNode*, 32> visited;
7058 SmallPtrSet<const SDNode*, 32> checked;
7059 checkForCyclesHelper(N, visited, checked, DAG);
7064 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
7065 checkForCycles(DAG->getRoot().getNode(), DAG, force);