1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/ValueTracking.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalAlias.h"
21 #include "llvm/GlobalVariable.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Assembly/Writer.h"
25 #include "llvm/CallingConv.h"
26 #include "llvm/CodeGen/MachineBasicBlock.h"
27 #include "llvm/CodeGen/MachineConstantPool.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineModuleInfo.h"
30 #include "llvm/CodeGen/PseudoSourceValue.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetFrameInfo.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/System/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BIT_CONVERT)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BIT_CONVERT)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
200 for (unsigned i = 1; i < NumElems; ++i) {
201 SDValue V = N->getOperand(i);
202 if (V.getOpcode() != ISD::UNDEF)
208 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
209 /// when given the operation for (X op Y).
210 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
211 // To perform this operation, we just need to swap the L and G bits of the
213 unsigned OldL = (Operation >> 2) & 1;
214 unsigned OldG = (Operation >> 1) & 1;
215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
216 (OldL << 1) | // New G bit
217 (OldG << 2)); // New L bit.
220 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
221 /// 'op' is a valid SetCC operation.
222 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
223 unsigned Operation = Op;
225 Operation ^= 7; // Flip L, G, E bits, but not U.
227 Operation ^= 15; // Flip all of the condition bits.
229 if (Operation > ISD::SETTRUE2)
230 Operation &= ~8; // Don't let N and U bits get set.
232 return ISD::CondCode(Operation);
236 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
237 /// signed operation and 2 if the result is an unsigned comparison. Return zero
238 /// if the operation does not depend on the sign of the input (setne and seteq).
239 static int isSignedOp(ISD::CondCode Opcode) {
241 default: llvm_unreachable("Illegal integer setcc operation!");
243 case ISD::SETNE: return 0;
247 case ISD::SETGE: return 1;
251 case ISD::SETUGE: return 2;
255 /// getSetCCOrOperation - Return the result of a logical OR between different
256 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
257 /// returns SETCC_INVALID if it is not possible to represent the resultant
259 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
262 // Cannot fold a signed integer setcc with an unsigned integer setcc.
263 return ISD::SETCC_INVALID;
265 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
267 // If the N and U bits get set then the resultant comparison DOES suddenly
268 // care about orderedness, and is true when ordered.
269 if (Op > ISD::SETTRUE2)
270 Op &= ~16; // Clear the U bit if the N bit is set.
272 // Canonicalize illegal integer setcc's.
273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
276 return ISD::CondCode(Op);
279 /// getSetCCAndOperation - Return the result of a logical AND between different
280 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
281 /// function returns zero if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed setcc with an unsigned setcc.
287 return ISD::SETCC_INVALID;
289 // Combine all of the condition bits.
290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
292 // Canonicalize illegal integer setcc's.
296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
297 case ISD::SETOEQ: // SETEQ & SETU[LG]E
298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
307 //===----------------------------------------------------------------------===//
308 // SDNode Profile Support
309 //===----------------------------------------------------------------------===//
311 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
313 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
317 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
318 /// solely with their pointer.
319 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
320 ID.AddPointer(VTList.VTs);
323 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
325 static void AddNodeIDOperands(FoldingSetNodeID &ID,
326 const SDValue *Ops, unsigned NumOps) {
327 for (; NumOps; --NumOps, ++Ops) {
328 ID.AddPointer(Ops->getNode());
329 ID.AddInteger(Ops->getResNo());
333 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
335 static void AddNodeIDOperands(FoldingSetNodeID &ID,
336 const SDUse *Ops, unsigned NumOps) {
337 for (; NumOps; --NumOps, ++Ops) {
338 ID.AddPointer(Ops->getNode());
339 ID.AddInteger(Ops->getResNo());
343 static void AddNodeIDNode(FoldingSetNodeID &ID,
344 unsigned short OpC, SDVTList VTList,
345 const SDValue *OpList, unsigned N) {
346 AddNodeIDOpcode(ID, OpC);
347 AddNodeIDValueTypes(ID, VTList);
348 AddNodeIDOperands(ID, OpList, N);
351 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
353 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
354 switch (N->getOpcode()) {
355 case ISD::TargetExternalSymbol:
356 case ISD::ExternalSymbol:
357 llvm_unreachable("Should only be used on nodes with operands");
358 default: break; // Normal nodes don't need extra info.
359 case ISD::TargetConstant:
361 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
363 case ISD::TargetConstantFP:
364 case ISD::ConstantFP: {
365 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
368 case ISD::TargetGlobalAddress:
369 case ISD::GlobalAddress:
370 case ISD::TargetGlobalTLSAddress:
371 case ISD::GlobalTLSAddress: {
372 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
373 ID.AddPointer(GA->getGlobal());
374 ID.AddInteger(GA->getOffset());
375 ID.AddInteger(GA->getTargetFlags());
378 case ISD::BasicBlock:
379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
386 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
388 case ISD::FrameIndex:
389 case ISD::TargetFrameIndex:
390 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
393 case ISD::TargetJumpTable:
394 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
395 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
397 case ISD::ConstantPool:
398 case ISD::TargetConstantPool: {
399 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
400 ID.AddInteger(CP->getAlignment());
401 ID.AddInteger(CP->getOffset());
402 if (CP->isMachineConstantPoolEntry())
403 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
405 ID.AddPointer(CP->getConstVal());
406 ID.AddInteger(CP->getTargetFlags());
410 const LoadSDNode *LD = cast<LoadSDNode>(N);
411 ID.AddInteger(LD->getMemoryVT().getRawBits());
412 ID.AddInteger(LD->getRawSubclassData());
416 const StoreSDNode *ST = cast<StoreSDNode>(N);
417 ID.AddInteger(ST->getMemoryVT().getRawBits());
418 ID.AddInteger(ST->getRawSubclassData());
421 case ISD::ATOMIC_CMP_SWAP:
422 case ISD::ATOMIC_SWAP:
423 case ISD::ATOMIC_LOAD_ADD:
424 case ISD::ATOMIC_LOAD_SUB:
425 case ISD::ATOMIC_LOAD_AND:
426 case ISD::ATOMIC_LOAD_OR:
427 case ISD::ATOMIC_LOAD_XOR:
428 case ISD::ATOMIC_LOAD_NAND:
429 case ISD::ATOMIC_LOAD_MIN:
430 case ISD::ATOMIC_LOAD_MAX:
431 case ISD::ATOMIC_LOAD_UMIN:
432 case ISD::ATOMIC_LOAD_UMAX: {
433 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
434 ID.AddInteger(AT->getMemoryVT().getRawBits());
435 ID.AddInteger(AT->getRawSubclassData());
438 case ISD::VECTOR_SHUFFLE: {
439 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
440 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
442 ID.AddInteger(SVN->getMaskElt(i));
445 case ISD::TargetBlockAddress:
446 case ISD::BlockAddress: {
447 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
448 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
451 } // end switch (N->getOpcode())
454 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
456 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
457 AddNodeIDOpcode(ID, N->getOpcode());
458 // Add the return value info.
459 AddNodeIDValueTypes(ID, N->getVTList());
460 // Add the operand info.
461 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
463 // Handle SDNode leafs with special info.
464 AddNodeIDCustom(ID, N);
467 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
468 /// the CSE map that carries volatility, temporalness, indexing mode, and
469 /// extension/truncation information.
471 static inline unsigned
472 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
473 bool isNonTemporal) {
474 assert((ConvType & 3) == ConvType &&
475 "ConvType may not require more than 2 bits!");
476 assert((AM & 7) == AM &&
477 "AM may not require more than 3 bits!");
481 (isNonTemporal << 6);
484 //===----------------------------------------------------------------------===//
485 // SelectionDAG Class
486 //===----------------------------------------------------------------------===//
488 /// doNotCSE - Return true if CSE should not be performed for this node.
489 static bool doNotCSE(SDNode *N) {
490 if (N->getValueType(0) == MVT::Flag)
491 return true; // Never CSE anything that produces a flag.
493 switch (N->getOpcode()) {
495 case ISD::HANDLENODE:
497 return true; // Never CSE these nodes.
500 // Check that remaining values produced are not flags.
501 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
502 if (N->getValueType(i) == MVT::Flag)
503 return true; // Never CSE anything that produces a flag.
508 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
510 void SelectionDAG::RemoveDeadNodes() {
511 // Create a dummy node (which is not added to allnodes), that adds a reference
512 // to the root node, preventing it from being deleted.
513 HandleSDNode Dummy(getRoot());
515 SmallVector<SDNode*, 128> DeadNodes;
517 // Add all obviously-dead nodes to the DeadNodes worklist.
518 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
520 DeadNodes.push_back(I);
522 RemoveDeadNodes(DeadNodes);
524 // If the root changed (e.g. it was a dead load, update the root).
525 setRoot(Dummy.getValue());
528 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
529 /// given list, and any nodes that become unreachable as a result.
530 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
531 DAGUpdateListener *UpdateListener) {
533 // Process the worklist, deleting the nodes and adding their uses to the
535 while (!DeadNodes.empty()) {
536 SDNode *N = DeadNodes.pop_back_val();
539 UpdateListener->NodeDeleted(N, 0);
541 // Take the node out of the appropriate CSE map.
542 RemoveNodeFromCSEMaps(N);
544 // Next, brutally remove the operand list. This is safe to do, as there are
545 // no cycles in the graph.
546 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
548 SDNode *Operand = Use.getNode();
551 // Now that we removed this operand, see if there are no uses of it left.
552 if (Operand->use_empty())
553 DeadNodes.push_back(Operand);
560 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
561 SmallVector<SDNode*, 16> DeadNodes(1, N);
562 RemoveDeadNodes(DeadNodes, UpdateListener);
565 void SelectionDAG::DeleteNode(SDNode *N) {
566 // First take this out of the appropriate CSE map.
567 RemoveNodeFromCSEMaps(N);
569 // Finally, remove uses due to operands of this node, remove from the
570 // AllNodes list, and delete the node.
571 DeleteNodeNotInCSEMaps(N);
574 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
575 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
576 assert(N->use_empty() && "Cannot delete a node that is not dead!");
578 // Drop all of the operands and decrement used node's use counts.
584 void SelectionDAG::DeallocateNode(SDNode *N) {
585 if (N->OperandsNeedDelete)
586 delete[] N->OperandList;
588 // Set the opcode to DELETED_NODE to help catch bugs when node
589 // memory is reallocated.
590 N->NodeType = ISD::DELETED_NODE;
592 NodeAllocator.Deallocate(AllNodes.remove(N));
594 // Remove the ordering of this node.
597 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
598 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
599 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
600 DbgVals[i]->setIsInvalidated();
603 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
604 /// correspond to it. This is useful when we're about to delete or repurpose
605 /// the node. We don't want future request for structurally identical nodes
606 /// to return N anymore.
607 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
609 switch (N->getOpcode()) {
610 case ISD::EntryToken:
611 llvm_unreachable("EntryToken should not be in CSEMaps!");
613 case ISD::HANDLENODE: return false; // noop.
615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
616 "Cond code doesn't exist!");
617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
620 case ISD::ExternalSymbol:
621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
623 case ISD::TargetExternalSymbol: {
624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
625 Erased = TargetExternalSymbols.erase(
626 std::pair<std::string,unsigned char>(ESN->getSymbol(),
627 ESN->getTargetFlags()));
630 case ISD::VALUETYPE: {
631 EVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 llvm_unreachable("Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
708 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
709 /// were replaced with those specified. If this node is never memoized,
710 /// return null, otherwise return a pointer to the slot it would take. If a
711 /// node already exists with these operands, the slot will be non-null.
712 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
713 SDValue Op1, SDValue Op2,
718 SDValue Ops[] = { Op1, Op2 };
720 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
721 AddNodeIDCustom(ID, N);
722 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
727 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
728 /// were replaced with those specified. If this node is never memoized,
729 /// return null, otherwise return a pointer to the slot it would take. If a
730 /// node already exists with these operands, the slot will be non-null.
731 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
732 const SDValue *Ops,unsigned NumOps,
738 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
739 AddNodeIDCustom(ID, N);
740 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
744 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
745 void SelectionDAG::VerifyNode(SDNode *N) {
746 switch (N->getOpcode()) {
749 case ISD::BUILD_PAIR: {
750 EVT VT = N->getValueType(0);
751 assert(N->getNumValues() == 1 && "Too many results!");
752 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
753 "Wrong return type!");
754 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
755 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
756 "Mismatched operand types!");
757 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
758 "Wrong operand type!");
759 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
760 "Wrong return type size");
763 case ISD::BUILD_VECTOR: {
764 assert(N->getNumValues() == 1 && "Too many results!");
765 assert(N->getValueType(0).isVector() && "Wrong return type!");
766 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
767 "Wrong number of operands!");
768 EVT EltVT = N->getValueType(0).getVectorElementType();
769 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
770 assert((I->getValueType() == EltVT ||
771 (EltVT.isInteger() && I->getValueType().isInteger() &&
772 EltVT.bitsLE(I->getValueType()))) &&
773 "Wrong operand type!");
779 /// getEVTAlignment - Compute the default alignment value for the
782 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
783 const Type *Ty = VT == MVT::iPTR ?
784 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
785 VT.getTypeForEVT(*getContext());
787 return TLI.getTargetData()->getABITypeAlignment(Ty);
790 // EntryNode could meaningfully have debug info if we can find it...
791 SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli)
792 : TM(tm), TLI(*tm.getTargetLowering()), FLI(fli),
793 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
794 Root(getEntryNode()), Ordering(0) {
795 AllNodes.push_back(&EntryNode);
796 Ordering = new SDNodeOrdering();
797 DbgInfo = new SDDbgInfo();
800 void SelectionDAG::init(MachineFunction &mf) {
802 Context = &mf.getFunction()->getContext();
805 SelectionDAG::~SelectionDAG() {
812 void SelectionDAG::allnodes_clear() {
813 assert(&*AllNodes.begin() == &EntryNode);
814 AllNodes.remove(AllNodes.begin());
815 while (!AllNodes.empty())
816 DeallocateNode(AllNodes.begin());
819 void SelectionDAG::clear() {
821 OperandAllocator.Reset();
824 ExtendedValueTypeNodes.clear();
825 ExternalSymbols.clear();
826 TargetExternalSymbols.clear();
827 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
828 static_cast<CondCodeSDNode*>(0));
829 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
830 static_cast<SDNode*>(0));
832 EntryNode.UseList = 0;
833 AllNodes.push_back(&EntryNode);
834 Root = getEntryNode();
836 Ordering = new SDNodeOrdering();
839 DbgInfo = new SDDbgInfo();
842 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
843 return VT.bitsGT(Op.getValueType()) ?
844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
845 getNode(ISD::TRUNCATE, DL, VT, Op);
848 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
849 return VT.bitsGT(Op.getValueType()) ?
850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
851 getNode(ISD::TRUNCATE, DL, VT, Op);
854 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
855 assert(!VT.isVector() &&
856 "getZeroExtendInReg should use the vector element type instead of "
858 if (Op.getValueType() == VT) return Op;
859 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
860 APInt Imm = APInt::getLowBitsSet(BitWidth,
862 return getNode(ISD::AND, DL, Op.getValueType(), Op,
863 getConstant(Imm, Op.getValueType()));
866 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
868 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
869 EVT EltVT = VT.getScalarType();
871 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
872 return getNode(ISD::XOR, DL, VT, Val, NegOne);
875 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
876 EVT EltVT = VT.getScalarType();
877 assert((EltVT.getSizeInBits() >= 64 ||
878 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
879 "getConstant with a uint64_t value that doesn't fit in the type!");
880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
883 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
884 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
887 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
888 assert(VT.isInteger() && "Cannot create FP integer constant!");
890 EVT EltVT = VT.getScalarType();
891 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
892 "APInt size does not match type size!");
894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
902 return SDValue(N, 0);
905 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
906 CSEMap.InsertNode(N, IP);
907 AllNodes.push_back(N);
910 SDValue Result(N, 0);
912 SmallVector<SDValue, 8> Ops;
913 Ops.assign(VT.getVectorNumElements(), Result);
914 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
919 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
920 return getConstant(Val, TLI.getPointerTy(), isTarget);
924 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
925 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
928 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
931 EVT EltVT = VT.getScalarType();
933 // Do the map lookup using the actual bit pattern for the floating point
934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
935 // we don't have issues with SNANs.
936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
944 return SDValue(N, 0);
947 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
948 CSEMap.InsertNode(N, IP);
949 AllNodes.push_back(N);
952 SDValue Result(N, 0);
954 SmallVector<SDValue, 8> Ops;
955 Ops.assign(VT.getVectorNumElements(), Result);
956 // FIXME DebugLoc info might be appropriate here
957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
962 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
963 EVT EltVT = VT.getScalarType();
965 return getConstantFP(APFloat((float)Val), VT, isTarget);
967 return getConstantFP(APFloat(Val), VT, isTarget);
970 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
971 EVT VT, int64_t Offset,
973 unsigned char TargetFlags) {
974 assert((TargetFlags == 0 || isTargetGA) &&
975 "Cannot set target flags on target-independent globals");
977 // Truncate (with sign-extension) the offset value to the pointer size.
978 EVT PTy = TLI.getPointerTy();
979 unsigned BitWidth = PTy.getSizeInBits();
981 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
983 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
985 // If GV is an alias then use the aliasee for determining thread-localness.
986 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
987 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
991 if (GVar && GVar->isThreadLocal())
992 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
994 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
997 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
999 ID.AddInteger(Offset);
1000 ID.AddInteger(TargetFlags);
1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1003 return SDValue(E, 0);
1005 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1006 Offset, TargetFlags);
1007 CSEMap.InsertNode(N, IP);
1008 AllNodes.push_back(N);
1009 return SDValue(N, 0);
1012 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1013 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1014 FoldingSetNodeID ID;
1015 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1019 return SDValue(E, 0);
1021 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1022 CSEMap.InsertNode(N, IP);
1023 AllNodes.push_back(N);
1024 return SDValue(N, 0);
1027 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1028 unsigned char TargetFlags) {
1029 assert((TargetFlags == 0 || isTarget) &&
1030 "Cannot set target flags on target-independent jump tables");
1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1032 FoldingSetNodeID ID;
1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1035 ID.AddInteger(TargetFlags);
1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1038 return SDValue(E, 0);
1040 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1042 CSEMap.InsertNode(N, IP);
1043 AllNodes.push_back(N);
1044 return SDValue(N, 0);
1047 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1048 unsigned Alignment, int Offset,
1050 unsigned char TargetFlags) {
1051 assert((TargetFlags == 0 || isTarget) &&
1052 "Cannot set target flags on target-independent globals");
1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1056 FoldingSetNodeID ID;
1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1058 ID.AddInteger(Alignment);
1059 ID.AddInteger(Offset);
1061 ID.AddInteger(TargetFlags);
1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1064 return SDValue(E, 0);
1066 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1067 Alignment, TargetFlags);
1068 CSEMap.InsertNode(N, IP);
1069 AllNodes.push_back(N);
1070 return SDValue(N, 0);
1074 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1075 unsigned Alignment, int Offset,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent globals");
1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1083 FoldingSetNodeID ID;
1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1085 ID.AddInteger(Alignment);
1086 ID.AddInteger(Offset);
1087 C->AddSelectionDAGCSEId(ID);
1088 ID.AddInteger(TargetFlags);
1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1091 return SDValue(E, 0);
1093 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1094 Alignment, TargetFlags);
1095 CSEMap.InsertNode(N, IP);
1096 AllNodes.push_back(N);
1097 return SDValue(N, 0);
1100 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1101 FoldingSetNodeID ID;
1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1106 return SDValue(E, 0);
1108 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1109 CSEMap.InsertNode(N, IP);
1110 AllNodes.push_back(N);
1111 return SDValue(N, 0);
1114 SDValue SelectionDAG::getValueType(EVT VT) {
1115 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1116 ValueTypeNodes.size())
1117 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1119 SDNode *&N = VT.isExtended() ?
1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1122 if (N) return SDValue(N, 0);
1123 N = new (NodeAllocator) VTSDNode(VT);
1124 AllNodes.push_back(N);
1125 return SDValue(N, 0);
1128 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1129 SDNode *&N = ExternalSymbols[Sym];
1130 if (N) return SDValue(N, 0);
1131 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1132 AllNodes.push_back(N);
1133 return SDValue(N, 0);
1136 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1137 unsigned char TargetFlags) {
1139 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1141 if (N) return SDValue(N, 0);
1142 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1143 AllNodes.push_back(N);
1144 return SDValue(N, 0);
1147 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1148 if ((unsigned)Cond >= CondCodeNodes.size())
1149 CondCodeNodes.resize(Cond+1);
1151 if (CondCodeNodes[Cond] == 0) {
1152 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1153 CondCodeNodes[Cond] = N;
1154 AllNodes.push_back(N);
1157 return SDValue(CondCodeNodes[Cond], 0);
1160 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1161 // the shuffle mask M that point at N1 to point at N2, and indices that point
1162 // N2 to point at N1.
1163 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1165 int NElts = M.size();
1166 for (int i = 0; i != NElts; ++i) {
1174 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1175 SDValue N2, const int *Mask) {
1176 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1177 assert(VT.isVector() && N1.getValueType().isVector() &&
1178 "Vector Shuffle VTs must be a vectors");
1179 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1180 && "Vector Shuffle VTs must have same element type");
1182 // Canonicalize shuffle undef, undef -> undef
1183 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1184 return getUNDEF(VT);
1186 // Validate that all indices in Mask are within the range of the elements
1187 // input to the shuffle.
1188 unsigned NElts = VT.getVectorNumElements();
1189 SmallVector<int, 8> MaskVec;
1190 for (unsigned i = 0; i != NElts; ++i) {
1191 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1192 MaskVec.push_back(Mask[i]);
1195 // Canonicalize shuffle v, v -> v, undef
1198 for (unsigned i = 0; i != NElts; ++i)
1199 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1202 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1203 if (N1.getOpcode() == ISD::UNDEF)
1204 commuteShuffle(N1, N2, MaskVec);
1206 // Canonicalize all index into lhs, -> shuffle lhs, undef
1207 // Canonicalize all index into rhs, -> shuffle rhs, undef
1208 bool AllLHS = true, AllRHS = true;
1209 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1210 for (unsigned i = 0; i != NElts; ++i) {
1211 if (MaskVec[i] >= (int)NElts) {
1216 } else if (MaskVec[i] >= 0) {
1220 if (AllLHS && AllRHS)
1221 return getUNDEF(VT);
1222 if (AllLHS && !N2Undef)
1226 commuteShuffle(N1, N2, MaskVec);
1229 // If Identity shuffle, or all shuffle in to undef, return that node.
1230 bool AllUndef = true;
1231 bool Identity = true;
1232 for (unsigned i = 0; i != NElts; ++i) {
1233 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1234 if (MaskVec[i] >= 0) AllUndef = false;
1236 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1239 return getUNDEF(VT);
1241 FoldingSetNodeID ID;
1242 SDValue Ops[2] = { N1, N2 };
1243 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1244 for (unsigned i = 0; i != NElts; ++i)
1245 ID.AddInteger(MaskVec[i]);
1248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1249 return SDValue(E, 0);
1251 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1252 // SDNode doesn't have access to it. This memory will be "leaked" when
1253 // the node is deallocated, but recovered when the NodeAllocator is released.
1254 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1255 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1257 ShuffleVectorSDNode *N =
1258 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1259 CSEMap.InsertNode(N, IP);
1260 AllNodes.push_back(N);
1261 return SDValue(N, 0);
1264 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1265 SDValue Val, SDValue DTy,
1266 SDValue STy, SDValue Rnd, SDValue Sat,
1267 ISD::CvtCode Code) {
1268 // If the src and dest types are the same and the conversion is between
1269 // integer types of the same sign or two floats, no conversion is necessary.
1271 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1274 FoldingSetNodeID ID;
1275 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1276 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1279 return SDValue(E, 0);
1281 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1283 CSEMap.InsertNode(N, IP);
1284 AllNodes.push_back(N);
1285 return SDValue(N, 0);
1288 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1289 FoldingSetNodeID ID;
1290 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1291 ID.AddInteger(RegNo);
1293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1294 return SDValue(E, 0);
1296 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1297 CSEMap.InsertNode(N, IP);
1298 AllNodes.push_back(N);
1299 return SDValue(N, 0);
1302 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1303 FoldingSetNodeID ID;
1304 SDValue Ops[] = { Root };
1305 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1306 ID.AddPointer(Label);
1308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1309 return SDValue(E, 0);
1311 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1312 CSEMap.InsertNode(N, IP);
1313 AllNodes.push_back(N);
1314 return SDValue(N, 0);
1318 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1320 unsigned char TargetFlags) {
1321 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1323 FoldingSetNodeID ID;
1324 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1326 ID.AddInteger(TargetFlags);
1328 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1329 return SDValue(E, 0);
1331 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1332 CSEMap.InsertNode(N, IP);
1333 AllNodes.push_back(N);
1334 return SDValue(N, 0);
1337 SDValue SelectionDAG::getSrcValue(const Value *V) {
1338 assert((!V || V->getType()->isPointerTy()) &&
1339 "SrcValue is not a pointer?");
1341 FoldingSetNodeID ID;
1342 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1347 return SDValue(E, 0);
1349 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1350 CSEMap.InsertNode(N, IP);
1351 AllNodes.push_back(N);
1352 return SDValue(N, 0);
1355 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1356 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1357 FoldingSetNodeID ID;
1358 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1362 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1363 return SDValue(E, 0);
1365 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1366 CSEMap.InsertNode(N, IP);
1367 AllNodes.push_back(N);
1368 return SDValue(N, 0);
1372 /// getShiftAmountOperand - Return the specified value casted to
1373 /// the target's desired shift amount type.
1374 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1375 EVT OpTy = Op.getValueType();
1376 MVT ShTy = TLI.getShiftAmountTy();
1377 if (OpTy == ShTy || OpTy.isVector()) return Op;
1379 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1380 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1383 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1384 /// specified value type.
1385 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1386 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1387 unsigned ByteSize = VT.getStoreSize();
1388 const Type *Ty = VT.getTypeForEVT(*getContext());
1389 unsigned StackAlign =
1390 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1392 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1393 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1396 /// CreateStackTemporary - Create a stack temporary suitable for holding
1397 /// either of the specified value types.
1398 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1399 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1400 VT2.getStoreSizeInBits())/8;
1401 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1402 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1403 const TargetData *TD = TLI.getTargetData();
1404 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1405 TD->getPrefTypeAlignment(Ty2));
1407 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1408 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1409 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1412 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1413 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1414 // These setcc operations always fold.
1418 case ISD::SETFALSE2: return getConstant(0, VT);
1420 case ISD::SETTRUE2: return getConstant(1, VT);
1432 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1436 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1437 const APInt &C2 = N2C->getAPIntValue();
1438 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1439 const APInt &C1 = N1C->getAPIntValue();
1442 default: llvm_unreachable("Unknown integer setcc!");
1443 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1444 case ISD::SETNE: return getConstant(C1 != C2, VT);
1445 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1446 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1447 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1448 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1449 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1450 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1451 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1452 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1456 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1457 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1458 // No compile time operations on this type yet.
1459 if (N1C->getValueType(0) == MVT::ppcf128)
1462 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1465 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1469 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1470 return getUNDEF(VT);
1472 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1473 R==APFloat::cmpLessThan, VT);
1474 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1475 return getUNDEF(VT);
1477 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1478 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1479 return getUNDEF(VT);
1481 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1482 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1483 return getUNDEF(VT);
1485 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1486 R==APFloat::cmpEqual, VT);
1487 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1488 return getUNDEF(VT);
1490 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1491 R==APFloat::cmpEqual, VT);
1492 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1493 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1494 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1495 R==APFloat::cmpEqual, VT);
1496 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1497 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1498 R==APFloat::cmpLessThan, VT);
1499 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1500 R==APFloat::cmpUnordered, VT);
1501 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1502 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1505 // Ensure that the constant occurs on the RHS.
1506 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1510 // Could not fold it.
1514 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1515 /// use this predicate to simplify operations downstream.
1516 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1517 // This predicate is not safe for vector operations.
1518 if (Op.getValueType().isVector())
1521 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1522 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1525 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1526 /// this predicate to simplify operations downstream. Mask is known to be zero
1527 /// for bits that V cannot have.
1528 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1529 unsigned Depth) const {
1530 APInt KnownZero, KnownOne;
1531 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1532 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1533 return (KnownZero & Mask) == Mask;
1536 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1537 /// known to be either zero or one and return them in the KnownZero/KnownOne
1538 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1540 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1541 APInt &KnownZero, APInt &KnownOne,
1542 unsigned Depth) const {
1543 unsigned BitWidth = Mask.getBitWidth();
1544 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1545 "Mask size mismatches value type size!");
1547 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1548 if (Depth == 6 || Mask == 0)
1549 return; // Limit search depth.
1551 APInt KnownZero2, KnownOne2;
1553 switch (Op.getOpcode()) {
1555 // We know all of the bits for a constant!
1556 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1557 KnownZero = ~KnownOne & Mask;
1560 // If either the LHS or the RHS are Zero, the result is zero.
1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1562 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1563 KnownZero2, KnownOne2, Depth+1);
1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1567 // Output known-1 bits are only known if set in both the LHS & RHS.
1568 KnownOne &= KnownOne2;
1569 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1570 KnownZero |= KnownZero2;
1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1575 KnownZero2, KnownOne2, Depth+1);
1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1579 // Output known-0 bits are only known if clear in both the LHS & RHS.
1580 KnownZero &= KnownZero2;
1581 // Output known-1 are known to be set if set in either the LHS | RHS.
1582 KnownOne |= KnownOne2;
1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1586 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1587 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1588 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1590 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1591 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1592 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1593 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1594 KnownZero = KnownZeroOut;
1598 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1599 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1600 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1601 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1602 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1604 // If low bits are zero in either operand, output low known-0 bits.
1605 // Also compute a conserative estimate for high known-0 bits.
1606 // More trickiness is possible, but this is sufficient for the
1607 // interesting case of alignment computation.
1609 unsigned TrailZ = KnownZero.countTrailingOnes() +
1610 KnownZero2.countTrailingOnes();
1611 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1612 KnownZero2.countLeadingOnes(),
1613 BitWidth) - BitWidth;
1615 TrailZ = std::min(TrailZ, BitWidth);
1616 LeadZ = std::min(LeadZ, BitWidth);
1617 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1618 APInt::getHighBitsSet(BitWidth, LeadZ);
1623 // For the purposes of computing leading zeros we can conservatively
1624 // treat a udiv as a logical right shift by the power of 2 known to
1625 // be less than the denominator.
1626 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1627 ComputeMaskedBits(Op.getOperand(0),
1628 AllOnes, KnownZero2, KnownOne2, Depth+1);
1629 unsigned LeadZ = KnownZero2.countLeadingOnes();
1633 ComputeMaskedBits(Op.getOperand(1),
1634 AllOnes, KnownZero2, KnownOne2, Depth+1);
1635 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1636 if (RHSUnknownLeadingOnes != BitWidth)
1637 LeadZ = std::min(BitWidth,
1638 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1640 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1644 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1645 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1646 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1647 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1649 // Only known if known in both the LHS and RHS.
1650 KnownOne &= KnownOne2;
1651 KnownZero &= KnownZero2;
1653 case ISD::SELECT_CC:
1654 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1655 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1659 // Only known if known in both the LHS and RHS.
1660 KnownOne &= KnownOne2;
1661 KnownZero &= KnownZero2;
1669 if (Op.getResNo() != 1)
1671 // The boolean result conforms to getBooleanContents. Fall through.
1673 // If we know the result of a setcc has the top bits zero, use this info.
1674 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1676 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1679 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1680 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1681 unsigned ShAmt = SA->getZExtValue();
1683 // If the shift count is an invalid immediate, don't do anything.
1684 if (ShAmt >= BitWidth)
1687 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1688 KnownZero, KnownOne, Depth+1);
1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1690 KnownZero <<= ShAmt;
1692 // low bits known zero.
1693 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1697 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1698 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1699 unsigned ShAmt = SA->getZExtValue();
1701 // If the shift count is an invalid immediate, don't do anything.
1702 if (ShAmt >= BitWidth)
1705 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1706 KnownZero, KnownOne, Depth+1);
1707 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1708 KnownZero = KnownZero.lshr(ShAmt);
1709 KnownOne = KnownOne.lshr(ShAmt);
1711 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1712 KnownZero |= HighBits; // High bits known zero.
1716 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1717 unsigned ShAmt = SA->getZExtValue();
1719 // If the shift count is an invalid immediate, don't do anything.
1720 if (ShAmt >= BitWidth)
1723 APInt InDemandedMask = (Mask << ShAmt);
1724 // If any of the demanded bits are produced by the sign extension, we also
1725 // demand the input sign bit.
1726 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1727 if (HighBits.getBoolValue())
1728 InDemandedMask |= APInt::getSignBit(BitWidth);
1730 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1732 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1733 KnownZero = KnownZero.lshr(ShAmt);
1734 KnownOne = KnownOne.lshr(ShAmt);
1736 // Handle the sign bits.
1737 APInt SignBit = APInt::getSignBit(BitWidth);
1738 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1740 if (KnownZero.intersects(SignBit)) {
1741 KnownZero |= HighBits; // New bits are known zero.
1742 } else if (KnownOne.intersects(SignBit)) {
1743 KnownOne |= HighBits; // New bits are known one.
1747 case ISD::SIGN_EXTEND_INREG: {
1748 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1749 unsigned EBits = EVT.getScalarType().getSizeInBits();
1751 // Sign extension. Compute the demanded bits in the result that are not
1752 // present in the input.
1753 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1755 APInt InSignBit = APInt::getSignBit(EBits);
1756 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1758 // If the sign extended bits are demanded, we know that the sign
1760 InSignBit.zext(BitWidth);
1761 if (NewBits.getBoolValue())
1762 InputDemandedBits |= InSignBit;
1764 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1765 KnownZero, KnownOne, Depth+1);
1766 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1768 // If the sign bit of the input is known set or clear, then we know the
1769 // top bits of the result.
1770 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1771 KnownZero |= NewBits;
1772 KnownOne &= ~NewBits;
1773 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1774 KnownOne |= NewBits;
1775 KnownZero &= ~NewBits;
1776 } else { // Input sign bit unknown
1777 KnownZero &= ~NewBits;
1778 KnownOne &= ~NewBits;
1785 unsigned LowBits = Log2_32(BitWidth)+1;
1786 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1791 if (ISD::isZEXTLoad(Op.getNode())) {
1792 LoadSDNode *LD = cast<LoadSDNode>(Op);
1793 EVT VT = LD->getMemoryVT();
1794 unsigned MemBits = VT.getScalarType().getSizeInBits();
1795 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1799 case ISD::ZERO_EXTEND: {
1800 EVT InVT = Op.getOperand(0).getValueType();
1801 unsigned InBits = InVT.getScalarType().getSizeInBits();
1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1803 APInt InMask = Mask;
1804 InMask.trunc(InBits);
1805 KnownZero.trunc(InBits);
1806 KnownOne.trunc(InBits);
1807 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1808 KnownZero.zext(BitWidth);
1809 KnownOne.zext(BitWidth);
1810 KnownZero |= NewBits;
1813 case ISD::SIGN_EXTEND: {
1814 EVT InVT = Op.getOperand(0).getValueType();
1815 unsigned InBits = InVT.getScalarType().getSizeInBits();
1816 APInt InSignBit = APInt::getSignBit(InBits);
1817 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1818 APInt InMask = Mask;
1819 InMask.trunc(InBits);
1821 // If any of the sign extended bits are demanded, we know that the sign
1822 // bit is demanded. Temporarily set this bit in the mask for our callee.
1823 if (NewBits.getBoolValue())
1824 InMask |= InSignBit;
1826 KnownZero.trunc(InBits);
1827 KnownOne.trunc(InBits);
1828 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1830 // Note if the sign bit is known to be zero or one.
1831 bool SignBitKnownZero = KnownZero.isNegative();
1832 bool SignBitKnownOne = KnownOne.isNegative();
1833 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1834 "Sign bit can't be known to be both zero and one!");
1836 // If the sign bit wasn't actually demanded by our caller, we don't
1837 // want it set in the KnownZero and KnownOne result values. Reset the
1838 // mask and reapply it to the result values.
1840 InMask.trunc(InBits);
1841 KnownZero &= InMask;
1844 KnownZero.zext(BitWidth);
1845 KnownOne.zext(BitWidth);
1847 // If the sign bit is known zero or one, the top bits match.
1848 if (SignBitKnownZero)
1849 KnownZero |= NewBits;
1850 else if (SignBitKnownOne)
1851 KnownOne |= NewBits;
1854 case ISD::ANY_EXTEND: {
1855 EVT InVT = Op.getOperand(0).getValueType();
1856 unsigned InBits = InVT.getScalarType().getSizeInBits();
1857 APInt InMask = Mask;
1858 InMask.trunc(InBits);
1859 KnownZero.trunc(InBits);
1860 KnownOne.trunc(InBits);
1861 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1862 KnownZero.zext(BitWidth);
1863 KnownOne.zext(BitWidth);
1866 case ISD::TRUNCATE: {
1867 EVT InVT = Op.getOperand(0).getValueType();
1868 unsigned InBits = InVT.getScalarType().getSizeInBits();
1869 APInt InMask = Mask;
1870 InMask.zext(InBits);
1871 KnownZero.zext(InBits);
1872 KnownOne.zext(InBits);
1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1874 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1875 KnownZero.trunc(BitWidth);
1876 KnownOne.trunc(BitWidth);
1879 case ISD::AssertZext: {
1880 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1881 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1882 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1884 KnownZero |= (~InMask) & Mask;
1888 // All bits are zero except the low bit.
1889 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1893 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1894 // We know that the top bits of C-X are clear if X contains less bits
1895 // than C (i.e. no wrap-around can happen). For example, 20-X is
1896 // positive if we can prove that X is >= 0 and < 16.
1897 if (CLHS->getAPIntValue().isNonNegative()) {
1898 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1899 // NLZ can't be BitWidth with no sign bit
1900 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1901 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1904 // If all of the MaskV bits are known to be zero, then we know the
1905 // output top bits are zero, because we now know that the output is
1907 if ((KnownZero2 & MaskV) == MaskV) {
1908 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1909 // Top bits known zero.
1910 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1917 // Output known-0 bits are known if clear or set in both the low clear bits
1918 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1919 // low 3 bits clear.
1920 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1921 BitWidth - Mask.countLeadingZeros());
1922 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1923 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1924 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1926 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1927 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1928 KnownZeroOut = std::min(KnownZeroOut,
1929 KnownZero2.countTrailingOnes());
1931 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1935 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1936 const APInt &RA = Rem->getAPIntValue().abs();
1937 if (RA.isPowerOf2()) {
1938 APInt LowBits = RA - 1;
1939 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1940 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1942 // The low bits of the first operand are unchanged by the srem.
1943 KnownZero = KnownZero2 & LowBits;
1944 KnownOne = KnownOne2 & LowBits;
1946 // If the first operand is non-negative or has all low bits zero, then
1947 // the upper bits are all zero.
1948 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1949 KnownZero |= ~LowBits;
1951 // If the first operand is negative and not all low bits are zero, then
1952 // the upper bits are all one.
1953 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1954 KnownOne |= ~LowBits;
1959 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1964 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1965 const APInt &RA = Rem->getAPIntValue();
1966 if (RA.isPowerOf2()) {
1967 APInt LowBits = (RA - 1);
1968 APInt Mask2 = LowBits & Mask;
1969 KnownZero |= ~LowBits & Mask;
1970 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1971 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1976 // Since the result is less than or equal to either operand, any leading
1977 // zero bits in either operand must also exist in the result.
1978 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1979 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1981 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1984 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1985 KnownZero2.countLeadingOnes());
1987 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1991 // Allow the target to implement this method for its nodes.
1992 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1993 case ISD::INTRINSIC_WO_CHAIN:
1994 case ISD::INTRINSIC_W_CHAIN:
1995 case ISD::INTRINSIC_VOID:
1996 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2003 /// ComputeNumSignBits - Return the number of times the sign bit of the
2004 /// register is replicated into the other bits. We know that at least 1 bit
2005 /// is always equal to the sign bit (itself), but other cases can give us
2006 /// information. For example, immediately after an "SRA X, 2", we know that
2007 /// the top 3 bits are all equal to each other, so we return 3.
2008 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2009 EVT VT = Op.getValueType();
2010 assert(VT.isInteger() && "Invalid VT!");
2011 unsigned VTBits = VT.getScalarType().getSizeInBits();
2013 unsigned FirstAnswer = 1;
2016 return 1; // Limit search depth.
2018 switch (Op.getOpcode()) {
2020 case ISD::AssertSext:
2021 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2022 return VTBits-Tmp+1;
2023 case ISD::AssertZext:
2024 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2027 case ISD::Constant: {
2028 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2029 // If negative, return # leading ones.
2030 if (Val.isNegative())
2031 return Val.countLeadingOnes();
2033 // Return # leading zeros.
2034 return Val.countLeadingZeros();
2037 case ISD::SIGN_EXTEND:
2038 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2039 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2041 case ISD::SIGN_EXTEND_INREG:
2042 // Max of the input and what this extends.
2044 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2047 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2048 return std::max(Tmp, Tmp2);
2051 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2052 // SRA X, C -> adds C sign bits.
2053 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2054 Tmp += C->getZExtValue();
2055 if (Tmp > VTBits) Tmp = VTBits;
2059 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2060 // shl destroys sign bits.
2061 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2062 if (C->getZExtValue() >= VTBits || // Bad shift.
2063 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2064 return Tmp - C->getZExtValue();
2069 case ISD::XOR: // NOT is handled here.
2070 // Logical binary ops preserve the number of sign bits at the worst.
2071 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2073 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2074 FirstAnswer = std::min(Tmp, Tmp2);
2075 // We computed what we know about the sign bits as our first
2076 // answer. Now proceed to the generic code that uses
2077 // ComputeMaskedBits, and pick whichever answer is better.
2082 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2083 if (Tmp == 1) return 1; // Early out.
2084 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2085 return std::min(Tmp, Tmp2);
2093 if (Op.getResNo() != 1)
2095 // The boolean result conforms to getBooleanContents. Fall through.
2097 // If setcc returns 0/-1, all bits are sign bits.
2098 if (TLI.getBooleanContents() ==
2099 TargetLowering::ZeroOrNegativeOneBooleanContent)
2104 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2105 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2107 // Handle rotate right by N like a rotate left by 32-N.
2108 if (Op.getOpcode() == ISD::ROTR)
2109 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2111 // If we aren't rotating out all of the known-in sign bits, return the
2112 // number that are left. This handles rotl(sext(x), 1) for example.
2113 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2114 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2118 // Add can have at most one carry bit. Thus we know that the output
2119 // is, at worst, one more bit than the inputs.
2120 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2121 if (Tmp == 1) return 1; // Early out.
2123 // Special case decrementing a value (ADD X, -1):
2124 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2125 if (CRHS->isAllOnesValue()) {
2126 APInt KnownZero, KnownOne;
2127 APInt Mask = APInt::getAllOnesValue(VTBits);
2128 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2130 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2132 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2135 // If we are subtracting one from a positive number, there is no carry
2136 // out of the result.
2137 if (KnownZero.isNegative())
2141 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2142 if (Tmp2 == 1) return 1;
2143 return std::min(Tmp, Tmp2)-1;
2147 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2148 if (Tmp2 == 1) return 1;
2151 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2152 if (CLHS->isNullValue()) {
2153 APInt KnownZero, KnownOne;
2154 APInt Mask = APInt::getAllOnesValue(VTBits);
2155 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2156 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2158 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2161 // If the input is known to be positive (the sign bit is known clear),
2162 // the output of the NEG has the same number of sign bits as the input.
2163 if (KnownZero.isNegative())
2166 // Otherwise, we treat this like a SUB.
2169 // Sub can have at most one carry bit. Thus we know that the output
2170 // is, at worst, one more bit than the inputs.
2171 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2172 if (Tmp == 1) return 1; // Early out.
2173 return std::min(Tmp, Tmp2)-1;
2176 // FIXME: it's tricky to do anything useful for this, but it is an important
2177 // case for targets like X86.
2181 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2182 if (Op.getOpcode() == ISD::LOAD) {
2183 LoadSDNode *LD = cast<LoadSDNode>(Op);
2184 unsigned ExtType = LD->getExtensionType();
2187 case ISD::SEXTLOAD: // '17' bits known
2188 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2189 return VTBits-Tmp+1;
2190 case ISD::ZEXTLOAD: // '16' bits known
2191 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2196 // Allow the target to implement this method for its nodes.
2197 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2198 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2199 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2200 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2201 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2202 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2205 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2206 // use this information.
2207 APInt KnownZero, KnownOne;
2208 APInt Mask = APInt::getAllOnesValue(VTBits);
2209 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2211 if (KnownZero.isNegative()) { // sign bit is 0
2213 } else if (KnownOne.isNegative()) { // sign bit is 1;
2220 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2221 // the number of identical bits in the top of the input value.
2223 Mask <<= Mask.getBitWidth()-VTBits;
2224 // Return # leading zeros. We use 'min' here in case Val was zero before
2225 // shifting. We don't want to return '64' as for an i32 "0".
2226 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2229 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2230 // If we're told that NaNs won't happen, assume they won't.
2231 if (FiniteOnlyFPMath())
2234 // If the value is a constant, we can obviously see if it is a NaN or not.
2235 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2236 return !C->getValueAPF().isNaN();
2238 // TODO: Recognize more cases here.
2243 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2244 // If the value is a constant, we can obviously see if it is a zero or not.
2245 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2246 return !C->isZero();
2248 // TODO: Recognize more cases here.
2253 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2254 // Check the obvious case.
2255 if (A == B) return true;
2257 // For for negative and positive zero.
2258 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2259 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2260 if (CA->isZero() && CB->isZero()) return true;
2262 // Otherwise they may not be equal.
2266 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2267 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2268 if (!GA) return false;
2269 if (GA->getOffset() != 0) return false;
2270 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2271 if (!GV) return false;
2272 return MF->getMMI().hasDebugInfo();
2276 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2277 /// element of the result of the vector shuffle.
2278 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2280 EVT VT = N->getValueType(0);
2281 DebugLoc dl = N->getDebugLoc();
2282 if (N->getMaskElt(i) < 0)
2283 return getUNDEF(VT.getVectorElementType());
2284 unsigned Index = N->getMaskElt(i);
2285 unsigned NumElems = VT.getVectorNumElements();
2286 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2289 if (V.getOpcode() == ISD::BIT_CONVERT) {
2290 V = V.getOperand(0);
2291 EVT VVT = V.getValueType();
2292 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2295 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2296 return (Index == 0) ? V.getOperand(0)
2297 : getUNDEF(VT.getVectorElementType());
2298 if (V.getOpcode() == ISD::BUILD_VECTOR)
2299 return V.getOperand(Index);
2300 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2301 return getShuffleScalarElt(SVN, Index);
2306 /// getNode - Gets or creates the specified node.
2308 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2309 FoldingSetNodeID ID;
2310 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2313 return SDValue(E, 0);
2315 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2316 CSEMap.InsertNode(N, IP);
2318 AllNodes.push_back(N);
2322 return SDValue(N, 0);
2325 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2326 EVT VT, SDValue Operand) {
2327 // Constant fold unary operations with an integer constant operand.
2328 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2329 const APInt &Val = C->getAPIntValue();
2332 case ISD::SIGN_EXTEND:
2333 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2334 case ISD::ANY_EXTEND:
2335 case ISD::ZERO_EXTEND:
2337 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2338 case ISD::UINT_TO_FP:
2339 case ISD::SINT_TO_FP: {
2340 const uint64_t zero[] = {0, 0};
2341 // No compile time operations on ppcf128.
2342 if (VT == MVT::ppcf128) break;
2343 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2344 (void)apf.convertFromAPInt(Val,
2345 Opcode==ISD::SINT_TO_FP,
2346 APFloat::rmNearestTiesToEven);
2347 return getConstantFP(apf, VT);
2349 case ISD::BIT_CONVERT:
2350 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2351 return getConstantFP(Val.bitsToFloat(), VT);
2352 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2353 return getConstantFP(Val.bitsToDouble(), VT);
2356 return getConstant(Val.byteSwap(), VT);
2358 return getConstant(Val.countPopulation(), VT);
2360 return getConstant(Val.countLeadingZeros(), VT);
2362 return getConstant(Val.countTrailingZeros(), VT);
2366 // Constant fold unary operations with a floating point constant operand.
2367 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2368 APFloat V = C->getValueAPF(); // make copy
2369 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2373 return getConstantFP(V, VT);
2376 return getConstantFP(V, VT);
2378 case ISD::FP_EXTEND: {
2380 // This can return overflow, underflow, or inexact; we don't care.
2381 // FIXME need to be more flexible about rounding mode.
2382 (void)V.convert(*EVTToAPFloatSemantics(VT),
2383 APFloat::rmNearestTiesToEven, &ignored);
2384 return getConstantFP(V, VT);
2386 case ISD::FP_TO_SINT:
2387 case ISD::FP_TO_UINT: {
2390 assert(integerPartWidth >= 64);
2391 // FIXME need to be more flexible about rounding mode.
2392 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2393 Opcode==ISD::FP_TO_SINT,
2394 APFloat::rmTowardZero, &ignored);
2395 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2397 APInt api(VT.getSizeInBits(), 2, x);
2398 return getConstant(api, VT);
2400 case ISD::BIT_CONVERT:
2401 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2402 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2403 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2404 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2410 unsigned OpOpcode = Operand.getNode()->getOpcode();
2412 case ISD::TokenFactor:
2413 case ISD::MERGE_VALUES:
2414 case ISD::CONCAT_VECTORS:
2415 return Operand; // Factor, merge or concat of one node? No need.
2416 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2417 case ISD::FP_EXTEND:
2418 assert(VT.isFloatingPoint() &&
2419 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2420 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2421 assert((!VT.isVector() ||
2422 VT.getVectorNumElements() ==
2423 Operand.getValueType().getVectorNumElements()) &&
2424 "Vector element count mismatch!");
2425 if (Operand.getOpcode() == ISD::UNDEF)
2426 return getUNDEF(VT);
2428 case ISD::SIGN_EXTEND:
2429 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2430 "Invalid SIGN_EXTEND!");
2431 if (Operand.getValueType() == VT) return Operand; // noop extension
2432 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2433 "Invalid sext node, dst < src!");
2434 assert((!VT.isVector() ||
2435 VT.getVectorNumElements() ==
2436 Operand.getValueType().getVectorNumElements()) &&
2437 "Vector element count mismatch!");
2438 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2439 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2441 case ISD::ZERO_EXTEND:
2442 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2443 "Invalid ZERO_EXTEND!");
2444 if (Operand.getValueType() == VT) return Operand; // noop extension
2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2446 "Invalid zext node, dst < src!");
2447 assert((!VT.isVector() ||
2448 VT.getVectorNumElements() ==
2449 Operand.getValueType().getVectorNumElements()) &&
2450 "Vector element count mismatch!");
2451 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2452 return getNode(ISD::ZERO_EXTEND, DL, VT,
2453 Operand.getNode()->getOperand(0));
2455 case ISD::ANY_EXTEND:
2456 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2457 "Invalid ANY_EXTEND!");
2458 if (Operand.getValueType() == VT) return Operand; // noop extension
2459 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2460 "Invalid anyext node, dst < src!");
2461 assert((!VT.isVector() ||
2462 VT.getVectorNumElements() ==
2463 Operand.getValueType().getVectorNumElements()) &&
2464 "Vector element count mismatch!");
2465 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2466 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2467 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2470 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2471 "Invalid TRUNCATE!");
2472 if (Operand.getValueType() == VT) return Operand; // noop truncate
2473 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2474 "Invalid truncate node, src < dst!");
2475 assert((!VT.isVector() ||
2476 VT.getVectorNumElements() ==
2477 Operand.getValueType().getVectorNumElements()) &&
2478 "Vector element count mismatch!");
2479 if (OpOpcode == ISD::TRUNCATE)
2480 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2481 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2482 OpOpcode == ISD::ANY_EXTEND) {
2483 // If the source is smaller than the dest, we still need an extend.
2484 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2485 .bitsLT(VT.getScalarType()))
2486 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2487 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2488 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2490 return Operand.getNode()->getOperand(0);
2493 case ISD::BIT_CONVERT:
2494 // Basic sanity checking.
2495 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2496 && "Cannot BIT_CONVERT between types of different sizes!");
2497 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2498 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2499 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2500 if (OpOpcode == ISD::UNDEF)
2501 return getUNDEF(VT);
2503 case ISD::SCALAR_TO_VECTOR:
2504 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2505 (VT.getVectorElementType() == Operand.getValueType() ||
2506 (VT.getVectorElementType().isInteger() &&
2507 Operand.getValueType().isInteger() &&
2508 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2509 "Illegal SCALAR_TO_VECTOR node!");
2510 if (OpOpcode == ISD::UNDEF)
2511 return getUNDEF(VT);
2512 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2513 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2514 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2515 Operand.getConstantOperandVal(1) == 0 &&
2516 Operand.getOperand(0).getValueType() == VT)
2517 return Operand.getOperand(0);
2520 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2521 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2522 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2523 Operand.getNode()->getOperand(0));
2524 if (OpOpcode == ISD::FNEG) // --X -> X
2525 return Operand.getNode()->getOperand(0);
2528 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2529 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2534 SDVTList VTs = getVTList(VT);
2535 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2536 FoldingSetNodeID ID;
2537 SDValue Ops[1] = { Operand };
2538 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2540 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2541 return SDValue(E, 0);
2543 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2544 CSEMap.InsertNode(N, IP);
2546 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2549 AllNodes.push_back(N);
2553 return SDValue(N, 0);
2556 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2558 ConstantSDNode *Cst1,
2559 ConstantSDNode *Cst2) {
2560 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2563 case ISD::ADD: return getConstant(C1 + C2, VT);
2564 case ISD::SUB: return getConstant(C1 - C2, VT);
2565 case ISD::MUL: return getConstant(C1 * C2, VT);
2567 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2570 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2573 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2576 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2578 case ISD::AND: return getConstant(C1 & C2, VT);
2579 case ISD::OR: return getConstant(C1 | C2, VT);
2580 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2581 case ISD::SHL: return getConstant(C1 << C2, VT);
2582 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2583 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2584 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2585 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2592 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2593 SDValue N1, SDValue N2) {
2594 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2595 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2598 case ISD::TokenFactor:
2599 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2600 N2.getValueType() == MVT::Other && "Invalid token factor!");
2601 // Fold trivial token factors.
2602 if (N1.getOpcode() == ISD::EntryToken) return N2;
2603 if (N2.getOpcode() == ISD::EntryToken) return N1;
2604 if (N1 == N2) return N1;
2606 case ISD::CONCAT_VECTORS:
2607 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2608 // one big BUILD_VECTOR.
2609 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2610 N2.getOpcode() == ISD::BUILD_VECTOR) {
2611 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2612 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2613 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2617 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2618 N1.getValueType() == VT && "Binary operator types must match!");
2619 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2620 // worth handling here.
2621 if (N2C && N2C->isNullValue())
2623 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2630 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2631 N1.getValueType() == VT && "Binary operator types must match!");
2632 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2633 // it's worth handling here.
2634 if (N2C && N2C->isNullValue())
2644 assert(VT.isInteger() && "This operator does not apply to FP types!");
2652 if (Opcode == ISD::FADD) {
2654 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2655 if (CFP->getValueAPF().isZero())
2658 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2659 if (CFP->getValueAPF().isZero())
2661 } else if (Opcode == ISD::FSUB) {
2663 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2664 if (CFP->getValueAPF().isZero())
2668 assert(N1.getValueType() == N2.getValueType() &&
2669 N1.getValueType() == VT && "Binary operator types must match!");
2671 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2672 assert(N1.getValueType() == VT &&
2673 N1.getValueType().isFloatingPoint() &&
2674 N2.getValueType().isFloatingPoint() &&
2675 "Invalid FCOPYSIGN!");
2682 assert(VT == N1.getValueType() &&
2683 "Shift operators return type must be the same as their first arg");
2684 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2685 "Shifts only work on integers");
2687 // Always fold shifts of i1 values so the code generator doesn't need to
2688 // handle them. Since we know the size of the shift has to be less than the
2689 // size of the value, the shift/rotate count is guaranteed to be zero.
2692 if (N2C && N2C->isNullValue())
2695 case ISD::FP_ROUND_INREG: {
2696 EVT EVT = cast<VTSDNode>(N2)->getVT();
2697 assert(VT == N1.getValueType() && "Not an inreg round!");
2698 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2699 "Cannot FP_ROUND_INREG integer types");
2700 assert(EVT.isVector() == VT.isVector() &&
2701 "FP_ROUND_INREG type should be vector iff the operand "
2703 assert((!EVT.isVector() ||
2704 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2705 "Vector element counts must match in FP_ROUND_INREG");
2706 assert(EVT.bitsLE(VT) && "Not rounding down!");
2707 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2711 assert(VT.isFloatingPoint() &&
2712 N1.getValueType().isFloatingPoint() &&
2713 VT.bitsLE(N1.getValueType()) &&
2714 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2715 if (N1.getValueType() == VT) return N1; // noop conversion.
2717 case ISD::AssertSext:
2718 case ISD::AssertZext: {
2719 EVT EVT = cast<VTSDNode>(N2)->getVT();
2720 assert(VT == N1.getValueType() && "Not an inreg extend!");
2721 assert(VT.isInteger() && EVT.isInteger() &&
2722 "Cannot *_EXTEND_INREG FP types");
2723 assert(!EVT.isVector() &&
2724 "AssertSExt/AssertZExt type should be the vector element type "
2725 "rather than the vector type!");
2726 assert(EVT.bitsLE(VT) && "Not extending!");
2727 if (VT == EVT) return N1; // noop assertion.
2730 case ISD::SIGN_EXTEND_INREG: {
2731 EVT EVT = cast<VTSDNode>(N2)->getVT();
2732 assert(VT == N1.getValueType() && "Not an inreg extend!");
2733 assert(VT.isInteger() && EVT.isInteger() &&
2734 "Cannot *_EXTEND_INREG FP types");
2735 assert(EVT.isVector() == VT.isVector() &&
2736 "SIGN_EXTEND_INREG type should be vector iff the operand "
2738 assert((!EVT.isVector() ||
2739 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2740 "Vector element counts must match in SIGN_EXTEND_INREG");
2741 assert(EVT.bitsLE(VT) && "Not extending!");
2742 if (EVT == VT) return N1; // Not actually extending
2745 APInt Val = N1C->getAPIntValue();
2746 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2747 Val <<= Val.getBitWidth()-FromBits;
2748 Val = Val.ashr(Val.getBitWidth()-FromBits);
2749 return getConstant(Val, VT);
2753 case ISD::EXTRACT_VECTOR_ELT:
2754 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2755 if (N1.getOpcode() == ISD::UNDEF)
2756 return getUNDEF(VT);
2758 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2759 // expanding copies of large vectors from registers.
2761 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2762 N1.getNumOperands() > 0) {
2764 N1.getOperand(0).getValueType().getVectorNumElements();
2765 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2766 N1.getOperand(N2C->getZExtValue() / Factor),
2767 getConstant(N2C->getZExtValue() % Factor,
2768 N2.getValueType()));
2771 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2772 // expanding large vector constants.
2773 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2774 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2775 EVT VEltTy = N1.getValueType().getVectorElementType();
2776 if (Elt.getValueType() != VEltTy) {
2777 // If the vector element type is not legal, the BUILD_VECTOR operands
2778 // are promoted and implicitly truncated. Make that explicit here.
2779 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2782 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2783 // result is implicitly extended.
2784 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2789 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2790 // operations are lowered to scalars.
2791 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2792 // If the indices are the same, return the inserted element else
2793 // if the indices are known different, extract the element from
2794 // the original vector.
2795 if (N1.getOperand(2) == N2) {
2796 if (VT == N1.getOperand(1).getValueType())
2797 return N1.getOperand(1);
2799 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2800 } else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2801 isa<ConstantSDNode>(N2))
2802 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2805 case ISD::EXTRACT_ELEMENT:
2806 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2807 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2808 (N1.getValueType().isInteger() == VT.isInteger()) &&
2809 "Wrong types for EXTRACT_ELEMENT!");
2811 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2812 // 64-bit integers into 32-bit parts. Instead of building the extract of
2813 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2814 if (N1.getOpcode() == ISD::BUILD_PAIR)
2815 return N1.getOperand(N2C->getZExtValue());
2817 // EXTRACT_ELEMENT of a constant int is also very common.
2818 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2819 unsigned ElementSize = VT.getSizeInBits();
2820 unsigned Shift = ElementSize * N2C->getZExtValue();
2821 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2822 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2825 case ISD::EXTRACT_SUBVECTOR:
2826 if (N1.getValueType() == VT) // Trivial extraction.
2833 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2834 if (SV.getNode()) return SV;
2835 } else { // Cannonicalize constant to RHS if commutative
2836 if (isCommutativeBinOp(Opcode)) {
2837 std::swap(N1C, N2C);
2843 // Constant fold FP operations.
2844 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2845 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2847 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2848 // Cannonicalize constant to RHS if commutative
2849 std::swap(N1CFP, N2CFP);
2851 } else if (N2CFP && VT != MVT::ppcf128) {
2852 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2853 APFloat::opStatus s;
2856 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2857 if (s != APFloat::opInvalidOp)
2858 return getConstantFP(V1, VT);
2861 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2862 if (s!=APFloat::opInvalidOp)
2863 return getConstantFP(V1, VT);
2866 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2867 if (s!=APFloat::opInvalidOp)
2868 return getConstantFP(V1, VT);
2871 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2872 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2873 return getConstantFP(V1, VT);
2876 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2877 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2878 return getConstantFP(V1, VT);
2880 case ISD::FCOPYSIGN:
2882 return getConstantFP(V1, VT);
2888 // Canonicalize an UNDEF to the RHS, even over a constant.
2889 if (N1.getOpcode() == ISD::UNDEF) {
2890 if (isCommutativeBinOp(Opcode)) {
2894 case ISD::FP_ROUND_INREG:
2895 case ISD::SIGN_EXTEND_INREG:
2901 return N1; // fold op(undef, arg2) -> undef
2909 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2910 // For vectors, we can't easily build an all zero vector, just return
2917 // Fold a bunch of operators when the RHS is undef.
2918 if (N2.getOpcode() == ISD::UNDEF) {
2921 if (N1.getOpcode() == ISD::UNDEF)
2922 // Handle undef ^ undef -> 0 special case. This is a common
2924 return getConstant(0, VT);
2934 return N2; // fold op(arg1, undef) -> undef
2948 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2949 // For vectors, we can't easily build an all zero vector, just return
2954 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2955 // For vectors, we can't easily build an all one vector, just return
2963 // Memoize this node if possible.
2965 SDVTList VTs = getVTList(VT);
2966 if (VT != MVT::Flag) {
2967 SDValue Ops[] = { N1, N2 };
2968 FoldingSetNodeID ID;
2969 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2971 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2972 return SDValue(E, 0);
2974 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2975 CSEMap.InsertNode(N, IP);
2977 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2980 AllNodes.push_back(N);
2984 return SDValue(N, 0);
2987 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2988 SDValue N1, SDValue N2, SDValue N3) {
2989 // Perform various simplifications.
2990 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2991 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2993 case ISD::CONCAT_VECTORS:
2994 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2995 // one big BUILD_VECTOR.
2996 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2997 N2.getOpcode() == ISD::BUILD_VECTOR &&
2998 N3.getOpcode() == ISD::BUILD_VECTOR) {
2999 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
3000 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
3001 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
3002 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3006 // Use FoldSetCC to simplify SETCC's.
3007 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3008 if (Simp.getNode()) return Simp;
3013 if (N1C->getZExtValue())
3014 return N2; // select true, X, Y -> X
3016 return N3; // select false, X, Y -> Y
3019 if (N2 == N3) return N2; // select C, X, X -> X
3023 if (N2C->getZExtValue()) // Unconditional branch
3024 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3026 return N1; // Never-taken branch
3029 case ISD::VECTOR_SHUFFLE:
3030 llvm_unreachable("should use getVectorShuffle constructor!");
3032 case ISD::BIT_CONVERT:
3033 // Fold bit_convert nodes from a type to themselves.
3034 if (N1.getValueType() == VT)
3039 // Memoize node if it doesn't produce a flag.
3041 SDVTList VTs = getVTList(VT);
3042 if (VT != MVT::Flag) {
3043 SDValue Ops[] = { N1, N2, N3 };
3044 FoldingSetNodeID ID;
3045 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3048 return SDValue(E, 0);
3050 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3051 CSEMap.InsertNode(N, IP);
3053 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3056 AllNodes.push_back(N);
3060 return SDValue(N, 0);
3063 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3064 SDValue N1, SDValue N2, SDValue N3,
3066 SDValue Ops[] = { N1, N2, N3, N4 };
3067 return getNode(Opcode, DL, VT, Ops, 4);
3070 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3071 SDValue N1, SDValue N2, SDValue N3,
3072 SDValue N4, SDValue N5) {
3073 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3074 return getNode(Opcode, DL, VT, Ops, 5);
3077 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3078 /// the incoming stack arguments to be loaded from the stack.
3079 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3080 SmallVector<SDValue, 8> ArgChains;
3082 // Include the original chain at the beginning of the list. When this is
3083 // used by target LowerCall hooks, this helps legalize find the
3084 // CALLSEQ_BEGIN node.
3085 ArgChains.push_back(Chain);
3087 // Add a chain value for each stack argument.
3088 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3089 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3090 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3091 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3092 if (FI->getIndex() < 0)
3093 ArgChains.push_back(SDValue(L, 1));
3095 // Build a tokenfactor for all the chains.
3096 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3097 &ArgChains[0], ArgChains.size());
3100 /// getMemsetValue - Vectorized representation of the memset value
3102 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3104 assert(Value.getOpcode() != ISD::UNDEF);
3106 unsigned NumBits = VT.getScalarType().getSizeInBits();
3107 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3108 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3110 for (unsigned i = NumBits; i > 8; i >>= 1) {
3111 Val = (Val << Shift) | Val;
3115 return DAG.getConstant(Val, VT);
3116 return DAG.getConstantFP(APFloat(Val), VT);
3119 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3120 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3122 for (unsigned i = NumBits; i > 8; i >>= 1) {
3123 Value = DAG.getNode(ISD::OR, dl, VT,
3124 DAG.getNode(ISD::SHL, dl, VT, Value,
3125 DAG.getConstant(Shift,
3126 TLI.getShiftAmountTy())),
3134 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3135 /// used when a memcpy is turned into a memset when the source is a constant
3137 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3138 const TargetLowering &TLI,
3139 std::string &Str, unsigned Offset) {
3140 // Handle vector with all elements zero.
3143 return DAG.getConstant(0, VT);
3144 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3145 VT.getSimpleVT().SimpleTy == MVT::f64)
3146 return DAG.getConstantFP(0.0, VT);
3147 else if (VT.isVector()) {
3148 unsigned NumElts = VT.getVectorNumElements();
3149 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3150 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3151 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3154 llvm_unreachable("Expected type!");
3157 assert(!VT.isVector() && "Can't handle vector type here!");
3158 unsigned NumBits = VT.getSizeInBits();
3159 unsigned MSB = NumBits / 8;
3161 if (TLI.isLittleEndian())
3162 Offset = Offset + MSB - 1;
3163 for (unsigned i = 0; i != MSB; ++i) {
3164 Val = (Val << 8) | (unsigned char)Str[Offset];
3165 Offset += TLI.isLittleEndian() ? -1 : 1;
3167 return DAG.getConstant(Val, VT);
3170 /// getMemBasePlusOffset - Returns base and offset node for the
3172 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3173 SelectionDAG &DAG) {
3174 EVT VT = Base.getValueType();
3175 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3176 VT, Base, DAG.getConstant(Offset, VT));
3179 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3181 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3182 unsigned SrcDelta = 0;
3183 GlobalAddressSDNode *G = NULL;
3184 if (Src.getOpcode() == ISD::GlobalAddress)
3185 G = cast<GlobalAddressSDNode>(Src);
3186 else if (Src.getOpcode() == ISD::ADD &&
3187 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3188 Src.getOperand(1).getOpcode() == ISD::Constant) {
3189 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3190 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3195 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3196 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3202 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3203 /// to replace the memset / memcpy. Return true if the number of memory ops
3204 /// is below the threshold. It returns the types of the sequence of
3205 /// memory ops to perform memset / memcpy by reference.
3206 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3207 unsigned Limit, uint64_t Size,
3208 unsigned DstAlign, unsigned SrcAlign,
3209 bool NonScalarIntSafe,
3212 const TargetLowering &TLI) {
3213 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3214 "Expecting memcpy / memset source to meet alignment requirement!");
3215 // If 'SrcAlign' is zero, that means the memory operation does not need load
3216 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3217 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3218 // specified alignment of the memory operation. If it is zero, that means
3219 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3220 // indicates whether the memcpy source is constant so it does not need to be
3222 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3223 NonScalarIntSafe, MemcpyStrSrc,
3224 DAG.getMachineFunction());
3226 if (VT == MVT::Other) {
3227 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3228 TLI.allowsUnalignedMemoryAccesses(VT)) {
3229 VT = TLI.getPointerTy();
3231 switch (DstAlign & 7) {
3232 case 0: VT = MVT::i64; break;
3233 case 4: VT = MVT::i32; break;
3234 case 2: VT = MVT::i16; break;
3235 default: VT = MVT::i8; break;
3240 while (!TLI.isTypeLegal(LVT))
3241 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3242 assert(LVT.isInteger());
3248 unsigned NumMemOps = 0;
3250 unsigned VTSize = VT.getSizeInBits() / 8;
3251 while (VTSize > Size) {
3252 // For now, only use non-vector load / store's for the left-over pieces.
3253 if (VT.isVector() || VT.isFloatingPoint()) {
3255 while (!TLI.isTypeLegal(VT))
3256 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3257 VTSize = VT.getSizeInBits() / 8;
3259 // This can result in a type that is not legal on the target, e.g.
3260 // 1 or 2 bytes on PPC.
3261 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3266 if (++NumMemOps > Limit)
3268 MemOps.push_back(VT);
3275 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3276 SDValue Chain, SDValue Dst,
3277 SDValue Src, uint64_t Size,
3278 unsigned Align, bool isVol,
3280 const Value *DstSV, uint64_t DstSVOff,
3281 const Value *SrcSV, uint64_t SrcSVOff) {
3282 // Turn a memcpy of undef to nop.
3283 if (Src.getOpcode() == ISD::UNDEF)
3286 // Expand memcpy to a series of load and store ops if the size operand falls
3287 // below a certain threshold.
3288 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3289 std::vector<EVT> MemOps;
3290 bool DstAlignCanChange = false;
3291 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3292 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3293 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3294 DstAlignCanChange = true;
3295 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3296 if (Align > SrcAlign)
3299 bool CopyFromStr = isMemSrcFromString(Src, Str);
3300 bool isZeroStr = CopyFromStr && Str.empty();
3301 uint64_t Limit = -1ULL;
3303 Limit = TLI.getMaxStoresPerMemcpy();
3304 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3305 (DstAlignCanChange ? 0 : Align),
3306 (isZeroStr ? 0 : SrcAlign),
3307 true, CopyFromStr, DAG, TLI))
3310 if (DstAlignCanChange) {
3311 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3312 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3313 if (NewAlign > Align) {
3314 // Give the stack frame object a larger alignment if needed.
3315 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3316 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3321 SmallVector<SDValue, 8> OutChains;
3322 unsigned NumMemOps = MemOps.size();
3323 uint64_t SrcOff = 0, DstOff = 0;
3324 for (unsigned i = 0; i != NumMemOps; ++i) {
3326 unsigned VTSize = VT.getSizeInBits() / 8;
3327 SDValue Value, Store;
3330 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3331 // It's unlikely a store of a vector immediate can be done in a single
3332 // instruction. It would require a load from a constantpool first.
3333 // We only handle zero vectors here.
3334 // FIXME: Handle other cases where store of vector immediate is done in
3335 // a single instruction.
3336 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3337 Store = DAG.getStore(Chain, dl, Value,
3338 getMemBasePlusOffset(Dst, DstOff, DAG),
3339 DstSV, DstSVOff + DstOff, isVol, false, Align);
3341 // The type might not be legal for the target. This should only happen
3342 // if the type is smaller than a legal type, as on PPC, so the right
3343 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3344 // to Load/Store if NVT==VT.
3345 // FIXME does the case above also need this?
3346 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3347 assert(NVT.bitsGE(VT));
3348 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3349 getMemBasePlusOffset(Src, SrcOff, DAG),
3350 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3351 MinAlign(SrcAlign, SrcOff));
3352 Store = DAG.getTruncStore(Chain, dl, Value,
3353 getMemBasePlusOffset(Dst, DstOff, DAG),
3354 DstSV, DstSVOff + DstOff, VT, isVol, false,
3357 OutChains.push_back(Store);
3362 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3363 &OutChains[0], OutChains.size());
3366 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3367 SDValue Chain, SDValue Dst,
3368 SDValue Src, uint64_t Size,
3369 unsigned Align, bool isVol,
3371 const Value *DstSV, uint64_t DstSVOff,
3372 const Value *SrcSV, uint64_t SrcSVOff) {
3373 // Turn a memmove of undef to nop.
3374 if (Src.getOpcode() == ISD::UNDEF)
3377 // Expand memmove to a series of load and store ops if the size operand falls
3378 // below a certain threshold.
3379 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3380 std::vector<EVT> MemOps;
3381 uint64_t Limit = -1ULL;
3383 Limit = TLI.getMaxStoresPerMemmove();
3384 bool DstAlignCanChange = false;
3385 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3386 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3387 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3388 DstAlignCanChange = true;
3389 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3390 if (Align > SrcAlign)
3393 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3394 (DstAlignCanChange ? 0 : Align),
3395 SrcAlign, true, false, DAG, TLI))
3398 if (DstAlignCanChange) {
3399 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3400 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3401 if (NewAlign > Align) {
3402 // Give the stack frame object a larger alignment if needed.
3403 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3404 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3409 uint64_t SrcOff = 0, DstOff = 0;
3410 SmallVector<SDValue, 8> LoadValues;
3411 SmallVector<SDValue, 8> LoadChains;
3412 SmallVector<SDValue, 8> OutChains;
3413 unsigned NumMemOps = MemOps.size();
3414 for (unsigned i = 0; i < NumMemOps; i++) {
3416 unsigned VTSize = VT.getSizeInBits() / 8;
3417 SDValue Value, Store;
3419 Value = DAG.getLoad(VT, dl, Chain,
3420 getMemBasePlusOffset(Src, SrcOff, DAG),
3421 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3422 LoadValues.push_back(Value);
3423 LoadChains.push_back(Value.getValue(1));
3426 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3427 &LoadChains[0], LoadChains.size());
3429 for (unsigned i = 0; i < NumMemOps; i++) {
3431 unsigned VTSize = VT.getSizeInBits() / 8;
3432 SDValue Value, Store;
3434 Store = DAG.getStore(Chain, dl, LoadValues[i],
3435 getMemBasePlusOffset(Dst, DstOff, DAG),
3436 DstSV, DstSVOff + DstOff, isVol, false, Align);
3437 OutChains.push_back(Store);
3441 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3442 &OutChains[0], OutChains.size());
3445 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3446 SDValue Chain, SDValue Dst,
3447 SDValue Src, uint64_t Size,
3448 unsigned Align, bool isVol,
3449 const Value *DstSV, uint64_t DstSVOff) {
3450 // Turn a memset of undef to nop.
3451 if (Src.getOpcode() == ISD::UNDEF)
3454 // Expand memset to a series of load/store ops if the size operand
3455 // falls below a certain threshold.
3456 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3457 std::vector<EVT> MemOps;
3458 bool DstAlignCanChange = false;
3459 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3460 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3461 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3462 DstAlignCanChange = true;
3463 bool NonScalarIntSafe =
3464 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3465 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3466 Size, (DstAlignCanChange ? 0 : Align), 0,
3467 NonScalarIntSafe, false, DAG, TLI))
3470 if (DstAlignCanChange) {
3471 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3472 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3473 if (NewAlign > Align) {
3474 // Give the stack frame object a larger alignment if needed.
3475 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3476 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3481 SmallVector<SDValue, 8> OutChains;
3482 uint64_t DstOff = 0;
3483 unsigned NumMemOps = MemOps.size();
3484 for (unsigned i = 0; i < NumMemOps; i++) {
3486 unsigned VTSize = VT.getSizeInBits() / 8;
3487 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3488 SDValue Store = DAG.getStore(Chain, dl, Value,
3489 getMemBasePlusOffset(Dst, DstOff, DAG),
3490 DstSV, DstSVOff + DstOff, isVol, false, 0);
3491 OutChains.push_back(Store);
3495 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3496 &OutChains[0], OutChains.size());
3499 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3500 SDValue Src, SDValue Size,
3501 unsigned Align, bool isVol, bool AlwaysInline,
3502 const Value *DstSV, uint64_t DstSVOff,
3503 const Value *SrcSV, uint64_t SrcSVOff) {
3505 // Check to see if we should lower the memcpy to loads and stores first.
3506 // For cases within the target-specified limits, this is the best choice.
3507 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3509 // Memcpy with size zero? Just return the original chain.
3510 if (ConstantSize->isNullValue())
3513 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3514 ConstantSize->getZExtValue(),Align,
3515 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3516 if (Result.getNode())
3520 // Then check to see if we should lower the memcpy with target-specific
3521 // code. If the target chooses to do this, this is the next best.
3523 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3524 isVol, AlwaysInline,
3525 DstSV, DstSVOff, SrcSV, SrcSVOff);
3526 if (Result.getNode())
3529 // If we really need inline code and the target declined to provide it,
3530 // use a (potentially long) sequence of loads and stores.
3532 assert(ConstantSize && "AlwaysInline requires a constant size!");
3533 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3534 ConstantSize->getZExtValue(), Align, isVol,
3535 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3538 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3539 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3540 // respect volatile, so they may do things like read or write memory
3541 // beyond the given memory regions. But fixing this isn't easy, and most
3542 // people don't care.
3544 // Emit a library call.
3545 TargetLowering::ArgListTy Args;
3546 TargetLowering::ArgListEntry Entry;
3547 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3548 Entry.Node = Dst; Args.push_back(Entry);
3549 Entry.Node = Src; Args.push_back(Entry);
3550 Entry.Node = Size; Args.push_back(Entry);
3551 // FIXME: pass in DebugLoc
3552 std::pair<SDValue,SDValue> CallResult =
3553 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3554 false, false, false, false, 0,
3555 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3556 /*isReturnValueUsed=*/false,
3557 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3558 TLI.getPointerTy()),
3560 return CallResult.second;
3563 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3564 SDValue Src, SDValue Size,
3565 unsigned Align, bool isVol,
3566 const Value *DstSV, uint64_t DstSVOff,
3567 const Value *SrcSV, uint64_t SrcSVOff) {
3569 // Check to see if we should lower the memmove to loads and stores first.
3570 // For cases within the target-specified limits, this is the best choice.
3571 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3573 // Memmove with size zero? Just return the original chain.
3574 if (ConstantSize->isNullValue())
3578 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3579 ConstantSize->getZExtValue(), Align, isVol,
3580 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3581 if (Result.getNode())
3585 // Then check to see if we should lower the memmove with target-specific
3586 // code. If the target chooses to do this, this is the next best.
3588 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3589 DstSV, DstSVOff, SrcSV, SrcSVOff);
3590 if (Result.getNode())
3593 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3594 // not be safe. See memcpy above for more details.
3596 // Emit a library call.
3597 TargetLowering::ArgListTy Args;
3598 TargetLowering::ArgListEntry Entry;
3599 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3600 Entry.Node = Dst; Args.push_back(Entry);
3601 Entry.Node = Src; Args.push_back(Entry);
3602 Entry.Node = Size; Args.push_back(Entry);
3603 // FIXME: pass in DebugLoc
3604 std::pair<SDValue,SDValue> CallResult =
3605 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3606 false, false, false, false, 0,
3607 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3608 /*isReturnValueUsed=*/false,
3609 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3610 TLI.getPointerTy()),
3612 return CallResult.second;
3615 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3616 SDValue Src, SDValue Size,
3617 unsigned Align, bool isVol,
3618 const Value *DstSV, uint64_t DstSVOff) {
3620 // Check to see if we should lower the memset to stores first.
3621 // For cases within the target-specified limits, this is the best choice.
3622 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3624 // Memset with size zero? Just return the original chain.
3625 if (ConstantSize->isNullValue())
3629 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3630 Align, isVol, DstSV, DstSVOff);
3632 if (Result.getNode())
3636 // Then check to see if we should lower the memset with target-specific
3637 // code. If the target chooses to do this, this is the next best.
3639 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3641 if (Result.getNode())
3644 // Emit a library call.
3645 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3646 TargetLowering::ArgListTy Args;
3647 TargetLowering::ArgListEntry Entry;
3648 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3649 Args.push_back(Entry);
3650 // Extend or truncate the argument to be an i32 value for the call.
3651 if (Src.getValueType().bitsGT(MVT::i32))
3652 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3654 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3656 Entry.Ty = Type::getInt32Ty(*getContext());
3657 Entry.isSExt = true;
3658 Args.push_back(Entry);
3660 Entry.Ty = IntPtrTy;
3661 Entry.isSExt = false;
3662 Args.push_back(Entry);
3663 // FIXME: pass in DebugLoc
3664 std::pair<SDValue,SDValue> CallResult =
3665 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3666 false, false, false, false, 0,
3667 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3668 /*isReturnValueUsed=*/false,
3669 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3670 TLI.getPointerTy()),
3672 return CallResult.second;
3675 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3677 SDValue Ptr, SDValue Cmp,
3678 SDValue Swp, const Value* PtrVal,
3679 unsigned Alignment) {
3680 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3681 Alignment = getEVTAlignment(MemVT);
3683 // Check if the memory reference references a frame index
3685 if (const FrameIndexSDNode *FI =
3686 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3687 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3689 MachineFunction &MF = getMachineFunction();
3690 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3692 // For now, atomics are considered to be volatile always.
3693 Flags |= MachineMemOperand::MOVolatile;
3695 MachineMemOperand *MMO =
3696 MF.getMachineMemOperand(PtrVal, Flags, 0,
3697 MemVT.getStoreSize(), Alignment);
3699 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3702 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3704 SDValue Ptr, SDValue Cmp,
3705 SDValue Swp, MachineMemOperand *MMO) {
3706 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3707 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3709 EVT VT = Cmp.getValueType();
3711 SDVTList VTs = getVTList(VT, MVT::Other);
3712 FoldingSetNodeID ID;
3713 ID.AddInteger(MemVT.getRawBits());
3714 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3715 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3717 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3718 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3719 return SDValue(E, 0);
3721 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3722 Ptr, Cmp, Swp, MMO);
3723 CSEMap.InsertNode(N, IP);
3724 AllNodes.push_back(N);
3725 return SDValue(N, 0);
3728 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3730 SDValue Ptr, SDValue Val,
3731 const Value* PtrVal,
3732 unsigned Alignment) {
3733 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3734 Alignment = getEVTAlignment(MemVT);
3736 // Check if the memory reference references a frame index
3738 if (const FrameIndexSDNode *FI =
3739 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3740 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3742 MachineFunction &MF = getMachineFunction();
3743 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3745 // For now, atomics are considered to be volatile always.
3746 Flags |= MachineMemOperand::MOVolatile;
3748 MachineMemOperand *MMO =
3749 MF.getMachineMemOperand(PtrVal, Flags, 0,
3750 MemVT.getStoreSize(), Alignment);
3752 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3755 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3757 SDValue Ptr, SDValue Val,
3758 MachineMemOperand *MMO) {
3759 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3760 Opcode == ISD::ATOMIC_LOAD_SUB ||
3761 Opcode == ISD::ATOMIC_LOAD_AND ||
3762 Opcode == ISD::ATOMIC_LOAD_OR ||
3763 Opcode == ISD::ATOMIC_LOAD_XOR ||
3764 Opcode == ISD::ATOMIC_LOAD_NAND ||
3765 Opcode == ISD::ATOMIC_LOAD_MIN ||
3766 Opcode == ISD::ATOMIC_LOAD_MAX ||
3767 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3768 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3769 Opcode == ISD::ATOMIC_SWAP) &&
3770 "Invalid Atomic Op");
3772 EVT VT = Val.getValueType();
3774 SDVTList VTs = getVTList(VT, MVT::Other);
3775 FoldingSetNodeID ID;
3776 ID.AddInteger(MemVT.getRawBits());
3777 SDValue Ops[] = {Chain, Ptr, Val};
3778 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3780 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3781 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3782 return SDValue(E, 0);
3784 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3786 CSEMap.InsertNode(N, IP);
3787 AllNodes.push_back(N);
3788 return SDValue(N, 0);
3791 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3792 /// Allowed to return something different (and simpler) if Simplify is true.
3793 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3798 SmallVector<EVT, 4> VTs;
3799 VTs.reserve(NumOps);
3800 for (unsigned i = 0; i < NumOps; ++i)
3801 VTs.push_back(Ops[i].getValueType());
3802 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3807 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3808 const EVT *VTs, unsigned NumVTs,
3809 const SDValue *Ops, unsigned NumOps,
3810 EVT MemVT, const Value *srcValue, int SVOff,
3811 unsigned Align, bool Vol,
3812 bool ReadMem, bool WriteMem) {
3813 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3814 MemVT, srcValue, SVOff, Align, Vol,
3819 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3820 const SDValue *Ops, unsigned NumOps,
3821 EVT MemVT, const Value *srcValue, int SVOff,
3822 unsigned Align, bool Vol,
3823 bool ReadMem, bool WriteMem) {
3824 if (Align == 0) // Ensure that codegen never sees alignment 0
3825 Align = getEVTAlignment(MemVT);
3827 MachineFunction &MF = getMachineFunction();
3830 Flags |= MachineMemOperand::MOStore;
3832 Flags |= MachineMemOperand::MOLoad;
3834 Flags |= MachineMemOperand::MOVolatile;
3835 MachineMemOperand *MMO =
3836 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3837 MemVT.getStoreSize(), Align);
3839 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3843 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3844 const SDValue *Ops, unsigned NumOps,
3845 EVT MemVT, MachineMemOperand *MMO) {
3846 assert((Opcode == ISD::INTRINSIC_VOID ||
3847 Opcode == ISD::INTRINSIC_W_CHAIN ||
3848 (Opcode <= INT_MAX &&
3849 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3850 "Opcode is not a memory-accessing opcode!");
3852 // Memoize the node unless it returns a flag.
3853 MemIntrinsicSDNode *N;
3854 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3855 FoldingSetNodeID ID;
3856 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3858 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3859 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3860 return SDValue(E, 0);
3863 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3865 CSEMap.InsertNode(N, IP);
3867 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3870 AllNodes.push_back(N);
3871 return SDValue(N, 0);
3875 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3876 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3877 SDValue Ptr, SDValue Offset,
3878 const Value *SV, int SVOffset, EVT MemVT,
3879 bool isVolatile, bool isNonTemporal,
3880 unsigned Alignment) {
3881 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3882 Alignment = getEVTAlignment(VT);
3884 // Check if the memory reference references a frame index
3886 if (const FrameIndexSDNode *FI =
3887 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3888 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3890 MachineFunction &MF = getMachineFunction();
3891 unsigned Flags = MachineMemOperand::MOLoad;
3893 Flags |= MachineMemOperand::MOVolatile;
3895 Flags |= MachineMemOperand::MONonTemporal;
3896 MachineMemOperand *MMO =
3897 MF.getMachineMemOperand(SV, Flags, SVOffset,
3898 MemVT.getStoreSize(), Alignment);
3899 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3903 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3904 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3905 SDValue Ptr, SDValue Offset, EVT MemVT,
3906 MachineMemOperand *MMO) {
3908 ExtType = ISD::NON_EXTLOAD;
3909 } else if (ExtType == ISD::NON_EXTLOAD) {
3910 assert(VT == MemVT && "Non-extending load from different memory type!");
3913 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3914 "Should only be an extending load, not truncating!");
3915 assert(VT.isInteger() == MemVT.isInteger() &&
3916 "Cannot convert from FP to Int or Int -> FP!");
3917 assert(VT.isVector() == MemVT.isVector() &&
3918 "Cannot use trunc store to convert to or from a vector!");
3919 assert((!VT.isVector() ||
3920 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3921 "Cannot use trunc store to change the number of vector elements!");
3924 bool Indexed = AM != ISD::UNINDEXED;
3925 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3926 "Unindexed load with an offset!");
3928 SDVTList VTs = Indexed ?
3929 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3930 SDValue Ops[] = { Chain, Ptr, Offset };
3931 FoldingSetNodeID ID;
3932 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3933 ID.AddInteger(MemVT.getRawBits());
3934 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3935 MMO->isNonTemporal()));
3937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3938 cast<LoadSDNode>(E)->refineAlignment(MMO);
3939 return SDValue(E, 0);
3941 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3943 CSEMap.InsertNode(N, IP);
3944 AllNodes.push_back(N);
3945 return SDValue(N, 0);
3948 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3949 SDValue Chain, SDValue Ptr,
3950 const Value *SV, int SVOffset,
3951 bool isVolatile, bool isNonTemporal,
3952 unsigned Alignment) {
3953 SDValue Undef = getUNDEF(Ptr.getValueType());
3954 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3955 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3958 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3959 SDValue Chain, SDValue Ptr,
3961 int SVOffset, EVT MemVT,
3962 bool isVolatile, bool isNonTemporal,
3963 unsigned Alignment) {
3964 SDValue Undef = getUNDEF(Ptr.getValueType());
3965 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3966 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3970 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3971 SDValue Offset, ISD::MemIndexedMode AM) {
3972 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3973 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3974 "Load is already a indexed load!");
3975 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3976 LD->getChain(), Base, Offset, LD->getSrcValue(),
3977 LD->getSrcValueOffset(), LD->getMemoryVT(),
3978 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3981 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3982 SDValue Ptr, const Value *SV, int SVOffset,
3983 bool isVolatile, bool isNonTemporal,
3984 unsigned Alignment) {
3985 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3986 Alignment = getEVTAlignment(Val.getValueType());
3988 // Check if the memory reference references a frame index
3990 if (const FrameIndexSDNode *FI =
3991 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3992 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3994 MachineFunction &MF = getMachineFunction();
3995 unsigned Flags = MachineMemOperand::MOStore;
3997 Flags |= MachineMemOperand::MOVolatile;
3999 Flags |= MachineMemOperand::MONonTemporal;
4000 MachineMemOperand *MMO =
4001 MF.getMachineMemOperand(SV, Flags, SVOffset,
4002 Val.getValueType().getStoreSize(), Alignment);
4004 return getStore(Chain, dl, Val, Ptr, MMO);
4007 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4008 SDValue Ptr, MachineMemOperand *MMO) {
4009 EVT VT = Val.getValueType();
4010 SDVTList VTs = getVTList(MVT::Other);
4011 SDValue Undef = getUNDEF(Ptr.getValueType());
4012 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4013 FoldingSetNodeID ID;
4014 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4015 ID.AddInteger(VT.getRawBits());
4016 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4017 MMO->isNonTemporal()));
4019 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4020 cast<StoreSDNode>(E)->refineAlignment(MMO);
4021 return SDValue(E, 0);
4023 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4025 CSEMap.InsertNode(N, IP);
4026 AllNodes.push_back(N);
4027 return SDValue(N, 0);
4030 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4031 SDValue Ptr, const Value *SV,
4032 int SVOffset, EVT SVT,
4033 bool isVolatile, bool isNonTemporal,
4034 unsigned Alignment) {
4035 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4036 Alignment = getEVTAlignment(SVT);
4038 // Check if the memory reference references a frame index
4040 if (const FrameIndexSDNode *FI =
4041 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4042 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4044 MachineFunction &MF = getMachineFunction();
4045 unsigned Flags = MachineMemOperand::MOStore;
4047 Flags |= MachineMemOperand::MOVolatile;
4049 Flags |= MachineMemOperand::MONonTemporal;
4050 MachineMemOperand *MMO =
4051 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4053 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4056 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4057 SDValue Ptr, EVT SVT,
4058 MachineMemOperand *MMO) {
4059 EVT VT = Val.getValueType();
4062 return getStore(Chain, dl, Val, Ptr, MMO);
4064 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4065 "Should only be a truncating store, not extending!");
4066 assert(VT.isInteger() == SVT.isInteger() &&
4067 "Can't do FP-INT conversion!");
4068 assert(VT.isVector() == SVT.isVector() &&
4069 "Cannot use trunc store to convert to or from a vector!");
4070 assert((!VT.isVector() ||
4071 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4072 "Cannot use trunc store to change the number of vector elements!");
4074 SDVTList VTs = getVTList(MVT::Other);
4075 SDValue Undef = getUNDEF(Ptr.getValueType());
4076 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4077 FoldingSetNodeID ID;
4078 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4079 ID.AddInteger(SVT.getRawBits());
4080 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4081 MMO->isNonTemporal()));
4083 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4084 cast<StoreSDNode>(E)->refineAlignment(MMO);
4085 return SDValue(E, 0);
4087 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4089 CSEMap.InsertNode(N, IP);
4090 AllNodes.push_back(N);
4091 return SDValue(N, 0);
4095 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4096 SDValue Offset, ISD::MemIndexedMode AM) {
4097 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4098 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4099 "Store is already a indexed store!");
4100 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4101 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4102 FoldingSetNodeID ID;
4103 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4104 ID.AddInteger(ST->getMemoryVT().getRawBits());
4105 ID.AddInteger(ST->getRawSubclassData());
4107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4108 return SDValue(E, 0);
4110 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4111 ST->isTruncatingStore(),
4113 ST->getMemOperand());
4114 CSEMap.InsertNode(N, IP);
4115 AllNodes.push_back(N);
4116 return SDValue(N, 0);
4119 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4120 SDValue Chain, SDValue Ptr,
4122 SDValue Ops[] = { Chain, Ptr, SV };
4123 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4126 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4127 const SDUse *Ops, unsigned NumOps) {
4129 case 0: return getNode(Opcode, DL, VT);
4130 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4131 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4132 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4136 // Copy from an SDUse array into an SDValue array for use with
4137 // the regular getNode logic.
4138 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4139 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4142 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4143 const SDValue *Ops, unsigned NumOps) {
4145 case 0: return getNode(Opcode, DL, VT);
4146 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4147 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4148 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4154 case ISD::SELECT_CC: {
4155 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4156 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4157 "LHS and RHS of condition must have same type!");
4158 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4159 "True and False arms of SelectCC must have same type!");
4160 assert(Ops[2].getValueType() == VT &&
4161 "select_cc node must be of same type as true and false value!");
4165 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4166 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4167 "LHS/RHS of comparison should match types!");
4174 SDVTList VTs = getVTList(VT);
4176 if (VT != MVT::Flag) {
4177 FoldingSetNodeID ID;
4178 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4182 return SDValue(E, 0);
4184 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4185 CSEMap.InsertNode(N, IP);
4187 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4190 AllNodes.push_back(N);
4194 return SDValue(N, 0);
4197 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4198 const std::vector<EVT> &ResultTys,
4199 const SDValue *Ops, unsigned NumOps) {
4200 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4204 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4205 const EVT *VTs, unsigned NumVTs,
4206 const SDValue *Ops, unsigned NumOps) {
4208 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4209 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4212 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4213 const SDValue *Ops, unsigned NumOps) {
4214 if (VTList.NumVTs == 1)
4215 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4219 // FIXME: figure out how to safely handle things like
4220 // int foo(int x) { return 1 << (x & 255); }
4221 // int bar() { return foo(256); }
4222 case ISD::SRA_PARTS:
4223 case ISD::SRL_PARTS:
4224 case ISD::SHL_PARTS:
4225 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4226 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4227 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4228 else if (N3.getOpcode() == ISD::AND)
4229 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4230 // If the and is only masking out bits that cannot effect the shift,
4231 // eliminate the and.
4232 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4233 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4234 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4240 // Memoize the node unless it returns a flag.
4242 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4243 FoldingSetNodeID ID;
4244 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4247 return SDValue(E, 0);
4250 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4251 } else if (NumOps == 2) {
4252 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4253 } else if (NumOps == 3) {
4254 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4257 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4259 CSEMap.InsertNode(N, IP);
4262 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4263 } else if (NumOps == 2) {
4264 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4265 } else if (NumOps == 3) {
4266 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4269 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4272 AllNodes.push_back(N);
4276 return SDValue(N, 0);
4279 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4280 return getNode(Opcode, DL, VTList, 0, 0);
4283 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4285 SDValue Ops[] = { N1 };
4286 return getNode(Opcode, DL, VTList, Ops, 1);
4289 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4290 SDValue N1, SDValue N2) {
4291 SDValue Ops[] = { N1, N2 };
4292 return getNode(Opcode, DL, VTList, Ops, 2);
4295 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4296 SDValue N1, SDValue N2, SDValue N3) {
4297 SDValue Ops[] = { N1, N2, N3 };
4298 return getNode(Opcode, DL, VTList, Ops, 3);
4301 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4302 SDValue N1, SDValue N2, SDValue N3,
4304 SDValue Ops[] = { N1, N2, N3, N4 };
4305 return getNode(Opcode, DL, VTList, Ops, 4);
4308 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4309 SDValue N1, SDValue N2, SDValue N3,
4310 SDValue N4, SDValue N5) {
4311 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4312 return getNode(Opcode, DL, VTList, Ops, 5);
4315 SDVTList SelectionDAG::getVTList(EVT VT) {
4316 return makeVTList(SDNode::getValueTypeList(VT), 1);
4319 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4320 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4321 E = VTList.rend(); I != E; ++I)
4322 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4325 EVT *Array = Allocator.Allocate<EVT>(2);
4328 SDVTList Result = makeVTList(Array, 2);
4329 VTList.push_back(Result);
4333 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4334 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4335 E = VTList.rend(); I != E; ++I)
4336 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4340 EVT *Array = Allocator.Allocate<EVT>(3);
4344 SDVTList Result = makeVTList(Array, 3);
4345 VTList.push_back(Result);
4349 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4350 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4351 E = VTList.rend(); I != E; ++I)
4352 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4353 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4356 EVT *Array = Allocator.Allocate<EVT>(4);
4361 SDVTList Result = makeVTList(Array, 4);
4362 VTList.push_back(Result);
4366 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4368 case 0: llvm_unreachable("Cannot have nodes without results!");
4369 case 1: return getVTList(VTs[0]);
4370 case 2: return getVTList(VTs[0], VTs[1]);
4371 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4372 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4376 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4377 E = VTList.rend(); I != E; ++I) {
4378 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4381 bool NoMatch = false;
4382 for (unsigned i = 2; i != NumVTs; ++i)
4383 if (VTs[i] != I->VTs[i]) {
4391 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4392 std::copy(VTs, VTs+NumVTs, Array);
4393 SDVTList Result = makeVTList(Array, NumVTs);
4394 VTList.push_back(Result);
4399 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4400 /// specified operands. If the resultant node already exists in the DAG,
4401 /// this does not modify the specified node, instead it returns the node that
4402 /// already exists. If the resultant node does not exist in the DAG, the
4403 /// input node is returned. As a degenerate case, if you specify the same
4404 /// input operands as the node already has, the input node is returned.
4405 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4406 SDNode *N = InN.getNode();
4407 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4409 // Check to see if there is no change.
4410 if (Op == N->getOperand(0)) return InN;
4412 // See if the modified node already exists.
4413 void *InsertPos = 0;
4414 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4415 return SDValue(Existing, InN.getResNo());
4417 // Nope it doesn't. Remove the node from its current place in the maps.
4419 if (!RemoveNodeFromCSEMaps(N))
4422 // Now we update the operands.
4423 N->OperandList[0].set(Op);
4425 // If this gets put into a CSE map, add it.
4426 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4430 SDValue SelectionDAG::
4431 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4432 SDNode *N = InN.getNode();
4433 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4435 // Check to see if there is no change.
4436 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4437 return InN; // No operands changed, just return the input node.
4439 // See if the modified node already exists.
4440 void *InsertPos = 0;
4441 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4442 return SDValue(Existing, InN.getResNo());
4444 // Nope it doesn't. Remove the node from its current place in the maps.
4446 if (!RemoveNodeFromCSEMaps(N))
4449 // Now we update the operands.
4450 if (N->OperandList[0] != Op1)
4451 N->OperandList[0].set(Op1);
4452 if (N->OperandList[1] != Op2)
4453 N->OperandList[1].set(Op2);
4455 // If this gets put into a CSE map, add it.
4456 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4460 SDValue SelectionDAG::
4461 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4462 SDValue Ops[] = { Op1, Op2, Op3 };
4463 return UpdateNodeOperands(N, Ops, 3);
4466 SDValue SelectionDAG::
4467 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4468 SDValue Op3, SDValue Op4) {
4469 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4470 return UpdateNodeOperands(N, Ops, 4);
4473 SDValue SelectionDAG::
4474 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4475 SDValue Op3, SDValue Op4, SDValue Op5) {
4476 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4477 return UpdateNodeOperands(N, Ops, 5);
4480 SDValue SelectionDAG::
4481 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4482 SDNode *N = InN.getNode();
4483 assert(N->getNumOperands() == NumOps &&
4484 "Update with wrong number of operands");
4486 // Check to see if there is no change.
4487 bool AnyChange = false;
4488 for (unsigned i = 0; i != NumOps; ++i) {
4489 if (Ops[i] != N->getOperand(i)) {
4495 // No operands changed, just return the input node.
4496 if (!AnyChange) return InN;
4498 // See if the modified node already exists.
4499 void *InsertPos = 0;
4500 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4501 return SDValue(Existing, InN.getResNo());
4503 // Nope it doesn't. Remove the node from its current place in the maps.
4505 if (!RemoveNodeFromCSEMaps(N))
4508 // Now we update the operands.
4509 for (unsigned i = 0; i != NumOps; ++i)
4510 if (N->OperandList[i] != Ops[i])
4511 N->OperandList[i].set(Ops[i]);
4513 // If this gets put into a CSE map, add it.
4514 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4518 /// DropOperands - Release the operands and set this node to have
4520 void SDNode::DropOperands() {
4521 // Unlike the code in MorphNodeTo that does this, we don't need to
4522 // watch for dead nodes here.
4523 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4529 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4532 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4534 SDVTList VTs = getVTList(VT);
4535 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4538 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4539 EVT VT, SDValue Op1) {
4540 SDVTList VTs = getVTList(VT);
4541 SDValue Ops[] = { Op1 };
4542 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4545 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4546 EVT VT, SDValue Op1,
4548 SDVTList VTs = getVTList(VT);
4549 SDValue Ops[] = { Op1, Op2 };
4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4553 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4554 EVT VT, SDValue Op1,
4555 SDValue Op2, SDValue Op3) {
4556 SDVTList VTs = getVTList(VT);
4557 SDValue Ops[] = { Op1, Op2, Op3 };
4558 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4561 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4562 EVT VT, const SDValue *Ops,
4564 SDVTList VTs = getVTList(VT);
4565 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4568 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4569 EVT VT1, EVT VT2, const SDValue *Ops,
4571 SDVTList VTs = getVTList(VT1, VT2);
4572 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4575 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4577 SDVTList VTs = getVTList(VT1, VT2);
4578 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4581 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4582 EVT VT1, EVT VT2, EVT VT3,
4583 const SDValue *Ops, unsigned NumOps) {
4584 SDVTList VTs = getVTList(VT1, VT2, VT3);
4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4589 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4590 const SDValue *Ops, unsigned NumOps) {
4591 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4592 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4595 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4598 SDVTList VTs = getVTList(VT1, VT2);
4599 SDValue Ops[] = { Op1 };
4600 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4603 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4605 SDValue Op1, SDValue Op2) {
4606 SDVTList VTs = getVTList(VT1, VT2);
4607 SDValue Ops[] = { Op1, Op2 };
4608 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4611 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4613 SDValue Op1, SDValue Op2,
4615 SDVTList VTs = getVTList(VT1, VT2);
4616 SDValue Ops[] = { Op1, Op2, Op3 };
4617 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4620 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4621 EVT VT1, EVT VT2, EVT VT3,
4622 SDValue Op1, SDValue Op2,
4624 SDVTList VTs = getVTList(VT1, VT2, VT3);
4625 SDValue Ops[] = { Op1, Op2, Op3 };
4626 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4630 SDVTList VTs, const SDValue *Ops,
4632 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4633 // Reset the NodeID to -1.
4638 /// MorphNodeTo - This *mutates* the specified node to have the specified
4639 /// return type, opcode, and operands.
4641 /// Note that MorphNodeTo returns the resultant node. If there is already a
4642 /// node of the specified opcode and operands, it returns that node instead of
4643 /// the current one. Note that the DebugLoc need not be the same.
4645 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4646 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4647 /// node, and because it doesn't require CSE recalculation for any of
4648 /// the node's users.
4650 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4651 SDVTList VTs, const SDValue *Ops,
4653 // If an identical node already exists, use it.
4655 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4656 FoldingSetNodeID ID;
4657 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4658 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4662 if (!RemoveNodeFromCSEMaps(N))
4665 // Start the morphing.
4667 N->ValueList = VTs.VTs;
4668 N->NumValues = VTs.NumVTs;
4670 // Clear the operands list, updating used nodes to remove this from their
4671 // use list. Keep track of any operands that become dead as a result.
4672 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4673 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4675 SDNode *Used = Use.getNode();
4677 if (Used->use_empty())
4678 DeadNodeSet.insert(Used);
4681 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4682 // Initialize the memory references information.
4683 MN->setMemRefs(0, 0);
4684 // If NumOps is larger than the # of operands we can have in a
4685 // MachineSDNode, reallocate the operand list.
4686 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4687 if (MN->OperandsNeedDelete)
4688 delete[] MN->OperandList;
4689 if (NumOps > array_lengthof(MN->LocalOperands))
4690 // We're creating a final node that will live unmorphed for the
4691 // remainder of the current SelectionDAG iteration, so we can allocate
4692 // the operands directly out of a pool with no recycling metadata.
4693 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4696 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4697 MN->OperandsNeedDelete = false;
4699 MN->InitOperands(MN->OperandList, Ops, NumOps);
4701 // If NumOps is larger than the # of operands we currently have, reallocate
4702 // the operand list.
4703 if (NumOps > N->NumOperands) {
4704 if (N->OperandsNeedDelete)
4705 delete[] N->OperandList;
4706 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4707 N->OperandsNeedDelete = true;
4709 N->InitOperands(N->OperandList, Ops, NumOps);
4712 // Delete any nodes that are still dead after adding the uses for the
4714 if (!DeadNodeSet.empty()) {
4715 SmallVector<SDNode *, 16> DeadNodes;
4716 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4717 E = DeadNodeSet.end(); I != E; ++I)
4718 if ((*I)->use_empty())
4719 DeadNodes.push_back(*I);
4720 RemoveDeadNodes(DeadNodes);
4724 CSEMap.InsertNode(N, IP); // Memoize the new node.
4729 /// getMachineNode - These are used for target selectors to create a new node
4730 /// with specified return type(s), MachineInstr opcode, and operands.
4732 /// Note that getMachineNode returns the resultant node. If there is already a
4733 /// node of the specified opcode and operands, it returns that node instead of
4734 /// the current one.
4736 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4737 SDVTList VTs = getVTList(VT);
4738 return getMachineNode(Opcode, dl, VTs, 0, 0);
4742 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4743 SDVTList VTs = getVTList(VT);
4744 SDValue Ops[] = { Op1 };
4745 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4749 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4750 SDValue Op1, SDValue Op2) {
4751 SDVTList VTs = getVTList(VT);
4752 SDValue Ops[] = { Op1, Op2 };
4753 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4757 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4758 SDValue Op1, SDValue Op2, SDValue Op3) {
4759 SDVTList VTs = getVTList(VT);
4760 SDValue Ops[] = { Op1, Op2, Op3 };
4761 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4765 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4766 const SDValue *Ops, unsigned NumOps) {
4767 SDVTList VTs = getVTList(VT);
4768 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4772 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4773 SDVTList VTs = getVTList(VT1, VT2);
4774 return getMachineNode(Opcode, dl, VTs, 0, 0);
4778 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4779 EVT VT1, EVT VT2, SDValue Op1) {
4780 SDVTList VTs = getVTList(VT1, VT2);
4781 SDValue Ops[] = { Op1 };
4782 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4786 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4787 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4788 SDVTList VTs = getVTList(VT1, VT2);
4789 SDValue Ops[] = { Op1, Op2 };
4790 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4794 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4795 EVT VT1, EVT VT2, SDValue Op1,
4796 SDValue Op2, SDValue Op3) {
4797 SDVTList VTs = getVTList(VT1, VT2);
4798 SDValue Ops[] = { Op1, Op2, Op3 };
4799 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4803 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4805 const SDValue *Ops, unsigned NumOps) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4811 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4812 EVT VT1, EVT VT2, EVT VT3,
4813 SDValue Op1, SDValue Op2) {
4814 SDVTList VTs = getVTList(VT1, VT2, VT3);
4815 SDValue Ops[] = { Op1, Op2 };
4816 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4820 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4821 EVT VT1, EVT VT2, EVT VT3,
4822 SDValue Op1, SDValue Op2, SDValue Op3) {
4823 SDVTList VTs = getVTList(VT1, VT2, VT3);
4824 SDValue Ops[] = { Op1, Op2, Op3 };
4825 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4830 EVT VT1, EVT VT2, EVT VT3,
4831 const SDValue *Ops, unsigned NumOps) {
4832 SDVTList VTs = getVTList(VT1, VT2, VT3);
4833 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4837 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4838 EVT VT2, EVT VT3, EVT VT4,
4839 const SDValue *Ops, unsigned NumOps) {
4840 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4841 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4845 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4846 const std::vector<EVT> &ResultTys,
4847 const SDValue *Ops, unsigned NumOps) {
4848 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4849 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4853 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4854 const SDValue *Ops, unsigned NumOps) {
4855 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4860 FoldingSetNodeID ID;
4861 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4864 return cast<MachineSDNode>(E);
4867 // Allocate a new MachineSDNode.
4868 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4870 // Initialize the operands list.
4871 if (NumOps > array_lengthof(N->LocalOperands))
4872 // We're creating a final node that will live unmorphed for the
4873 // remainder of the current SelectionDAG iteration, so we can allocate
4874 // the operands directly out of a pool with no recycling metadata.
4875 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4878 N->InitOperands(N->LocalOperands, Ops, NumOps);
4879 N->OperandsNeedDelete = false;
4882 CSEMap.InsertNode(N, IP);
4884 AllNodes.push_back(N);
4891 /// getTargetExtractSubreg - A convenience function for creating
4892 /// TargetOpcode::EXTRACT_SUBREG nodes.
4894 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4896 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4897 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4898 VT, Operand, SRIdxVal);
4899 return SDValue(Subreg, 0);
4902 /// getTargetInsertSubreg - A convenience function for creating
4903 /// TargetOpcode::INSERT_SUBREG nodes.
4905 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4906 SDValue Operand, SDValue Subreg) {
4907 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4908 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4909 VT, Operand, Subreg, SRIdxVal);
4910 return SDValue(Result, 0);
4913 /// getNodeIfExists - Get the specified node if it's already available, or
4914 /// else return NULL.
4915 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4916 const SDValue *Ops, unsigned NumOps) {
4917 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4918 FoldingSetNodeID ID;
4919 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4921 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4927 /// getDbgValue - Creates a SDDbgValue node.
4930 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4931 DebugLoc DL, unsigned O) {
4932 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4936 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4937 DebugLoc DL, unsigned O) {
4938 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4942 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4943 DebugLoc DL, unsigned O) {
4944 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4949 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4950 /// pointed to by a use iterator is deleted, increment the use iterator
4951 /// so that it doesn't dangle.
4953 /// This class also manages a "downlink" DAGUpdateListener, to forward
4954 /// messages to ReplaceAllUsesWith's callers.
4956 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4957 SelectionDAG::DAGUpdateListener *DownLink;
4958 SDNode::use_iterator &UI;
4959 SDNode::use_iterator &UE;
4961 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4962 // Increment the iterator as needed.
4963 while (UI != UE && N == *UI)
4966 // Then forward the message.
4967 if (DownLink) DownLink->NodeDeleted(N, E);
4970 virtual void NodeUpdated(SDNode *N) {
4971 // Just forward the message.
4972 if (DownLink) DownLink->NodeUpdated(N);
4976 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4977 SDNode::use_iterator &ui,
4978 SDNode::use_iterator &ue)
4979 : DownLink(dl), UI(ui), UE(ue) {}
4984 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4985 /// This can cause recursive merging of nodes in the DAG.
4987 /// This version assumes From has a single result value.
4989 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4990 DAGUpdateListener *UpdateListener) {
4991 SDNode *From = FromN.getNode();
4992 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4993 "Cannot replace with this method!");
4994 assert(From != To.getNode() && "Cannot replace uses of with self");
4996 // Iterate over all the existing uses of From. New uses will be added
4997 // to the beginning of the use list, which we avoid visiting.
4998 // This specifically avoids visiting uses of From that arise while the
4999 // replacement is happening, because any such uses would be the result
5000 // of CSE: If an existing node looks like From after one of its operands
5001 // is replaced by To, we don't want to replace of all its users with To
5002 // too. See PR3018 for more info.
5003 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5004 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5008 // This node is about to morph, remove its old self from the CSE maps.
5009 RemoveNodeFromCSEMaps(User);
5011 // A user can appear in a use list multiple times, and when this
5012 // happens the uses are usually next to each other in the list.
5013 // To help reduce the number of CSE recomputations, process all
5014 // the uses of this user that we can find this way.
5016 SDUse &Use = UI.getUse();
5019 } while (UI != UE && *UI == User);
5021 // Now that we have modified User, add it back to the CSE maps. If it
5022 // already exists there, recursively merge the results together.
5023 AddModifiedNodeToCSEMaps(User, &Listener);
5027 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5028 /// This can cause recursive merging of nodes in the DAG.
5030 /// This version assumes that for each value of From, there is a
5031 /// corresponding value in To in the same position with the same type.
5033 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5034 DAGUpdateListener *UpdateListener) {
5036 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5037 assert((!From->hasAnyUseOfValue(i) ||
5038 From->getValueType(i) == To->getValueType(i)) &&
5039 "Cannot use this version of ReplaceAllUsesWith!");
5042 // Handle the trivial case.
5046 // Iterate over just the existing users of From. See the comments in
5047 // the ReplaceAllUsesWith above.
5048 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5049 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5053 // This node is about to morph, remove its old self from the CSE maps.
5054 RemoveNodeFromCSEMaps(User);
5056 // A user can appear in a use list multiple times, and when this
5057 // happens the uses are usually next to each other in the list.
5058 // To help reduce the number of CSE recomputations, process all
5059 // the uses of this user that we can find this way.
5061 SDUse &Use = UI.getUse();
5064 } while (UI != UE && *UI == User);
5066 // Now that we have modified User, add it back to the CSE maps. If it
5067 // already exists there, recursively merge the results together.
5068 AddModifiedNodeToCSEMaps(User, &Listener);
5072 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5073 /// This can cause recursive merging of nodes in the DAG.
5075 /// This version can replace From with any result values. To must match the
5076 /// number and types of values returned by From.
5077 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5079 DAGUpdateListener *UpdateListener) {
5080 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5081 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5083 // Iterate over just the existing users of From. See the comments in
5084 // the ReplaceAllUsesWith above.
5085 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5086 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5090 // This node is about to morph, remove its old self from the CSE maps.
5091 RemoveNodeFromCSEMaps(User);
5093 // A user can appear in a use list multiple times, and when this
5094 // happens the uses are usually next to each other in the list.
5095 // To help reduce the number of CSE recomputations, process all
5096 // the uses of this user that we can find this way.
5098 SDUse &Use = UI.getUse();
5099 const SDValue &ToOp = To[Use.getResNo()];
5102 } while (UI != UE && *UI == User);
5104 // Now that we have modified User, add it back to the CSE maps. If it
5105 // already exists there, recursively merge the results together.
5106 AddModifiedNodeToCSEMaps(User, &Listener);
5110 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5111 /// uses of other values produced by From.getNode() alone. The Deleted
5112 /// vector is handled the same way as for ReplaceAllUsesWith.
5113 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5114 DAGUpdateListener *UpdateListener){
5115 // Handle the really simple, really trivial case efficiently.
5116 if (From == To) return;
5118 // Handle the simple, trivial, case efficiently.
5119 if (From.getNode()->getNumValues() == 1) {
5120 ReplaceAllUsesWith(From, To, UpdateListener);
5124 // Iterate over just the existing users of From. See the comments in
5125 // the ReplaceAllUsesWith above.
5126 SDNode::use_iterator UI = From.getNode()->use_begin(),
5127 UE = From.getNode()->use_end();
5128 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5131 bool UserRemovedFromCSEMaps = false;
5133 // A user can appear in a use list multiple times, and when this
5134 // happens the uses are usually next to each other in the list.
5135 // To help reduce the number of CSE recomputations, process all
5136 // the uses of this user that we can find this way.
5138 SDUse &Use = UI.getUse();
5140 // Skip uses of different values from the same node.
5141 if (Use.getResNo() != From.getResNo()) {
5146 // If this node hasn't been modified yet, it's still in the CSE maps,
5147 // so remove its old self from the CSE maps.
5148 if (!UserRemovedFromCSEMaps) {
5149 RemoveNodeFromCSEMaps(User);
5150 UserRemovedFromCSEMaps = true;
5155 } while (UI != UE && *UI == User);
5157 // We are iterating over all uses of the From node, so if a use
5158 // doesn't use the specific value, no changes are made.
5159 if (!UserRemovedFromCSEMaps)
5162 // Now that we have modified User, add it back to the CSE maps. If it
5163 // already exists there, recursively merge the results together.
5164 AddModifiedNodeToCSEMaps(User, &Listener);
5169 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5170 /// to record information about a use.
5177 /// operator< - Sort Memos by User.
5178 bool operator<(const UseMemo &L, const UseMemo &R) {
5179 return (intptr_t)L.User < (intptr_t)R.User;
5183 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5184 /// uses of other values produced by From.getNode() alone. The same value
5185 /// may appear in both the From and To list. The Deleted vector is
5186 /// handled the same way as for ReplaceAllUsesWith.
5187 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5190 DAGUpdateListener *UpdateListener){
5191 // Handle the simple, trivial case efficiently.
5193 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5195 // Read up all the uses and make records of them. This helps
5196 // processing new uses that are introduced during the
5197 // replacement process.
5198 SmallVector<UseMemo, 4> Uses;
5199 for (unsigned i = 0; i != Num; ++i) {
5200 unsigned FromResNo = From[i].getResNo();
5201 SDNode *FromNode = From[i].getNode();
5202 for (SDNode::use_iterator UI = FromNode->use_begin(),
5203 E = FromNode->use_end(); UI != E; ++UI) {
5204 SDUse &Use = UI.getUse();
5205 if (Use.getResNo() == FromResNo) {
5206 UseMemo Memo = { *UI, i, &Use };
5207 Uses.push_back(Memo);
5212 // Sort the uses, so that all the uses from a given User are together.
5213 std::sort(Uses.begin(), Uses.end());
5215 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5216 UseIndex != UseIndexEnd; ) {
5217 // We know that this user uses some value of From. If it is the right
5218 // value, update it.
5219 SDNode *User = Uses[UseIndex].User;
5221 // This node is about to morph, remove its old self from the CSE maps.
5222 RemoveNodeFromCSEMaps(User);
5224 // The Uses array is sorted, so all the uses for a given User
5225 // are next to each other in the list.
5226 // To help reduce the number of CSE recomputations, process all
5227 // the uses of this user that we can find this way.
5229 unsigned i = Uses[UseIndex].Index;
5230 SDUse &Use = *Uses[UseIndex].Use;
5234 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5236 // Now that we have modified User, add it back to the CSE maps. If it
5237 // already exists there, recursively merge the results together.
5238 AddModifiedNodeToCSEMaps(User, UpdateListener);
5242 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5243 /// based on their topological order. It returns the maximum id and a vector
5244 /// of the SDNodes* in assigned order by reference.
5245 unsigned SelectionDAG::AssignTopologicalOrder() {
5247 unsigned DAGSize = 0;
5249 // SortedPos tracks the progress of the algorithm. Nodes before it are
5250 // sorted, nodes after it are unsorted. When the algorithm completes
5251 // it is at the end of the list.
5252 allnodes_iterator SortedPos = allnodes_begin();
5254 // Visit all the nodes. Move nodes with no operands to the front of
5255 // the list immediately. Annotate nodes that do have operands with their
5256 // operand count. Before we do this, the Node Id fields of the nodes
5257 // may contain arbitrary values. After, the Node Id fields for nodes
5258 // before SortedPos will contain the topological sort index, and the
5259 // Node Id fields for nodes At SortedPos and after will contain the
5260 // count of outstanding operands.
5261 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5264 unsigned Degree = N->getNumOperands();
5266 // A node with no uses, add it to the result array immediately.
5267 N->setNodeId(DAGSize++);
5268 allnodes_iterator Q = N;
5270 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5271 assert(SortedPos != AllNodes.end() && "Overran node list");
5274 // Temporarily use the Node Id as scratch space for the degree count.
5275 N->setNodeId(Degree);
5279 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5280 // such that by the time the end is reached all nodes will be sorted.
5281 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5284 // N is in sorted position, so all its uses have one less operand
5285 // that needs to be sorted.
5286 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5289 unsigned Degree = P->getNodeId();
5290 assert(Degree != 0 && "Invalid node degree");
5293 // All of P's operands are sorted, so P may sorted now.
5294 P->setNodeId(DAGSize++);
5296 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5297 assert(SortedPos != AllNodes.end() && "Overran node list");
5300 // Update P's outstanding operand count.
5301 P->setNodeId(Degree);
5304 if (I == SortedPos) {
5307 dbgs() << "Overran sorted position:\n";
5310 llvm_unreachable(0);
5314 assert(SortedPos == AllNodes.end() &&
5315 "Topological sort incomplete!");
5316 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5317 "First node in topological sort is not the entry token!");
5318 assert(AllNodes.front().getNodeId() == 0 &&
5319 "First node in topological sort has non-zero id!");
5320 assert(AllNodes.front().getNumOperands() == 0 &&
5321 "First node in topological sort has operands!");
5322 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5323 "Last node in topologic sort has unexpected id!");
5324 assert(AllNodes.back().use_empty() &&
5325 "Last node in topologic sort has users!");
5326 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5330 /// AssignOrdering - Assign an order to the SDNode.
5331 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5332 assert(SD && "Trying to assign an order to a null node!");
5333 Ordering->add(SD, Order);
5336 /// GetOrdering - Get the order for the SDNode.
5337 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5338 assert(SD && "Trying to get the order of a null node!");
5339 return Ordering->getOrder(SD);
5342 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5343 /// value is produced by SD.
5344 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
5345 DbgInfo->add(DB, SD);
5347 SD->setHasDebugValue(true);
5350 //===----------------------------------------------------------------------===//
5352 //===----------------------------------------------------------------------===//
5354 HandleSDNode::~HandleSDNode() {
5358 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5359 EVT VT, int64_t o, unsigned char TF)
5360 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5364 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5365 MachineMemOperand *mmo)
5366 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5367 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5368 MMO->isNonTemporal());
5369 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5370 assert(isNonTemporal() == MMO->isNonTemporal() &&
5371 "Non-temporal encoding error!");
5372 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5375 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5376 const SDValue *Ops, unsigned NumOps, EVT memvt,
5377 MachineMemOperand *mmo)
5378 : SDNode(Opc, dl, VTs, Ops, NumOps),
5379 MemoryVT(memvt), MMO(mmo) {
5380 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5381 MMO->isNonTemporal());
5382 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5383 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5386 /// Profile - Gather unique data for the node.
5388 void SDNode::Profile(FoldingSetNodeID &ID) const {
5389 AddNodeIDNode(ID, this);
5394 std::vector<EVT> VTs;
5397 VTs.reserve(MVT::LAST_VALUETYPE);
5398 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5399 VTs.push_back(MVT((MVT::SimpleValueType)i));
5404 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5405 static ManagedStatic<EVTArray> SimpleVTArray;
5406 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5408 /// getValueTypeList - Return a pointer to the specified value type.
5410 const EVT *SDNode::getValueTypeList(EVT VT) {
5411 if (VT.isExtended()) {
5412 sys::SmartScopedLock<true> Lock(*VTMutex);
5413 return &(*EVTs->insert(VT).first);
5415 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5419 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5420 /// indicated value. This method ignores uses of other values defined by this
5422 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5423 assert(Value < getNumValues() && "Bad value!");
5425 // TODO: Only iterate over uses of a given value of the node
5426 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5427 if (UI.getUse().getResNo() == Value) {
5434 // Found exactly the right number of uses?
5439 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5440 /// value. This method ignores uses of other values defined by this operation.
5441 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5442 assert(Value < getNumValues() && "Bad value!");
5444 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5445 if (UI.getUse().getResNo() == Value)
5452 /// isOnlyUserOf - Return true if this node is the only use of N.
5454 bool SDNode::isOnlyUserOf(SDNode *N) const {
5456 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5467 /// isOperand - Return true if this node is an operand of N.
5469 bool SDValue::isOperandOf(SDNode *N) const {
5470 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5471 if (*this == N->getOperand(i))
5476 bool SDNode::isOperandOf(SDNode *N) const {
5477 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5478 if (this == N->OperandList[i].getNode())
5483 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5484 /// be a chain) reaches the specified operand without crossing any
5485 /// side-effecting instructions. In practice, this looks through token
5486 /// factors and non-volatile loads. In order to remain efficient, this only
5487 /// looks a couple of nodes in, it does not do an exhaustive search.
5488 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5489 unsigned Depth) const {
5490 if (*this == Dest) return true;
5492 // Don't search too deeply, we just want to be able to see through
5493 // TokenFactor's etc.
5494 if (Depth == 0) return false;
5496 // If this is a token factor, all inputs to the TF happen in parallel. If any
5497 // of the operands of the TF reach dest, then we can do the xform.
5498 if (getOpcode() == ISD::TokenFactor) {
5499 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5500 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5505 // Loads don't have side effects, look through them.
5506 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5507 if (!Ld->isVolatile())
5508 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5513 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5514 /// is either an operand of N or it can be reached by traversing up the operands.
5515 /// NOTE: this is an expensive method. Use it carefully.
5516 bool SDNode::isPredecessorOf(SDNode *N) const {
5517 SmallPtrSet<SDNode *, 32> Visited;
5518 SmallVector<SDNode *, 16> Worklist;
5519 Worklist.push_back(N);
5522 N = Worklist.pop_back_val();
5523 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5524 SDNode *Op = N->getOperand(i).getNode();
5527 if (Visited.insert(Op))
5528 Worklist.push_back(Op);
5530 } while (!Worklist.empty());
5535 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5536 assert(Num < NumOperands && "Invalid child # of SDNode!");
5537 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5540 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5541 switch (getOpcode()) {
5543 if (getOpcode() < ISD::BUILTIN_OP_END)
5544 return "<<Unknown DAG Node>>";
5545 if (isMachineOpcode()) {
5547 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5548 if (getMachineOpcode() < TII->getNumOpcodes())
5549 return TII->get(getMachineOpcode()).getName();
5550 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5553 const TargetLowering &TLI = G->getTargetLoweringInfo();
5554 const char *Name = TLI.getTargetNodeName(getOpcode());
5555 if (Name) return Name;
5556 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5558 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5561 case ISD::DELETED_NODE:
5562 return "<<Deleted Node!>>";
5564 case ISD::PREFETCH: return "Prefetch";
5565 case ISD::MEMBARRIER: return "MemBarrier";
5566 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5567 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5568 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5569 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5570 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5571 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5572 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5573 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5574 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5575 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5576 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5577 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5578 case ISD::PCMARKER: return "PCMarker";
5579 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5580 case ISD::SRCVALUE: return "SrcValue";
5581 case ISD::MDNODE_SDNODE: return "MDNode";
5582 case ISD::EntryToken: return "EntryToken";
5583 case ISD::TokenFactor: return "TokenFactor";
5584 case ISD::AssertSext: return "AssertSext";
5585 case ISD::AssertZext: return "AssertZext";
5587 case ISD::BasicBlock: return "BasicBlock";
5588 case ISD::VALUETYPE: return "ValueType";
5589 case ISD::Register: return "Register";
5591 case ISD::Constant: return "Constant";
5592 case ISD::ConstantFP: return "ConstantFP";
5593 case ISD::GlobalAddress: return "GlobalAddress";
5594 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5595 case ISD::FrameIndex: return "FrameIndex";
5596 case ISD::JumpTable: return "JumpTable";
5597 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5598 case ISD::RETURNADDR: return "RETURNADDR";
5599 case ISD::FRAMEADDR: return "FRAMEADDR";
5600 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5601 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5602 case ISD::LSDAADDR: return "LSDAADDR";
5603 case ISD::EHSELECTION: return "EHSELECTION";
5604 case ISD::EH_RETURN: return "EH_RETURN";
5605 case ISD::ConstantPool: return "ConstantPool";
5606 case ISD::ExternalSymbol: return "ExternalSymbol";
5607 case ISD::BlockAddress: return "BlockAddress";
5608 case ISD::INTRINSIC_WO_CHAIN:
5609 case ISD::INTRINSIC_VOID:
5610 case ISD::INTRINSIC_W_CHAIN: {
5611 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5612 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5613 if (IID < Intrinsic::num_intrinsics)
5614 return Intrinsic::getName((Intrinsic::ID)IID);
5615 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5616 return TII->getName(IID);
5617 llvm_unreachable("Invalid intrinsic ID");
5620 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5621 case ISD::TargetConstant: return "TargetConstant";
5622 case ISD::TargetConstantFP:return "TargetConstantFP";
5623 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5624 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5625 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5626 case ISD::TargetJumpTable: return "TargetJumpTable";
5627 case ISD::TargetConstantPool: return "TargetConstantPool";
5628 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5629 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5631 case ISD::CopyToReg: return "CopyToReg";
5632 case ISD::CopyFromReg: return "CopyFromReg";
5633 case ISD::UNDEF: return "undef";
5634 case ISD::MERGE_VALUES: return "merge_values";
5635 case ISD::INLINEASM: return "inlineasm";
5636 case ISD::EH_LABEL: return "eh_label";
5637 case ISD::HANDLENODE: return "handlenode";
5640 case ISD::FABS: return "fabs";
5641 case ISD::FNEG: return "fneg";
5642 case ISD::FSQRT: return "fsqrt";
5643 case ISD::FSIN: return "fsin";
5644 case ISD::FCOS: return "fcos";
5645 case ISD::FPOWI: return "fpowi";
5646 case ISD::FPOW: return "fpow";
5647 case ISD::FTRUNC: return "ftrunc";
5648 case ISD::FFLOOR: return "ffloor";
5649 case ISD::FCEIL: return "fceil";
5650 case ISD::FRINT: return "frint";
5651 case ISD::FNEARBYINT: return "fnearbyint";
5654 case ISD::ADD: return "add";
5655 case ISD::SUB: return "sub";
5656 case ISD::MUL: return "mul";
5657 case ISD::MULHU: return "mulhu";
5658 case ISD::MULHS: return "mulhs";
5659 case ISD::SDIV: return "sdiv";
5660 case ISD::UDIV: return "udiv";
5661 case ISD::SREM: return "srem";
5662 case ISD::UREM: return "urem";
5663 case ISD::SMUL_LOHI: return "smul_lohi";
5664 case ISD::UMUL_LOHI: return "umul_lohi";
5665 case ISD::SDIVREM: return "sdivrem";
5666 case ISD::UDIVREM: return "udivrem";
5667 case ISD::AND: return "and";
5668 case ISD::OR: return "or";
5669 case ISD::XOR: return "xor";
5670 case ISD::SHL: return "shl";
5671 case ISD::SRA: return "sra";
5672 case ISD::SRL: return "srl";
5673 case ISD::ROTL: return "rotl";
5674 case ISD::ROTR: return "rotr";
5675 case ISD::FADD: return "fadd";
5676 case ISD::FSUB: return "fsub";
5677 case ISD::FMUL: return "fmul";
5678 case ISD::FDIV: return "fdiv";
5679 case ISD::FREM: return "frem";
5680 case ISD::FCOPYSIGN: return "fcopysign";
5681 case ISD::FGETSIGN: return "fgetsign";
5683 case ISD::SETCC: return "setcc";
5684 case ISD::VSETCC: return "vsetcc";
5685 case ISD::SELECT: return "select";
5686 case ISD::SELECT_CC: return "select_cc";
5687 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5688 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5689 case ISD::CONCAT_VECTORS: return "concat_vectors";
5690 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5691 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5692 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5693 case ISD::CARRY_FALSE: return "carry_false";
5694 case ISD::ADDC: return "addc";
5695 case ISD::ADDE: return "adde";
5696 case ISD::SADDO: return "saddo";
5697 case ISD::UADDO: return "uaddo";
5698 case ISD::SSUBO: return "ssubo";
5699 case ISD::USUBO: return "usubo";
5700 case ISD::SMULO: return "smulo";
5701 case ISD::UMULO: return "umulo";
5702 case ISD::SUBC: return "subc";
5703 case ISD::SUBE: return "sube";
5704 case ISD::SHL_PARTS: return "shl_parts";
5705 case ISD::SRA_PARTS: return "sra_parts";
5706 case ISD::SRL_PARTS: return "srl_parts";
5708 // Conversion operators.
5709 case ISD::SIGN_EXTEND: return "sign_extend";
5710 case ISD::ZERO_EXTEND: return "zero_extend";
5711 case ISD::ANY_EXTEND: return "any_extend";
5712 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5713 case ISD::TRUNCATE: return "truncate";
5714 case ISD::FP_ROUND: return "fp_round";
5715 case ISD::FLT_ROUNDS_: return "flt_rounds";
5716 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5717 case ISD::FP_EXTEND: return "fp_extend";
5719 case ISD::SINT_TO_FP: return "sint_to_fp";
5720 case ISD::UINT_TO_FP: return "uint_to_fp";
5721 case ISD::FP_TO_SINT: return "fp_to_sint";
5722 case ISD::FP_TO_UINT: return "fp_to_uint";
5723 case ISD::BIT_CONVERT: return "bit_convert";
5724 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5725 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5727 case ISD::CONVERT_RNDSAT: {
5728 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5729 default: llvm_unreachable("Unknown cvt code!");
5730 case ISD::CVT_FF: return "cvt_ff";
5731 case ISD::CVT_FS: return "cvt_fs";
5732 case ISD::CVT_FU: return "cvt_fu";
5733 case ISD::CVT_SF: return "cvt_sf";
5734 case ISD::CVT_UF: return "cvt_uf";
5735 case ISD::CVT_SS: return "cvt_ss";
5736 case ISD::CVT_SU: return "cvt_su";
5737 case ISD::CVT_US: return "cvt_us";
5738 case ISD::CVT_UU: return "cvt_uu";
5742 // Control flow instructions
5743 case ISD::BR: return "br";
5744 case ISD::BRIND: return "brind";
5745 case ISD::BR_JT: return "br_jt";
5746 case ISD::BRCOND: return "brcond";
5747 case ISD::BR_CC: return "br_cc";
5748 case ISD::CALLSEQ_START: return "callseq_start";
5749 case ISD::CALLSEQ_END: return "callseq_end";
5752 case ISD::LOAD: return "load";
5753 case ISD::STORE: return "store";
5754 case ISD::VAARG: return "vaarg";
5755 case ISD::VACOPY: return "vacopy";
5756 case ISD::VAEND: return "vaend";
5757 case ISD::VASTART: return "vastart";
5758 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5759 case ISD::EXTRACT_ELEMENT: return "extract_element";
5760 case ISD::BUILD_PAIR: return "build_pair";
5761 case ISD::STACKSAVE: return "stacksave";
5762 case ISD::STACKRESTORE: return "stackrestore";
5763 case ISD::TRAP: return "trap";
5766 case ISD::BSWAP: return "bswap";
5767 case ISD::CTPOP: return "ctpop";
5768 case ISD::CTTZ: return "cttz";
5769 case ISD::CTLZ: return "ctlz";
5772 case ISD::TRAMPOLINE: return "trampoline";
5775 switch (cast<CondCodeSDNode>(this)->get()) {
5776 default: llvm_unreachable("Unknown setcc condition!");
5777 case ISD::SETOEQ: return "setoeq";
5778 case ISD::SETOGT: return "setogt";
5779 case ISD::SETOGE: return "setoge";
5780 case ISD::SETOLT: return "setolt";
5781 case ISD::SETOLE: return "setole";
5782 case ISD::SETONE: return "setone";
5784 case ISD::SETO: return "seto";
5785 case ISD::SETUO: return "setuo";
5786 case ISD::SETUEQ: return "setue";
5787 case ISD::SETUGT: return "setugt";
5788 case ISD::SETUGE: return "setuge";
5789 case ISD::SETULT: return "setult";
5790 case ISD::SETULE: return "setule";
5791 case ISD::SETUNE: return "setune";
5793 case ISD::SETEQ: return "seteq";
5794 case ISD::SETGT: return "setgt";
5795 case ISD::SETGE: return "setge";
5796 case ISD::SETLT: return "setlt";
5797 case ISD::SETLE: return "setle";
5798 case ISD::SETNE: return "setne";
5803 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5812 return "<post-inc>";
5814 return "<post-dec>";
5818 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5819 std::string S = "< ";
5833 if (getByValAlign())
5834 S += "byval-align:" + utostr(getByValAlign()) + " ";
5836 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5838 S += "byval-size:" + utostr(getByValSize()) + " ";
5842 void SDNode::dump() const { dump(0); }
5843 void SDNode::dump(const SelectionDAG *G) const {
5847 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5848 OS << (void*)this << ": ";
5850 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5852 if (getValueType(i) == MVT::Other)
5855 OS << getValueType(i).getEVTString();
5857 OS << " = " << getOperationName(G);
5860 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5861 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5862 if (!MN->memoperands_empty()) {
5865 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5866 e = MN->memoperands_end(); i != e; ++i) {
5873 } else if (const ShuffleVectorSDNode *SVN =
5874 dyn_cast<ShuffleVectorSDNode>(this)) {
5876 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5877 int Idx = SVN->getMaskElt(i);
5885 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5886 OS << '<' << CSDN->getAPIntValue() << '>';
5887 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5888 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5889 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5890 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5891 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5894 CSDN->getValueAPF().bitcastToAPInt().dump();
5897 } else if (const GlobalAddressSDNode *GADN =
5898 dyn_cast<GlobalAddressSDNode>(this)) {
5899 int64_t offset = GADN->getOffset();
5901 WriteAsOperand(OS, GADN->getGlobal());
5904 OS << " + " << offset;
5906 OS << " " << offset;
5907 if (unsigned int TF = GADN->getTargetFlags())
5908 OS << " [TF=" << TF << ']';
5909 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5910 OS << "<" << FIDN->getIndex() << ">";
5911 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5912 OS << "<" << JTDN->getIndex() << ">";
5913 if (unsigned int TF = JTDN->getTargetFlags())
5914 OS << " [TF=" << TF << ']';
5915 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5916 int offset = CP->getOffset();
5917 if (CP->isMachineConstantPoolEntry())
5918 OS << "<" << *CP->getMachineCPVal() << ">";
5920 OS << "<" << *CP->getConstVal() << ">";
5922 OS << " + " << offset;
5924 OS << " " << offset;
5925 if (unsigned int TF = CP->getTargetFlags())
5926 OS << " [TF=" << TF << ']';
5927 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5929 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5931 OS << LBB->getName() << " ";
5932 OS << (const void*)BBDN->getBasicBlock() << ">";
5933 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5934 if (G && R->getReg() &&
5935 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5936 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5938 OS << " %reg" << R->getReg();
5940 } else if (const ExternalSymbolSDNode *ES =
5941 dyn_cast<ExternalSymbolSDNode>(this)) {
5942 OS << "'" << ES->getSymbol() << "'";
5943 if (unsigned int TF = ES->getTargetFlags())
5944 OS << " [TF=" << TF << ']';
5945 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5947 OS << "<" << M->getValue() << ">";
5950 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
5952 OS << "<" << MD->getMD() << ">";
5955 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5956 OS << ":" << N->getVT().getEVTString();
5958 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5959 OS << "<" << *LD->getMemOperand();
5962 switch (LD->getExtensionType()) {
5963 default: doExt = false; break;
5964 case ISD::EXTLOAD: OS << ", anyext"; break;
5965 case ISD::SEXTLOAD: OS << ", sext"; break;
5966 case ISD::ZEXTLOAD: OS << ", zext"; break;
5969 OS << " from " << LD->getMemoryVT().getEVTString();
5971 const char *AM = getIndexedModeName(LD->getAddressingMode());
5976 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5977 OS << "<" << *ST->getMemOperand();
5979 if (ST->isTruncatingStore())
5980 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
5982 const char *AM = getIndexedModeName(ST->getAddressingMode());
5987 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
5988 OS << "<" << *M->getMemOperand() << ">";
5989 } else if (const BlockAddressSDNode *BA =
5990 dyn_cast<BlockAddressSDNode>(this)) {
5992 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
5994 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
5996 if (unsigned int TF = BA->getTargetFlags())
5997 OS << " [TF=" << TF << ']';
6001 if (unsigned Order = G->GetOrdering(this))
6002 OS << " [ORD=" << Order << ']';
6004 if (getNodeId() != -1)
6005 OS << " [ID=" << getNodeId() << ']';
6008 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6010 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6011 if (i) OS << ", "; else OS << " ";
6012 OS << (void*)getOperand(i).getNode();
6013 if (unsigned RN = getOperand(i).getResNo())
6016 print_details(OS, G);
6019 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6020 const SelectionDAG *G, unsigned depth,
6033 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6035 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6039 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6040 unsigned depth) const {
6041 printrWithDepthHelper(OS, this, G, depth, 0);
6044 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6045 // Don't print impossibly deep things.
6046 printrWithDepth(OS, G, 100);
6049 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6050 printrWithDepth(dbgs(), G, depth);
6053 void SDNode::dumprFull(const SelectionDAG *G) const {
6054 // Don't print impossibly deep things.
6055 dumprWithDepth(G, 100);
6058 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6059 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6060 if (N->getOperand(i).getNode()->hasOneUse())
6061 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6063 dbgs() << "\n" << std::string(indent+2, ' ')
6064 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6068 dbgs().indent(indent);
6072 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6073 assert(N->getNumValues() == 1 &&
6074 "Can't unroll a vector with multiple results!");
6076 EVT VT = N->getValueType(0);
6077 unsigned NE = VT.getVectorNumElements();
6078 EVT EltVT = VT.getVectorElementType();
6079 DebugLoc dl = N->getDebugLoc();
6081 SmallVector<SDValue, 8> Scalars;
6082 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6084 // If ResNE is 0, fully unroll the vector op.
6087 else if (NE > ResNE)
6091 for (i= 0; i != NE; ++i) {
6092 for (unsigned j = 0; j != N->getNumOperands(); ++j) {
6093 SDValue Operand = N->getOperand(j);
6094 EVT OperandVT = Operand.getValueType();
6095 if (OperandVT.isVector()) {
6096 // A vector operand; extract a single element.
6097 EVT OperandEltVT = OperandVT.getVectorElementType();
6098 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6101 getConstant(i, MVT::i32));
6103 // A scalar operand; just use it as is.
6104 Operands[j] = Operand;
6108 switch (N->getOpcode()) {
6110 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6111 &Operands[0], Operands.size()));
6118 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6119 getShiftAmountOperand(Operands[1])));
6121 case ISD::SIGN_EXTEND_INREG:
6122 case ISD::FP_ROUND_INREG: {
6123 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6124 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6126 getValueType(ExtVT)));
6131 for (; i < ResNE; ++i)
6132 Scalars.push_back(getUNDEF(EltVT));
6134 return getNode(ISD::BUILD_VECTOR, dl,
6135 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6136 &Scalars[0], Scalars.size());
6140 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6141 /// location that is 'Dist' units away from the location that the 'Base' load
6142 /// is loading from.
6143 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6144 unsigned Bytes, int Dist) const {
6145 if (LD->getChain() != Base->getChain())
6147 EVT VT = LD->getValueType(0);
6148 if (VT.getSizeInBits() / 8 != Bytes)
6151 SDValue Loc = LD->getOperand(1);
6152 SDValue BaseLoc = Base->getOperand(1);
6153 if (Loc.getOpcode() == ISD::FrameIndex) {
6154 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6156 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6157 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6158 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6159 int FS = MFI->getObjectSize(FI);
6160 int BFS = MFI->getObjectSize(BFI);
6161 if (FS != BFS || FS != (int)Bytes) return false;
6162 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6164 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6165 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6166 if (V && (V->getSExtValue() == Dist*Bytes))
6170 const GlobalValue *GV1 = NULL;
6171 const GlobalValue *GV2 = NULL;
6172 int64_t Offset1 = 0;
6173 int64_t Offset2 = 0;
6174 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6175 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6176 if (isGA1 && isGA2 && GV1 == GV2)
6177 return Offset1 == (Offset2 + Dist*Bytes);
6182 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6183 /// it cannot be inferred.
6184 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6185 // If this is a GlobalAddress + cst, return the alignment.
6186 const GlobalValue *GV;
6187 int64_t GVOffset = 0;
6188 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6189 // If GV has specified alignment, then use it. Otherwise, use the preferred
6191 unsigned Align = GV->getAlignment();
6193 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6194 if (GVar->hasInitializer()) {
6195 const TargetData *TD = TLI.getTargetData();
6196 Align = TD->getPreferredAlignment(GVar);
6200 return MinAlign(Align, GVOffset);
6203 // If this is a direct reference to a stack slot, use information about the
6204 // stack slot's alignment.
6205 int FrameIdx = 1 << 31;
6206 int64_t FrameOffset = 0;
6207 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6208 FrameIdx = FI->getIndex();
6209 } else if (Ptr.getOpcode() == ISD::ADD &&
6210 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6211 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6212 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6213 FrameOffset = Ptr.getConstantOperandVal(1);
6216 if (FrameIdx != (1 << 31)) {
6217 // FIXME: Handle FI+CST.
6218 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6219 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6221 if (MFI.isFixedObjectIndex(FrameIdx)) {
6222 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6224 // The alignment of the frame index can be determined from its offset from
6225 // the incoming frame position. If the frame object is at offset 32 and
6226 // the stack is guaranteed to be 16-byte aligned, then we know that the
6227 // object is 16-byte aligned.
6228 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6229 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6231 // Finally, the frame object itself may have a known alignment. Factor
6232 // the alignment + offset into a new alignment. For example, if we know
6233 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6234 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6235 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6236 return std::max(Align, FIInfoAlign);
6244 void SelectionDAG::dump() const {
6245 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6247 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6249 const SDNode *N = I;
6250 if (!N->hasOneUse() && N != getRoot().getNode())
6251 DumpNodes(N, 2, this);
6254 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6259 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6261 print_details(OS, G);
6264 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6265 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6266 const SelectionDAG *G, VisitedSDNodeSet &once) {
6267 if (!once.insert(N)) // If we've been here before, return now.
6270 // Dump the current SDNode, but don't end the line yet.
6271 OS << std::string(indent, ' ');
6274 // Having printed this SDNode, walk the children:
6275 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6276 const SDNode *child = N->getOperand(i).getNode();
6281 if (child->getNumOperands() == 0) {
6282 // This child has no grandchildren; print it inline right here.
6283 child->printr(OS, G);
6285 } else { // Just the address. FIXME: also print the child's opcode.
6287 if (unsigned RN = N->getOperand(i).getResNo())
6294 // Dump children that have grandchildren on their own line(s).
6295 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6296 const SDNode *child = N->getOperand(i).getNode();
6297 DumpNodesr(OS, child, indent+2, G, once);
6301 void SDNode::dumpr() const {
6302 VisitedSDNodeSet once;
6303 DumpNodesr(dbgs(), this, 0, 0, once);
6306 void SDNode::dumpr(const SelectionDAG *G) const {
6307 VisitedSDNodeSet once;
6308 DumpNodesr(dbgs(), this, 0, G, once);
6312 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6313 unsigned GlobalAddressSDNode::getAddressSpace() const {
6314 return getGlobal()->getType()->getAddressSpace();
6318 const Type *ConstantPoolSDNode::getType() const {
6319 if (isMachineConstantPoolEntry())
6320 return Val.MachineCPVal->getType();
6321 return Val.ConstVal->getType();
6324 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6326 unsigned &SplatBitSize,
6328 unsigned MinSplatBits,
6330 EVT VT = getValueType(0);
6331 assert(VT.isVector() && "Expected a vector type");
6332 unsigned sz = VT.getSizeInBits();
6333 if (MinSplatBits > sz)
6336 SplatValue = APInt(sz, 0);
6337 SplatUndef = APInt(sz, 0);
6339 // Get the bits. Bits with undefined values (when the corresponding element
6340 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6341 // in SplatValue. If any of the values are not constant, give up and return
6343 unsigned int nOps = getNumOperands();
6344 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6345 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6347 for (unsigned j = 0; j < nOps; ++j) {
6348 unsigned i = isBigEndian ? nOps-1-j : j;
6349 SDValue OpVal = getOperand(i);
6350 unsigned BitPos = j * EltBitSize;
6352 if (OpVal.getOpcode() == ISD::UNDEF)
6353 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6354 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6355 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6356 zextOrTrunc(sz) << BitPos;
6357 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6358 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6363 // The build_vector is all constants or undefs. Find the smallest element
6364 // size that splats the vector.
6366 HasAnyUndefs = (SplatUndef != 0);
6369 unsigned HalfSize = sz / 2;
6370 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6371 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6372 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6373 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6375 // If the two halves do not match (ignoring undef bits), stop here.
6376 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6377 MinSplatBits > HalfSize)
6380 SplatValue = HighValue | LowValue;
6381 SplatUndef = HighUndef & LowUndef;
6390 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6391 // Find the first non-undef value in the shuffle mask.
6393 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6396 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6398 // Make sure all remaining elements are either undef or the same as the first
6400 for (int Idx = Mask[i]; i != e; ++i)
6401 if (Mask[i] >= 0 && Mask[i] != Idx)
6407 static void checkForCyclesHelper(const SDNode *N,
6408 SmallPtrSet<const SDNode*, 32> &Visited,
6409 SmallPtrSet<const SDNode*, 32> &Checked) {
6410 // If this node has already been checked, don't check it again.
6411 if (Checked.count(N))
6414 // If a node has already been visited on this depth-first walk, reject it as
6416 if (!Visited.insert(N)) {
6417 dbgs() << "Offending node:\n";
6419 errs() << "Detected cycle in SelectionDAG\n";
6423 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6424 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6431 void llvm::checkForCycles(const llvm::SDNode *N) {
6433 assert(N && "Checking nonexistant SDNode");
6434 SmallPtrSet<const SDNode*, 32> visited;
6435 SmallPtrSet<const SDNode*, 32> checked;
6436 checkForCyclesHelper(N, visited, checked);
6440 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6441 checkForCycles(DAG->getRoot().getNode());