1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/Function.h"
17 #include "llvm/GlobalAlias.h"
18 #include "llvm/GlobalVariable.h"
19 #include "llvm/Intrinsics.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/CallingConv.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/PseudoSourceValue.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetLowering.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/ManagedStatic.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/raw_ostream.h"
39 #include "llvm/System/Mutex.h"
40 #include "llvm/ADT/SetVector.h"
41 #include "llvm/ADT/SmallPtrSet.h"
42 #include "llvm/ADT/SmallSet.h"
43 #include "llvm/ADT/SmallVector.h"
44 #include "llvm/ADT/StringExtras.h"
49 /// makeVTList - Return an instance of the SDVTList struct initialized with the
50 /// specified members.
51 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
52 SDVTList Res = {VTs, NumVTs};
56 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
57 switch (VT.getSimpleVT().SimpleTy) {
58 default: llvm_unreachable("Unknown FP format");
59 case MVT::f32: return &APFloat::IEEEsingle;
60 case MVT::f64: return &APFloat::IEEEdouble;
61 case MVT::f80: return &APFloat::x87DoubleExtended;
62 case MVT::f128: return &APFloat::IEEEquad;
63 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
67 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
69 //===----------------------------------------------------------------------===//
70 // ConstantFPSDNode Class
71 //===----------------------------------------------------------------------===//
73 /// isExactlyValue - We don't rely on operator== working on double values, as
74 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
75 /// As such, this method can be used to do an exact bit-for-bit comparison of
76 /// two floating point values.
77 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
78 return getValueAPF().bitwiseIsEqual(V);
81 bool ConstantFPSDNode::isValueValidForType(EVT VT,
83 assert(VT.isFloatingPoint() && "Can only convert between FP types");
85 // PPC long double cannot be converted to any other type.
86 if (VT == MVT::ppcf128 ||
87 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
90 // convert modifies in place, so make a copy.
91 APFloat Val2 = APFloat(Val);
93 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
98 //===----------------------------------------------------------------------===//
100 //===----------------------------------------------------------------------===//
102 /// isBuildVectorAllOnes - Return true if the specified node is a
103 /// BUILD_VECTOR where all of the elements are ~0 or undef.
104 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
105 // Look through a bit convert.
106 if (N->getOpcode() == ISD::BIT_CONVERT)
107 N = N->getOperand(0).getNode();
109 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
111 unsigned i = 0, e = N->getNumOperands();
113 // Skip over all of the undef values.
114 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
117 // Do not accept an all-undef vector.
118 if (i == e) return false;
120 // Do not accept build_vectors that aren't all constants or which have non-~0
122 SDValue NotZero = N->getOperand(i);
123 if (isa<ConstantSDNode>(NotZero)) {
124 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
126 } else if (isa<ConstantFPSDNode>(NotZero)) {
127 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
128 bitcastToAPInt().isAllOnesValue())
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 if (N->getOpcode() == ISD::BIT_CONVERT)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 unsigned i = 0, e = N->getNumOperands();
154 // Skip over all of the undef values.
155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
158 // Do not accept an all-undef vector.
159 if (i == e) return false;
161 // Do not accept build_vectors that aren't all constants or which have non-0
163 SDValue Zero = N->getOperand(i);
164 if (isa<ConstantSDNode>(Zero)) {
165 if (!cast<ConstantSDNode>(Zero)->isNullValue())
167 } else if (isa<ConstantFPSDNode>(Zero)) {
168 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
173 // Okay, we have at least one 0 value, check to see if the rest match or are
175 for (++i; i != e; ++i)
176 if (N->getOperand(i) != Zero &&
177 N->getOperand(i).getOpcode() != ISD::UNDEF)
182 /// isScalarToVector - Return true if the specified node is a
183 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
184 /// element is not an undef.
185 bool ISD::isScalarToVector(const SDNode *N) {
186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
189 if (N->getOpcode() != ISD::BUILD_VECTOR)
191 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
193 unsigned NumElems = N->getNumOperands();
194 for (unsigned i = 1; i < NumElems; ++i) {
195 SDValue V = N->getOperand(i);
196 if (V.getOpcode() != ISD::UNDEF)
203 /// isDebugLabel - Return true if the specified node represents a debug
204 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
205 bool ISD::isDebugLabel(const SDNode *N) {
207 if (N->getOpcode() == ISD::DBG_LABEL)
209 if (N->isMachineOpcode() &&
210 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
215 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
216 /// when given the operation for (X op Y).
217 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
218 // To perform this operation, we just need to swap the L and G bits of the
220 unsigned OldL = (Operation >> 2) & 1;
221 unsigned OldG = (Operation >> 1) & 1;
222 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
223 (OldL << 1) | // New G bit
224 (OldG << 2)); // New L bit.
227 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
228 /// 'op' is a valid SetCC operation.
229 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
230 unsigned Operation = Op;
232 Operation ^= 7; // Flip L, G, E bits, but not U.
234 Operation ^= 15; // Flip all of the condition bits.
236 if (Operation > ISD::SETTRUE2)
237 Operation &= ~8; // Don't let N and U bits get set.
239 return ISD::CondCode(Operation);
243 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
244 /// signed operation and 2 if the result is an unsigned comparison. Return zero
245 /// if the operation does not depend on the sign of the input (setne and seteq).
246 static int isSignedOp(ISD::CondCode Opcode) {
248 default: llvm_unreachable("Illegal integer setcc operation!");
250 case ISD::SETNE: return 0;
254 case ISD::SETGE: return 1;
258 case ISD::SETUGE: return 2;
262 /// getSetCCOrOperation - Return the result of a logical OR between different
263 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
264 /// returns SETCC_INVALID if it is not possible to represent the resultant
266 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
268 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
269 // Cannot fold a signed integer setcc with an unsigned integer setcc.
270 return ISD::SETCC_INVALID;
272 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
274 // If the N and U bits get set then the resultant comparison DOES suddenly
275 // care about orderedness, and is true when ordered.
276 if (Op > ISD::SETTRUE2)
277 Op &= ~16; // Clear the U bit if the N bit is set.
279 // Canonicalize illegal integer setcc's.
280 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
283 return ISD::CondCode(Op);
286 /// getSetCCAndOperation - Return the result of a logical AND between different
287 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
288 /// function returns zero if it is not possible to represent the resultant
290 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
292 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
293 // Cannot fold a signed setcc with an unsigned setcc.
294 return ISD::SETCC_INVALID;
296 // Combine all of the condition bits.
297 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
299 // Canonicalize illegal integer setcc's.
303 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
304 case ISD::SETOEQ: // SETEQ & SETU[LG]E
305 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
306 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
307 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
314 const TargetMachine &SelectionDAG::getTarget() const {
315 return MF->getTarget();
318 //===----------------------------------------------------------------------===//
319 // SDNode Profile Support
320 //===----------------------------------------------------------------------===//
322 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
324 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
328 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
329 /// solely with their pointer.
330 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
331 ID.AddPointer(VTList.VTs);
334 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
336 static void AddNodeIDOperands(FoldingSetNodeID &ID,
337 const SDValue *Ops, unsigned NumOps) {
338 for (; NumOps; --NumOps, ++Ops) {
339 ID.AddPointer(Ops->getNode());
340 ID.AddInteger(Ops->getResNo());
344 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
346 static void AddNodeIDOperands(FoldingSetNodeID &ID,
347 const SDUse *Ops, unsigned NumOps) {
348 for (; NumOps; --NumOps, ++Ops) {
349 ID.AddPointer(Ops->getNode());
350 ID.AddInteger(Ops->getResNo());
354 static void AddNodeIDNode(FoldingSetNodeID &ID,
355 unsigned short OpC, SDVTList VTList,
356 const SDValue *OpList, unsigned N) {
357 AddNodeIDOpcode(ID, OpC);
358 AddNodeIDValueTypes(ID, VTList);
359 AddNodeIDOperands(ID, OpList, N);
362 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
364 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
365 switch (N->getOpcode()) {
366 case ISD::TargetExternalSymbol:
367 case ISD::ExternalSymbol:
368 llvm_unreachable("Should only be used on nodes with operands");
369 default: break; // Normal nodes don't need extra info.
370 case ISD::TargetConstant:
372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
374 case ISD::TargetConstantFP:
375 case ISD::ConstantFP: {
376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
379 case ISD::TargetGlobalAddress:
380 case ISD::GlobalAddress:
381 case ISD::TargetGlobalTLSAddress:
382 case ISD::GlobalTLSAddress: {
383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
384 ID.AddPointer(GA->getGlobal());
385 ID.AddInteger(GA->getOffset());
386 ID.AddInteger(GA->getTargetFlags());
389 case ISD::BasicBlock:
390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
395 case ISD::DBG_STOPPOINT: {
396 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
397 ID.AddInteger(DSP->getLine());
398 ID.AddInteger(DSP->getColumn());
399 ID.AddPointer(DSP->getCompileUnit());
403 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
405 case ISD::MEMOPERAND: {
406 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
410 case ISD::FrameIndex:
411 case ISD::TargetFrameIndex:
412 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
415 case ISD::TargetJumpTable:
416 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
417 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
419 case ISD::ConstantPool:
420 case ISD::TargetConstantPool: {
421 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
422 ID.AddInteger(CP->getAlignment());
423 ID.AddInteger(CP->getOffset());
424 if (CP->isMachineConstantPoolEntry())
425 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
427 ID.AddPointer(CP->getConstVal());
428 ID.AddInteger(CP->getTargetFlags());
432 const LoadSDNode *LD = cast<LoadSDNode>(N);
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawSubclassData());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getMemoryVT().getRawBits());
440 ID.AddInteger(ST->getRawSubclassData());
443 case ISD::ATOMIC_CMP_SWAP:
444 case ISD::ATOMIC_SWAP:
445 case ISD::ATOMIC_LOAD_ADD:
446 case ISD::ATOMIC_LOAD_SUB:
447 case ISD::ATOMIC_LOAD_AND:
448 case ISD::ATOMIC_LOAD_OR:
449 case ISD::ATOMIC_LOAD_XOR:
450 case ISD::ATOMIC_LOAD_NAND:
451 case ISD::ATOMIC_LOAD_MIN:
452 case ISD::ATOMIC_LOAD_MAX:
453 case ISD::ATOMIC_LOAD_UMIN:
454 case ISD::ATOMIC_LOAD_UMAX: {
455 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
456 ID.AddInteger(AT->getMemoryVT().getRawBits());
457 ID.AddInteger(AT->getRawSubclassData());
460 case ISD::VECTOR_SHUFFLE: {
461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
462 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
464 ID.AddInteger(SVN->getMaskElt(i));
467 } // end switch (N->getOpcode())
470 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
472 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
473 AddNodeIDOpcode(ID, N->getOpcode());
474 // Add the return value info.
475 AddNodeIDValueTypes(ID, N->getVTList());
476 // Add the operand info.
477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
479 // Handle SDNode leafs with special info.
480 AddNodeIDCustom(ID, N);
483 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
484 /// the CSE map that carries alignment, volatility, indexing mode, and
485 /// extension/truncation information.
487 static inline unsigned
488 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
489 bool isVolatile, unsigned Alignment) {
490 assert((ConvType & 3) == ConvType &&
491 "ConvType may not require more than 2 bits!");
492 assert((AM & 7) == AM &&
493 "AM may not require more than 3 bits!");
497 ((Log2_32(Alignment) + 1) << 6);
500 //===----------------------------------------------------------------------===//
501 // SelectionDAG Class
502 //===----------------------------------------------------------------------===//
504 /// doNotCSE - Return true if CSE should not be performed for this node.
505 static bool doNotCSE(SDNode *N) {
506 if (N->getValueType(0) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
509 switch (N->getOpcode()) {
511 case ISD::HANDLENODE:
513 case ISD::DBG_STOPPOINT:
515 return true; // Never CSE these nodes.
518 // Check that remaining values produced are not flags.
519 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
520 if (N->getValueType(i) == MVT::Flag)
521 return true; // Never CSE anything that produces a flag.
526 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
528 void SelectionDAG::RemoveDeadNodes() {
529 // Create a dummy node (which is not added to allnodes), that adds a reference
530 // to the root node, preventing it from being deleted.
531 HandleSDNode Dummy(getRoot());
533 SmallVector<SDNode*, 128> DeadNodes;
535 // Add all obviously-dead nodes to the DeadNodes worklist.
536 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
538 DeadNodes.push_back(I);
540 RemoveDeadNodes(DeadNodes);
542 // If the root changed (e.g. it was a dead load, update the root).
543 setRoot(Dummy.getValue());
546 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
547 /// given list, and any nodes that become unreachable as a result.
548 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
549 DAGUpdateListener *UpdateListener) {
551 // Process the worklist, deleting the nodes and adding their uses to the
553 while (!DeadNodes.empty()) {
554 SDNode *N = DeadNodes.pop_back_val();
557 UpdateListener->NodeDeleted(N, 0);
559 // Take the node out of the appropriate CSE map.
560 RemoveNodeFromCSEMaps(N);
562 // Next, brutally remove the operand list. This is safe to do, as there are
563 // no cycles in the graph.
564 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
566 SDNode *Operand = Use.getNode();
569 // Now that we removed this operand, see if there are no uses of it left.
570 if (Operand->use_empty())
571 DeadNodes.push_back(Operand);
578 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
579 SmallVector<SDNode*, 16> DeadNodes(1, N);
580 RemoveDeadNodes(DeadNodes, UpdateListener);
583 void SelectionDAG::DeleteNode(SDNode *N) {
584 // First take this out of the appropriate CSE map.
585 RemoveNodeFromCSEMaps(N);
587 // Finally, remove uses due to operands of this node, remove from the
588 // AllNodes list, and delete the node.
589 DeleteNodeNotInCSEMaps(N);
592 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
593 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
594 assert(N->use_empty() && "Cannot delete a node that is not dead!");
596 // Drop all of the operands and decrement used node's use counts.
602 void SelectionDAG::DeallocateNode(SDNode *N) {
603 if (N->OperandsNeedDelete)
604 delete[] N->OperandList;
606 // Set the opcode to DELETED_NODE to help catch bugs when node
607 // memory is reallocated.
608 N->NodeType = ISD::DELETED_NODE;
610 NodeAllocator.Deallocate(AllNodes.remove(N));
613 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
614 /// correspond to it. This is useful when we're about to delete or repurpose
615 /// the node. We don't want future request for structurally identical nodes
616 /// to return N anymore.
617 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
619 switch (N->getOpcode()) {
620 case ISD::EntryToken:
621 llvm_unreachable("EntryToken should not be in CSEMaps!");
623 case ISD::HANDLENODE: return false; // noop.
625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
626 "Cond code doesn't exist!");
627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
630 case ISD::ExternalSymbol:
631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::TargetExternalSymbol: {
634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
635 Erased = TargetExternalSymbols.erase(
636 std::pair<std::string,unsigned char>(ESN->getSymbol(),
637 ESN->getTargetFlags()));
640 case ISD::VALUETYPE: {
641 EVT VT = cast<VTSDNode>(N)->getVT();
642 if (VT.isExtended()) {
643 Erased = ExtendedValueTypeNodes.erase(VT);
645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
651 // Remove it from the CSE Map.
652 Erased = CSEMap.RemoveNode(N);
656 // Verify that the node was actually in one of the CSE maps, unless it has a
657 // flag result (which cannot be CSE'd) or is one of the special cases that are
658 // not subject to CSE.
659 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
660 !N->isMachineOpcode() && !doNotCSE(N)) {
663 llvm_unreachable("Node is not in map!");
669 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
670 /// maps and modified in place. Add it back to the CSE maps, unless an identical
671 /// node already exists, in which case transfer all its users to the existing
672 /// node. This transfer can potentially trigger recursive merging.
675 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
676 DAGUpdateListener *UpdateListener) {
677 // For node types that aren't CSE'd, just act as if no identical node
680 SDNode *Existing = CSEMap.GetOrInsertNode(N);
682 // If there was already an existing matching node, use ReplaceAllUsesWith
683 // to replace the dead one with the existing one. This can cause
684 // recursive merging of other unrelated nodes down the line.
685 ReplaceAllUsesWith(N, Existing, UpdateListener);
687 // N is now dead. Inform the listener if it exists and delete it.
689 UpdateListener->NodeDeleted(N, Existing);
690 DeleteNodeNotInCSEMaps(N);
695 // If the node doesn't already exist, we updated it. Inform a listener if
698 UpdateListener->NodeUpdated(N);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
710 SDValue Ops[] = { Op };
712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
713 AddNodeIDCustom(ID, N);
714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
717 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
718 /// were replaced with those specified. If this node is never memoized,
719 /// return null, otherwise return a pointer to the slot it would take. If a
720 /// node already exists with these operands, the slot will be non-null.
721 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
722 SDValue Op1, SDValue Op2,
727 SDValue Ops[] = { Op1, Op2 };
729 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
730 AddNodeIDCustom(ID, N);
731 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
736 /// were replaced with those specified. If this node is never memoized,
737 /// return null, otherwise return a pointer to the slot it would take. If a
738 /// node already exists with these operands, the slot will be non-null.
739 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
740 const SDValue *Ops,unsigned NumOps,
746 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
747 AddNodeIDCustom(ID, N);
748 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
751 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
752 void SelectionDAG::VerifyNode(SDNode *N) {
753 switch (N->getOpcode()) {
756 case ISD::BUILD_PAIR: {
757 EVT VT = N->getValueType(0);
758 assert(N->getNumValues() == 1 && "Too many results!");
759 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
760 "Wrong return type!");
761 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
762 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
763 "Mismatched operand types!");
764 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
765 "Wrong operand type!");
766 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
767 "Wrong return type size");
770 case ISD::BUILD_VECTOR: {
771 assert(N->getNumValues() == 1 && "Too many results!");
772 assert(N->getValueType(0).isVector() && "Wrong return type!");
773 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
774 "Wrong number of operands!");
775 EVT EltVT = N->getValueType(0).getVectorElementType();
776 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
777 assert((I->getValueType() == EltVT ||
778 (EltVT.isInteger() && I->getValueType().isInteger() &&
779 EltVT.bitsLE(I->getValueType()))) &&
780 "Wrong operand type!");
786 /// getEVTAlignment - Compute the default alignment value for the
789 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
790 const Type *Ty = VT == MVT::iPTR ?
791 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
792 VT.getTypeForEVT(*getContext());
794 return TLI.getTargetData()->getABITypeAlignment(Ty);
797 // EntryNode could meaningfully have debug info if we can find it...
798 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
799 : TLI(tli), FLI(fli), DW(0),
800 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
801 getVTList(MVT::Other)), Root(getEntryNode()) {
802 AllNodes.push_back(&EntryNode);
805 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
810 Context = &mf.getFunction()->getContext();
813 SelectionDAG::~SelectionDAG() {
817 void SelectionDAG::allnodes_clear() {
818 assert(&*AllNodes.begin() == &EntryNode);
819 AllNodes.remove(AllNodes.begin());
820 while (!AllNodes.empty())
821 DeallocateNode(AllNodes.begin());
824 void SelectionDAG::clear() {
826 OperandAllocator.Reset();
829 ExtendedValueTypeNodes.clear();
830 ExternalSymbols.clear();
831 TargetExternalSymbols.clear();
832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
833 static_cast<CondCodeSDNode*>(0));
834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
835 static_cast<SDNode*>(0));
837 EntryNode.UseList = 0;
838 AllNodes.push_back(&EntryNode);
839 Root = getEntryNode();
842 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
843 if (Op.getValueType() == VT) return Op;
844 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
846 return getNode(ISD::AND, DL, Op.getValueType(), Op,
847 getConstant(Imm, Op.getValueType()));
850 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
852 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
853 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
856 return getNode(ISD::XOR, DL, VT, Val, NegOne);
859 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
860 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
861 assert((EltVT.getSizeInBits() >= 64 ||
862 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
863 "getConstant with a uint64_t value that doesn't fit in the type!");
864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
868 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
872 assert(VT.isInteger() && "Cannot create FP integer constant!");
874 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
875 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
876 "APInt size does not match type size!");
878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
886 return SDValue(N, 0);
888 N = NodeAllocator.Allocate<ConstantSDNode>();
889 new (N) ConstantSDNode(isT, &Val, EltVT);
890 CSEMap.InsertNode(N, IP);
891 AllNodes.push_back(N);
894 SDValue Result(N, 0);
896 SmallVector<SDValue, 8> Ops;
897 Ops.assign(VT.getVectorNumElements(), Result);
898 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
899 VT, &Ops[0], Ops.size());
904 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
905 return getConstant(Val, TLI.getPointerTy(), isTarget);
909 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
910 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
913 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
917 VT.isVector() ? VT.getVectorElementType() : VT;
919 // Do the map lookup using the actual bit pattern for the floating point
920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
921 // we don't have issues with SNANs.
922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
930 return SDValue(N, 0);
932 N = NodeAllocator.Allocate<ConstantFPSDNode>();
933 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
934 CSEMap.InsertNode(N, IP);
935 AllNodes.push_back(N);
938 SDValue Result(N, 0);
940 SmallVector<SDValue, 8> Ops;
941 Ops.assign(VT.getVectorNumElements(), Result);
942 // FIXME DebugLoc info might be appropriate here
943 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
944 VT, &Ops[0], Ops.size());
949 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
951 VT.isVector() ? VT.getVectorElementType() : VT;
953 return getConstantFP(APFloat((float)Val), VT, isTarget);
955 return getConstantFP(APFloat(Val), VT, isTarget);
958 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
959 EVT VT, int64_t Offset,
961 unsigned char TargetFlags) {
962 assert((TargetFlags == 0 || isTargetGA) &&
963 "Cannot set target flags on target-independent globals");
965 // Truncate (with sign-extension) the offset value to the pointer size.
966 EVT PTy = TLI.getPointerTy();
967 unsigned BitWidth = PTy.getSizeInBits();
969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
973 // If GV is an alias then use the aliasee for determining thread-localness.
974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
979 if (GVar && GVar->isThreadLocal())
980 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
982 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
985 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
987 ID.AddInteger(Offset);
988 ID.AddInteger(TargetFlags);
990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
991 return SDValue(E, 0);
992 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
993 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
994 CSEMap.InsertNode(N, IP);
995 AllNodes.push_back(N);
996 return SDValue(N, 0);
999 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1000 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1001 FoldingSetNodeID ID;
1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1005 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1006 return SDValue(E, 0);
1007 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1008 new (N) FrameIndexSDNode(FI, VT, isTarget);
1009 CSEMap.InsertNode(N, IP);
1010 AllNodes.push_back(N);
1011 return SDValue(N, 0);
1014 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1015 unsigned char TargetFlags) {
1016 assert((TargetFlags == 0 || isTarget) &&
1017 "Cannot set target flags on target-independent jump tables");
1018 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1019 FoldingSetNodeID ID;
1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1022 ID.AddInteger(TargetFlags);
1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1025 return SDValue(E, 0);
1026 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1027 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1028 CSEMap.InsertNode(N, IP);
1029 AllNodes.push_back(N);
1030 return SDValue(N, 0);
1033 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1034 unsigned Alignment, int Offset,
1036 unsigned char TargetFlags) {
1037 assert((TargetFlags == 0 || isTarget) &&
1038 "Cannot set target flags on target-independent globals");
1040 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1041 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1042 FoldingSetNodeID ID;
1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1044 ID.AddInteger(Alignment);
1045 ID.AddInteger(Offset);
1047 ID.AddInteger(TargetFlags);
1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1050 return SDValue(E, 0);
1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1053 CSEMap.InsertNode(N, IP);
1054 AllNodes.push_back(N);
1055 return SDValue(N, 0);
1059 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1060 unsigned Alignment, int Offset,
1062 unsigned char TargetFlags) {
1063 assert((TargetFlags == 0 || isTarget) &&
1064 "Cannot set target flags on target-independent globals");
1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1070 ID.AddInteger(Alignment);
1071 ID.AddInteger(Offset);
1072 C->AddSelectionDAGCSEId(ID);
1073 ID.AddInteger(TargetFlags);
1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1076 return SDValue(E, 0);
1077 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1078 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1079 CSEMap.InsertNode(N, IP);
1080 AllNodes.push_back(N);
1081 return SDValue(N, 0);
1084 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1085 FoldingSetNodeID ID;
1086 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1090 return SDValue(E, 0);
1091 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1092 new (N) BasicBlockSDNode(MBB);
1093 CSEMap.InsertNode(N, IP);
1094 AllNodes.push_back(N);
1095 return SDValue(N, 0);
1098 SDValue SelectionDAG::getValueType(EVT VT) {
1099 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1100 ValueTypeNodes.size())
1101 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1103 SDNode *&N = VT.isExtended() ?
1104 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1106 if (N) return SDValue(N, 0);
1107 N = NodeAllocator.Allocate<VTSDNode>();
1108 new (N) VTSDNode(VT);
1109 AllNodes.push_back(N);
1110 return SDValue(N, 0);
1113 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1114 SDNode *&N = ExternalSymbols[Sym];
1115 if (N) return SDValue(N, 0);
1116 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1117 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1123 unsigned char TargetFlags) {
1125 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1127 if (N) return SDValue(N, 0);
1128 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1129 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1134 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1135 if ((unsigned)Cond >= CondCodeNodes.size())
1136 CondCodeNodes.resize(Cond+1);
1138 if (CondCodeNodes[Cond] == 0) {
1139 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1140 new (N) CondCodeSDNode(Cond);
1141 CondCodeNodes[Cond] = N;
1142 AllNodes.push_back(N);
1144 return SDValue(CondCodeNodes[Cond], 0);
1147 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1148 // the shuffle mask M that point at N1 to point at N2, and indices that point
1149 // N2 to point at N1.
1150 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1152 int NElts = M.size();
1153 for (int i = 0; i != NElts; ++i) {
1161 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1162 SDValue N2, const int *Mask) {
1163 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1164 assert(VT.isVector() && N1.getValueType().isVector() &&
1165 "Vector Shuffle VTs must be a vectors");
1166 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1167 && "Vector Shuffle VTs must have same element type");
1169 // Canonicalize shuffle undef, undef -> undef
1170 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1171 return getUNDEF(VT);
1173 // Validate that all indices in Mask are within the range of the elements
1174 // input to the shuffle.
1175 unsigned NElts = VT.getVectorNumElements();
1176 SmallVector<int, 8> MaskVec;
1177 for (unsigned i = 0; i != NElts; ++i) {
1178 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1179 MaskVec.push_back(Mask[i]);
1182 // Canonicalize shuffle v, v -> v, undef
1185 for (unsigned i = 0; i != NElts; ++i)
1186 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1189 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1190 if (N1.getOpcode() == ISD::UNDEF)
1191 commuteShuffle(N1, N2, MaskVec);
1193 // Canonicalize all index into lhs, -> shuffle lhs, undef
1194 // Canonicalize all index into rhs, -> shuffle rhs, undef
1195 bool AllLHS = true, AllRHS = true;
1196 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1197 for (unsigned i = 0; i != NElts; ++i) {
1198 if (MaskVec[i] >= (int)NElts) {
1203 } else if (MaskVec[i] >= 0) {
1207 if (AllLHS && AllRHS)
1208 return getUNDEF(VT);
1209 if (AllLHS && !N2Undef)
1213 commuteShuffle(N1, N2, MaskVec);
1216 // If Identity shuffle, or all shuffle in to undef, return that node.
1217 bool AllUndef = true;
1218 bool Identity = true;
1219 for (unsigned i = 0; i != NElts; ++i) {
1220 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1221 if (MaskVec[i] >= 0) AllUndef = false;
1223 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1226 return getUNDEF(VT);
1228 FoldingSetNodeID ID;
1229 SDValue Ops[2] = { N1, N2 };
1230 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1231 for (unsigned i = 0; i != NElts; ++i)
1232 ID.AddInteger(MaskVec[i]);
1235 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1236 return SDValue(E, 0);
1238 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1239 // SDNode doesn't have access to it. This memory will be "leaked" when
1240 // the node is deallocated, but recovered when the NodeAllocator is released.
1241 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1242 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1244 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1245 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1246 CSEMap.InsertNode(N, IP);
1247 AllNodes.push_back(N);
1248 return SDValue(N, 0);
1251 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1252 SDValue Val, SDValue DTy,
1253 SDValue STy, SDValue Rnd, SDValue Sat,
1254 ISD::CvtCode Code) {
1255 // If the src and dest types are the same and the conversion is between
1256 // integer types of the same sign or two floats, no conversion is necessary.
1258 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1261 FoldingSetNodeID ID;
1263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1264 return SDValue(E, 0);
1265 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1266 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1267 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1268 CSEMap.InsertNode(N, IP);
1269 AllNodes.push_back(N);
1270 return SDValue(N, 0);
1273 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1274 FoldingSetNodeID ID;
1275 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1276 ID.AddInteger(RegNo);
1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1279 return SDValue(E, 0);
1280 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1281 new (N) RegisterSDNode(RegNo, VT);
1282 CSEMap.InsertNode(N, IP);
1283 AllNodes.push_back(N);
1284 return SDValue(N, 0);
1287 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1288 unsigned Line, unsigned Col,
1290 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1291 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1293 AllNodes.push_back(N);
1294 return SDValue(N, 0);
1297 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1300 FoldingSetNodeID ID;
1301 SDValue Ops[] = { Root };
1302 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1303 ID.AddInteger(LabelID);
1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1306 return SDValue(E, 0);
1307 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1308 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1309 CSEMap.InsertNode(N, IP);
1310 AllNodes.push_back(N);
1311 return SDValue(N, 0);
1314 SDValue SelectionDAG::getSrcValue(const Value *V) {
1315 assert((!V || isa<PointerType>(V->getType())) &&
1316 "SrcValue is not a pointer?");
1318 FoldingSetNodeID ID;
1319 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1323 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1324 return SDValue(E, 0);
1326 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1327 new (N) SrcValueSDNode(V);
1328 CSEMap.InsertNode(N, IP);
1329 AllNodes.push_back(N);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1335 const Value *v = MO.getValue();
1336 assert((!v || isa<PointerType>(v->getType())) &&
1337 "SrcValue is not a pointer?");
1340 FoldingSetNodeID ID;
1341 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1346 return SDValue(E, 0);
1348 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1349 new (N) MemOperandSDNode(MO);
1350 CSEMap.InsertNode(N, IP);
1351 AllNodes.push_back(N);
1352 return SDValue(N, 0);
1355 /// getShiftAmountOperand - Return the specified value casted to
1356 /// the target's desired shift amount type.
1357 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1358 EVT OpTy = Op.getValueType();
1359 MVT ShTy = TLI.getShiftAmountTy();
1360 if (OpTy == ShTy || OpTy.isVector()) return Op;
1362 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1363 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1366 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1367 /// specified value type.
1368 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1369 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1370 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1371 const Type *Ty = VT.getTypeForEVT(*getContext());
1372 unsigned StackAlign =
1373 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1375 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1376 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1379 /// CreateStackTemporary - Create a stack temporary suitable for holding
1380 /// either of the specified value types.
1381 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1382 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1383 VT2.getStoreSizeInBits())/8;
1384 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1385 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1386 const TargetData *TD = TLI.getTargetData();
1387 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1388 TD->getPrefTypeAlignment(Ty2));
1390 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1391 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1392 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1395 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1396 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1397 // These setcc operations always fold.
1401 case ISD::SETFALSE2: return getConstant(0, VT);
1403 case ISD::SETTRUE2: return getConstant(1, VT);
1415 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1419 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1420 const APInt &C2 = N2C->getAPIntValue();
1421 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1422 const APInt &C1 = N1C->getAPIntValue();
1425 default: llvm_unreachable("Unknown integer setcc!");
1426 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1427 case ISD::SETNE: return getConstant(C1 != C2, VT);
1428 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1429 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1430 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1431 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1432 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1433 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1434 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1435 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1439 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1440 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1441 // No compile time operations on this type yet.
1442 if (N1C->getValueType(0) == MVT::ppcf128)
1445 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1448 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1449 return getUNDEF(VT);
1451 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1452 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1453 return getUNDEF(VT);
1455 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1456 R==APFloat::cmpLessThan, VT);
1457 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1458 return getUNDEF(VT);
1460 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1461 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1462 return getUNDEF(VT);
1464 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1465 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1469 R==APFloat::cmpEqual, VT);
1470 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1471 return getUNDEF(VT);
1473 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1474 R==APFloat::cmpEqual, VT);
1475 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1476 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1477 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1478 R==APFloat::cmpEqual, VT);
1479 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1480 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1481 R==APFloat::cmpLessThan, VT);
1482 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1483 R==APFloat::cmpUnordered, VT);
1484 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1485 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1488 // Ensure that the constant occurs on the RHS.
1489 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1493 // Could not fold it.
1497 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1498 /// use this predicate to simplify operations downstream.
1499 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1500 // This predicate is not safe for vector operations.
1501 if (Op.getValueType().isVector())
1504 unsigned BitWidth = Op.getValueSizeInBits();
1505 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1508 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1509 /// this predicate to simplify operations downstream. Mask is known to be zero
1510 /// for bits that V cannot have.
1511 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1512 unsigned Depth) const {
1513 APInt KnownZero, KnownOne;
1514 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1516 return (KnownZero & Mask) == Mask;
1519 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1520 /// known to be either zero or one and return them in the KnownZero/KnownOne
1521 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1523 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1524 APInt &KnownZero, APInt &KnownOne,
1525 unsigned Depth) const {
1526 unsigned BitWidth = Mask.getBitWidth();
1527 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1528 "Mask size mismatches value type size!");
1530 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1531 if (Depth == 6 || Mask == 0)
1532 return; // Limit search depth.
1534 APInt KnownZero2, KnownOne2;
1536 switch (Op.getOpcode()) {
1538 // We know all of the bits for a constant!
1539 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1540 KnownZero = ~KnownOne & Mask;
1543 // If either the LHS or the RHS are Zero, the result is zero.
1544 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1545 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1546 KnownZero2, KnownOne2, Depth+1);
1547 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1548 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1550 // Output known-1 bits are only known if set in both the LHS & RHS.
1551 KnownOne &= KnownOne2;
1552 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1553 KnownZero |= KnownZero2;
1556 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1557 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1558 KnownZero2, KnownOne2, Depth+1);
1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1560 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1562 // Output known-0 bits are only known if clear in both the LHS & RHS.
1563 KnownZero &= KnownZero2;
1564 // Output known-1 are known to be set if set in either the LHS | RHS.
1565 KnownOne |= KnownOne2;
1568 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1569 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1570 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1571 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1573 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1574 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1575 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1576 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1577 KnownZero = KnownZeroOut;
1581 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1582 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1583 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1587 // If low bits are zero in either operand, output low known-0 bits.
1588 // Also compute a conserative estimate for high known-0 bits.
1589 // More trickiness is possible, but this is sufficient for the
1590 // interesting case of alignment computation.
1592 unsigned TrailZ = KnownZero.countTrailingOnes() +
1593 KnownZero2.countTrailingOnes();
1594 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1595 KnownZero2.countLeadingOnes(),
1596 BitWidth) - BitWidth;
1598 TrailZ = std::min(TrailZ, BitWidth);
1599 LeadZ = std::min(LeadZ, BitWidth);
1600 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1601 APInt::getHighBitsSet(BitWidth, LeadZ);
1606 // For the purposes of computing leading zeros we can conservatively
1607 // treat a udiv as a logical right shift by the power of 2 known to
1608 // be less than the denominator.
1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1610 ComputeMaskedBits(Op.getOperand(0),
1611 AllOnes, KnownZero2, KnownOne2, Depth+1);
1612 unsigned LeadZ = KnownZero2.countLeadingOnes();
1616 ComputeMaskedBits(Op.getOperand(1),
1617 AllOnes, KnownZero2, KnownOne2, Depth+1);
1618 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1619 if (RHSUnknownLeadingOnes != BitWidth)
1620 LeadZ = std::min(BitWidth,
1621 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1623 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1627 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1628 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1629 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1630 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1632 // Only known if known in both the LHS and RHS.
1633 KnownOne &= KnownOne2;
1634 KnownZero &= KnownZero2;
1636 case ISD::SELECT_CC:
1637 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1638 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 // Only known if known in both the LHS and RHS.
1643 KnownOne &= KnownOne2;
1644 KnownZero &= KnownZero2;
1652 if (Op.getResNo() != 1)
1654 // The boolean result conforms to getBooleanContents. Fall through.
1656 // If we know the result of a setcc has the top bits zero, use this info.
1657 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1659 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1662 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1663 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1664 unsigned ShAmt = SA->getZExtValue();
1666 // If the shift count is an invalid immediate, don't do anything.
1667 if (ShAmt >= BitWidth)
1670 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1671 KnownZero, KnownOne, Depth+1);
1672 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1673 KnownZero <<= ShAmt;
1675 // low bits known zero.
1676 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1680 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1681 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1682 unsigned ShAmt = SA->getZExtValue();
1684 // If the shift count is an invalid immediate, don't do anything.
1685 if (ShAmt >= BitWidth)
1688 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1689 KnownZero, KnownOne, Depth+1);
1690 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1691 KnownZero = KnownZero.lshr(ShAmt);
1692 KnownOne = KnownOne.lshr(ShAmt);
1694 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1695 KnownZero |= HighBits; // High bits known zero.
1699 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1700 unsigned ShAmt = SA->getZExtValue();
1702 // If the shift count is an invalid immediate, don't do anything.
1703 if (ShAmt >= BitWidth)
1706 APInt InDemandedMask = (Mask << ShAmt);
1707 // If any of the demanded bits are produced by the sign extension, we also
1708 // demand the input sign bit.
1709 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1710 if (HighBits.getBoolValue())
1711 InDemandedMask |= APInt::getSignBit(BitWidth);
1713 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1716 KnownZero = KnownZero.lshr(ShAmt);
1717 KnownOne = KnownOne.lshr(ShAmt);
1719 // Handle the sign bits.
1720 APInt SignBit = APInt::getSignBit(BitWidth);
1721 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1723 if (KnownZero.intersects(SignBit)) {
1724 KnownZero |= HighBits; // New bits are known zero.
1725 } else if (KnownOne.intersects(SignBit)) {
1726 KnownOne |= HighBits; // New bits are known one.
1730 case ISD::SIGN_EXTEND_INREG: {
1731 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1732 unsigned EBits = EVT.getSizeInBits();
1734 // Sign extension. Compute the demanded bits in the result that are not
1735 // present in the input.
1736 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1738 APInt InSignBit = APInt::getSignBit(EBits);
1739 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1741 // If the sign extended bits are demanded, we know that the sign
1743 InSignBit.zext(BitWidth);
1744 if (NewBits.getBoolValue())
1745 InputDemandedBits |= InSignBit;
1747 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1748 KnownZero, KnownOne, Depth+1);
1749 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1751 // If the sign bit of the input is known set or clear, then we know the
1752 // top bits of the result.
1753 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1754 KnownZero |= NewBits;
1755 KnownOne &= ~NewBits;
1756 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1757 KnownOne |= NewBits;
1758 KnownZero &= ~NewBits;
1759 } else { // Input sign bit unknown
1760 KnownZero &= ~NewBits;
1761 KnownOne &= ~NewBits;
1768 unsigned LowBits = Log2_32(BitWidth)+1;
1769 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1774 if (ISD::isZEXTLoad(Op.getNode())) {
1775 LoadSDNode *LD = cast<LoadSDNode>(Op);
1776 EVT VT = LD->getMemoryVT();
1777 unsigned MemBits = VT.getSizeInBits();
1778 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1782 case ISD::ZERO_EXTEND: {
1783 EVT InVT = Op.getOperand(0).getValueType();
1784 unsigned InBits = InVT.getSizeInBits();
1785 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1786 APInt InMask = Mask;
1787 InMask.trunc(InBits);
1788 KnownZero.trunc(InBits);
1789 KnownOne.trunc(InBits);
1790 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1791 KnownZero.zext(BitWidth);
1792 KnownOne.zext(BitWidth);
1793 KnownZero |= NewBits;
1796 case ISD::SIGN_EXTEND: {
1797 EVT InVT = Op.getOperand(0).getValueType();
1798 unsigned InBits = InVT.getSizeInBits();
1799 APInt InSignBit = APInt::getSignBit(InBits);
1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1801 APInt InMask = Mask;
1802 InMask.trunc(InBits);
1804 // If any of the sign extended bits are demanded, we know that the sign
1805 // bit is demanded. Temporarily set this bit in the mask for our callee.
1806 if (NewBits.getBoolValue())
1807 InMask |= InSignBit;
1809 KnownZero.trunc(InBits);
1810 KnownOne.trunc(InBits);
1811 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1813 // Note if the sign bit is known to be zero or one.
1814 bool SignBitKnownZero = KnownZero.isNegative();
1815 bool SignBitKnownOne = KnownOne.isNegative();
1816 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1817 "Sign bit can't be known to be both zero and one!");
1819 // If the sign bit wasn't actually demanded by our caller, we don't
1820 // want it set in the KnownZero and KnownOne result values. Reset the
1821 // mask and reapply it to the result values.
1823 InMask.trunc(InBits);
1824 KnownZero &= InMask;
1827 KnownZero.zext(BitWidth);
1828 KnownOne.zext(BitWidth);
1830 // If the sign bit is known zero or one, the top bits match.
1831 if (SignBitKnownZero)
1832 KnownZero |= NewBits;
1833 else if (SignBitKnownOne)
1834 KnownOne |= NewBits;
1837 case ISD::ANY_EXTEND: {
1838 EVT InVT = Op.getOperand(0).getValueType();
1839 unsigned InBits = InVT.getSizeInBits();
1840 APInt InMask = Mask;
1841 InMask.trunc(InBits);
1842 KnownZero.trunc(InBits);
1843 KnownOne.trunc(InBits);
1844 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1845 KnownZero.zext(BitWidth);
1846 KnownOne.zext(BitWidth);
1849 case ISD::TRUNCATE: {
1850 EVT InVT = Op.getOperand(0).getValueType();
1851 unsigned InBits = InVT.getSizeInBits();
1852 APInt InMask = Mask;
1853 InMask.zext(InBits);
1854 KnownZero.zext(InBits);
1855 KnownOne.zext(InBits);
1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 KnownZero.trunc(BitWidth);
1859 KnownOne.trunc(BitWidth);
1862 case ISD::AssertZext: {
1863 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1864 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1865 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1867 KnownZero |= (~InMask) & Mask;
1871 // All bits are zero except the low bit.
1872 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1876 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1877 // We know that the top bits of C-X are clear if X contains less bits
1878 // than C (i.e. no wrap-around can happen). For example, 20-X is
1879 // positive if we can prove that X is >= 0 and < 16.
1880 if (CLHS->getAPIntValue().isNonNegative()) {
1881 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1882 // NLZ can't be BitWidth with no sign bit
1883 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1884 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1887 // If all of the MaskV bits are known to be zero, then we know the
1888 // output top bits are zero, because we now know that the output is
1890 if ((KnownZero2 & MaskV) == MaskV) {
1891 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1892 // Top bits known zero.
1893 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1900 // Output known-0 bits are known if clear or set in both the low clear bits
1901 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1902 // low 3 bits clear.
1903 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1904 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1905 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1906 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1908 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1909 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1910 KnownZeroOut = std::min(KnownZeroOut,
1911 KnownZero2.countTrailingOnes());
1913 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1917 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1918 const APInt &RA = Rem->getAPIntValue();
1919 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1920 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1921 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1922 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1924 // If the sign bit of the first operand is zero, the sign bit of
1925 // the result is zero. If the first operand has no one bits below
1926 // the second operand's single 1 bit, its sign will be zero.
1927 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1928 KnownZero2 |= ~LowBits;
1930 KnownZero |= KnownZero2 & Mask;
1932 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1937 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1938 const APInt &RA = Rem->getAPIntValue();
1939 if (RA.isPowerOf2()) {
1940 APInt LowBits = (RA - 1);
1941 APInt Mask2 = LowBits & Mask;
1942 KnownZero |= ~LowBits & Mask;
1943 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1944 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1949 // Since the result is less than or equal to either operand, any leading
1950 // zero bits in either operand must also exist in the result.
1951 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1952 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1954 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1957 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1958 KnownZero2.countLeadingOnes());
1960 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1964 // Allow the target to implement this method for its nodes.
1965 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1966 case ISD::INTRINSIC_WO_CHAIN:
1967 case ISD::INTRINSIC_W_CHAIN:
1968 case ISD::INTRINSIC_VOID:
1969 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1976 /// ComputeNumSignBits - Return the number of times the sign bit of the
1977 /// register is replicated into the other bits. We know that at least 1 bit
1978 /// is always equal to the sign bit (itself), but other cases can give us
1979 /// information. For example, immediately after an "SRA X, 2", we know that
1980 /// the top 3 bits are all equal to each other, so we return 3.
1981 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1982 EVT VT = Op.getValueType();
1983 assert(VT.isInteger() && "Invalid VT!");
1984 unsigned VTBits = VT.getSizeInBits();
1986 unsigned FirstAnswer = 1;
1989 return 1; // Limit search depth.
1991 switch (Op.getOpcode()) {
1993 case ISD::AssertSext:
1994 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1995 return VTBits-Tmp+1;
1996 case ISD::AssertZext:
1997 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2000 case ISD::Constant: {
2001 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2002 // If negative, return # leading ones.
2003 if (Val.isNegative())
2004 return Val.countLeadingOnes();
2006 // Return # leading zeros.
2007 return Val.countLeadingZeros();
2010 case ISD::SIGN_EXTEND:
2011 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2012 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2014 case ISD::SIGN_EXTEND_INREG:
2015 // Max of the input and what this extends.
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2019 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2020 return std::max(Tmp, Tmp2);
2023 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2024 // SRA X, C -> adds C sign bits.
2025 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2026 Tmp += C->getZExtValue();
2027 if (Tmp > VTBits) Tmp = VTBits;
2031 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2032 // shl destroys sign bits.
2033 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2034 if (C->getZExtValue() >= VTBits || // Bad shift.
2035 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2036 return Tmp - C->getZExtValue();
2041 case ISD::XOR: // NOT is handled here.
2042 // Logical binary ops preserve the number of sign bits at the worst.
2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2045 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2046 FirstAnswer = std::min(Tmp, Tmp2);
2047 // We computed what we know about the sign bits as our first
2048 // answer. Now proceed to the generic code that uses
2049 // ComputeMaskedBits, and pick whichever answer is better.
2054 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2055 if (Tmp == 1) return 1; // Early out.
2056 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2057 return std::min(Tmp, Tmp2);
2065 if (Op.getResNo() != 1)
2067 // The boolean result conforms to getBooleanContents. Fall through.
2069 // If setcc returns 0/-1, all bits are sign bits.
2070 if (TLI.getBooleanContents() ==
2071 TargetLowering::ZeroOrNegativeOneBooleanContent)
2076 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2077 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2079 // Handle rotate right by N like a rotate left by 32-N.
2080 if (Op.getOpcode() == ISD::ROTR)
2081 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2083 // If we aren't rotating out all of the known-in sign bits, return the
2084 // number that are left. This handles rotl(sext(x), 1) for example.
2085 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2086 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2090 // Add can have at most one carry bit. Thus we know that the output
2091 // is, at worst, one more bit than the inputs.
2092 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2093 if (Tmp == 1) return 1; // Early out.
2095 // Special case decrementing a value (ADD X, -1):
2096 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2097 if (CRHS->isAllOnesValue()) {
2098 APInt KnownZero, KnownOne;
2099 APInt Mask = APInt::getAllOnesValue(VTBits);
2100 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2102 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2104 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2107 // If we are subtracting one from a positive number, there is no carry
2108 // out of the result.
2109 if (KnownZero.isNegative())
2113 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2114 if (Tmp2 == 1) return 1;
2115 return std::min(Tmp, Tmp2)-1;
2119 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2120 if (Tmp2 == 1) return 1;
2123 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2124 if (CLHS->isNullValue()) {
2125 APInt KnownZero, KnownOne;
2126 APInt Mask = APInt::getAllOnesValue(VTBits);
2127 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2128 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2130 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2133 // If the input is known to be positive (the sign bit is known clear),
2134 // the output of the NEG has the same number of sign bits as the input.
2135 if (KnownZero.isNegative())
2138 // Otherwise, we treat this like a SUB.
2141 // Sub can have at most one carry bit. Thus we know that the output
2142 // is, at worst, one more bit than the inputs.
2143 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2144 if (Tmp == 1) return 1; // Early out.
2145 return std::min(Tmp, Tmp2)-1;
2148 // FIXME: it's tricky to do anything useful for this, but it is an important
2149 // case for targets like X86.
2153 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2154 if (Op.getOpcode() == ISD::LOAD) {
2155 LoadSDNode *LD = cast<LoadSDNode>(Op);
2156 unsigned ExtType = LD->getExtensionType();
2159 case ISD::SEXTLOAD: // '17' bits known
2160 Tmp = LD->getMemoryVT().getSizeInBits();
2161 return VTBits-Tmp+1;
2162 case ISD::ZEXTLOAD: // '16' bits known
2163 Tmp = LD->getMemoryVT().getSizeInBits();
2168 // Allow the target to implement this method for its nodes.
2169 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2170 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2171 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2172 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2173 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2174 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2177 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2178 // use this information.
2179 APInt KnownZero, KnownOne;
2180 APInt Mask = APInt::getAllOnesValue(VTBits);
2181 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2183 if (KnownZero.isNegative()) { // sign bit is 0
2185 } else if (KnownOne.isNegative()) { // sign bit is 1;
2192 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2193 // the number of identical bits in the top of the input value.
2195 Mask <<= Mask.getBitWidth()-VTBits;
2196 // Return # leading zeros. We use 'min' here in case Val was zero before
2197 // shifting. We don't want to return '64' as for an i32 "0".
2198 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2202 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2203 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2204 if (!GA) return false;
2205 if (GA->getOffset() != 0) return false;
2206 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2207 if (!GV) return false;
2208 MachineModuleInfo *MMI = getMachineModuleInfo();
2209 return MMI && MMI->hasDebugInfo();
2213 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2214 /// element of the result of the vector shuffle.
2215 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2217 EVT VT = N->getValueType(0);
2218 DebugLoc dl = N->getDebugLoc();
2219 if (N->getMaskElt(i) < 0)
2220 return getUNDEF(VT.getVectorElementType());
2221 unsigned Index = N->getMaskElt(i);
2222 unsigned NumElems = VT.getVectorNumElements();
2223 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2226 if (V.getOpcode() == ISD::BIT_CONVERT) {
2227 V = V.getOperand(0);
2228 EVT VVT = V.getValueType();
2229 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2232 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2233 return (Index == 0) ? V.getOperand(0)
2234 : getUNDEF(VT.getVectorElementType());
2235 if (V.getOpcode() == ISD::BUILD_VECTOR)
2236 return V.getOperand(Index);
2237 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2238 return getShuffleScalarElt(SVN, Index);
2243 /// getNode - Gets or creates the specified node.
2245 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2246 FoldingSetNodeID ID;
2247 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2249 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2250 return SDValue(E, 0);
2251 SDNode *N = NodeAllocator.Allocate<SDNode>();
2252 new (N) SDNode(Opcode, DL, getVTList(VT));
2253 CSEMap.InsertNode(N, IP);
2255 AllNodes.push_back(N);
2259 return SDValue(N, 0);
2262 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2263 EVT VT, SDValue Operand) {
2264 // Constant fold unary operations with an integer constant operand.
2265 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2266 const APInt &Val = C->getAPIntValue();
2267 unsigned BitWidth = VT.getSizeInBits();
2270 case ISD::SIGN_EXTEND:
2271 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2272 case ISD::ANY_EXTEND:
2273 case ISD::ZERO_EXTEND:
2275 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2276 case ISD::UINT_TO_FP:
2277 case ISD::SINT_TO_FP: {
2278 const uint64_t zero[] = {0, 0};
2279 // No compile time operations on this type.
2280 if (VT==MVT::ppcf128)
2282 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2283 (void)apf.convertFromAPInt(Val,
2284 Opcode==ISD::SINT_TO_FP,
2285 APFloat::rmNearestTiesToEven);
2286 return getConstantFP(apf, VT);
2288 case ISD::BIT_CONVERT:
2289 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2290 return getConstantFP(Val.bitsToFloat(), VT);
2291 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2292 return getConstantFP(Val.bitsToDouble(), VT);
2295 return getConstant(Val.byteSwap(), VT);
2297 return getConstant(Val.countPopulation(), VT);
2299 return getConstant(Val.countLeadingZeros(), VT);
2301 return getConstant(Val.countTrailingZeros(), VT);
2305 // Constant fold unary operations with a floating point constant operand.
2306 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2307 APFloat V = C->getValueAPF(); // make copy
2308 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2312 return getConstantFP(V, VT);
2315 return getConstantFP(V, VT);
2317 case ISD::FP_EXTEND: {
2319 // This can return overflow, underflow, or inexact; we don't care.
2320 // FIXME need to be more flexible about rounding mode.
2321 (void)V.convert(*EVTToAPFloatSemantics(VT),
2322 APFloat::rmNearestTiesToEven, &ignored);
2323 return getConstantFP(V, VT);
2325 case ISD::FP_TO_SINT:
2326 case ISD::FP_TO_UINT: {
2329 assert(integerPartWidth >= 64);
2330 // FIXME need to be more flexible about rounding mode.
2331 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2332 Opcode==ISD::FP_TO_SINT,
2333 APFloat::rmTowardZero, &ignored);
2334 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2336 APInt api(VT.getSizeInBits(), 2, x);
2337 return getConstant(api, VT);
2339 case ISD::BIT_CONVERT:
2340 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2341 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2342 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2343 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2349 unsigned OpOpcode = Operand.getNode()->getOpcode();
2351 case ISD::TokenFactor:
2352 case ISD::MERGE_VALUES:
2353 case ISD::CONCAT_VECTORS:
2354 return Operand; // Factor, merge or concat of one node? No need.
2355 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2356 case ISD::FP_EXTEND:
2357 assert(VT.isFloatingPoint() &&
2358 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2359 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2360 if (Operand.getOpcode() == ISD::UNDEF)
2361 return getUNDEF(VT);
2363 case ISD::SIGN_EXTEND:
2364 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2365 "Invalid SIGN_EXTEND!");
2366 if (Operand.getValueType() == VT) return Operand; // noop extension
2367 assert(Operand.getValueType().bitsLT(VT)
2368 && "Invalid sext node, dst < src!");
2369 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2370 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2372 case ISD::ZERO_EXTEND:
2373 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2374 "Invalid ZERO_EXTEND!");
2375 if (Operand.getValueType() == VT) return Operand; // noop extension
2376 assert(Operand.getValueType().bitsLT(VT)
2377 && "Invalid zext node, dst < src!");
2378 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2379 return getNode(ISD::ZERO_EXTEND, DL, VT,
2380 Operand.getNode()->getOperand(0));
2382 case ISD::ANY_EXTEND:
2383 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2384 "Invalid ANY_EXTEND!");
2385 if (Operand.getValueType() == VT) return Operand; // noop extension
2386 assert(Operand.getValueType().bitsLT(VT)
2387 && "Invalid anyext node, dst < src!");
2388 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2389 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2390 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2393 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2394 "Invalid TRUNCATE!");
2395 if (Operand.getValueType() == VT) return Operand; // noop truncate
2396 assert(Operand.getValueType().bitsGT(VT)
2397 && "Invalid truncate node, src < dst!");
2398 if (OpOpcode == ISD::TRUNCATE)
2399 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2400 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2401 OpOpcode == ISD::ANY_EXTEND) {
2402 // If the source is smaller than the dest, we still need an extend.
2403 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2404 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2405 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2406 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2408 return Operand.getNode()->getOperand(0);
2411 case ISD::BIT_CONVERT:
2412 // Basic sanity checking.
2413 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2414 && "Cannot BIT_CONVERT between types of different sizes!");
2415 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2416 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2417 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2418 if (OpOpcode == ISD::UNDEF)
2419 return getUNDEF(VT);
2421 case ISD::SCALAR_TO_VECTOR:
2422 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2423 (VT.getVectorElementType() == Operand.getValueType() ||
2424 (VT.getVectorElementType().isInteger() &&
2425 Operand.getValueType().isInteger() &&
2426 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2427 "Illegal SCALAR_TO_VECTOR node!");
2428 if (OpOpcode == ISD::UNDEF)
2429 return getUNDEF(VT);
2430 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2431 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2432 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2433 Operand.getConstantOperandVal(1) == 0 &&
2434 Operand.getOperand(0).getValueType() == VT)
2435 return Operand.getOperand(0);
2438 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2439 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2440 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2441 Operand.getNode()->getOperand(0));
2442 if (OpOpcode == ISD::FNEG) // --X -> X
2443 return Operand.getNode()->getOperand(0);
2446 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2447 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2452 SDVTList VTs = getVTList(VT);
2453 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2454 FoldingSetNodeID ID;
2455 SDValue Ops[1] = { Operand };
2456 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2458 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2459 return SDValue(E, 0);
2460 N = NodeAllocator.Allocate<UnarySDNode>();
2461 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2462 CSEMap.InsertNode(N, IP);
2464 N = NodeAllocator.Allocate<UnarySDNode>();
2465 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2468 AllNodes.push_back(N);
2472 return SDValue(N, 0);
2475 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2477 ConstantSDNode *Cst1,
2478 ConstantSDNode *Cst2) {
2479 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2482 case ISD::ADD: return getConstant(C1 + C2, VT);
2483 case ISD::SUB: return getConstant(C1 - C2, VT);
2484 case ISD::MUL: return getConstant(C1 * C2, VT);
2486 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2489 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2492 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2495 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2497 case ISD::AND: return getConstant(C1 & C2, VT);
2498 case ISD::OR: return getConstant(C1 | C2, VT);
2499 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2500 case ISD::SHL: return getConstant(C1 << C2, VT);
2501 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2502 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2503 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2504 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2511 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2512 SDValue N1, SDValue N2) {
2513 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2514 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2517 case ISD::TokenFactor:
2518 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2519 N2.getValueType() == MVT::Other && "Invalid token factor!");
2520 // Fold trivial token factors.
2521 if (N1.getOpcode() == ISD::EntryToken) return N2;
2522 if (N2.getOpcode() == ISD::EntryToken) return N1;
2523 if (N1 == N2) return N1;
2525 case ISD::CONCAT_VECTORS:
2526 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2527 // one big BUILD_VECTOR.
2528 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2529 N2.getOpcode() == ISD::BUILD_VECTOR) {
2530 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2531 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2532 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2536 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2537 N1.getValueType() == VT && "Binary operator types must match!");
2538 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2539 // worth handling here.
2540 if (N2C && N2C->isNullValue())
2542 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2549 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2550 N1.getValueType() == VT && "Binary operator types must match!");
2551 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2552 // it's worth handling here.
2553 if (N2C && N2C->isNullValue())
2563 assert(VT.isInteger() && "This operator does not apply to FP types!");
2571 if (Opcode == ISD::FADD) {
2573 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2574 if (CFP->getValueAPF().isZero())
2577 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2578 if (CFP->getValueAPF().isZero())
2580 } else if (Opcode == ISD::FSUB) {
2582 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2583 if (CFP->getValueAPF().isZero())
2587 assert(N1.getValueType() == N2.getValueType() &&
2588 N1.getValueType() == VT && "Binary operator types must match!");
2590 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2591 assert(N1.getValueType() == VT &&
2592 N1.getValueType().isFloatingPoint() &&
2593 N2.getValueType().isFloatingPoint() &&
2594 "Invalid FCOPYSIGN!");
2601 assert(VT == N1.getValueType() &&
2602 "Shift operators return type must be the same as their first arg");
2603 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2604 "Shifts only work on integers");
2606 // Always fold shifts of i1 values so the code generator doesn't need to
2607 // handle them. Since we know the size of the shift has to be less than the
2608 // size of the value, the shift/rotate count is guaranteed to be zero.
2612 case ISD::FP_ROUND_INREG: {
2613 EVT EVT = cast<VTSDNode>(N2)->getVT();
2614 assert(VT == N1.getValueType() && "Not an inreg round!");
2615 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2616 "Cannot FP_ROUND_INREG integer types");
2617 assert(EVT.bitsLE(VT) && "Not rounding down!");
2618 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2622 assert(VT.isFloatingPoint() &&
2623 N1.getValueType().isFloatingPoint() &&
2624 VT.bitsLE(N1.getValueType()) &&
2625 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2626 if (N1.getValueType() == VT) return N1; // noop conversion.
2628 case ISD::AssertSext:
2629 case ISD::AssertZext: {
2630 EVT EVT = cast<VTSDNode>(N2)->getVT();
2631 assert(VT == N1.getValueType() && "Not an inreg extend!");
2632 assert(VT.isInteger() && EVT.isInteger() &&
2633 "Cannot *_EXTEND_INREG FP types");
2634 assert(EVT.bitsLE(VT) && "Not extending!");
2635 if (VT == EVT) return N1; // noop assertion.
2638 case ISD::SIGN_EXTEND_INREG: {
2639 EVT EVT = cast<VTSDNode>(N2)->getVT();
2640 assert(VT == N1.getValueType() && "Not an inreg extend!");
2641 assert(VT.isInteger() && EVT.isInteger() &&
2642 "Cannot *_EXTEND_INREG FP types");
2643 assert(EVT.bitsLE(VT) && "Not extending!");
2644 if (EVT == VT) return N1; // Not actually extending
2647 APInt Val = N1C->getAPIntValue();
2648 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2649 Val <<= Val.getBitWidth()-FromBits;
2650 Val = Val.ashr(Val.getBitWidth()-FromBits);
2651 return getConstant(Val, VT);
2655 case ISD::EXTRACT_VECTOR_ELT:
2656 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2657 if (N1.getOpcode() == ISD::UNDEF)
2658 return getUNDEF(VT);
2660 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2661 // expanding copies of large vectors from registers.
2663 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2664 N1.getNumOperands() > 0) {
2666 N1.getOperand(0).getValueType().getVectorNumElements();
2667 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2668 N1.getOperand(N2C->getZExtValue() / Factor),
2669 getConstant(N2C->getZExtValue() % Factor,
2670 N2.getValueType()));
2673 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2674 // expanding large vector constants.
2675 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2676 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2677 EVT VEltTy = N1.getValueType().getVectorElementType();
2678 if (Elt.getValueType() != VEltTy) {
2679 // If the vector element type is not legal, the BUILD_VECTOR operands
2680 // are promoted and implicitly truncated. Make that explicit here.
2681 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2684 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2685 // result is implicitly extended.
2686 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2691 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2692 // operations are lowered to scalars.
2693 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2694 // If the indices are the same, return the inserted element.
2695 if (N1.getOperand(2) == N2)
2696 return N1.getOperand(1);
2697 // If the indices are known different, extract the element from
2698 // the original vector.
2699 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2700 isa<ConstantSDNode>(N2))
2701 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2704 case ISD::EXTRACT_ELEMENT:
2705 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2706 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2707 (N1.getValueType().isInteger() == VT.isInteger()) &&
2708 "Wrong types for EXTRACT_ELEMENT!");
2710 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2711 // 64-bit integers into 32-bit parts. Instead of building the extract of
2712 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2713 if (N1.getOpcode() == ISD::BUILD_PAIR)
2714 return N1.getOperand(N2C->getZExtValue());
2716 // EXTRACT_ELEMENT of a constant int is also very common.
2717 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2718 unsigned ElementSize = VT.getSizeInBits();
2719 unsigned Shift = ElementSize * N2C->getZExtValue();
2720 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2721 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2724 case ISD::EXTRACT_SUBVECTOR:
2725 if (N1.getValueType() == VT) // Trivial extraction.
2732 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2733 if (SV.getNode()) return SV;
2734 } else { // Cannonicalize constant to RHS if commutative
2735 if (isCommutativeBinOp(Opcode)) {
2736 std::swap(N1C, N2C);
2742 // Constant fold FP operations.
2743 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2744 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2746 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2747 // Cannonicalize constant to RHS if commutative
2748 std::swap(N1CFP, N2CFP);
2750 } else if (N2CFP && VT != MVT::ppcf128) {
2751 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2752 APFloat::opStatus s;
2755 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2756 if (s != APFloat::opInvalidOp)
2757 return getConstantFP(V1, VT);
2760 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2761 if (s!=APFloat::opInvalidOp)
2762 return getConstantFP(V1, VT);
2765 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2766 if (s!=APFloat::opInvalidOp)
2767 return getConstantFP(V1, VT);
2770 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2771 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2772 return getConstantFP(V1, VT);
2775 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2776 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2777 return getConstantFP(V1, VT);
2779 case ISD::FCOPYSIGN:
2781 return getConstantFP(V1, VT);
2787 // Canonicalize an UNDEF to the RHS, even over a constant.
2788 if (N1.getOpcode() == ISD::UNDEF) {
2789 if (isCommutativeBinOp(Opcode)) {
2793 case ISD::FP_ROUND_INREG:
2794 case ISD::SIGN_EXTEND_INREG:
2800 return N1; // fold op(undef, arg2) -> undef
2808 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2809 // For vectors, we can't easily build an all zero vector, just return
2816 // Fold a bunch of operators when the RHS is undef.
2817 if (N2.getOpcode() == ISD::UNDEF) {
2820 if (N1.getOpcode() == ISD::UNDEF)
2821 // Handle undef ^ undef -> 0 special case. This is a common
2823 return getConstant(0, VT);
2833 return N2; // fold op(arg1, undef) -> undef
2847 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2848 // For vectors, we can't easily build an all zero vector, just return
2853 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2854 // For vectors, we can't easily build an all one vector, just return
2862 // Memoize this node if possible.
2864 SDVTList VTs = getVTList(VT);
2865 if (VT != MVT::Flag) {
2866 SDValue Ops[] = { N1, N2 };
2867 FoldingSetNodeID ID;
2868 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2870 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2871 return SDValue(E, 0);
2872 N = NodeAllocator.Allocate<BinarySDNode>();
2873 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2874 CSEMap.InsertNode(N, IP);
2876 N = NodeAllocator.Allocate<BinarySDNode>();
2877 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2880 AllNodes.push_back(N);
2884 return SDValue(N, 0);
2887 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2888 SDValue N1, SDValue N2, SDValue N3) {
2889 // Perform various simplifications.
2890 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2891 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2893 case ISD::CONCAT_VECTORS:
2894 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2895 // one big BUILD_VECTOR.
2896 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2897 N2.getOpcode() == ISD::BUILD_VECTOR &&
2898 N3.getOpcode() == ISD::BUILD_VECTOR) {
2899 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2900 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2901 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2902 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2906 // Use FoldSetCC to simplify SETCC's.
2907 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2908 if (Simp.getNode()) return Simp;
2913 if (N1C->getZExtValue())
2914 return N2; // select true, X, Y -> X
2916 return N3; // select false, X, Y -> Y
2919 if (N2 == N3) return N2; // select C, X, X -> X
2923 if (N2C->getZExtValue()) // Unconditional branch
2924 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2926 return N1; // Never-taken branch
2929 case ISD::VECTOR_SHUFFLE:
2930 llvm_unreachable("should use getVectorShuffle constructor!");
2932 case ISD::BIT_CONVERT:
2933 // Fold bit_convert nodes from a type to themselves.
2934 if (N1.getValueType() == VT)
2939 // Memoize node if it doesn't produce a flag.
2941 SDVTList VTs = getVTList(VT);
2942 if (VT != MVT::Flag) {
2943 SDValue Ops[] = { N1, N2, N3 };
2944 FoldingSetNodeID ID;
2945 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2947 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2948 return SDValue(E, 0);
2949 N = NodeAllocator.Allocate<TernarySDNode>();
2950 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2951 CSEMap.InsertNode(N, IP);
2953 N = NodeAllocator.Allocate<TernarySDNode>();
2954 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2956 AllNodes.push_back(N);
2960 return SDValue(N, 0);
2963 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2964 SDValue N1, SDValue N2, SDValue N3,
2966 SDValue Ops[] = { N1, N2, N3, N4 };
2967 return getNode(Opcode, DL, VT, Ops, 4);
2970 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2971 SDValue N1, SDValue N2, SDValue N3,
2972 SDValue N4, SDValue N5) {
2973 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2974 return getNode(Opcode, DL, VT, Ops, 5);
2977 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
2978 /// the incoming stack arguments to be loaded from the stack.
2979 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
2980 SmallVector<SDValue, 8> ArgChains;
2982 // Include the original chain at the beginning of the list. When this is
2983 // used by target LowerCall hooks, this helps legalize find the
2984 // CALLSEQ_BEGIN node.
2985 ArgChains.push_back(Chain);
2987 // Add a chain value for each stack argument.
2988 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
2989 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
2990 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
2991 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
2992 if (FI->getIndex() < 0)
2993 ArgChains.push_back(SDValue(L, 1));
2995 // Build a tokenfactor for all the chains.
2996 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
2997 &ArgChains[0], ArgChains.size());
3000 /// getMemsetValue - Vectorized representation of the memset value
3002 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3004 unsigned NumBits = VT.isVector() ?
3005 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3006 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3007 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3009 for (unsigned i = NumBits; i > 8; i >>= 1) {
3010 Val = (Val << Shift) | Val;
3014 return DAG.getConstant(Val, VT);
3015 return DAG.getConstantFP(APFloat(Val), VT);
3018 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3019 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3021 for (unsigned i = NumBits; i > 8; i >>= 1) {
3022 Value = DAG.getNode(ISD::OR, dl, VT,
3023 DAG.getNode(ISD::SHL, dl, VT, Value,
3024 DAG.getConstant(Shift,
3025 TLI.getShiftAmountTy())),
3033 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3034 /// used when a memcpy is turned into a memset when the source is a constant
3036 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3037 const TargetLowering &TLI,
3038 std::string &Str, unsigned Offset) {
3039 // Handle vector with all elements zero.
3042 return DAG.getConstant(0, VT);
3043 unsigned NumElts = VT.getVectorNumElements();
3044 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3045 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3047 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3050 assert(!VT.isVector() && "Can't handle vector type here!");
3051 unsigned NumBits = VT.getSizeInBits();
3052 unsigned MSB = NumBits / 8;
3054 if (TLI.isLittleEndian())
3055 Offset = Offset + MSB - 1;
3056 for (unsigned i = 0; i != MSB; ++i) {
3057 Val = (Val << 8) | (unsigned char)Str[Offset];
3058 Offset += TLI.isLittleEndian() ? -1 : 1;
3060 return DAG.getConstant(Val, VT);
3063 /// getMemBasePlusOffset - Returns base and offset node for the
3065 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3066 SelectionDAG &DAG) {
3067 EVT VT = Base.getValueType();
3068 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3069 VT, Base, DAG.getConstant(Offset, VT));
3072 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3074 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3075 unsigned SrcDelta = 0;
3076 GlobalAddressSDNode *G = NULL;
3077 if (Src.getOpcode() == ISD::GlobalAddress)
3078 G = cast<GlobalAddressSDNode>(Src);
3079 else if (Src.getOpcode() == ISD::ADD &&
3080 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3081 Src.getOperand(1).getOpcode() == ISD::Constant) {
3082 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3083 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3088 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3089 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3095 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3096 /// to replace the memset / memcpy is below the threshold. It also returns the
3097 /// types of the sequence of memory ops to perform memset / memcpy.
3099 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3100 SDValue Dst, SDValue Src,
3101 unsigned Limit, uint64_t Size, unsigned &Align,
3102 std::string &Str, bool &isSrcStr,
3104 const TargetLowering &TLI) {
3105 isSrcStr = isMemSrcFromString(Src, Str);
3106 bool isSrcConst = isa<ConstantSDNode>(Src);
3107 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3108 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3109 if (VT != MVT::iAny) {
3110 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3111 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3112 // If source is a string constant, this will require an unaligned load.
3113 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3114 if (Dst.getOpcode() != ISD::FrameIndex) {
3115 // Can't change destination alignment. It requires a unaligned store.
3119 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3120 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3121 if (MFI->isFixedObjectIndex(FI)) {
3122 // Can't change destination alignment. It requires a unaligned store.
3126 // Give the stack frame object a larger alignment if needed.
3127 if (MFI->getObjectAlignment(FI) < NewAlign)
3128 MFI->setObjectAlignment(FI, NewAlign);
3135 if (VT == MVT::iAny) {
3136 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3139 switch (Align & 7) {
3140 case 0: VT = MVT::i64; break;
3141 case 4: VT = MVT::i32; break;
3142 case 2: VT = MVT::i16; break;
3143 default: VT = MVT::i8; break;
3148 while (!TLI.isTypeLegal(LVT))
3149 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3150 assert(LVT.isInteger());
3156 unsigned NumMemOps = 0;
3158 unsigned VTSize = VT.getSizeInBits() / 8;
3159 while (VTSize > Size) {
3160 // For now, only use non-vector load / store's for the left-over pieces.
3161 if (VT.isVector()) {
3163 while (!TLI.isTypeLegal(VT))
3164 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3165 VTSize = VT.getSizeInBits() / 8;
3167 // This can result in a type that is not legal on the target, e.g.
3168 // 1 or 2 bytes on PPC.
3169 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3174 if (++NumMemOps > Limit)
3176 MemOps.push_back(VT);
3183 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3184 SDValue Chain, SDValue Dst,
3185 SDValue Src, uint64_t Size,
3186 unsigned Align, bool AlwaysInline,
3187 const Value *DstSV, uint64_t DstSVOff,
3188 const Value *SrcSV, uint64_t SrcSVOff){
3189 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3191 // Expand memcpy to a series of load and store ops if the size operand falls
3192 // below a certain threshold.
3193 std::vector<EVT> MemOps;
3194 uint64_t Limit = -1ULL;
3196 Limit = TLI.getMaxStoresPerMemcpy();
3197 unsigned DstAlign = Align; // Destination alignment can change.
3200 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3201 Str, CopyFromStr, DAG, TLI))
3205 bool isZeroStr = CopyFromStr && Str.empty();
3206 SmallVector<SDValue, 8> OutChains;
3207 unsigned NumMemOps = MemOps.size();
3208 uint64_t SrcOff = 0, DstOff = 0;
3209 for (unsigned i = 0; i < NumMemOps; i++) {
3211 unsigned VTSize = VT.getSizeInBits() / 8;
3212 SDValue Value, Store;
3214 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3215 // It's unlikely a store of a vector immediate can be done in a single
3216 // instruction. It would require a load from a constantpool first.
3217 // We also handle store a vector with all zero's.
3218 // FIXME: Handle other cases where store of vector immediate is done in
3219 // a single instruction.
3220 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3221 Store = DAG.getStore(Chain, dl, Value,
3222 getMemBasePlusOffset(Dst, DstOff, DAG),
3223 DstSV, DstSVOff + DstOff, false, DstAlign);
3225 // The type might not be legal for the target. This should only happen
3226 // if the type is smaller than a legal type, as on PPC, so the right
3227 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3228 // to Load/Store if NVT==VT.
3229 // FIXME does the case above also need this?
3230 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3231 assert(NVT.bitsGE(VT));
3232 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3233 getMemBasePlusOffset(Src, SrcOff, DAG),
3234 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3235 Store = DAG.getTruncStore(Chain, dl, Value,
3236 getMemBasePlusOffset(Dst, DstOff, DAG),
3237 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3239 OutChains.push_back(Store);
3244 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3245 &OutChains[0], OutChains.size());
3248 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3249 SDValue Chain, SDValue Dst,
3250 SDValue Src, uint64_t Size,
3251 unsigned Align, bool AlwaysInline,
3252 const Value *DstSV, uint64_t DstSVOff,
3253 const Value *SrcSV, uint64_t SrcSVOff){
3254 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3256 // Expand memmove to a series of load and store ops if the size operand falls
3257 // below a certain threshold.
3258 std::vector<EVT> MemOps;
3259 uint64_t Limit = -1ULL;
3261 Limit = TLI.getMaxStoresPerMemmove();
3262 unsigned DstAlign = Align; // Destination alignment can change.
3265 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3266 Str, CopyFromStr, DAG, TLI))
3269 uint64_t SrcOff = 0, DstOff = 0;
3271 SmallVector<SDValue, 8> LoadValues;
3272 SmallVector<SDValue, 8> LoadChains;
3273 SmallVector<SDValue, 8> OutChains;
3274 unsigned NumMemOps = MemOps.size();
3275 for (unsigned i = 0; i < NumMemOps; i++) {
3277 unsigned VTSize = VT.getSizeInBits() / 8;
3278 SDValue Value, Store;
3280 Value = DAG.getLoad(VT, dl, Chain,
3281 getMemBasePlusOffset(Src, SrcOff, DAG),
3282 SrcSV, SrcSVOff + SrcOff, false, Align);
3283 LoadValues.push_back(Value);
3284 LoadChains.push_back(Value.getValue(1));
3287 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3288 &LoadChains[0], LoadChains.size());
3290 for (unsigned i = 0; i < NumMemOps; i++) {
3292 unsigned VTSize = VT.getSizeInBits() / 8;
3293 SDValue Value, Store;
3295 Store = DAG.getStore(Chain, dl, LoadValues[i],
3296 getMemBasePlusOffset(Dst, DstOff, DAG),
3297 DstSV, DstSVOff + DstOff, false, DstAlign);
3298 OutChains.push_back(Store);
3302 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3303 &OutChains[0], OutChains.size());
3306 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3307 SDValue Chain, SDValue Dst,
3308 SDValue Src, uint64_t Size,
3310 const Value *DstSV, uint64_t DstSVOff) {
3311 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3313 // Expand memset to a series of load/store ops if the size operand
3314 // falls below a certain threshold.
3315 std::vector<EVT> MemOps;
3318 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3319 Size, Align, Str, CopyFromStr, DAG, TLI))
3322 SmallVector<SDValue, 8> OutChains;
3323 uint64_t DstOff = 0;
3325 unsigned NumMemOps = MemOps.size();
3326 for (unsigned i = 0; i < NumMemOps; i++) {
3328 unsigned VTSize = VT.getSizeInBits() / 8;
3329 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3330 SDValue Store = DAG.getStore(Chain, dl, Value,
3331 getMemBasePlusOffset(Dst, DstOff, DAG),
3332 DstSV, DstSVOff + DstOff);
3333 OutChains.push_back(Store);
3337 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3338 &OutChains[0], OutChains.size());
3341 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3342 SDValue Src, SDValue Size,
3343 unsigned Align, bool AlwaysInline,
3344 const Value *DstSV, uint64_t DstSVOff,
3345 const Value *SrcSV, uint64_t SrcSVOff) {
3347 // Check to see if we should lower the memcpy to loads and stores first.
3348 // For cases within the target-specified limits, this is the best choice.
3349 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3351 // Memcpy with size zero? Just return the original chain.
3352 if (ConstantSize->isNullValue())
3356 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3357 ConstantSize->getZExtValue(),
3358 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3359 if (Result.getNode())
3363 // Then check to see if we should lower the memcpy with target-specific
3364 // code. If the target chooses to do this, this is the next best.
3366 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3368 DstSV, DstSVOff, SrcSV, SrcSVOff);
3369 if (Result.getNode())
3372 // If we really need inline code and the target declined to provide it,
3373 // use a (potentially long) sequence of loads and stores.
3375 assert(ConstantSize && "AlwaysInline requires a constant size!");
3376 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3377 ConstantSize->getZExtValue(), Align, true,
3378 DstSV, DstSVOff, SrcSV, SrcSVOff);
3381 // Emit a library call.
3382 TargetLowering::ArgListTy Args;
3383 TargetLowering::ArgListEntry Entry;
3384 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3385 Entry.Node = Dst; Args.push_back(Entry);
3386 Entry.Node = Src; Args.push_back(Entry);
3387 Entry.Node = Size; Args.push_back(Entry);
3388 // FIXME: pass in DebugLoc
3389 std::pair<SDValue,SDValue> CallResult =
3390 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3391 false, false, false, false, 0,
3392 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3393 /*isReturnValueUsed=*/false,
3394 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3395 TLI.getPointerTy()),
3397 return CallResult.second;
3400 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3401 SDValue Src, SDValue Size,
3403 const Value *DstSV, uint64_t DstSVOff,
3404 const Value *SrcSV, uint64_t SrcSVOff) {
3406 // Check to see if we should lower the memmove to loads and stores first.
3407 // For cases within the target-specified limits, this is the best choice.
3408 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3410 // Memmove with size zero? Just return the original chain.
3411 if (ConstantSize->isNullValue())
3415 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3416 ConstantSize->getZExtValue(),
3417 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3418 if (Result.getNode())
3422 // Then check to see if we should lower the memmove with target-specific
3423 // code. If the target chooses to do this, this is the next best.
3425 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3426 DstSV, DstSVOff, SrcSV, SrcSVOff);
3427 if (Result.getNode())
3430 // Emit a library call.
3431 TargetLowering::ArgListTy Args;
3432 TargetLowering::ArgListEntry Entry;
3433 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3434 Entry.Node = Dst; Args.push_back(Entry);
3435 Entry.Node = Src; Args.push_back(Entry);
3436 Entry.Node = Size; Args.push_back(Entry);
3437 // FIXME: pass in DebugLoc
3438 std::pair<SDValue,SDValue> CallResult =
3439 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3440 false, false, false, false, 0,
3441 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3442 /*isReturnValueUsed=*/false,
3443 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3444 TLI.getPointerTy()),
3446 return CallResult.second;
3449 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3450 SDValue Src, SDValue Size,
3452 const Value *DstSV, uint64_t DstSVOff) {
3454 // Check to see if we should lower the memset to stores first.
3455 // For cases within the target-specified limits, this is the best choice.
3456 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3458 // Memset with size zero? Just return the original chain.
3459 if (ConstantSize->isNullValue())
3463 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3464 Align, DstSV, DstSVOff);
3465 if (Result.getNode())
3469 // Then check to see if we should lower the memset with target-specific
3470 // code. If the target chooses to do this, this is the next best.
3472 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3474 if (Result.getNode())
3477 // Emit a library call.
3478 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3479 TargetLowering::ArgListTy Args;
3480 TargetLowering::ArgListEntry Entry;
3481 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3482 Args.push_back(Entry);
3483 // Extend or truncate the argument to be an i32 value for the call.
3484 if (Src.getValueType().bitsGT(MVT::i32))
3485 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3487 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3489 Entry.Ty = Type::getInt32Ty(*getContext());
3490 Entry.isSExt = true;
3491 Args.push_back(Entry);
3493 Entry.Ty = IntPtrTy;
3494 Entry.isSExt = false;
3495 Args.push_back(Entry);
3496 // FIXME: pass in DebugLoc
3497 std::pair<SDValue,SDValue> CallResult =
3498 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3499 false, false, false, false, 0,
3500 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3501 /*isReturnValueUsed=*/false,
3502 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3503 TLI.getPointerTy()),
3505 return CallResult.second;
3508 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3510 SDValue Ptr, SDValue Cmp,
3511 SDValue Swp, const Value* PtrVal,
3512 unsigned Alignment) {
3513 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3514 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3516 EVT VT = Cmp.getValueType();
3518 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3519 Alignment = getEVTAlignment(MemVT);
3521 SDVTList VTs = getVTList(VT, MVT::Other);
3522 FoldingSetNodeID ID;
3523 ID.AddInteger(MemVT.getRawBits());
3524 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3525 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3528 return SDValue(E, 0);
3529 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3530 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3531 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3532 CSEMap.InsertNode(N, IP);
3533 AllNodes.push_back(N);
3534 return SDValue(N, 0);
3537 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3539 SDValue Ptr, SDValue Val,
3540 const Value* PtrVal,
3541 unsigned Alignment) {
3542 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3543 Opcode == ISD::ATOMIC_LOAD_SUB ||
3544 Opcode == ISD::ATOMIC_LOAD_AND ||
3545 Opcode == ISD::ATOMIC_LOAD_OR ||
3546 Opcode == ISD::ATOMIC_LOAD_XOR ||
3547 Opcode == ISD::ATOMIC_LOAD_NAND ||
3548 Opcode == ISD::ATOMIC_LOAD_MIN ||
3549 Opcode == ISD::ATOMIC_LOAD_MAX ||
3550 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3551 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3552 Opcode == ISD::ATOMIC_SWAP) &&
3553 "Invalid Atomic Op");
3555 EVT VT = Val.getValueType();
3557 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3558 Alignment = getEVTAlignment(MemVT);
3560 SDVTList VTs = getVTList(VT, MVT::Other);
3561 FoldingSetNodeID ID;
3562 ID.AddInteger(MemVT.getRawBits());
3563 SDValue Ops[] = {Chain, Ptr, Val};
3564 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3566 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3567 return SDValue(E, 0);
3568 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3569 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3570 Chain, Ptr, Val, PtrVal, Alignment);
3571 CSEMap.InsertNode(N, IP);
3572 AllNodes.push_back(N);
3573 return SDValue(N, 0);
3576 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3577 /// Allowed to return something different (and simpler) if Simplify is true.
3578 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3583 SmallVector<EVT, 4> VTs;
3584 VTs.reserve(NumOps);
3585 for (unsigned i = 0; i < NumOps; ++i)
3586 VTs.push_back(Ops[i].getValueType());
3587 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3592 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3593 const EVT *VTs, unsigned NumVTs,
3594 const SDValue *Ops, unsigned NumOps,
3595 EVT MemVT, const Value *srcValue, int SVOff,
3596 unsigned Align, bool Vol,
3597 bool ReadMem, bool WriteMem) {
3598 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3599 MemVT, srcValue, SVOff, Align, Vol,
3604 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3605 const SDValue *Ops, unsigned NumOps,
3606 EVT MemVT, const Value *srcValue, int SVOff,
3607 unsigned Align, bool Vol,
3608 bool ReadMem, bool WriteMem) {
3609 // Memoize the node unless it returns a flag.
3610 MemIntrinsicSDNode *N;
3611 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3612 FoldingSetNodeID ID;
3613 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3615 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3616 return SDValue(E, 0);
3618 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3619 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3620 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3621 CSEMap.InsertNode(N, IP);
3623 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3624 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3625 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3627 AllNodes.push_back(N);
3628 return SDValue(N, 0);
3632 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3633 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3634 SDValue Ptr, SDValue Offset,
3635 const Value *SV, int SVOffset, EVT EVT,
3636 bool isVolatile, unsigned Alignment) {
3637 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3638 Alignment = getEVTAlignment(VT);
3641 ExtType = ISD::NON_EXTLOAD;
3642 } else if (ExtType == ISD::NON_EXTLOAD) {
3643 assert(VT == EVT && "Non-extending load from different memory type!");
3647 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3648 "Invalid vector extload!");
3650 assert(EVT.bitsLT(VT) &&
3651 "Should only be an extending load, not truncating!");
3652 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3653 "Cannot sign/zero extend a FP/Vector load!");
3654 assert(VT.isInteger() == EVT.isInteger() &&
3655 "Cannot convert from FP to Int or Int -> FP!");
3658 bool Indexed = AM != ISD::UNINDEXED;
3659 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3660 "Unindexed load with an offset!");
3662 SDVTList VTs = Indexed ?
3663 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3664 SDValue Ops[] = { Chain, Ptr, Offset };
3665 FoldingSetNodeID ID;
3666 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3667 ID.AddInteger(EVT.getRawBits());
3668 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3670 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3671 return SDValue(E, 0);
3672 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3673 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3674 Alignment, isVolatile);
3675 CSEMap.InsertNode(N, IP);
3676 AllNodes.push_back(N);
3677 return SDValue(N, 0);
3680 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3681 SDValue Chain, SDValue Ptr,
3682 const Value *SV, int SVOffset,
3683 bool isVolatile, unsigned Alignment) {
3684 SDValue Undef = getUNDEF(Ptr.getValueType());
3685 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3686 SV, SVOffset, VT, isVolatile, Alignment);
3689 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3690 SDValue Chain, SDValue Ptr,
3692 int SVOffset, EVT EVT,
3693 bool isVolatile, unsigned Alignment) {
3694 SDValue Undef = getUNDEF(Ptr.getValueType());
3695 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3696 SV, SVOffset, EVT, isVolatile, Alignment);
3700 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3701 SDValue Offset, ISD::MemIndexedMode AM) {
3702 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3703 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3704 "Load is already a indexed load!");
3705 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3706 LD->getChain(), Base, Offset, LD->getSrcValue(),
3707 LD->getSrcValueOffset(), LD->getMemoryVT(),
3708 LD->isVolatile(), LD->getAlignment());
3711 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3712 SDValue Ptr, const Value *SV, int SVOffset,
3713 bool isVolatile, unsigned Alignment) {
3714 EVT VT = Val.getValueType();
3716 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3717 Alignment = getEVTAlignment(VT);
3719 SDVTList VTs = getVTList(MVT::Other);
3720 SDValue Undef = getUNDEF(Ptr.getValueType());
3721 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3722 FoldingSetNodeID ID;
3723 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3724 ID.AddInteger(VT.getRawBits());
3725 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3726 isVolatile, Alignment));
3728 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3729 return SDValue(E, 0);
3730 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3731 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3732 VT, SV, SVOffset, Alignment, isVolatile);
3733 CSEMap.InsertNode(N, IP);
3734 AllNodes.push_back(N);
3735 return SDValue(N, 0);
3738 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3739 SDValue Ptr, const Value *SV,
3740 int SVOffset, EVT SVT,
3741 bool isVolatile, unsigned Alignment) {
3742 EVT VT = Val.getValueType();
3745 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3747 assert(VT.bitsGT(SVT) && "Not a truncation?");
3748 assert(VT.isInteger() == SVT.isInteger() &&
3749 "Can't do FP-INT conversion!");
3751 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3752 Alignment = getEVTAlignment(VT);
3754 SDVTList VTs = getVTList(MVT::Other);
3755 SDValue Undef = getUNDEF(Ptr.getValueType());
3756 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3757 FoldingSetNodeID ID;
3758 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3759 ID.AddInteger(SVT.getRawBits());
3760 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3761 isVolatile, Alignment));
3763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3764 return SDValue(E, 0);
3765 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3766 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3767 SVT, SV, SVOffset, Alignment, isVolatile);
3768 CSEMap.InsertNode(N, IP);
3769 AllNodes.push_back(N);
3770 return SDValue(N, 0);
3774 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3775 SDValue Offset, ISD::MemIndexedMode AM) {
3776 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3777 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3778 "Store is already a indexed store!");
3779 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3780 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3781 FoldingSetNodeID ID;
3782 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3783 ID.AddInteger(ST->getMemoryVT().getRawBits());
3784 ID.AddInteger(ST->getRawSubclassData());
3786 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3787 return SDValue(E, 0);
3788 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3789 new (N) StoreSDNode(Ops, dl, VTs, AM,
3790 ST->isTruncatingStore(), ST->getMemoryVT(),
3791 ST->getSrcValue(), ST->getSrcValueOffset(),
3792 ST->getAlignment(), ST->isVolatile());
3793 CSEMap.InsertNode(N, IP);
3794 AllNodes.push_back(N);
3795 return SDValue(N, 0);
3798 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
3799 SDValue Chain, SDValue Ptr,
3801 SDValue Ops[] = { Chain, Ptr, SV };
3802 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3805 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3806 const SDUse *Ops, unsigned NumOps) {
3808 case 0: return getNode(Opcode, DL, VT);
3809 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3810 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3811 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3815 // Copy from an SDUse array into an SDValue array for use with
3816 // the regular getNode logic.
3817 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3818 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3821 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3822 const SDValue *Ops, unsigned NumOps) {
3824 case 0: return getNode(Opcode, DL, VT);
3825 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3826 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3827 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3833 case ISD::SELECT_CC: {
3834 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3835 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3836 "LHS and RHS of condition must have same type!");
3837 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3838 "True and False arms of SelectCC must have same type!");
3839 assert(Ops[2].getValueType() == VT &&
3840 "select_cc node must be of same type as true and false value!");
3844 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3845 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3846 "LHS/RHS of comparison should match types!");
3853 SDVTList VTs = getVTList(VT);
3855 if (VT != MVT::Flag) {
3856 FoldingSetNodeID ID;
3857 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3860 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3861 return SDValue(E, 0);
3863 N = NodeAllocator.Allocate<SDNode>();
3864 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3865 CSEMap.InsertNode(N, IP);
3867 N = NodeAllocator.Allocate<SDNode>();
3868 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3871 AllNodes.push_back(N);
3875 return SDValue(N, 0);
3878 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3879 const std::vector<EVT> &ResultTys,
3880 const SDValue *Ops, unsigned NumOps) {
3881 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3885 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3886 const EVT *VTs, unsigned NumVTs,
3887 const SDValue *Ops, unsigned NumOps) {
3889 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3890 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3893 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3894 const SDValue *Ops, unsigned NumOps) {
3895 if (VTList.NumVTs == 1)
3896 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3900 // FIXME: figure out how to safely handle things like
3901 // int foo(int x) { return 1 << (x & 255); }
3902 // int bar() { return foo(256); }
3903 case ISD::SRA_PARTS:
3904 case ISD::SRL_PARTS:
3905 case ISD::SHL_PARTS:
3906 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3907 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3908 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3909 else if (N3.getOpcode() == ISD::AND)
3910 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3911 // If the and is only masking out bits that cannot effect the shift,
3912 // eliminate the and.
3913 unsigned NumBits = VT.getSizeInBits()*2;
3914 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3915 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3921 // Memoize the node unless it returns a flag.
3923 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3924 FoldingSetNodeID ID;
3925 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3927 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3928 return SDValue(E, 0);
3930 N = NodeAllocator.Allocate<UnarySDNode>();
3931 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3932 } else if (NumOps == 2) {
3933 N = NodeAllocator.Allocate<BinarySDNode>();
3934 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3935 } else if (NumOps == 3) {
3936 N = NodeAllocator.Allocate<TernarySDNode>();
3937 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3939 N = NodeAllocator.Allocate<SDNode>();
3940 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3942 CSEMap.InsertNode(N, IP);
3945 N = NodeAllocator.Allocate<UnarySDNode>();
3946 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3947 } else if (NumOps == 2) {
3948 N = NodeAllocator.Allocate<BinarySDNode>();
3949 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3950 } else if (NumOps == 3) {
3951 N = NodeAllocator.Allocate<TernarySDNode>();
3952 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3954 N = NodeAllocator.Allocate<SDNode>();
3955 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3958 AllNodes.push_back(N);
3962 return SDValue(N, 0);
3965 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3966 return getNode(Opcode, DL, VTList, 0, 0);
3969 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3971 SDValue Ops[] = { N1 };
3972 return getNode(Opcode, DL, VTList, Ops, 1);
3975 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3976 SDValue N1, SDValue N2) {
3977 SDValue Ops[] = { N1, N2 };
3978 return getNode(Opcode, DL, VTList, Ops, 2);
3981 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3982 SDValue N1, SDValue N2, SDValue N3) {
3983 SDValue Ops[] = { N1, N2, N3 };
3984 return getNode(Opcode, DL, VTList, Ops, 3);
3987 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3988 SDValue N1, SDValue N2, SDValue N3,
3990 SDValue Ops[] = { N1, N2, N3, N4 };
3991 return getNode(Opcode, DL, VTList, Ops, 4);
3994 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3995 SDValue N1, SDValue N2, SDValue N3,
3996 SDValue N4, SDValue N5) {
3997 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3998 return getNode(Opcode, DL, VTList, Ops, 5);
4001 SDVTList SelectionDAG::getVTList(EVT VT) {
4002 return makeVTList(SDNode::getValueTypeList(VT), 1);
4005 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4006 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4007 E = VTList.rend(); I != E; ++I)
4008 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4011 EVT *Array = Allocator.Allocate<EVT>(2);
4014 SDVTList Result = makeVTList(Array, 2);
4015 VTList.push_back(Result);
4019 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4020 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4021 E = VTList.rend(); I != E; ++I)
4022 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4026 EVT *Array = Allocator.Allocate<EVT>(3);
4030 SDVTList Result = makeVTList(Array, 3);
4031 VTList.push_back(Result);
4035 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4036 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4037 E = VTList.rend(); I != E; ++I)
4038 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4039 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4042 EVT *Array = Allocator.Allocate<EVT>(3);
4047 SDVTList Result = makeVTList(Array, 4);
4048 VTList.push_back(Result);
4052 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4054 case 0: llvm_unreachable("Cannot have nodes without results!");
4055 case 1: return getVTList(VTs[0]);
4056 case 2: return getVTList(VTs[0], VTs[1]);
4057 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4061 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4062 E = VTList.rend(); I != E; ++I) {
4063 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4066 bool NoMatch = false;
4067 for (unsigned i = 2; i != NumVTs; ++i)
4068 if (VTs[i] != I->VTs[i]) {
4076 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4077 std::copy(VTs, VTs+NumVTs, Array);
4078 SDVTList Result = makeVTList(Array, NumVTs);
4079 VTList.push_back(Result);
4084 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4085 /// specified operands. If the resultant node already exists in the DAG,
4086 /// this does not modify the specified node, instead it returns the node that
4087 /// already exists. If the resultant node does not exist in the DAG, the
4088 /// input node is returned. As a degenerate case, if you specify the same
4089 /// input operands as the node already has, the input node is returned.
4090 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4091 SDNode *N = InN.getNode();
4092 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4094 // Check to see if there is no change.
4095 if (Op == N->getOperand(0)) return InN;
4097 // See if the modified node already exists.
4098 void *InsertPos = 0;
4099 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4100 return SDValue(Existing, InN.getResNo());
4102 // Nope it doesn't. Remove the node from its current place in the maps.
4104 if (!RemoveNodeFromCSEMaps(N))
4107 // Now we update the operands.
4108 N->OperandList[0].set(Op);
4110 // If this gets put into a CSE map, add it.
4111 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4115 SDValue SelectionDAG::
4116 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4117 SDNode *N = InN.getNode();
4118 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4120 // Check to see if there is no change.
4121 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4122 return InN; // No operands changed, just return the input node.
4124 // See if the modified node already exists.
4125 void *InsertPos = 0;
4126 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4127 return SDValue(Existing, InN.getResNo());
4129 // Nope it doesn't. Remove the node from its current place in the maps.
4131 if (!RemoveNodeFromCSEMaps(N))
4134 // Now we update the operands.
4135 if (N->OperandList[0] != Op1)
4136 N->OperandList[0].set(Op1);
4137 if (N->OperandList[1] != Op2)
4138 N->OperandList[1].set(Op2);
4140 // If this gets put into a CSE map, add it.
4141 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4145 SDValue SelectionDAG::
4146 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4147 SDValue Ops[] = { Op1, Op2, Op3 };
4148 return UpdateNodeOperands(N, Ops, 3);
4151 SDValue SelectionDAG::
4152 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4153 SDValue Op3, SDValue Op4) {
4154 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4155 return UpdateNodeOperands(N, Ops, 4);
4158 SDValue SelectionDAG::
4159 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4160 SDValue Op3, SDValue Op4, SDValue Op5) {
4161 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4162 return UpdateNodeOperands(N, Ops, 5);
4165 SDValue SelectionDAG::
4166 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4167 SDNode *N = InN.getNode();
4168 assert(N->getNumOperands() == NumOps &&
4169 "Update with wrong number of operands");
4171 // Check to see if there is no change.
4172 bool AnyChange = false;
4173 for (unsigned i = 0; i != NumOps; ++i) {
4174 if (Ops[i] != N->getOperand(i)) {
4180 // No operands changed, just return the input node.
4181 if (!AnyChange) return InN;
4183 // See if the modified node already exists.
4184 void *InsertPos = 0;
4185 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4186 return SDValue(Existing, InN.getResNo());
4188 // Nope it doesn't. Remove the node from its current place in the maps.
4190 if (!RemoveNodeFromCSEMaps(N))
4193 // Now we update the operands.
4194 for (unsigned i = 0; i != NumOps; ++i)
4195 if (N->OperandList[i] != Ops[i])
4196 N->OperandList[i].set(Ops[i]);
4198 // If this gets put into a CSE map, add it.
4199 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4203 /// DropOperands - Release the operands and set this node to have
4205 void SDNode::DropOperands() {
4206 // Unlike the code in MorphNodeTo that does this, we don't need to
4207 // watch for dead nodes here.
4208 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4214 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4217 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4219 SDVTList VTs = getVTList(VT);
4220 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4223 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4224 EVT VT, SDValue Op1) {
4225 SDVTList VTs = getVTList(VT);
4226 SDValue Ops[] = { Op1 };
4227 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4230 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4231 EVT VT, SDValue Op1,
4233 SDVTList VTs = getVTList(VT);
4234 SDValue Ops[] = { Op1, Op2 };
4235 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4238 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4239 EVT VT, SDValue Op1,
4240 SDValue Op2, SDValue Op3) {
4241 SDVTList VTs = getVTList(VT);
4242 SDValue Ops[] = { Op1, Op2, Op3 };
4243 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4246 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4247 EVT VT, const SDValue *Ops,
4249 SDVTList VTs = getVTList(VT);
4250 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4253 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4254 EVT VT1, EVT VT2, const SDValue *Ops,
4256 SDVTList VTs = getVTList(VT1, VT2);
4257 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4260 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4262 SDVTList VTs = getVTList(VT1, VT2);
4263 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4266 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4267 EVT VT1, EVT VT2, EVT VT3,
4268 const SDValue *Ops, unsigned NumOps) {
4269 SDVTList VTs = getVTList(VT1, VT2, VT3);
4270 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4273 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4274 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4275 const SDValue *Ops, unsigned NumOps) {
4276 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4277 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4280 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4283 SDVTList VTs = getVTList(VT1, VT2);
4284 SDValue Ops[] = { Op1 };
4285 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4288 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4290 SDValue Op1, SDValue Op2) {
4291 SDVTList VTs = getVTList(VT1, VT2);
4292 SDValue Ops[] = { Op1, Op2 };
4293 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4296 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4298 SDValue Op1, SDValue Op2,
4300 SDVTList VTs = getVTList(VT1, VT2);
4301 SDValue Ops[] = { Op1, Op2, Op3 };
4302 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4305 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4306 EVT VT1, EVT VT2, EVT VT3,
4307 SDValue Op1, SDValue Op2,
4309 SDVTList VTs = getVTList(VT1, VT2, VT3);
4310 SDValue Ops[] = { Op1, Op2, Op3 };
4311 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4314 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4315 SDVTList VTs, const SDValue *Ops,
4317 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4320 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4322 SDVTList VTs = getVTList(VT);
4323 return MorphNodeTo(N, Opc, VTs, 0, 0);
4326 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4327 EVT VT, SDValue Op1) {
4328 SDVTList VTs = getVTList(VT);
4329 SDValue Ops[] = { Op1 };
4330 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4333 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4334 EVT VT, SDValue Op1,
4336 SDVTList VTs = getVTList(VT);
4337 SDValue Ops[] = { Op1, Op2 };
4338 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4341 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4342 EVT VT, SDValue Op1,
4343 SDValue Op2, SDValue Op3) {
4344 SDVTList VTs = getVTList(VT);
4345 SDValue Ops[] = { Op1, Op2, Op3 };
4346 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4349 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4350 EVT VT, const SDValue *Ops,
4352 SDVTList VTs = getVTList(VT);
4353 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4356 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4357 EVT VT1, EVT VT2, const SDValue *Ops,
4359 SDVTList VTs = getVTList(VT1, VT2);
4360 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4363 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4365 SDVTList VTs = getVTList(VT1, VT2);
4366 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4369 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4370 EVT VT1, EVT VT2, EVT VT3,
4371 const SDValue *Ops, unsigned NumOps) {
4372 SDVTList VTs = getVTList(VT1, VT2, VT3);
4373 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4376 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4379 SDVTList VTs = getVTList(VT1, VT2);
4380 SDValue Ops[] = { Op1 };
4381 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4384 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4386 SDValue Op1, SDValue Op2) {
4387 SDVTList VTs = getVTList(VT1, VT2);
4388 SDValue Ops[] = { Op1, Op2 };
4389 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4392 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4394 SDValue Op1, SDValue Op2,
4396 SDVTList VTs = getVTList(VT1, VT2);
4397 SDValue Ops[] = { Op1, Op2, Op3 };
4398 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4401 /// MorphNodeTo - These *mutate* the specified node to have the specified
4402 /// return type, opcode, and operands.
4404 /// Note that MorphNodeTo returns the resultant node. If there is already a
4405 /// node of the specified opcode and operands, it returns that node instead of
4406 /// the current one. Note that the DebugLoc need not be the same.
4408 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4409 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4410 /// node, and because it doesn't require CSE recalculation for any of
4411 /// the node's users.
4413 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4414 SDVTList VTs, const SDValue *Ops,
4416 // If an identical node already exists, use it.
4418 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4419 FoldingSetNodeID ID;
4420 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4421 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4425 if (!RemoveNodeFromCSEMaps(N))
4428 // Start the morphing.
4430 N->ValueList = VTs.VTs;
4431 N->NumValues = VTs.NumVTs;
4433 // Clear the operands list, updating used nodes to remove this from their
4434 // use list. Keep track of any operands that become dead as a result.
4435 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4436 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4438 SDNode *Used = Use.getNode();
4440 if (Used->use_empty())
4441 DeadNodeSet.insert(Used);
4444 // If NumOps is larger than the # of operands we currently have, reallocate
4445 // the operand list.
4446 if (NumOps > N->NumOperands) {
4447 if (N->OperandsNeedDelete)
4448 delete[] N->OperandList;
4450 if (N->isMachineOpcode()) {
4451 // We're creating a final node that will live unmorphed for the
4452 // remainder of the current SelectionDAG iteration, so we can allocate
4453 // the operands directly out of a pool with no recycling metadata.
4454 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4455 N->OperandsNeedDelete = false;
4457 N->OperandList = new SDUse[NumOps];
4458 N->OperandsNeedDelete = true;
4462 // Assign the new operands.
4463 N->NumOperands = NumOps;
4464 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4465 N->OperandList[i].setUser(N);
4466 N->OperandList[i].setInitial(Ops[i]);
4469 // Delete any nodes that are still dead after adding the uses for the
4471 SmallVector<SDNode *, 16> DeadNodes;
4472 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4473 E = DeadNodeSet.end(); I != E; ++I)
4474 if ((*I)->use_empty())
4475 DeadNodes.push_back(*I);
4476 RemoveDeadNodes(DeadNodes);
4479 CSEMap.InsertNode(N, IP); // Memoize the new node.
4484 /// getTargetNode - These are used for target selectors to create a new node
4485 /// with specified return type(s), target opcode, and operands.
4487 /// Note that getTargetNode returns the resultant node. If there is already a
4488 /// node of the specified opcode and operands, it returns that node instead of
4489 /// the current one.
4490 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4491 return getNode(~Opcode, dl, VT).getNode();
4494 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4496 return getNode(~Opcode, dl, VT, Op1).getNode();
4499 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4500 SDValue Op1, SDValue Op2) {
4501 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4504 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4505 SDValue Op1, SDValue Op2,
4507 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4510 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4511 const SDValue *Ops, unsigned NumOps) {
4512 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4515 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4517 SDVTList VTs = getVTList(VT1, VT2);
4519 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4522 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4523 EVT VT2, SDValue Op1) {
4524 SDVTList VTs = getVTList(VT1, VT2);
4525 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4528 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4529 EVT VT2, SDValue Op1,
4531 SDVTList VTs = getVTList(VT1, VT2);
4532 SDValue Ops[] = { Op1, Op2 };
4533 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4536 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4537 EVT VT2, SDValue Op1,
4538 SDValue Op2, SDValue Op3) {
4539 SDVTList VTs = getVTList(VT1, VT2);
4540 SDValue Ops[] = { Op1, Op2, Op3 };
4541 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4544 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4546 const SDValue *Ops, unsigned NumOps) {
4547 SDVTList VTs = getVTList(VT1, VT2);
4548 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4551 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4552 EVT VT1, EVT VT2, EVT VT3,
4553 SDValue Op1, SDValue Op2) {
4554 SDVTList VTs = getVTList(VT1, VT2, VT3);
4555 SDValue Ops[] = { Op1, Op2 };
4556 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4559 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4560 EVT VT1, EVT VT2, EVT VT3,
4561 SDValue Op1, SDValue Op2,
4563 SDVTList VTs = getVTList(VT1, VT2, VT3);
4564 SDValue Ops[] = { Op1, Op2, Op3 };
4565 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4568 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4569 EVT VT1, EVT VT2, EVT VT3,
4570 const SDValue *Ops, unsigned NumOps) {
4571 SDVTList VTs = getVTList(VT1, VT2, VT3);
4572 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4575 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4576 EVT VT2, EVT VT3, EVT VT4,
4577 const SDValue *Ops, unsigned NumOps) {
4578 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4579 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4582 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4583 const std::vector<EVT> &ResultTys,
4584 const SDValue *Ops, unsigned NumOps) {
4585 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4588 /// getTargetExtractSubreg - A convenience function for creating
4589 /// TargetInstrInfo::EXTRACT_SUBREG nodes.
4591 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4593 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4594 SDNode *Subreg = getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, DL,
4595 VT, Operand, SRIdxVal);
4596 return SDValue(Subreg, 0);
4599 /// getNodeIfExists - Get the specified node if it's already available, or
4600 /// else return NULL.
4601 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4602 const SDValue *Ops, unsigned NumOps) {
4603 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4604 FoldingSetNodeID ID;
4605 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4607 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4613 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4614 /// This can cause recursive merging of nodes in the DAG.
4616 /// This version assumes From has a single result value.
4618 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4619 DAGUpdateListener *UpdateListener) {
4620 SDNode *From = FromN.getNode();
4621 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4622 "Cannot replace with this method!");
4623 assert(From != To.getNode() && "Cannot replace uses of with self");
4625 // Iterate over all the existing uses of From. New uses will be added
4626 // to the beginning of the use list, which we avoid visiting.
4627 // This specifically avoids visiting uses of From that arise while the
4628 // replacement is happening, because any such uses would be the result
4629 // of CSE: If an existing node looks like From after one of its operands
4630 // is replaced by To, we don't want to replace of all its users with To
4631 // too. See PR3018 for more info.
4632 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4636 // This node is about to morph, remove its old self from the CSE maps.
4637 RemoveNodeFromCSEMaps(User);
4639 // A user can appear in a use list multiple times, and when this
4640 // happens the uses are usually next to each other in the list.
4641 // To help reduce the number of CSE recomputations, process all
4642 // the uses of this user that we can find this way.
4644 SDUse &Use = UI.getUse();
4647 } while (UI != UE && *UI == User);
4649 // Now that we have modified User, add it back to the CSE maps. If it
4650 // already exists there, recursively merge the results together.
4651 AddModifiedNodeToCSEMaps(User, UpdateListener);
4655 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4656 /// This can cause recursive merging of nodes in the DAG.
4658 /// This version assumes that for each value of From, there is a
4659 /// corresponding value in To in the same position with the same type.
4661 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4662 DAGUpdateListener *UpdateListener) {
4664 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4665 assert((!From->hasAnyUseOfValue(i) ||
4666 From->getValueType(i) == To->getValueType(i)) &&
4667 "Cannot use this version of ReplaceAllUsesWith!");
4670 // Handle the trivial case.
4674 // Iterate over just the existing users of From. See the comments in
4675 // the ReplaceAllUsesWith above.
4676 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4680 // This node is about to morph, remove its old self from the CSE maps.
4681 RemoveNodeFromCSEMaps(User);
4683 // A user can appear in a use list multiple times, and when this
4684 // happens the uses are usually next to each other in the list.
4685 // To help reduce the number of CSE recomputations, process all
4686 // the uses of this user that we can find this way.
4688 SDUse &Use = UI.getUse();
4691 } while (UI != UE && *UI == User);
4693 // Now that we have modified User, add it back to the CSE maps. If it
4694 // already exists there, recursively merge the results together.
4695 AddModifiedNodeToCSEMaps(User, UpdateListener);
4699 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4700 /// This can cause recursive merging of nodes in the DAG.
4702 /// This version can replace From with any result values. To must match the
4703 /// number and types of values returned by From.
4704 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4706 DAGUpdateListener *UpdateListener) {
4707 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4708 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4710 // Iterate over just the existing users of From. See the comments in
4711 // the ReplaceAllUsesWith above.
4712 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4716 // This node is about to morph, remove its old self from the CSE maps.
4717 RemoveNodeFromCSEMaps(User);
4719 // A user can appear in a use list multiple times, and when this
4720 // happens the uses are usually next to each other in the list.
4721 // To help reduce the number of CSE recomputations, process all
4722 // the uses of this user that we can find this way.
4724 SDUse &Use = UI.getUse();
4725 const SDValue &ToOp = To[Use.getResNo()];
4728 } while (UI != UE && *UI == User);
4730 // Now that we have modified User, add it back to the CSE maps. If it
4731 // already exists there, recursively merge the results together.
4732 AddModifiedNodeToCSEMaps(User, UpdateListener);
4736 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4737 /// uses of other values produced by From.getNode() alone. The Deleted
4738 /// vector is handled the same way as for ReplaceAllUsesWith.
4739 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4740 DAGUpdateListener *UpdateListener){
4741 // Handle the really simple, really trivial case efficiently.
4742 if (From == To) return;
4744 // Handle the simple, trivial, case efficiently.
4745 if (From.getNode()->getNumValues() == 1) {
4746 ReplaceAllUsesWith(From, To, UpdateListener);
4750 // Iterate over just the existing users of From. See the comments in
4751 // the ReplaceAllUsesWith above.
4752 SDNode::use_iterator UI = From.getNode()->use_begin(),
4753 UE = From.getNode()->use_end();
4756 bool UserRemovedFromCSEMaps = false;
4758 // A user can appear in a use list multiple times, and when this
4759 // happens the uses are usually next to each other in the list.
4760 // To help reduce the number of CSE recomputations, process all
4761 // the uses of this user that we can find this way.
4763 SDUse &Use = UI.getUse();
4765 // Skip uses of different values from the same node.
4766 if (Use.getResNo() != From.getResNo()) {
4771 // If this node hasn't been modified yet, it's still in the CSE maps,
4772 // so remove its old self from the CSE maps.
4773 if (!UserRemovedFromCSEMaps) {
4774 RemoveNodeFromCSEMaps(User);
4775 UserRemovedFromCSEMaps = true;
4780 } while (UI != UE && *UI == User);
4782 // We are iterating over all uses of the From node, so if a use
4783 // doesn't use the specific value, no changes are made.
4784 if (!UserRemovedFromCSEMaps)
4787 // Now that we have modified User, add it back to the CSE maps. If it
4788 // already exists there, recursively merge the results together.
4789 AddModifiedNodeToCSEMaps(User, UpdateListener);
4794 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4795 /// to record information about a use.
4802 /// operator< - Sort Memos by User.
4803 bool operator<(const UseMemo &L, const UseMemo &R) {
4804 return (intptr_t)L.User < (intptr_t)R.User;
4808 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4809 /// uses of other values produced by From.getNode() alone. The same value
4810 /// may appear in both the From and To list. The Deleted vector is
4811 /// handled the same way as for ReplaceAllUsesWith.
4812 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4815 DAGUpdateListener *UpdateListener){
4816 // Handle the simple, trivial case efficiently.
4818 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4820 // Read up all the uses and make records of them. This helps
4821 // processing new uses that are introduced during the
4822 // replacement process.
4823 SmallVector<UseMemo, 4> Uses;
4824 for (unsigned i = 0; i != Num; ++i) {
4825 unsigned FromResNo = From[i].getResNo();
4826 SDNode *FromNode = From[i].getNode();
4827 for (SDNode::use_iterator UI = FromNode->use_begin(),
4828 E = FromNode->use_end(); UI != E; ++UI) {
4829 SDUse &Use = UI.getUse();
4830 if (Use.getResNo() == FromResNo) {
4831 UseMemo Memo = { *UI, i, &Use };
4832 Uses.push_back(Memo);
4837 // Sort the uses, so that all the uses from a given User are together.
4838 std::sort(Uses.begin(), Uses.end());
4840 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4841 UseIndex != UseIndexEnd; ) {
4842 // We know that this user uses some value of From. If it is the right
4843 // value, update it.
4844 SDNode *User = Uses[UseIndex].User;
4846 // This node is about to morph, remove its old self from the CSE maps.
4847 RemoveNodeFromCSEMaps(User);
4849 // The Uses array is sorted, so all the uses for a given User
4850 // are next to each other in the list.
4851 // To help reduce the number of CSE recomputations, process all
4852 // the uses of this user that we can find this way.
4854 unsigned i = Uses[UseIndex].Index;
4855 SDUse &Use = *Uses[UseIndex].Use;
4859 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4861 // Now that we have modified User, add it back to the CSE maps. If it
4862 // already exists there, recursively merge the results together.
4863 AddModifiedNodeToCSEMaps(User, UpdateListener);
4867 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4868 /// based on their topological order. It returns the maximum id and a vector
4869 /// of the SDNodes* in assigned order by reference.
4870 unsigned SelectionDAG::AssignTopologicalOrder() {
4872 unsigned DAGSize = 0;
4874 // SortedPos tracks the progress of the algorithm. Nodes before it are
4875 // sorted, nodes after it are unsorted. When the algorithm completes
4876 // it is at the end of the list.
4877 allnodes_iterator SortedPos = allnodes_begin();
4879 // Visit all the nodes. Move nodes with no operands to the front of
4880 // the list immediately. Annotate nodes that do have operands with their
4881 // operand count. Before we do this, the Node Id fields of the nodes
4882 // may contain arbitrary values. After, the Node Id fields for nodes
4883 // before SortedPos will contain the topological sort index, and the
4884 // Node Id fields for nodes At SortedPos and after will contain the
4885 // count of outstanding operands.
4886 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4888 unsigned Degree = N->getNumOperands();
4890 // A node with no uses, add it to the result array immediately.
4891 N->setNodeId(DAGSize++);
4892 allnodes_iterator Q = N;
4894 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4897 // Temporarily use the Node Id as scratch space for the degree count.
4898 N->setNodeId(Degree);
4902 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4903 // such that by the time the end is reached all nodes will be sorted.
4904 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4906 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4909 unsigned Degree = P->getNodeId();
4912 // All of P's operands are sorted, so P may sorted now.
4913 P->setNodeId(DAGSize++);
4915 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4918 // Update P's outstanding operand count.
4919 P->setNodeId(Degree);
4924 assert(SortedPos == AllNodes.end() &&
4925 "Topological sort incomplete!");
4926 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4927 "First node in topological sort is not the entry token!");
4928 assert(AllNodes.front().getNodeId() == 0 &&
4929 "First node in topological sort has non-zero id!");
4930 assert(AllNodes.front().getNumOperands() == 0 &&
4931 "First node in topological sort has operands!");
4932 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4933 "Last node in topologic sort has unexpected id!");
4934 assert(AllNodes.back().use_empty() &&
4935 "Last node in topologic sort has users!");
4936 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4942 //===----------------------------------------------------------------------===//
4944 //===----------------------------------------------------------------------===//
4946 HandleSDNode::~HandleSDNode() {
4950 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
4951 EVT VT, int64_t o, unsigned char TF)
4952 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
4953 Offset(o), TargetFlags(TF) {
4954 TheGlobal = const_cast<GlobalValue*>(GA);
4957 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
4958 const Value *srcValue, int SVO,
4959 unsigned alignment, bool vol)
4960 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4961 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4962 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4963 assert(getAlignment() == alignment && "Alignment representation error!");
4964 assert(isVolatile() == vol && "Volatile representation error!");
4967 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4969 unsigned NumOps, EVT memvt, const Value *srcValue,
4970 int SVO, unsigned alignment, bool vol)
4971 : SDNode(Opc, dl, VTs, Ops, NumOps),
4972 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4973 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4974 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4975 assert(getAlignment() == alignment && "Alignment representation error!");
4976 assert(isVolatile() == vol && "Volatile representation error!");
4979 /// getMemOperand - Return a MachineMemOperand object describing the memory
4980 /// reference performed by this memory reference.
4981 MachineMemOperand MemSDNode::getMemOperand() const {
4983 if (isa<LoadSDNode>(this))
4984 Flags = MachineMemOperand::MOLoad;
4985 else if (isa<StoreSDNode>(this))
4986 Flags = MachineMemOperand::MOStore;
4987 else if (isa<AtomicSDNode>(this)) {
4988 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4991 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4992 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4993 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4994 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4997 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4998 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5000 // Check if the memory reference references a frame index
5001 const FrameIndexSDNode *FI =
5002 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5003 if (!getSrcValue() && FI)
5004 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5005 Flags, 0, Size, getAlignment());
5007 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5008 Size, getAlignment());
5011 /// Profile - Gather unique data for the node.
5013 void SDNode::Profile(FoldingSetNodeID &ID) const {
5014 AddNodeIDNode(ID, this);
5019 std::vector<EVT> VTs;
5022 VTs.reserve(MVT::LAST_VALUETYPE);
5023 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5024 VTs.push_back(MVT((MVT::SimpleValueType)i));
5029 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5030 static ManagedStatic<EVTArray> SimpleVTArray;
5031 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5033 /// getValueTypeList - Return a pointer to the specified value type.
5035 const EVT *SDNode::getValueTypeList(EVT VT) {
5036 if (VT.isExtended()) {
5037 sys::SmartScopedLock<true> Lock(*VTMutex);
5038 return &(*EVTs->insert(VT).first);
5040 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5044 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5045 /// indicated value. This method ignores uses of other values defined by this
5047 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5048 assert(Value < getNumValues() && "Bad value!");
5050 // TODO: Only iterate over uses of a given value of the node
5051 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5052 if (UI.getUse().getResNo() == Value) {
5059 // Found exactly the right number of uses?
5064 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5065 /// value. This method ignores uses of other values defined by this operation.
5066 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5067 assert(Value < getNumValues() && "Bad value!");
5069 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5070 if (UI.getUse().getResNo() == Value)
5077 /// isOnlyUserOf - Return true if this node is the only use of N.
5079 bool SDNode::isOnlyUserOf(SDNode *N) const {
5081 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5092 /// isOperand - Return true if this node is an operand of N.
5094 bool SDValue::isOperandOf(SDNode *N) const {
5095 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5096 if (*this == N->getOperand(i))
5101 bool SDNode::isOperandOf(SDNode *N) const {
5102 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5103 if (this == N->OperandList[i].getNode())
5108 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5109 /// be a chain) reaches the specified operand without crossing any
5110 /// side-effecting instructions. In practice, this looks through token
5111 /// factors and non-volatile loads. In order to remain efficient, this only
5112 /// looks a couple of nodes in, it does not do an exhaustive search.
5113 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5114 unsigned Depth) const {
5115 if (*this == Dest) return true;
5117 // Don't search too deeply, we just want to be able to see through
5118 // TokenFactor's etc.
5119 if (Depth == 0) return false;
5121 // If this is a token factor, all inputs to the TF happen in parallel. If any
5122 // of the operands of the TF reach dest, then we can do the xform.
5123 if (getOpcode() == ISD::TokenFactor) {
5124 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5125 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5130 // Loads don't have side effects, look through them.
5131 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5132 if (!Ld->isVolatile())
5133 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5139 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5140 SmallPtrSet<SDNode *, 32> &Visited) {
5141 if (found || !Visited.insert(N))
5144 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5145 SDNode *Op = N->getOperand(i).getNode();
5150 findPredecessor(Op, P, found, Visited);
5154 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5155 /// is either an operand of N or it can be reached by recursively traversing
5156 /// up the operands.
5157 /// NOTE: this is an expensive method. Use it carefully.
5158 bool SDNode::isPredecessorOf(SDNode *N) const {
5159 SmallPtrSet<SDNode *, 32> Visited;
5161 findPredecessor(N, this, found, Visited);
5165 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5166 assert(Num < NumOperands && "Invalid child # of SDNode!");
5167 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5170 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5171 switch (getOpcode()) {
5173 if (getOpcode() < ISD::BUILTIN_OP_END)
5174 return "<<Unknown DAG Node>>";
5175 if (isMachineOpcode()) {
5177 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5178 if (getMachineOpcode() < TII->getNumOpcodes())
5179 return TII->get(getMachineOpcode()).getName();
5180 return "<<Unknown Machine Node>>";
5183 const TargetLowering &TLI = G->getTargetLoweringInfo();
5184 const char *Name = TLI.getTargetNodeName(getOpcode());
5185 if (Name) return Name;
5186 return "<<Unknown Target Node>>";
5188 return "<<Unknown Node>>";
5191 case ISD::DELETED_NODE:
5192 return "<<Deleted Node!>>";
5194 case ISD::PREFETCH: return "Prefetch";
5195 case ISD::MEMBARRIER: return "MemBarrier";
5196 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5197 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5198 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5199 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5200 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5201 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5202 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5203 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5204 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5205 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5206 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5207 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5208 case ISD::PCMARKER: return "PCMarker";
5209 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5210 case ISD::SRCVALUE: return "SrcValue";
5211 case ISD::MEMOPERAND: return "MemOperand";
5212 case ISD::EntryToken: return "EntryToken";
5213 case ISD::TokenFactor: return "TokenFactor";
5214 case ISD::AssertSext: return "AssertSext";
5215 case ISD::AssertZext: return "AssertZext";
5217 case ISD::BasicBlock: return "BasicBlock";
5218 case ISD::VALUETYPE: return "ValueType";
5219 case ISD::Register: return "Register";
5221 case ISD::Constant: return "Constant";
5222 case ISD::ConstantFP: return "ConstantFP";
5223 case ISD::GlobalAddress: return "GlobalAddress";
5224 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5225 case ISD::FrameIndex: return "FrameIndex";
5226 case ISD::JumpTable: return "JumpTable";
5227 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5228 case ISD::RETURNADDR: return "RETURNADDR";
5229 case ISD::FRAMEADDR: return "FRAMEADDR";
5230 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5231 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5232 case ISD::LSDAADDR: return "LSDAADDR";
5233 case ISD::EHSELECTION: return "EHSELECTION";
5234 case ISD::EH_RETURN: return "EH_RETURN";
5235 case ISD::ConstantPool: return "ConstantPool";
5236 case ISD::ExternalSymbol: return "ExternalSymbol";
5237 case ISD::INTRINSIC_WO_CHAIN: {
5238 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5239 return Intrinsic::getName((Intrinsic::ID)IID);
5241 case ISD::INTRINSIC_VOID:
5242 case ISD::INTRINSIC_W_CHAIN: {
5243 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5244 return Intrinsic::getName((Intrinsic::ID)IID);
5247 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5248 case ISD::TargetConstant: return "TargetConstant";
5249 case ISD::TargetConstantFP:return "TargetConstantFP";
5250 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5251 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5252 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5253 case ISD::TargetJumpTable: return "TargetJumpTable";
5254 case ISD::TargetConstantPool: return "TargetConstantPool";
5255 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5257 case ISD::CopyToReg: return "CopyToReg";
5258 case ISD::CopyFromReg: return "CopyFromReg";
5259 case ISD::UNDEF: return "undef";
5260 case ISD::MERGE_VALUES: return "merge_values";
5261 case ISD::INLINEASM: return "inlineasm";
5262 case ISD::DBG_LABEL: return "dbg_label";
5263 case ISD::EH_LABEL: return "eh_label";
5264 case ISD::HANDLENODE: return "handlenode";
5267 case ISD::FABS: return "fabs";
5268 case ISD::FNEG: return "fneg";
5269 case ISD::FSQRT: return "fsqrt";
5270 case ISD::FSIN: return "fsin";
5271 case ISD::FCOS: return "fcos";
5272 case ISD::FPOWI: return "fpowi";
5273 case ISD::FPOW: return "fpow";
5274 case ISD::FTRUNC: return "ftrunc";
5275 case ISD::FFLOOR: return "ffloor";
5276 case ISD::FCEIL: return "fceil";
5277 case ISD::FRINT: return "frint";
5278 case ISD::FNEARBYINT: return "fnearbyint";
5281 case ISD::ADD: return "add";
5282 case ISD::SUB: return "sub";
5283 case ISD::MUL: return "mul";
5284 case ISD::MULHU: return "mulhu";
5285 case ISD::MULHS: return "mulhs";
5286 case ISD::SDIV: return "sdiv";
5287 case ISD::UDIV: return "udiv";
5288 case ISD::SREM: return "srem";
5289 case ISD::UREM: return "urem";
5290 case ISD::SMUL_LOHI: return "smul_lohi";
5291 case ISD::UMUL_LOHI: return "umul_lohi";
5292 case ISD::SDIVREM: return "sdivrem";
5293 case ISD::UDIVREM: return "udivrem";
5294 case ISD::AND: return "and";
5295 case ISD::OR: return "or";
5296 case ISD::XOR: return "xor";
5297 case ISD::SHL: return "shl";
5298 case ISD::SRA: return "sra";
5299 case ISD::SRL: return "srl";
5300 case ISD::ROTL: return "rotl";
5301 case ISD::ROTR: return "rotr";
5302 case ISD::FADD: return "fadd";
5303 case ISD::FSUB: return "fsub";
5304 case ISD::FMUL: return "fmul";
5305 case ISD::FDIV: return "fdiv";
5306 case ISD::FREM: return "frem";
5307 case ISD::FCOPYSIGN: return "fcopysign";
5308 case ISD::FGETSIGN: return "fgetsign";
5310 case ISD::SETCC: return "setcc";
5311 case ISD::VSETCC: return "vsetcc";
5312 case ISD::SELECT: return "select";
5313 case ISD::SELECT_CC: return "select_cc";
5314 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5315 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5316 case ISD::CONCAT_VECTORS: return "concat_vectors";
5317 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5318 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5319 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5320 case ISD::CARRY_FALSE: return "carry_false";
5321 case ISD::ADDC: return "addc";
5322 case ISD::ADDE: return "adde";
5323 case ISD::SADDO: return "saddo";
5324 case ISD::UADDO: return "uaddo";
5325 case ISD::SSUBO: return "ssubo";
5326 case ISD::USUBO: return "usubo";
5327 case ISD::SMULO: return "smulo";
5328 case ISD::UMULO: return "umulo";
5329 case ISD::SUBC: return "subc";
5330 case ISD::SUBE: return "sube";
5331 case ISD::SHL_PARTS: return "shl_parts";
5332 case ISD::SRA_PARTS: return "sra_parts";
5333 case ISD::SRL_PARTS: return "srl_parts";
5335 // Conversion operators.
5336 case ISD::SIGN_EXTEND: return "sign_extend";
5337 case ISD::ZERO_EXTEND: return "zero_extend";
5338 case ISD::ANY_EXTEND: return "any_extend";
5339 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5340 case ISD::TRUNCATE: return "truncate";
5341 case ISD::FP_ROUND: return "fp_round";
5342 case ISD::FLT_ROUNDS_: return "flt_rounds";
5343 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5344 case ISD::FP_EXTEND: return "fp_extend";
5346 case ISD::SINT_TO_FP: return "sint_to_fp";
5347 case ISD::UINT_TO_FP: return "uint_to_fp";
5348 case ISD::FP_TO_SINT: return "fp_to_sint";
5349 case ISD::FP_TO_UINT: return "fp_to_uint";
5350 case ISD::BIT_CONVERT: return "bit_convert";
5352 case ISD::CONVERT_RNDSAT: {
5353 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5354 default: llvm_unreachable("Unknown cvt code!");
5355 case ISD::CVT_FF: return "cvt_ff";
5356 case ISD::CVT_FS: return "cvt_fs";
5357 case ISD::CVT_FU: return "cvt_fu";
5358 case ISD::CVT_SF: return "cvt_sf";
5359 case ISD::CVT_UF: return "cvt_uf";
5360 case ISD::CVT_SS: return "cvt_ss";
5361 case ISD::CVT_SU: return "cvt_su";
5362 case ISD::CVT_US: return "cvt_us";
5363 case ISD::CVT_UU: return "cvt_uu";
5367 // Control flow instructions
5368 case ISD::BR: return "br";
5369 case ISD::BRIND: return "brind";
5370 case ISD::BR_JT: return "br_jt";
5371 case ISD::BRCOND: return "brcond";
5372 case ISD::BR_CC: return "br_cc";
5373 case ISD::CALLSEQ_START: return "callseq_start";
5374 case ISD::CALLSEQ_END: return "callseq_end";
5377 case ISD::LOAD: return "load";
5378 case ISD::STORE: return "store";
5379 case ISD::VAARG: return "vaarg";
5380 case ISD::VACOPY: return "vacopy";
5381 case ISD::VAEND: return "vaend";
5382 case ISD::VASTART: return "vastart";
5383 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5384 case ISD::EXTRACT_ELEMENT: return "extract_element";
5385 case ISD::BUILD_PAIR: return "build_pair";
5386 case ISD::STACKSAVE: return "stacksave";
5387 case ISD::STACKRESTORE: return "stackrestore";
5388 case ISD::TRAP: return "trap";
5391 case ISD::BSWAP: return "bswap";
5392 case ISD::CTPOP: return "ctpop";
5393 case ISD::CTTZ: return "cttz";
5394 case ISD::CTLZ: return "ctlz";
5397 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5398 case ISD::DEBUG_LOC: return "debug_loc";
5401 case ISD::TRAMPOLINE: return "trampoline";
5404 switch (cast<CondCodeSDNode>(this)->get()) {
5405 default: llvm_unreachable("Unknown setcc condition!");
5406 case ISD::SETOEQ: return "setoeq";
5407 case ISD::SETOGT: return "setogt";
5408 case ISD::SETOGE: return "setoge";
5409 case ISD::SETOLT: return "setolt";
5410 case ISD::SETOLE: return "setole";
5411 case ISD::SETONE: return "setone";
5413 case ISD::SETO: return "seto";
5414 case ISD::SETUO: return "setuo";
5415 case ISD::SETUEQ: return "setue";
5416 case ISD::SETUGT: return "setugt";
5417 case ISD::SETUGE: return "setuge";
5418 case ISD::SETULT: return "setult";
5419 case ISD::SETULE: return "setule";
5420 case ISD::SETUNE: return "setune";
5422 case ISD::SETEQ: return "seteq";
5423 case ISD::SETGT: return "setgt";
5424 case ISD::SETGE: return "setge";
5425 case ISD::SETLT: return "setlt";
5426 case ISD::SETLE: return "setle";
5427 case ISD::SETNE: return "setne";
5432 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5441 return "<post-inc>";
5443 return "<post-dec>";
5447 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5448 std::string S = "< ";
5462 if (getByValAlign())
5463 S += "byval-align:" + utostr(getByValAlign()) + " ";
5465 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5467 S += "byval-size:" + utostr(getByValSize()) + " ";
5471 void SDNode::dump() const { dump(0); }
5472 void SDNode::dump(const SelectionDAG *G) const {
5476 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5477 OS << (void*)this << ": ";
5479 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5481 if (getValueType(i) == MVT::Other)
5484 OS << getValueType(i).getEVTString();
5486 OS << " = " << getOperationName(G);
5489 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5490 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5491 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5493 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5494 int Idx = SVN->getMaskElt(i);
5504 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5505 OS << '<' << CSDN->getAPIntValue() << '>';
5506 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5507 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5508 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5509 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5510 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5513 CSDN->getValueAPF().bitcastToAPInt().dump();
5516 } else if (const GlobalAddressSDNode *GADN =
5517 dyn_cast<GlobalAddressSDNode>(this)) {
5518 int64_t offset = GADN->getOffset();
5520 WriteAsOperand(OS, GADN->getGlobal());
5523 OS << " + " << offset;
5525 OS << " " << offset;
5526 if (unsigned int TF = GADN->getTargetFlags())
5527 OS << " [TF=" << TF << ']';
5528 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5529 OS << "<" << FIDN->getIndex() << ">";
5530 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5531 OS << "<" << JTDN->getIndex() << ">";
5532 if (unsigned int TF = JTDN->getTargetFlags())
5533 OS << " [TF=" << TF << ']';
5534 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5535 int offset = CP->getOffset();
5536 if (CP->isMachineConstantPoolEntry())
5537 OS << "<" << *CP->getMachineCPVal() << ">";
5539 OS << "<" << *CP->getConstVal() << ">";
5541 OS << " + " << offset;
5543 OS << " " << offset;
5544 if (unsigned int TF = CP->getTargetFlags())
5545 OS << " [TF=" << TF << ']';
5546 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5548 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5550 OS << LBB->getName() << " ";
5551 OS << (const void*)BBDN->getBasicBlock() << ">";
5552 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5553 if (G && R->getReg() &&
5554 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5555 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5557 OS << " #" << R->getReg();
5559 } else if (const ExternalSymbolSDNode *ES =
5560 dyn_cast<ExternalSymbolSDNode>(this)) {
5561 OS << "'" << ES->getSymbol() << "'";
5562 if (unsigned int TF = ES->getTargetFlags())
5563 OS << " [TF=" << TF << ']';
5564 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5566 OS << "<" << M->getValue() << ">";
5569 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5570 if (M->MO.getValue())
5571 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5573 OS << "<null:" << M->MO.getOffset() << ">";
5574 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5575 OS << ":" << N->getVT().getEVTString();
5577 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5578 const Value *SrcValue = LD->getSrcValue();
5579 int SrcOffset = LD->getSrcValueOffset();
5585 OS << ":" << SrcOffset << ">";
5588 switch (LD->getExtensionType()) {
5589 default: doExt = false; break;
5590 case ISD::EXTLOAD: OS << " <anyext "; break;
5591 case ISD::SEXTLOAD: OS << " <sext "; break;
5592 case ISD::ZEXTLOAD: OS << " <zext "; break;
5595 OS << LD->getMemoryVT().getEVTString() << ">";
5597 const char *AM = getIndexedModeName(LD->getAddressingMode());
5600 if (LD->isVolatile())
5601 OS << " <volatile>";
5602 OS << " alignment=" << LD->getAlignment();
5603 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5604 const Value *SrcValue = ST->getSrcValue();
5605 int SrcOffset = ST->getSrcValueOffset();
5611 OS << ":" << SrcOffset << ">";
5613 if (ST->isTruncatingStore())
5614 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">";
5616 const char *AM = getIndexedModeName(ST->getAddressingMode());
5619 if (ST->isVolatile())
5620 OS << " <volatile>";
5621 OS << " alignment=" << ST->getAlignment();
5622 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5623 const Value *SrcValue = AT->getSrcValue();
5624 int SrcOffset = AT->getSrcValueOffset();
5630 OS << ":" << SrcOffset << ">";
5631 if (AT->isVolatile())
5632 OS << " <volatile>";
5633 OS << " alignment=" << AT->getAlignment();
5637 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5640 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5642 OS << (void*)getOperand(i).getNode();
5643 if (unsigned RN = getOperand(i).getResNo())
5646 print_details(OS, G);
5649 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5650 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5651 if (N->getOperand(i).getNode()->hasOneUse())
5652 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5654 errs() << "\n" << std::string(indent+2, ' ')
5655 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5659 errs().indent(indent);
5663 void SelectionDAG::dump() const {
5664 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
5666 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5668 const SDNode *N = I;
5669 if (!N->hasOneUse() && N != getRoot().getNode())
5670 DumpNodes(N, 2, this);
5673 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5678 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5680 print_details(OS, G);
5683 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5684 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5685 const SelectionDAG *G, VisitedSDNodeSet &once) {
5686 if (!once.insert(N)) // If we've been here before, return now.
5688 // Dump the current SDNode, but don't end the line yet.
5689 OS << std::string(indent, ' ');
5691 // Having printed this SDNode, walk the children:
5692 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5693 const SDNode *child = N->getOperand(i).getNode();
5696 if (child->getNumOperands() == 0) {
5697 // This child has no grandchildren; print it inline right here.
5698 child->printr(OS, G);
5700 } else { // Just the address. FIXME: also print the child's opcode
5702 if (unsigned RN = N->getOperand(i).getResNo())
5707 // Dump children that have grandchildren on their own line(s).
5708 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5709 const SDNode *child = N->getOperand(i).getNode();
5710 DumpNodesr(OS, child, indent+2, G, once);
5714 void SDNode::dumpr() const {
5715 VisitedSDNodeSet once;
5716 DumpNodesr(errs(), this, 0, 0, once);
5720 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5721 unsigned GlobalAddressSDNode::getAddressSpace() const {
5722 return getGlobal()->getType()->getAddressSpace();
5726 const Type *ConstantPoolSDNode::getType() const {
5727 if (isMachineConstantPoolEntry())
5728 return Val.MachineCPVal->getType();
5729 return Val.ConstVal->getType();
5732 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5734 unsigned &SplatBitSize,
5736 unsigned MinSplatBits) {
5737 EVT VT = getValueType(0);
5738 assert(VT.isVector() && "Expected a vector type");
5739 unsigned sz = VT.getSizeInBits();
5740 if (MinSplatBits > sz)
5743 SplatValue = APInt(sz, 0);
5744 SplatUndef = APInt(sz, 0);
5746 // Get the bits. Bits with undefined values (when the corresponding element
5747 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5748 // in SplatValue. If any of the values are not constant, give up and return
5750 unsigned int nOps = getNumOperands();
5751 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5752 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5753 for (unsigned i = 0; i < nOps; ++i) {
5754 SDValue OpVal = getOperand(i);
5755 unsigned BitPos = i * EltBitSize;
5757 if (OpVal.getOpcode() == ISD::UNDEF)
5758 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5759 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5760 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5761 zextOrTrunc(sz) << BitPos);
5762 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5763 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5768 // The build_vector is all constants or undefs. Find the smallest element
5769 // size that splats the vector.
5771 HasAnyUndefs = (SplatUndef != 0);
5774 unsigned HalfSize = sz / 2;
5775 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5776 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5777 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5778 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5780 // If the two halves do not match (ignoring undef bits), stop here.
5781 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5782 MinSplatBits > HalfSize)
5785 SplatValue = HighValue | LowValue;
5786 SplatUndef = HighUndef & LowUndef;
5795 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
5796 // Find the first non-undef value in the shuffle mask.
5798 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5801 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5803 // Make sure all remaining elements are either undef or the same as the first
5805 for (int Idx = Mask[i]; i != e; ++i)
5806 if (Mask[i] >= 0 && Mask[i] != Idx)