1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 if (N->getOpcode() == ISD::BIT_CONVERT)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
117 SDValue NotZero = N->getOperand(i);
118 if (isa<ConstantSDNode>(NotZero)) {
119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
121 } else if (isa<ConstantFPSDNode>(NotZero)) {
122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
123 bitcastToAPInt().isAllOnesValue())
128 // Okay, we have at least one ~0 value, check to see if the rest match or are
130 for (++i; i != e; ++i)
131 if (N->getOperand(i) != NotZero &&
132 N->getOperand(i).getOpcode() != ISD::UNDEF)
138 /// isBuildVectorAllZeros - Return true if the specified node is a
139 /// BUILD_VECTOR where all of the elements are 0 or undef.
140 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
141 // Look through a bit convert.
142 if (N->getOpcode() == ISD::BIT_CONVERT)
143 N = N->getOperand(0).getNode();
145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
147 unsigned i = 0, e = N->getNumOperands();
149 // Skip over all of the undef values.
150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 // Do not accept an all-undef vector.
154 if (i == e) return false;
156 // Do not accept build_vectors that aren't all constants or which have non-~0
158 SDValue Zero = N->getOperand(i);
159 if (isa<ConstantSDNode>(Zero)) {
160 if (!cast<ConstantSDNode>(Zero)->isNullValue())
162 } else if (isa<ConstantFPSDNode>(Zero)) {
163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
168 // Okay, we have at least one ~0 value, check to see if the rest match or are
170 for (++i; i != e; ++i)
171 if (N->getOperand(i) != Zero &&
172 N->getOperand(i).getOpcode() != ISD::UNDEF)
177 /// isScalarToVector - Return true if the specified node is a
178 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
179 /// element is not an undef.
180 bool ISD::isScalarToVector(const SDNode *N) {
181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
184 if (N->getOpcode() != ISD::BUILD_VECTOR)
186 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
188 unsigned NumElems = N->getNumOperands();
189 for (unsigned i = 1; i < NumElems; ++i) {
190 SDValue V = N->getOperand(i);
191 if (V.getOpcode() != ISD::UNDEF)
198 /// isDebugLabel - Return true if the specified node represents a debug
199 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
200 bool ISD::isDebugLabel(const SDNode *N) {
202 if (N->getOpcode() == ISD::DBG_LABEL)
204 if (N->isMachineOpcode() &&
205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: assert(0 && "Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 const TargetMachine &SelectionDAG::getTarget() const {
310 return MF->getTarget();
313 //===----------------------------------------------------------------------===//
314 // SDNode Profile Support
315 //===----------------------------------------------------------------------===//
317 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
319 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
323 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
324 /// solely with their pointer.
325 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
326 ID.AddPointer(VTList.VTs);
329 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
331 static void AddNodeIDOperands(FoldingSetNodeID &ID,
332 const SDValue *Ops, unsigned NumOps) {
333 for (; NumOps; --NumOps, ++Ops) {
334 ID.AddPointer(Ops->getNode());
335 ID.AddInteger(Ops->getResNo());
339 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
341 static void AddNodeIDOperands(FoldingSetNodeID &ID,
342 const SDUse *Ops, unsigned NumOps) {
343 for (; NumOps; --NumOps, ++Ops) {
344 ID.AddPointer(Ops->getVal());
345 ID.AddInteger(Ops->getSDValue().getResNo());
349 static void AddNodeIDNode(FoldingSetNodeID &ID,
350 unsigned short OpC, SDVTList VTList,
351 const SDValue *OpList, unsigned N) {
352 AddNodeIDOpcode(ID, OpC);
353 AddNodeIDValueTypes(ID, VTList);
354 AddNodeIDOperands(ID, OpList, N);
357 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
359 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
360 switch (N->getOpcode()) {
361 default: break; // Normal nodes don't need extra info.
363 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
365 case ISD::TargetConstant:
367 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
369 case ISD::TargetConstantFP:
370 case ISD::ConstantFP: {
371 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
374 case ISD::TargetGlobalAddress:
375 case ISD::GlobalAddress:
376 case ISD::TargetGlobalTLSAddress:
377 case ISD::GlobalTLSAddress: {
378 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
379 ID.AddPointer(GA->getGlobal());
380 ID.AddInteger(GA->getOffset());
383 case ISD::BasicBlock:
384 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
387 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 case ISD::DBG_STOPPOINT: {
390 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
391 ID.AddInteger(DSP->getLine());
392 ID.AddInteger(DSP->getColumn());
393 ID.AddPointer(DSP->getCompileUnit());
397 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
399 case ISD::MEMOPERAND: {
400 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
412 case ISD::ConstantPool:
413 case ISD::TargetConstantPool: {
414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
415 ID.AddInteger(CP->getAlignment());
416 ID.AddInteger(CP->getOffset());
417 if (CP->isMachineConstantPoolEntry())
418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
420 ID.AddPointer(CP->getConstVal());
424 const CallSDNode *Call = cast<CallSDNode>(N);
425 ID.AddInteger(Call->getCallingConv());
426 ID.AddInteger(Call->isVarArg());
430 const LoadSDNode *LD = cast<LoadSDNode>(N);
431 ID.AddInteger(LD->getAddressingMode());
432 ID.AddInteger(LD->getExtensionType());
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawFlags());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getAddressingMode());
440 ID.AddInteger(ST->isTruncatingStore());
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawFlags());
445 case ISD::ATOMIC_CMP_SWAP:
446 case ISD::ATOMIC_SWAP:
447 case ISD::ATOMIC_LOAD_ADD:
448 case ISD::ATOMIC_LOAD_SUB:
449 case ISD::ATOMIC_LOAD_AND:
450 case ISD::ATOMIC_LOAD_OR:
451 case ISD::ATOMIC_LOAD_XOR:
452 case ISD::ATOMIC_LOAD_NAND:
453 case ISD::ATOMIC_LOAD_MIN:
454 case ISD::ATOMIC_LOAD_MAX:
455 case ISD::ATOMIC_LOAD_UMIN:
456 case ISD::ATOMIC_LOAD_UMAX: {
457 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
458 ID.AddInteger(AT->getRawFlags());
461 } // end switch (N->getOpcode())
464 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
466 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
467 AddNodeIDOpcode(ID, N->getOpcode());
468 // Add the return value info.
469 AddNodeIDValueTypes(ID, N->getVTList());
470 // Add the operand info.
471 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
473 // Handle SDNode leafs with special info.
474 AddNodeIDCustom(ID, N);
477 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
478 /// the CSE map that carries both alignment and volatility information.
480 static inline unsigned
481 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
482 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
485 //===----------------------------------------------------------------------===//
486 // SelectionDAG Class
487 //===----------------------------------------------------------------------===//
489 /// doNotCSE - Return true if CSE should not be performed for this node.
490 static bool doNotCSE(SDNode *N) {
491 if (N->getValueType(0) == MVT::Flag)
492 return true; // Never CSE anything that produces a flag.
494 switch (N->getOpcode()) {
496 case ISD::HANDLENODE:
498 case ISD::DBG_STOPPOINT:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.back();
541 DeadNodes.pop_back();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
552 SDNode *Operand = I->getVal();
553 Operand->removeUser(std::distance(N->op_begin(), I), N);
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
560 if (N->OperandsNeedDelete)
561 delete[] N->OperandList;
566 // Finally, remove N itself.
567 NodeAllocator.Deallocate(AllNodes.remove(N));
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 assert(N->use_empty() && "Cannot delete a node that is not dead!");
579 // First take this out of the appropriate CSE map.
580 RemoveNodeFromCSEMaps(N);
582 // Finally, remove uses due to operands of this node, remove from the
583 // AllNodes list, and delete the node.
584 DeleteNodeNotInCSEMaps(N);
587 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
588 // Drop all of the operands and decrement used node's use counts.
589 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
590 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
592 if (N->OperandsNeedDelete) {
593 delete[] N->OperandList;
597 assert(N != AllNodes.begin());
598 NodeAllocator.Deallocate(AllNodes.remove(N));
601 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
602 /// correspond to it. This is useful when we're about to delete or repurpose
603 /// the node. We don't want future request for structurally identical nodes
604 /// to return N anymore.
605 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
607 switch (N->getOpcode()) {
608 case ISD::EntryToken:
609 assert(0 && "EntryToken should not be in CSEMaps!");
611 case ISD::HANDLENODE: return false; // noop.
613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
614 "Cond code doesn't exist!");
615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
618 case ISD::ExternalSymbol:
619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
621 case ISD::TargetExternalSymbol:
623 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::VALUETYPE: {
626 MVT VT = cast<VTSDNode>(N)->getVT();
627 if (VT.isExtended()) {
628 Erased = ExtendedValueTypeNodes.erase(VT);
630 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
631 ValueTypeNodes[VT.getSimpleVT()] = 0;
636 // Remove it from the CSE Map.
637 Erased = CSEMap.RemoveNode(N);
641 // Verify that the node was actually in one of the CSE maps, unless it has a
642 // flag result (which cannot be CSE'd) or is one of the special cases that are
643 // not subject to CSE.
644 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
645 !N->isMachineOpcode() && !doNotCSE(N)) {
648 assert(0 && "Node is not in map!");
654 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
655 /// has been taken out and modified in some way. If the specified node already
656 /// exists in the CSE maps, do not modify the maps, but return the existing node
657 /// instead. If it doesn't exist, add it and return null.
659 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
660 assert(N->getNumOperands() && "This is a leaf node!");
665 SDNode *New = CSEMap.GetOrInsertNode(N);
666 if (New != N) return New; // Node already existed.
670 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
671 /// were replaced with those specified. If this node is never memoized,
672 /// return null, otherwise return a pointer to the slot it would take. If a
673 /// node already exists with these operands, the slot will be non-null.
674 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
679 SDValue Ops[] = { Op };
681 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
682 AddNodeIDCustom(ID, N);
683 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
686 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
687 /// were replaced with those specified. If this node is never memoized,
688 /// return null, otherwise return a pointer to the slot it would take. If a
689 /// node already exists with these operands, the slot will be non-null.
690 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
691 SDValue Op1, SDValue Op2,
696 SDValue Ops[] = { Op1, Op2 };
698 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
699 AddNodeIDCustom(ID, N);
700 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
704 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
705 /// were replaced with those specified. If this node is never memoized,
706 /// return null, otherwise return a pointer to the slot it would take. If a
707 /// node already exists with these operands, the slot will be non-null.
708 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
709 const SDValue *Ops,unsigned NumOps,
715 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
716 AddNodeIDCustom(ID, N);
717 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
720 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
721 void SelectionDAG::VerifyNode(SDNode *N) {
722 switch (N->getOpcode()) {
725 case ISD::BUILD_PAIR: {
726 MVT VT = N->getValueType(0);
727 assert(N->getNumValues() == 1 && "Too many results!");
728 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
729 "Wrong return type!");
730 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
731 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
732 "Mismatched operand types!");
733 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
734 "Wrong operand type!");
735 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
736 "Wrong return type size");
739 case ISD::BUILD_VECTOR: {
740 assert(N->getNumValues() == 1 && "Too many results!");
741 assert(N->getValueType(0).isVector() && "Wrong return type!");
742 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
743 "Wrong number of operands!");
744 // FIXME: Change vector_shuffle to a variadic node with mask elements being
745 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
746 // operand, and it is not always possible to legalize it. Turning off the
747 // following checks at least makes it possible to legalize most of the time.
748 // MVT EltVT = N->getValueType(0).getVectorElementType();
749 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
750 // assert(I->getSDValue().getValueType() == EltVT &&
751 // "Wrong operand type!");
757 /// getMVTAlignment - Compute the default alignment value for the
760 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
761 const Type *Ty = VT == MVT::iPTR ?
762 PointerType::get(Type::Int8Ty, 0) :
765 return TLI.getTargetData()->getABITypeAlignment(Ty);
768 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
769 : TLI(tli), FLI(fli),
770 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
771 Root(getEntryNode()) {
772 AllNodes.push_back(&EntryNode);
775 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
782 SelectionDAG::~SelectionDAG() {
786 void SelectionDAG::allnodes_clear() {
787 assert(&*AllNodes.begin() == &EntryNode);
788 AllNodes.remove(AllNodes.begin());
789 while (!AllNodes.empty()) {
790 SDNode *N = AllNodes.remove(AllNodes.begin());
791 N->SetNextInBucket(0);
793 if (N->OperandsNeedDelete) {
794 delete [] N->OperandList;
798 NodeAllocator.Deallocate(N);
802 void SelectionDAG::clear() {
804 OperandAllocator.Reset();
807 ExtendedValueTypeNodes.clear();
808 ExternalSymbols.clear();
809 TargetExternalSymbols.clear();
810 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
811 static_cast<CondCodeSDNode*>(0));
812 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
813 static_cast<SDNode*>(0));
816 AllNodes.push_back(&EntryNode);
817 Root = getEntryNode();
820 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
821 if (Op.getValueType() == VT) return Op;
822 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
824 return getNode(ISD::AND, Op.getValueType(), Op,
825 getConstant(Imm, Op.getValueType()));
828 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
829 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
830 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
833 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
834 return getConstant(*ConstantInt::get(Val), VT, isT);
837 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
838 assert(VT.isInteger() && "Cannot create FP integer constant!");
840 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
841 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
842 "APInt size does not match type size!");
844 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
846 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
850 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
852 return SDValue(N, 0);
854 N = NodeAllocator.Allocate<ConstantSDNode>();
855 new (N) ConstantSDNode(isT, &Val, EltVT);
856 CSEMap.InsertNode(N, IP);
857 AllNodes.push_back(N);
860 SDValue Result(N, 0);
862 SmallVector<SDValue, 8> Ops;
863 Ops.assign(VT.getVectorNumElements(), Result);
864 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
869 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
870 return getConstant(Val, TLI.getPointerTy(), isTarget);
874 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
875 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
878 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
879 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
882 VT.isVector() ? VT.getVectorElementType() : VT;
884 // Do the map lookup using the actual bit pattern for the floating point
885 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
886 // we don't have issues with SNANs.
887 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
889 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
893 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
895 return SDValue(N, 0);
897 N = NodeAllocator.Allocate<ConstantFPSDNode>();
898 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
899 CSEMap.InsertNode(N, IP);
900 AllNodes.push_back(N);
903 SDValue Result(N, 0);
905 SmallVector<SDValue, 8> Ops;
906 Ops.assign(VT.getVectorNumElements(), Result);
907 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
912 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
914 VT.isVector() ? VT.getVectorElementType() : VT;
916 return getConstantFP(APFloat((float)Val), VT, isTarget);
918 return getConstantFP(APFloat(Val), VT, isTarget);
921 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
922 MVT VT, int64_t Offset,
926 // Truncate (with sign-extension) the offset value to the pointer size.
927 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
929 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
931 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
933 // If GV is an alias then use the aliasee for determining thread-localness.
934 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
935 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
938 if (GVar && GVar->isThreadLocal())
939 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
941 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
944 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
946 ID.AddInteger(Offset);
948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
949 return SDValue(E, 0);
950 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
951 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
952 CSEMap.InsertNode(N, IP);
953 AllNodes.push_back(N);
954 return SDValue(N, 0);
957 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
958 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
960 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
963 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
964 return SDValue(E, 0);
965 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
966 new (N) FrameIndexSDNode(FI, VT, isTarget);
967 CSEMap.InsertNode(N, IP);
968 AllNodes.push_back(N);
969 return SDValue(N, 0);
972 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
973 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
975 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
978 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
979 return SDValue(E, 0);
980 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
981 new (N) JumpTableSDNode(JTI, VT, isTarget);
982 CSEMap.InsertNode(N, IP);
983 AllNodes.push_back(N);
984 return SDValue(N, 0);
987 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
988 unsigned Alignment, int Offset,
992 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
993 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
995 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
996 ID.AddInteger(Alignment);
997 ID.AddInteger(Offset);
1000 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1001 return SDValue(E, 0);
1002 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1003 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1004 CSEMap.InsertNode(N, IP);
1005 AllNodes.push_back(N);
1006 return SDValue(N, 0);
1010 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1011 unsigned Alignment, int Offset,
1015 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1016 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1017 FoldingSetNodeID ID;
1018 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1019 ID.AddInteger(Alignment);
1020 ID.AddInteger(Offset);
1021 C->AddSelectionDAGCSEId(ID);
1023 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1024 return SDValue(E, 0);
1025 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1026 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1027 CSEMap.InsertNode(N, IP);
1028 AllNodes.push_back(N);
1029 return SDValue(N, 0);
1033 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1034 FoldingSetNodeID ID;
1035 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1038 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1039 return SDValue(E, 0);
1040 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1041 new (N) BasicBlockSDNode(MBB);
1042 CSEMap.InsertNode(N, IP);
1043 AllNodes.push_back(N);
1044 return SDValue(N, 0);
1047 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1048 FoldingSetNodeID ID;
1049 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1050 ID.AddInteger(Flags.getRawBits());
1052 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1053 return SDValue(E, 0);
1054 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1055 new (N) ARG_FLAGSSDNode(Flags);
1056 CSEMap.InsertNode(N, IP);
1057 AllNodes.push_back(N);
1058 return SDValue(N, 0);
1061 SDValue SelectionDAG::getValueType(MVT VT) {
1062 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1063 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1065 SDNode *&N = VT.isExtended() ?
1066 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1068 if (N) return SDValue(N, 0);
1069 N = NodeAllocator.Allocate<VTSDNode>();
1070 new (N) VTSDNode(VT);
1071 AllNodes.push_back(N);
1072 return SDValue(N, 0);
1075 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1076 SDNode *&N = ExternalSymbols[Sym];
1077 if (N) return SDValue(N, 0);
1078 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1079 new (N) ExternalSymbolSDNode(false, Sym, VT);
1080 AllNodes.push_back(N);
1081 return SDValue(N, 0);
1084 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1085 SDNode *&N = TargetExternalSymbols[Sym];
1086 if (N) return SDValue(N, 0);
1087 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1088 new (N) ExternalSymbolSDNode(true, Sym, VT);
1089 AllNodes.push_back(N);
1090 return SDValue(N, 0);
1093 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1094 if ((unsigned)Cond >= CondCodeNodes.size())
1095 CondCodeNodes.resize(Cond+1);
1097 if (CondCodeNodes[Cond] == 0) {
1098 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1099 new (N) CondCodeSDNode(Cond);
1100 CondCodeNodes[Cond] = N;
1101 AllNodes.push_back(N);
1103 return SDValue(CondCodeNodes[Cond], 0);
1106 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1107 SDValue STy, SDValue Rnd, SDValue Sat,
1108 ISD::CvtCode Code) {
1109 // If the src and dest types are the same, no conversion is necessary.
1113 FoldingSetNodeID ID;
1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1116 return SDValue(E, 0);
1117 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1118 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1119 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1120 CSEMap.InsertNode(N, IP);
1121 AllNodes.push_back(N);
1122 return SDValue(N, 0);
1125 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1126 FoldingSetNodeID ID;
1127 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1128 ID.AddInteger(RegNo);
1130 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1131 return SDValue(E, 0);
1132 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1133 new (N) RegisterSDNode(RegNo, VT);
1134 CSEMap.InsertNode(N, IP);
1135 AllNodes.push_back(N);
1136 return SDValue(N, 0);
1139 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1140 unsigned Line, unsigned Col,
1142 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1143 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1144 AllNodes.push_back(N);
1145 return SDValue(N, 0);
1148 SDValue SelectionDAG::getLabel(unsigned Opcode,
1151 FoldingSetNodeID ID;
1152 SDValue Ops[] = { Root };
1153 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1154 ID.AddInteger(LabelID);
1156 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1157 return SDValue(E, 0);
1158 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1159 new (N) LabelSDNode(Opcode, Root, LabelID);
1160 CSEMap.InsertNode(N, IP);
1161 AllNodes.push_back(N);
1162 return SDValue(N, 0);
1165 SDValue SelectionDAG::getSrcValue(const Value *V) {
1166 assert((!V || isa<PointerType>(V->getType())) &&
1167 "SrcValue is not a pointer?");
1169 FoldingSetNodeID ID;
1170 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1174 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1175 return SDValue(E, 0);
1177 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1178 new (N) SrcValueSDNode(V);
1179 CSEMap.InsertNode(N, IP);
1180 AllNodes.push_back(N);
1181 return SDValue(N, 0);
1184 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1186 const Value *v = MO.getValue();
1187 assert((!v || isa<PointerType>(v->getType())) &&
1188 "SrcValue is not a pointer?");
1191 FoldingSetNodeID ID;
1192 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1196 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1197 return SDValue(E, 0);
1199 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1200 new (N) MemOperandSDNode(MO);
1201 CSEMap.InsertNode(N, IP);
1202 AllNodes.push_back(N);
1203 return SDValue(N, 0);
1206 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1207 /// specified value type.
1208 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1209 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1210 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1211 const Type *Ty = VT.getTypeForMVT();
1212 unsigned StackAlign =
1213 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1215 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1216 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1219 /// CreateStackTemporary - Create a stack temporary suitable for holding
1220 /// either of the specified value types.
1221 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1222 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1223 VT2.getStoreSizeInBits())/8;
1224 const Type *Ty1 = VT1.getTypeForMVT();
1225 const Type *Ty2 = VT2.getTypeForMVT();
1226 const TargetData *TD = TLI.getTargetData();
1227 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1228 TD->getPrefTypeAlignment(Ty2));
1230 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1231 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1232 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1235 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1236 SDValue N2, ISD::CondCode Cond) {
1237 // These setcc operations always fold.
1241 case ISD::SETFALSE2: return getConstant(0, VT);
1243 case ISD::SETTRUE2: return getConstant(1, VT);
1255 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1259 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1260 const APInt &C2 = N2C->getAPIntValue();
1261 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1262 const APInt &C1 = N1C->getAPIntValue();
1265 default: assert(0 && "Unknown integer setcc!");
1266 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1267 case ISD::SETNE: return getConstant(C1 != C2, VT);
1268 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1269 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1270 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1271 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1272 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1273 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1274 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1275 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1279 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1280 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1281 // No compile time operations on this type yet.
1282 if (N1C->getValueType(0) == MVT::ppcf128)
1285 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1288 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1289 return getNode(ISD::UNDEF, VT);
1291 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1292 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1293 return getNode(ISD::UNDEF, VT);
1295 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1296 R==APFloat::cmpLessThan, VT);
1297 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1298 return getNode(ISD::UNDEF, VT);
1300 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1301 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1302 return getNode(ISD::UNDEF, VT);
1304 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1305 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1306 return getNode(ISD::UNDEF, VT);
1308 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1309 R==APFloat::cmpEqual, VT);
1310 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1311 return getNode(ISD::UNDEF, VT);
1313 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1314 R==APFloat::cmpEqual, VT);
1315 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1316 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1317 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1318 R==APFloat::cmpEqual, VT);
1319 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1320 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1321 R==APFloat::cmpLessThan, VT);
1322 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1323 R==APFloat::cmpUnordered, VT);
1324 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1325 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1328 // Ensure that the constant occurs on the RHS.
1329 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1333 // Could not fold it.
1337 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1338 /// use this predicate to simplify operations downstream.
1339 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1340 unsigned BitWidth = Op.getValueSizeInBits();
1341 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1344 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1345 /// this predicate to simplify operations downstream. Mask is known to be zero
1346 /// for bits that V cannot have.
1347 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1348 unsigned Depth) const {
1349 APInt KnownZero, KnownOne;
1350 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1351 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1352 return (KnownZero & Mask) == Mask;
1355 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1356 /// known to be either zero or one and return them in the KnownZero/KnownOne
1357 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1359 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1360 APInt &KnownZero, APInt &KnownOne,
1361 unsigned Depth) const {
1362 unsigned BitWidth = Mask.getBitWidth();
1363 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1364 "Mask size mismatches value type size!");
1366 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1367 if (Depth == 6 || Mask == 0)
1368 return; // Limit search depth.
1370 APInt KnownZero2, KnownOne2;
1372 switch (Op.getOpcode()) {
1374 // We know all of the bits for a constant!
1375 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1376 KnownZero = ~KnownOne & Mask;
1379 // If either the LHS or the RHS are Zero, the result is zero.
1380 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1381 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1382 KnownZero2, KnownOne2, Depth+1);
1383 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1384 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1386 // Output known-1 bits are only known if set in both the LHS & RHS.
1387 KnownOne &= KnownOne2;
1388 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1389 KnownZero |= KnownZero2;
1392 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1393 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1394 KnownZero2, KnownOne2, Depth+1);
1395 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1396 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1398 // Output known-0 bits are only known if clear in both the LHS & RHS.
1399 KnownZero &= KnownZero2;
1400 // Output known-1 are known to be set if set in either the LHS | RHS.
1401 KnownOne |= KnownOne2;
1404 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1405 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1406 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1407 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1409 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1410 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1411 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1412 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1413 KnownZero = KnownZeroOut;
1417 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1418 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1419 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1420 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1421 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1423 // If low bits are zero in either operand, output low known-0 bits.
1424 // Also compute a conserative estimate for high known-0 bits.
1425 // More trickiness is possible, but this is sufficient for the
1426 // interesting case of alignment computation.
1428 unsigned TrailZ = KnownZero.countTrailingOnes() +
1429 KnownZero2.countTrailingOnes();
1430 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1431 KnownZero2.countLeadingOnes(),
1432 BitWidth) - BitWidth;
1434 TrailZ = std::min(TrailZ, BitWidth);
1435 LeadZ = std::min(LeadZ, BitWidth);
1436 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1437 APInt::getHighBitsSet(BitWidth, LeadZ);
1442 // For the purposes of computing leading zeros we can conservatively
1443 // treat a udiv as a logical right shift by the power of 2 known to
1444 // be less than the denominator.
1445 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1446 ComputeMaskedBits(Op.getOperand(0),
1447 AllOnes, KnownZero2, KnownOne2, Depth+1);
1448 unsigned LeadZ = KnownZero2.countLeadingOnes();
1452 ComputeMaskedBits(Op.getOperand(1),
1453 AllOnes, KnownZero2, KnownOne2, Depth+1);
1454 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1455 if (RHSUnknownLeadingOnes != BitWidth)
1456 LeadZ = std::min(BitWidth,
1457 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1459 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1463 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1464 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1465 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1466 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1468 // Only known if known in both the LHS and RHS.
1469 KnownOne &= KnownOne2;
1470 KnownZero &= KnownZero2;
1472 case ISD::SELECT_CC:
1473 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1474 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1475 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1476 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1478 // Only known if known in both the LHS and RHS.
1479 KnownOne &= KnownOne2;
1480 KnownZero &= KnownZero2;
1488 if (Op.getResNo() != 1)
1490 // The boolean result conforms to getBooleanContents. Fall through.
1492 // If we know the result of a setcc has the top bits zero, use this info.
1493 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1495 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1498 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1499 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1500 unsigned ShAmt = SA->getZExtValue();
1502 // If the shift count is an invalid immediate, don't do anything.
1503 if (ShAmt >= BitWidth)
1506 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1507 KnownZero, KnownOne, Depth+1);
1508 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1509 KnownZero <<= ShAmt;
1511 // low bits known zero.
1512 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1516 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1517 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1518 unsigned ShAmt = SA->getZExtValue();
1520 // If the shift count is an invalid immediate, don't do anything.
1521 if (ShAmt >= BitWidth)
1524 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1525 KnownZero, KnownOne, Depth+1);
1526 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1527 KnownZero = KnownZero.lshr(ShAmt);
1528 KnownOne = KnownOne.lshr(ShAmt);
1530 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1531 KnownZero |= HighBits; // High bits known zero.
1535 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1536 unsigned ShAmt = SA->getZExtValue();
1538 // If the shift count is an invalid immediate, don't do anything.
1539 if (ShAmt >= BitWidth)
1542 APInt InDemandedMask = (Mask << ShAmt);
1543 // If any of the demanded bits are produced by the sign extension, we also
1544 // demand the input sign bit.
1545 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1546 if (HighBits.getBoolValue())
1547 InDemandedMask |= APInt::getSignBit(BitWidth);
1549 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1551 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1552 KnownZero = KnownZero.lshr(ShAmt);
1553 KnownOne = KnownOne.lshr(ShAmt);
1555 // Handle the sign bits.
1556 APInt SignBit = APInt::getSignBit(BitWidth);
1557 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1559 if (KnownZero.intersects(SignBit)) {
1560 KnownZero |= HighBits; // New bits are known zero.
1561 } else if (KnownOne.intersects(SignBit)) {
1562 KnownOne |= HighBits; // New bits are known one.
1566 case ISD::SIGN_EXTEND_INREG: {
1567 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1568 unsigned EBits = EVT.getSizeInBits();
1570 // Sign extension. Compute the demanded bits in the result that are not
1571 // present in the input.
1572 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1574 APInt InSignBit = APInt::getSignBit(EBits);
1575 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1577 // If the sign extended bits are demanded, we know that the sign
1579 InSignBit.zext(BitWidth);
1580 if (NewBits.getBoolValue())
1581 InputDemandedBits |= InSignBit;
1583 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1584 KnownZero, KnownOne, Depth+1);
1585 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1587 // If the sign bit of the input is known set or clear, then we know the
1588 // top bits of the result.
1589 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1590 KnownZero |= NewBits;
1591 KnownOne &= ~NewBits;
1592 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1593 KnownOne |= NewBits;
1594 KnownZero &= ~NewBits;
1595 } else { // Input sign bit unknown
1596 KnownZero &= ~NewBits;
1597 KnownOne &= ~NewBits;
1604 unsigned LowBits = Log2_32(BitWidth)+1;
1605 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1610 if (ISD::isZEXTLoad(Op.getNode())) {
1611 LoadSDNode *LD = cast<LoadSDNode>(Op);
1612 MVT VT = LD->getMemoryVT();
1613 unsigned MemBits = VT.getSizeInBits();
1614 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1618 case ISD::ZERO_EXTEND: {
1619 MVT InVT = Op.getOperand(0).getValueType();
1620 unsigned InBits = InVT.getSizeInBits();
1621 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1622 APInt InMask = Mask;
1623 InMask.trunc(InBits);
1624 KnownZero.trunc(InBits);
1625 KnownOne.trunc(InBits);
1626 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1627 KnownZero.zext(BitWidth);
1628 KnownOne.zext(BitWidth);
1629 KnownZero |= NewBits;
1632 case ISD::SIGN_EXTEND: {
1633 MVT InVT = Op.getOperand(0).getValueType();
1634 unsigned InBits = InVT.getSizeInBits();
1635 APInt InSignBit = APInt::getSignBit(InBits);
1636 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1637 APInt InMask = Mask;
1638 InMask.trunc(InBits);
1640 // If any of the sign extended bits are demanded, we know that the sign
1641 // bit is demanded. Temporarily set this bit in the mask for our callee.
1642 if (NewBits.getBoolValue())
1643 InMask |= InSignBit;
1645 KnownZero.trunc(InBits);
1646 KnownOne.trunc(InBits);
1647 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1649 // Note if the sign bit is known to be zero or one.
1650 bool SignBitKnownZero = KnownZero.isNegative();
1651 bool SignBitKnownOne = KnownOne.isNegative();
1652 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1653 "Sign bit can't be known to be both zero and one!");
1655 // If the sign bit wasn't actually demanded by our caller, we don't
1656 // want it set in the KnownZero and KnownOne result values. Reset the
1657 // mask and reapply it to the result values.
1659 InMask.trunc(InBits);
1660 KnownZero &= InMask;
1663 KnownZero.zext(BitWidth);
1664 KnownOne.zext(BitWidth);
1666 // If the sign bit is known zero or one, the top bits match.
1667 if (SignBitKnownZero)
1668 KnownZero |= NewBits;
1669 else if (SignBitKnownOne)
1670 KnownOne |= NewBits;
1673 case ISD::ANY_EXTEND: {
1674 MVT InVT = Op.getOperand(0).getValueType();
1675 unsigned InBits = InVT.getSizeInBits();
1676 APInt InMask = Mask;
1677 InMask.trunc(InBits);
1678 KnownZero.trunc(InBits);
1679 KnownOne.trunc(InBits);
1680 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1681 KnownZero.zext(BitWidth);
1682 KnownOne.zext(BitWidth);
1685 case ISD::TRUNCATE: {
1686 MVT InVT = Op.getOperand(0).getValueType();
1687 unsigned InBits = InVT.getSizeInBits();
1688 APInt InMask = Mask;
1689 InMask.zext(InBits);
1690 KnownZero.zext(InBits);
1691 KnownOne.zext(InBits);
1692 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1694 KnownZero.trunc(BitWidth);
1695 KnownOne.trunc(BitWidth);
1698 case ISD::AssertZext: {
1699 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1700 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1701 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1703 KnownZero |= (~InMask) & Mask;
1707 // All bits are zero except the low bit.
1708 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1712 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1713 // We know that the top bits of C-X are clear if X contains less bits
1714 // than C (i.e. no wrap-around can happen). For example, 20-X is
1715 // positive if we can prove that X is >= 0 and < 16.
1716 if (CLHS->getAPIntValue().isNonNegative()) {
1717 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1718 // NLZ can't be BitWidth with no sign bit
1719 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1720 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1723 // If all of the MaskV bits are known to be zero, then we know the
1724 // output top bits are zero, because we now know that the output is
1726 if ((KnownZero2 & MaskV) == MaskV) {
1727 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1728 // Top bits known zero.
1729 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1736 // Output known-0 bits are known if clear or set in both the low clear bits
1737 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1738 // low 3 bits clear.
1739 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1740 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1741 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1742 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1744 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1745 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1746 KnownZeroOut = std::min(KnownZeroOut,
1747 KnownZero2.countTrailingOnes());
1749 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1753 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1754 const APInt &RA = Rem->getAPIntValue();
1755 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1756 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1757 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1758 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1760 // If the sign bit of the first operand is zero, the sign bit of
1761 // the result is zero. If the first operand has no one bits below
1762 // the second operand's single 1 bit, its sign will be zero.
1763 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1764 KnownZero2 |= ~LowBits;
1766 KnownZero |= KnownZero2 & Mask;
1768 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1773 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1774 const APInt &RA = Rem->getAPIntValue();
1775 if (RA.isPowerOf2()) {
1776 APInt LowBits = (RA - 1);
1777 APInt Mask2 = LowBits & Mask;
1778 KnownZero |= ~LowBits & Mask;
1779 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1780 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1785 // Since the result is less than or equal to either operand, any leading
1786 // zero bits in either operand must also exist in the result.
1787 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1788 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1790 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1793 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1794 KnownZero2.countLeadingOnes());
1796 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1800 // Allow the target to implement this method for its nodes.
1801 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1802 case ISD::INTRINSIC_WO_CHAIN:
1803 case ISD::INTRINSIC_W_CHAIN:
1804 case ISD::INTRINSIC_VOID:
1805 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1811 /// ComputeNumSignBits - Return the number of times the sign bit of the
1812 /// register is replicated into the other bits. We know that at least 1 bit
1813 /// is always equal to the sign bit (itself), but other cases can give us
1814 /// information. For example, immediately after an "SRA X, 2", we know that
1815 /// the top 3 bits are all equal to each other, so we return 3.
1816 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1817 MVT VT = Op.getValueType();
1818 assert(VT.isInteger() && "Invalid VT!");
1819 unsigned VTBits = VT.getSizeInBits();
1821 unsigned FirstAnswer = 1;
1824 return 1; // Limit search depth.
1826 switch (Op.getOpcode()) {
1828 case ISD::AssertSext:
1829 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1830 return VTBits-Tmp+1;
1831 case ISD::AssertZext:
1832 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1835 case ISD::Constant: {
1836 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1837 // If negative, return # leading ones.
1838 if (Val.isNegative())
1839 return Val.countLeadingOnes();
1841 // Return # leading zeros.
1842 return Val.countLeadingZeros();
1845 case ISD::SIGN_EXTEND:
1846 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1847 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1849 case ISD::SIGN_EXTEND_INREG:
1850 // Max of the input and what this extends.
1851 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1854 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1855 return std::max(Tmp, Tmp2);
1858 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1859 // SRA X, C -> adds C sign bits.
1860 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1861 Tmp += C->getZExtValue();
1862 if (Tmp > VTBits) Tmp = VTBits;
1866 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1867 // shl destroys sign bits.
1868 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1869 if (C->getZExtValue() >= VTBits || // Bad shift.
1870 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1871 return Tmp - C->getZExtValue();
1876 case ISD::XOR: // NOT is handled here.
1877 // Logical binary ops preserve the number of sign bits at the worst.
1878 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1880 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1881 FirstAnswer = std::min(Tmp, Tmp2);
1882 // We computed what we know about the sign bits as our first
1883 // answer. Now proceed to the generic code that uses
1884 // ComputeMaskedBits, and pick whichever answer is better.
1889 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1890 if (Tmp == 1) return 1; // Early out.
1891 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1892 return std::min(Tmp, Tmp2);
1900 if (Op.getResNo() != 1)
1902 // The boolean result conforms to getBooleanContents. Fall through.
1904 // If setcc returns 0/-1, all bits are sign bits.
1905 if (TLI.getBooleanContents() ==
1906 TargetLowering::ZeroOrNegativeOneBooleanContent)
1911 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1912 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1914 // Handle rotate right by N like a rotate left by 32-N.
1915 if (Op.getOpcode() == ISD::ROTR)
1916 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1918 // If we aren't rotating out all of the known-in sign bits, return the
1919 // number that are left. This handles rotl(sext(x), 1) for example.
1920 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1921 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1925 // Add can have at most one carry bit. Thus we know that the output
1926 // is, at worst, one more bit than the inputs.
1927 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1928 if (Tmp == 1) return 1; // Early out.
1930 // Special case decrementing a value (ADD X, -1):
1931 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1932 if (CRHS->isAllOnesValue()) {
1933 APInt KnownZero, KnownOne;
1934 APInt Mask = APInt::getAllOnesValue(VTBits);
1935 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1937 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1939 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1942 // If we are subtracting one from a positive number, there is no carry
1943 // out of the result.
1944 if (KnownZero.isNegative())
1948 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1949 if (Tmp2 == 1) return 1;
1950 return std::min(Tmp, Tmp2)-1;
1954 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1955 if (Tmp2 == 1) return 1;
1958 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1959 if (CLHS->isNullValue()) {
1960 APInt KnownZero, KnownOne;
1961 APInt Mask = APInt::getAllOnesValue(VTBits);
1962 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1963 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1965 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1968 // If the input is known to be positive (the sign bit is known clear),
1969 // the output of the NEG has the same number of sign bits as the input.
1970 if (KnownZero.isNegative())
1973 // Otherwise, we treat this like a SUB.
1976 // Sub can have at most one carry bit. Thus we know that the output
1977 // is, at worst, one more bit than the inputs.
1978 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1979 if (Tmp == 1) return 1; // Early out.
1980 return std::min(Tmp, Tmp2)-1;
1983 // FIXME: it's tricky to do anything useful for this, but it is an important
1984 // case for targets like X86.
1988 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1989 if (Op.getOpcode() == ISD::LOAD) {
1990 LoadSDNode *LD = cast<LoadSDNode>(Op);
1991 unsigned ExtType = LD->getExtensionType();
1994 case ISD::SEXTLOAD: // '17' bits known
1995 Tmp = LD->getMemoryVT().getSizeInBits();
1996 return VTBits-Tmp+1;
1997 case ISD::ZEXTLOAD: // '16' bits known
1998 Tmp = LD->getMemoryVT().getSizeInBits();
2003 // Allow the target to implement this method for its nodes.
2004 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2005 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2006 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2007 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2008 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2009 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2012 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2013 // use this information.
2014 APInt KnownZero, KnownOne;
2015 APInt Mask = APInt::getAllOnesValue(VTBits);
2016 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2018 if (KnownZero.isNegative()) { // sign bit is 0
2020 } else if (KnownOne.isNegative()) { // sign bit is 1;
2027 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2028 // the number of identical bits in the top of the input value.
2030 Mask <<= Mask.getBitWidth()-VTBits;
2031 // Return # leading zeros. We use 'min' here in case Val was zero before
2032 // shifting. We don't want to return '64' as for an i32 "0".
2033 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2037 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2038 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2039 if (!GA) return false;
2040 if (GA->getOffset() != 0) return false;
2041 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2042 if (!GV) return false;
2043 MachineModuleInfo *MMI = getMachineModuleInfo();
2044 return MMI && MMI->hasDebugInfo();
2048 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2049 /// element of the result of the vector shuffle.
2050 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2051 MVT VT = N->getValueType(0);
2052 SDValue PermMask = N->getOperand(2);
2053 SDValue Idx = PermMask.getOperand(i);
2054 if (Idx.getOpcode() == ISD::UNDEF)
2055 return getNode(ISD::UNDEF, VT.getVectorElementType());
2056 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2057 unsigned NumElems = PermMask.getNumOperands();
2058 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2061 if (V.getOpcode() == ISD::BIT_CONVERT) {
2062 V = V.getOperand(0);
2063 MVT VVT = V.getValueType();
2064 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2067 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2068 return (Index == 0) ? V.getOperand(0)
2069 : getNode(ISD::UNDEF, VT.getVectorElementType());
2070 if (V.getOpcode() == ISD::BUILD_VECTOR)
2071 return V.getOperand(Index);
2072 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2073 return getShuffleScalarElt(V.getNode(), Index);
2078 /// getNode - Gets or creates the specified node.
2080 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2081 FoldingSetNodeID ID;
2082 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2085 return SDValue(E, 0);
2086 SDNode *N = NodeAllocator.Allocate<SDNode>();
2087 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2088 CSEMap.InsertNode(N, IP);
2090 AllNodes.push_back(N);
2094 return SDValue(N, 0);
2097 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2098 // Constant fold unary operations with an integer constant operand.
2099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2100 const APInt &Val = C->getAPIntValue();
2101 unsigned BitWidth = VT.getSizeInBits();
2104 case ISD::SIGN_EXTEND:
2105 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2106 case ISD::ANY_EXTEND:
2107 case ISD::ZERO_EXTEND:
2109 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2110 case ISD::UINT_TO_FP:
2111 case ISD::SINT_TO_FP: {
2112 const uint64_t zero[] = {0, 0};
2113 // No compile time operations on this type.
2114 if (VT==MVT::ppcf128)
2116 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2117 (void)apf.convertFromAPInt(Val,
2118 Opcode==ISD::SINT_TO_FP,
2119 APFloat::rmNearestTiesToEven);
2120 return getConstantFP(apf, VT);
2122 case ISD::BIT_CONVERT:
2123 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2124 return getConstantFP(Val.bitsToFloat(), VT);
2125 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2126 return getConstantFP(Val.bitsToDouble(), VT);
2129 return getConstant(Val.byteSwap(), VT);
2131 return getConstant(Val.countPopulation(), VT);
2133 return getConstant(Val.countLeadingZeros(), VT);
2135 return getConstant(Val.countTrailingZeros(), VT);
2139 // Constant fold unary operations with a floating point constant operand.
2140 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2141 APFloat V = C->getValueAPF(); // make copy
2142 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2146 return getConstantFP(V, VT);
2149 return getConstantFP(V, VT);
2151 case ISD::FP_EXTEND: {
2153 // This can return overflow, underflow, or inexact; we don't care.
2154 // FIXME need to be more flexible about rounding mode.
2155 (void)V.convert(*MVTToAPFloatSemantics(VT),
2156 APFloat::rmNearestTiesToEven, &ignored);
2157 return getConstantFP(V, VT);
2159 case ISD::FP_TO_SINT:
2160 case ISD::FP_TO_UINT: {
2163 assert(integerPartWidth >= 64);
2164 // FIXME need to be more flexible about rounding mode.
2165 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2166 Opcode==ISD::FP_TO_SINT,
2167 APFloat::rmTowardZero, &ignored);
2168 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2170 return getConstant(x, VT);
2172 case ISD::BIT_CONVERT:
2173 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2174 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2175 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2176 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2182 unsigned OpOpcode = Operand.getNode()->getOpcode();
2184 case ISD::TokenFactor:
2185 case ISD::MERGE_VALUES:
2186 case ISD::CONCAT_VECTORS:
2187 return Operand; // Factor, merge or concat of one node? No need.
2188 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2189 case ISD::FP_EXTEND:
2190 assert(VT.isFloatingPoint() &&
2191 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2192 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2193 if (Operand.getOpcode() == ISD::UNDEF)
2194 return getNode(ISD::UNDEF, VT);
2196 case ISD::SIGN_EXTEND:
2197 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2198 "Invalid SIGN_EXTEND!");
2199 if (Operand.getValueType() == VT) return Operand; // noop extension
2200 assert(Operand.getValueType().bitsLT(VT)
2201 && "Invalid sext node, dst < src!");
2202 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2203 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2205 case ISD::ZERO_EXTEND:
2206 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2207 "Invalid ZERO_EXTEND!");
2208 if (Operand.getValueType() == VT) return Operand; // noop extension
2209 assert(Operand.getValueType().bitsLT(VT)
2210 && "Invalid zext node, dst < src!");
2211 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2212 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2214 case ISD::ANY_EXTEND:
2215 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2216 "Invalid ANY_EXTEND!");
2217 if (Operand.getValueType() == VT) return Operand; // noop extension
2218 assert(Operand.getValueType().bitsLT(VT)
2219 && "Invalid anyext node, dst < src!");
2220 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2221 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2222 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2225 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2226 "Invalid TRUNCATE!");
2227 if (Operand.getValueType() == VT) return Operand; // noop truncate
2228 assert(Operand.getValueType().bitsGT(VT)
2229 && "Invalid truncate node, src < dst!");
2230 if (OpOpcode == ISD::TRUNCATE)
2231 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2232 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2233 OpOpcode == ISD::ANY_EXTEND) {
2234 // If the source is smaller than the dest, we still need an extend.
2235 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2236 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2237 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2238 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2240 return Operand.getNode()->getOperand(0);
2243 case ISD::BIT_CONVERT:
2244 // Basic sanity checking.
2245 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2246 && "Cannot BIT_CONVERT between types of different sizes!");
2247 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2248 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2249 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2250 if (OpOpcode == ISD::UNDEF)
2251 return getNode(ISD::UNDEF, VT);
2253 case ISD::SCALAR_TO_VECTOR:
2254 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2255 VT.getVectorElementType() == Operand.getValueType() &&
2256 "Illegal SCALAR_TO_VECTOR node!");
2257 if (OpOpcode == ISD::UNDEF)
2258 return getNode(ISD::UNDEF, VT);
2259 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2260 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2261 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2262 Operand.getConstantOperandVal(1) == 0 &&
2263 Operand.getOperand(0).getValueType() == VT)
2264 return Operand.getOperand(0);
2267 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2268 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2269 Operand.getNode()->getOperand(0));
2270 if (OpOpcode == ISD::FNEG) // --X -> X
2271 return Operand.getNode()->getOperand(0);
2274 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2275 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2280 SDVTList VTs = getVTList(VT);
2281 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2282 FoldingSetNodeID ID;
2283 SDValue Ops[1] = { Operand };
2284 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2287 return SDValue(E, 0);
2288 N = NodeAllocator.Allocate<UnarySDNode>();
2289 new (N) UnarySDNode(Opcode, VTs, Operand);
2290 CSEMap.InsertNode(N, IP);
2292 N = NodeAllocator.Allocate<UnarySDNode>();
2293 new (N) UnarySDNode(Opcode, VTs, Operand);
2296 AllNodes.push_back(N);
2300 return SDValue(N, 0);
2303 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2305 ConstantSDNode *Cst1,
2306 ConstantSDNode *Cst2) {
2307 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2310 case ISD::ADD: return getConstant(C1 + C2, VT);
2311 case ISD::SUB: return getConstant(C1 - C2, VT);
2312 case ISD::MUL: return getConstant(C1 * C2, VT);
2314 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2317 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2320 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2323 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2325 case ISD::AND: return getConstant(C1 & C2, VT);
2326 case ISD::OR: return getConstant(C1 | C2, VT);
2327 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2328 case ISD::SHL: return getConstant(C1 << C2, VT);
2329 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2330 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2331 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2332 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2339 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2340 SDValue N1, SDValue N2) {
2341 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2342 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2345 case ISD::TokenFactor:
2346 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2347 N2.getValueType() == MVT::Other && "Invalid token factor!");
2348 // Fold trivial token factors.
2349 if (N1.getOpcode() == ISD::EntryToken) return N2;
2350 if (N2.getOpcode() == ISD::EntryToken) return N1;
2351 if (N1 == N2) return N1;
2353 case ISD::CONCAT_VECTORS:
2354 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2355 // one big BUILD_VECTOR.
2356 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2357 N2.getOpcode() == ISD::BUILD_VECTOR) {
2358 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2359 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2360 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2364 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2365 N1.getValueType() == VT && "Binary operator types must match!");
2366 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2367 // worth handling here.
2368 if (N2C && N2C->isNullValue())
2370 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2377 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2378 N1.getValueType() == VT && "Binary operator types must match!");
2379 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2380 // it's worth handling here.
2381 if (N2C && N2C->isNullValue())
2388 assert(VT.isInteger() && "This operator does not apply to FP types!");
2398 assert(N1.getValueType() == N2.getValueType() &&
2399 N1.getValueType() == VT && "Binary operator types must match!");
2401 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2402 assert(N1.getValueType() == VT &&
2403 N1.getValueType().isFloatingPoint() &&
2404 N2.getValueType().isFloatingPoint() &&
2405 "Invalid FCOPYSIGN!");
2412 assert(VT == N1.getValueType() &&
2413 "Shift operators return type must be the same as their first arg");
2414 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2415 "Shifts only work on integers");
2416 assert((N2.getValueType() == TLI.getShiftAmountTy() ||
2417 (N2.getValueType().isVector() && N2.getValueType().isInteger())) &&
2418 "Wrong type for shift amount");
2420 // Always fold shifts of i1 values so the code generator doesn't need to
2421 // handle them. Since we know the size of the shift has to be less than the
2422 // size of the value, the shift/rotate count is guaranteed to be zero.
2426 case ISD::FP_ROUND_INREG: {
2427 MVT EVT = cast<VTSDNode>(N2)->getVT();
2428 assert(VT == N1.getValueType() && "Not an inreg round!");
2429 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2430 "Cannot FP_ROUND_INREG integer types");
2431 assert(EVT.bitsLE(VT) && "Not rounding down!");
2432 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2436 assert(VT.isFloatingPoint() &&
2437 N1.getValueType().isFloatingPoint() &&
2438 VT.bitsLE(N1.getValueType()) &&
2439 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2440 if (N1.getValueType() == VT) return N1; // noop conversion.
2442 case ISD::AssertSext:
2443 case ISD::AssertZext: {
2444 MVT EVT = cast<VTSDNode>(N2)->getVT();
2445 assert(VT == N1.getValueType() && "Not an inreg extend!");
2446 assert(VT.isInteger() && EVT.isInteger() &&
2447 "Cannot *_EXTEND_INREG FP types");
2448 assert(EVT.bitsLE(VT) && "Not extending!");
2449 if (VT == EVT) return N1; // noop assertion.
2452 case ISD::SIGN_EXTEND_INREG: {
2453 MVT EVT = cast<VTSDNode>(N2)->getVT();
2454 assert(VT == N1.getValueType() && "Not an inreg extend!");
2455 assert(VT.isInteger() && EVT.isInteger() &&
2456 "Cannot *_EXTEND_INREG FP types");
2457 assert(EVT.bitsLE(VT) && "Not extending!");
2458 if (EVT == VT) return N1; // Not actually extending
2461 APInt Val = N1C->getAPIntValue();
2462 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2463 Val <<= Val.getBitWidth()-FromBits;
2464 Val = Val.ashr(Val.getBitWidth()-FromBits);
2465 return getConstant(Val, VT);
2469 case ISD::EXTRACT_VECTOR_ELT:
2470 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2471 if (N1.getOpcode() == ISD::UNDEF)
2472 return getNode(ISD::UNDEF, VT);
2474 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2475 // expanding copies of large vectors from registers.
2477 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2478 N1.getNumOperands() > 0) {
2480 N1.getOperand(0).getValueType().getVectorNumElements();
2481 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2482 N1.getOperand(N2C->getZExtValue() / Factor),
2483 getConstant(N2C->getZExtValue() % Factor,
2484 N2.getValueType()));
2487 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2488 // expanding large vector constants.
2489 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2490 return N1.getOperand(N2C->getZExtValue());
2492 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2493 // operations are lowered to scalars.
2494 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2495 if (N1.getOperand(2) == N2)
2496 return N1.getOperand(1);
2498 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2501 case ISD::EXTRACT_ELEMENT:
2502 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2503 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2504 (N1.getValueType().isInteger() == VT.isInteger()) &&
2505 "Wrong types for EXTRACT_ELEMENT!");
2507 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2508 // 64-bit integers into 32-bit parts. Instead of building the extract of
2509 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2510 if (N1.getOpcode() == ISD::BUILD_PAIR)
2511 return N1.getOperand(N2C->getZExtValue());
2513 // EXTRACT_ELEMENT of a constant int is also very common.
2514 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2515 unsigned ElementSize = VT.getSizeInBits();
2516 unsigned Shift = ElementSize * N2C->getZExtValue();
2517 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2518 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2521 case ISD::EXTRACT_SUBVECTOR:
2522 if (N1.getValueType() == VT) // Trivial extraction.
2529 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2530 if (SV.getNode()) return SV;
2531 } else { // Cannonicalize constant to RHS if commutative
2532 if (isCommutativeBinOp(Opcode)) {
2533 std::swap(N1C, N2C);
2539 // Constant fold FP operations.
2540 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2541 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2543 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2544 // Cannonicalize constant to RHS if commutative
2545 std::swap(N1CFP, N2CFP);
2547 } else if (N2CFP && VT != MVT::ppcf128) {
2548 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2549 APFloat::opStatus s;
2552 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2553 if (s != APFloat::opInvalidOp)
2554 return getConstantFP(V1, VT);
2557 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2558 if (s!=APFloat::opInvalidOp)
2559 return getConstantFP(V1, VT);
2562 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2563 if (s!=APFloat::opInvalidOp)
2564 return getConstantFP(V1, VT);
2567 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2568 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2569 return getConstantFP(V1, VT);
2572 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2573 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2574 return getConstantFP(V1, VT);
2576 case ISD::FCOPYSIGN:
2578 return getConstantFP(V1, VT);
2584 // Canonicalize an UNDEF to the RHS, even over a constant.
2585 if (N1.getOpcode() == ISD::UNDEF) {
2586 if (isCommutativeBinOp(Opcode)) {
2590 case ISD::FP_ROUND_INREG:
2591 case ISD::SIGN_EXTEND_INREG:
2597 return N1; // fold op(undef, arg2) -> undef
2605 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2606 // For vectors, we can't easily build an all zero vector, just return
2613 // Fold a bunch of operators when the RHS is undef.
2614 if (N2.getOpcode() == ISD::UNDEF) {
2617 if (N1.getOpcode() == ISD::UNDEF)
2618 // Handle undef ^ undef -> 0 special case. This is a common
2620 return getConstant(0, VT);
2635 return N2; // fold op(arg1, undef) -> undef
2641 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2642 // For vectors, we can't easily build an all zero vector, just return
2647 return getConstant(VT.getIntegerVTBitMask(), VT);
2648 // For vectors, we can't easily build an all one vector, just return
2656 // Memoize this node if possible.
2658 SDVTList VTs = getVTList(VT);
2659 if (VT != MVT::Flag) {
2660 SDValue Ops[] = { N1, N2 };
2661 FoldingSetNodeID ID;
2662 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2664 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2665 return SDValue(E, 0);
2666 N = NodeAllocator.Allocate<BinarySDNode>();
2667 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2668 CSEMap.InsertNode(N, IP);
2670 N = NodeAllocator.Allocate<BinarySDNode>();
2671 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2674 AllNodes.push_back(N);
2678 return SDValue(N, 0);
2681 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2682 SDValue N1, SDValue N2, SDValue N3) {
2683 // Perform various simplifications.
2684 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2685 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2687 case ISD::CONCAT_VECTORS:
2688 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2689 // one big BUILD_VECTOR.
2690 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2691 N2.getOpcode() == ISD::BUILD_VECTOR &&
2692 N3.getOpcode() == ISD::BUILD_VECTOR) {
2693 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2694 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2695 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2696 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2700 // Use FoldSetCC to simplify SETCC's.
2701 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2702 if (Simp.getNode()) return Simp;
2707 if (N1C->getZExtValue())
2708 return N2; // select true, X, Y -> X
2710 return N3; // select false, X, Y -> Y
2713 if (N2 == N3) return N2; // select C, X, X -> X
2717 if (N2C->getZExtValue()) // Unconditional branch
2718 return getNode(ISD::BR, MVT::Other, N1, N3);
2720 return N1; // Never-taken branch
2723 case ISD::VECTOR_SHUFFLE:
2724 assert(N1.getValueType() == N2.getValueType() &&
2725 N1.getValueType().isVector() &&
2726 VT.isVector() && N3.getValueType().isVector() &&
2727 N3.getOpcode() == ISD::BUILD_VECTOR &&
2728 VT.getVectorNumElements() == N3.getNumOperands() &&
2729 "Illegal VECTOR_SHUFFLE node!");
2731 case ISD::BIT_CONVERT:
2732 // Fold bit_convert nodes from a type to themselves.
2733 if (N1.getValueType() == VT)
2738 // Memoize node if it doesn't produce a flag.
2740 SDVTList VTs = getVTList(VT);
2741 if (VT != MVT::Flag) {
2742 SDValue Ops[] = { N1, N2, N3 };
2743 FoldingSetNodeID ID;
2744 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2746 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2747 return SDValue(E, 0);
2748 N = NodeAllocator.Allocate<TernarySDNode>();
2749 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2750 CSEMap.InsertNode(N, IP);
2752 N = NodeAllocator.Allocate<TernarySDNode>();
2753 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2755 AllNodes.push_back(N);
2759 return SDValue(N, 0);
2762 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2763 SDValue N1, SDValue N2, SDValue N3,
2765 SDValue Ops[] = { N1, N2, N3, N4 };
2766 return getNode(Opcode, VT, Ops, 4);
2769 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2770 SDValue N1, SDValue N2, SDValue N3,
2771 SDValue N4, SDValue N5) {
2772 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2773 return getNode(Opcode, VT, Ops, 5);
2776 /// getMemsetValue - Vectorized representation of the memset value
2778 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2779 unsigned NumBits = VT.isVector() ?
2780 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2781 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2782 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2784 for (unsigned i = NumBits; i > 8; i >>= 1) {
2785 Val = (Val << Shift) | Val;
2789 return DAG.getConstant(Val, VT);
2790 return DAG.getConstantFP(APFloat(Val), VT);
2793 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2794 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2796 for (unsigned i = NumBits; i > 8; i >>= 1) {
2797 Value = DAG.getNode(ISD::OR, VT,
2798 DAG.getNode(ISD::SHL, VT, Value,
2799 DAG.getConstant(Shift,
2800 TLI.getShiftAmountTy())),
2808 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2809 /// used when a memcpy is turned into a memset when the source is a constant
2811 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2812 const TargetLowering &TLI,
2813 std::string &Str, unsigned Offset) {
2814 // Handle vector with all elements zero.
2817 return DAG.getConstant(0, VT);
2818 unsigned NumElts = VT.getVectorNumElements();
2819 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2820 return DAG.getNode(ISD::BIT_CONVERT, VT,
2821 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2824 assert(!VT.isVector() && "Can't handle vector type here!");
2825 unsigned NumBits = VT.getSizeInBits();
2826 unsigned MSB = NumBits / 8;
2828 if (TLI.isLittleEndian())
2829 Offset = Offset + MSB - 1;
2830 for (unsigned i = 0; i != MSB; ++i) {
2831 Val = (Val << 8) | (unsigned char)Str[Offset];
2832 Offset += TLI.isLittleEndian() ? -1 : 1;
2834 return DAG.getConstant(Val, VT);
2837 /// getMemBasePlusOffset - Returns base and offset node for the
2839 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2840 SelectionDAG &DAG) {
2841 MVT VT = Base.getValueType();
2842 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2845 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2847 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2848 unsigned SrcDelta = 0;
2849 GlobalAddressSDNode *G = NULL;
2850 if (Src.getOpcode() == ISD::GlobalAddress)
2851 G = cast<GlobalAddressSDNode>(Src);
2852 else if (Src.getOpcode() == ISD::ADD &&
2853 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2854 Src.getOperand(1).getOpcode() == ISD::Constant) {
2855 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2856 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2861 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2862 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2868 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2869 /// to replace the memset / memcpy is below the threshold. It also returns the
2870 /// types of the sequence of memory ops to perform memset / memcpy.
2872 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2873 SDValue Dst, SDValue Src,
2874 unsigned Limit, uint64_t Size, unsigned &Align,
2875 std::string &Str, bool &isSrcStr,
2877 const TargetLowering &TLI) {
2878 isSrcStr = isMemSrcFromString(Src, Str);
2879 bool isSrcConst = isa<ConstantSDNode>(Src);
2880 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2881 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2882 if (VT != MVT::iAny) {
2883 unsigned NewAlign = (unsigned)
2884 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2885 // If source is a string constant, this will require an unaligned load.
2886 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2887 if (Dst.getOpcode() != ISD::FrameIndex) {
2888 // Can't change destination alignment. It requires a unaligned store.
2892 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2893 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2894 if (MFI->isFixedObjectIndex(FI)) {
2895 // Can't change destination alignment. It requires a unaligned store.
2899 // Give the stack frame object a larger alignment if needed.
2900 if (MFI->getObjectAlignment(FI) < NewAlign)
2901 MFI->setObjectAlignment(FI, NewAlign);
2908 if (VT == MVT::iAny) {
2912 switch (Align & 7) {
2913 case 0: VT = MVT::i64; break;
2914 case 4: VT = MVT::i32; break;
2915 case 2: VT = MVT::i16; break;
2916 default: VT = MVT::i8; break;
2921 while (!TLI.isTypeLegal(LVT))
2922 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2923 assert(LVT.isInteger());
2929 unsigned NumMemOps = 0;
2931 unsigned VTSize = VT.getSizeInBits() / 8;
2932 while (VTSize > Size) {
2933 // For now, only use non-vector load / store's for the left-over pieces.
2934 if (VT.isVector()) {
2936 while (!TLI.isTypeLegal(VT))
2937 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2938 VTSize = VT.getSizeInBits() / 8;
2940 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2945 if (++NumMemOps > Limit)
2947 MemOps.push_back(VT);
2954 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2955 SDValue Chain, SDValue Dst,
2956 SDValue Src, uint64_t Size,
2957 unsigned Align, bool AlwaysInline,
2958 const Value *DstSV, uint64_t DstSVOff,
2959 const Value *SrcSV, uint64_t SrcSVOff){
2960 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2962 // Expand memcpy to a series of load and store ops if the size operand falls
2963 // below a certain threshold.
2964 std::vector<MVT> MemOps;
2965 uint64_t Limit = -1ULL;
2967 Limit = TLI.getMaxStoresPerMemcpy();
2968 unsigned DstAlign = Align; // Destination alignment can change.
2971 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2972 Str, CopyFromStr, DAG, TLI))
2976 bool isZeroStr = CopyFromStr && Str.empty();
2977 SmallVector<SDValue, 8> OutChains;
2978 unsigned NumMemOps = MemOps.size();
2979 uint64_t SrcOff = 0, DstOff = 0;
2980 for (unsigned i = 0; i < NumMemOps; i++) {
2982 unsigned VTSize = VT.getSizeInBits() / 8;
2983 SDValue Value, Store;
2985 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2986 // It's unlikely a store of a vector immediate can be done in a single
2987 // instruction. It would require a load from a constantpool first.
2988 // We also handle store a vector with all zero's.
2989 // FIXME: Handle other cases where store of vector immediate is done in
2990 // a single instruction.
2991 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2992 Store = DAG.getStore(Chain, Value,
2993 getMemBasePlusOffset(Dst, DstOff, DAG),
2994 DstSV, DstSVOff + DstOff, false, DstAlign);
2996 Value = DAG.getLoad(VT, Chain,
2997 getMemBasePlusOffset(Src, SrcOff, DAG),
2998 SrcSV, SrcSVOff + SrcOff, false, Align);
2999 Store = DAG.getStore(Chain, Value,
3000 getMemBasePlusOffset(Dst, DstOff, DAG),
3001 DstSV, DstSVOff + DstOff, false, DstAlign);
3003 OutChains.push_back(Store);
3008 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3009 &OutChains[0], OutChains.size());
3012 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3013 SDValue Chain, SDValue Dst,
3014 SDValue Src, uint64_t Size,
3015 unsigned Align, bool AlwaysInline,
3016 const Value *DstSV, uint64_t DstSVOff,
3017 const Value *SrcSV, uint64_t SrcSVOff){
3018 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3020 // Expand memmove to a series of load and store ops if the size operand falls
3021 // below a certain threshold.
3022 std::vector<MVT> MemOps;
3023 uint64_t Limit = -1ULL;
3025 Limit = TLI.getMaxStoresPerMemmove();
3026 unsigned DstAlign = Align; // Destination alignment can change.
3029 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3030 Str, CopyFromStr, DAG, TLI))
3033 uint64_t SrcOff = 0, DstOff = 0;
3035 SmallVector<SDValue, 8> LoadValues;
3036 SmallVector<SDValue, 8> LoadChains;
3037 SmallVector<SDValue, 8> OutChains;
3038 unsigned NumMemOps = MemOps.size();
3039 for (unsigned i = 0; i < NumMemOps; i++) {
3041 unsigned VTSize = VT.getSizeInBits() / 8;
3042 SDValue Value, Store;
3044 Value = DAG.getLoad(VT, Chain,
3045 getMemBasePlusOffset(Src, SrcOff, DAG),
3046 SrcSV, SrcSVOff + SrcOff, false, Align);
3047 LoadValues.push_back(Value);
3048 LoadChains.push_back(Value.getValue(1));
3051 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3052 &LoadChains[0], LoadChains.size());
3054 for (unsigned i = 0; i < NumMemOps; i++) {
3056 unsigned VTSize = VT.getSizeInBits() / 8;
3057 SDValue Value, Store;
3059 Store = DAG.getStore(Chain, LoadValues[i],
3060 getMemBasePlusOffset(Dst, DstOff, DAG),
3061 DstSV, DstSVOff + DstOff, false, DstAlign);
3062 OutChains.push_back(Store);
3066 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3067 &OutChains[0], OutChains.size());
3070 static SDValue getMemsetStores(SelectionDAG &DAG,
3071 SDValue Chain, SDValue Dst,
3072 SDValue Src, uint64_t Size,
3074 const Value *DstSV, uint64_t DstSVOff) {
3075 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3077 // Expand memset to a series of load/store ops if the size operand
3078 // falls below a certain threshold.
3079 std::vector<MVT> MemOps;
3082 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3083 Size, Align, Str, CopyFromStr, DAG, TLI))
3086 SmallVector<SDValue, 8> OutChains;
3087 uint64_t DstOff = 0;
3089 unsigned NumMemOps = MemOps.size();
3090 for (unsigned i = 0; i < NumMemOps; i++) {
3092 unsigned VTSize = VT.getSizeInBits() / 8;
3093 SDValue Value = getMemsetValue(Src, VT, DAG);
3094 SDValue Store = DAG.getStore(Chain, Value,
3095 getMemBasePlusOffset(Dst, DstOff, DAG),
3096 DstSV, DstSVOff + DstOff);
3097 OutChains.push_back(Store);
3101 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3102 &OutChains[0], OutChains.size());
3105 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3106 SDValue Src, SDValue Size,
3107 unsigned Align, bool AlwaysInline,
3108 const Value *DstSV, uint64_t DstSVOff,
3109 const Value *SrcSV, uint64_t SrcSVOff) {
3111 // Check to see if we should lower the memcpy to loads and stores first.
3112 // For cases within the target-specified limits, this is the best choice.
3113 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3115 // Memcpy with size zero? Just return the original chain.
3116 if (ConstantSize->isNullValue())
3120 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3121 ConstantSize->getZExtValue(),
3122 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3123 if (Result.getNode())
3127 // Then check to see if we should lower the memcpy with target-specific
3128 // code. If the target chooses to do this, this is the next best.
3130 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3132 DstSV, DstSVOff, SrcSV, SrcSVOff);
3133 if (Result.getNode())
3136 // If we really need inline code and the target declined to provide it,
3137 // use a (potentially long) sequence of loads and stores.
3139 assert(ConstantSize && "AlwaysInline requires a constant size!");
3140 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3141 ConstantSize->getZExtValue(), Align, true,
3142 DstSV, DstSVOff, SrcSV, SrcSVOff);
3145 // Emit a library call.
3146 TargetLowering::ArgListTy Args;
3147 TargetLowering::ArgListEntry Entry;
3148 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3149 Entry.Node = Dst; Args.push_back(Entry);
3150 Entry.Node = Src; Args.push_back(Entry);
3151 Entry.Node = Size; Args.push_back(Entry);
3152 std::pair<SDValue,SDValue> CallResult =
3153 TLI.LowerCallTo(Chain, Type::VoidTy,
3154 false, false, false, false, CallingConv::C, false,
3155 getExternalSymbol("memcpy", TLI.getPointerTy()),
3157 return CallResult.second;
3160 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3161 SDValue Src, SDValue Size,
3163 const Value *DstSV, uint64_t DstSVOff,
3164 const Value *SrcSV, uint64_t SrcSVOff) {
3166 // Check to see if we should lower the memmove to loads and stores first.
3167 // For cases within the target-specified limits, this is the best choice.
3168 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3170 // Memmove with size zero? Just return the original chain.
3171 if (ConstantSize->isNullValue())
3175 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3176 ConstantSize->getZExtValue(),
3177 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3178 if (Result.getNode())
3182 // Then check to see if we should lower the memmove with target-specific
3183 // code. If the target chooses to do this, this is the next best.
3185 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3186 DstSV, DstSVOff, SrcSV, SrcSVOff);
3187 if (Result.getNode())
3190 // Emit a library call.
3191 TargetLowering::ArgListTy Args;
3192 TargetLowering::ArgListEntry Entry;
3193 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3194 Entry.Node = Dst; Args.push_back(Entry);
3195 Entry.Node = Src; Args.push_back(Entry);
3196 Entry.Node = Size; Args.push_back(Entry);
3197 std::pair<SDValue,SDValue> CallResult =
3198 TLI.LowerCallTo(Chain, Type::VoidTy,
3199 false, false, false, false, CallingConv::C, false,
3200 getExternalSymbol("memmove", TLI.getPointerTy()),
3202 return CallResult.second;
3205 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3206 SDValue Src, SDValue Size,
3208 const Value *DstSV, uint64_t DstSVOff) {
3210 // Check to see if we should lower the memset to stores first.
3211 // For cases within the target-specified limits, this is the best choice.
3212 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3214 // Memset with size zero? Just return the original chain.
3215 if (ConstantSize->isNullValue())
3219 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3220 Align, DstSV, DstSVOff);
3221 if (Result.getNode())
3225 // Then check to see if we should lower the memset with target-specific
3226 // code. If the target chooses to do this, this is the next best.
3228 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3230 if (Result.getNode())
3233 // Emit a library call.
3234 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3235 TargetLowering::ArgListTy Args;
3236 TargetLowering::ArgListEntry Entry;
3237 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3238 Args.push_back(Entry);
3239 // Extend or truncate the argument to be an i32 value for the call.
3240 if (Src.getValueType().bitsGT(MVT::i32))
3241 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3243 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3244 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3245 Args.push_back(Entry);
3246 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3247 Args.push_back(Entry);
3248 std::pair<SDValue,SDValue> CallResult =
3249 TLI.LowerCallTo(Chain, Type::VoidTy,
3250 false, false, false, false, CallingConv::C, false,
3251 getExternalSymbol("memset", TLI.getPointerTy()),
3253 return CallResult.second;
3256 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3258 SDValue Ptr, SDValue Cmp,
3259 SDValue Swp, const Value* PtrVal,
3260 unsigned Alignment) {
3261 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3262 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3264 MVT VT = Cmp.getValueType();
3266 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3267 Alignment = getMVTAlignment(MemVT);
3269 SDVTList VTs = getVTList(VT, MVT::Other);
3270 FoldingSetNodeID ID;
3271 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3272 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3274 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3275 return SDValue(E, 0);
3276 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3277 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3278 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3279 CSEMap.InsertNode(N, IP);
3280 AllNodes.push_back(N);
3281 return SDValue(N, 0);
3284 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3286 SDValue Ptr, SDValue Val,
3287 const Value* PtrVal,
3288 unsigned Alignment) {
3289 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3290 Opcode == ISD::ATOMIC_LOAD_SUB ||
3291 Opcode == ISD::ATOMIC_LOAD_AND ||
3292 Opcode == ISD::ATOMIC_LOAD_OR ||
3293 Opcode == ISD::ATOMIC_LOAD_XOR ||
3294 Opcode == ISD::ATOMIC_LOAD_NAND ||
3295 Opcode == ISD::ATOMIC_LOAD_MIN ||
3296 Opcode == ISD::ATOMIC_LOAD_MAX ||
3297 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3298 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3299 Opcode == ISD::ATOMIC_SWAP) &&
3300 "Invalid Atomic Op");
3302 MVT VT = Val.getValueType();
3304 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3305 Alignment = getMVTAlignment(MemVT);
3307 SDVTList VTs = getVTList(VT, MVT::Other);
3308 FoldingSetNodeID ID;
3309 SDValue Ops[] = {Chain, Ptr, Val};
3310 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3313 return SDValue(E, 0);
3314 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3315 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3316 Chain, Ptr, Val, PtrVal, Alignment);
3317 CSEMap.InsertNode(N, IP);
3318 AllNodes.push_back(N);
3319 return SDValue(N, 0);
3322 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3323 /// Allowed to return something different (and simpler) if Simplify is true.
3324 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3328 SmallVector<MVT, 4> VTs;
3329 VTs.reserve(NumOps);
3330 for (unsigned i = 0; i < NumOps; ++i)
3331 VTs.push_back(Ops[i].getValueType());
3332 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3336 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3337 const MVT *VTs, unsigned NumVTs,
3338 const SDValue *Ops, unsigned NumOps,
3339 MVT MemVT, const Value *srcValue, int SVOff,
3340 unsigned Align, bool Vol,
3341 bool ReadMem, bool WriteMem) {
3342 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3343 MemVT, srcValue, SVOff, Align, Vol,
3348 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3349 const SDValue *Ops, unsigned NumOps,
3350 MVT MemVT, const Value *srcValue, int SVOff,
3351 unsigned Align, bool Vol,
3352 bool ReadMem, bool WriteMem) {
3353 // Memoize the node unless it returns a flag.
3354 MemIntrinsicSDNode *N;
3355 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3356 FoldingSetNodeID ID;
3357 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3359 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3360 return SDValue(E, 0);
3362 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3363 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3364 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3365 CSEMap.InsertNode(N, IP);
3367 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3368 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3369 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3371 AllNodes.push_back(N);
3372 return SDValue(N, 0);
3376 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3377 bool IsInreg, SDVTList VTs,
3378 const SDValue *Operands, unsigned NumOperands) {
3379 // Do not include isTailCall in the folding set profile.
3380 FoldingSetNodeID ID;
3381 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3382 ID.AddInteger(CallingConv);
3383 ID.AddInteger(IsVarArgs);
3385 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3386 // Instead of including isTailCall in the folding set, we just
3387 // set the flag of the existing node.
3389 cast<CallSDNode>(E)->setNotTailCall();
3390 return SDValue(E, 0);
3392 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3393 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3394 VTs, Operands, NumOperands);
3395 CSEMap.InsertNode(N, IP);
3396 AllNodes.push_back(N);
3397 return SDValue(N, 0);
3401 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3402 MVT VT, SDValue Chain,
3403 SDValue Ptr, SDValue Offset,
3404 const Value *SV, int SVOffset, MVT EVT,
3405 bool isVolatile, unsigned Alignment) {
3406 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3407 Alignment = getMVTAlignment(VT);
3410 ExtType = ISD::NON_EXTLOAD;
3411 } else if (ExtType == ISD::NON_EXTLOAD) {
3412 assert(VT == EVT && "Non-extending load from different memory type!");
3416 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3417 "Invalid vector extload!");
3419 assert(EVT.bitsLT(VT) &&
3420 "Should only be an extending load, not truncating!");
3421 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3422 "Cannot sign/zero extend a FP/Vector load!");
3423 assert(VT.isInteger() == EVT.isInteger() &&
3424 "Cannot convert from FP to Int or Int -> FP!");
3427 bool Indexed = AM != ISD::UNINDEXED;
3428 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3429 "Unindexed load with an offset!");
3431 SDVTList VTs = Indexed ?
3432 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3433 SDValue Ops[] = { Chain, Ptr, Offset };
3434 FoldingSetNodeID ID;
3435 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3437 ID.AddInteger(ExtType);
3438 ID.AddInteger(EVT.getRawBits());
3439 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3441 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3442 return SDValue(E, 0);
3443 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3444 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3445 Alignment, isVolatile);
3446 CSEMap.InsertNode(N, IP);
3447 AllNodes.push_back(N);
3448 return SDValue(N, 0);
3451 SDValue SelectionDAG::getLoad(MVT VT,
3452 SDValue Chain, SDValue Ptr,
3453 const Value *SV, int SVOffset,
3454 bool isVolatile, unsigned Alignment) {
3455 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3456 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3457 SV, SVOffset, VT, isVolatile, Alignment);
3460 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3461 SDValue Chain, SDValue Ptr,
3463 int SVOffset, MVT EVT,
3464 bool isVolatile, unsigned Alignment) {
3465 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3466 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3467 SV, SVOffset, EVT, isVolatile, Alignment);
3471 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3472 SDValue Offset, ISD::MemIndexedMode AM) {
3473 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3474 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3475 "Load is already a indexed load!");
3476 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3477 LD->getChain(), Base, Offset, LD->getSrcValue(),
3478 LD->getSrcValueOffset(), LD->getMemoryVT(),
3479 LD->isVolatile(), LD->getAlignment());
3482 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3483 SDValue Ptr, const Value *SV, int SVOffset,
3484 bool isVolatile, unsigned Alignment) {
3485 MVT VT = Val.getValueType();
3487 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3488 Alignment = getMVTAlignment(VT);
3490 SDVTList VTs = getVTList(MVT::Other);
3491 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3492 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3493 FoldingSetNodeID ID;
3494 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3495 ID.AddInteger(ISD::UNINDEXED);
3496 ID.AddInteger(false);
3497 ID.AddInteger(VT.getRawBits());
3498 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3500 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3501 return SDValue(E, 0);
3502 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3503 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3504 VT, SV, SVOffset, Alignment, isVolatile);
3505 CSEMap.InsertNode(N, IP);
3506 AllNodes.push_back(N);
3507 return SDValue(N, 0);
3510 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3511 SDValue Ptr, const Value *SV,
3512 int SVOffset, MVT SVT,
3513 bool isVolatile, unsigned Alignment) {
3514 MVT VT = Val.getValueType();
3517 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3519 assert(VT.bitsGT(SVT) && "Not a truncation?");
3520 assert(VT.isInteger() == SVT.isInteger() &&
3521 "Can't do FP-INT conversion!");
3523 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3524 Alignment = getMVTAlignment(VT);
3526 SDVTList VTs = getVTList(MVT::Other);
3527 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3528 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3529 FoldingSetNodeID ID;
3530 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3531 ID.AddInteger(ISD::UNINDEXED);
3533 ID.AddInteger(SVT.getRawBits());
3534 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3536 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3537 return SDValue(E, 0);
3538 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3539 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3540 SVT, SV, SVOffset, Alignment, isVolatile);
3541 CSEMap.InsertNode(N, IP);
3542 AllNodes.push_back(N);
3543 return SDValue(N, 0);
3547 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3548 SDValue Offset, ISD::MemIndexedMode AM) {
3549 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3550 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3551 "Store is already a indexed store!");
3552 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3553 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3554 FoldingSetNodeID ID;
3555 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3557 ID.AddInteger(ST->isTruncatingStore());
3558 ID.AddInteger(ST->getMemoryVT().getRawBits());
3559 ID.AddInteger(ST->getRawFlags());
3561 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3562 return SDValue(E, 0);
3563 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3564 new (N) StoreSDNode(Ops, VTs, AM,
3565 ST->isTruncatingStore(), ST->getMemoryVT(),
3566 ST->getSrcValue(), ST->getSrcValueOffset(),
3567 ST->getAlignment(), ST->isVolatile());
3568 CSEMap.InsertNode(N, IP);
3569 AllNodes.push_back(N);
3570 return SDValue(N, 0);
3573 SDValue SelectionDAG::getVAArg(MVT VT,
3574 SDValue Chain, SDValue Ptr,
3576 SDValue Ops[] = { Chain, Ptr, SV };
3577 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3580 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3581 const SDUse *Ops, unsigned NumOps) {
3583 case 0: return getNode(Opcode, VT);
3584 case 1: return getNode(Opcode, VT, Ops[0]);
3585 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3586 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3590 // Copy from an SDUse array into an SDValue array for use with
3591 // the regular getNode logic.
3592 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3593 return getNode(Opcode, VT, &NewOps[0], NumOps);
3596 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3597 const SDValue *Ops, unsigned NumOps) {
3599 case 0: return getNode(Opcode, VT);
3600 case 1: return getNode(Opcode, VT, Ops[0]);
3601 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3602 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3608 case ISD::SELECT_CC: {
3609 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3610 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3611 "LHS and RHS of condition must have same type!");
3612 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3613 "True and False arms of SelectCC must have same type!");
3614 assert(Ops[2].getValueType() == VT &&
3615 "select_cc node must be of same type as true and false value!");
3619 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3620 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3621 "LHS/RHS of comparison should match types!");
3628 SDVTList VTs = getVTList(VT);
3629 if (VT != MVT::Flag) {
3630 FoldingSetNodeID ID;
3631 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3633 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3634 return SDValue(E, 0);
3635 N = NodeAllocator.Allocate<SDNode>();
3636 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3637 CSEMap.InsertNode(N, IP);
3639 N = NodeAllocator.Allocate<SDNode>();
3640 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3642 AllNodes.push_back(N);
3646 return SDValue(N, 0);
3649 SDValue SelectionDAG::getNode(unsigned Opcode,
3650 const std::vector<MVT> &ResultTys,
3651 const SDValue *Ops, unsigned NumOps) {
3652 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3656 SDValue SelectionDAG::getNode(unsigned Opcode,
3657 const MVT *VTs, unsigned NumVTs,
3658 const SDValue *Ops, unsigned NumOps) {
3660 return getNode(Opcode, VTs[0], Ops, NumOps);
3661 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3664 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3665 const SDValue *Ops, unsigned NumOps) {
3666 if (VTList.NumVTs == 1)
3667 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3670 // FIXME: figure out how to safely handle things like
3671 // int foo(int x) { return 1 << (x & 255); }
3672 // int bar() { return foo(256); }
3674 case ISD::SRA_PARTS:
3675 case ISD::SRL_PARTS:
3676 case ISD::SHL_PARTS:
3677 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3678 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3679 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3680 else if (N3.getOpcode() == ISD::AND)
3681 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3682 // If the and is only masking out bits that cannot effect the shift,
3683 // eliminate the and.
3684 unsigned NumBits = VT.getSizeInBits()*2;
3685 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3686 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3692 // Memoize the node unless it returns a flag.
3694 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3695 FoldingSetNodeID ID;
3696 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3698 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3699 return SDValue(E, 0);
3701 N = NodeAllocator.Allocate<UnarySDNode>();
3702 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3703 } else if (NumOps == 2) {
3704 N = NodeAllocator.Allocate<BinarySDNode>();
3705 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3706 } else if (NumOps == 3) {
3707 N = NodeAllocator.Allocate<TernarySDNode>();
3708 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3710 N = NodeAllocator.Allocate<SDNode>();
3711 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3713 CSEMap.InsertNode(N, IP);
3716 N = NodeAllocator.Allocate<UnarySDNode>();
3717 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3718 } else if (NumOps == 2) {
3719 N = NodeAllocator.Allocate<BinarySDNode>();
3720 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3721 } else if (NumOps == 3) {
3722 N = NodeAllocator.Allocate<TernarySDNode>();
3723 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3725 N = NodeAllocator.Allocate<SDNode>();
3726 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3729 AllNodes.push_back(N);
3733 return SDValue(N, 0);
3736 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3737 return getNode(Opcode, VTList, 0, 0);
3740 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3742 SDValue Ops[] = { N1 };
3743 return getNode(Opcode, VTList, Ops, 1);
3746 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3747 SDValue N1, SDValue N2) {
3748 SDValue Ops[] = { N1, N2 };
3749 return getNode(Opcode, VTList, Ops, 2);
3752 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3753 SDValue N1, SDValue N2, SDValue N3) {
3754 SDValue Ops[] = { N1, N2, N3 };
3755 return getNode(Opcode, VTList, Ops, 3);
3758 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3759 SDValue N1, SDValue N2, SDValue N3,
3761 SDValue Ops[] = { N1, N2, N3, N4 };
3762 return getNode(Opcode, VTList, Ops, 4);
3765 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3766 SDValue N1, SDValue N2, SDValue N3,
3767 SDValue N4, SDValue N5) {
3768 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3769 return getNode(Opcode, VTList, Ops, 5);
3772 SDVTList SelectionDAG::getVTList(MVT VT) {
3773 return makeVTList(SDNode::getValueTypeList(VT), 1);
3776 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3777 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3778 E = VTList.rend(); I != E; ++I)
3779 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3782 MVT *Array = Allocator.Allocate<MVT>(2);
3785 SDVTList Result = makeVTList(Array, 2);
3786 VTList.push_back(Result);
3790 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3791 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3792 E = VTList.rend(); I != E; ++I)
3793 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3797 MVT *Array = Allocator.Allocate<MVT>(3);
3801 SDVTList Result = makeVTList(Array, 3);
3802 VTList.push_back(Result);
3806 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3807 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3808 E = VTList.rend(); I != E; ++I)
3809 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3810 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3813 MVT *Array = Allocator.Allocate<MVT>(3);
3818 SDVTList Result = makeVTList(Array, 4);
3819 VTList.push_back(Result);
3823 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3825 case 0: assert(0 && "Cannot have nodes without results!");
3826 case 1: return getVTList(VTs[0]);
3827 case 2: return getVTList(VTs[0], VTs[1]);
3828 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3832 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3833 E = VTList.rend(); I != E; ++I) {
3834 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3837 bool NoMatch = false;
3838 for (unsigned i = 2; i != NumVTs; ++i)
3839 if (VTs[i] != I->VTs[i]) {
3847 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3848 std::copy(VTs, VTs+NumVTs, Array);
3849 SDVTList Result = makeVTList(Array, NumVTs);
3850 VTList.push_back(Result);
3855 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3856 /// specified operands. If the resultant node already exists in the DAG,
3857 /// this does not modify the specified node, instead it returns the node that
3858 /// already exists. If the resultant node does not exist in the DAG, the
3859 /// input node is returned. As a degenerate case, if you specify the same
3860 /// input operands as the node already has, the input node is returned.
3861 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3862 SDNode *N = InN.getNode();
3863 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3865 // Check to see if there is no change.
3866 if (Op == N->getOperand(0)) return InN;
3868 // See if the modified node already exists.
3869 void *InsertPos = 0;
3870 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3871 return SDValue(Existing, InN.getResNo());
3873 // Nope it doesn't. Remove the node from its current place in the maps.
3875 if (!RemoveNodeFromCSEMaps(N))
3878 // Now we update the operands.
3879 N->OperandList[0].getVal()->removeUser(0, N);
3880 N->OperandList[0] = Op;
3881 N->OperandList[0].setUser(N);
3882 Op.getNode()->addUser(0, N);
3884 // If this gets put into a CSE map, add it.
3885 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3889 SDValue SelectionDAG::
3890 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3891 SDNode *N = InN.getNode();
3892 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3894 // Check to see if there is no change.
3895 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3896 return InN; // No operands changed, just return the input node.
3898 // See if the modified node already exists.
3899 void *InsertPos = 0;
3900 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3901 return SDValue(Existing, InN.getResNo());
3903 // Nope it doesn't. Remove the node from its current place in the maps.
3905 if (!RemoveNodeFromCSEMaps(N))
3908 // Now we update the operands.
3909 if (N->OperandList[0] != Op1) {
3910 N->OperandList[0].getVal()->removeUser(0, N);
3911 N->OperandList[0] = Op1;
3912 N->OperandList[0].setUser(N);
3913 Op1.getNode()->addUser(0, N);
3915 if (N->OperandList[1] != Op2) {
3916 N->OperandList[1].getVal()->removeUser(1, N);
3917 N->OperandList[1] = Op2;
3918 N->OperandList[1].setUser(N);
3919 Op2.getNode()->addUser(1, N);
3922 // If this gets put into a CSE map, add it.
3923 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3927 SDValue SelectionDAG::
3928 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3929 SDValue Ops[] = { Op1, Op2, Op3 };
3930 return UpdateNodeOperands(N, Ops, 3);
3933 SDValue SelectionDAG::
3934 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3935 SDValue Op3, SDValue Op4) {
3936 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3937 return UpdateNodeOperands(N, Ops, 4);
3940 SDValue SelectionDAG::
3941 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3942 SDValue Op3, SDValue Op4, SDValue Op5) {
3943 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3944 return UpdateNodeOperands(N, Ops, 5);
3947 SDValue SelectionDAG::
3948 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3949 SDNode *N = InN.getNode();
3950 assert(N->getNumOperands() == NumOps &&
3951 "Update with wrong number of operands");
3953 // Check to see if there is no change.
3954 bool AnyChange = false;
3955 for (unsigned i = 0; i != NumOps; ++i) {
3956 if (Ops[i] != N->getOperand(i)) {
3962 // No operands changed, just return the input node.
3963 if (!AnyChange) return InN;
3965 // See if the modified node already exists.
3966 void *InsertPos = 0;
3967 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3968 return SDValue(Existing, InN.getResNo());
3970 // Nope it doesn't. Remove the node from its current place in the maps.
3972 if (!RemoveNodeFromCSEMaps(N))
3975 // Now we update the operands.
3976 for (unsigned i = 0; i != NumOps; ++i) {
3977 if (N->OperandList[i] != Ops[i]) {
3978 N->OperandList[i].getVal()->removeUser(i, N);
3979 N->OperandList[i] = Ops[i];
3980 N->OperandList[i].setUser(N);
3981 Ops[i].getNode()->addUser(i, N);
3985 // If this gets put into a CSE map, add it.
3986 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3990 /// DropOperands - Release the operands and set this node to have
3992 void SDNode::DropOperands() {
3993 // Unlike the code in MorphNodeTo that does this, we don't need to
3994 // watch for dead nodes here.
3995 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3996 I->getVal()->removeUser(std::distance(op_begin(), I), this);
4001 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4004 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4006 SDVTList VTs = getVTList(VT);
4007 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4010 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4011 MVT VT, SDValue Op1) {
4012 SDVTList VTs = getVTList(VT);
4013 SDValue Ops[] = { Op1 };
4014 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4017 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4018 MVT VT, SDValue Op1,
4020 SDVTList VTs = getVTList(VT);
4021 SDValue Ops[] = { Op1, Op2 };
4022 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4025 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4026 MVT VT, SDValue Op1,
4027 SDValue Op2, SDValue Op3) {
4028 SDVTList VTs = getVTList(VT);
4029 SDValue Ops[] = { Op1, Op2, Op3 };
4030 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4033 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4034 MVT VT, const SDValue *Ops,
4036 SDVTList VTs = getVTList(VT);
4037 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4040 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4041 MVT VT1, MVT VT2, const SDValue *Ops,
4043 SDVTList VTs = getVTList(VT1, VT2);
4044 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4047 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4049 SDVTList VTs = getVTList(VT1, VT2);
4050 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4053 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4054 MVT VT1, MVT VT2, MVT VT3,
4055 const SDValue *Ops, unsigned NumOps) {
4056 SDVTList VTs = getVTList(VT1, VT2, VT3);
4057 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4060 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4061 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4062 const SDValue *Ops, unsigned NumOps) {
4063 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4064 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4067 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4070 SDVTList VTs = getVTList(VT1, VT2);
4071 SDValue Ops[] = { Op1 };
4072 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4075 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4077 SDValue Op1, SDValue Op2) {
4078 SDVTList VTs = getVTList(VT1, VT2);
4079 SDValue Ops[] = { Op1, Op2 };
4080 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4083 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4085 SDValue Op1, SDValue Op2,
4087 SDVTList VTs = getVTList(VT1, VT2);
4088 SDValue Ops[] = { Op1, Op2, Op3 };
4089 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4092 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4093 MVT VT1, MVT VT2, MVT VT3,
4094 SDValue Op1, SDValue Op2,
4096 SDVTList VTs = getVTList(VT1, VT2, VT3);
4097 SDValue Ops[] = { Op1, Op2, Op3 };
4098 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4101 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4102 SDVTList VTs, const SDValue *Ops,
4104 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4107 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4109 SDVTList VTs = getVTList(VT);
4110 return MorphNodeTo(N, Opc, VTs, 0, 0);
4113 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4114 MVT VT, SDValue Op1) {
4115 SDVTList VTs = getVTList(VT);
4116 SDValue Ops[] = { Op1 };
4117 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4120 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4121 MVT VT, SDValue Op1,
4123 SDVTList VTs = getVTList(VT);
4124 SDValue Ops[] = { Op1, Op2 };
4125 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4128 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4129 MVT VT, SDValue Op1,
4130 SDValue Op2, SDValue Op3) {
4131 SDVTList VTs = getVTList(VT);
4132 SDValue Ops[] = { Op1, Op2, Op3 };
4133 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4136 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4137 MVT VT, const SDValue *Ops,
4139 SDVTList VTs = getVTList(VT);
4140 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4143 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4144 MVT VT1, MVT VT2, const SDValue *Ops,
4146 SDVTList VTs = getVTList(VT1, VT2);
4147 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4150 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4152 SDVTList VTs = getVTList(VT1, VT2);
4153 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4156 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4157 MVT VT1, MVT VT2, MVT VT3,
4158 const SDValue *Ops, unsigned NumOps) {
4159 SDVTList VTs = getVTList(VT1, VT2, VT3);
4160 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4163 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4166 SDVTList VTs = getVTList(VT1, VT2);
4167 SDValue Ops[] = { Op1 };
4168 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4171 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4173 SDValue Op1, SDValue Op2) {
4174 SDVTList VTs = getVTList(VT1, VT2);
4175 SDValue Ops[] = { Op1, Op2 };
4176 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4179 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4181 SDValue Op1, SDValue Op2,
4183 SDVTList VTs = getVTList(VT1, VT2);
4184 SDValue Ops[] = { Op1, Op2, Op3 };
4185 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4188 /// MorphNodeTo - These *mutate* the specified node to have the specified
4189 /// return type, opcode, and operands.
4191 /// Note that MorphNodeTo returns the resultant node. If there is already a
4192 /// node of the specified opcode and operands, it returns that node instead of
4193 /// the current one.
4195 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4196 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4197 /// node, and because it doesn't require CSE recalculation for any of
4198 /// the node's users.
4200 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4201 SDVTList VTs, const SDValue *Ops,
4203 // If an identical node already exists, use it.
4205 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4206 FoldingSetNodeID ID;
4207 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4208 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4212 if (!RemoveNodeFromCSEMaps(N))
4215 // Start the morphing.
4217 N->ValueList = VTs.VTs;
4218 N->NumValues = VTs.NumVTs;
4220 // Clear the operands list, updating used nodes to remove this from their
4221 // use list. Keep track of any operands that become dead as a result.
4222 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4223 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4225 SDNode *Used = I->getVal();
4226 Used->removeUser(std::distance(B, I), N);
4227 if (Used->use_empty())
4228 DeadNodeSet.insert(Used);
4231 // If NumOps is larger than the # of operands we currently have, reallocate
4232 // the operand list.
4233 if (NumOps > N->NumOperands) {
4234 if (N->OperandsNeedDelete)
4235 delete[] N->OperandList;
4237 if (N->isMachineOpcode()) {
4238 // We're creating a final node that will live unmorphed for the
4239 // remainder of the current SelectionDAG iteration, so we can allocate
4240 // the operands directly out of a pool with no recycling metadata.
4241 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4242 N->OperandsNeedDelete = false;
4244 N->OperandList = new SDUse[NumOps];
4245 N->OperandsNeedDelete = true;
4249 // Assign the new operands.
4250 N->NumOperands = NumOps;
4251 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4252 N->OperandList[i] = Ops[i];
4253 N->OperandList[i].setUser(N);
4254 SDNode *ToUse = N->OperandList[i].getVal();
4255 ToUse->addUser(i, N);
4258 // Delete any nodes that are still dead after adding the uses for the
4260 SmallVector<SDNode *, 16> DeadNodes;
4261 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4262 E = DeadNodeSet.end(); I != E; ++I)
4263 if ((*I)->use_empty())
4264 DeadNodes.push_back(*I);
4265 RemoveDeadNodes(DeadNodes);
4268 CSEMap.InsertNode(N, IP); // Memoize the new node.
4273 /// getTargetNode - These are used for target selectors to create a new node
4274 /// with specified return type(s), target opcode, and operands.
4276 /// Note that getTargetNode returns the resultant node. If there is already a
4277 /// node of the specified opcode and operands, it returns that node instead of
4278 /// the current one.
4279 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4280 return getNode(~Opcode, VT).getNode();
4282 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4283 return getNode(~Opcode, VT, Op1).getNode();
4285 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4286 SDValue Op1, SDValue Op2) {
4287 return getNode(~Opcode, VT, Op1, Op2).getNode();
4289 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4290 SDValue Op1, SDValue Op2,
4292 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4294 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4295 const SDValue *Ops, unsigned NumOps) {
4296 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4298 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4299 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4301 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4303 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4304 MVT VT2, SDValue Op1) {
4305 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4306 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4308 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4309 MVT VT2, SDValue Op1,
4311 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4312 SDValue Ops[] = { Op1, Op2 };
4313 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4315 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4316 MVT VT2, SDValue Op1,
4317 SDValue Op2, SDValue Op3) {
4318 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4319 SDValue Ops[] = { Op1, Op2, Op3 };
4320 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4322 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4323 const SDValue *Ops, unsigned NumOps) {
4324 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4325 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4327 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4328 SDValue Op1, SDValue Op2) {
4329 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4330 SDValue Ops[] = { Op1, Op2 };
4331 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4333 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4334 SDValue Op1, SDValue Op2,
4336 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4337 SDValue Ops[] = { Op1, Op2, Op3 };
4338 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4340 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4341 const SDValue *Ops, unsigned NumOps) {
4342 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4343 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4345 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4346 MVT VT2, MVT VT3, MVT VT4,
4347 const SDValue *Ops, unsigned NumOps) {
4348 std::vector<MVT> VTList;
4349 VTList.push_back(VT1);
4350 VTList.push_back(VT2);
4351 VTList.push_back(VT3);
4352 VTList.push_back(VT4);
4353 const MVT *VTs = getNodeValueTypes(VTList);
4354 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4356 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4357 const std::vector<MVT> &ResultTys,
4358 const SDValue *Ops, unsigned NumOps) {
4359 const MVT *VTs = getNodeValueTypes(ResultTys);
4360 return getNode(~Opcode, VTs, ResultTys.size(),
4361 Ops, NumOps).getNode();
4364 /// getNodeIfExists - Get the specified node if it's already available, or
4365 /// else return NULL.
4366 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4367 const SDValue *Ops, unsigned NumOps) {
4368 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4369 FoldingSetNodeID ID;
4370 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4379 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4380 /// This can cause recursive merging of nodes in the DAG.
4382 /// This version assumes From has a single result value.
4384 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4385 DAGUpdateListener *UpdateListener) {
4386 SDNode *From = FromN.getNode();
4387 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4388 "Cannot replace with this method!");
4389 assert(From != To.getNode() && "Cannot replace uses of with self");
4391 // Iterate over all the existing uses of From. This specifically avoids
4392 // visiting any new uses of From that arrise while the replacement is
4393 // happening, because any such uses would be the result of CSE: If an
4394 // existing node looks like From after one of its operands is replaced
4395 // by To, we don't want to replace of all its users with To too.
4396 // See PR3018 for more info.
4397 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4400 do ++UI; while (UI != UE && *UI == U);
4402 // This node is about to morph, remove its old self from the CSE maps.
4403 RemoveNodeFromCSEMaps(U);
4405 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4406 I != E; ++I, ++operandNum)
4407 if (I->getVal() == From) {
4408 From->removeUser(operandNum, U);
4411 To.getNode()->addUser(operandNum, U);
4414 // Now that we have modified U, add it back to the CSE maps. If it already
4415 // exists there, recursively merge the results together.
4416 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4417 ReplaceAllUsesWith(U, Existing, UpdateListener);
4418 // U is now dead. Inform the listener if it exists and delete it.
4420 UpdateListener->NodeDeleted(U, Existing);
4421 DeleteNodeNotInCSEMaps(U);
4423 // If the node doesn't already exist, we updated it. Inform a listener if
4426 UpdateListener->NodeUpdated(U);
4431 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4432 /// This can cause recursive merging of nodes in the DAG.
4434 /// This version assumes From/To have matching types and numbers of result
4437 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4438 DAGUpdateListener *UpdateListener) {
4439 assert(From->getVTList().VTs == To->getVTList().VTs &&
4440 From->getNumValues() == To->getNumValues() &&
4441 "Cannot use this version of ReplaceAllUsesWith!");
4443 // Handle the trivial case.
4447 // Iterate over just the existing users of From. See the comments in
4448 // the ReplaceAllUsesWith above.
4449 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4452 do ++UI; while (UI != UE && *UI == U);
4454 // This node is about to morph, remove its old self from the CSE maps.
4455 RemoveNodeFromCSEMaps(U);
4457 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4458 I != E; ++I, ++operandNum)
4459 if (I->getVal() == From) {
4460 From->removeUser(operandNum, U);
4461 I->getSDValue().setNode(To);
4462 To->addUser(operandNum, U);
4465 // Now that we have modified U, add it back to the CSE maps. If it already
4466 // exists there, recursively merge the results together.
4467 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4468 ReplaceAllUsesWith(U, Existing, UpdateListener);
4469 // U is now dead. Inform the listener if it exists and delete it.
4471 UpdateListener->NodeDeleted(U, Existing);
4472 DeleteNodeNotInCSEMaps(U);
4474 // If the node doesn't already exist, we updated it. Inform a listener if
4477 UpdateListener->NodeUpdated(U);
4482 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4483 /// This can cause recursive merging of nodes in the DAG.
4485 /// This version can replace From with any result values. To must match the
4486 /// number and types of values returned by From.
4487 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4489 DAGUpdateListener *UpdateListener) {
4490 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4491 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4493 // Iterate over just the existing users of From. See the comments in
4494 // the ReplaceAllUsesWith above.
4495 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4498 do ++UI; while (UI != UE && *UI == U);
4500 // This node is about to morph, remove its old self from the CSE maps.
4501 RemoveNodeFromCSEMaps(U);
4503 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4504 I != E; ++I, ++operandNum)
4505 if (I->getVal() == From) {
4506 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4507 From->removeUser(operandNum, U);
4510 ToOp.getNode()->addUser(operandNum, U);
4513 // Now that we have modified U, add it back to the CSE maps. If it already
4514 // exists there, recursively merge the results together.
4515 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4516 ReplaceAllUsesWith(U, Existing, UpdateListener);
4517 // U is now dead. Inform the listener if it exists and delete it.
4519 UpdateListener->NodeDeleted(U, Existing);
4520 DeleteNodeNotInCSEMaps(U);
4522 // If the node doesn't already exist, we updated it. Inform a listener if
4525 UpdateListener->NodeUpdated(U);
4530 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4531 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4532 /// handled the same way as for ReplaceAllUsesWith.
4533 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4534 DAGUpdateListener *UpdateListener){
4535 // Handle the really simple, really trivial case efficiently.
4536 if (From == To) return;
4538 // Handle the simple, trivial, case efficiently.
4539 if (From.getNode()->getNumValues() == 1) {
4540 ReplaceAllUsesWith(From, To, UpdateListener);
4544 // Get all of the users of From.getNode(). We want these in a nice,
4545 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4546 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4548 while (!Users.empty()) {
4549 // We know that this user uses some value of From. If it is the right
4550 // value, update it.
4551 SDNode *User = Users.back();
4554 // Scan for an operand that matches From.
4555 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4556 for (; Op != E; ++Op)
4557 if (*Op == From) break;
4559 // If there are no matches, the user must use some other result of From.
4560 if (Op == E) continue;
4562 // Okay, we know this user needs to be updated. Remove its old self
4563 // from the CSE maps.
4564 RemoveNodeFromCSEMaps(User);
4566 // Update all operands that match "From" in case there are multiple uses.
4567 for (; Op != E; ++Op) {
4569 From.getNode()->removeUser(Op-User->op_begin(), User);
4572 To.getNode()->addUser(Op-User->op_begin(), User);
4576 // Now that we have modified User, add it back to the CSE maps. If it
4577 // already exists there, recursively merge the results together.
4578 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4580 if (UpdateListener) UpdateListener->NodeUpdated(User);
4581 continue; // Continue on to next user.
4584 // If there was already an existing matching node, use ReplaceAllUsesWith
4585 // to replace the dead one with the existing one. This can cause
4586 // recursive merging of other unrelated nodes down the line.
4587 ReplaceAllUsesWith(User, Existing, UpdateListener);
4589 // User is now dead. Notify a listener if present.
4590 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4591 DeleteNodeNotInCSEMaps(User);
4595 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4596 /// uses of other values produced by From.getVal() alone. The same value may
4597 /// appear in both the From and To list. The Deleted vector is
4598 /// handled the same way as for ReplaceAllUsesWith.
4599 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4602 DAGUpdateListener *UpdateListener){
4603 // Handle the simple, trivial case efficiently.
4605 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4607 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4608 for (unsigned i = 0; i != Num; ++i)
4609 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4610 E = From[i].getNode()->use_end(); UI != E; ++UI)
4611 Users.push_back(std::make_pair(*UI, i));
4613 while (!Users.empty()) {
4614 // We know that this user uses some value of From. If it is the right
4615 // value, update it.
4616 SDNode *User = Users.back().first;
4617 unsigned i = Users.back().second;
4620 // Scan for an operand that matches From.
4621 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4622 for (; Op != E; ++Op)
4623 if (*Op == From[i]) break;
4625 // If there are no matches, the user must use some other result of From.
4626 if (Op == E) continue;
4628 // Okay, we know this user needs to be updated. Remove its old self
4629 // from the CSE maps.
4630 RemoveNodeFromCSEMaps(User);
4632 // Update all operands that match "From" in case there are multiple uses.
4633 for (; Op != E; ++Op) {
4634 if (*Op == From[i]) {
4635 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4638 To[i].getNode()->addUser(Op-User->op_begin(), User);
4642 // Now that we have modified User, add it back to the CSE maps. If it
4643 // already exists there, recursively merge the results together.
4644 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4646 if (UpdateListener) UpdateListener->NodeUpdated(User);
4647 continue; // Continue on to next user.
4650 // If there was already an existing matching node, use ReplaceAllUsesWith
4651 // to replace the dead one with the existing one. This can cause
4652 // recursive merging of other unrelated nodes down the line.
4653 ReplaceAllUsesWith(User, Existing, UpdateListener);
4655 // User is now dead. Notify a listener if present.
4656 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4657 DeleteNodeNotInCSEMaps(User);
4661 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4662 /// based on their topological order. It returns the maximum id and a vector
4663 /// of the SDNodes* in assigned order by reference.
4664 unsigned SelectionDAG::AssignTopologicalOrder() {
4666 unsigned DAGSize = 0;
4668 // SortedPos tracks the progress of the algorithm. Nodes before it are
4669 // sorted, nodes after it are unsorted. When the algorithm completes
4670 // it is at the end of the list.
4671 allnodes_iterator SortedPos = allnodes_begin();
4673 // Visit all the nodes. Move nodes with no operands to the front of
4674 // the list immediately. Annotate nodes that do have operands with their
4675 // operand count. Before we do this, the Node Id fields of the nodes
4676 // may contain arbitrary values. After, the Node Id fields for nodes
4677 // before SortedPos will contain the topological sort index, and the
4678 // Node Id fields for nodes At SortedPos and after will contain the
4679 // count of outstanding operands.
4680 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4682 unsigned Degree = N->getNumOperands();
4684 // A node with no uses, add it to the result array immediately.
4685 N->setNodeId(DAGSize++);
4686 allnodes_iterator Q = N;
4688 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4691 // Temporarily use the Node Id as scratch space for the degree count.
4692 N->setNodeId(Degree);
4696 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4697 // such that by the time the end is reached all nodes will be sorted.
4698 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4700 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4703 unsigned Degree = P->getNodeId();
4706 // All of P's operands are sorted, so P may sorted now.
4707 P->setNodeId(DAGSize++);
4709 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4712 // Update P's outstanding operand count.
4713 P->setNodeId(Degree);
4718 assert(SortedPos == AllNodes.end() &&
4719 "Topological sort incomplete!");
4720 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4721 "First node in topological sort is not the entry token!");
4722 assert(AllNodes.front().getNodeId() == 0 &&
4723 "First node in topological sort has non-zero id!");
4724 assert(AllNodes.front().getNumOperands() == 0 &&
4725 "First node in topological sort has operands!");
4726 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4727 "Last node in topologic sort has unexpected id!");
4728 assert(AllNodes.back().use_empty() &&
4729 "Last node in topologic sort has users!");
4730 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4736 //===----------------------------------------------------------------------===//
4738 //===----------------------------------------------------------------------===//
4740 // Out-of-line virtual method to give class a home.
4741 void SDNode::ANCHOR() {}
4742 void UnarySDNode::ANCHOR() {}
4743 void BinarySDNode::ANCHOR() {}
4744 void TernarySDNode::ANCHOR() {}
4745 void HandleSDNode::ANCHOR() {}
4746 void ConstantSDNode::ANCHOR() {}
4747 void ConstantFPSDNode::ANCHOR() {}
4748 void GlobalAddressSDNode::ANCHOR() {}
4749 void FrameIndexSDNode::ANCHOR() {}
4750 void JumpTableSDNode::ANCHOR() {}
4751 void ConstantPoolSDNode::ANCHOR() {}
4752 void BasicBlockSDNode::ANCHOR() {}
4753 void SrcValueSDNode::ANCHOR() {}
4754 void MemOperandSDNode::ANCHOR() {}
4755 void RegisterSDNode::ANCHOR() {}
4756 void DbgStopPointSDNode::ANCHOR() {}
4757 void LabelSDNode::ANCHOR() {}
4758 void ExternalSymbolSDNode::ANCHOR() {}
4759 void CondCodeSDNode::ANCHOR() {}
4760 void ARG_FLAGSSDNode::ANCHOR() {}
4761 void VTSDNode::ANCHOR() {}
4762 void MemSDNode::ANCHOR() {}
4763 void LoadSDNode::ANCHOR() {}
4764 void StoreSDNode::ANCHOR() {}
4765 void AtomicSDNode::ANCHOR() {}
4766 void MemIntrinsicSDNode::ANCHOR() {}
4767 void CallSDNode::ANCHOR() {}
4768 void CvtRndSatSDNode::ANCHOR() {}
4770 HandleSDNode::~HandleSDNode() {
4774 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4776 : SDNode(isa<GlobalVariable>(GA) &&
4777 cast<GlobalVariable>(GA)->isThreadLocal() ?
4779 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4781 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4782 getSDVTList(VT)), Offset(o) {
4783 TheGlobal = const_cast<GlobalValue*>(GA);
4786 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4787 const Value *srcValue, int SVO,
4788 unsigned alignment, bool vol)
4789 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4790 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4792 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4793 assert(getAlignment() == alignment && "Alignment representation error!");
4794 assert(isVolatile() == vol && "Volatile representation error!");
4797 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4798 unsigned NumOps, MVT memvt, const Value *srcValue,
4799 int SVO, unsigned alignment, bool vol)
4800 : SDNode(Opc, VTs, Ops, NumOps),
4801 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4802 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4803 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4804 assert(getAlignment() == alignment && "Alignment representation error!");
4805 assert(isVolatile() == vol && "Volatile representation error!");
4808 /// getMemOperand - Return a MachineMemOperand object describing the memory
4809 /// reference performed by this memory reference.
4810 MachineMemOperand MemSDNode::getMemOperand() const {
4812 if (isa<LoadSDNode>(this))
4813 Flags = MachineMemOperand::MOLoad;
4814 else if (isa<StoreSDNode>(this))
4815 Flags = MachineMemOperand::MOStore;
4816 else if (isa<AtomicSDNode>(this)) {
4817 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4820 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4821 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4822 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4823 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4826 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4827 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4829 // Check if the memory reference references a frame index
4830 const FrameIndexSDNode *FI =
4831 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4832 if (!getSrcValue() && FI)
4833 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4834 Flags, 0, Size, getAlignment());
4836 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4837 Size, getAlignment());
4840 /// Profile - Gather unique data for the node.
4842 void SDNode::Profile(FoldingSetNodeID &ID) const {
4843 AddNodeIDNode(ID, this);
4846 /// getValueTypeList - Return a pointer to the specified value type.
4848 const MVT *SDNode::getValueTypeList(MVT VT) {
4849 if (VT.isExtended()) {
4850 static std::set<MVT, MVT::compareRawBits> EVTs;
4851 return &(*EVTs.insert(VT).first);
4853 static MVT VTs[MVT::LAST_VALUETYPE];
4854 VTs[VT.getSimpleVT()] = VT;
4855 return &VTs[VT.getSimpleVT()];
4859 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4860 /// indicated value. This method ignores uses of other values defined by this
4862 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4863 assert(Value < getNumValues() && "Bad value!");
4865 // TODO: Only iterate over uses of a given value of the node
4866 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4867 if (UI.getUse().getSDValue().getResNo() == Value) {
4874 // Found exactly the right number of uses?
4879 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4880 /// value. This method ignores uses of other values defined by this operation.
4881 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4882 assert(Value < getNumValues() && "Bad value!");
4884 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4885 if (UI.getUse().getSDValue().getResNo() == Value)
4892 /// isOnlyUserOf - Return true if this node is the only use of N.
4894 bool SDNode::isOnlyUserOf(SDNode *N) const {
4896 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4907 /// isOperand - Return true if this node is an operand of N.
4909 bool SDValue::isOperandOf(SDNode *N) const {
4910 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4911 if (*this == N->getOperand(i))
4916 bool SDNode::isOperandOf(SDNode *N) const {
4917 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4918 if (this == N->OperandList[i].getVal())
4923 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4924 /// be a chain) reaches the specified operand without crossing any
4925 /// side-effecting instructions. In practice, this looks through token
4926 /// factors and non-volatile loads. In order to remain efficient, this only
4927 /// looks a couple of nodes in, it does not do an exhaustive search.
4928 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4929 unsigned Depth) const {
4930 if (*this == Dest) return true;
4932 // Don't search too deeply, we just want to be able to see through
4933 // TokenFactor's etc.
4934 if (Depth == 0) return false;
4936 // If this is a token factor, all inputs to the TF happen in parallel. If any
4937 // of the operands of the TF reach dest, then we can do the xform.
4938 if (getOpcode() == ISD::TokenFactor) {
4939 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4940 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4945 // Loads don't have side effects, look through them.
4946 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4947 if (!Ld->isVolatile())
4948 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4954 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4955 SmallPtrSet<SDNode *, 32> &Visited) {
4956 if (found || !Visited.insert(N))
4959 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4960 SDNode *Op = N->getOperand(i).getNode();
4965 findPredecessor(Op, P, found, Visited);
4969 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4970 /// is either an operand of N or it can be reached by recursively traversing
4971 /// up the operands.
4972 /// NOTE: this is an expensive method. Use it carefully.
4973 bool SDNode::isPredecessorOf(SDNode *N) const {
4974 SmallPtrSet<SDNode *, 32> Visited;
4976 findPredecessor(N, this, found, Visited);
4980 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4981 assert(Num < NumOperands && "Invalid child # of SDNode!");
4982 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4985 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4986 switch (getOpcode()) {
4988 if (getOpcode() < ISD::BUILTIN_OP_END)
4989 return "<<Unknown DAG Node>>";
4990 if (isMachineOpcode()) {
4992 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4993 if (getMachineOpcode() < TII->getNumOpcodes())
4994 return TII->get(getMachineOpcode()).getName();
4995 return "<<Unknown Machine Node>>";
4998 const TargetLowering &TLI = G->getTargetLoweringInfo();
4999 const char *Name = TLI.getTargetNodeName(getOpcode());
5000 if (Name) return Name;
5001 return "<<Unknown Target Node>>";
5003 return "<<Unknown Node>>";
5006 case ISD::DELETED_NODE:
5007 return "<<Deleted Node!>>";
5009 case ISD::PREFETCH: return "Prefetch";
5010 case ISD::MEMBARRIER: return "MemBarrier";
5011 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5012 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5013 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5014 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5015 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5016 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5017 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5018 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5019 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5020 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5021 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5022 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5023 case ISD::PCMARKER: return "PCMarker";
5024 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5025 case ISD::SRCVALUE: return "SrcValue";
5026 case ISD::MEMOPERAND: return "MemOperand";
5027 case ISD::EntryToken: return "EntryToken";
5028 case ISD::TokenFactor: return "TokenFactor";
5029 case ISD::AssertSext: return "AssertSext";
5030 case ISD::AssertZext: return "AssertZext";
5032 case ISD::BasicBlock: return "BasicBlock";
5033 case ISD::ARG_FLAGS: return "ArgFlags";
5034 case ISD::VALUETYPE: return "ValueType";
5035 case ISD::Register: return "Register";
5037 case ISD::Constant: return "Constant";
5038 case ISD::ConstantFP: return "ConstantFP";
5039 case ISD::GlobalAddress: return "GlobalAddress";
5040 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5041 case ISD::FrameIndex: return "FrameIndex";
5042 case ISD::JumpTable: return "JumpTable";
5043 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5044 case ISD::RETURNADDR: return "RETURNADDR";
5045 case ISD::FRAMEADDR: return "FRAMEADDR";
5046 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5047 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5048 case ISD::EHSELECTION: return "EHSELECTION";
5049 case ISD::EH_RETURN: return "EH_RETURN";
5050 case ISD::ConstantPool: return "ConstantPool";
5051 case ISD::ExternalSymbol: return "ExternalSymbol";
5052 case ISD::INTRINSIC_WO_CHAIN: {
5053 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5054 return Intrinsic::getName((Intrinsic::ID)IID);
5056 case ISD::INTRINSIC_VOID:
5057 case ISD::INTRINSIC_W_CHAIN: {
5058 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5059 return Intrinsic::getName((Intrinsic::ID)IID);
5062 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5063 case ISD::TargetConstant: return "TargetConstant";
5064 case ISD::TargetConstantFP:return "TargetConstantFP";
5065 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5066 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5067 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5068 case ISD::TargetJumpTable: return "TargetJumpTable";
5069 case ISD::TargetConstantPool: return "TargetConstantPool";
5070 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5072 case ISD::CopyToReg: return "CopyToReg";
5073 case ISD::CopyFromReg: return "CopyFromReg";
5074 case ISD::UNDEF: return "undef";
5075 case ISD::MERGE_VALUES: return "merge_values";
5076 case ISD::INLINEASM: return "inlineasm";
5077 case ISD::DBG_LABEL: return "dbg_label";
5078 case ISD::EH_LABEL: return "eh_label";
5079 case ISD::DECLARE: return "declare";
5080 case ISD::HANDLENODE: return "handlenode";
5081 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5082 case ISD::CALL: return "call";
5085 case ISD::FABS: return "fabs";
5086 case ISD::FNEG: return "fneg";
5087 case ISD::FSQRT: return "fsqrt";
5088 case ISD::FSIN: return "fsin";
5089 case ISD::FCOS: return "fcos";
5090 case ISD::FPOWI: return "fpowi";
5091 case ISD::FPOW: return "fpow";
5092 case ISD::FTRUNC: return "ftrunc";
5093 case ISD::FFLOOR: return "ffloor";
5094 case ISD::FCEIL: return "fceil";
5095 case ISD::FRINT: return "frint";
5096 case ISD::FNEARBYINT: return "fnearbyint";
5099 case ISD::ADD: return "add";
5100 case ISD::SUB: return "sub";
5101 case ISD::MUL: return "mul";
5102 case ISD::MULHU: return "mulhu";
5103 case ISD::MULHS: return "mulhs";
5104 case ISD::SDIV: return "sdiv";
5105 case ISD::UDIV: return "udiv";
5106 case ISD::SREM: return "srem";
5107 case ISD::UREM: return "urem";
5108 case ISD::SMUL_LOHI: return "smul_lohi";
5109 case ISD::UMUL_LOHI: return "umul_lohi";
5110 case ISD::SDIVREM: return "sdivrem";
5111 case ISD::UDIVREM: return "udivrem";
5112 case ISD::AND: return "and";
5113 case ISD::OR: return "or";
5114 case ISD::XOR: return "xor";
5115 case ISD::SHL: return "shl";
5116 case ISD::SRA: return "sra";
5117 case ISD::SRL: return "srl";
5118 case ISD::ROTL: return "rotl";
5119 case ISD::ROTR: return "rotr";
5120 case ISD::FADD: return "fadd";
5121 case ISD::FSUB: return "fsub";
5122 case ISD::FMUL: return "fmul";
5123 case ISD::FDIV: return "fdiv";
5124 case ISD::FREM: return "frem";
5125 case ISD::FCOPYSIGN: return "fcopysign";
5126 case ISD::FGETSIGN: return "fgetsign";
5128 case ISD::SETCC: return "setcc";
5129 case ISD::VSETCC: return "vsetcc";
5130 case ISD::SELECT: return "select";
5131 case ISD::SELECT_CC: return "select_cc";
5132 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5133 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5134 case ISD::CONCAT_VECTORS: return "concat_vectors";
5135 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5136 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5137 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5138 case ISD::CARRY_FALSE: return "carry_false";
5139 case ISD::ADDC: return "addc";
5140 case ISD::ADDE: return "adde";
5141 case ISD::SADDO: return "saddo";
5142 case ISD::UADDO: return "uaddo";
5143 case ISD::SSUBO: return "ssubo";
5144 case ISD::USUBO: return "usubo";
5145 case ISD::SMULO: return "smulo";
5146 case ISD::UMULO: return "umulo";
5147 case ISD::SUBC: return "subc";
5148 case ISD::SUBE: return "sube";
5149 case ISD::SHL_PARTS: return "shl_parts";
5150 case ISD::SRA_PARTS: return "sra_parts";
5151 case ISD::SRL_PARTS: return "srl_parts";
5153 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5154 case ISD::INSERT_SUBREG: return "insert_subreg";
5156 // Conversion operators.
5157 case ISD::SIGN_EXTEND: return "sign_extend";
5158 case ISD::ZERO_EXTEND: return "zero_extend";
5159 case ISD::ANY_EXTEND: return "any_extend";
5160 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5161 case ISD::TRUNCATE: return "truncate";
5162 case ISD::FP_ROUND: return "fp_round";
5163 case ISD::FLT_ROUNDS_: return "flt_rounds";
5164 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5165 case ISD::FP_EXTEND: return "fp_extend";
5167 case ISD::SINT_TO_FP: return "sint_to_fp";
5168 case ISD::UINT_TO_FP: return "uint_to_fp";
5169 case ISD::FP_TO_SINT: return "fp_to_sint";
5170 case ISD::FP_TO_UINT: return "fp_to_uint";
5171 case ISD::BIT_CONVERT: return "bit_convert";
5173 case ISD::CONVERT_RNDSAT: {
5174 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5175 default: assert(0 && "Unknown cvt code!");
5176 case ISD::CVT_FF: return "cvt_ff";
5177 case ISD::CVT_FS: return "cvt_fs";
5178 case ISD::CVT_FU: return "cvt_fu";
5179 case ISD::CVT_SF: return "cvt_sf";
5180 case ISD::CVT_UF: return "cvt_uf";
5181 case ISD::CVT_SS: return "cvt_ss";
5182 case ISD::CVT_SU: return "cvt_su";
5183 case ISD::CVT_US: return "cvt_us";
5184 case ISD::CVT_UU: return "cvt_uu";
5188 // Control flow instructions
5189 case ISD::BR: return "br";
5190 case ISD::BRIND: return "brind";
5191 case ISD::BR_JT: return "br_jt";
5192 case ISD::BRCOND: return "brcond";
5193 case ISD::BR_CC: return "br_cc";
5194 case ISD::RET: return "ret";
5195 case ISD::CALLSEQ_START: return "callseq_start";
5196 case ISD::CALLSEQ_END: return "callseq_end";
5199 case ISD::LOAD: return "load";
5200 case ISD::STORE: return "store";
5201 case ISD::VAARG: return "vaarg";
5202 case ISD::VACOPY: return "vacopy";
5203 case ISD::VAEND: return "vaend";
5204 case ISD::VASTART: return "vastart";
5205 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5206 case ISD::EXTRACT_ELEMENT: return "extract_element";
5207 case ISD::BUILD_PAIR: return "build_pair";
5208 case ISD::STACKSAVE: return "stacksave";
5209 case ISD::STACKRESTORE: return "stackrestore";
5210 case ISD::TRAP: return "trap";
5213 case ISD::BSWAP: return "bswap";
5214 case ISD::CTPOP: return "ctpop";
5215 case ISD::CTTZ: return "cttz";
5216 case ISD::CTLZ: return "ctlz";
5219 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5220 case ISD::DEBUG_LOC: return "debug_loc";
5223 case ISD::TRAMPOLINE: return "trampoline";
5226 switch (cast<CondCodeSDNode>(this)->get()) {
5227 default: assert(0 && "Unknown setcc condition!");
5228 case ISD::SETOEQ: return "setoeq";
5229 case ISD::SETOGT: return "setogt";
5230 case ISD::SETOGE: return "setoge";
5231 case ISD::SETOLT: return "setolt";
5232 case ISD::SETOLE: return "setole";
5233 case ISD::SETONE: return "setone";
5235 case ISD::SETO: return "seto";
5236 case ISD::SETUO: return "setuo";
5237 case ISD::SETUEQ: return "setue";
5238 case ISD::SETUGT: return "setugt";
5239 case ISD::SETUGE: return "setuge";
5240 case ISD::SETULT: return "setult";
5241 case ISD::SETULE: return "setule";
5242 case ISD::SETUNE: return "setune";
5244 case ISD::SETEQ: return "seteq";
5245 case ISD::SETGT: return "setgt";
5246 case ISD::SETGE: return "setge";
5247 case ISD::SETLT: return "setlt";
5248 case ISD::SETLE: return "setle";
5249 case ISD::SETNE: return "setne";
5254 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5263 return "<post-inc>";
5265 return "<post-dec>";
5269 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5270 std::string S = "< ";
5284 if (getByValAlign())
5285 S += "byval-align:" + utostr(getByValAlign()) + " ";
5287 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5289 S += "byval-size:" + utostr(getByValSize()) + " ";
5293 void SDNode::dump() const { dump(0); }
5294 void SDNode::dump(const SelectionDAG *G) const {
5299 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5300 OS << (void*)this << ": ";
5302 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5304 if (getValueType(i) == MVT::Other)
5307 OS << getValueType(i).getMVTString();
5309 OS << " = " << getOperationName(G);
5312 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5314 OS << (void*)getOperand(i).getNode();
5315 if (unsigned RN = getOperand(i).getResNo())
5319 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5320 SDNode *Mask = getOperand(2).getNode();
5322 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5324 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5327 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5332 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5333 OS << '<' << CSDN->getAPIntValue() << '>';
5334 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5335 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5336 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5337 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5338 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5341 CSDN->getValueAPF().bitcastToAPInt().dump();
5344 } else if (const GlobalAddressSDNode *GADN =
5345 dyn_cast<GlobalAddressSDNode>(this)) {
5346 int64_t offset = GADN->getOffset();
5348 WriteAsOperand(OS, GADN->getGlobal());
5351 OS << " + " << offset;
5353 OS << " " << offset;
5354 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5355 OS << "<" << FIDN->getIndex() << ">";
5356 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5357 OS << "<" << JTDN->getIndex() << ">";
5358 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5359 int offset = CP->getOffset();
5360 if (CP->isMachineConstantPoolEntry())
5361 OS << "<" << *CP->getMachineCPVal() << ">";
5363 OS << "<" << *CP->getConstVal() << ">";
5365 OS << " + " << offset;
5367 OS << " " << offset;
5368 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5370 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5372 OS << LBB->getName() << " ";
5373 OS << (const void*)BBDN->getBasicBlock() << ">";
5374 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5375 if (G && R->getReg() &&
5376 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5377 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5379 OS << " #" << R->getReg();
5381 } else if (const ExternalSymbolSDNode *ES =
5382 dyn_cast<ExternalSymbolSDNode>(this)) {
5383 OS << "'" << ES->getSymbol() << "'";
5384 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5386 OS << "<" << M->getValue() << ">";
5389 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5390 if (M->MO.getValue())
5391 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5393 OS << "<null:" << M->MO.getOffset() << ">";
5394 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5395 OS << N->getArgFlags().getArgFlagsString();
5396 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5397 OS << ":" << N->getVT().getMVTString();
5399 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5400 const Value *SrcValue = LD->getSrcValue();
5401 int SrcOffset = LD->getSrcValueOffset();
5407 OS << ":" << SrcOffset << ">";
5410 switch (LD->getExtensionType()) {
5411 default: doExt = false; break;
5412 case ISD::EXTLOAD: OS << " <anyext "; break;
5413 case ISD::SEXTLOAD: OS << " <sext "; break;
5414 case ISD::ZEXTLOAD: OS << " <zext "; break;
5417 OS << LD->getMemoryVT().getMVTString() << ">";
5419 const char *AM = getIndexedModeName(LD->getAddressingMode());
5422 if (LD->isVolatile())
5423 OS << " <volatile>";
5424 OS << " alignment=" << LD->getAlignment();
5425 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5426 const Value *SrcValue = ST->getSrcValue();
5427 int SrcOffset = ST->getSrcValueOffset();
5433 OS << ":" << SrcOffset << ">";
5435 if (ST->isTruncatingStore())
5436 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5438 const char *AM = getIndexedModeName(ST->getAddressingMode());
5441 if (ST->isVolatile())
5442 OS << " <volatile>";
5443 OS << " alignment=" << ST->getAlignment();
5444 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5445 const Value *SrcValue = AT->getSrcValue();
5446 int SrcOffset = AT->getSrcValueOffset();
5452 OS << ":" << SrcOffset << ">";
5453 if (AT->isVolatile())
5454 OS << " <volatile>";
5455 OS << " alignment=" << AT->getAlignment();
5459 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5460 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5461 if (N->getOperand(i).getNode()->hasOneUse())
5462 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5464 cerr << "\n" << std::string(indent+2, ' ')
5465 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5468 cerr << "\n" << std::string(indent, ' ');
5472 void SelectionDAG::dump() const {
5473 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5475 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5477 const SDNode *N = I;
5478 if (!N->hasOneUse() && N != getRoot().getNode())
5479 DumpNodes(N, 2, this);
5482 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5487 const Type *ConstantPoolSDNode::getType() const {
5488 if (isMachineConstantPoolEntry())
5489 return Val.MachineCPVal->getType();
5490 return Val.ConstVal->getType();