1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/Function.h"
17 #include "llvm/GlobalAlias.h"
18 #include "llvm/GlobalVariable.h"
19 #include "llvm/Intrinsics.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/CallingConv.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/PseudoSourceValue.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetLowering.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/ManagedStatic.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/raw_ostream.h"
39 #include "llvm/System/Mutex.h"
40 #include "llvm/ADT/SetVector.h"
41 #include "llvm/ADT/SmallPtrSet.h"
42 #include "llvm/ADT/SmallSet.h"
43 #include "llvm/ADT/SmallVector.h"
44 #include "llvm/ADT/StringExtras.h"
49 /// makeVTList - Return an instance of the SDVTList struct initialized with the
50 /// specified members.
51 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
52 SDVTList Res = {VTs, NumVTs};
56 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
57 switch (VT.getSimpleVT().SimpleTy) {
58 default: llvm_unreachable("Unknown FP format");
59 case MVT::f32: return &APFloat::IEEEsingle;
60 case MVT::f64: return &APFloat::IEEEdouble;
61 case MVT::f80: return &APFloat::x87DoubleExtended;
62 case MVT::f128: return &APFloat::IEEEquad;
63 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
67 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
69 //===----------------------------------------------------------------------===//
70 // ConstantFPSDNode Class
71 //===----------------------------------------------------------------------===//
73 /// isExactlyValue - We don't rely on operator== working on double values, as
74 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
75 /// As such, this method can be used to do an exact bit-for-bit comparison of
76 /// two floating point values.
77 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
78 return getValueAPF().bitwiseIsEqual(V);
81 bool ConstantFPSDNode::isValueValidForType(EVT VT,
83 assert(VT.isFloatingPoint() && "Can only convert between FP types");
85 // PPC long double cannot be converted to any other type.
86 if (VT == MVT::ppcf128 ||
87 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
90 // convert modifies in place, so make a copy.
91 APFloat Val2 = APFloat(Val);
93 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
98 //===----------------------------------------------------------------------===//
100 //===----------------------------------------------------------------------===//
102 /// isBuildVectorAllOnes - Return true if the specified node is a
103 /// BUILD_VECTOR where all of the elements are ~0 or undef.
104 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
105 // Look through a bit convert.
106 if (N->getOpcode() == ISD::BIT_CONVERT)
107 N = N->getOperand(0).getNode();
109 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
111 unsigned i = 0, e = N->getNumOperands();
113 // Skip over all of the undef values.
114 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
117 // Do not accept an all-undef vector.
118 if (i == e) return false;
120 // Do not accept build_vectors that aren't all constants or which have non-~0
122 SDValue NotZero = N->getOperand(i);
123 if (isa<ConstantSDNode>(NotZero)) {
124 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
126 } else if (isa<ConstantFPSDNode>(NotZero)) {
127 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
128 bitcastToAPInt().isAllOnesValue())
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 if (N->getOpcode() == ISD::BIT_CONVERT)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 unsigned i = 0, e = N->getNumOperands();
154 // Skip over all of the undef values.
155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
158 // Do not accept an all-undef vector.
159 if (i == e) return false;
161 // Do not accept build_vectors that aren't all constants or which have non-0
163 SDValue Zero = N->getOperand(i);
164 if (isa<ConstantSDNode>(Zero)) {
165 if (!cast<ConstantSDNode>(Zero)->isNullValue())
167 } else if (isa<ConstantFPSDNode>(Zero)) {
168 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
173 // Okay, we have at least one 0 value, check to see if the rest match or are
175 for (++i; i != e; ++i)
176 if (N->getOperand(i) != Zero &&
177 N->getOperand(i).getOpcode() != ISD::UNDEF)
182 /// isScalarToVector - Return true if the specified node is a
183 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
184 /// element is not an undef.
185 bool ISD::isScalarToVector(const SDNode *N) {
186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
189 if (N->getOpcode() != ISD::BUILD_VECTOR)
191 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
193 unsigned NumElems = N->getNumOperands();
194 for (unsigned i = 1; i < NumElems; ++i) {
195 SDValue V = N->getOperand(i);
196 if (V.getOpcode() != ISD::UNDEF)
203 /// isDebugLabel - Return true if the specified node represents a debug
204 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
205 bool ISD::isDebugLabel(const SDNode *N) {
207 if (N->getOpcode() == ISD::DBG_LABEL)
209 if (N->isMachineOpcode() &&
210 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
215 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
216 /// when given the operation for (X op Y).
217 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
218 // To perform this operation, we just need to swap the L and G bits of the
220 unsigned OldL = (Operation >> 2) & 1;
221 unsigned OldG = (Operation >> 1) & 1;
222 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
223 (OldL << 1) | // New G bit
224 (OldG << 2)); // New L bit.
227 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
228 /// 'op' is a valid SetCC operation.
229 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
230 unsigned Operation = Op;
232 Operation ^= 7; // Flip L, G, E bits, but not U.
234 Operation ^= 15; // Flip all of the condition bits.
236 if (Operation > ISD::SETTRUE2)
237 Operation &= ~8; // Don't let N and U bits get set.
239 return ISD::CondCode(Operation);
243 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
244 /// signed operation and 2 if the result is an unsigned comparison. Return zero
245 /// if the operation does not depend on the sign of the input (setne and seteq).
246 static int isSignedOp(ISD::CondCode Opcode) {
248 default: llvm_unreachable("Illegal integer setcc operation!");
250 case ISD::SETNE: return 0;
254 case ISD::SETGE: return 1;
258 case ISD::SETUGE: return 2;
262 /// getSetCCOrOperation - Return the result of a logical OR between different
263 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
264 /// returns SETCC_INVALID if it is not possible to represent the resultant
266 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
268 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
269 // Cannot fold a signed integer setcc with an unsigned integer setcc.
270 return ISD::SETCC_INVALID;
272 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
274 // If the N and U bits get set then the resultant comparison DOES suddenly
275 // care about orderedness, and is true when ordered.
276 if (Op > ISD::SETTRUE2)
277 Op &= ~16; // Clear the U bit if the N bit is set.
279 // Canonicalize illegal integer setcc's.
280 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
283 return ISD::CondCode(Op);
286 /// getSetCCAndOperation - Return the result of a logical AND between different
287 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
288 /// function returns zero if it is not possible to represent the resultant
290 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
292 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
293 // Cannot fold a signed setcc with an unsigned setcc.
294 return ISD::SETCC_INVALID;
296 // Combine all of the condition bits.
297 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
299 // Canonicalize illegal integer setcc's.
303 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
304 case ISD::SETOEQ: // SETEQ & SETU[LG]E
305 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
306 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
307 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
314 const TargetMachine &SelectionDAG::getTarget() const {
315 return MF->getTarget();
318 //===----------------------------------------------------------------------===//
319 // SDNode Profile Support
320 //===----------------------------------------------------------------------===//
322 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
324 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
328 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
329 /// solely with their pointer.
330 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
331 ID.AddPointer(VTList.VTs);
334 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
336 static void AddNodeIDOperands(FoldingSetNodeID &ID,
337 const SDValue *Ops, unsigned NumOps) {
338 for (; NumOps; --NumOps, ++Ops) {
339 ID.AddPointer(Ops->getNode());
340 ID.AddInteger(Ops->getResNo());
344 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
346 static void AddNodeIDOperands(FoldingSetNodeID &ID,
347 const SDUse *Ops, unsigned NumOps) {
348 for (; NumOps; --NumOps, ++Ops) {
349 ID.AddPointer(Ops->getNode());
350 ID.AddInteger(Ops->getResNo());
354 static void AddNodeIDNode(FoldingSetNodeID &ID,
355 unsigned short OpC, SDVTList VTList,
356 const SDValue *OpList, unsigned N) {
357 AddNodeIDOpcode(ID, OpC);
358 AddNodeIDValueTypes(ID, VTList);
359 AddNodeIDOperands(ID, OpList, N);
362 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
364 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
365 switch (N->getOpcode()) {
366 case ISD::TargetExternalSymbol:
367 case ISD::ExternalSymbol:
368 llvm_unreachable("Should only be used on nodes with operands");
369 default: break; // Normal nodes don't need extra info.
370 case ISD::TargetConstant:
372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
374 case ISD::TargetConstantFP:
375 case ISD::ConstantFP: {
376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
379 case ISD::TargetGlobalAddress:
380 case ISD::GlobalAddress:
381 case ISD::TargetGlobalTLSAddress:
382 case ISD::GlobalTLSAddress: {
383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
384 ID.AddPointer(GA->getGlobal());
385 ID.AddInteger(GA->getOffset());
386 ID.AddInteger(GA->getTargetFlags());
389 case ISD::BasicBlock:
390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
395 case ISD::DBG_STOPPOINT: {
396 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
397 ID.AddInteger(DSP->getLine());
398 ID.AddInteger(DSP->getColumn());
399 ID.AddPointer(DSP->getCompileUnit());
403 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
405 case ISD::MEMOPERAND: {
406 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
410 case ISD::FrameIndex:
411 case ISD::TargetFrameIndex:
412 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
415 case ISD::TargetJumpTable:
416 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
417 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
419 case ISD::ConstantPool:
420 case ISD::TargetConstantPool: {
421 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
422 ID.AddInteger(CP->getAlignment());
423 ID.AddInteger(CP->getOffset());
424 if (CP->isMachineConstantPoolEntry())
425 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
427 ID.AddPointer(CP->getConstVal());
428 ID.AddInteger(CP->getTargetFlags());
432 const LoadSDNode *LD = cast<LoadSDNode>(N);
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawSubclassData());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getMemoryVT().getRawBits());
440 ID.AddInteger(ST->getRawSubclassData());
443 case ISD::ATOMIC_CMP_SWAP:
444 case ISD::ATOMIC_SWAP:
445 case ISD::ATOMIC_LOAD_ADD:
446 case ISD::ATOMIC_LOAD_SUB:
447 case ISD::ATOMIC_LOAD_AND:
448 case ISD::ATOMIC_LOAD_OR:
449 case ISD::ATOMIC_LOAD_XOR:
450 case ISD::ATOMIC_LOAD_NAND:
451 case ISD::ATOMIC_LOAD_MIN:
452 case ISD::ATOMIC_LOAD_MAX:
453 case ISD::ATOMIC_LOAD_UMIN:
454 case ISD::ATOMIC_LOAD_UMAX: {
455 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
456 ID.AddInteger(AT->getMemoryVT().getRawBits());
457 ID.AddInteger(AT->getRawSubclassData());
460 case ISD::VECTOR_SHUFFLE: {
461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
462 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
464 ID.AddInteger(SVN->getMaskElt(i));
467 } // end switch (N->getOpcode())
470 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
472 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
473 AddNodeIDOpcode(ID, N->getOpcode());
474 // Add the return value info.
475 AddNodeIDValueTypes(ID, N->getVTList());
476 // Add the operand info.
477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
479 // Handle SDNode leafs with special info.
480 AddNodeIDCustom(ID, N);
483 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
484 /// the CSE map that carries alignment, volatility, indexing mode, and
485 /// extension/truncation information.
487 static inline unsigned
488 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
489 bool isVolatile, unsigned Alignment) {
490 assert((ConvType & 3) == ConvType &&
491 "ConvType may not require more than 2 bits!");
492 assert((AM & 7) == AM &&
493 "AM may not require more than 3 bits!");
497 ((Log2_32(Alignment) + 1) << 6);
500 //===----------------------------------------------------------------------===//
501 // SelectionDAG Class
502 //===----------------------------------------------------------------------===//
504 /// doNotCSE - Return true if CSE should not be performed for this node.
505 static bool doNotCSE(SDNode *N) {
506 if (N->getValueType(0) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
509 switch (N->getOpcode()) {
511 case ISD::HANDLENODE:
513 case ISD::DBG_STOPPOINT:
515 return true; // Never CSE these nodes.
518 // Check that remaining values produced are not flags.
519 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
520 if (N->getValueType(i) == MVT::Flag)
521 return true; // Never CSE anything that produces a flag.
526 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
528 void SelectionDAG::RemoveDeadNodes() {
529 // Create a dummy node (which is not added to allnodes), that adds a reference
530 // to the root node, preventing it from being deleted.
531 HandleSDNode Dummy(getRoot());
533 SmallVector<SDNode*, 128> DeadNodes;
535 // Add all obviously-dead nodes to the DeadNodes worklist.
536 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
538 DeadNodes.push_back(I);
540 RemoveDeadNodes(DeadNodes);
542 // If the root changed (e.g. it was a dead load, update the root).
543 setRoot(Dummy.getValue());
546 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
547 /// given list, and any nodes that become unreachable as a result.
548 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
549 DAGUpdateListener *UpdateListener) {
551 // Process the worklist, deleting the nodes and adding their uses to the
553 while (!DeadNodes.empty()) {
554 SDNode *N = DeadNodes.pop_back_val();
557 UpdateListener->NodeDeleted(N, 0);
559 // Take the node out of the appropriate CSE map.
560 RemoveNodeFromCSEMaps(N);
562 // Next, brutally remove the operand list. This is safe to do, as there are
563 // no cycles in the graph.
564 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
566 SDNode *Operand = Use.getNode();
569 // Now that we removed this operand, see if there are no uses of it left.
570 if (Operand->use_empty())
571 DeadNodes.push_back(Operand);
578 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
579 SmallVector<SDNode*, 16> DeadNodes(1, N);
580 RemoveDeadNodes(DeadNodes, UpdateListener);
583 void SelectionDAG::DeleteNode(SDNode *N) {
584 // First take this out of the appropriate CSE map.
585 RemoveNodeFromCSEMaps(N);
587 // Finally, remove uses due to operands of this node, remove from the
588 // AllNodes list, and delete the node.
589 DeleteNodeNotInCSEMaps(N);
592 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
593 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
594 assert(N->use_empty() && "Cannot delete a node that is not dead!");
596 // Drop all of the operands and decrement used node's use counts.
602 void SelectionDAG::DeallocateNode(SDNode *N) {
603 if (N->OperandsNeedDelete)
604 delete[] N->OperandList;
606 // Set the opcode to DELETED_NODE to help catch bugs when node
607 // memory is reallocated.
608 N->NodeType = ISD::DELETED_NODE;
610 NodeAllocator.Deallocate(AllNodes.remove(N));
613 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
614 /// correspond to it. This is useful when we're about to delete or repurpose
615 /// the node. We don't want future request for structurally identical nodes
616 /// to return N anymore.
617 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
619 switch (N->getOpcode()) {
620 case ISD::EntryToken:
621 llvm_unreachable("EntryToken should not be in CSEMaps!");
623 case ISD::HANDLENODE: return false; // noop.
625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
626 "Cond code doesn't exist!");
627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
630 case ISD::ExternalSymbol:
631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::TargetExternalSymbol: {
634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
635 Erased = TargetExternalSymbols.erase(
636 std::pair<std::string,unsigned char>(ESN->getSymbol(),
637 ESN->getTargetFlags()));
640 case ISD::VALUETYPE: {
641 EVT VT = cast<VTSDNode>(N)->getVT();
642 if (VT.isExtended()) {
643 Erased = ExtendedValueTypeNodes.erase(VT);
645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
651 // Remove it from the CSE Map.
652 Erased = CSEMap.RemoveNode(N);
656 // Verify that the node was actually in one of the CSE maps, unless it has a
657 // flag result (which cannot be CSE'd) or is one of the special cases that are
658 // not subject to CSE.
659 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
660 !N->isMachineOpcode() && !doNotCSE(N)) {
663 llvm_unreachable("Node is not in map!");
669 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
670 /// maps and modified in place. Add it back to the CSE maps, unless an identical
671 /// node already exists, in which case transfer all its users to the existing
672 /// node. This transfer can potentially trigger recursive merging.
675 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
676 DAGUpdateListener *UpdateListener) {
677 // For node types that aren't CSE'd, just act as if no identical node
680 SDNode *Existing = CSEMap.GetOrInsertNode(N);
682 // If there was already an existing matching node, use ReplaceAllUsesWith
683 // to replace the dead one with the existing one. This can cause
684 // recursive merging of other unrelated nodes down the line.
685 ReplaceAllUsesWith(N, Existing, UpdateListener);
687 // N is now dead. Inform the listener if it exists and delete it.
689 UpdateListener->NodeDeleted(N, Existing);
690 DeleteNodeNotInCSEMaps(N);
695 // If the node doesn't already exist, we updated it. Inform a listener if
698 UpdateListener->NodeUpdated(N);
701 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
702 /// were replaced with those specified. If this node is never memoized,
703 /// return null, otherwise return a pointer to the slot it would take. If a
704 /// node already exists with these operands, the slot will be non-null.
705 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
710 SDValue Ops[] = { Op };
712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
713 AddNodeIDCustom(ID, N);
714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
717 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
718 /// were replaced with those specified. If this node is never memoized,
719 /// return null, otherwise return a pointer to the slot it would take. If a
720 /// node already exists with these operands, the slot will be non-null.
721 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
722 SDValue Op1, SDValue Op2,
727 SDValue Ops[] = { Op1, Op2 };
729 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
730 AddNodeIDCustom(ID, N);
731 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
735 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
736 /// were replaced with those specified. If this node is never memoized,
737 /// return null, otherwise return a pointer to the slot it would take. If a
738 /// node already exists with these operands, the slot will be non-null.
739 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
740 const SDValue *Ops,unsigned NumOps,
746 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
747 AddNodeIDCustom(ID, N);
748 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
751 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
752 void SelectionDAG::VerifyNode(SDNode *N) {
753 switch (N->getOpcode()) {
756 case ISD::BUILD_PAIR: {
757 EVT VT = N->getValueType(0);
758 assert(N->getNumValues() == 1 && "Too many results!");
759 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
760 "Wrong return type!");
761 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
762 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
763 "Mismatched operand types!");
764 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
765 "Wrong operand type!");
766 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
767 "Wrong return type size");
770 case ISD::BUILD_VECTOR: {
771 assert(N->getNumValues() == 1 && "Too many results!");
772 assert(N->getValueType(0).isVector() && "Wrong return type!");
773 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
774 "Wrong number of operands!");
775 EVT EltVT = N->getValueType(0).getVectorElementType();
776 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
777 assert((I->getValueType() == EltVT ||
778 (EltVT.isInteger() && I->getValueType().isInteger() &&
779 EltVT.bitsLE(I->getValueType()))) &&
780 "Wrong operand type!");
786 /// getEVTAlignment - Compute the default alignment value for the
789 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
790 const Type *Ty = VT == MVT::iPTR ?
791 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
792 VT.getTypeForEVT(*getContext());
794 return TLI.getTargetData()->getABITypeAlignment(Ty);
797 // EntryNode could meaningfully have debug info if we can find it...
798 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
799 : TLI(tli), FLI(fli), DW(0),
800 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
801 getVTList(MVT::Other)), Root(getEntryNode()) {
802 AllNodes.push_back(&EntryNode);
805 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
810 Context = &mf.getFunction()->getContext();
813 SelectionDAG::~SelectionDAG() {
817 void SelectionDAG::allnodes_clear() {
818 assert(&*AllNodes.begin() == &EntryNode);
819 AllNodes.remove(AllNodes.begin());
820 while (!AllNodes.empty())
821 DeallocateNode(AllNodes.begin());
824 void SelectionDAG::clear() {
826 OperandAllocator.Reset();
829 ExtendedValueTypeNodes.clear();
830 ExternalSymbols.clear();
831 TargetExternalSymbols.clear();
832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
833 static_cast<CondCodeSDNode*>(0));
834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
835 static_cast<SDNode*>(0));
837 EntryNode.UseList = 0;
838 AllNodes.push_back(&EntryNode);
839 Root = getEntryNode();
842 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
843 if (Op.getValueType() == VT) return Op;
844 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
846 return getNode(ISD::AND, DL, Op.getValueType(), Op,
847 getConstant(Imm, Op.getValueType()));
850 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
852 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
853 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
856 return getNode(ISD::XOR, DL, VT, Val, NegOne);
859 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
860 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
861 assert((EltVT.getSizeInBits() >= 64 ||
862 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
863 "getConstant with a uint64_t value that doesn't fit in the type!");
864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
868 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
872 assert(VT.isInteger() && "Cannot create FP integer constant!");
874 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
875 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
876 "APInt size does not match type size!");
878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
886 return SDValue(N, 0);
888 N = NodeAllocator.Allocate<ConstantSDNode>();
889 new (N) ConstantSDNode(isT, &Val, EltVT);
890 CSEMap.InsertNode(N, IP);
891 AllNodes.push_back(N);
894 SDValue Result(N, 0);
896 SmallVector<SDValue, 8> Ops;
897 Ops.assign(VT.getVectorNumElements(), Result);
898 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
899 VT, &Ops[0], Ops.size());
904 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
905 return getConstant(Val, TLI.getPointerTy(), isTarget);
909 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
910 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
913 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
914 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
917 VT.isVector() ? VT.getVectorElementType() : VT;
919 // Do the map lookup using the actual bit pattern for the floating point
920 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
921 // we don't have issues with SNANs.
922 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
924 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
928 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
930 return SDValue(N, 0);
932 N = NodeAllocator.Allocate<ConstantFPSDNode>();
933 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
934 CSEMap.InsertNode(N, IP);
935 AllNodes.push_back(N);
938 SDValue Result(N, 0);
940 SmallVector<SDValue, 8> Ops;
941 Ops.assign(VT.getVectorNumElements(), Result);
942 // FIXME DebugLoc info might be appropriate here
943 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
944 VT, &Ops[0], Ops.size());
949 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
951 VT.isVector() ? VT.getVectorElementType() : VT;
953 return getConstantFP(APFloat((float)Val), VT, isTarget);
955 return getConstantFP(APFloat(Val), VT, isTarget);
958 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
959 EVT VT, int64_t Offset,
961 unsigned char TargetFlags) {
962 assert((TargetFlags == 0 || isTargetGA) &&
963 "Cannot set target flags on target-independent globals");
965 // Truncate (with sign-extension) the offset value to the pointer size.
966 EVT PTy = TLI.getPointerTy();
967 unsigned BitWidth = PTy.getSizeInBits();
969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
973 // If GV is an alias then use the aliasee for determining thread-localness.
974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
979 if (GVar && GVar->isThreadLocal())
980 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
982 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
985 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
987 ID.AddInteger(Offset);
988 ID.AddInteger(TargetFlags);
990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
991 return SDValue(E, 0);
992 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
993 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
994 CSEMap.InsertNode(N, IP);
995 AllNodes.push_back(N);
996 return SDValue(N, 0);
999 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1000 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1001 FoldingSetNodeID ID;
1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1005 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1006 return SDValue(E, 0);
1007 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1008 new (N) FrameIndexSDNode(FI, VT, isTarget);
1009 CSEMap.InsertNode(N, IP);
1010 AllNodes.push_back(N);
1011 return SDValue(N, 0);
1014 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1015 unsigned char TargetFlags) {
1016 assert((TargetFlags == 0 || isTarget) &&
1017 "Cannot set target flags on target-independent jump tables");
1018 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1019 FoldingSetNodeID ID;
1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1022 ID.AddInteger(TargetFlags);
1024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1025 return SDValue(E, 0);
1026 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1027 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1028 CSEMap.InsertNode(N, IP);
1029 AllNodes.push_back(N);
1030 return SDValue(N, 0);
1033 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1034 unsigned Alignment, int Offset,
1036 unsigned char TargetFlags) {
1037 assert((TargetFlags == 0 || isTarget) &&
1038 "Cannot set target flags on target-independent globals");
1040 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1041 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1042 FoldingSetNodeID ID;
1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1044 ID.AddInteger(Alignment);
1045 ID.AddInteger(Offset);
1047 ID.AddInteger(TargetFlags);
1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1050 return SDValue(E, 0);
1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1053 CSEMap.InsertNode(N, IP);
1054 AllNodes.push_back(N);
1055 return SDValue(N, 0);
1059 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1060 unsigned Alignment, int Offset,
1062 unsigned char TargetFlags) {
1063 assert((TargetFlags == 0 || isTarget) &&
1064 "Cannot set target flags on target-independent globals");
1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1070 ID.AddInteger(Alignment);
1071 ID.AddInteger(Offset);
1072 C->AddSelectionDAGCSEId(ID);
1073 ID.AddInteger(TargetFlags);
1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1076 return SDValue(E, 0);
1077 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1078 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1079 CSEMap.InsertNode(N, IP);
1080 AllNodes.push_back(N);
1081 return SDValue(N, 0);
1084 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1085 FoldingSetNodeID ID;
1086 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1090 return SDValue(E, 0);
1091 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1092 new (N) BasicBlockSDNode(MBB);
1093 CSEMap.InsertNode(N, IP);
1094 AllNodes.push_back(N);
1095 return SDValue(N, 0);
1098 SDValue SelectionDAG::getValueType(EVT VT) {
1099 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1100 ValueTypeNodes.size())
1101 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1103 SDNode *&N = VT.isExtended() ?
1104 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1106 if (N) return SDValue(N, 0);
1107 N = NodeAllocator.Allocate<VTSDNode>();
1108 new (N) VTSDNode(VT);
1109 AllNodes.push_back(N);
1110 return SDValue(N, 0);
1113 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1114 SDNode *&N = ExternalSymbols[Sym];
1115 if (N) return SDValue(N, 0);
1116 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1117 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1122 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1123 unsigned char TargetFlags) {
1125 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1127 if (N) return SDValue(N, 0);
1128 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1129 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1134 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1135 if ((unsigned)Cond >= CondCodeNodes.size())
1136 CondCodeNodes.resize(Cond+1);
1138 if (CondCodeNodes[Cond] == 0) {
1139 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1140 new (N) CondCodeSDNode(Cond);
1141 CondCodeNodes[Cond] = N;
1142 AllNodes.push_back(N);
1144 return SDValue(CondCodeNodes[Cond], 0);
1147 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1148 // the shuffle mask M that point at N1 to point at N2, and indices that point
1149 // N2 to point at N1.
1150 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1152 int NElts = M.size();
1153 for (int i = 0; i != NElts; ++i) {
1161 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1162 SDValue N2, const int *Mask) {
1163 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1164 assert(VT.isVector() && N1.getValueType().isVector() &&
1165 "Vector Shuffle VTs must be a vectors");
1166 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1167 && "Vector Shuffle VTs must have same element type");
1169 // Canonicalize shuffle undef, undef -> undef
1170 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1171 return getUNDEF(VT);
1173 // Validate that all indices in Mask are within the range of the elements
1174 // input to the shuffle.
1175 unsigned NElts = VT.getVectorNumElements();
1176 SmallVector<int, 8> MaskVec;
1177 for (unsigned i = 0; i != NElts; ++i) {
1178 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1179 MaskVec.push_back(Mask[i]);
1182 // Canonicalize shuffle v, v -> v, undef
1185 for (unsigned i = 0; i != NElts; ++i)
1186 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1189 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1190 if (N1.getOpcode() == ISD::UNDEF)
1191 commuteShuffle(N1, N2, MaskVec);
1193 // Canonicalize all index into lhs, -> shuffle lhs, undef
1194 // Canonicalize all index into rhs, -> shuffle rhs, undef
1195 bool AllLHS = true, AllRHS = true;
1196 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1197 for (unsigned i = 0; i != NElts; ++i) {
1198 if (MaskVec[i] >= (int)NElts) {
1203 } else if (MaskVec[i] >= 0) {
1207 if (AllLHS && AllRHS)
1208 return getUNDEF(VT);
1209 if (AllLHS && !N2Undef)
1213 commuteShuffle(N1, N2, MaskVec);
1216 // If Identity shuffle, or all shuffle in to undef, return that node.
1217 bool AllUndef = true;
1218 bool Identity = true;
1219 for (unsigned i = 0; i != NElts; ++i) {
1220 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1221 if (MaskVec[i] >= 0) AllUndef = false;
1223 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1226 return getUNDEF(VT);
1228 FoldingSetNodeID ID;
1229 SDValue Ops[2] = { N1, N2 };
1230 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1231 for (unsigned i = 0; i != NElts; ++i)
1232 ID.AddInteger(MaskVec[i]);
1235 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1236 return SDValue(E, 0);
1238 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1239 // SDNode doesn't have access to it. This memory will be "leaked" when
1240 // the node is deallocated, but recovered when the NodeAllocator is released.
1241 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1242 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1244 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1245 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1246 CSEMap.InsertNode(N, IP);
1247 AllNodes.push_back(N);
1248 return SDValue(N, 0);
1251 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1252 SDValue Val, SDValue DTy,
1253 SDValue STy, SDValue Rnd, SDValue Sat,
1254 ISD::CvtCode Code) {
1255 // If the src and dest types are the same and the conversion is between
1256 // integer types of the same sign or two floats, no conversion is necessary.
1258 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1261 FoldingSetNodeID ID;
1263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1264 return SDValue(E, 0);
1265 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1266 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1267 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1268 CSEMap.InsertNode(N, IP);
1269 AllNodes.push_back(N);
1270 return SDValue(N, 0);
1273 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1274 FoldingSetNodeID ID;
1275 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1276 ID.AddInteger(RegNo);
1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1279 return SDValue(E, 0);
1280 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1281 new (N) RegisterSDNode(RegNo, VT);
1282 CSEMap.InsertNode(N, IP);
1283 AllNodes.push_back(N);
1284 return SDValue(N, 0);
1287 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1288 unsigned Line, unsigned Col,
1290 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1291 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1293 AllNodes.push_back(N);
1294 return SDValue(N, 0);
1297 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1300 FoldingSetNodeID ID;
1301 SDValue Ops[] = { Root };
1302 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1303 ID.AddInteger(LabelID);
1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1306 return SDValue(E, 0);
1307 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1308 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1309 CSEMap.InsertNode(N, IP);
1310 AllNodes.push_back(N);
1311 return SDValue(N, 0);
1314 SDValue SelectionDAG::getSrcValue(const Value *V) {
1315 assert((!V || isa<PointerType>(V->getType())) &&
1316 "SrcValue is not a pointer?");
1318 FoldingSetNodeID ID;
1319 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1323 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1324 return SDValue(E, 0);
1326 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1327 new (N) SrcValueSDNode(V);
1328 CSEMap.InsertNode(N, IP);
1329 AllNodes.push_back(N);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1335 const Value *v = MO.getValue();
1336 assert((!v || isa<PointerType>(v->getType())) &&
1337 "SrcValue is not a pointer?");
1340 FoldingSetNodeID ID;
1341 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1346 return SDValue(E, 0);
1348 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1349 new (N) MemOperandSDNode(MO);
1350 CSEMap.InsertNode(N, IP);
1351 AllNodes.push_back(N);
1352 return SDValue(N, 0);
1355 /// getShiftAmountOperand - Return the specified value casted to
1356 /// the target's desired shift amount type.
1357 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1358 EVT OpTy = Op.getValueType();
1359 MVT ShTy = TLI.getShiftAmountTy();
1360 if (OpTy == ShTy || OpTy.isVector()) return Op;
1362 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1363 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1366 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1367 /// specified value type.
1368 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1369 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1370 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1371 const Type *Ty = VT.getTypeForEVT(*getContext());
1372 unsigned StackAlign =
1373 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1375 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1376 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1379 /// CreateStackTemporary - Create a stack temporary suitable for holding
1380 /// either of the specified value types.
1381 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1382 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1383 VT2.getStoreSizeInBits())/8;
1384 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1385 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1386 const TargetData *TD = TLI.getTargetData();
1387 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1388 TD->getPrefTypeAlignment(Ty2));
1390 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1391 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1392 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1395 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1396 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1397 // These setcc operations always fold.
1401 case ISD::SETFALSE2: return getConstant(0, VT);
1403 case ISD::SETTRUE2: return getConstant(1, VT);
1415 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1419 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1420 const APInt &C2 = N2C->getAPIntValue();
1421 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1422 const APInt &C1 = N1C->getAPIntValue();
1425 default: llvm_unreachable("Unknown integer setcc!");
1426 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1427 case ISD::SETNE: return getConstant(C1 != C2, VT);
1428 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1429 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1430 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1431 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1432 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1433 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1434 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1435 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1439 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1440 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1441 // No compile time operations on this type yet.
1442 if (N1C->getValueType(0) == MVT::ppcf128)
1445 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1448 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1449 return getUNDEF(VT);
1451 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1452 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1453 return getUNDEF(VT);
1455 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1456 R==APFloat::cmpLessThan, VT);
1457 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1458 return getUNDEF(VT);
1460 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1461 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1462 return getUNDEF(VT);
1464 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1465 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1466 return getUNDEF(VT);
1468 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1469 R==APFloat::cmpEqual, VT);
1470 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1471 return getUNDEF(VT);
1473 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1474 R==APFloat::cmpEqual, VT);
1475 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1476 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1477 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1478 R==APFloat::cmpEqual, VT);
1479 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1480 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1481 R==APFloat::cmpLessThan, VT);
1482 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1483 R==APFloat::cmpUnordered, VT);
1484 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1485 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1488 // Ensure that the constant occurs on the RHS.
1489 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1493 // Could not fold it.
1497 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1498 /// use this predicate to simplify operations downstream.
1499 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1500 // This predicate is not safe for vector operations.
1501 if (Op.getValueType().isVector())
1504 unsigned BitWidth = Op.getValueSizeInBits();
1505 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1508 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1509 /// this predicate to simplify operations downstream. Mask is known to be zero
1510 /// for bits that V cannot have.
1511 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1512 unsigned Depth) const {
1513 APInt KnownZero, KnownOne;
1514 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1516 return (KnownZero & Mask) == Mask;
1519 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1520 /// known to be either zero or one and return them in the KnownZero/KnownOne
1521 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1523 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1524 APInt &KnownZero, APInt &KnownOne,
1525 unsigned Depth) const {
1526 unsigned BitWidth = Mask.getBitWidth();
1527 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1528 "Mask size mismatches value type size!");
1530 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1531 if (Depth == 6 || Mask == 0)
1532 return; // Limit search depth.
1534 APInt KnownZero2, KnownOne2;
1536 switch (Op.getOpcode()) {
1538 // We know all of the bits for a constant!
1539 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1540 KnownZero = ~KnownOne & Mask;
1543 // If either the LHS or the RHS are Zero, the result is zero.
1544 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1545 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1546 KnownZero2, KnownOne2, Depth+1);
1547 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1548 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1550 // Output known-1 bits are only known if set in both the LHS & RHS.
1551 KnownOne &= KnownOne2;
1552 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1553 KnownZero |= KnownZero2;
1556 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1557 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1558 KnownZero2, KnownOne2, Depth+1);
1559 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1560 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1562 // Output known-0 bits are only known if clear in both the LHS & RHS.
1563 KnownZero &= KnownZero2;
1564 // Output known-1 are known to be set if set in either the LHS | RHS.
1565 KnownOne |= KnownOne2;
1568 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1569 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1570 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1571 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1573 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1574 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1575 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1576 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1577 KnownZero = KnownZeroOut;
1581 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1582 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1583 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1587 // If low bits are zero in either operand, output low known-0 bits.
1588 // Also compute a conserative estimate for high known-0 bits.
1589 // More trickiness is possible, but this is sufficient for the
1590 // interesting case of alignment computation.
1592 unsigned TrailZ = KnownZero.countTrailingOnes() +
1593 KnownZero2.countTrailingOnes();
1594 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1595 KnownZero2.countLeadingOnes(),
1596 BitWidth) - BitWidth;
1598 TrailZ = std::min(TrailZ, BitWidth);
1599 LeadZ = std::min(LeadZ, BitWidth);
1600 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1601 APInt::getHighBitsSet(BitWidth, LeadZ);
1606 // For the purposes of computing leading zeros we can conservatively
1607 // treat a udiv as a logical right shift by the power of 2 known to
1608 // be less than the denominator.
1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1610 ComputeMaskedBits(Op.getOperand(0),
1611 AllOnes, KnownZero2, KnownOne2, Depth+1);
1612 unsigned LeadZ = KnownZero2.countLeadingOnes();
1616 ComputeMaskedBits(Op.getOperand(1),
1617 AllOnes, KnownZero2, KnownOne2, Depth+1);
1618 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1619 if (RHSUnknownLeadingOnes != BitWidth)
1620 LeadZ = std::min(BitWidth,
1621 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1623 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1627 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1628 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1629 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1630 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1632 // Only known if known in both the LHS and RHS.
1633 KnownOne &= KnownOne2;
1634 KnownZero &= KnownZero2;
1636 case ISD::SELECT_CC:
1637 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1638 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1642 // Only known if known in both the LHS and RHS.
1643 KnownOne &= KnownOne2;
1644 KnownZero &= KnownZero2;
1652 if (Op.getResNo() != 1)
1654 // The boolean result conforms to getBooleanContents. Fall through.
1656 // If we know the result of a setcc has the top bits zero, use this info.
1657 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1659 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1662 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1663 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1664 unsigned ShAmt = SA->getZExtValue();
1666 // If the shift count is an invalid immediate, don't do anything.
1667 if (ShAmt >= BitWidth)
1670 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1671 KnownZero, KnownOne, Depth+1);
1672 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1673 KnownZero <<= ShAmt;
1675 // low bits known zero.
1676 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1680 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1681 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1682 unsigned ShAmt = SA->getZExtValue();
1684 // If the shift count is an invalid immediate, don't do anything.
1685 if (ShAmt >= BitWidth)
1688 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1689 KnownZero, KnownOne, Depth+1);
1690 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1691 KnownZero = KnownZero.lshr(ShAmt);
1692 KnownOne = KnownOne.lshr(ShAmt);
1694 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1695 KnownZero |= HighBits; // High bits known zero.
1699 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1700 unsigned ShAmt = SA->getZExtValue();
1702 // If the shift count is an invalid immediate, don't do anything.
1703 if (ShAmt >= BitWidth)
1706 APInt InDemandedMask = (Mask << ShAmt);
1707 // If any of the demanded bits are produced by the sign extension, we also
1708 // demand the input sign bit.
1709 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1710 if (HighBits.getBoolValue())
1711 InDemandedMask |= APInt::getSignBit(BitWidth);
1713 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1716 KnownZero = KnownZero.lshr(ShAmt);
1717 KnownOne = KnownOne.lshr(ShAmt);
1719 // Handle the sign bits.
1720 APInt SignBit = APInt::getSignBit(BitWidth);
1721 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1723 if (KnownZero.intersects(SignBit)) {
1724 KnownZero |= HighBits; // New bits are known zero.
1725 } else if (KnownOne.intersects(SignBit)) {
1726 KnownOne |= HighBits; // New bits are known one.
1730 case ISD::SIGN_EXTEND_INREG: {
1731 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1732 unsigned EBits = EVT.getSizeInBits();
1734 // Sign extension. Compute the demanded bits in the result that are not
1735 // present in the input.
1736 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1738 APInt InSignBit = APInt::getSignBit(EBits);
1739 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1741 // If the sign extended bits are demanded, we know that the sign
1743 InSignBit.zext(BitWidth);
1744 if (NewBits.getBoolValue())
1745 InputDemandedBits |= InSignBit;
1747 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1748 KnownZero, KnownOne, Depth+1);
1749 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1751 // If the sign bit of the input is known set or clear, then we know the
1752 // top bits of the result.
1753 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1754 KnownZero |= NewBits;
1755 KnownOne &= ~NewBits;
1756 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1757 KnownOne |= NewBits;
1758 KnownZero &= ~NewBits;
1759 } else { // Input sign bit unknown
1760 KnownZero &= ~NewBits;
1761 KnownOne &= ~NewBits;
1768 unsigned LowBits = Log2_32(BitWidth)+1;
1769 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1774 if (ISD::isZEXTLoad(Op.getNode())) {
1775 LoadSDNode *LD = cast<LoadSDNode>(Op);
1776 EVT VT = LD->getMemoryVT();
1777 unsigned MemBits = VT.getSizeInBits();
1778 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1782 case ISD::ZERO_EXTEND: {
1783 EVT InVT = Op.getOperand(0).getValueType();
1784 unsigned InBits = InVT.getSizeInBits();
1785 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1786 APInt InMask = Mask;
1787 InMask.trunc(InBits);
1788 KnownZero.trunc(InBits);
1789 KnownOne.trunc(InBits);
1790 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1791 KnownZero.zext(BitWidth);
1792 KnownOne.zext(BitWidth);
1793 KnownZero |= NewBits;
1796 case ISD::SIGN_EXTEND: {
1797 EVT InVT = Op.getOperand(0).getValueType();
1798 unsigned InBits = InVT.getSizeInBits();
1799 APInt InSignBit = APInt::getSignBit(InBits);
1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1801 APInt InMask = Mask;
1802 InMask.trunc(InBits);
1804 // If any of the sign extended bits are demanded, we know that the sign
1805 // bit is demanded. Temporarily set this bit in the mask for our callee.
1806 if (NewBits.getBoolValue())
1807 InMask |= InSignBit;
1809 KnownZero.trunc(InBits);
1810 KnownOne.trunc(InBits);
1811 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1813 // Note if the sign bit is known to be zero or one.
1814 bool SignBitKnownZero = KnownZero.isNegative();
1815 bool SignBitKnownOne = KnownOne.isNegative();
1816 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1817 "Sign bit can't be known to be both zero and one!");
1819 // If the sign bit wasn't actually demanded by our caller, we don't
1820 // want it set in the KnownZero and KnownOne result values. Reset the
1821 // mask and reapply it to the result values.
1823 InMask.trunc(InBits);
1824 KnownZero &= InMask;
1827 KnownZero.zext(BitWidth);
1828 KnownOne.zext(BitWidth);
1830 // If the sign bit is known zero or one, the top bits match.
1831 if (SignBitKnownZero)
1832 KnownZero |= NewBits;
1833 else if (SignBitKnownOne)
1834 KnownOne |= NewBits;
1837 case ISD::ANY_EXTEND: {
1838 EVT InVT = Op.getOperand(0).getValueType();
1839 unsigned InBits = InVT.getSizeInBits();
1840 APInt InMask = Mask;
1841 InMask.trunc(InBits);
1842 KnownZero.trunc(InBits);
1843 KnownOne.trunc(InBits);
1844 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1845 KnownZero.zext(BitWidth);
1846 KnownOne.zext(BitWidth);
1849 case ISD::TRUNCATE: {
1850 EVT InVT = Op.getOperand(0).getValueType();
1851 unsigned InBits = InVT.getSizeInBits();
1852 APInt InMask = Mask;
1853 InMask.zext(InBits);
1854 KnownZero.zext(InBits);
1855 KnownOne.zext(InBits);
1856 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1858 KnownZero.trunc(BitWidth);
1859 KnownOne.trunc(BitWidth);
1862 case ISD::AssertZext: {
1863 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1864 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1865 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1867 KnownZero |= (~InMask) & Mask;
1871 // All bits are zero except the low bit.
1872 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1876 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1877 // We know that the top bits of C-X are clear if X contains less bits
1878 // than C (i.e. no wrap-around can happen). For example, 20-X is
1879 // positive if we can prove that X is >= 0 and < 16.
1880 if (CLHS->getAPIntValue().isNonNegative()) {
1881 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1882 // NLZ can't be BitWidth with no sign bit
1883 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1884 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1887 // If all of the MaskV bits are known to be zero, then we know the
1888 // output top bits are zero, because we now know that the output is
1890 if ((KnownZero2 & MaskV) == MaskV) {
1891 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1892 // Top bits known zero.
1893 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1900 // Output known-0 bits are known if clear or set in both the low clear bits
1901 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1902 // low 3 bits clear.
1903 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1904 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1905 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1906 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1908 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1909 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1910 KnownZeroOut = std::min(KnownZeroOut,
1911 KnownZero2.countTrailingOnes());
1913 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1917 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1918 const APInt &RA = Rem->getAPIntValue();
1919 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1920 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1921 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1922 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1924 // If the sign bit of the first operand is zero, the sign bit of
1925 // the result is zero. If the first operand has no one bits below
1926 // the second operand's single 1 bit, its sign will be zero.
1927 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1928 KnownZero2 |= ~LowBits;
1930 KnownZero |= KnownZero2 & Mask;
1932 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1937 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1938 const APInt &RA = Rem->getAPIntValue();
1939 if (RA.isPowerOf2()) {
1940 APInt LowBits = (RA - 1);
1941 APInt Mask2 = LowBits & Mask;
1942 KnownZero |= ~LowBits & Mask;
1943 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1944 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1949 // Since the result is less than or equal to either operand, any leading
1950 // zero bits in either operand must also exist in the result.
1951 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1952 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1954 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1957 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1958 KnownZero2.countLeadingOnes());
1960 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1964 // Allow the target to implement this method for its nodes.
1965 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1966 case ISD::INTRINSIC_WO_CHAIN:
1967 case ISD::INTRINSIC_W_CHAIN:
1968 case ISD::INTRINSIC_VOID:
1969 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1976 /// ComputeNumSignBits - Return the number of times the sign bit of the
1977 /// register is replicated into the other bits. We know that at least 1 bit
1978 /// is always equal to the sign bit (itself), but other cases can give us
1979 /// information. For example, immediately after an "SRA X, 2", we know that
1980 /// the top 3 bits are all equal to each other, so we return 3.
1981 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1982 EVT VT = Op.getValueType();
1983 assert(VT.isInteger() && "Invalid VT!");
1984 unsigned VTBits = VT.getSizeInBits();
1986 unsigned FirstAnswer = 1;
1989 return 1; // Limit search depth.
1991 switch (Op.getOpcode()) {
1993 case ISD::AssertSext:
1994 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1995 return VTBits-Tmp+1;
1996 case ISD::AssertZext:
1997 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2000 case ISD::Constant: {
2001 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2002 // If negative, return # leading ones.
2003 if (Val.isNegative())
2004 return Val.countLeadingOnes();
2006 // Return # leading zeros.
2007 return Val.countLeadingZeros();
2010 case ISD::SIGN_EXTEND:
2011 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2012 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2014 case ISD::SIGN_EXTEND_INREG:
2015 // Max of the input and what this extends.
2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2019 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2020 return std::max(Tmp, Tmp2);
2023 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2024 // SRA X, C -> adds C sign bits.
2025 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2026 Tmp += C->getZExtValue();
2027 if (Tmp > VTBits) Tmp = VTBits;
2031 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2032 // shl destroys sign bits.
2033 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2034 if (C->getZExtValue() >= VTBits || // Bad shift.
2035 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2036 return Tmp - C->getZExtValue();
2041 case ISD::XOR: // NOT is handled here.
2042 // Logical binary ops preserve the number of sign bits at the worst.
2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2045 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2046 FirstAnswer = std::min(Tmp, Tmp2);
2047 // We computed what we know about the sign bits as our first
2048 // answer. Now proceed to the generic code that uses
2049 // ComputeMaskedBits, and pick whichever answer is better.
2054 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2055 if (Tmp == 1) return 1; // Early out.
2056 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2057 return std::min(Tmp, Tmp2);
2065 if (Op.getResNo() != 1)
2067 // The boolean result conforms to getBooleanContents. Fall through.
2069 // If setcc returns 0/-1, all bits are sign bits.
2070 if (TLI.getBooleanContents() ==
2071 TargetLowering::ZeroOrNegativeOneBooleanContent)
2076 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2077 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2079 // Handle rotate right by N like a rotate left by 32-N.
2080 if (Op.getOpcode() == ISD::ROTR)
2081 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2083 // If we aren't rotating out all of the known-in sign bits, return the
2084 // number that are left. This handles rotl(sext(x), 1) for example.
2085 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2086 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2090 // Add can have at most one carry bit. Thus we know that the output
2091 // is, at worst, one more bit than the inputs.
2092 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2093 if (Tmp == 1) return 1; // Early out.
2095 // Special case decrementing a value (ADD X, -1):
2096 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2097 if (CRHS->isAllOnesValue()) {
2098 APInt KnownZero, KnownOne;
2099 APInt Mask = APInt::getAllOnesValue(VTBits);
2100 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2102 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2104 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2107 // If we are subtracting one from a positive number, there is no carry
2108 // out of the result.
2109 if (KnownZero.isNegative())
2113 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2114 if (Tmp2 == 1) return 1;
2115 return std::min(Tmp, Tmp2)-1;
2119 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2120 if (Tmp2 == 1) return 1;
2123 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2124 if (CLHS->isNullValue()) {
2125 APInt KnownZero, KnownOne;
2126 APInt Mask = APInt::getAllOnesValue(VTBits);
2127 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2128 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2130 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2133 // If the input is known to be positive (the sign bit is known clear),
2134 // the output of the NEG has the same number of sign bits as the input.
2135 if (KnownZero.isNegative())
2138 // Otherwise, we treat this like a SUB.
2141 // Sub can have at most one carry bit. Thus we know that the output
2142 // is, at worst, one more bit than the inputs.
2143 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2144 if (Tmp == 1) return 1; // Early out.
2145 return std::min(Tmp, Tmp2)-1;
2148 // FIXME: it's tricky to do anything useful for this, but it is an important
2149 // case for targets like X86.
2153 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2154 if (Op.getOpcode() == ISD::LOAD) {
2155 LoadSDNode *LD = cast<LoadSDNode>(Op);
2156 unsigned ExtType = LD->getExtensionType();
2159 case ISD::SEXTLOAD: // '17' bits known
2160 Tmp = LD->getMemoryVT().getSizeInBits();
2161 return VTBits-Tmp+1;
2162 case ISD::ZEXTLOAD: // '16' bits known
2163 Tmp = LD->getMemoryVT().getSizeInBits();
2168 // Allow the target to implement this method for its nodes.
2169 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2170 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2171 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2172 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2173 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2174 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2177 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2178 // use this information.
2179 APInt KnownZero, KnownOne;
2180 APInt Mask = APInt::getAllOnesValue(VTBits);
2181 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2183 if (KnownZero.isNegative()) { // sign bit is 0
2185 } else if (KnownOne.isNegative()) { // sign bit is 1;
2192 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2193 // the number of identical bits in the top of the input value.
2195 Mask <<= Mask.getBitWidth()-VTBits;
2196 // Return # leading zeros. We use 'min' here in case Val was zero before
2197 // shifting. We don't want to return '64' as for an i32 "0".
2198 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2201 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2202 // If we're told that NaNs won't happen, assume they won't.
2203 if (FiniteOnlyFPMath())
2206 // If the value is a constant, we can obviously see if it is a NaN or not.
2207 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2208 return !C->getValueAPF().isNaN();
2210 // TODO: Recognize more cases here.
2215 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2216 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2217 if (!GA) return false;
2218 if (GA->getOffset() != 0) return false;
2219 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2220 if (!GV) return false;
2221 MachineModuleInfo *MMI = getMachineModuleInfo();
2222 return MMI && MMI->hasDebugInfo();
2226 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2227 /// element of the result of the vector shuffle.
2228 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2230 EVT VT = N->getValueType(0);
2231 DebugLoc dl = N->getDebugLoc();
2232 if (N->getMaskElt(i) < 0)
2233 return getUNDEF(VT.getVectorElementType());
2234 unsigned Index = N->getMaskElt(i);
2235 unsigned NumElems = VT.getVectorNumElements();
2236 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2239 if (V.getOpcode() == ISD::BIT_CONVERT) {
2240 V = V.getOperand(0);
2241 EVT VVT = V.getValueType();
2242 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2245 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2246 return (Index == 0) ? V.getOperand(0)
2247 : getUNDEF(VT.getVectorElementType());
2248 if (V.getOpcode() == ISD::BUILD_VECTOR)
2249 return V.getOperand(Index);
2250 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2251 return getShuffleScalarElt(SVN, Index);
2256 /// getNode - Gets or creates the specified node.
2258 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2259 FoldingSetNodeID ID;
2260 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2263 return SDValue(E, 0);
2264 SDNode *N = NodeAllocator.Allocate<SDNode>();
2265 new (N) SDNode(Opcode, DL, getVTList(VT));
2266 CSEMap.InsertNode(N, IP);
2268 AllNodes.push_back(N);
2272 return SDValue(N, 0);
2275 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2276 EVT VT, SDValue Operand) {
2277 // Constant fold unary operations with an integer constant operand.
2278 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2279 const APInt &Val = C->getAPIntValue();
2280 unsigned BitWidth = VT.getSizeInBits();
2283 case ISD::SIGN_EXTEND:
2284 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2285 case ISD::ANY_EXTEND:
2286 case ISD::ZERO_EXTEND:
2288 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2289 case ISD::UINT_TO_FP:
2290 case ISD::SINT_TO_FP: {
2291 const uint64_t zero[] = {0, 0};
2292 // No compile time operations on this type.
2293 if (VT==MVT::ppcf128)
2295 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2296 (void)apf.convertFromAPInt(Val,
2297 Opcode==ISD::SINT_TO_FP,
2298 APFloat::rmNearestTiesToEven);
2299 return getConstantFP(apf, VT);
2301 case ISD::BIT_CONVERT:
2302 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2303 return getConstantFP(Val.bitsToFloat(), VT);
2304 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2305 return getConstantFP(Val.bitsToDouble(), VT);
2308 return getConstant(Val.byteSwap(), VT);
2310 return getConstant(Val.countPopulation(), VT);
2312 return getConstant(Val.countLeadingZeros(), VT);
2314 return getConstant(Val.countTrailingZeros(), VT);
2318 // Constant fold unary operations with a floating point constant operand.
2319 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2320 APFloat V = C->getValueAPF(); // make copy
2321 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2325 return getConstantFP(V, VT);
2328 return getConstantFP(V, VT);
2330 case ISD::FP_EXTEND: {
2332 // This can return overflow, underflow, or inexact; we don't care.
2333 // FIXME need to be more flexible about rounding mode.
2334 (void)V.convert(*EVTToAPFloatSemantics(VT),
2335 APFloat::rmNearestTiesToEven, &ignored);
2336 return getConstantFP(V, VT);
2338 case ISD::FP_TO_SINT:
2339 case ISD::FP_TO_UINT: {
2342 assert(integerPartWidth >= 64);
2343 // FIXME need to be more flexible about rounding mode.
2344 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2345 Opcode==ISD::FP_TO_SINT,
2346 APFloat::rmTowardZero, &ignored);
2347 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2349 APInt api(VT.getSizeInBits(), 2, x);
2350 return getConstant(api, VT);
2352 case ISD::BIT_CONVERT:
2353 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2354 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2355 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2356 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2362 unsigned OpOpcode = Operand.getNode()->getOpcode();
2364 case ISD::TokenFactor:
2365 case ISD::MERGE_VALUES:
2366 case ISD::CONCAT_VECTORS:
2367 return Operand; // Factor, merge or concat of one node? No need.
2368 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2369 case ISD::FP_EXTEND:
2370 assert(VT.isFloatingPoint() &&
2371 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2372 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2373 if (Operand.getOpcode() == ISD::UNDEF)
2374 return getUNDEF(VT);
2376 case ISD::SIGN_EXTEND:
2377 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2378 "Invalid SIGN_EXTEND!");
2379 if (Operand.getValueType() == VT) return Operand; // noop extension
2380 assert(Operand.getValueType().bitsLT(VT)
2381 && "Invalid sext node, dst < src!");
2382 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2383 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2385 case ISD::ZERO_EXTEND:
2386 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2387 "Invalid ZERO_EXTEND!");
2388 if (Operand.getValueType() == VT) return Operand; // noop extension
2389 assert(Operand.getValueType().bitsLT(VT)
2390 && "Invalid zext node, dst < src!");
2391 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2392 return getNode(ISD::ZERO_EXTEND, DL, VT,
2393 Operand.getNode()->getOperand(0));
2395 case ISD::ANY_EXTEND:
2396 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2397 "Invalid ANY_EXTEND!");
2398 if (Operand.getValueType() == VT) return Operand; // noop extension
2399 assert(Operand.getValueType().bitsLT(VT)
2400 && "Invalid anyext node, dst < src!");
2401 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2402 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2403 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2406 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2407 "Invalid TRUNCATE!");
2408 if (Operand.getValueType() == VT) return Operand; // noop truncate
2409 assert(Operand.getValueType().bitsGT(VT)
2410 && "Invalid truncate node, src < dst!");
2411 if (OpOpcode == ISD::TRUNCATE)
2412 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2413 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2414 OpOpcode == ISD::ANY_EXTEND) {
2415 // If the source is smaller than the dest, we still need an extend.
2416 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2417 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2418 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2419 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2421 return Operand.getNode()->getOperand(0);
2424 case ISD::BIT_CONVERT:
2425 // Basic sanity checking.
2426 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2427 && "Cannot BIT_CONVERT between types of different sizes!");
2428 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2429 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2430 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2431 if (OpOpcode == ISD::UNDEF)
2432 return getUNDEF(VT);
2434 case ISD::SCALAR_TO_VECTOR:
2435 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2436 (VT.getVectorElementType() == Operand.getValueType() ||
2437 (VT.getVectorElementType().isInteger() &&
2438 Operand.getValueType().isInteger() &&
2439 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2440 "Illegal SCALAR_TO_VECTOR node!");
2441 if (OpOpcode == ISD::UNDEF)
2442 return getUNDEF(VT);
2443 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2444 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2445 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2446 Operand.getConstantOperandVal(1) == 0 &&
2447 Operand.getOperand(0).getValueType() == VT)
2448 return Operand.getOperand(0);
2451 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2452 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2453 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2454 Operand.getNode()->getOperand(0));
2455 if (OpOpcode == ISD::FNEG) // --X -> X
2456 return Operand.getNode()->getOperand(0);
2459 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2460 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2465 SDVTList VTs = getVTList(VT);
2466 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2467 FoldingSetNodeID ID;
2468 SDValue Ops[1] = { Operand };
2469 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2471 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2472 return SDValue(E, 0);
2473 N = NodeAllocator.Allocate<UnarySDNode>();
2474 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2475 CSEMap.InsertNode(N, IP);
2477 N = NodeAllocator.Allocate<UnarySDNode>();
2478 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2481 AllNodes.push_back(N);
2485 return SDValue(N, 0);
2488 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2490 ConstantSDNode *Cst1,
2491 ConstantSDNode *Cst2) {
2492 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2495 case ISD::ADD: return getConstant(C1 + C2, VT);
2496 case ISD::SUB: return getConstant(C1 - C2, VT);
2497 case ISD::MUL: return getConstant(C1 * C2, VT);
2499 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2502 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2505 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2508 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2510 case ISD::AND: return getConstant(C1 & C2, VT);
2511 case ISD::OR: return getConstant(C1 | C2, VT);
2512 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2513 case ISD::SHL: return getConstant(C1 << C2, VT);
2514 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2515 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2516 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2517 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2524 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2525 SDValue N1, SDValue N2) {
2526 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2527 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2530 case ISD::TokenFactor:
2531 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2532 N2.getValueType() == MVT::Other && "Invalid token factor!");
2533 // Fold trivial token factors.
2534 if (N1.getOpcode() == ISD::EntryToken) return N2;
2535 if (N2.getOpcode() == ISD::EntryToken) return N1;
2536 if (N1 == N2) return N1;
2538 case ISD::CONCAT_VECTORS:
2539 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2540 // one big BUILD_VECTOR.
2541 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2542 N2.getOpcode() == ISD::BUILD_VECTOR) {
2543 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2544 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2545 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2549 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2550 N1.getValueType() == VT && "Binary operator types must match!");
2551 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2552 // worth handling here.
2553 if (N2C && N2C->isNullValue())
2555 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2562 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2563 N1.getValueType() == VT && "Binary operator types must match!");
2564 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2565 // it's worth handling here.
2566 if (N2C && N2C->isNullValue())
2576 assert(VT.isInteger() && "This operator does not apply to FP types!");
2584 if (Opcode == ISD::FADD) {
2586 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2587 if (CFP->getValueAPF().isZero())
2590 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2591 if (CFP->getValueAPF().isZero())
2593 } else if (Opcode == ISD::FSUB) {
2595 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2596 if (CFP->getValueAPF().isZero())
2600 assert(N1.getValueType() == N2.getValueType() &&
2601 N1.getValueType() == VT && "Binary operator types must match!");
2603 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2604 assert(N1.getValueType() == VT &&
2605 N1.getValueType().isFloatingPoint() &&
2606 N2.getValueType().isFloatingPoint() &&
2607 "Invalid FCOPYSIGN!");
2614 assert(VT == N1.getValueType() &&
2615 "Shift operators return type must be the same as their first arg");
2616 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2617 "Shifts only work on integers");
2619 // Always fold shifts of i1 values so the code generator doesn't need to
2620 // handle them. Since we know the size of the shift has to be less than the
2621 // size of the value, the shift/rotate count is guaranteed to be zero.
2625 case ISD::FP_ROUND_INREG: {
2626 EVT EVT = cast<VTSDNode>(N2)->getVT();
2627 assert(VT == N1.getValueType() && "Not an inreg round!");
2628 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2629 "Cannot FP_ROUND_INREG integer types");
2630 assert(EVT.bitsLE(VT) && "Not rounding down!");
2631 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2635 assert(VT.isFloatingPoint() &&
2636 N1.getValueType().isFloatingPoint() &&
2637 VT.bitsLE(N1.getValueType()) &&
2638 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2639 if (N1.getValueType() == VT) return N1; // noop conversion.
2641 case ISD::AssertSext:
2642 case ISD::AssertZext: {
2643 EVT EVT = cast<VTSDNode>(N2)->getVT();
2644 assert(VT == N1.getValueType() && "Not an inreg extend!");
2645 assert(VT.isInteger() && EVT.isInteger() &&
2646 "Cannot *_EXTEND_INREG FP types");
2647 assert(EVT.bitsLE(VT) && "Not extending!");
2648 if (VT == EVT) return N1; // noop assertion.
2651 case ISD::SIGN_EXTEND_INREG: {
2652 EVT EVT = cast<VTSDNode>(N2)->getVT();
2653 assert(VT == N1.getValueType() && "Not an inreg extend!");
2654 assert(VT.isInteger() && EVT.isInteger() &&
2655 "Cannot *_EXTEND_INREG FP types");
2656 assert(EVT.bitsLE(VT) && "Not extending!");
2657 if (EVT == VT) return N1; // Not actually extending
2660 APInt Val = N1C->getAPIntValue();
2661 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2662 Val <<= Val.getBitWidth()-FromBits;
2663 Val = Val.ashr(Val.getBitWidth()-FromBits);
2664 return getConstant(Val, VT);
2668 case ISD::EXTRACT_VECTOR_ELT:
2669 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2670 if (N1.getOpcode() == ISD::UNDEF)
2671 return getUNDEF(VT);
2673 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2674 // expanding copies of large vectors from registers.
2676 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2677 N1.getNumOperands() > 0) {
2679 N1.getOperand(0).getValueType().getVectorNumElements();
2680 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2681 N1.getOperand(N2C->getZExtValue() / Factor),
2682 getConstant(N2C->getZExtValue() % Factor,
2683 N2.getValueType()));
2686 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2687 // expanding large vector constants.
2688 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2689 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2690 EVT VEltTy = N1.getValueType().getVectorElementType();
2691 if (Elt.getValueType() != VEltTy) {
2692 // If the vector element type is not legal, the BUILD_VECTOR operands
2693 // are promoted and implicitly truncated. Make that explicit here.
2694 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2697 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2698 // result is implicitly extended.
2699 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2704 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2705 // operations are lowered to scalars.
2706 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2707 // If the indices are the same, return the inserted element.
2708 if (N1.getOperand(2) == N2)
2709 return N1.getOperand(1);
2710 // If the indices are known different, extract the element from
2711 // the original vector.
2712 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2713 isa<ConstantSDNode>(N2))
2714 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2717 case ISD::EXTRACT_ELEMENT:
2718 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2719 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2720 (N1.getValueType().isInteger() == VT.isInteger()) &&
2721 "Wrong types for EXTRACT_ELEMENT!");
2723 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2724 // 64-bit integers into 32-bit parts. Instead of building the extract of
2725 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2726 if (N1.getOpcode() == ISD::BUILD_PAIR)
2727 return N1.getOperand(N2C->getZExtValue());
2729 // EXTRACT_ELEMENT of a constant int is also very common.
2730 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2731 unsigned ElementSize = VT.getSizeInBits();
2732 unsigned Shift = ElementSize * N2C->getZExtValue();
2733 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2734 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2737 case ISD::EXTRACT_SUBVECTOR:
2738 if (N1.getValueType() == VT) // Trivial extraction.
2745 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2746 if (SV.getNode()) return SV;
2747 } else { // Cannonicalize constant to RHS if commutative
2748 if (isCommutativeBinOp(Opcode)) {
2749 std::swap(N1C, N2C);
2755 // Constant fold FP operations.
2756 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2757 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2759 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2760 // Cannonicalize constant to RHS if commutative
2761 std::swap(N1CFP, N2CFP);
2763 } else if (N2CFP && VT != MVT::ppcf128) {
2764 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2765 APFloat::opStatus s;
2768 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2769 if (s != APFloat::opInvalidOp)
2770 return getConstantFP(V1, VT);
2773 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2774 if (s!=APFloat::opInvalidOp)
2775 return getConstantFP(V1, VT);
2778 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2779 if (s!=APFloat::opInvalidOp)
2780 return getConstantFP(V1, VT);
2783 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2784 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2785 return getConstantFP(V1, VT);
2788 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2789 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2790 return getConstantFP(V1, VT);
2792 case ISD::FCOPYSIGN:
2794 return getConstantFP(V1, VT);
2800 // Canonicalize an UNDEF to the RHS, even over a constant.
2801 if (N1.getOpcode() == ISD::UNDEF) {
2802 if (isCommutativeBinOp(Opcode)) {
2806 case ISD::FP_ROUND_INREG:
2807 case ISD::SIGN_EXTEND_INREG:
2813 return N1; // fold op(undef, arg2) -> undef
2821 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2822 // For vectors, we can't easily build an all zero vector, just return
2829 // Fold a bunch of operators when the RHS is undef.
2830 if (N2.getOpcode() == ISD::UNDEF) {
2833 if (N1.getOpcode() == ISD::UNDEF)
2834 // Handle undef ^ undef -> 0 special case. This is a common
2836 return getConstant(0, VT);
2846 return N2; // fold op(arg1, undef) -> undef
2860 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2861 // For vectors, we can't easily build an all zero vector, just return
2866 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2867 // For vectors, we can't easily build an all one vector, just return
2875 // Memoize this node if possible.
2877 SDVTList VTs = getVTList(VT);
2878 if (VT != MVT::Flag) {
2879 SDValue Ops[] = { N1, N2 };
2880 FoldingSetNodeID ID;
2881 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2884 return SDValue(E, 0);
2885 N = NodeAllocator.Allocate<BinarySDNode>();
2886 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2887 CSEMap.InsertNode(N, IP);
2889 N = NodeAllocator.Allocate<BinarySDNode>();
2890 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2893 AllNodes.push_back(N);
2897 return SDValue(N, 0);
2900 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2901 SDValue N1, SDValue N2, SDValue N3) {
2902 // Perform various simplifications.
2903 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2904 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2906 case ISD::CONCAT_VECTORS:
2907 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2908 // one big BUILD_VECTOR.
2909 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2910 N2.getOpcode() == ISD::BUILD_VECTOR &&
2911 N3.getOpcode() == ISD::BUILD_VECTOR) {
2912 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2913 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2914 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2915 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2919 // Use FoldSetCC to simplify SETCC's.
2920 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2921 if (Simp.getNode()) return Simp;
2926 if (N1C->getZExtValue())
2927 return N2; // select true, X, Y -> X
2929 return N3; // select false, X, Y -> Y
2932 if (N2 == N3) return N2; // select C, X, X -> X
2936 if (N2C->getZExtValue()) // Unconditional branch
2937 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2939 return N1; // Never-taken branch
2942 case ISD::VECTOR_SHUFFLE:
2943 llvm_unreachable("should use getVectorShuffle constructor!");
2945 case ISD::BIT_CONVERT:
2946 // Fold bit_convert nodes from a type to themselves.
2947 if (N1.getValueType() == VT)
2952 // Memoize node if it doesn't produce a flag.
2954 SDVTList VTs = getVTList(VT);
2955 if (VT != MVT::Flag) {
2956 SDValue Ops[] = { N1, N2, N3 };
2957 FoldingSetNodeID ID;
2958 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2961 return SDValue(E, 0);
2962 N = NodeAllocator.Allocate<TernarySDNode>();
2963 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2964 CSEMap.InsertNode(N, IP);
2966 N = NodeAllocator.Allocate<TernarySDNode>();
2967 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2969 AllNodes.push_back(N);
2973 return SDValue(N, 0);
2976 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2977 SDValue N1, SDValue N2, SDValue N3,
2979 SDValue Ops[] = { N1, N2, N3, N4 };
2980 return getNode(Opcode, DL, VT, Ops, 4);
2983 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2984 SDValue N1, SDValue N2, SDValue N3,
2985 SDValue N4, SDValue N5) {
2986 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2987 return getNode(Opcode, DL, VT, Ops, 5);
2990 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
2991 /// the incoming stack arguments to be loaded from the stack.
2992 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
2993 SmallVector<SDValue, 8> ArgChains;
2995 // Include the original chain at the beginning of the list. When this is
2996 // used by target LowerCall hooks, this helps legalize find the
2997 // CALLSEQ_BEGIN node.
2998 ArgChains.push_back(Chain);
3000 // Add a chain value for each stack argument.
3001 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3002 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3003 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3004 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3005 if (FI->getIndex() < 0)
3006 ArgChains.push_back(SDValue(L, 1));
3008 // Build a tokenfactor for all the chains.
3009 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3010 &ArgChains[0], ArgChains.size());
3013 /// getMemsetValue - Vectorized representation of the memset value
3015 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3017 unsigned NumBits = VT.isVector() ?
3018 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3019 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3020 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3022 for (unsigned i = NumBits; i > 8; i >>= 1) {
3023 Val = (Val << Shift) | Val;
3027 return DAG.getConstant(Val, VT);
3028 return DAG.getConstantFP(APFloat(Val), VT);
3031 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3032 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3034 for (unsigned i = NumBits; i > 8; i >>= 1) {
3035 Value = DAG.getNode(ISD::OR, dl, VT,
3036 DAG.getNode(ISD::SHL, dl, VT, Value,
3037 DAG.getConstant(Shift,
3038 TLI.getShiftAmountTy())),
3046 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3047 /// used when a memcpy is turned into a memset when the source is a constant
3049 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3050 const TargetLowering &TLI,
3051 std::string &Str, unsigned Offset) {
3052 // Handle vector with all elements zero.
3055 return DAG.getConstant(0, VT);
3056 unsigned NumElts = VT.getVectorNumElements();
3057 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3058 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3060 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts)));
3063 assert(!VT.isVector() && "Can't handle vector type here!");
3064 unsigned NumBits = VT.getSizeInBits();
3065 unsigned MSB = NumBits / 8;
3067 if (TLI.isLittleEndian())
3068 Offset = Offset + MSB - 1;
3069 for (unsigned i = 0; i != MSB; ++i) {
3070 Val = (Val << 8) | (unsigned char)Str[Offset];
3071 Offset += TLI.isLittleEndian() ? -1 : 1;
3073 return DAG.getConstant(Val, VT);
3076 /// getMemBasePlusOffset - Returns base and offset node for the
3078 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3079 SelectionDAG &DAG) {
3080 EVT VT = Base.getValueType();
3081 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3082 VT, Base, DAG.getConstant(Offset, VT));
3085 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3087 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3088 unsigned SrcDelta = 0;
3089 GlobalAddressSDNode *G = NULL;
3090 if (Src.getOpcode() == ISD::GlobalAddress)
3091 G = cast<GlobalAddressSDNode>(Src);
3092 else if (Src.getOpcode() == ISD::ADD &&
3093 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3094 Src.getOperand(1).getOpcode() == ISD::Constant) {
3095 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3096 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3101 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3102 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3108 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3109 /// to replace the memset / memcpy is below the threshold. It also returns the
3110 /// types of the sequence of memory ops to perform memset / memcpy.
3112 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3113 SDValue Dst, SDValue Src,
3114 unsigned Limit, uint64_t Size, unsigned &Align,
3115 std::string &Str, bool &isSrcStr,
3117 const TargetLowering &TLI) {
3118 isSrcStr = isMemSrcFromString(Src, Str);
3119 bool isSrcConst = isa<ConstantSDNode>(Src);
3120 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3121 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT);
3122 if (VT != MVT::iAny) {
3123 const Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3124 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3125 // If source is a string constant, this will require an unaligned load.
3126 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3127 if (Dst.getOpcode() != ISD::FrameIndex) {
3128 // Can't change destination alignment. It requires a unaligned store.
3132 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3133 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3134 if (MFI->isFixedObjectIndex(FI)) {
3135 // Can't change destination alignment. It requires a unaligned store.
3139 // Give the stack frame object a larger alignment if needed.
3140 if (MFI->getObjectAlignment(FI) < NewAlign)
3141 MFI->setObjectAlignment(FI, NewAlign);
3148 if (VT == MVT::iAny) {
3149 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) {
3152 switch (Align & 7) {
3153 case 0: VT = MVT::i64; break;
3154 case 4: VT = MVT::i32; break;
3155 case 2: VT = MVT::i16; break;
3156 default: VT = MVT::i8; break;
3161 while (!TLI.isTypeLegal(LVT))
3162 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3163 assert(LVT.isInteger());
3169 unsigned NumMemOps = 0;
3171 unsigned VTSize = VT.getSizeInBits() / 8;
3172 while (VTSize > Size) {
3173 // For now, only use non-vector load / store's for the left-over pieces.
3174 if (VT.isVector()) {
3176 while (!TLI.isTypeLegal(VT))
3177 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3178 VTSize = VT.getSizeInBits() / 8;
3180 // This can result in a type that is not legal on the target, e.g.
3181 // 1 or 2 bytes on PPC.
3182 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3187 if (++NumMemOps > Limit)
3189 MemOps.push_back(VT);
3196 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3197 SDValue Chain, SDValue Dst,
3198 SDValue Src, uint64_t Size,
3199 unsigned Align, bool AlwaysInline,
3200 const Value *DstSV, uint64_t DstSVOff,
3201 const Value *SrcSV, uint64_t SrcSVOff){
3202 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3204 // Expand memcpy to a series of load and store ops if the size operand falls
3205 // below a certain threshold.
3206 std::vector<EVT> MemOps;
3207 uint64_t Limit = -1ULL;
3209 Limit = TLI.getMaxStoresPerMemcpy();
3210 unsigned DstAlign = Align; // Destination alignment can change.
3213 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3214 Str, CopyFromStr, DAG, TLI))
3218 bool isZeroStr = CopyFromStr && Str.empty();
3219 SmallVector<SDValue, 8> OutChains;
3220 unsigned NumMemOps = MemOps.size();
3221 uint64_t SrcOff = 0, DstOff = 0;
3222 for (unsigned i = 0; i < NumMemOps; i++) {
3224 unsigned VTSize = VT.getSizeInBits() / 8;
3225 SDValue Value, Store;
3227 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3228 // It's unlikely a store of a vector immediate can be done in a single
3229 // instruction. It would require a load from a constantpool first.
3230 // We also handle store a vector with all zero's.
3231 // FIXME: Handle other cases where store of vector immediate is done in
3232 // a single instruction.
3233 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3234 Store = DAG.getStore(Chain, dl, Value,
3235 getMemBasePlusOffset(Dst, DstOff, DAG),
3236 DstSV, DstSVOff + DstOff, false, DstAlign);
3238 // The type might not be legal for the target. This should only happen
3239 // if the type is smaller than a legal type, as on PPC, so the right
3240 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3241 // to Load/Store if NVT==VT.
3242 // FIXME does the case above also need this?
3243 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3244 assert(NVT.bitsGE(VT));
3245 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3246 getMemBasePlusOffset(Src, SrcOff, DAG),
3247 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3248 Store = DAG.getTruncStore(Chain, dl, Value,
3249 getMemBasePlusOffset(Dst, DstOff, DAG),
3250 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3252 OutChains.push_back(Store);
3257 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3258 &OutChains[0], OutChains.size());
3261 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3262 SDValue Chain, SDValue Dst,
3263 SDValue Src, uint64_t Size,
3264 unsigned Align, bool AlwaysInline,
3265 const Value *DstSV, uint64_t DstSVOff,
3266 const Value *SrcSV, uint64_t SrcSVOff){
3267 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3269 // Expand memmove to a series of load and store ops if the size operand falls
3270 // below a certain threshold.
3271 std::vector<EVT> MemOps;
3272 uint64_t Limit = -1ULL;
3274 Limit = TLI.getMaxStoresPerMemmove();
3275 unsigned DstAlign = Align; // Destination alignment can change.
3278 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3279 Str, CopyFromStr, DAG, TLI))
3282 uint64_t SrcOff = 0, DstOff = 0;
3284 SmallVector<SDValue, 8> LoadValues;
3285 SmallVector<SDValue, 8> LoadChains;
3286 SmallVector<SDValue, 8> OutChains;
3287 unsigned NumMemOps = MemOps.size();
3288 for (unsigned i = 0; i < NumMemOps; i++) {
3290 unsigned VTSize = VT.getSizeInBits() / 8;
3291 SDValue Value, Store;
3293 Value = DAG.getLoad(VT, dl, Chain,
3294 getMemBasePlusOffset(Src, SrcOff, DAG),
3295 SrcSV, SrcSVOff + SrcOff, false, Align);
3296 LoadValues.push_back(Value);
3297 LoadChains.push_back(Value.getValue(1));
3300 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3301 &LoadChains[0], LoadChains.size());
3303 for (unsigned i = 0; i < NumMemOps; i++) {
3305 unsigned VTSize = VT.getSizeInBits() / 8;
3306 SDValue Value, Store;
3308 Store = DAG.getStore(Chain, dl, LoadValues[i],
3309 getMemBasePlusOffset(Dst, DstOff, DAG),
3310 DstSV, DstSVOff + DstOff, false, DstAlign);
3311 OutChains.push_back(Store);
3315 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3316 &OutChains[0], OutChains.size());
3319 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3320 SDValue Chain, SDValue Dst,
3321 SDValue Src, uint64_t Size,
3323 const Value *DstSV, uint64_t DstSVOff) {
3324 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3326 // Expand memset to a series of load/store ops if the size operand
3327 // falls below a certain threshold.
3328 std::vector<EVT> MemOps;
3331 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3332 Size, Align, Str, CopyFromStr, DAG, TLI))
3335 SmallVector<SDValue, 8> OutChains;
3336 uint64_t DstOff = 0;
3338 unsigned NumMemOps = MemOps.size();
3339 for (unsigned i = 0; i < NumMemOps; i++) {
3341 unsigned VTSize = VT.getSizeInBits() / 8;
3342 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3343 SDValue Store = DAG.getStore(Chain, dl, Value,
3344 getMemBasePlusOffset(Dst, DstOff, DAG),
3345 DstSV, DstSVOff + DstOff);
3346 OutChains.push_back(Store);
3350 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3351 &OutChains[0], OutChains.size());
3354 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3355 SDValue Src, SDValue Size,
3356 unsigned Align, bool AlwaysInline,
3357 const Value *DstSV, uint64_t DstSVOff,
3358 const Value *SrcSV, uint64_t SrcSVOff) {
3360 // Check to see if we should lower the memcpy to loads and stores first.
3361 // For cases within the target-specified limits, this is the best choice.
3362 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3364 // Memcpy with size zero? Just return the original chain.
3365 if (ConstantSize->isNullValue())
3369 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3370 ConstantSize->getZExtValue(),
3371 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3372 if (Result.getNode())
3376 // Then check to see if we should lower the memcpy with target-specific
3377 // code. If the target chooses to do this, this is the next best.
3379 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3381 DstSV, DstSVOff, SrcSV, SrcSVOff);
3382 if (Result.getNode())
3385 // If we really need inline code and the target declined to provide it,
3386 // use a (potentially long) sequence of loads and stores.
3388 assert(ConstantSize && "AlwaysInline requires a constant size!");
3389 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3390 ConstantSize->getZExtValue(), Align, true,
3391 DstSV, DstSVOff, SrcSV, SrcSVOff);
3394 // Emit a library call.
3395 TargetLowering::ArgListTy Args;
3396 TargetLowering::ArgListEntry Entry;
3397 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3398 Entry.Node = Dst; Args.push_back(Entry);
3399 Entry.Node = Src; Args.push_back(Entry);
3400 Entry.Node = Size; Args.push_back(Entry);
3401 // FIXME: pass in DebugLoc
3402 std::pair<SDValue,SDValue> CallResult =
3403 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3404 false, false, false, false, 0,
3405 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3406 /*isReturnValueUsed=*/false,
3407 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3408 TLI.getPointerTy()),
3410 return CallResult.second;
3413 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3414 SDValue Src, SDValue Size,
3416 const Value *DstSV, uint64_t DstSVOff,
3417 const Value *SrcSV, uint64_t SrcSVOff) {
3419 // Check to see if we should lower the memmove to loads and stores first.
3420 // For cases within the target-specified limits, this is the best choice.
3421 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3423 // Memmove with size zero? Just return the original chain.
3424 if (ConstantSize->isNullValue())
3428 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3429 ConstantSize->getZExtValue(),
3430 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3431 if (Result.getNode())
3435 // Then check to see if we should lower the memmove with target-specific
3436 // code. If the target chooses to do this, this is the next best.
3438 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3439 DstSV, DstSVOff, SrcSV, SrcSVOff);
3440 if (Result.getNode())
3443 // Emit a library call.
3444 TargetLowering::ArgListTy Args;
3445 TargetLowering::ArgListEntry Entry;
3446 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3447 Entry.Node = Dst; Args.push_back(Entry);
3448 Entry.Node = Src; Args.push_back(Entry);
3449 Entry.Node = Size; Args.push_back(Entry);
3450 // FIXME: pass in DebugLoc
3451 std::pair<SDValue,SDValue> CallResult =
3452 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3453 false, false, false, false, 0,
3454 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3455 /*isReturnValueUsed=*/false,
3456 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3457 TLI.getPointerTy()),
3459 return CallResult.second;
3462 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3463 SDValue Src, SDValue Size,
3465 const Value *DstSV, uint64_t DstSVOff) {
3467 // Check to see if we should lower the memset to stores first.
3468 // For cases within the target-specified limits, this is the best choice.
3469 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3471 // Memset with size zero? Just return the original chain.
3472 if (ConstantSize->isNullValue())
3476 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3477 Align, DstSV, DstSVOff);
3478 if (Result.getNode())
3482 // Then check to see if we should lower the memset with target-specific
3483 // code. If the target chooses to do this, this is the next best.
3485 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3487 if (Result.getNode())
3490 // Emit a library call.
3491 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3492 TargetLowering::ArgListTy Args;
3493 TargetLowering::ArgListEntry Entry;
3494 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3495 Args.push_back(Entry);
3496 // Extend or truncate the argument to be an i32 value for the call.
3497 if (Src.getValueType().bitsGT(MVT::i32))
3498 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3500 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3502 Entry.Ty = Type::getInt32Ty(*getContext());
3503 Entry.isSExt = true;
3504 Args.push_back(Entry);
3506 Entry.Ty = IntPtrTy;
3507 Entry.isSExt = false;
3508 Args.push_back(Entry);
3509 // FIXME: pass in DebugLoc
3510 std::pair<SDValue,SDValue> CallResult =
3511 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3512 false, false, false, false, 0,
3513 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3514 /*isReturnValueUsed=*/false,
3515 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3516 TLI.getPointerTy()),
3518 return CallResult.second;
3521 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3523 SDValue Ptr, SDValue Cmp,
3524 SDValue Swp, const Value* PtrVal,
3525 unsigned Alignment) {
3526 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3527 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3529 EVT VT = Cmp.getValueType();
3531 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3532 Alignment = getEVTAlignment(MemVT);
3534 SDVTList VTs = getVTList(VT, MVT::Other);
3535 FoldingSetNodeID ID;
3536 ID.AddInteger(MemVT.getRawBits());
3537 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3538 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3540 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3541 return SDValue(E, 0);
3542 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3543 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3544 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3545 CSEMap.InsertNode(N, IP);
3546 AllNodes.push_back(N);
3547 return SDValue(N, 0);
3550 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3552 SDValue Ptr, SDValue Val,
3553 const Value* PtrVal,
3554 unsigned Alignment) {
3555 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3556 Opcode == ISD::ATOMIC_LOAD_SUB ||
3557 Opcode == ISD::ATOMIC_LOAD_AND ||
3558 Opcode == ISD::ATOMIC_LOAD_OR ||
3559 Opcode == ISD::ATOMIC_LOAD_XOR ||
3560 Opcode == ISD::ATOMIC_LOAD_NAND ||
3561 Opcode == ISD::ATOMIC_LOAD_MIN ||
3562 Opcode == ISD::ATOMIC_LOAD_MAX ||
3563 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3564 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3565 Opcode == ISD::ATOMIC_SWAP) &&
3566 "Invalid Atomic Op");
3568 EVT VT = Val.getValueType();
3570 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3571 Alignment = getEVTAlignment(MemVT);
3573 SDVTList VTs = getVTList(VT, MVT::Other);
3574 FoldingSetNodeID ID;
3575 ID.AddInteger(MemVT.getRawBits());
3576 SDValue Ops[] = {Chain, Ptr, Val};
3577 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3579 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3580 return SDValue(E, 0);
3581 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3582 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3583 Chain, Ptr, Val, PtrVal, Alignment);
3584 CSEMap.InsertNode(N, IP);
3585 AllNodes.push_back(N);
3586 return SDValue(N, 0);
3589 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3590 /// Allowed to return something different (and simpler) if Simplify is true.
3591 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3596 SmallVector<EVT, 4> VTs;
3597 VTs.reserve(NumOps);
3598 for (unsigned i = 0; i < NumOps; ++i)
3599 VTs.push_back(Ops[i].getValueType());
3600 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3605 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3606 const EVT *VTs, unsigned NumVTs,
3607 const SDValue *Ops, unsigned NumOps,
3608 EVT MemVT, const Value *srcValue, int SVOff,
3609 unsigned Align, bool Vol,
3610 bool ReadMem, bool WriteMem) {
3611 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3612 MemVT, srcValue, SVOff, Align, Vol,
3617 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3618 const SDValue *Ops, unsigned NumOps,
3619 EVT MemVT, const Value *srcValue, int SVOff,
3620 unsigned Align, bool Vol,
3621 bool ReadMem, bool WriteMem) {
3622 // Memoize the node unless it returns a flag.
3623 MemIntrinsicSDNode *N;
3624 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3625 FoldingSetNodeID ID;
3626 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3628 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3629 return SDValue(E, 0);
3631 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3632 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3633 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3634 CSEMap.InsertNode(N, IP);
3636 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3637 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3638 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3640 AllNodes.push_back(N);
3641 return SDValue(N, 0);
3645 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3646 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3647 SDValue Ptr, SDValue Offset,
3648 const Value *SV, int SVOffset, EVT EVT,
3649 bool isVolatile, unsigned Alignment,
3650 unsigned OrigAlignment) {
3651 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3652 Alignment = getEVTAlignment(VT);
3653 if (OrigAlignment == 0)
3654 OrigAlignment = Alignment;
3657 ExtType = ISD::NON_EXTLOAD;
3658 } else if (ExtType == ISD::NON_EXTLOAD) {
3659 assert(VT == EVT && "Non-extending load from different memory type!");
3663 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3664 "Invalid vector extload!");
3666 assert(EVT.bitsLT(VT) &&
3667 "Should only be an extending load, not truncating!");
3668 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3669 "Cannot sign/zero extend a FP/Vector load!");
3670 assert(VT.isInteger() == EVT.isInteger() &&
3671 "Cannot convert from FP to Int or Int -> FP!");
3674 bool Indexed = AM != ISD::UNINDEXED;
3675 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3676 "Unindexed load with an offset!");
3678 SDVTList VTs = Indexed ?
3679 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3680 SDValue Ops[] = { Chain, Ptr, Offset };
3681 FoldingSetNodeID ID;
3682 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3683 ID.AddInteger(EVT.getRawBits());
3684 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3685 ID.AddInteger(OrigAlignment);
3687 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3688 return SDValue(E, 0);
3689 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3690 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3691 Alignment, isVolatile, OrigAlignment);
3692 CSEMap.InsertNode(N, IP);
3693 AllNodes.push_back(N);
3694 return SDValue(N, 0);
3697 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3698 SDValue Chain, SDValue Ptr,
3699 const Value *SV, int SVOffset,
3700 bool isVolatile, unsigned Alignment,
3701 unsigned OrigAlignment) {
3702 SDValue Undef = getUNDEF(Ptr.getValueType());
3703 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3704 SV, SVOffset, VT, isVolatile, Alignment, OrigAlignment);
3707 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3708 SDValue Chain, SDValue Ptr,
3710 int SVOffset, EVT EVT,
3711 bool isVolatile, unsigned Alignment) {
3712 SDValue Undef = getUNDEF(Ptr.getValueType());
3713 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3714 SV, SVOffset, EVT, isVolatile, Alignment);
3718 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3719 SDValue Offset, ISD::MemIndexedMode AM) {
3720 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3721 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3722 "Load is already a indexed load!");
3723 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3724 LD->getChain(), Base, Offset, LD->getSrcValue(),
3725 LD->getSrcValueOffset(), LD->getMemoryVT(),
3726 LD->isVolatile(), LD->getAlignment());
3729 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3730 SDValue Ptr, const Value *SV, int SVOffset,
3731 bool isVolatile, unsigned Alignment,
3732 unsigned OrigAlignment) {
3733 EVT VT = Val.getValueType();
3735 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3736 Alignment = getEVTAlignment(VT);
3737 if (OrigAlignment == 0)
3738 OrigAlignment = Alignment;
3740 SDVTList VTs = getVTList(MVT::Other);
3741 SDValue Undef = getUNDEF(Ptr.getValueType());
3742 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3743 FoldingSetNodeID ID;
3744 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3745 ID.AddInteger(VT.getRawBits());
3746 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3747 isVolatile, Alignment));
3748 ID.AddInteger(OrigAlignment);
3750 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3751 return SDValue(E, 0);
3752 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3753 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3754 VT, SV, SVOffset, Alignment, isVolatile, OrigAlignment);
3755 CSEMap.InsertNode(N, IP);
3756 AllNodes.push_back(N);
3757 return SDValue(N, 0);
3760 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3761 SDValue Ptr, const Value *SV,
3762 int SVOffset, EVT SVT,
3763 bool isVolatile, unsigned Alignment) {
3764 EVT VT = Val.getValueType();
3767 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3769 assert(VT.bitsGT(SVT) && "Not a truncation?");
3770 assert(VT.isInteger() == SVT.isInteger() &&
3771 "Can't do FP-INT conversion!");
3773 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3774 Alignment = getEVTAlignment(VT);
3776 SDVTList VTs = getVTList(MVT::Other);
3777 SDValue Undef = getUNDEF(Ptr.getValueType());
3778 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3779 FoldingSetNodeID ID;
3780 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3781 ID.AddInteger(SVT.getRawBits());
3782 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3783 isVolatile, Alignment));
3785 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3786 return SDValue(E, 0);
3787 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3788 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3789 SVT, SV, SVOffset, Alignment, isVolatile);
3790 CSEMap.InsertNode(N, IP);
3791 AllNodes.push_back(N);
3792 return SDValue(N, 0);
3796 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3797 SDValue Offset, ISD::MemIndexedMode AM) {
3798 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3799 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3800 "Store is already a indexed store!");
3801 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3802 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3803 FoldingSetNodeID ID;
3804 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3805 ID.AddInteger(ST->getMemoryVT().getRawBits());
3806 ID.AddInteger(ST->getRawSubclassData());
3808 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3809 return SDValue(E, 0);
3810 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3811 new (N) StoreSDNode(Ops, dl, VTs, AM,
3812 ST->isTruncatingStore(), ST->getMemoryVT(),
3813 ST->getSrcValue(), ST->getSrcValueOffset(),
3814 ST->getAlignment(), ST->isVolatile());
3815 CSEMap.InsertNode(N, IP);
3816 AllNodes.push_back(N);
3817 return SDValue(N, 0);
3820 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
3821 SDValue Chain, SDValue Ptr,
3823 SDValue Ops[] = { Chain, Ptr, SV };
3824 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3827 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3828 const SDUse *Ops, unsigned NumOps) {
3830 case 0: return getNode(Opcode, DL, VT);
3831 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3832 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3833 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3837 // Copy from an SDUse array into an SDValue array for use with
3838 // the regular getNode logic.
3839 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3840 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3843 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3844 const SDValue *Ops, unsigned NumOps) {
3846 case 0: return getNode(Opcode, DL, VT);
3847 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3848 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3849 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3855 case ISD::SELECT_CC: {
3856 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3857 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3858 "LHS and RHS of condition must have same type!");
3859 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3860 "True and False arms of SelectCC must have same type!");
3861 assert(Ops[2].getValueType() == VT &&
3862 "select_cc node must be of same type as true and false value!");
3866 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3867 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3868 "LHS/RHS of comparison should match types!");
3875 SDVTList VTs = getVTList(VT);
3877 if (VT != MVT::Flag) {
3878 FoldingSetNodeID ID;
3879 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3882 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3883 return SDValue(E, 0);
3885 N = NodeAllocator.Allocate<SDNode>();
3886 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3887 CSEMap.InsertNode(N, IP);
3889 N = NodeAllocator.Allocate<SDNode>();
3890 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3893 AllNodes.push_back(N);
3897 return SDValue(N, 0);
3900 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3901 const std::vector<EVT> &ResultTys,
3902 const SDValue *Ops, unsigned NumOps) {
3903 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3907 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3908 const EVT *VTs, unsigned NumVTs,
3909 const SDValue *Ops, unsigned NumOps) {
3911 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3912 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3915 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3916 const SDValue *Ops, unsigned NumOps) {
3917 if (VTList.NumVTs == 1)
3918 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3922 // FIXME: figure out how to safely handle things like
3923 // int foo(int x) { return 1 << (x & 255); }
3924 // int bar() { return foo(256); }
3925 case ISD::SRA_PARTS:
3926 case ISD::SRL_PARTS:
3927 case ISD::SHL_PARTS:
3928 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3929 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3930 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3931 else if (N3.getOpcode() == ISD::AND)
3932 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3933 // If the and is only masking out bits that cannot effect the shift,
3934 // eliminate the and.
3935 unsigned NumBits = VT.getSizeInBits()*2;
3936 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3937 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3943 // Memoize the node unless it returns a flag.
3945 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3946 FoldingSetNodeID ID;
3947 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3949 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3950 return SDValue(E, 0);
3952 N = NodeAllocator.Allocate<UnarySDNode>();
3953 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3954 } else if (NumOps == 2) {
3955 N = NodeAllocator.Allocate<BinarySDNode>();
3956 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3957 } else if (NumOps == 3) {
3958 N = NodeAllocator.Allocate<TernarySDNode>();
3959 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3961 N = NodeAllocator.Allocate<SDNode>();
3962 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3964 CSEMap.InsertNode(N, IP);
3967 N = NodeAllocator.Allocate<UnarySDNode>();
3968 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3969 } else if (NumOps == 2) {
3970 N = NodeAllocator.Allocate<BinarySDNode>();
3971 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3972 } else if (NumOps == 3) {
3973 N = NodeAllocator.Allocate<TernarySDNode>();
3974 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3976 N = NodeAllocator.Allocate<SDNode>();
3977 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3980 AllNodes.push_back(N);
3984 return SDValue(N, 0);
3987 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3988 return getNode(Opcode, DL, VTList, 0, 0);
3991 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3993 SDValue Ops[] = { N1 };
3994 return getNode(Opcode, DL, VTList, Ops, 1);
3997 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3998 SDValue N1, SDValue N2) {
3999 SDValue Ops[] = { N1, N2 };
4000 return getNode(Opcode, DL, VTList, Ops, 2);
4003 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4004 SDValue N1, SDValue N2, SDValue N3) {
4005 SDValue Ops[] = { N1, N2, N3 };
4006 return getNode(Opcode, DL, VTList, Ops, 3);
4009 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4010 SDValue N1, SDValue N2, SDValue N3,
4012 SDValue Ops[] = { N1, N2, N3, N4 };
4013 return getNode(Opcode, DL, VTList, Ops, 4);
4016 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4017 SDValue N1, SDValue N2, SDValue N3,
4018 SDValue N4, SDValue N5) {
4019 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4020 return getNode(Opcode, DL, VTList, Ops, 5);
4023 SDVTList SelectionDAG::getVTList(EVT VT) {
4024 return makeVTList(SDNode::getValueTypeList(VT), 1);
4027 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4028 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4029 E = VTList.rend(); I != E; ++I)
4030 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4033 EVT *Array = Allocator.Allocate<EVT>(2);
4036 SDVTList Result = makeVTList(Array, 2);
4037 VTList.push_back(Result);
4041 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4042 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4043 E = VTList.rend(); I != E; ++I)
4044 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4048 EVT *Array = Allocator.Allocate<EVT>(3);
4052 SDVTList Result = makeVTList(Array, 3);
4053 VTList.push_back(Result);
4057 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4058 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4059 E = VTList.rend(); I != E; ++I)
4060 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4061 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4064 EVT *Array = Allocator.Allocate<EVT>(3);
4069 SDVTList Result = makeVTList(Array, 4);
4070 VTList.push_back(Result);
4074 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4076 case 0: llvm_unreachable("Cannot have nodes without results!");
4077 case 1: return getVTList(VTs[0]);
4078 case 2: return getVTList(VTs[0], VTs[1]);
4079 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4083 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4084 E = VTList.rend(); I != E; ++I) {
4085 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4088 bool NoMatch = false;
4089 for (unsigned i = 2; i != NumVTs; ++i)
4090 if (VTs[i] != I->VTs[i]) {
4098 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4099 std::copy(VTs, VTs+NumVTs, Array);
4100 SDVTList Result = makeVTList(Array, NumVTs);
4101 VTList.push_back(Result);
4106 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4107 /// specified operands. If the resultant node already exists in the DAG,
4108 /// this does not modify the specified node, instead it returns the node that
4109 /// already exists. If the resultant node does not exist in the DAG, the
4110 /// input node is returned. As a degenerate case, if you specify the same
4111 /// input operands as the node already has, the input node is returned.
4112 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4113 SDNode *N = InN.getNode();
4114 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4116 // Check to see if there is no change.
4117 if (Op == N->getOperand(0)) return InN;
4119 // See if the modified node already exists.
4120 void *InsertPos = 0;
4121 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4122 return SDValue(Existing, InN.getResNo());
4124 // Nope it doesn't. Remove the node from its current place in the maps.
4126 if (!RemoveNodeFromCSEMaps(N))
4129 // Now we update the operands.
4130 N->OperandList[0].set(Op);
4132 // If this gets put into a CSE map, add it.
4133 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4137 SDValue SelectionDAG::
4138 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4139 SDNode *N = InN.getNode();
4140 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4142 // Check to see if there is no change.
4143 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4144 return InN; // No operands changed, just return the input node.
4146 // See if the modified node already exists.
4147 void *InsertPos = 0;
4148 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4149 return SDValue(Existing, InN.getResNo());
4151 // Nope it doesn't. Remove the node from its current place in the maps.
4153 if (!RemoveNodeFromCSEMaps(N))
4156 // Now we update the operands.
4157 if (N->OperandList[0] != Op1)
4158 N->OperandList[0].set(Op1);
4159 if (N->OperandList[1] != Op2)
4160 N->OperandList[1].set(Op2);
4162 // If this gets put into a CSE map, add it.
4163 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4167 SDValue SelectionDAG::
4168 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4169 SDValue Ops[] = { Op1, Op2, Op3 };
4170 return UpdateNodeOperands(N, Ops, 3);
4173 SDValue SelectionDAG::
4174 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4175 SDValue Op3, SDValue Op4) {
4176 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4177 return UpdateNodeOperands(N, Ops, 4);
4180 SDValue SelectionDAG::
4181 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4182 SDValue Op3, SDValue Op4, SDValue Op5) {
4183 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4184 return UpdateNodeOperands(N, Ops, 5);
4187 SDValue SelectionDAG::
4188 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4189 SDNode *N = InN.getNode();
4190 assert(N->getNumOperands() == NumOps &&
4191 "Update with wrong number of operands");
4193 // Check to see if there is no change.
4194 bool AnyChange = false;
4195 for (unsigned i = 0; i != NumOps; ++i) {
4196 if (Ops[i] != N->getOperand(i)) {
4202 // No operands changed, just return the input node.
4203 if (!AnyChange) return InN;
4205 // See if the modified node already exists.
4206 void *InsertPos = 0;
4207 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4208 return SDValue(Existing, InN.getResNo());
4210 // Nope it doesn't. Remove the node from its current place in the maps.
4212 if (!RemoveNodeFromCSEMaps(N))
4215 // Now we update the operands.
4216 for (unsigned i = 0; i != NumOps; ++i)
4217 if (N->OperandList[i] != Ops[i])
4218 N->OperandList[i].set(Ops[i]);
4220 // If this gets put into a CSE map, add it.
4221 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4225 /// DropOperands - Release the operands and set this node to have
4227 void SDNode::DropOperands() {
4228 // Unlike the code in MorphNodeTo that does this, we don't need to
4229 // watch for dead nodes here.
4230 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4236 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4239 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4241 SDVTList VTs = getVTList(VT);
4242 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4245 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4246 EVT VT, SDValue Op1) {
4247 SDVTList VTs = getVTList(VT);
4248 SDValue Ops[] = { Op1 };
4249 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4252 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4253 EVT VT, SDValue Op1,
4255 SDVTList VTs = getVTList(VT);
4256 SDValue Ops[] = { Op1, Op2 };
4257 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4260 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4261 EVT VT, SDValue Op1,
4262 SDValue Op2, SDValue Op3) {
4263 SDVTList VTs = getVTList(VT);
4264 SDValue Ops[] = { Op1, Op2, Op3 };
4265 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4268 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4269 EVT VT, const SDValue *Ops,
4271 SDVTList VTs = getVTList(VT);
4272 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4275 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4276 EVT VT1, EVT VT2, const SDValue *Ops,
4278 SDVTList VTs = getVTList(VT1, VT2);
4279 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4282 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4284 SDVTList VTs = getVTList(VT1, VT2);
4285 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4288 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4289 EVT VT1, EVT VT2, EVT VT3,
4290 const SDValue *Ops, unsigned NumOps) {
4291 SDVTList VTs = getVTList(VT1, VT2, VT3);
4292 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4295 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4296 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4297 const SDValue *Ops, unsigned NumOps) {
4298 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4299 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4302 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4305 SDVTList VTs = getVTList(VT1, VT2);
4306 SDValue Ops[] = { Op1 };
4307 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4310 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4312 SDValue Op1, SDValue Op2) {
4313 SDVTList VTs = getVTList(VT1, VT2);
4314 SDValue Ops[] = { Op1, Op2 };
4315 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4318 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4320 SDValue Op1, SDValue Op2,
4322 SDVTList VTs = getVTList(VT1, VT2);
4323 SDValue Ops[] = { Op1, Op2, Op3 };
4324 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4327 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4328 EVT VT1, EVT VT2, EVT VT3,
4329 SDValue Op1, SDValue Op2,
4331 SDVTList VTs = getVTList(VT1, VT2, VT3);
4332 SDValue Ops[] = { Op1, Op2, Op3 };
4333 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4336 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4337 SDVTList VTs, const SDValue *Ops,
4339 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4342 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4344 SDVTList VTs = getVTList(VT);
4345 return MorphNodeTo(N, Opc, VTs, 0, 0);
4348 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4349 EVT VT, SDValue Op1) {
4350 SDVTList VTs = getVTList(VT);
4351 SDValue Ops[] = { Op1 };
4352 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4355 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4356 EVT VT, SDValue Op1,
4358 SDVTList VTs = getVTList(VT);
4359 SDValue Ops[] = { Op1, Op2 };
4360 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4363 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4364 EVT VT, SDValue Op1,
4365 SDValue Op2, SDValue Op3) {
4366 SDVTList VTs = getVTList(VT);
4367 SDValue Ops[] = { Op1, Op2, Op3 };
4368 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4371 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4372 EVT VT, const SDValue *Ops,
4374 SDVTList VTs = getVTList(VT);
4375 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4378 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4379 EVT VT1, EVT VT2, const SDValue *Ops,
4381 SDVTList VTs = getVTList(VT1, VT2);
4382 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4385 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4387 SDVTList VTs = getVTList(VT1, VT2);
4388 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4391 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4392 EVT VT1, EVT VT2, EVT VT3,
4393 const SDValue *Ops, unsigned NumOps) {
4394 SDVTList VTs = getVTList(VT1, VT2, VT3);
4395 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4398 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4401 SDVTList VTs = getVTList(VT1, VT2);
4402 SDValue Ops[] = { Op1 };
4403 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4406 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4408 SDValue Op1, SDValue Op2) {
4409 SDVTList VTs = getVTList(VT1, VT2);
4410 SDValue Ops[] = { Op1, Op2 };
4411 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4414 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4416 SDValue Op1, SDValue Op2,
4418 SDVTList VTs = getVTList(VT1, VT2);
4419 SDValue Ops[] = { Op1, Op2, Op3 };
4420 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4423 /// MorphNodeTo - These *mutate* the specified node to have the specified
4424 /// return type, opcode, and operands.
4426 /// Note that MorphNodeTo returns the resultant node. If there is already a
4427 /// node of the specified opcode and operands, it returns that node instead of
4428 /// the current one. Note that the DebugLoc need not be the same.
4430 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4431 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4432 /// node, and because it doesn't require CSE recalculation for any of
4433 /// the node's users.
4435 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4436 SDVTList VTs, const SDValue *Ops,
4438 // If an identical node already exists, use it.
4440 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4441 FoldingSetNodeID ID;
4442 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4443 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4447 if (!RemoveNodeFromCSEMaps(N))
4450 // Start the morphing.
4452 N->ValueList = VTs.VTs;
4453 N->NumValues = VTs.NumVTs;
4455 // Clear the operands list, updating used nodes to remove this from their
4456 // use list. Keep track of any operands that become dead as a result.
4457 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4458 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4460 SDNode *Used = Use.getNode();
4462 if (Used->use_empty())
4463 DeadNodeSet.insert(Used);
4466 // If NumOps is larger than the # of operands we currently have, reallocate
4467 // the operand list.
4468 if (NumOps > N->NumOperands) {
4469 if (N->OperandsNeedDelete)
4470 delete[] N->OperandList;
4472 if (N->isMachineOpcode()) {
4473 // We're creating a final node that will live unmorphed for the
4474 // remainder of the current SelectionDAG iteration, so we can allocate
4475 // the operands directly out of a pool with no recycling metadata.
4476 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4477 N->OperandsNeedDelete = false;
4479 N->OperandList = new SDUse[NumOps];
4480 N->OperandsNeedDelete = true;
4484 // Assign the new operands.
4485 N->NumOperands = NumOps;
4486 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4487 N->OperandList[i].setUser(N);
4488 N->OperandList[i].setInitial(Ops[i]);
4491 // Delete any nodes that are still dead after adding the uses for the
4493 SmallVector<SDNode *, 16> DeadNodes;
4494 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4495 E = DeadNodeSet.end(); I != E; ++I)
4496 if ((*I)->use_empty())
4497 DeadNodes.push_back(*I);
4498 RemoveDeadNodes(DeadNodes);
4501 CSEMap.InsertNode(N, IP); // Memoize the new node.
4506 /// getTargetNode - These are used for target selectors to create a new node
4507 /// with specified return type(s), target opcode, and operands.
4509 /// Note that getTargetNode returns the resultant node. If there is already a
4510 /// node of the specified opcode and operands, it returns that node instead of
4511 /// the current one.
4512 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4513 return getNode(~Opcode, dl, VT).getNode();
4516 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4518 return getNode(~Opcode, dl, VT, Op1).getNode();
4521 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4522 SDValue Op1, SDValue Op2) {
4523 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4526 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4527 SDValue Op1, SDValue Op2,
4529 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4532 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4533 const SDValue *Ops, unsigned NumOps) {
4534 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4537 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4539 SDVTList VTs = getVTList(VT1, VT2);
4541 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4544 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4545 EVT VT2, SDValue Op1) {
4546 SDVTList VTs = getVTList(VT1, VT2);
4547 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4550 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4551 EVT VT2, SDValue Op1,
4553 SDVTList VTs = getVTList(VT1, VT2);
4554 SDValue Ops[] = { Op1, Op2 };
4555 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4558 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4559 EVT VT2, SDValue Op1,
4560 SDValue Op2, SDValue Op3) {
4561 SDVTList VTs = getVTList(VT1, VT2);
4562 SDValue Ops[] = { Op1, Op2, Op3 };
4563 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4566 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4568 const SDValue *Ops, unsigned NumOps) {
4569 SDVTList VTs = getVTList(VT1, VT2);
4570 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4573 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4574 EVT VT1, EVT VT2, EVT VT3,
4575 SDValue Op1, SDValue Op2) {
4576 SDVTList VTs = getVTList(VT1, VT2, VT3);
4577 SDValue Ops[] = { Op1, Op2 };
4578 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4581 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4582 EVT VT1, EVT VT2, EVT VT3,
4583 SDValue Op1, SDValue Op2,
4585 SDVTList VTs = getVTList(VT1, VT2, VT3);
4586 SDValue Ops[] = { Op1, Op2, Op3 };
4587 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4590 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4591 EVT VT1, EVT VT2, EVT VT3,
4592 const SDValue *Ops, unsigned NumOps) {
4593 SDVTList VTs = getVTList(VT1, VT2, VT3);
4594 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4597 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4598 EVT VT2, EVT VT3, EVT VT4,
4599 const SDValue *Ops, unsigned NumOps) {
4600 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4601 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4604 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4605 const std::vector<EVT> &ResultTys,
4606 const SDValue *Ops, unsigned NumOps) {
4607 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4610 /// getTargetExtractSubreg - A convenience function for creating
4611 /// TargetInstrInfo::EXTRACT_SUBREG nodes.
4613 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4615 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4616 SDNode *Subreg = getTargetNode(TargetInstrInfo::EXTRACT_SUBREG, DL,
4617 VT, Operand, SRIdxVal);
4618 return SDValue(Subreg, 0);
4621 /// getNodeIfExists - Get the specified node if it's already available, or
4622 /// else return NULL.
4623 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4624 const SDValue *Ops, unsigned NumOps) {
4625 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4626 FoldingSetNodeID ID;
4627 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4629 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4635 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4636 /// This can cause recursive merging of nodes in the DAG.
4638 /// This version assumes From has a single result value.
4640 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4641 DAGUpdateListener *UpdateListener) {
4642 SDNode *From = FromN.getNode();
4643 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4644 "Cannot replace with this method!");
4645 assert(From != To.getNode() && "Cannot replace uses of with self");
4647 // Iterate over all the existing uses of From. New uses will be added
4648 // to the beginning of the use list, which we avoid visiting.
4649 // This specifically avoids visiting uses of From that arise while the
4650 // replacement is happening, because any such uses would be the result
4651 // of CSE: If an existing node looks like From after one of its operands
4652 // is replaced by To, we don't want to replace of all its users with To
4653 // too. See PR3018 for more info.
4654 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4658 // This node is about to morph, remove its old self from the CSE maps.
4659 RemoveNodeFromCSEMaps(User);
4661 // A user can appear in a use list multiple times, and when this
4662 // happens the uses are usually next to each other in the list.
4663 // To help reduce the number of CSE recomputations, process all
4664 // the uses of this user that we can find this way.
4666 SDUse &Use = UI.getUse();
4669 } while (UI != UE && *UI == User);
4671 // Now that we have modified User, add it back to the CSE maps. If it
4672 // already exists there, recursively merge the results together.
4673 AddModifiedNodeToCSEMaps(User, UpdateListener);
4677 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4678 /// This can cause recursive merging of nodes in the DAG.
4680 /// This version assumes that for each value of From, there is a
4681 /// corresponding value in To in the same position with the same type.
4683 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4684 DAGUpdateListener *UpdateListener) {
4686 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4687 assert((!From->hasAnyUseOfValue(i) ||
4688 From->getValueType(i) == To->getValueType(i)) &&
4689 "Cannot use this version of ReplaceAllUsesWith!");
4692 // Handle the trivial case.
4696 // Iterate over just the existing users of From. See the comments in
4697 // the ReplaceAllUsesWith above.
4698 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4702 // This node is about to morph, remove its old self from the CSE maps.
4703 RemoveNodeFromCSEMaps(User);
4705 // A user can appear in a use list multiple times, and when this
4706 // happens the uses are usually next to each other in the list.
4707 // To help reduce the number of CSE recomputations, process all
4708 // the uses of this user that we can find this way.
4710 SDUse &Use = UI.getUse();
4713 } while (UI != UE && *UI == User);
4715 // Now that we have modified User, add it back to the CSE maps. If it
4716 // already exists there, recursively merge the results together.
4717 AddModifiedNodeToCSEMaps(User, UpdateListener);
4721 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4722 /// This can cause recursive merging of nodes in the DAG.
4724 /// This version can replace From with any result values. To must match the
4725 /// number and types of values returned by From.
4726 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4728 DAGUpdateListener *UpdateListener) {
4729 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4730 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4732 // Iterate over just the existing users of From. See the comments in
4733 // the ReplaceAllUsesWith above.
4734 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4738 // This node is about to morph, remove its old self from the CSE maps.
4739 RemoveNodeFromCSEMaps(User);
4741 // A user can appear in a use list multiple times, and when this
4742 // happens the uses are usually next to each other in the list.
4743 // To help reduce the number of CSE recomputations, process all
4744 // the uses of this user that we can find this way.
4746 SDUse &Use = UI.getUse();
4747 const SDValue &ToOp = To[Use.getResNo()];
4750 } while (UI != UE && *UI == User);
4752 // Now that we have modified User, add it back to the CSE maps. If it
4753 // already exists there, recursively merge the results together.
4754 AddModifiedNodeToCSEMaps(User, UpdateListener);
4758 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4759 /// uses of other values produced by From.getNode() alone. The Deleted
4760 /// vector is handled the same way as for ReplaceAllUsesWith.
4761 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4762 DAGUpdateListener *UpdateListener){
4763 // Handle the really simple, really trivial case efficiently.
4764 if (From == To) return;
4766 // Handle the simple, trivial, case efficiently.
4767 if (From.getNode()->getNumValues() == 1) {
4768 ReplaceAllUsesWith(From, To, UpdateListener);
4772 // Iterate over just the existing users of From. See the comments in
4773 // the ReplaceAllUsesWith above.
4774 SDNode::use_iterator UI = From.getNode()->use_begin(),
4775 UE = From.getNode()->use_end();
4778 bool UserRemovedFromCSEMaps = false;
4780 // A user can appear in a use list multiple times, and when this
4781 // happens the uses are usually next to each other in the list.
4782 // To help reduce the number of CSE recomputations, process all
4783 // the uses of this user that we can find this way.
4785 SDUse &Use = UI.getUse();
4787 // Skip uses of different values from the same node.
4788 if (Use.getResNo() != From.getResNo()) {
4793 // If this node hasn't been modified yet, it's still in the CSE maps,
4794 // so remove its old self from the CSE maps.
4795 if (!UserRemovedFromCSEMaps) {
4796 RemoveNodeFromCSEMaps(User);
4797 UserRemovedFromCSEMaps = true;
4802 } while (UI != UE && *UI == User);
4804 // We are iterating over all uses of the From node, so if a use
4805 // doesn't use the specific value, no changes are made.
4806 if (!UserRemovedFromCSEMaps)
4809 // Now that we have modified User, add it back to the CSE maps. If it
4810 // already exists there, recursively merge the results together.
4811 AddModifiedNodeToCSEMaps(User, UpdateListener);
4816 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4817 /// to record information about a use.
4824 /// operator< - Sort Memos by User.
4825 bool operator<(const UseMemo &L, const UseMemo &R) {
4826 return (intptr_t)L.User < (intptr_t)R.User;
4830 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4831 /// uses of other values produced by From.getNode() alone. The same value
4832 /// may appear in both the From and To list. The Deleted vector is
4833 /// handled the same way as for ReplaceAllUsesWith.
4834 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4837 DAGUpdateListener *UpdateListener){
4838 // Handle the simple, trivial case efficiently.
4840 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4842 // Read up all the uses and make records of them. This helps
4843 // processing new uses that are introduced during the
4844 // replacement process.
4845 SmallVector<UseMemo, 4> Uses;
4846 for (unsigned i = 0; i != Num; ++i) {
4847 unsigned FromResNo = From[i].getResNo();
4848 SDNode *FromNode = From[i].getNode();
4849 for (SDNode::use_iterator UI = FromNode->use_begin(),
4850 E = FromNode->use_end(); UI != E; ++UI) {
4851 SDUse &Use = UI.getUse();
4852 if (Use.getResNo() == FromResNo) {
4853 UseMemo Memo = { *UI, i, &Use };
4854 Uses.push_back(Memo);
4859 // Sort the uses, so that all the uses from a given User are together.
4860 std::sort(Uses.begin(), Uses.end());
4862 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4863 UseIndex != UseIndexEnd; ) {
4864 // We know that this user uses some value of From. If it is the right
4865 // value, update it.
4866 SDNode *User = Uses[UseIndex].User;
4868 // This node is about to morph, remove its old self from the CSE maps.
4869 RemoveNodeFromCSEMaps(User);
4871 // The Uses array is sorted, so all the uses for a given User
4872 // are next to each other in the list.
4873 // To help reduce the number of CSE recomputations, process all
4874 // the uses of this user that we can find this way.
4876 unsigned i = Uses[UseIndex].Index;
4877 SDUse &Use = *Uses[UseIndex].Use;
4881 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4883 // Now that we have modified User, add it back to the CSE maps. If it
4884 // already exists there, recursively merge the results together.
4885 AddModifiedNodeToCSEMaps(User, UpdateListener);
4889 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4890 /// based on their topological order. It returns the maximum id and a vector
4891 /// of the SDNodes* in assigned order by reference.
4892 unsigned SelectionDAG::AssignTopologicalOrder() {
4894 unsigned DAGSize = 0;
4896 // SortedPos tracks the progress of the algorithm. Nodes before it are
4897 // sorted, nodes after it are unsorted. When the algorithm completes
4898 // it is at the end of the list.
4899 allnodes_iterator SortedPos = allnodes_begin();
4901 // Visit all the nodes. Move nodes with no operands to the front of
4902 // the list immediately. Annotate nodes that do have operands with their
4903 // operand count. Before we do this, the Node Id fields of the nodes
4904 // may contain arbitrary values. After, the Node Id fields for nodes
4905 // before SortedPos will contain the topological sort index, and the
4906 // Node Id fields for nodes At SortedPos and after will contain the
4907 // count of outstanding operands.
4908 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4910 unsigned Degree = N->getNumOperands();
4912 // A node with no uses, add it to the result array immediately.
4913 N->setNodeId(DAGSize++);
4914 allnodes_iterator Q = N;
4916 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4919 // Temporarily use the Node Id as scratch space for the degree count.
4920 N->setNodeId(Degree);
4924 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4925 // such that by the time the end is reached all nodes will be sorted.
4926 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4928 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4931 unsigned Degree = P->getNodeId();
4934 // All of P's operands are sorted, so P may sorted now.
4935 P->setNodeId(DAGSize++);
4937 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4940 // Update P's outstanding operand count.
4941 P->setNodeId(Degree);
4946 assert(SortedPos == AllNodes.end() &&
4947 "Topological sort incomplete!");
4948 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4949 "First node in topological sort is not the entry token!");
4950 assert(AllNodes.front().getNodeId() == 0 &&
4951 "First node in topological sort has non-zero id!");
4952 assert(AllNodes.front().getNumOperands() == 0 &&
4953 "First node in topological sort has operands!");
4954 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4955 "Last node in topologic sort has unexpected id!");
4956 assert(AllNodes.back().use_empty() &&
4957 "Last node in topologic sort has users!");
4958 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4964 //===----------------------------------------------------------------------===//
4966 //===----------------------------------------------------------------------===//
4968 HandleSDNode::~HandleSDNode() {
4972 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
4973 EVT VT, int64_t o, unsigned char TF)
4974 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
4975 Offset(o), TargetFlags(TF) {
4976 TheGlobal = const_cast<GlobalValue*>(GA);
4979 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
4980 const Value *srcValue, int SVO, unsigned alignment,
4981 bool vol, unsigned origAlign)
4982 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4983 OrigAlign(origAlign) {
4984 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4985 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4986 assert(getAlignment() == alignment && "Alignment representation error!");
4987 assert(isVolatile() == vol && "Volatile representation error!");
4990 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4991 const SDValue *Ops, unsigned NumOps, EVT memvt,
4992 const Value *srcValue, int SVO, unsigned alignment,
4993 bool vol, unsigned origAlign)
4994 : SDNode(Opc, dl, VTs, Ops, NumOps),
4995 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), OrigAlign(origAlign) {
4996 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4997 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4998 assert(getAlignment() == alignment && "Alignment representation error!");
4999 assert(isVolatile() == vol && "Volatile representation error!");
5002 /// getMemOperand - Return a MachineMemOperand object describing the memory
5003 /// reference performed by this memory reference.
5004 MachineMemOperand MemSDNode::getMemOperand() const {
5006 if (isa<LoadSDNode>(this))
5007 Flags = MachineMemOperand::MOLoad;
5008 else if (isa<StoreSDNode>(this))
5009 Flags = MachineMemOperand::MOStore;
5010 else if (isa<AtomicSDNode>(this)) {
5011 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5014 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5015 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5016 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5017 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5020 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5021 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5023 // Check if the memory reference references a frame index
5024 const FrameIndexSDNode *FI =
5025 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5026 if (!getSrcValue() && FI)
5027 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5028 Flags, 0, Size, getAlignment());
5030 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5031 Size, getAlignment());
5034 /// Profile - Gather unique data for the node.
5036 void SDNode::Profile(FoldingSetNodeID &ID) const {
5037 AddNodeIDNode(ID, this);
5042 std::vector<EVT> VTs;
5045 VTs.reserve(MVT::LAST_VALUETYPE);
5046 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5047 VTs.push_back(MVT((MVT::SimpleValueType)i));
5052 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5053 static ManagedStatic<EVTArray> SimpleVTArray;
5054 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5056 /// getValueTypeList - Return a pointer to the specified value type.
5058 const EVT *SDNode::getValueTypeList(EVT VT) {
5059 if (VT.isExtended()) {
5060 sys::SmartScopedLock<true> Lock(*VTMutex);
5061 return &(*EVTs->insert(VT).first);
5063 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5067 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5068 /// indicated value. This method ignores uses of other values defined by this
5070 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5071 assert(Value < getNumValues() && "Bad value!");
5073 // TODO: Only iterate over uses of a given value of the node
5074 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5075 if (UI.getUse().getResNo() == Value) {
5082 // Found exactly the right number of uses?
5087 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5088 /// value. This method ignores uses of other values defined by this operation.
5089 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5090 assert(Value < getNumValues() && "Bad value!");
5092 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5093 if (UI.getUse().getResNo() == Value)
5100 /// isOnlyUserOf - Return true if this node is the only use of N.
5102 bool SDNode::isOnlyUserOf(SDNode *N) const {
5104 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5115 /// isOperand - Return true if this node is an operand of N.
5117 bool SDValue::isOperandOf(SDNode *N) const {
5118 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5119 if (*this == N->getOperand(i))
5124 bool SDNode::isOperandOf(SDNode *N) const {
5125 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5126 if (this == N->OperandList[i].getNode())
5131 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5132 /// be a chain) reaches the specified operand without crossing any
5133 /// side-effecting instructions. In practice, this looks through token
5134 /// factors and non-volatile loads. In order to remain efficient, this only
5135 /// looks a couple of nodes in, it does not do an exhaustive search.
5136 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5137 unsigned Depth) const {
5138 if (*this == Dest) return true;
5140 // Don't search too deeply, we just want to be able to see through
5141 // TokenFactor's etc.
5142 if (Depth == 0) return false;
5144 // If this is a token factor, all inputs to the TF happen in parallel. If any
5145 // of the operands of the TF reach dest, then we can do the xform.
5146 if (getOpcode() == ISD::TokenFactor) {
5147 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5148 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5153 // Loads don't have side effects, look through them.
5154 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5155 if (!Ld->isVolatile())
5156 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5162 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5163 SmallPtrSet<SDNode *, 32> &Visited) {
5164 if (found || !Visited.insert(N))
5167 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5168 SDNode *Op = N->getOperand(i).getNode();
5173 findPredecessor(Op, P, found, Visited);
5177 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5178 /// is either an operand of N or it can be reached by recursively traversing
5179 /// up the operands.
5180 /// NOTE: this is an expensive method. Use it carefully.
5181 bool SDNode::isPredecessorOf(SDNode *N) const {
5182 SmallPtrSet<SDNode *, 32> Visited;
5184 findPredecessor(N, this, found, Visited);
5188 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5189 assert(Num < NumOperands && "Invalid child # of SDNode!");
5190 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5193 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5194 switch (getOpcode()) {
5196 if (getOpcode() < ISD::BUILTIN_OP_END)
5197 return "<<Unknown DAG Node>>";
5198 if (isMachineOpcode()) {
5200 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5201 if (getMachineOpcode() < TII->getNumOpcodes())
5202 return TII->get(getMachineOpcode()).getName();
5203 return "<<Unknown Machine Node>>";
5206 const TargetLowering &TLI = G->getTargetLoweringInfo();
5207 const char *Name = TLI.getTargetNodeName(getOpcode());
5208 if (Name) return Name;
5209 return "<<Unknown Target Node>>";
5211 return "<<Unknown Node>>";
5214 case ISD::DELETED_NODE:
5215 return "<<Deleted Node!>>";
5217 case ISD::PREFETCH: return "Prefetch";
5218 case ISD::MEMBARRIER: return "MemBarrier";
5219 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5220 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5221 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5222 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5223 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5224 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5225 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5226 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5227 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5228 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5229 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5230 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5231 case ISD::PCMARKER: return "PCMarker";
5232 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5233 case ISD::SRCVALUE: return "SrcValue";
5234 case ISD::MEMOPERAND: return "MemOperand";
5235 case ISD::EntryToken: return "EntryToken";
5236 case ISD::TokenFactor: return "TokenFactor";
5237 case ISD::AssertSext: return "AssertSext";
5238 case ISD::AssertZext: return "AssertZext";
5240 case ISD::BasicBlock: return "BasicBlock";
5241 case ISD::VALUETYPE: return "ValueType";
5242 case ISD::Register: return "Register";
5244 case ISD::Constant: return "Constant";
5245 case ISD::ConstantFP: return "ConstantFP";
5246 case ISD::GlobalAddress: return "GlobalAddress";
5247 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5248 case ISD::FrameIndex: return "FrameIndex";
5249 case ISD::JumpTable: return "JumpTable";
5250 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5251 case ISD::RETURNADDR: return "RETURNADDR";
5252 case ISD::FRAMEADDR: return "FRAMEADDR";
5253 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5254 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5255 case ISD::LSDAADDR: return "LSDAADDR";
5256 case ISD::EHSELECTION: return "EHSELECTION";
5257 case ISD::EH_RETURN: return "EH_RETURN";
5258 case ISD::ConstantPool: return "ConstantPool";
5259 case ISD::ExternalSymbol: return "ExternalSymbol";
5260 case ISD::INTRINSIC_WO_CHAIN: {
5261 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5262 return Intrinsic::getName((Intrinsic::ID)IID);
5264 case ISD::INTRINSIC_VOID:
5265 case ISD::INTRINSIC_W_CHAIN: {
5266 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5267 return Intrinsic::getName((Intrinsic::ID)IID);
5270 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5271 case ISD::TargetConstant: return "TargetConstant";
5272 case ISD::TargetConstantFP:return "TargetConstantFP";
5273 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5274 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5275 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5276 case ISD::TargetJumpTable: return "TargetJumpTable";
5277 case ISD::TargetConstantPool: return "TargetConstantPool";
5278 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5280 case ISD::CopyToReg: return "CopyToReg";
5281 case ISD::CopyFromReg: return "CopyFromReg";
5282 case ISD::UNDEF: return "undef";
5283 case ISD::MERGE_VALUES: return "merge_values";
5284 case ISD::INLINEASM: return "inlineasm";
5285 case ISD::DBG_LABEL: return "dbg_label";
5286 case ISD::EH_LABEL: return "eh_label";
5287 case ISD::HANDLENODE: return "handlenode";
5290 case ISD::FABS: return "fabs";
5291 case ISD::FNEG: return "fneg";
5292 case ISD::FSQRT: return "fsqrt";
5293 case ISD::FSIN: return "fsin";
5294 case ISD::FCOS: return "fcos";
5295 case ISD::FPOWI: return "fpowi";
5296 case ISD::FPOW: return "fpow";
5297 case ISD::FTRUNC: return "ftrunc";
5298 case ISD::FFLOOR: return "ffloor";
5299 case ISD::FCEIL: return "fceil";
5300 case ISD::FRINT: return "frint";
5301 case ISD::FNEARBYINT: return "fnearbyint";
5304 case ISD::ADD: return "add";
5305 case ISD::SUB: return "sub";
5306 case ISD::MUL: return "mul";
5307 case ISD::MULHU: return "mulhu";
5308 case ISD::MULHS: return "mulhs";
5309 case ISD::SDIV: return "sdiv";
5310 case ISD::UDIV: return "udiv";
5311 case ISD::SREM: return "srem";
5312 case ISD::UREM: return "urem";
5313 case ISD::SMUL_LOHI: return "smul_lohi";
5314 case ISD::UMUL_LOHI: return "umul_lohi";
5315 case ISD::SDIVREM: return "sdivrem";
5316 case ISD::UDIVREM: return "udivrem";
5317 case ISD::AND: return "and";
5318 case ISD::OR: return "or";
5319 case ISD::XOR: return "xor";
5320 case ISD::SHL: return "shl";
5321 case ISD::SRA: return "sra";
5322 case ISD::SRL: return "srl";
5323 case ISD::ROTL: return "rotl";
5324 case ISD::ROTR: return "rotr";
5325 case ISD::FADD: return "fadd";
5326 case ISD::FSUB: return "fsub";
5327 case ISD::FMUL: return "fmul";
5328 case ISD::FDIV: return "fdiv";
5329 case ISD::FREM: return "frem";
5330 case ISD::FCOPYSIGN: return "fcopysign";
5331 case ISD::FGETSIGN: return "fgetsign";
5333 case ISD::SETCC: return "setcc";
5334 case ISD::VSETCC: return "vsetcc";
5335 case ISD::SELECT: return "select";
5336 case ISD::SELECT_CC: return "select_cc";
5337 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5338 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5339 case ISD::CONCAT_VECTORS: return "concat_vectors";
5340 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5341 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5342 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5343 case ISD::CARRY_FALSE: return "carry_false";
5344 case ISD::ADDC: return "addc";
5345 case ISD::ADDE: return "adde";
5346 case ISD::SADDO: return "saddo";
5347 case ISD::UADDO: return "uaddo";
5348 case ISD::SSUBO: return "ssubo";
5349 case ISD::USUBO: return "usubo";
5350 case ISD::SMULO: return "smulo";
5351 case ISD::UMULO: return "umulo";
5352 case ISD::SUBC: return "subc";
5353 case ISD::SUBE: return "sube";
5354 case ISD::SHL_PARTS: return "shl_parts";
5355 case ISD::SRA_PARTS: return "sra_parts";
5356 case ISD::SRL_PARTS: return "srl_parts";
5358 // Conversion operators.
5359 case ISD::SIGN_EXTEND: return "sign_extend";
5360 case ISD::ZERO_EXTEND: return "zero_extend";
5361 case ISD::ANY_EXTEND: return "any_extend";
5362 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5363 case ISD::TRUNCATE: return "truncate";
5364 case ISD::FP_ROUND: return "fp_round";
5365 case ISD::FLT_ROUNDS_: return "flt_rounds";
5366 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5367 case ISD::FP_EXTEND: return "fp_extend";
5369 case ISD::SINT_TO_FP: return "sint_to_fp";
5370 case ISD::UINT_TO_FP: return "uint_to_fp";
5371 case ISD::FP_TO_SINT: return "fp_to_sint";
5372 case ISD::FP_TO_UINT: return "fp_to_uint";
5373 case ISD::BIT_CONVERT: return "bit_convert";
5375 case ISD::CONVERT_RNDSAT: {
5376 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5377 default: llvm_unreachable("Unknown cvt code!");
5378 case ISD::CVT_FF: return "cvt_ff";
5379 case ISD::CVT_FS: return "cvt_fs";
5380 case ISD::CVT_FU: return "cvt_fu";
5381 case ISD::CVT_SF: return "cvt_sf";
5382 case ISD::CVT_UF: return "cvt_uf";
5383 case ISD::CVT_SS: return "cvt_ss";
5384 case ISD::CVT_SU: return "cvt_su";
5385 case ISD::CVT_US: return "cvt_us";
5386 case ISD::CVT_UU: return "cvt_uu";
5390 // Control flow instructions
5391 case ISD::BR: return "br";
5392 case ISD::BRIND: return "brind";
5393 case ISD::BR_JT: return "br_jt";
5394 case ISD::BRCOND: return "brcond";
5395 case ISD::BR_CC: return "br_cc";
5396 case ISD::CALLSEQ_START: return "callseq_start";
5397 case ISD::CALLSEQ_END: return "callseq_end";
5400 case ISD::LOAD: return "load";
5401 case ISD::STORE: return "store";
5402 case ISD::VAARG: return "vaarg";
5403 case ISD::VACOPY: return "vacopy";
5404 case ISD::VAEND: return "vaend";
5405 case ISD::VASTART: return "vastart";
5406 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5407 case ISD::EXTRACT_ELEMENT: return "extract_element";
5408 case ISD::BUILD_PAIR: return "build_pair";
5409 case ISD::STACKSAVE: return "stacksave";
5410 case ISD::STACKRESTORE: return "stackrestore";
5411 case ISD::TRAP: return "trap";
5414 case ISD::BSWAP: return "bswap";
5415 case ISD::CTPOP: return "ctpop";
5416 case ISD::CTTZ: return "cttz";
5417 case ISD::CTLZ: return "ctlz";
5420 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5421 case ISD::DEBUG_LOC: return "debug_loc";
5424 case ISD::TRAMPOLINE: return "trampoline";
5427 switch (cast<CondCodeSDNode>(this)->get()) {
5428 default: llvm_unreachable("Unknown setcc condition!");
5429 case ISD::SETOEQ: return "setoeq";
5430 case ISD::SETOGT: return "setogt";
5431 case ISD::SETOGE: return "setoge";
5432 case ISD::SETOLT: return "setolt";
5433 case ISD::SETOLE: return "setole";
5434 case ISD::SETONE: return "setone";
5436 case ISD::SETO: return "seto";
5437 case ISD::SETUO: return "setuo";
5438 case ISD::SETUEQ: return "setue";
5439 case ISD::SETUGT: return "setugt";
5440 case ISD::SETUGE: return "setuge";
5441 case ISD::SETULT: return "setult";
5442 case ISD::SETULE: return "setule";
5443 case ISD::SETUNE: return "setune";
5445 case ISD::SETEQ: return "seteq";
5446 case ISD::SETGT: return "setgt";
5447 case ISD::SETGE: return "setge";
5448 case ISD::SETLT: return "setlt";
5449 case ISD::SETLE: return "setle";
5450 case ISD::SETNE: return "setne";
5455 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5464 return "<post-inc>";
5466 return "<post-dec>";
5470 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5471 std::string S = "< ";
5485 if (getByValAlign())
5486 S += "byval-align:" + utostr(getByValAlign()) + " ";
5488 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5490 S += "byval-size:" + utostr(getByValSize()) + " ";
5494 void SDNode::dump() const { dump(0); }
5495 void SDNode::dump(const SelectionDAG *G) const {
5499 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5500 OS << (void*)this << ": ";
5502 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5504 if (getValueType(i) == MVT::Other)
5507 OS << getValueType(i).getEVTString();
5509 OS << " = " << getOperationName(G);
5512 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5513 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5514 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5516 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5517 int Idx = SVN->getMaskElt(i);
5527 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5528 OS << '<' << CSDN->getAPIntValue() << '>';
5529 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5530 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5531 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5532 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5533 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5536 CSDN->getValueAPF().bitcastToAPInt().dump();
5539 } else if (const GlobalAddressSDNode *GADN =
5540 dyn_cast<GlobalAddressSDNode>(this)) {
5541 int64_t offset = GADN->getOffset();
5543 WriteAsOperand(OS, GADN->getGlobal());
5546 OS << " + " << offset;
5548 OS << " " << offset;
5549 if (unsigned int TF = GADN->getTargetFlags())
5550 OS << " [TF=" << TF << ']';
5551 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5552 OS << "<" << FIDN->getIndex() << ">";
5553 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5554 OS << "<" << JTDN->getIndex() << ">";
5555 if (unsigned int TF = JTDN->getTargetFlags())
5556 OS << " [TF=" << TF << ']';
5557 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5558 int offset = CP->getOffset();
5559 if (CP->isMachineConstantPoolEntry())
5560 OS << "<" << *CP->getMachineCPVal() << ">";
5562 OS << "<" << *CP->getConstVal() << ">";
5564 OS << " + " << offset;
5566 OS << " " << offset;
5567 if (unsigned int TF = CP->getTargetFlags())
5568 OS << " [TF=" << TF << ']';
5569 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5571 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5573 OS << LBB->getName() << " ";
5574 OS << (const void*)BBDN->getBasicBlock() << ">";
5575 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5576 if (G && R->getReg() &&
5577 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5578 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5580 OS << " #" << R->getReg();
5582 } else if (const ExternalSymbolSDNode *ES =
5583 dyn_cast<ExternalSymbolSDNode>(this)) {
5584 OS << "'" << ES->getSymbol() << "'";
5585 if (unsigned int TF = ES->getTargetFlags())
5586 OS << " [TF=" << TF << ']';
5587 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5589 OS << "<" << M->getValue() << ">";
5592 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5593 if (M->MO.getValue())
5594 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5596 OS << "<null:" << M->MO.getOffset() << ">";
5597 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5598 OS << ":" << N->getVT().getEVTString();
5600 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5601 const Value *SrcValue = LD->getSrcValue();
5602 int SrcOffset = LD->getSrcValueOffset();
5608 OS << ":" << SrcOffset << ">";
5611 switch (LD->getExtensionType()) {
5612 default: doExt = false; break;
5613 case ISD::EXTLOAD: OS << " <anyext "; break;
5614 case ISD::SEXTLOAD: OS << " <sext "; break;
5615 case ISD::ZEXTLOAD: OS << " <zext "; break;
5618 OS << LD->getMemoryVT().getEVTString() << ">";
5620 const char *AM = getIndexedModeName(LD->getAddressingMode());
5623 if (LD->isVolatile())
5624 OS << " <volatile>";
5625 OS << " alignment=" << LD->getAlignment();
5626 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5627 const Value *SrcValue = ST->getSrcValue();
5628 int SrcOffset = ST->getSrcValueOffset();
5634 OS << ":" << SrcOffset << ">";
5636 if (ST->isTruncatingStore())
5637 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">";
5639 const char *AM = getIndexedModeName(ST->getAddressingMode());
5642 if (ST->isVolatile())
5643 OS << " <volatile>";
5644 OS << " alignment=" << ST->getAlignment();
5645 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5646 const Value *SrcValue = AT->getSrcValue();
5647 int SrcOffset = AT->getSrcValueOffset();
5653 OS << ":" << SrcOffset << ">";
5654 if (AT->isVolatile())
5655 OS << " <volatile>";
5656 OS << " alignment=" << AT->getAlignment();
5660 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5663 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5665 OS << (void*)getOperand(i).getNode();
5666 if (unsigned RN = getOperand(i).getResNo())
5669 print_details(OS, G);
5672 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5673 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5674 if (N->getOperand(i).getNode()->hasOneUse())
5675 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5677 errs() << "\n" << std::string(indent+2, ' ')
5678 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5682 errs().indent(indent);
5686 void SelectionDAG::dump() const {
5687 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
5689 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5691 const SDNode *N = I;
5692 if (!N->hasOneUse() && N != getRoot().getNode())
5693 DumpNodes(N, 2, this);
5696 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5701 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5703 print_details(OS, G);
5706 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5707 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5708 const SelectionDAG *G, VisitedSDNodeSet &once) {
5709 if (!once.insert(N)) // If we've been here before, return now.
5711 // Dump the current SDNode, but don't end the line yet.
5712 OS << std::string(indent, ' ');
5714 // Having printed this SDNode, walk the children:
5715 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5716 const SDNode *child = N->getOperand(i).getNode();
5719 if (child->getNumOperands() == 0) {
5720 // This child has no grandchildren; print it inline right here.
5721 child->printr(OS, G);
5723 } else { // Just the address. FIXME: also print the child's opcode
5725 if (unsigned RN = N->getOperand(i).getResNo())
5730 // Dump children that have grandchildren on their own line(s).
5731 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5732 const SDNode *child = N->getOperand(i).getNode();
5733 DumpNodesr(OS, child, indent+2, G, once);
5737 void SDNode::dumpr() const {
5738 VisitedSDNodeSet once;
5739 DumpNodesr(errs(), this, 0, 0, once);
5743 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5744 unsigned GlobalAddressSDNode::getAddressSpace() const {
5745 return getGlobal()->getType()->getAddressSpace();
5749 const Type *ConstantPoolSDNode::getType() const {
5750 if (isMachineConstantPoolEntry())
5751 return Val.MachineCPVal->getType();
5752 return Val.ConstVal->getType();
5755 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5757 unsigned &SplatBitSize,
5759 unsigned MinSplatBits) {
5760 EVT VT = getValueType(0);
5761 assert(VT.isVector() && "Expected a vector type");
5762 unsigned sz = VT.getSizeInBits();
5763 if (MinSplatBits > sz)
5766 SplatValue = APInt(sz, 0);
5767 SplatUndef = APInt(sz, 0);
5769 // Get the bits. Bits with undefined values (when the corresponding element
5770 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5771 // in SplatValue. If any of the values are not constant, give up and return
5773 unsigned int nOps = getNumOperands();
5774 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5775 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5776 for (unsigned i = 0; i < nOps; ++i) {
5777 SDValue OpVal = getOperand(i);
5778 unsigned BitPos = i * EltBitSize;
5780 if (OpVal.getOpcode() == ISD::UNDEF)
5781 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5782 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5783 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5784 zextOrTrunc(sz) << BitPos);
5785 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5786 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5791 // The build_vector is all constants or undefs. Find the smallest element
5792 // size that splats the vector.
5794 HasAnyUndefs = (SplatUndef != 0);
5797 unsigned HalfSize = sz / 2;
5798 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5799 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5800 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5801 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5803 // If the two halves do not match (ignoring undef bits), stop here.
5804 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5805 MinSplatBits > HalfSize)
5808 SplatValue = HighValue | LowValue;
5809 SplatUndef = HighUndef & LowUndef;
5818 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
5819 // Find the first non-undef value in the shuffle mask.
5821 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5824 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5826 // Make sure all remaining elements are either undef or the same as the first
5828 for (int Idx = Mask[i]; i != e; ++i)
5829 if (Mask[i] >= 0 && Mask[i] != Idx)