1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/Support/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BITCAST)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BITCAST)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Glue)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Glue)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::HANDLENODE: return false; // noop.
616 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
617 "Cond code doesn't exist!");
618 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
619 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
621 case ISD::ExternalSymbol:
622 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624 case ISD::TargetExternalSymbol: {
625 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
626 Erased = TargetExternalSymbols.erase(
627 std::pair<std::string,unsigned char>(ESN->getSymbol(),
628 ESN->getTargetFlags()));
631 case ISD::VALUETYPE: {
632 EVT VT = cast<VTSDNode>(N)->getVT();
633 if (VT.isExtended()) {
634 Erased = ExtendedValueTypeNodes.erase(VT);
636 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
637 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
642 // Remove it from the CSE Map.
643 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
644 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
645 Erased = CSEMap.RemoveNode(N);
649 // Verify that the node was actually in one of the CSE maps, unless it has a
650 // flag result (which cannot be CSE'd) or is one of the special cases that are
651 // not subject to CSE.
652 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
653 !N->isMachineOpcode() && !doNotCSE(N)) {
656 llvm_unreachable("Node is not in map!");
662 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
663 /// maps and modified in place. Add it back to the CSE maps, unless an identical
664 /// node already exists, in which case transfer all its users to the existing
665 /// node. This transfer can potentially trigger recursive merging.
668 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
669 DAGUpdateListener *UpdateListener) {
670 // For node types that aren't CSE'd, just act as if no identical node
673 SDNode *Existing = CSEMap.GetOrInsertNode(N);
675 // If there was already an existing matching node, use ReplaceAllUsesWith
676 // to replace the dead one with the existing one. This can cause
677 // recursive merging of other unrelated nodes down the line.
678 ReplaceAllUsesWith(N, Existing, UpdateListener);
680 // N is now dead. Inform the listener if it exists and delete it.
682 UpdateListener->NodeDeleted(N, Existing);
683 DeleteNodeNotInCSEMaps(N);
688 // If the node doesn't already exist, we updated it. Inform a listener if
691 UpdateListener->NodeUpdated(N);
694 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
695 /// were replaced with those specified. If this node is never memoized,
696 /// return null, otherwise return a pointer to the slot it would take. If a
697 /// node already exists with these operands, the slot will be non-null.
698 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
703 SDValue Ops[] = { Op };
705 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
706 AddNodeIDCustom(ID, N);
707 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
711 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
712 /// were replaced with those specified. If this node is never memoized,
713 /// return null, otherwise return a pointer to the slot it would take. If a
714 /// node already exists with these operands, the slot will be non-null.
715 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
716 SDValue Op1, SDValue Op2,
721 SDValue Ops[] = { Op1, Op2 };
723 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
724 AddNodeIDCustom(ID, N);
725 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
730 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
731 /// were replaced with those specified. If this node is never memoized,
732 /// return null, otherwise return a pointer to the slot it would take. If a
733 /// node already exists with these operands, the slot will be non-null.
734 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
735 const SDValue *Ops,unsigned NumOps,
741 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
742 AddNodeIDCustom(ID, N);
743 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
749 static void VerifyNodeCommon(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
784 static void VerifySDNode(SDNode *N) {
785 // The SDNode allocators cannot be used to allocate nodes with fields that are
786 // not present in an SDNode!
787 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
788 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
789 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
790 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
791 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
792 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
793 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
794 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
795 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
796 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
797 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
798 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
799 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
800 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
801 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
802 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
803 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
804 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
805 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
810 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
812 static void VerifyMachineNode(SDNode *N) {
813 // The MachineNode allocators cannot be used to allocate nodes with fields
814 // that are not present in a MachineNode!
815 // Currently there are no such nodes.
821 /// getEVTAlignment - Compute the default alignment value for the
824 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
825 const Type *Ty = VT == MVT::iPTR ?
826 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
827 VT.getTypeForEVT(*getContext());
829 return TLI.getTargetData()->getABITypeAlignment(Ty);
832 // EntryNode could meaningfully have debug info if we can find it...
833 SelectionDAG::SelectionDAG(const TargetMachine &tm)
834 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
835 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
836 Root(getEntryNode()), Ordering(0) {
837 AllNodes.push_back(&EntryNode);
838 Ordering = new SDNodeOrdering();
839 DbgInfo = new SDDbgInfo();
842 void SelectionDAG::init(MachineFunction &mf) {
844 Context = &mf.getFunction()->getContext();
847 SelectionDAG::~SelectionDAG() {
853 void SelectionDAG::allnodes_clear() {
854 assert(&*AllNodes.begin() == &EntryNode);
855 AllNodes.remove(AllNodes.begin());
856 while (!AllNodes.empty())
857 DeallocateNode(AllNodes.begin());
860 void SelectionDAG::clear() {
862 OperandAllocator.Reset();
865 ExtendedValueTypeNodes.clear();
866 ExternalSymbols.clear();
867 TargetExternalSymbols.clear();
868 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
869 static_cast<CondCodeSDNode*>(0));
870 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
871 static_cast<SDNode*>(0));
873 EntryNode.UseList = 0;
874 AllNodes.push_back(&EntryNode);
875 Root = getEntryNode();
880 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
881 return VT.bitsGT(Op.getValueType()) ?
882 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
883 getNode(ISD::TRUNCATE, DL, VT, Op);
886 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
887 return VT.bitsGT(Op.getValueType()) ?
888 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
889 getNode(ISD::TRUNCATE, DL, VT, Op);
892 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
893 assert(!VT.isVector() &&
894 "getZeroExtendInReg should use the vector element type instead of "
896 if (Op.getValueType() == VT) return Op;
897 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
898 APInt Imm = APInt::getLowBitsSet(BitWidth,
900 return getNode(ISD::AND, DL, Op.getValueType(), Op,
901 getConstant(Imm, Op.getValueType()));
904 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
906 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
907 EVT EltVT = VT.getScalarType();
909 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
910 return getNode(ISD::XOR, DL, VT, Val, NegOne);
913 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
914 EVT EltVT = VT.getScalarType();
915 assert((EltVT.getSizeInBits() >= 64 ||
916 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
917 "getConstant with a uint64_t value that doesn't fit in the type!");
918 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
921 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
922 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
925 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
926 assert(VT.isInteger() && "Cannot create FP integer constant!");
928 EVT EltVT = VT.getScalarType();
929 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
930 "APInt size does not match type size!");
932 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
934 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
938 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
940 return SDValue(N, 0);
943 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
944 CSEMap.InsertNode(N, IP);
945 AllNodes.push_back(N);
948 SDValue Result(N, 0);
950 SmallVector<SDValue, 8> Ops;
951 Ops.assign(VT.getVectorNumElements(), Result);
952 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
957 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
958 return getConstant(Val, TLI.getPointerTy(), isTarget);
962 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
963 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
966 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
967 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
969 EVT EltVT = VT.getScalarType();
971 // Do the map lookup using the actual bit pattern for the floating point
972 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
973 // we don't have issues with SNANs.
974 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
976 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
980 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
982 return SDValue(N, 0);
985 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
986 CSEMap.InsertNode(N, IP);
987 AllNodes.push_back(N);
990 SDValue Result(N, 0);
992 SmallVector<SDValue, 8> Ops;
993 Ops.assign(VT.getVectorNumElements(), Result);
994 // FIXME DebugLoc info might be appropriate here
995 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1000 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1001 EVT EltVT = VT.getScalarType();
1002 if (EltVT==MVT::f32)
1003 return getConstantFP(APFloat((float)Val), VT, isTarget);
1004 else if (EltVT==MVT::f64)
1005 return getConstantFP(APFloat(Val), VT, isTarget);
1006 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1008 APFloat apf = APFloat(Val);
1009 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1011 return getConstantFP(apf, VT, isTarget);
1013 assert(0 && "Unsupported type in getConstantFP");
1018 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1019 EVT VT, int64_t Offset,
1021 unsigned char TargetFlags) {
1022 assert((TargetFlags == 0 || isTargetGA) &&
1023 "Cannot set target flags on target-independent globals");
1025 // Truncate (with sign-extension) the offset value to the pointer size.
1026 EVT PTy = TLI.getPointerTy();
1027 unsigned BitWidth = PTy.getSizeInBits();
1029 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1031 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1033 // If GV is an alias then use the aliasee for determining thread-localness.
1034 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1035 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1039 if (GVar && GVar->isThreadLocal())
1040 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1042 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1044 FoldingSetNodeID ID;
1045 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1047 ID.AddInteger(Offset);
1048 ID.AddInteger(TargetFlags);
1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1051 return SDValue(E, 0);
1053 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1054 Offset, TargetFlags);
1055 CSEMap.InsertNode(N, IP);
1056 AllNodes.push_back(N);
1057 return SDValue(N, 0);
1060 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1061 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1062 FoldingSetNodeID ID;
1063 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1067 return SDValue(E, 0);
1069 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1070 CSEMap.InsertNode(N, IP);
1071 AllNodes.push_back(N);
1072 return SDValue(N, 0);
1075 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1076 unsigned char TargetFlags) {
1077 assert((TargetFlags == 0 || isTarget) &&
1078 "Cannot set target flags on target-independent jump tables");
1079 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1080 FoldingSetNodeID ID;
1081 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1083 ID.AddInteger(TargetFlags);
1085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1086 return SDValue(E, 0);
1088 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1090 CSEMap.InsertNode(N, IP);
1091 AllNodes.push_back(N);
1092 return SDValue(N, 0);
1095 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1096 unsigned Alignment, int Offset,
1098 unsigned char TargetFlags) {
1099 assert((TargetFlags == 0 || isTarget) &&
1100 "Cannot set target flags on target-independent globals");
1102 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1103 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1104 FoldingSetNodeID ID;
1105 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1106 ID.AddInteger(Alignment);
1107 ID.AddInteger(Offset);
1109 ID.AddInteger(TargetFlags);
1111 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1112 return SDValue(E, 0);
1114 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1115 Alignment, TargetFlags);
1116 CSEMap.InsertNode(N, IP);
1117 AllNodes.push_back(N);
1118 return SDValue(N, 0);
1122 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1123 unsigned Alignment, int Offset,
1125 unsigned char TargetFlags) {
1126 assert((TargetFlags == 0 || isTarget) &&
1127 "Cannot set target flags on target-independent globals");
1129 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1130 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1131 FoldingSetNodeID ID;
1132 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1133 ID.AddInteger(Alignment);
1134 ID.AddInteger(Offset);
1135 C->AddSelectionDAGCSEId(ID);
1136 ID.AddInteger(TargetFlags);
1138 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1139 return SDValue(E, 0);
1141 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1142 Alignment, TargetFlags);
1143 CSEMap.InsertNode(N, IP);
1144 AllNodes.push_back(N);
1145 return SDValue(N, 0);
1148 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1149 FoldingSetNodeID ID;
1150 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1153 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1154 return SDValue(E, 0);
1156 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1157 CSEMap.InsertNode(N, IP);
1158 AllNodes.push_back(N);
1159 return SDValue(N, 0);
1162 SDValue SelectionDAG::getValueType(EVT VT) {
1163 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1164 ValueTypeNodes.size())
1165 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1167 SDNode *&N = VT.isExtended() ?
1168 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1170 if (N) return SDValue(N, 0);
1171 N = new (NodeAllocator) VTSDNode(VT);
1172 AllNodes.push_back(N);
1173 return SDValue(N, 0);
1176 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1177 SDNode *&N = ExternalSymbols[Sym];
1178 if (N) return SDValue(N, 0);
1179 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1180 AllNodes.push_back(N);
1181 return SDValue(N, 0);
1184 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1185 unsigned char TargetFlags) {
1187 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1189 if (N) return SDValue(N, 0);
1190 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1191 AllNodes.push_back(N);
1192 return SDValue(N, 0);
1195 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1196 if ((unsigned)Cond >= CondCodeNodes.size())
1197 CondCodeNodes.resize(Cond+1);
1199 if (CondCodeNodes[Cond] == 0) {
1200 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1201 CondCodeNodes[Cond] = N;
1202 AllNodes.push_back(N);
1205 return SDValue(CondCodeNodes[Cond], 0);
1208 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1209 // the shuffle mask M that point at N1 to point at N2, and indices that point
1210 // N2 to point at N1.
1211 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1213 int NElts = M.size();
1214 for (int i = 0; i != NElts; ++i) {
1222 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1223 SDValue N2, const int *Mask) {
1224 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1225 assert(VT.isVector() && N1.getValueType().isVector() &&
1226 "Vector Shuffle VTs must be a vectors");
1227 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1228 && "Vector Shuffle VTs must have same element type");
1230 // Canonicalize shuffle undef, undef -> undef
1231 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1232 return getUNDEF(VT);
1234 // Validate that all indices in Mask are within the range of the elements
1235 // input to the shuffle.
1236 unsigned NElts = VT.getVectorNumElements();
1237 SmallVector<int, 8> MaskVec;
1238 for (unsigned i = 0; i != NElts; ++i) {
1239 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1240 MaskVec.push_back(Mask[i]);
1243 // Canonicalize shuffle v, v -> v, undef
1246 for (unsigned i = 0; i != NElts; ++i)
1247 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1250 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1251 if (N1.getOpcode() == ISD::UNDEF)
1252 commuteShuffle(N1, N2, MaskVec);
1254 // Canonicalize all index into lhs, -> shuffle lhs, undef
1255 // Canonicalize all index into rhs, -> shuffle rhs, undef
1256 bool AllLHS = true, AllRHS = true;
1257 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1258 for (unsigned i = 0; i != NElts; ++i) {
1259 if (MaskVec[i] >= (int)NElts) {
1264 } else if (MaskVec[i] >= 0) {
1268 if (AllLHS && AllRHS)
1269 return getUNDEF(VT);
1270 if (AllLHS && !N2Undef)
1274 commuteShuffle(N1, N2, MaskVec);
1277 // If Identity shuffle, or all shuffle in to undef, return that node.
1278 bool AllUndef = true;
1279 bool Identity = true;
1280 for (unsigned i = 0; i != NElts; ++i) {
1281 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1282 if (MaskVec[i] >= 0) AllUndef = false;
1284 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1287 return getUNDEF(VT);
1289 FoldingSetNodeID ID;
1290 SDValue Ops[2] = { N1, N2 };
1291 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1292 for (unsigned i = 0; i != NElts; ++i)
1293 ID.AddInteger(MaskVec[i]);
1296 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1297 return SDValue(E, 0);
1299 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1300 // SDNode doesn't have access to it. This memory will be "leaked" when
1301 // the node is deallocated, but recovered when the NodeAllocator is released.
1302 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1303 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1305 ShuffleVectorSDNode *N =
1306 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1307 CSEMap.InsertNode(N, IP);
1308 AllNodes.push_back(N);
1309 return SDValue(N, 0);
1312 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1313 SDValue Val, SDValue DTy,
1314 SDValue STy, SDValue Rnd, SDValue Sat,
1315 ISD::CvtCode Code) {
1316 // If the src and dest types are the same and the conversion is between
1317 // integer types of the same sign or two floats, no conversion is necessary.
1319 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1322 FoldingSetNodeID ID;
1323 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1324 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1326 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1327 return SDValue(E, 0);
1329 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1331 CSEMap.InsertNode(N, IP);
1332 AllNodes.push_back(N);
1333 return SDValue(N, 0);
1336 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1337 FoldingSetNodeID ID;
1338 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1339 ID.AddInteger(RegNo);
1341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1342 return SDValue(E, 0);
1344 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1345 CSEMap.InsertNode(N, IP);
1346 AllNodes.push_back(N);
1347 return SDValue(N, 0);
1350 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1351 FoldingSetNodeID ID;
1352 SDValue Ops[] = { Root };
1353 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1354 ID.AddPointer(Label);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1360 CSEMap.InsertNode(N, IP);
1361 AllNodes.push_back(N);
1362 return SDValue(N, 0);
1366 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1368 unsigned char TargetFlags) {
1369 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1371 FoldingSetNodeID ID;
1372 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1374 ID.AddInteger(TargetFlags);
1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1377 return SDValue(E, 0);
1379 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1380 CSEMap.InsertNode(N, IP);
1381 AllNodes.push_back(N);
1382 return SDValue(N, 0);
1385 SDValue SelectionDAG::getSrcValue(const Value *V) {
1386 assert((!V || V->getType()->isPointerTy()) &&
1387 "SrcValue is not a pointer?");
1389 FoldingSetNodeID ID;
1390 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1394 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1395 return SDValue(E, 0);
1397 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1398 CSEMap.InsertNode(N, IP);
1399 AllNodes.push_back(N);
1400 return SDValue(N, 0);
1403 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1404 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1405 FoldingSetNodeID ID;
1406 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1411 return SDValue(E, 0);
1413 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1414 CSEMap.InsertNode(N, IP);
1415 AllNodes.push_back(N);
1416 return SDValue(N, 0);
1420 /// getShiftAmountOperand - Return the specified value casted to
1421 /// the target's desired shift amount type.
1422 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1423 EVT OpTy = Op.getValueType();
1424 MVT ShTy = TLI.getShiftAmountTy();
1425 if (OpTy == ShTy || OpTy.isVector()) return Op;
1427 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1428 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1431 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1432 /// specified value type.
1433 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1434 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1435 unsigned ByteSize = VT.getStoreSize();
1436 const Type *Ty = VT.getTypeForEVT(*getContext());
1437 unsigned StackAlign =
1438 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1440 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1441 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1444 /// CreateStackTemporary - Create a stack temporary suitable for holding
1445 /// either of the specified value types.
1446 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1447 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1448 VT2.getStoreSizeInBits())/8;
1449 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1450 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1451 const TargetData *TD = TLI.getTargetData();
1452 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1453 TD->getPrefTypeAlignment(Ty2));
1455 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1456 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1457 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1460 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1461 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1462 // These setcc operations always fold.
1466 case ISD::SETFALSE2: return getConstant(0, VT);
1468 case ISD::SETTRUE2: return getConstant(1, VT);
1480 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1484 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1485 const APInt &C2 = N2C->getAPIntValue();
1486 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1487 const APInt &C1 = N1C->getAPIntValue();
1490 default: llvm_unreachable("Unknown integer setcc!");
1491 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1492 case ISD::SETNE: return getConstant(C1 != C2, VT);
1493 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1494 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1495 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1496 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1497 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1498 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1499 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1500 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1504 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1505 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1506 // No compile time operations on this type yet.
1507 if (N1C->getValueType(0) == MVT::ppcf128)
1510 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1513 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1514 return getUNDEF(VT);
1516 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1517 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1518 return getUNDEF(VT);
1520 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1521 R==APFloat::cmpLessThan, VT);
1522 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1523 return getUNDEF(VT);
1525 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1526 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1527 return getUNDEF(VT);
1529 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1530 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1531 return getUNDEF(VT);
1533 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1534 R==APFloat::cmpEqual, VT);
1535 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1536 return getUNDEF(VT);
1538 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1539 R==APFloat::cmpEqual, VT);
1540 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1541 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1542 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1543 R==APFloat::cmpEqual, VT);
1544 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1545 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1546 R==APFloat::cmpLessThan, VT);
1547 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1548 R==APFloat::cmpUnordered, VT);
1549 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1550 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1553 // Ensure that the constant occurs on the RHS.
1554 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1558 // Could not fold it.
1562 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1563 /// use this predicate to simplify operations downstream.
1564 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1565 // This predicate is not safe for vector operations.
1566 if (Op.getValueType().isVector())
1569 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1570 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1573 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1574 /// this predicate to simplify operations downstream. Mask is known to be zero
1575 /// for bits that V cannot have.
1576 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1577 unsigned Depth) const {
1578 APInt KnownZero, KnownOne;
1579 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1581 return (KnownZero & Mask) == Mask;
1584 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1585 /// known to be either zero or one and return them in the KnownZero/KnownOne
1586 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1588 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1589 APInt &KnownZero, APInt &KnownOne,
1590 unsigned Depth) const {
1591 unsigned BitWidth = Mask.getBitWidth();
1592 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1593 "Mask size mismatches value type size!");
1595 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1596 if (Depth == 6 || Mask == 0)
1597 return; // Limit search depth.
1599 APInt KnownZero2, KnownOne2;
1601 switch (Op.getOpcode()) {
1603 // We know all of the bits for a constant!
1604 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1605 KnownZero = ~KnownOne & Mask;
1608 // If either the LHS or the RHS are Zero, the result is zero.
1609 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1610 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1611 KnownZero2, KnownOne2, Depth+1);
1612 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1613 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1615 // Output known-1 bits are only known if set in both the LHS & RHS.
1616 KnownOne &= KnownOne2;
1617 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1618 KnownZero |= KnownZero2;
1621 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1622 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1623 KnownZero2, KnownOne2, Depth+1);
1624 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1625 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1627 // Output known-0 bits are only known if clear in both the LHS & RHS.
1628 KnownZero &= KnownZero2;
1629 // Output known-1 are known to be set if set in either the LHS | RHS.
1630 KnownOne |= KnownOne2;
1633 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1634 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1635 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1636 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1638 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1639 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1640 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1641 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1642 KnownZero = KnownZeroOut;
1646 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1647 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1648 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1652 // If low bits are zero in either operand, output low known-0 bits.
1653 // Also compute a conserative estimate for high known-0 bits.
1654 // More trickiness is possible, but this is sufficient for the
1655 // interesting case of alignment computation.
1656 KnownOne.clearAllBits();
1657 unsigned TrailZ = KnownZero.countTrailingOnes() +
1658 KnownZero2.countTrailingOnes();
1659 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1660 KnownZero2.countLeadingOnes(),
1661 BitWidth) - BitWidth;
1663 TrailZ = std::min(TrailZ, BitWidth);
1664 LeadZ = std::min(LeadZ, BitWidth);
1665 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1666 APInt::getHighBitsSet(BitWidth, LeadZ);
1671 // For the purposes of computing leading zeros we can conservatively
1672 // treat a udiv as a logical right shift by the power of 2 known to
1673 // be less than the denominator.
1674 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1675 ComputeMaskedBits(Op.getOperand(0),
1676 AllOnes, KnownZero2, KnownOne2, Depth+1);
1677 unsigned LeadZ = KnownZero2.countLeadingOnes();
1679 KnownOne2.clearAllBits();
1680 KnownZero2.clearAllBits();
1681 ComputeMaskedBits(Op.getOperand(1),
1682 AllOnes, KnownZero2, KnownOne2, Depth+1);
1683 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1684 if (RHSUnknownLeadingOnes != BitWidth)
1685 LeadZ = std::min(BitWidth,
1686 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1688 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1692 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1693 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1694 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1695 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1697 // Only known if known in both the LHS and RHS.
1698 KnownOne &= KnownOne2;
1699 KnownZero &= KnownZero2;
1701 case ISD::SELECT_CC:
1702 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1703 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1704 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1705 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1707 // Only known if known in both the LHS and RHS.
1708 KnownOne &= KnownOne2;
1709 KnownZero &= KnownZero2;
1717 if (Op.getResNo() != 1)
1719 // The boolean result conforms to getBooleanContents. Fall through.
1721 // If we know the result of a setcc has the top bits zero, use this info.
1722 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1724 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1727 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1728 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1729 unsigned ShAmt = SA->getZExtValue();
1731 // If the shift count is an invalid immediate, don't do anything.
1732 if (ShAmt >= BitWidth)
1735 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1736 KnownZero, KnownOne, Depth+1);
1737 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1738 KnownZero <<= ShAmt;
1740 // low bits known zero.
1741 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1745 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1746 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1747 unsigned ShAmt = SA->getZExtValue();
1749 // If the shift count is an invalid immediate, don't do anything.
1750 if (ShAmt >= BitWidth)
1753 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1754 KnownZero, KnownOne, Depth+1);
1755 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1756 KnownZero = KnownZero.lshr(ShAmt);
1757 KnownOne = KnownOne.lshr(ShAmt);
1759 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1760 KnownZero |= HighBits; // High bits known zero.
1764 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1765 unsigned ShAmt = SA->getZExtValue();
1767 // If the shift count is an invalid immediate, don't do anything.
1768 if (ShAmt >= BitWidth)
1771 APInt InDemandedMask = (Mask << ShAmt);
1772 // If any of the demanded bits are produced by the sign extension, we also
1773 // demand the input sign bit.
1774 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1775 if (HighBits.getBoolValue())
1776 InDemandedMask |= APInt::getSignBit(BitWidth);
1778 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1780 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1781 KnownZero = KnownZero.lshr(ShAmt);
1782 KnownOne = KnownOne.lshr(ShAmt);
1784 // Handle the sign bits.
1785 APInt SignBit = APInt::getSignBit(BitWidth);
1786 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1788 if (KnownZero.intersects(SignBit)) {
1789 KnownZero |= HighBits; // New bits are known zero.
1790 } else if (KnownOne.intersects(SignBit)) {
1791 KnownOne |= HighBits; // New bits are known one.
1795 case ISD::SIGN_EXTEND_INREG: {
1796 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1797 unsigned EBits = EVT.getScalarType().getSizeInBits();
1799 // Sign extension. Compute the demanded bits in the result that are not
1800 // present in the input.
1801 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1803 APInt InSignBit = APInt::getSignBit(EBits);
1804 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1806 // If the sign extended bits are demanded, we know that the sign
1808 InSignBit = InSignBit.zext(BitWidth);
1809 if (NewBits.getBoolValue())
1810 InputDemandedBits |= InSignBit;
1812 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1813 KnownZero, KnownOne, Depth+1);
1814 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1816 // If the sign bit of the input is known set or clear, then we know the
1817 // top bits of the result.
1818 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1819 KnownZero |= NewBits;
1820 KnownOne &= ~NewBits;
1821 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1822 KnownOne |= NewBits;
1823 KnownZero &= ~NewBits;
1824 } else { // Input sign bit unknown
1825 KnownZero &= ~NewBits;
1826 KnownOne &= ~NewBits;
1833 unsigned LowBits = Log2_32(BitWidth)+1;
1834 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1835 KnownOne.clearAllBits();
1839 if (ISD::isZEXTLoad(Op.getNode())) {
1840 LoadSDNode *LD = cast<LoadSDNode>(Op);
1841 EVT VT = LD->getMemoryVT();
1842 unsigned MemBits = VT.getScalarType().getSizeInBits();
1843 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1847 case ISD::ZERO_EXTEND: {
1848 EVT InVT = Op.getOperand(0).getValueType();
1849 unsigned InBits = InVT.getScalarType().getSizeInBits();
1850 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1851 APInt InMask = Mask.trunc(InBits);
1852 KnownZero = KnownZero.trunc(InBits);
1853 KnownOne = KnownOne.trunc(InBits);
1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1855 KnownZero = KnownZero.zext(BitWidth);
1856 KnownOne = KnownOne.zext(BitWidth);
1857 KnownZero |= NewBits;
1860 case ISD::SIGN_EXTEND: {
1861 EVT InVT = Op.getOperand(0).getValueType();
1862 unsigned InBits = InVT.getScalarType().getSizeInBits();
1863 APInt InSignBit = APInt::getSignBit(InBits);
1864 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1865 APInt InMask = Mask.trunc(InBits);
1867 // If any of the sign extended bits are demanded, we know that the sign
1868 // bit is demanded. Temporarily set this bit in the mask for our callee.
1869 if (NewBits.getBoolValue())
1870 InMask |= InSignBit;
1872 KnownZero = KnownZero.trunc(InBits);
1873 KnownOne = KnownOne.trunc(InBits);
1874 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1876 // Note if the sign bit is known to be zero or one.
1877 bool SignBitKnownZero = KnownZero.isNegative();
1878 bool SignBitKnownOne = KnownOne.isNegative();
1879 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1880 "Sign bit can't be known to be both zero and one!");
1882 // If the sign bit wasn't actually demanded by our caller, we don't
1883 // want it set in the KnownZero and KnownOne result values. Reset the
1884 // mask and reapply it to the result values.
1885 InMask = Mask.trunc(InBits);
1886 KnownZero &= InMask;
1889 KnownZero = KnownZero.zext(BitWidth);
1890 KnownOne = KnownOne.zext(BitWidth);
1892 // If the sign bit is known zero or one, the top bits match.
1893 if (SignBitKnownZero)
1894 KnownZero |= NewBits;
1895 else if (SignBitKnownOne)
1896 KnownOne |= NewBits;
1899 case ISD::ANY_EXTEND: {
1900 EVT InVT = Op.getOperand(0).getValueType();
1901 unsigned InBits = InVT.getScalarType().getSizeInBits();
1902 APInt InMask = Mask.trunc(InBits);
1903 KnownZero = KnownZero.trunc(InBits);
1904 KnownOne = KnownOne.trunc(InBits);
1905 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1906 KnownZero = KnownZero.zext(BitWidth);
1907 KnownOne = KnownOne.zext(BitWidth);
1910 case ISD::TRUNCATE: {
1911 EVT InVT = Op.getOperand(0).getValueType();
1912 unsigned InBits = InVT.getScalarType().getSizeInBits();
1913 APInt InMask = Mask.zext(InBits);
1914 KnownZero = KnownZero.zext(InBits);
1915 KnownOne = KnownOne.zext(InBits);
1916 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1917 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1918 KnownZero = KnownZero.trunc(BitWidth);
1919 KnownOne = KnownOne.trunc(BitWidth);
1922 case ISD::AssertZext: {
1923 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1924 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1925 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1927 KnownZero |= (~InMask) & Mask;
1931 // All bits are zero except the low bit.
1932 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1936 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1937 // We know that the top bits of C-X are clear if X contains less bits
1938 // than C (i.e. no wrap-around can happen). For example, 20-X is
1939 // positive if we can prove that X is >= 0 and < 16.
1940 if (CLHS->getAPIntValue().isNonNegative()) {
1941 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1942 // NLZ can't be BitWidth with no sign bit
1943 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1944 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1947 // If all of the MaskV bits are known to be zero, then we know the
1948 // output top bits are zero, because we now know that the output is
1950 if ((KnownZero2 & MaskV) == MaskV) {
1951 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1952 // Top bits known zero.
1953 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1961 // Output known-0 bits are known if clear or set in both the low clear bits
1962 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1963 // low 3 bits clear.
1964 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1965 BitWidth - Mask.countLeadingZeros());
1966 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1967 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1968 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1970 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1971 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1972 KnownZeroOut = std::min(KnownZeroOut,
1973 KnownZero2.countTrailingOnes());
1975 if (Op.getOpcode() == ISD::ADD) {
1976 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1980 // With ADDE, a carry bit may be added in, so we can only use this
1981 // information if we know (at least) that the low two bits are clear. We
1982 // then return to the caller that the low bit is unknown but that other bits
1984 if (KnownZeroOut >= 2) // ADDE
1985 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
1989 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1990 const APInt &RA = Rem->getAPIntValue().abs();
1991 if (RA.isPowerOf2()) {
1992 APInt LowBits = RA - 1;
1993 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1994 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1996 // The low bits of the first operand are unchanged by the srem.
1997 KnownZero = KnownZero2 & LowBits;
1998 KnownOne = KnownOne2 & LowBits;
2000 // If the first operand is non-negative or has all low bits zero, then
2001 // the upper bits are all zero.
2002 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2003 KnownZero |= ~LowBits;
2005 // If the first operand is negative and not all low bits are zero, then
2006 // the upper bits are all one.
2007 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2008 KnownOne |= ~LowBits;
2013 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2018 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2019 const APInt &RA = Rem->getAPIntValue();
2020 if (RA.isPowerOf2()) {
2021 APInt LowBits = (RA - 1);
2022 APInt Mask2 = LowBits & Mask;
2023 KnownZero |= ~LowBits & Mask;
2024 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2025 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2030 // Since the result is less than or equal to either operand, any leading
2031 // zero bits in either operand must also exist in the result.
2032 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2033 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2035 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2038 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2039 KnownZero2.countLeadingOnes());
2040 KnownOne.clearAllBits();
2041 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2045 // Allow the target to implement this method for its nodes.
2046 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2047 case ISD::INTRINSIC_WO_CHAIN:
2048 case ISD::INTRINSIC_W_CHAIN:
2049 case ISD::INTRINSIC_VOID:
2050 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2057 /// ComputeNumSignBits - Return the number of times the sign bit of the
2058 /// register is replicated into the other bits. We know that at least 1 bit
2059 /// is always equal to the sign bit (itself), but other cases can give us
2060 /// information. For example, immediately after an "SRA X, 2", we know that
2061 /// the top 3 bits are all equal to each other, so we return 3.
2062 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2063 EVT VT = Op.getValueType();
2064 assert(VT.isInteger() && "Invalid VT!");
2065 unsigned VTBits = VT.getScalarType().getSizeInBits();
2067 unsigned FirstAnswer = 1;
2070 return 1; // Limit search depth.
2072 switch (Op.getOpcode()) {
2074 case ISD::AssertSext:
2075 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2076 return VTBits-Tmp+1;
2077 case ISD::AssertZext:
2078 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2081 case ISD::Constant: {
2082 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2083 // If negative, return # leading ones.
2084 if (Val.isNegative())
2085 return Val.countLeadingOnes();
2087 // Return # leading zeros.
2088 return Val.countLeadingZeros();
2091 case ISD::SIGN_EXTEND:
2092 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2093 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2095 case ISD::SIGN_EXTEND_INREG:
2096 // Max of the input and what this extends.
2098 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2101 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2102 return std::max(Tmp, Tmp2);
2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2106 // SRA X, C -> adds C sign bits.
2107 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2108 Tmp += C->getZExtValue();
2109 if (Tmp > VTBits) Tmp = VTBits;
2113 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2114 // shl destroys sign bits.
2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2116 if (C->getZExtValue() >= VTBits || // Bad shift.
2117 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2118 return Tmp - C->getZExtValue();
2123 case ISD::XOR: // NOT is handled here.
2124 // Logical binary ops preserve the number of sign bits at the worst.
2125 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2127 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2128 FirstAnswer = std::min(Tmp, Tmp2);
2129 // We computed what we know about the sign bits as our first
2130 // answer. Now proceed to the generic code that uses
2131 // ComputeMaskedBits, and pick whichever answer is better.
2136 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2137 if (Tmp == 1) return 1; // Early out.
2138 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2139 return std::min(Tmp, Tmp2);
2147 if (Op.getResNo() != 1)
2149 // The boolean result conforms to getBooleanContents. Fall through.
2151 // If setcc returns 0/-1, all bits are sign bits.
2152 if (TLI.getBooleanContents() ==
2153 TargetLowering::ZeroOrNegativeOneBooleanContent)
2158 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2159 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2161 // Handle rotate right by N like a rotate left by 32-N.
2162 if (Op.getOpcode() == ISD::ROTR)
2163 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2165 // If we aren't rotating out all of the known-in sign bits, return the
2166 // number that are left. This handles rotl(sext(x), 1) for example.
2167 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2168 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2172 // Add can have at most one carry bit. Thus we know that the output
2173 // is, at worst, one more bit than the inputs.
2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2175 if (Tmp == 1) return 1; // Early out.
2177 // Special case decrementing a value (ADD X, -1):
2178 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2179 if (CRHS->isAllOnesValue()) {
2180 APInt KnownZero, KnownOne;
2181 APInt Mask = APInt::getAllOnesValue(VTBits);
2182 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2184 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2186 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2189 // If we are subtracting one from a positive number, there is no carry
2190 // out of the result.
2191 if (KnownZero.isNegative())
2195 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2196 if (Tmp2 == 1) return 1;
2197 return std::min(Tmp, Tmp2)-1;
2201 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2202 if (Tmp2 == 1) return 1;
2205 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2206 if (CLHS->isNullValue()) {
2207 APInt KnownZero, KnownOne;
2208 APInt Mask = APInt::getAllOnesValue(VTBits);
2209 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2210 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2212 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2215 // If the input is known to be positive (the sign bit is known clear),
2216 // the output of the NEG has the same number of sign bits as the input.
2217 if (KnownZero.isNegative())
2220 // Otherwise, we treat this like a SUB.
2223 // Sub can have at most one carry bit. Thus we know that the output
2224 // is, at worst, one more bit than the inputs.
2225 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2226 if (Tmp == 1) return 1; // Early out.
2227 return std::min(Tmp, Tmp2)-1;
2230 // FIXME: it's tricky to do anything useful for this, but it is an important
2231 // case for targets like X86.
2235 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2236 if (Op.getOpcode() == ISD::LOAD) {
2237 LoadSDNode *LD = cast<LoadSDNode>(Op);
2238 unsigned ExtType = LD->getExtensionType();
2241 case ISD::SEXTLOAD: // '17' bits known
2242 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2243 return VTBits-Tmp+1;
2244 case ISD::ZEXTLOAD: // '16' bits known
2245 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2250 // Allow the target to implement this method for its nodes.
2251 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2252 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2253 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2254 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2255 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2256 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2259 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2260 // use this information.
2261 APInt KnownZero, KnownOne;
2262 APInt Mask = APInt::getAllOnesValue(VTBits);
2263 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2265 if (KnownZero.isNegative()) { // sign bit is 0
2267 } else if (KnownOne.isNegative()) { // sign bit is 1;
2274 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2275 // the number of identical bits in the top of the input value.
2277 Mask <<= Mask.getBitWidth()-VTBits;
2278 // Return # leading zeros. We use 'min' here in case Val was zero before
2279 // shifting. We don't want to return '64' as for an i32 "0".
2280 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2283 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2284 // If we're told that NaNs won't happen, assume they won't.
2288 // If the value is a constant, we can obviously see if it is a NaN or not.
2289 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2290 return !C->getValueAPF().isNaN();
2292 // TODO: Recognize more cases here.
2297 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2298 // If the value is a constant, we can obviously see if it is a zero or not.
2299 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2300 return !C->isZero();
2302 // TODO: Recognize more cases here.
2307 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2308 // Check the obvious case.
2309 if (A == B) return true;
2311 // For for negative and positive zero.
2312 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2313 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2314 if (CA->isZero() && CB->isZero()) return true;
2316 // Otherwise they may not be equal.
2320 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2321 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2322 if (!GA) return false;
2323 if (GA->getOffset() != 0) return false;
2324 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2325 if (!GV) return false;
2326 return MF->getMMI().hasDebugInfo();
2330 /// getNode - Gets or creates the specified node.
2332 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2333 FoldingSetNodeID ID;
2334 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2337 return SDValue(E, 0);
2339 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2340 CSEMap.InsertNode(N, IP);
2342 AllNodes.push_back(N);
2346 return SDValue(N, 0);
2349 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2350 EVT VT, SDValue Operand) {
2351 // Constant fold unary operations with an integer constant operand.
2352 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2353 const APInt &Val = C->getAPIntValue();
2356 case ISD::SIGN_EXTEND:
2357 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2358 case ISD::ANY_EXTEND:
2359 case ISD::ZERO_EXTEND:
2361 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2362 case ISD::UINT_TO_FP:
2363 case ISD::SINT_TO_FP: {
2364 // No compile time operations on ppcf128.
2365 if (VT == MVT::ppcf128) break;
2366 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2367 (void)apf.convertFromAPInt(Val,
2368 Opcode==ISD::SINT_TO_FP,
2369 APFloat::rmNearestTiesToEven);
2370 return getConstantFP(apf, VT);
2373 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2374 return getConstantFP(Val.bitsToFloat(), VT);
2375 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2376 return getConstantFP(Val.bitsToDouble(), VT);
2379 return getConstant(Val.byteSwap(), VT);
2381 return getConstant(Val.countPopulation(), VT);
2383 return getConstant(Val.countLeadingZeros(), VT);
2385 return getConstant(Val.countTrailingZeros(), VT);
2389 // Constant fold unary operations with a floating point constant operand.
2390 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2391 APFloat V = C->getValueAPF(); // make copy
2392 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2396 return getConstantFP(V, VT);
2399 return getConstantFP(V, VT);
2401 case ISD::FP_EXTEND: {
2403 // This can return overflow, underflow, or inexact; we don't care.
2404 // FIXME need to be more flexible about rounding mode.
2405 (void)V.convert(*EVTToAPFloatSemantics(VT),
2406 APFloat::rmNearestTiesToEven, &ignored);
2407 return getConstantFP(V, VT);
2409 case ISD::FP_TO_SINT:
2410 case ISD::FP_TO_UINT: {
2413 assert(integerPartWidth >= 64);
2414 // FIXME need to be more flexible about rounding mode.
2415 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2416 Opcode==ISD::FP_TO_SINT,
2417 APFloat::rmTowardZero, &ignored);
2418 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2420 APInt api(VT.getSizeInBits(), 2, x);
2421 return getConstant(api, VT);
2424 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2425 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2426 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2427 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2433 unsigned OpOpcode = Operand.getNode()->getOpcode();
2435 case ISD::TokenFactor:
2436 case ISD::MERGE_VALUES:
2437 case ISD::CONCAT_VECTORS:
2438 return Operand; // Factor, merge or concat of one node? No need.
2439 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2440 case ISD::FP_EXTEND:
2441 assert(VT.isFloatingPoint() &&
2442 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2443 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2444 assert((!VT.isVector() ||
2445 VT.getVectorNumElements() ==
2446 Operand.getValueType().getVectorNumElements()) &&
2447 "Vector element count mismatch!");
2448 if (Operand.getOpcode() == ISD::UNDEF)
2449 return getUNDEF(VT);
2451 case ISD::SIGN_EXTEND:
2452 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2453 "Invalid SIGN_EXTEND!");
2454 if (Operand.getValueType() == VT) return Operand; // noop extension
2455 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2456 "Invalid sext node, dst < src!");
2457 assert((!VT.isVector() ||
2458 VT.getVectorNumElements() ==
2459 Operand.getValueType().getVectorNumElements()) &&
2460 "Vector element count mismatch!");
2461 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2462 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2464 case ISD::ZERO_EXTEND:
2465 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2466 "Invalid ZERO_EXTEND!");
2467 if (Operand.getValueType() == VT) return Operand; // noop extension
2468 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2469 "Invalid zext node, dst < src!");
2470 assert((!VT.isVector() ||
2471 VT.getVectorNumElements() ==
2472 Operand.getValueType().getVectorNumElements()) &&
2473 "Vector element count mismatch!");
2474 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2475 return getNode(ISD::ZERO_EXTEND, DL, VT,
2476 Operand.getNode()->getOperand(0));
2478 case ISD::ANY_EXTEND:
2479 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2480 "Invalid ANY_EXTEND!");
2481 if (Operand.getValueType() == VT) return Operand; // noop extension
2482 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2483 "Invalid anyext node, dst < src!");
2484 assert((!VT.isVector() ||
2485 VT.getVectorNumElements() ==
2486 Operand.getValueType().getVectorNumElements()) &&
2487 "Vector element count mismatch!");
2489 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2490 OpOpcode == ISD::ANY_EXTEND)
2491 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2492 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2494 // (ext (trunx x)) -> x
2495 if (OpOpcode == ISD::TRUNCATE) {
2496 SDValue OpOp = Operand.getNode()->getOperand(0);
2497 if (OpOp.getValueType() == VT)
2502 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2503 "Invalid TRUNCATE!");
2504 if (Operand.getValueType() == VT) return Operand; // noop truncate
2505 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2506 "Invalid truncate node, src < dst!");
2507 assert((!VT.isVector() ||
2508 VT.getVectorNumElements() ==
2509 Operand.getValueType().getVectorNumElements()) &&
2510 "Vector element count mismatch!");
2511 if (OpOpcode == ISD::TRUNCATE)
2512 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2513 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2514 OpOpcode == ISD::ANY_EXTEND) {
2515 // If the source is smaller than the dest, we still need an extend.
2516 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2517 .bitsLT(VT.getScalarType()))
2518 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2519 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2520 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2522 return Operand.getNode()->getOperand(0);
2526 // Basic sanity checking.
2527 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2528 && "Cannot BITCAST between types of different sizes!");
2529 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2530 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2531 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2532 if (OpOpcode == ISD::UNDEF)
2533 return getUNDEF(VT);
2535 case ISD::SCALAR_TO_VECTOR:
2536 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2537 (VT.getVectorElementType() == Operand.getValueType() ||
2538 (VT.getVectorElementType().isInteger() &&
2539 Operand.getValueType().isInteger() &&
2540 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2541 "Illegal SCALAR_TO_VECTOR node!");
2542 if (OpOpcode == ISD::UNDEF)
2543 return getUNDEF(VT);
2544 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2545 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2546 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2547 Operand.getConstantOperandVal(1) == 0 &&
2548 Operand.getOperand(0).getValueType() == VT)
2549 return Operand.getOperand(0);
2552 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2553 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2554 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2555 Operand.getNode()->getOperand(0));
2556 if (OpOpcode == ISD::FNEG) // --X -> X
2557 return Operand.getNode()->getOperand(0);
2560 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2561 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2566 SDVTList VTs = getVTList(VT);
2567 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2568 FoldingSetNodeID ID;
2569 SDValue Ops[1] = { Operand };
2570 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2572 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2573 return SDValue(E, 0);
2575 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2576 CSEMap.InsertNode(N, IP);
2578 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2581 AllNodes.push_back(N);
2585 return SDValue(N, 0);
2588 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2590 ConstantSDNode *Cst1,
2591 ConstantSDNode *Cst2) {
2592 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2595 case ISD::ADD: return getConstant(C1 + C2, VT);
2596 case ISD::SUB: return getConstant(C1 - C2, VT);
2597 case ISD::MUL: return getConstant(C1 * C2, VT);
2599 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2602 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2605 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2608 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2610 case ISD::AND: return getConstant(C1 & C2, VT);
2611 case ISD::OR: return getConstant(C1 | C2, VT);
2612 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2613 case ISD::SHL: return getConstant(C1 << C2, VT);
2614 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2615 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2616 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2617 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2624 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2625 SDValue N1, SDValue N2) {
2626 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2627 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2630 case ISD::TokenFactor:
2631 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2632 N2.getValueType() == MVT::Other && "Invalid token factor!");
2633 // Fold trivial token factors.
2634 if (N1.getOpcode() == ISD::EntryToken) return N2;
2635 if (N2.getOpcode() == ISD::EntryToken) return N1;
2636 if (N1 == N2) return N1;
2638 case ISD::CONCAT_VECTORS:
2639 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2640 // one big BUILD_VECTOR.
2641 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2642 N2.getOpcode() == ISD::BUILD_VECTOR) {
2643 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2644 N1.getNode()->op_end());
2645 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2646 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2650 assert(VT.isInteger() && "This operator does not apply to FP types!");
2651 assert(N1.getValueType() == N2.getValueType() &&
2652 N1.getValueType() == VT && "Binary operator types must match!");
2653 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2654 // worth handling here.
2655 if (N2C && N2C->isNullValue())
2657 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2664 assert(VT.isInteger() && "This operator does not apply to FP types!");
2665 assert(N1.getValueType() == N2.getValueType() &&
2666 N1.getValueType() == VT && "Binary operator types must match!");
2667 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2668 // it's worth handling here.
2669 if (N2C && N2C->isNullValue())
2679 assert(VT.isInteger() && "This operator does not apply to FP types!");
2680 assert(N1.getValueType() == N2.getValueType() &&
2681 N1.getValueType() == VT && "Binary operator types must match!");
2689 if (Opcode == ISD::FADD) {
2691 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2692 if (CFP->getValueAPF().isZero())
2695 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2696 if (CFP->getValueAPF().isZero())
2698 } else if (Opcode == ISD::FSUB) {
2700 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2701 if (CFP->getValueAPF().isZero())
2705 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2706 assert(N1.getValueType() == N2.getValueType() &&
2707 N1.getValueType() == VT && "Binary operator types must match!");
2709 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2710 assert(N1.getValueType() == VT &&
2711 N1.getValueType().isFloatingPoint() &&
2712 N2.getValueType().isFloatingPoint() &&
2713 "Invalid FCOPYSIGN!");
2720 assert(VT == N1.getValueType() &&
2721 "Shift operators return type must be the same as their first arg");
2722 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2723 "Shifts only work on integers");
2725 // Always fold shifts of i1 values so the code generator doesn't need to
2726 // handle them. Since we know the size of the shift has to be less than the
2727 // size of the value, the shift/rotate count is guaranteed to be zero.
2730 if (N2C && N2C->isNullValue())
2733 case ISD::FP_ROUND_INREG: {
2734 EVT EVT = cast<VTSDNode>(N2)->getVT();
2735 assert(VT == N1.getValueType() && "Not an inreg round!");
2736 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2737 "Cannot FP_ROUND_INREG integer types");
2738 assert(EVT.isVector() == VT.isVector() &&
2739 "FP_ROUND_INREG type should be vector iff the operand "
2741 assert((!EVT.isVector() ||
2742 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2743 "Vector element counts must match in FP_ROUND_INREG");
2744 assert(EVT.bitsLE(VT) && "Not rounding down!");
2745 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2749 assert(VT.isFloatingPoint() &&
2750 N1.getValueType().isFloatingPoint() &&
2751 VT.bitsLE(N1.getValueType()) &&
2752 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2753 if (N1.getValueType() == VT) return N1; // noop conversion.
2755 case ISD::AssertSext:
2756 case ISD::AssertZext: {
2757 EVT EVT = cast<VTSDNode>(N2)->getVT();
2758 assert(VT == N1.getValueType() && "Not an inreg extend!");
2759 assert(VT.isInteger() && EVT.isInteger() &&
2760 "Cannot *_EXTEND_INREG FP types");
2761 assert(!EVT.isVector() &&
2762 "AssertSExt/AssertZExt type should be the vector element type "
2763 "rather than the vector type!");
2764 assert(EVT.bitsLE(VT) && "Not extending!");
2765 if (VT == EVT) return N1; // noop assertion.
2768 case ISD::SIGN_EXTEND_INREG: {
2769 EVT EVT = cast<VTSDNode>(N2)->getVT();
2770 assert(VT == N1.getValueType() && "Not an inreg extend!");
2771 assert(VT.isInteger() && EVT.isInteger() &&
2772 "Cannot *_EXTEND_INREG FP types");
2773 assert(EVT.isVector() == VT.isVector() &&
2774 "SIGN_EXTEND_INREG type should be vector iff the operand "
2776 assert((!EVT.isVector() ||
2777 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2778 "Vector element counts must match in SIGN_EXTEND_INREG");
2779 assert(EVT.bitsLE(VT) && "Not extending!");
2780 if (EVT == VT) return N1; // Not actually extending
2783 APInt Val = N1C->getAPIntValue();
2784 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2785 Val <<= Val.getBitWidth()-FromBits;
2786 Val = Val.ashr(Val.getBitWidth()-FromBits);
2787 return getConstant(Val, VT);
2791 case ISD::EXTRACT_VECTOR_ELT:
2792 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2793 if (N1.getOpcode() == ISD::UNDEF)
2794 return getUNDEF(VT);
2796 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2797 // expanding copies of large vectors from registers.
2799 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2800 N1.getNumOperands() > 0) {
2802 N1.getOperand(0).getValueType().getVectorNumElements();
2803 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2804 N1.getOperand(N2C->getZExtValue() / Factor),
2805 getConstant(N2C->getZExtValue() % Factor,
2806 N2.getValueType()));
2809 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2810 // expanding large vector constants.
2811 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2812 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2813 EVT VEltTy = N1.getValueType().getVectorElementType();
2814 if (Elt.getValueType() != VEltTy) {
2815 // If the vector element type is not legal, the BUILD_VECTOR operands
2816 // are promoted and implicitly truncated. Make that explicit here.
2817 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2820 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2821 // result is implicitly extended.
2822 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2827 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2828 // operations are lowered to scalars.
2829 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2830 // If the indices are the same, return the inserted element else
2831 // if the indices are known different, extract the element from
2832 // the original vector.
2833 SDValue N1Op2 = N1.getOperand(2);
2834 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2836 if (N1Op2C && N2C) {
2837 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2838 if (VT == N1.getOperand(1).getValueType())
2839 return N1.getOperand(1);
2841 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2844 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2848 case ISD::EXTRACT_ELEMENT:
2849 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2850 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2851 (N1.getValueType().isInteger() == VT.isInteger()) &&
2852 "Wrong types for EXTRACT_ELEMENT!");
2854 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2855 // 64-bit integers into 32-bit parts. Instead of building the extract of
2856 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2857 if (N1.getOpcode() == ISD::BUILD_PAIR)
2858 return N1.getOperand(N2C->getZExtValue());
2860 // EXTRACT_ELEMENT of a constant int is also very common.
2861 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2862 unsigned ElementSize = VT.getSizeInBits();
2863 unsigned Shift = ElementSize * N2C->getZExtValue();
2864 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2865 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2868 case ISD::EXTRACT_SUBVECTOR:
2869 if (N1.getValueType() == VT) // Trivial extraction.
2876 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2877 if (SV.getNode()) return SV;
2878 } else { // Cannonicalize constant to RHS if commutative
2879 if (isCommutativeBinOp(Opcode)) {
2880 std::swap(N1C, N2C);
2886 // Constant fold FP operations.
2887 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2888 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2890 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2891 // Cannonicalize constant to RHS if commutative
2892 std::swap(N1CFP, N2CFP);
2894 } else if (N2CFP && VT != MVT::ppcf128) {
2895 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2896 APFloat::opStatus s;
2899 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2900 if (s != APFloat::opInvalidOp)
2901 return getConstantFP(V1, VT);
2904 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2905 if (s!=APFloat::opInvalidOp)
2906 return getConstantFP(V1, VT);
2909 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2910 if (s!=APFloat::opInvalidOp)
2911 return getConstantFP(V1, VT);
2914 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2915 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2916 return getConstantFP(V1, VT);
2919 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2920 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2921 return getConstantFP(V1, VT);
2923 case ISD::FCOPYSIGN:
2925 return getConstantFP(V1, VT);
2931 // Canonicalize an UNDEF to the RHS, even over a constant.
2932 if (N1.getOpcode() == ISD::UNDEF) {
2933 if (isCommutativeBinOp(Opcode)) {
2937 case ISD::FP_ROUND_INREG:
2938 case ISD::SIGN_EXTEND_INREG:
2944 return N1; // fold op(undef, arg2) -> undef
2952 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2953 // For vectors, we can't easily build an all zero vector, just return
2960 // Fold a bunch of operators when the RHS is undef.
2961 if (N2.getOpcode() == ISD::UNDEF) {
2964 if (N1.getOpcode() == ISD::UNDEF)
2965 // Handle undef ^ undef -> 0 special case. This is a common
2967 return getConstant(0, VT);
2977 return N2; // fold op(arg1, undef) -> undef
2991 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2992 // For vectors, we can't easily build an all zero vector, just return
2997 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2998 // For vectors, we can't easily build an all one vector, just return
3006 // Memoize this node if possible.
3008 SDVTList VTs = getVTList(VT);
3009 if (VT != MVT::Glue) {
3010 SDValue Ops[] = { N1, N2 };
3011 FoldingSetNodeID ID;
3012 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3015 return SDValue(E, 0);
3017 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3018 CSEMap.InsertNode(N, IP);
3020 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3023 AllNodes.push_back(N);
3027 return SDValue(N, 0);
3030 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3031 SDValue N1, SDValue N2, SDValue N3) {
3032 // Perform various simplifications.
3033 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3035 case ISD::CONCAT_VECTORS:
3036 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3037 // one big BUILD_VECTOR.
3038 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3039 N2.getOpcode() == ISD::BUILD_VECTOR &&
3040 N3.getOpcode() == ISD::BUILD_VECTOR) {
3041 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3042 N1.getNode()->op_end());
3043 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3044 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3045 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3049 // Use FoldSetCC to simplify SETCC's.
3050 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3051 if (Simp.getNode()) return Simp;
3056 if (N1C->getZExtValue())
3057 return N2; // select true, X, Y -> X
3059 return N3; // select false, X, Y -> Y
3062 if (N2 == N3) return N2; // select C, X, X -> X
3064 case ISD::VECTOR_SHUFFLE:
3065 llvm_unreachable("should use getVectorShuffle constructor!");
3068 // Fold bit_convert nodes from a type to themselves.
3069 if (N1.getValueType() == VT)
3074 // Memoize node if it doesn't produce a flag.
3076 SDVTList VTs = getVTList(VT);
3077 if (VT != MVT::Glue) {
3078 SDValue Ops[] = { N1, N2, N3 };
3079 FoldingSetNodeID ID;
3080 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3082 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3083 return SDValue(E, 0);
3085 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3086 CSEMap.InsertNode(N, IP);
3088 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3091 AllNodes.push_back(N);
3095 return SDValue(N, 0);
3098 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3099 SDValue N1, SDValue N2, SDValue N3,
3101 SDValue Ops[] = { N1, N2, N3, N4 };
3102 return getNode(Opcode, DL, VT, Ops, 4);
3105 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3106 SDValue N1, SDValue N2, SDValue N3,
3107 SDValue N4, SDValue N5) {
3108 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3109 return getNode(Opcode, DL, VT, Ops, 5);
3112 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3113 /// the incoming stack arguments to be loaded from the stack.
3114 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3115 SmallVector<SDValue, 8> ArgChains;
3117 // Include the original chain at the beginning of the list. When this is
3118 // used by target LowerCall hooks, this helps legalize find the
3119 // CALLSEQ_BEGIN node.
3120 ArgChains.push_back(Chain);
3122 // Add a chain value for each stack argument.
3123 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3124 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3125 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3126 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3127 if (FI->getIndex() < 0)
3128 ArgChains.push_back(SDValue(L, 1));
3130 // Build a tokenfactor for all the chains.
3131 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3132 &ArgChains[0], ArgChains.size());
3135 /// getMemsetValue - Vectorized representation of the memset value
3137 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3139 assert(Value.getOpcode() != ISD::UNDEF);
3141 unsigned NumBits = VT.getScalarType().getSizeInBits();
3142 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3143 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3145 for (unsigned i = NumBits; i > 8; i >>= 1) {
3146 Val = (Val << Shift) | Val;
3150 return DAG.getConstant(Val, VT);
3151 return DAG.getConstantFP(APFloat(Val), VT);
3154 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3155 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3157 for (unsigned i = NumBits; i > 8; i >>= 1) {
3158 Value = DAG.getNode(ISD::OR, dl, VT,
3159 DAG.getNode(ISD::SHL, dl, VT, Value,
3160 DAG.getConstant(Shift,
3161 TLI.getShiftAmountTy())),
3169 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3170 /// used when a memcpy is turned into a memset when the source is a constant
3172 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3173 const TargetLowering &TLI,
3174 std::string &Str, unsigned Offset) {
3175 // Handle vector with all elements zero.
3178 return DAG.getConstant(0, VT);
3179 else if (VT == MVT::f32 || VT == MVT::f64)
3180 return DAG.getConstantFP(0.0, VT);
3181 else if (VT.isVector()) {
3182 unsigned NumElts = VT.getVectorNumElements();
3183 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3184 return DAG.getNode(ISD::BITCAST, dl, VT,
3185 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3188 llvm_unreachable("Expected type!");
3191 assert(!VT.isVector() && "Can't handle vector type here!");
3192 unsigned NumBits = VT.getSizeInBits();
3193 unsigned MSB = NumBits / 8;
3195 if (TLI.isLittleEndian())
3196 Offset = Offset + MSB - 1;
3197 for (unsigned i = 0; i != MSB; ++i) {
3198 Val = (Val << 8) | (unsigned char)Str[Offset];
3199 Offset += TLI.isLittleEndian() ? -1 : 1;
3201 return DAG.getConstant(Val, VT);
3204 /// getMemBasePlusOffset - Returns base and offset node for the
3206 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3207 SelectionDAG &DAG) {
3208 EVT VT = Base.getValueType();
3209 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3210 VT, Base, DAG.getConstant(Offset, VT));
3213 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3215 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3216 unsigned SrcDelta = 0;
3217 GlobalAddressSDNode *G = NULL;
3218 if (Src.getOpcode() == ISD::GlobalAddress)
3219 G = cast<GlobalAddressSDNode>(Src);
3220 else if (Src.getOpcode() == ISD::ADD &&
3221 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3222 Src.getOperand(1).getOpcode() == ISD::Constant) {
3223 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3224 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3229 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3230 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3236 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3237 /// to replace the memset / memcpy. Return true if the number of memory ops
3238 /// is below the threshold. It returns the types of the sequence of
3239 /// memory ops to perform memset / memcpy by reference.
3240 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3241 unsigned Limit, uint64_t Size,
3242 unsigned DstAlign, unsigned SrcAlign,
3243 bool NonScalarIntSafe,
3246 const TargetLowering &TLI) {
3247 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3248 "Expecting memcpy / memset source to meet alignment requirement!");
3249 // If 'SrcAlign' is zero, that means the memory operation does not need load
3250 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3251 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3252 // specified alignment of the memory operation. If it is zero, that means
3253 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3254 // indicates whether the memcpy source is constant so it does not need to be
3256 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3257 NonScalarIntSafe, MemcpyStrSrc,
3258 DAG.getMachineFunction());
3260 if (VT == MVT::Other) {
3261 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3262 TLI.allowsUnalignedMemoryAccesses(VT)) {
3263 VT = TLI.getPointerTy();
3265 switch (DstAlign & 7) {
3266 case 0: VT = MVT::i64; break;
3267 case 4: VT = MVT::i32; break;
3268 case 2: VT = MVT::i16; break;
3269 default: VT = MVT::i8; break;
3274 while (!TLI.isTypeLegal(LVT))
3275 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3276 assert(LVT.isInteger());
3282 // If we're optimizing for size, and there is a limit, bump the maximum number
3283 // of operations inserted down to 4. This is a wild guess that approximates
3284 // the size of a call to memcpy or memset (3 arguments + call).
3286 const Function *F = DAG.getMachineFunction().getFunction();
3287 if (F->hasFnAttr(Attribute::OptimizeForSize))
3291 unsigned NumMemOps = 0;
3293 unsigned VTSize = VT.getSizeInBits() / 8;
3294 while (VTSize > Size) {
3295 // For now, only use non-vector load / store's for the left-over pieces.
3296 if (VT.isVector() || VT.isFloatingPoint()) {
3298 while (!TLI.isTypeLegal(VT))
3299 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3300 VTSize = VT.getSizeInBits() / 8;
3302 // This can result in a type that is not legal on the target, e.g.
3303 // 1 or 2 bytes on PPC.
3304 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3309 if (++NumMemOps > Limit)
3311 MemOps.push_back(VT);
3318 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3319 SDValue Chain, SDValue Dst,
3320 SDValue Src, uint64_t Size,
3321 unsigned Align, bool isVol,
3323 MachinePointerInfo DstPtrInfo,
3324 MachinePointerInfo SrcPtrInfo) {
3325 // Turn a memcpy of undef to nop.
3326 if (Src.getOpcode() == ISD::UNDEF)
3329 // Expand memcpy to a series of load and store ops if the size operand falls
3330 // below a certain threshold.
3331 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3332 // rather than maybe a humongous number of loads and stores.
3333 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3334 std::vector<EVT> MemOps;
3335 bool DstAlignCanChange = false;
3336 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3337 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3338 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3339 DstAlignCanChange = true;
3340 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3341 if (Align > SrcAlign)
3344 bool CopyFromStr = isMemSrcFromString(Src, Str);
3345 bool isZeroStr = CopyFromStr && Str.empty();
3346 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3348 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3349 (DstAlignCanChange ? 0 : Align),
3350 (isZeroStr ? 0 : SrcAlign),
3351 true, CopyFromStr, DAG, TLI))
3354 if (DstAlignCanChange) {
3355 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3356 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3357 if (NewAlign > Align) {
3358 // Give the stack frame object a larger alignment if needed.
3359 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3360 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3365 SmallVector<SDValue, 8> OutChains;
3366 unsigned NumMemOps = MemOps.size();
3367 uint64_t SrcOff = 0, DstOff = 0;
3368 for (unsigned i = 0; i != NumMemOps; ++i) {
3370 unsigned VTSize = VT.getSizeInBits() / 8;
3371 SDValue Value, Store;
3374 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3375 // It's unlikely a store of a vector immediate can be done in a single
3376 // instruction. It would require a load from a constantpool first.
3377 // We only handle zero vectors here.
3378 // FIXME: Handle other cases where store of vector immediate is done in
3379 // a single instruction.
3380 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3381 Store = DAG.getStore(Chain, dl, Value,
3382 getMemBasePlusOffset(Dst, DstOff, DAG),
3383 DstPtrInfo.getWithOffset(DstOff), isVol,
3386 // The type might not be legal for the target. This should only happen
3387 // if the type is smaller than a legal type, as on PPC, so the right
3388 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3389 // to Load/Store if NVT==VT.
3390 // FIXME does the case above also need this?
3391 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3392 assert(NVT.bitsGE(VT));
3393 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3394 getMemBasePlusOffset(Src, SrcOff, DAG),
3395 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3396 MinAlign(SrcAlign, SrcOff));
3397 Store = DAG.getTruncStore(Chain, dl, Value,
3398 getMemBasePlusOffset(Dst, DstOff, DAG),
3399 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3402 OutChains.push_back(Store);
3407 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3408 &OutChains[0], OutChains.size());
3411 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3412 SDValue Chain, SDValue Dst,
3413 SDValue Src, uint64_t Size,
3414 unsigned Align, bool isVol,
3416 MachinePointerInfo DstPtrInfo,
3417 MachinePointerInfo SrcPtrInfo) {
3418 // Turn a memmove of undef to nop.
3419 if (Src.getOpcode() == ISD::UNDEF)
3422 // Expand memmove to a series of load and store ops if the size operand falls
3423 // below a certain threshold.
3424 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3425 std::vector<EVT> MemOps;
3426 bool DstAlignCanChange = false;
3427 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3428 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3429 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3430 DstAlignCanChange = true;
3431 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3432 if (Align > SrcAlign)
3434 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3436 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3437 (DstAlignCanChange ? 0 : Align),
3438 SrcAlign, true, false, DAG, TLI))
3441 if (DstAlignCanChange) {
3442 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3443 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3444 if (NewAlign > Align) {
3445 // Give the stack frame object a larger alignment if needed.
3446 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3447 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3452 uint64_t SrcOff = 0, DstOff = 0;
3453 SmallVector<SDValue, 8> LoadValues;
3454 SmallVector<SDValue, 8> LoadChains;
3455 SmallVector<SDValue, 8> OutChains;
3456 unsigned NumMemOps = MemOps.size();
3457 for (unsigned i = 0; i < NumMemOps; i++) {
3459 unsigned VTSize = VT.getSizeInBits() / 8;
3460 SDValue Value, Store;
3462 Value = DAG.getLoad(VT, dl, Chain,
3463 getMemBasePlusOffset(Src, SrcOff, DAG),
3464 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3466 LoadValues.push_back(Value);
3467 LoadChains.push_back(Value.getValue(1));
3470 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3471 &LoadChains[0], LoadChains.size());
3473 for (unsigned i = 0; i < NumMemOps; i++) {
3475 unsigned VTSize = VT.getSizeInBits() / 8;
3476 SDValue Value, Store;
3478 Store = DAG.getStore(Chain, dl, LoadValues[i],
3479 getMemBasePlusOffset(Dst, DstOff, DAG),
3480 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3481 OutChains.push_back(Store);
3485 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3486 &OutChains[0], OutChains.size());
3489 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3490 SDValue Chain, SDValue Dst,
3491 SDValue Src, uint64_t Size,
3492 unsigned Align, bool isVol,
3493 MachinePointerInfo DstPtrInfo) {
3494 // Turn a memset of undef to nop.
3495 if (Src.getOpcode() == ISD::UNDEF)
3498 // Expand memset to a series of load/store ops if the size operand
3499 // falls below a certain threshold.
3500 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3501 std::vector<EVT> MemOps;
3502 bool DstAlignCanChange = false;
3503 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3504 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3505 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3506 DstAlignCanChange = true;
3507 bool NonScalarIntSafe =
3508 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3509 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3510 Size, (DstAlignCanChange ? 0 : Align), 0,
3511 NonScalarIntSafe, false, DAG, TLI))
3514 if (DstAlignCanChange) {
3515 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3516 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3517 if (NewAlign > Align) {
3518 // Give the stack frame object a larger alignment if needed.
3519 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3520 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3525 SmallVector<SDValue, 8> OutChains;
3526 uint64_t DstOff = 0;
3527 unsigned NumMemOps = MemOps.size();
3528 for (unsigned i = 0; i < NumMemOps; i++) {
3530 unsigned VTSize = VT.getSizeInBits() / 8;
3531 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3532 SDValue Store = DAG.getStore(Chain, dl, Value,
3533 getMemBasePlusOffset(Dst, DstOff, DAG),
3534 DstPtrInfo.getWithOffset(DstOff),
3535 isVol, false, Align);
3536 OutChains.push_back(Store);
3540 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3541 &OutChains[0], OutChains.size());
3544 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3545 SDValue Src, SDValue Size,
3546 unsigned Align, bool isVol, bool AlwaysInline,
3547 MachinePointerInfo DstPtrInfo,
3548 MachinePointerInfo SrcPtrInfo) {
3550 // Check to see if we should lower the memcpy to loads and stores first.
3551 // For cases within the target-specified limits, this is the best choice.
3552 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3554 // Memcpy with size zero? Just return the original chain.
3555 if (ConstantSize->isNullValue())
3558 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3559 ConstantSize->getZExtValue(),Align,
3560 isVol, false, DstPtrInfo, SrcPtrInfo);
3561 if (Result.getNode())
3565 // Then check to see if we should lower the memcpy with target-specific
3566 // code. If the target chooses to do this, this is the next best.
3568 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3569 isVol, AlwaysInline,
3570 DstPtrInfo, SrcPtrInfo);
3571 if (Result.getNode())
3574 // If we really need inline code and the target declined to provide it,
3575 // use a (potentially long) sequence of loads and stores.
3577 assert(ConstantSize && "AlwaysInline requires a constant size!");
3578 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3579 ConstantSize->getZExtValue(), Align, isVol,
3580 true, DstPtrInfo, SrcPtrInfo);
3583 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3584 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3585 // respect volatile, so they may do things like read or write memory
3586 // beyond the given memory regions. But fixing this isn't easy, and most
3587 // people don't care.
3589 // Emit a library call.
3590 TargetLowering::ArgListTy Args;
3591 TargetLowering::ArgListEntry Entry;
3592 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3593 Entry.Node = Dst; Args.push_back(Entry);
3594 Entry.Node = Src; Args.push_back(Entry);
3595 Entry.Node = Size; Args.push_back(Entry);
3596 // FIXME: pass in DebugLoc
3597 std::pair<SDValue,SDValue> CallResult =
3598 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3599 false, false, false, false, 0,
3600 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3601 /*isReturnValueUsed=*/false,
3602 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3603 TLI.getPointerTy()),
3605 return CallResult.second;
3608 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3609 SDValue Src, SDValue Size,
3610 unsigned Align, bool isVol,
3611 MachinePointerInfo DstPtrInfo,
3612 MachinePointerInfo SrcPtrInfo) {
3614 // Check to see if we should lower the memmove to loads and stores first.
3615 // For cases within the target-specified limits, this is the best choice.
3616 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3618 // Memmove with size zero? Just return the original chain.
3619 if (ConstantSize->isNullValue())
3623 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3624 ConstantSize->getZExtValue(), Align, isVol,
3625 false, DstPtrInfo, SrcPtrInfo);
3626 if (Result.getNode())
3630 // Then check to see if we should lower the memmove with target-specific
3631 // code. If the target chooses to do this, this is the next best.
3633 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3634 DstPtrInfo, SrcPtrInfo);
3635 if (Result.getNode())
3638 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3639 // not be safe. See memcpy above for more details.
3641 // Emit a library call.
3642 TargetLowering::ArgListTy Args;
3643 TargetLowering::ArgListEntry Entry;
3644 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3645 Entry.Node = Dst; Args.push_back(Entry);
3646 Entry.Node = Src; Args.push_back(Entry);
3647 Entry.Node = Size; Args.push_back(Entry);
3648 // FIXME: pass in DebugLoc
3649 std::pair<SDValue,SDValue> CallResult =
3650 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3651 false, false, false, false, 0,
3652 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3653 /*isReturnValueUsed=*/false,
3654 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3655 TLI.getPointerTy()),
3657 return CallResult.second;
3660 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3661 SDValue Src, SDValue Size,
3662 unsigned Align, bool isVol,
3663 MachinePointerInfo DstPtrInfo) {
3665 // Check to see if we should lower the memset to stores first.
3666 // For cases within the target-specified limits, this is the best choice.
3667 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3669 // Memset with size zero? Just return the original chain.
3670 if (ConstantSize->isNullValue())
3674 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3675 Align, isVol, DstPtrInfo);
3677 if (Result.getNode())
3681 // Then check to see if we should lower the memset with target-specific
3682 // code. If the target chooses to do this, this is the next best.
3684 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3686 if (Result.getNode())
3689 // Emit a library call.
3690 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3691 TargetLowering::ArgListTy Args;
3692 TargetLowering::ArgListEntry Entry;
3693 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3694 Args.push_back(Entry);
3695 // Extend or truncate the argument to be an i32 value for the call.
3696 if (Src.getValueType().bitsGT(MVT::i32))
3697 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3699 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3701 Entry.Ty = Type::getInt32Ty(*getContext());
3702 Entry.isSExt = true;
3703 Args.push_back(Entry);
3705 Entry.Ty = IntPtrTy;
3706 Entry.isSExt = false;
3707 Args.push_back(Entry);
3708 // FIXME: pass in DebugLoc
3709 std::pair<SDValue,SDValue> CallResult =
3710 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3711 false, false, false, false, 0,
3712 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3713 /*isReturnValueUsed=*/false,
3714 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3715 TLI.getPointerTy()),
3717 return CallResult.second;
3720 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3721 SDValue Chain, SDValue Ptr, SDValue Cmp,
3722 SDValue Swp, MachinePointerInfo PtrInfo,
3723 unsigned Alignment) {
3724 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3725 Alignment = getEVTAlignment(MemVT);
3727 MachineFunction &MF = getMachineFunction();
3728 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3730 // For now, atomics are considered to be volatile always.
3731 Flags |= MachineMemOperand::MOVolatile;
3733 MachineMemOperand *MMO =
3734 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3736 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3739 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3741 SDValue Ptr, SDValue Cmp,
3742 SDValue Swp, MachineMemOperand *MMO) {
3743 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3744 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3746 EVT VT = Cmp.getValueType();
3748 SDVTList VTs = getVTList(VT, MVT::Other);
3749 FoldingSetNodeID ID;
3750 ID.AddInteger(MemVT.getRawBits());
3751 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3752 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3754 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3755 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3756 return SDValue(E, 0);
3758 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3759 Ptr, Cmp, Swp, MMO);
3760 CSEMap.InsertNode(N, IP);
3761 AllNodes.push_back(N);
3762 return SDValue(N, 0);
3765 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3767 SDValue Ptr, SDValue Val,
3768 const Value* PtrVal,
3769 unsigned Alignment) {
3770 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3771 Alignment = getEVTAlignment(MemVT);
3773 MachineFunction &MF = getMachineFunction();
3774 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3776 // For now, atomics are considered to be volatile always.
3777 Flags |= MachineMemOperand::MOVolatile;
3779 MachineMemOperand *MMO =
3780 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3781 MemVT.getStoreSize(), Alignment);
3783 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3786 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3788 SDValue Ptr, SDValue Val,
3789 MachineMemOperand *MMO) {
3790 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3791 Opcode == ISD::ATOMIC_LOAD_SUB ||
3792 Opcode == ISD::ATOMIC_LOAD_AND ||
3793 Opcode == ISD::ATOMIC_LOAD_OR ||
3794 Opcode == ISD::ATOMIC_LOAD_XOR ||
3795 Opcode == ISD::ATOMIC_LOAD_NAND ||
3796 Opcode == ISD::ATOMIC_LOAD_MIN ||
3797 Opcode == ISD::ATOMIC_LOAD_MAX ||
3798 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3799 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3800 Opcode == ISD::ATOMIC_SWAP) &&
3801 "Invalid Atomic Op");
3803 EVT VT = Val.getValueType();
3805 SDVTList VTs = getVTList(VT, MVT::Other);
3806 FoldingSetNodeID ID;
3807 ID.AddInteger(MemVT.getRawBits());
3808 SDValue Ops[] = {Chain, Ptr, Val};
3809 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3811 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3812 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3813 return SDValue(E, 0);
3815 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3817 CSEMap.InsertNode(N, IP);
3818 AllNodes.push_back(N);
3819 return SDValue(N, 0);
3822 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3823 /// Allowed to return something different (and simpler) if Simplify is true.
3824 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3829 SmallVector<EVT, 4> VTs;
3830 VTs.reserve(NumOps);
3831 for (unsigned i = 0; i < NumOps; ++i)
3832 VTs.push_back(Ops[i].getValueType());
3833 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3838 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3839 const EVT *VTs, unsigned NumVTs,
3840 const SDValue *Ops, unsigned NumOps,
3841 EVT MemVT, MachinePointerInfo PtrInfo,
3842 unsigned Align, bool Vol,
3843 bool ReadMem, bool WriteMem) {
3844 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3845 MemVT, PtrInfo, Align, Vol,
3850 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3851 const SDValue *Ops, unsigned NumOps,
3852 EVT MemVT, MachinePointerInfo PtrInfo,
3853 unsigned Align, bool Vol,
3854 bool ReadMem, bool WriteMem) {
3855 if (Align == 0) // Ensure that codegen never sees alignment 0
3856 Align = getEVTAlignment(MemVT);
3858 MachineFunction &MF = getMachineFunction();
3861 Flags |= MachineMemOperand::MOStore;
3863 Flags |= MachineMemOperand::MOLoad;
3865 Flags |= MachineMemOperand::MOVolatile;
3866 MachineMemOperand *MMO =
3867 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3869 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3873 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3874 const SDValue *Ops, unsigned NumOps,
3875 EVT MemVT, MachineMemOperand *MMO) {
3876 assert((Opcode == ISD::INTRINSIC_VOID ||
3877 Opcode == ISD::INTRINSIC_W_CHAIN ||
3878 Opcode == ISD::PREFETCH ||
3879 (Opcode <= INT_MAX &&
3880 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3881 "Opcode is not a memory-accessing opcode!");
3883 // Memoize the node unless it returns a flag.
3884 MemIntrinsicSDNode *N;
3885 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
3886 FoldingSetNodeID ID;
3887 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3889 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3890 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3891 return SDValue(E, 0);
3894 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3896 CSEMap.InsertNode(N, IP);
3898 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3901 AllNodes.push_back(N);
3902 return SDValue(N, 0);
3905 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3906 /// MachinePointerInfo record from it. This is particularly useful because the
3907 /// code generator has many cases where it doesn't bother passing in a
3908 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3909 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3910 // If this is FI+Offset, we can model it.
3911 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3912 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3914 // If this is (FI+Offset1)+Offset2, we can model it.
3915 if (Ptr.getOpcode() != ISD::ADD ||
3916 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3917 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3918 return MachinePointerInfo();
3920 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3921 return MachinePointerInfo::getFixedStack(FI, Offset+
3922 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3925 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3926 /// MachinePointerInfo record from it. This is particularly useful because the
3927 /// code generator has many cases where it doesn't bother passing in a
3928 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3929 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3930 // If the 'Offset' value isn't a constant, we can't handle this.
3931 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3932 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3933 if (OffsetOp.getOpcode() == ISD::UNDEF)
3934 return InferPointerInfo(Ptr);
3935 return MachinePointerInfo();
3940 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3941 EVT VT, DebugLoc dl, SDValue Chain,
3942 SDValue Ptr, SDValue Offset,
3943 MachinePointerInfo PtrInfo, EVT MemVT,
3944 bool isVolatile, bool isNonTemporal,
3945 unsigned Alignment, const MDNode *TBAAInfo) {
3946 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3947 Alignment = getEVTAlignment(VT);
3949 unsigned Flags = MachineMemOperand::MOLoad;
3951 Flags |= MachineMemOperand::MOVolatile;
3953 Flags |= MachineMemOperand::MONonTemporal;
3955 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3958 PtrInfo = InferPointerInfo(Ptr, Offset);
3960 MachineFunction &MF = getMachineFunction();
3961 MachineMemOperand *MMO =
3962 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3964 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3968 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3969 EVT VT, DebugLoc dl, SDValue Chain,
3970 SDValue Ptr, SDValue Offset, EVT MemVT,
3971 MachineMemOperand *MMO) {
3973 ExtType = ISD::NON_EXTLOAD;
3974 } else if (ExtType == ISD::NON_EXTLOAD) {
3975 assert(VT == MemVT && "Non-extending load from different memory type!");
3978 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3979 "Should only be an extending load, not truncating!");
3980 assert(VT.isInteger() == MemVT.isInteger() &&
3981 "Cannot convert from FP to Int or Int -> FP!");
3982 assert(VT.isVector() == MemVT.isVector() &&
3983 "Cannot use trunc store to convert to or from a vector!");
3984 assert((!VT.isVector() ||
3985 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3986 "Cannot use trunc store to change the number of vector elements!");
3989 bool Indexed = AM != ISD::UNINDEXED;
3990 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3991 "Unindexed load with an offset!");
3993 SDVTList VTs = Indexed ?
3994 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3995 SDValue Ops[] = { Chain, Ptr, Offset };
3996 FoldingSetNodeID ID;
3997 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3998 ID.AddInteger(MemVT.getRawBits());
3999 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4000 MMO->isNonTemporal()));
4002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4003 cast<LoadSDNode>(E)->refineAlignment(MMO);
4004 return SDValue(E, 0);
4006 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4008 CSEMap.InsertNode(N, IP);
4009 AllNodes.push_back(N);
4010 return SDValue(N, 0);
4013 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4014 SDValue Chain, SDValue Ptr,
4015 MachinePointerInfo PtrInfo,
4016 bool isVolatile, bool isNonTemporal,
4017 unsigned Alignment, const MDNode *TBAAInfo) {
4018 SDValue Undef = getUNDEF(Ptr.getValueType());
4019 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4020 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4023 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
4024 SDValue Chain, SDValue Ptr,
4025 MachinePointerInfo PtrInfo, EVT MemVT,
4026 bool isVolatile, bool isNonTemporal,
4027 unsigned Alignment, const MDNode *TBAAInfo) {
4028 SDValue Undef = getUNDEF(Ptr.getValueType());
4029 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4030 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4036 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4037 SDValue Offset, ISD::MemIndexedMode AM) {
4038 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4039 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4040 "Load is already a indexed load!");
4041 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4042 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4044 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4047 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4048 SDValue Ptr, MachinePointerInfo PtrInfo,
4049 bool isVolatile, bool isNonTemporal,
4050 unsigned Alignment, const MDNode *TBAAInfo) {
4051 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4052 Alignment = getEVTAlignment(Val.getValueType());
4054 unsigned Flags = MachineMemOperand::MOStore;
4056 Flags |= MachineMemOperand::MOVolatile;
4058 Flags |= MachineMemOperand::MONonTemporal;
4061 PtrInfo = InferPointerInfo(Ptr);
4063 MachineFunction &MF = getMachineFunction();
4064 MachineMemOperand *MMO =
4065 MF.getMachineMemOperand(PtrInfo, Flags,
4066 Val.getValueType().getStoreSize(), Alignment,
4069 return getStore(Chain, dl, Val, Ptr, MMO);
4072 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4073 SDValue Ptr, MachineMemOperand *MMO) {
4074 EVT VT = Val.getValueType();
4075 SDVTList VTs = getVTList(MVT::Other);
4076 SDValue Undef = getUNDEF(Ptr.getValueType());
4077 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4078 FoldingSetNodeID ID;
4079 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4080 ID.AddInteger(VT.getRawBits());
4081 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4082 MMO->isNonTemporal()));
4084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4085 cast<StoreSDNode>(E)->refineAlignment(MMO);
4086 return SDValue(E, 0);
4088 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4090 CSEMap.InsertNode(N, IP);
4091 AllNodes.push_back(N);
4092 return SDValue(N, 0);
4095 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4096 SDValue Ptr, MachinePointerInfo PtrInfo,
4097 EVT SVT,bool isVolatile, bool isNonTemporal,
4099 const MDNode *TBAAInfo) {
4100 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4101 Alignment = getEVTAlignment(SVT);
4103 unsigned Flags = MachineMemOperand::MOStore;
4105 Flags |= MachineMemOperand::MOVolatile;
4107 Flags |= MachineMemOperand::MONonTemporal;
4110 PtrInfo = InferPointerInfo(Ptr);
4112 MachineFunction &MF = getMachineFunction();
4113 MachineMemOperand *MMO =
4114 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4117 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4120 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4121 SDValue Ptr, EVT SVT,
4122 MachineMemOperand *MMO) {
4123 EVT VT = Val.getValueType();
4126 return getStore(Chain, dl, Val, Ptr, MMO);
4128 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4129 "Should only be a truncating store, not extending!");
4130 assert(VT.isInteger() == SVT.isInteger() &&
4131 "Can't do FP-INT conversion!");
4132 assert(VT.isVector() == SVT.isVector() &&
4133 "Cannot use trunc store to convert to or from a vector!");
4134 assert((!VT.isVector() ||
4135 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4136 "Cannot use trunc store to change the number of vector elements!");
4138 SDVTList VTs = getVTList(MVT::Other);
4139 SDValue Undef = getUNDEF(Ptr.getValueType());
4140 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4141 FoldingSetNodeID ID;
4142 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4143 ID.AddInteger(SVT.getRawBits());
4144 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4145 MMO->isNonTemporal()));
4147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4148 cast<StoreSDNode>(E)->refineAlignment(MMO);
4149 return SDValue(E, 0);
4151 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4153 CSEMap.InsertNode(N, IP);
4154 AllNodes.push_back(N);
4155 return SDValue(N, 0);
4159 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4160 SDValue Offset, ISD::MemIndexedMode AM) {
4161 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4162 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4163 "Store is already a indexed store!");
4164 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4165 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4166 FoldingSetNodeID ID;
4167 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4168 ID.AddInteger(ST->getMemoryVT().getRawBits());
4169 ID.AddInteger(ST->getRawSubclassData());
4171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4172 return SDValue(E, 0);
4174 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4175 ST->isTruncatingStore(),
4177 ST->getMemOperand());
4178 CSEMap.InsertNode(N, IP);
4179 AllNodes.push_back(N);
4180 return SDValue(N, 0);
4183 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4184 SDValue Chain, SDValue Ptr,
4187 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4188 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4191 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4192 const SDUse *Ops, unsigned NumOps) {
4194 case 0: return getNode(Opcode, DL, VT);
4195 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4196 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4197 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4201 // Copy from an SDUse array into an SDValue array for use with
4202 // the regular getNode logic.
4203 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4204 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4207 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4208 const SDValue *Ops, unsigned NumOps) {
4210 case 0: return getNode(Opcode, DL, VT);
4211 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4212 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4213 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4219 case ISD::SELECT_CC: {
4220 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4221 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4222 "LHS and RHS of condition must have same type!");
4223 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4224 "True and False arms of SelectCC must have same type!");
4225 assert(Ops[2].getValueType() == VT &&
4226 "select_cc node must be of same type as true and false value!");
4230 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4231 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4232 "LHS/RHS of comparison should match types!");
4239 SDVTList VTs = getVTList(VT);
4241 if (VT != MVT::Glue) {
4242 FoldingSetNodeID ID;
4243 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4247 return SDValue(E, 0);
4249 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4250 CSEMap.InsertNode(N, IP);
4252 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4255 AllNodes.push_back(N);
4259 return SDValue(N, 0);
4262 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4263 const std::vector<EVT> &ResultTys,
4264 const SDValue *Ops, unsigned NumOps) {
4265 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4269 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4270 const EVT *VTs, unsigned NumVTs,
4271 const SDValue *Ops, unsigned NumOps) {
4273 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4274 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4277 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4278 const SDValue *Ops, unsigned NumOps) {
4279 if (VTList.NumVTs == 1)
4280 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4284 // FIXME: figure out how to safely handle things like
4285 // int foo(int x) { return 1 << (x & 255); }
4286 // int bar() { return foo(256); }
4287 case ISD::SRA_PARTS:
4288 case ISD::SRL_PARTS:
4289 case ISD::SHL_PARTS:
4290 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4291 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4292 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4293 else if (N3.getOpcode() == ISD::AND)
4294 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4295 // If the and is only masking out bits that cannot effect the shift,
4296 // eliminate the and.
4297 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4298 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4299 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4305 // Memoize the node unless it returns a flag.
4307 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4308 FoldingSetNodeID ID;
4309 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4312 return SDValue(E, 0);
4315 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4316 } else if (NumOps == 2) {
4317 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4318 } else if (NumOps == 3) {
4319 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4322 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4324 CSEMap.InsertNode(N, IP);
4327 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4328 } else if (NumOps == 2) {
4329 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4330 } else if (NumOps == 3) {
4331 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4334 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4337 AllNodes.push_back(N);
4341 return SDValue(N, 0);
4344 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4345 return getNode(Opcode, DL, VTList, 0, 0);
4348 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4350 SDValue Ops[] = { N1 };
4351 return getNode(Opcode, DL, VTList, Ops, 1);
4354 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4355 SDValue N1, SDValue N2) {
4356 SDValue Ops[] = { N1, N2 };
4357 return getNode(Opcode, DL, VTList, Ops, 2);
4360 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4361 SDValue N1, SDValue N2, SDValue N3) {
4362 SDValue Ops[] = { N1, N2, N3 };
4363 return getNode(Opcode, DL, VTList, Ops, 3);
4366 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4367 SDValue N1, SDValue N2, SDValue N3,
4369 SDValue Ops[] = { N1, N2, N3, N4 };
4370 return getNode(Opcode, DL, VTList, Ops, 4);
4373 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4374 SDValue N1, SDValue N2, SDValue N3,
4375 SDValue N4, SDValue N5) {
4376 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4377 return getNode(Opcode, DL, VTList, Ops, 5);
4380 SDVTList SelectionDAG::getVTList(EVT VT) {
4381 return makeVTList(SDNode::getValueTypeList(VT), 1);
4384 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4385 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4386 E = VTList.rend(); I != E; ++I)
4387 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4390 EVT *Array = Allocator.Allocate<EVT>(2);
4393 SDVTList Result = makeVTList(Array, 2);
4394 VTList.push_back(Result);
4398 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4399 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4400 E = VTList.rend(); I != E; ++I)
4401 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4405 EVT *Array = Allocator.Allocate<EVT>(3);
4409 SDVTList Result = makeVTList(Array, 3);
4410 VTList.push_back(Result);
4414 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4415 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4416 E = VTList.rend(); I != E; ++I)
4417 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4418 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4421 EVT *Array = Allocator.Allocate<EVT>(4);
4426 SDVTList Result = makeVTList(Array, 4);
4427 VTList.push_back(Result);
4431 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4433 case 0: llvm_unreachable("Cannot have nodes without results!");
4434 case 1: return getVTList(VTs[0]);
4435 case 2: return getVTList(VTs[0], VTs[1]);
4436 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4437 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4441 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4442 E = VTList.rend(); I != E; ++I) {
4443 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4446 bool NoMatch = false;
4447 for (unsigned i = 2; i != NumVTs; ++i)
4448 if (VTs[i] != I->VTs[i]) {
4456 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4457 std::copy(VTs, VTs+NumVTs, Array);
4458 SDVTList Result = makeVTList(Array, NumVTs);
4459 VTList.push_back(Result);
4464 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4465 /// specified operands. If the resultant node already exists in the DAG,
4466 /// this does not modify the specified node, instead it returns the node that
4467 /// already exists. If the resultant node does not exist in the DAG, the
4468 /// input node is returned. As a degenerate case, if you specify the same
4469 /// input operands as the node already has, the input node is returned.
4470 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4471 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4473 // Check to see if there is no change.
4474 if (Op == N->getOperand(0)) return N;
4476 // See if the modified node already exists.
4477 void *InsertPos = 0;
4478 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4481 // Nope it doesn't. Remove the node from its current place in the maps.
4483 if (!RemoveNodeFromCSEMaps(N))
4486 // Now we update the operands.
4487 N->OperandList[0].set(Op);
4489 // If this gets put into a CSE map, add it.
4490 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4494 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4495 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4497 // Check to see if there is no change.
4498 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4499 return N; // No operands changed, just return the input node.
4501 // See if the modified node already exists.
4502 void *InsertPos = 0;
4503 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4506 // Nope it doesn't. Remove the node from its current place in the maps.
4508 if (!RemoveNodeFromCSEMaps(N))
4511 // Now we update the operands.
4512 if (N->OperandList[0] != Op1)
4513 N->OperandList[0].set(Op1);
4514 if (N->OperandList[1] != Op2)
4515 N->OperandList[1].set(Op2);
4517 // If this gets put into a CSE map, add it.
4518 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4522 SDNode *SelectionDAG::
4523 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4524 SDValue Ops[] = { Op1, Op2, Op3 };
4525 return UpdateNodeOperands(N, Ops, 3);
4528 SDNode *SelectionDAG::
4529 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4530 SDValue Op3, SDValue Op4) {
4531 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4532 return UpdateNodeOperands(N, Ops, 4);
4535 SDNode *SelectionDAG::
4536 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4537 SDValue Op3, SDValue Op4, SDValue Op5) {
4538 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4539 return UpdateNodeOperands(N, Ops, 5);
4542 SDNode *SelectionDAG::
4543 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4544 assert(N->getNumOperands() == NumOps &&
4545 "Update with wrong number of operands");
4547 // Check to see if there is no change.
4548 bool AnyChange = false;
4549 for (unsigned i = 0; i != NumOps; ++i) {
4550 if (Ops[i] != N->getOperand(i)) {
4556 // No operands changed, just return the input node.
4557 if (!AnyChange) return N;
4559 // See if the modified node already exists.
4560 void *InsertPos = 0;
4561 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4564 // Nope it doesn't. Remove the node from its current place in the maps.
4566 if (!RemoveNodeFromCSEMaps(N))
4569 // Now we update the operands.
4570 for (unsigned i = 0; i != NumOps; ++i)
4571 if (N->OperandList[i] != Ops[i])
4572 N->OperandList[i].set(Ops[i]);
4574 // If this gets put into a CSE map, add it.
4575 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4579 /// DropOperands - Release the operands and set this node to have
4581 void SDNode::DropOperands() {
4582 // Unlike the code in MorphNodeTo that does this, we don't need to
4583 // watch for dead nodes here.
4584 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4590 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4593 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 SDVTList VTs = getVTList(VT);
4596 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4599 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4600 EVT VT, SDValue Op1) {
4601 SDVTList VTs = getVTList(VT);
4602 SDValue Ops[] = { Op1 };
4603 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4606 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4607 EVT VT, SDValue Op1,
4609 SDVTList VTs = getVTList(VT);
4610 SDValue Ops[] = { Op1, Op2 };
4611 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4614 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4615 EVT VT, SDValue Op1,
4616 SDValue Op2, SDValue Op3) {
4617 SDVTList VTs = getVTList(VT);
4618 SDValue Ops[] = { Op1, Op2, Op3 };
4619 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4622 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4623 EVT VT, const SDValue *Ops,
4625 SDVTList VTs = getVTList(VT);
4626 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4630 EVT VT1, EVT VT2, const SDValue *Ops,
4632 SDVTList VTs = getVTList(VT1, VT2);
4633 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4636 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4638 SDVTList VTs = getVTList(VT1, VT2);
4639 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4642 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4643 EVT VT1, EVT VT2, EVT VT3,
4644 const SDValue *Ops, unsigned NumOps) {
4645 SDVTList VTs = getVTList(VT1, VT2, VT3);
4646 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4649 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4650 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4651 const SDValue *Ops, unsigned NumOps) {
4652 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4653 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4656 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4659 SDVTList VTs = getVTList(VT1, VT2);
4660 SDValue Ops[] = { Op1 };
4661 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4664 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4666 SDValue Op1, SDValue Op2) {
4667 SDVTList VTs = getVTList(VT1, VT2);
4668 SDValue Ops[] = { Op1, Op2 };
4669 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4672 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4674 SDValue Op1, SDValue Op2,
4676 SDVTList VTs = getVTList(VT1, VT2);
4677 SDValue Ops[] = { Op1, Op2, Op3 };
4678 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4681 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4682 EVT VT1, EVT VT2, EVT VT3,
4683 SDValue Op1, SDValue Op2,
4685 SDVTList VTs = getVTList(VT1, VT2, VT3);
4686 SDValue Ops[] = { Op1, Op2, Op3 };
4687 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4690 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4691 SDVTList VTs, const SDValue *Ops,
4693 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4694 // Reset the NodeID to -1.
4699 /// MorphNodeTo - This *mutates* the specified node to have the specified
4700 /// return type, opcode, and operands.
4702 /// Note that MorphNodeTo returns the resultant node. If there is already a
4703 /// node of the specified opcode and operands, it returns that node instead of
4704 /// the current one. Note that the DebugLoc need not be the same.
4706 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4707 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4708 /// node, and because it doesn't require CSE recalculation for any of
4709 /// the node's users.
4711 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4712 SDVTList VTs, const SDValue *Ops,
4714 // If an identical node already exists, use it.
4716 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4717 FoldingSetNodeID ID;
4718 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4719 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4723 if (!RemoveNodeFromCSEMaps(N))
4726 // Start the morphing.
4728 N->ValueList = VTs.VTs;
4729 N->NumValues = VTs.NumVTs;
4731 // Clear the operands list, updating used nodes to remove this from their
4732 // use list. Keep track of any operands that become dead as a result.
4733 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4734 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4736 SDNode *Used = Use.getNode();
4738 if (Used->use_empty())
4739 DeadNodeSet.insert(Used);
4742 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4743 // Initialize the memory references information.
4744 MN->setMemRefs(0, 0);
4745 // If NumOps is larger than the # of operands we can have in a
4746 // MachineSDNode, reallocate the operand list.
4747 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4748 if (MN->OperandsNeedDelete)
4749 delete[] MN->OperandList;
4750 if (NumOps > array_lengthof(MN->LocalOperands))
4751 // We're creating a final node that will live unmorphed for the
4752 // remainder of the current SelectionDAG iteration, so we can allocate
4753 // the operands directly out of a pool with no recycling metadata.
4754 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4757 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4758 MN->OperandsNeedDelete = false;
4760 MN->InitOperands(MN->OperandList, Ops, NumOps);
4762 // If NumOps is larger than the # of operands we currently have, reallocate
4763 // the operand list.
4764 if (NumOps > N->NumOperands) {
4765 if (N->OperandsNeedDelete)
4766 delete[] N->OperandList;
4767 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4768 N->OperandsNeedDelete = true;
4770 N->InitOperands(N->OperandList, Ops, NumOps);
4773 // Delete any nodes that are still dead after adding the uses for the
4775 if (!DeadNodeSet.empty()) {
4776 SmallVector<SDNode *, 16> DeadNodes;
4777 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4778 E = DeadNodeSet.end(); I != E; ++I)
4779 if ((*I)->use_empty())
4780 DeadNodes.push_back(*I);
4781 RemoveDeadNodes(DeadNodes);
4785 CSEMap.InsertNode(N, IP); // Memoize the new node.
4790 /// getMachineNode - These are used for target selectors to create a new node
4791 /// with specified return type(s), MachineInstr opcode, and operands.
4793 /// Note that getMachineNode returns the resultant node. If there is already a
4794 /// node of the specified opcode and operands, it returns that node instead of
4795 /// the current one.
4797 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4798 SDVTList VTs = getVTList(VT);
4799 return getMachineNode(Opcode, dl, VTs, 0, 0);
4803 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4804 SDVTList VTs = getVTList(VT);
4805 SDValue Ops[] = { Op1 };
4806 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4810 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4811 SDValue Op1, SDValue Op2) {
4812 SDVTList VTs = getVTList(VT);
4813 SDValue Ops[] = { Op1, Op2 };
4814 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4818 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4819 SDValue Op1, SDValue Op2, SDValue Op3) {
4820 SDVTList VTs = getVTList(VT);
4821 SDValue Ops[] = { Op1, Op2, Op3 };
4822 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4826 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4827 const SDValue *Ops, unsigned NumOps) {
4828 SDVTList VTs = getVTList(VT);
4829 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4833 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4834 SDVTList VTs = getVTList(VT1, VT2);
4835 return getMachineNode(Opcode, dl, VTs, 0, 0);
4839 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4840 EVT VT1, EVT VT2, SDValue Op1) {
4841 SDVTList VTs = getVTList(VT1, VT2);
4842 SDValue Ops[] = { Op1 };
4843 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4847 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4848 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4849 SDVTList VTs = getVTList(VT1, VT2);
4850 SDValue Ops[] = { Op1, Op2 };
4851 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4855 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4856 EVT VT1, EVT VT2, SDValue Op1,
4857 SDValue Op2, SDValue Op3) {
4858 SDVTList VTs = getVTList(VT1, VT2);
4859 SDValue Ops[] = { Op1, Op2, Op3 };
4860 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4864 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4866 const SDValue *Ops, unsigned NumOps) {
4867 SDVTList VTs = getVTList(VT1, VT2);
4868 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4872 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4873 EVT VT1, EVT VT2, EVT VT3,
4874 SDValue Op1, SDValue Op2) {
4875 SDVTList VTs = getVTList(VT1, VT2, VT3);
4876 SDValue Ops[] = { Op1, Op2 };
4877 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4881 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4882 EVT VT1, EVT VT2, EVT VT3,
4883 SDValue Op1, SDValue Op2, SDValue Op3) {
4884 SDVTList VTs = getVTList(VT1, VT2, VT3);
4885 SDValue Ops[] = { Op1, Op2, Op3 };
4886 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4890 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4891 EVT VT1, EVT VT2, EVT VT3,
4892 const SDValue *Ops, unsigned NumOps) {
4893 SDVTList VTs = getVTList(VT1, VT2, VT3);
4894 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4898 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4899 EVT VT2, EVT VT3, EVT VT4,
4900 const SDValue *Ops, unsigned NumOps) {
4901 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4902 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4906 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4907 const std::vector<EVT> &ResultTys,
4908 const SDValue *Ops, unsigned NumOps) {
4909 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4910 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4914 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4915 const SDValue *Ops, unsigned NumOps) {
4916 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
4921 FoldingSetNodeID ID;
4922 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4924 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4925 return cast<MachineSDNode>(E);
4928 // Allocate a new MachineSDNode.
4929 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4931 // Initialize the operands list.
4932 if (NumOps > array_lengthof(N->LocalOperands))
4933 // We're creating a final node that will live unmorphed for the
4934 // remainder of the current SelectionDAG iteration, so we can allocate
4935 // the operands directly out of a pool with no recycling metadata.
4936 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4939 N->InitOperands(N->LocalOperands, Ops, NumOps);
4940 N->OperandsNeedDelete = false;
4943 CSEMap.InsertNode(N, IP);
4945 AllNodes.push_back(N);
4947 VerifyMachineNode(N);
4952 /// getTargetExtractSubreg - A convenience function for creating
4953 /// TargetOpcode::EXTRACT_SUBREG nodes.
4955 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4957 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4958 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4959 VT, Operand, SRIdxVal);
4960 return SDValue(Subreg, 0);
4963 /// getTargetInsertSubreg - A convenience function for creating
4964 /// TargetOpcode::INSERT_SUBREG nodes.
4966 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4967 SDValue Operand, SDValue Subreg) {
4968 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4969 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4970 VT, Operand, Subreg, SRIdxVal);
4971 return SDValue(Result, 0);
4974 /// getNodeIfExists - Get the specified node if it's already available, or
4975 /// else return NULL.
4976 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4977 const SDValue *Ops, unsigned NumOps) {
4978 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4979 FoldingSetNodeID ID;
4980 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4982 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4988 /// getDbgValue - Creates a SDDbgValue node.
4991 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4992 DebugLoc DL, unsigned O) {
4993 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4997 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4998 DebugLoc DL, unsigned O) {
4999 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5003 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5004 DebugLoc DL, unsigned O) {
5005 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5010 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5011 /// pointed to by a use iterator is deleted, increment the use iterator
5012 /// so that it doesn't dangle.
5014 /// This class also manages a "downlink" DAGUpdateListener, to forward
5015 /// messages to ReplaceAllUsesWith's callers.
5017 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5018 SelectionDAG::DAGUpdateListener *DownLink;
5019 SDNode::use_iterator &UI;
5020 SDNode::use_iterator &UE;
5022 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5023 // Increment the iterator as needed.
5024 while (UI != UE && N == *UI)
5027 // Then forward the message.
5028 if (DownLink) DownLink->NodeDeleted(N, E);
5031 virtual void NodeUpdated(SDNode *N) {
5032 // Just forward the message.
5033 if (DownLink) DownLink->NodeUpdated(N);
5037 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5038 SDNode::use_iterator &ui,
5039 SDNode::use_iterator &ue)
5040 : DownLink(dl), UI(ui), UE(ue) {}
5045 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5046 /// This can cause recursive merging of nodes in the DAG.
5048 /// This version assumes From has a single result value.
5050 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5051 DAGUpdateListener *UpdateListener) {
5052 SDNode *From = FromN.getNode();
5053 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5054 "Cannot replace with this method!");
5055 assert(From != To.getNode() && "Cannot replace uses of with self");
5057 // Iterate over all the existing uses of From. New uses will be added
5058 // to the beginning of the use list, which we avoid visiting.
5059 // This specifically avoids visiting uses of From that arise while the
5060 // replacement is happening, because any such uses would be the result
5061 // of CSE: If an existing node looks like From after one of its operands
5062 // is replaced by To, we don't want to replace of all its users with To
5063 // too. See PR3018 for more info.
5064 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5065 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5069 // This node is about to morph, remove its old self from the CSE maps.
5070 RemoveNodeFromCSEMaps(User);
5072 // A user can appear in a use list multiple times, and when this
5073 // happens the uses are usually next to each other in the list.
5074 // To help reduce the number of CSE recomputations, process all
5075 // the uses of this user that we can find this way.
5077 SDUse &Use = UI.getUse();
5080 } while (UI != UE && *UI == User);
5082 // Now that we have modified User, add it back to the CSE maps. If it
5083 // already exists there, recursively merge the results together.
5084 AddModifiedNodeToCSEMaps(User, &Listener);
5088 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5089 /// This can cause recursive merging of nodes in the DAG.
5091 /// This version assumes that for each value of From, there is a
5092 /// corresponding value in To in the same position with the same type.
5094 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5095 DAGUpdateListener *UpdateListener) {
5097 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5098 assert((!From->hasAnyUseOfValue(i) ||
5099 From->getValueType(i) == To->getValueType(i)) &&
5100 "Cannot use this version of ReplaceAllUsesWith!");
5103 // Handle the trivial case.
5107 // Iterate over just the existing users of From. See the comments in
5108 // the ReplaceAllUsesWith above.
5109 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5110 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5114 // This node is about to morph, remove its old self from the CSE maps.
5115 RemoveNodeFromCSEMaps(User);
5117 // A user can appear in a use list multiple times, and when this
5118 // happens the uses are usually next to each other in the list.
5119 // To help reduce the number of CSE recomputations, process all
5120 // the uses of this user that we can find this way.
5122 SDUse &Use = UI.getUse();
5125 } while (UI != UE && *UI == User);
5127 // Now that we have modified User, add it back to the CSE maps. If it
5128 // already exists there, recursively merge the results together.
5129 AddModifiedNodeToCSEMaps(User, &Listener);
5133 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5134 /// This can cause recursive merging of nodes in the DAG.
5136 /// This version can replace From with any result values. To must match the
5137 /// number and types of values returned by From.
5138 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5140 DAGUpdateListener *UpdateListener) {
5141 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5142 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5144 // Iterate over just the existing users of From. See the comments in
5145 // the ReplaceAllUsesWith above.
5146 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5147 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5151 // This node is about to morph, remove its old self from the CSE maps.
5152 RemoveNodeFromCSEMaps(User);
5154 // A user can appear in a use list multiple times, and when this
5155 // happens the uses are usually next to each other in the list.
5156 // To help reduce the number of CSE recomputations, process all
5157 // the uses of this user that we can find this way.
5159 SDUse &Use = UI.getUse();
5160 const SDValue &ToOp = To[Use.getResNo()];
5163 } while (UI != UE && *UI == User);
5165 // Now that we have modified User, add it back to the CSE maps. If it
5166 // already exists there, recursively merge the results together.
5167 AddModifiedNodeToCSEMaps(User, &Listener);
5171 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5172 /// uses of other values produced by From.getNode() alone. The Deleted
5173 /// vector is handled the same way as for ReplaceAllUsesWith.
5174 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5175 DAGUpdateListener *UpdateListener){
5176 // Handle the really simple, really trivial case efficiently.
5177 if (From == To) return;
5179 // Handle the simple, trivial, case efficiently.
5180 if (From.getNode()->getNumValues() == 1) {
5181 ReplaceAllUsesWith(From, To, UpdateListener);
5185 // Iterate over just the existing users of From. See the comments in
5186 // the ReplaceAllUsesWith above.
5187 SDNode::use_iterator UI = From.getNode()->use_begin(),
5188 UE = From.getNode()->use_end();
5189 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5192 bool UserRemovedFromCSEMaps = false;
5194 // A user can appear in a use list multiple times, and when this
5195 // happens the uses are usually next to each other in the list.
5196 // To help reduce the number of CSE recomputations, process all
5197 // the uses of this user that we can find this way.
5199 SDUse &Use = UI.getUse();
5201 // Skip uses of different values from the same node.
5202 if (Use.getResNo() != From.getResNo()) {
5207 // If this node hasn't been modified yet, it's still in the CSE maps,
5208 // so remove its old self from the CSE maps.
5209 if (!UserRemovedFromCSEMaps) {
5210 RemoveNodeFromCSEMaps(User);
5211 UserRemovedFromCSEMaps = true;
5216 } while (UI != UE && *UI == User);
5218 // We are iterating over all uses of the From node, so if a use
5219 // doesn't use the specific value, no changes are made.
5220 if (!UserRemovedFromCSEMaps)
5223 // Now that we have modified User, add it back to the CSE maps. If it
5224 // already exists there, recursively merge the results together.
5225 AddModifiedNodeToCSEMaps(User, &Listener);
5230 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5231 /// to record information about a use.
5238 /// operator< - Sort Memos by User.
5239 bool operator<(const UseMemo &L, const UseMemo &R) {
5240 return (intptr_t)L.User < (intptr_t)R.User;
5244 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5245 /// uses of other values produced by From.getNode() alone. The same value
5246 /// may appear in both the From and To list. The Deleted vector is
5247 /// handled the same way as for ReplaceAllUsesWith.
5248 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5251 DAGUpdateListener *UpdateListener){
5252 // Handle the simple, trivial case efficiently.
5254 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5256 // Read up all the uses and make records of them. This helps
5257 // processing new uses that are introduced during the
5258 // replacement process.
5259 SmallVector<UseMemo, 4> Uses;
5260 for (unsigned i = 0; i != Num; ++i) {
5261 unsigned FromResNo = From[i].getResNo();
5262 SDNode *FromNode = From[i].getNode();
5263 for (SDNode::use_iterator UI = FromNode->use_begin(),
5264 E = FromNode->use_end(); UI != E; ++UI) {
5265 SDUse &Use = UI.getUse();
5266 if (Use.getResNo() == FromResNo) {
5267 UseMemo Memo = { *UI, i, &Use };
5268 Uses.push_back(Memo);
5273 // Sort the uses, so that all the uses from a given User are together.
5274 std::sort(Uses.begin(), Uses.end());
5276 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5277 UseIndex != UseIndexEnd; ) {
5278 // We know that this user uses some value of From. If it is the right
5279 // value, update it.
5280 SDNode *User = Uses[UseIndex].User;
5282 // This node is about to morph, remove its old self from the CSE maps.
5283 RemoveNodeFromCSEMaps(User);
5285 // The Uses array is sorted, so all the uses for a given User
5286 // are next to each other in the list.
5287 // To help reduce the number of CSE recomputations, process all
5288 // the uses of this user that we can find this way.
5290 unsigned i = Uses[UseIndex].Index;
5291 SDUse &Use = *Uses[UseIndex].Use;
5295 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5297 // Now that we have modified User, add it back to the CSE maps. If it
5298 // already exists there, recursively merge the results together.
5299 AddModifiedNodeToCSEMaps(User, UpdateListener);
5303 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5304 /// based on their topological order. It returns the maximum id and a vector
5305 /// of the SDNodes* in assigned order by reference.
5306 unsigned SelectionDAG::AssignTopologicalOrder() {
5308 unsigned DAGSize = 0;
5310 // SortedPos tracks the progress of the algorithm. Nodes before it are
5311 // sorted, nodes after it are unsorted. When the algorithm completes
5312 // it is at the end of the list.
5313 allnodes_iterator SortedPos = allnodes_begin();
5315 // Visit all the nodes. Move nodes with no operands to the front of
5316 // the list immediately. Annotate nodes that do have operands with their
5317 // operand count. Before we do this, the Node Id fields of the nodes
5318 // may contain arbitrary values. After, the Node Id fields for nodes
5319 // before SortedPos will contain the topological sort index, and the
5320 // Node Id fields for nodes At SortedPos and after will contain the
5321 // count of outstanding operands.
5322 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5325 unsigned Degree = N->getNumOperands();
5327 // A node with no uses, add it to the result array immediately.
5328 N->setNodeId(DAGSize++);
5329 allnodes_iterator Q = N;
5331 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5332 assert(SortedPos != AllNodes.end() && "Overran node list");
5335 // Temporarily use the Node Id as scratch space for the degree count.
5336 N->setNodeId(Degree);
5340 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5341 // such that by the time the end is reached all nodes will be sorted.
5342 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5345 // N is in sorted position, so all its uses have one less operand
5346 // that needs to be sorted.
5347 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5350 unsigned Degree = P->getNodeId();
5351 assert(Degree != 0 && "Invalid node degree");
5354 // All of P's operands are sorted, so P may sorted now.
5355 P->setNodeId(DAGSize++);
5357 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5358 assert(SortedPos != AllNodes.end() && "Overran node list");
5361 // Update P's outstanding operand count.
5362 P->setNodeId(Degree);
5365 if (I == SortedPos) {
5368 dbgs() << "Overran sorted position:\n";
5371 llvm_unreachable(0);
5375 assert(SortedPos == AllNodes.end() &&
5376 "Topological sort incomplete!");
5377 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5378 "First node in topological sort is not the entry token!");
5379 assert(AllNodes.front().getNodeId() == 0 &&
5380 "First node in topological sort has non-zero id!");
5381 assert(AllNodes.front().getNumOperands() == 0 &&
5382 "First node in topological sort has operands!");
5383 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5384 "Last node in topologic sort has unexpected id!");
5385 assert(AllNodes.back().use_empty() &&
5386 "Last node in topologic sort has users!");
5387 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5391 /// AssignOrdering - Assign an order to the SDNode.
5392 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5393 assert(SD && "Trying to assign an order to a null node!");
5394 Ordering->add(SD, Order);
5397 /// GetOrdering - Get the order for the SDNode.
5398 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5399 assert(SD && "Trying to get the order of a null node!");
5400 return Ordering->getOrder(SD);
5403 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5404 /// value is produced by SD.
5405 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5406 DbgInfo->add(DB, SD, isParameter);
5408 SD->setHasDebugValue(true);
5411 //===----------------------------------------------------------------------===//
5413 //===----------------------------------------------------------------------===//
5415 HandleSDNode::~HandleSDNode() {
5419 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5420 const GlobalValue *GA,
5421 EVT VT, int64_t o, unsigned char TF)
5422 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5426 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5427 MachineMemOperand *mmo)
5428 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5429 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5430 MMO->isNonTemporal());
5431 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5432 assert(isNonTemporal() == MMO->isNonTemporal() &&
5433 "Non-temporal encoding error!");
5434 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5437 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5438 const SDValue *Ops, unsigned NumOps, EVT memvt,
5439 MachineMemOperand *mmo)
5440 : SDNode(Opc, dl, VTs, Ops, NumOps),
5441 MemoryVT(memvt), MMO(mmo) {
5442 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5443 MMO->isNonTemporal());
5444 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5445 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5448 /// Profile - Gather unique data for the node.
5450 void SDNode::Profile(FoldingSetNodeID &ID) const {
5451 AddNodeIDNode(ID, this);
5456 std::vector<EVT> VTs;
5459 VTs.reserve(MVT::LAST_VALUETYPE);
5460 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5461 VTs.push_back(MVT((MVT::SimpleValueType)i));
5466 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5467 static ManagedStatic<EVTArray> SimpleVTArray;
5468 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5470 /// getValueTypeList - Return a pointer to the specified value type.
5472 const EVT *SDNode::getValueTypeList(EVT VT) {
5473 if (VT.isExtended()) {
5474 sys::SmartScopedLock<true> Lock(*VTMutex);
5475 return &(*EVTs->insert(VT).first);
5477 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5478 "Value type out of range!");
5479 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5483 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5484 /// indicated value. This method ignores uses of other values defined by this
5486 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5487 assert(Value < getNumValues() && "Bad value!");
5489 // TODO: Only iterate over uses of a given value of the node
5490 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5491 if (UI.getUse().getResNo() == Value) {
5498 // Found exactly the right number of uses?
5503 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5504 /// value. This method ignores uses of other values defined by this operation.
5505 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5506 assert(Value < getNumValues() && "Bad value!");
5508 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5509 if (UI.getUse().getResNo() == Value)
5516 /// isOnlyUserOf - Return true if this node is the only use of N.
5518 bool SDNode::isOnlyUserOf(SDNode *N) const {
5520 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5531 /// isOperand - Return true if this node is an operand of N.
5533 bool SDValue::isOperandOf(SDNode *N) const {
5534 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5535 if (*this == N->getOperand(i))
5540 bool SDNode::isOperandOf(SDNode *N) const {
5541 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5542 if (this == N->OperandList[i].getNode())
5547 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5548 /// be a chain) reaches the specified operand without crossing any
5549 /// side-effecting instructions on any chain path. In practice, this looks
5550 /// through token factors and non-volatile loads. In order to remain efficient,
5551 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5552 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5553 unsigned Depth) const {
5554 if (*this == Dest) return true;
5556 // Don't search too deeply, we just want to be able to see through
5557 // TokenFactor's etc.
5558 if (Depth == 0) return false;
5560 // If this is a token factor, all inputs to the TF happen in parallel. If any
5561 // of the operands of the TF does not reach dest, then we cannot do the xform.
5562 if (getOpcode() == ISD::TokenFactor) {
5563 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5564 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5569 // Loads don't have side effects, look through them.
5570 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5571 if (!Ld->isVolatile())
5572 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5577 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5578 /// is either an operand of N or it can be reached by traversing up the operands.
5579 /// NOTE: this is an expensive method. Use it carefully.
5580 bool SDNode::isPredecessorOf(SDNode *N) const {
5581 SmallPtrSet<SDNode *, 32> Visited;
5582 SmallVector<SDNode *, 16> Worklist;
5583 Worklist.push_back(N);
5586 N = Worklist.pop_back_val();
5587 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5588 SDNode *Op = N->getOperand(i).getNode();
5591 if (Visited.insert(Op))
5592 Worklist.push_back(Op);
5594 } while (!Worklist.empty());
5599 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5600 assert(Num < NumOperands && "Invalid child # of SDNode!");
5601 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5604 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5605 switch (getOpcode()) {
5607 if (getOpcode() < ISD::BUILTIN_OP_END)
5608 return "<<Unknown DAG Node>>";
5609 if (isMachineOpcode()) {
5611 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5612 if (getMachineOpcode() < TII->getNumOpcodes())
5613 return TII->get(getMachineOpcode()).getName();
5614 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5617 const TargetLowering &TLI = G->getTargetLoweringInfo();
5618 const char *Name = TLI.getTargetNodeName(getOpcode());
5619 if (Name) return Name;
5620 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5622 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5625 case ISD::DELETED_NODE:
5626 return "<<Deleted Node!>>";
5628 case ISD::PREFETCH: return "Prefetch";
5629 case ISD::MEMBARRIER: return "MemBarrier";
5630 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5631 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5632 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5633 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5634 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5635 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5636 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5637 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5638 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5639 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5640 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5641 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5642 case ISD::PCMARKER: return "PCMarker";
5643 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5644 case ISD::SRCVALUE: return "SrcValue";
5645 case ISD::MDNODE_SDNODE: return "MDNode";
5646 case ISD::EntryToken: return "EntryToken";
5647 case ISD::TokenFactor: return "TokenFactor";
5648 case ISD::AssertSext: return "AssertSext";
5649 case ISD::AssertZext: return "AssertZext";
5651 case ISD::BasicBlock: return "BasicBlock";
5652 case ISD::VALUETYPE: return "ValueType";
5653 case ISD::Register: return "Register";
5655 case ISD::Constant: return "Constant";
5656 case ISD::ConstantFP: return "ConstantFP";
5657 case ISD::GlobalAddress: return "GlobalAddress";
5658 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5659 case ISD::FrameIndex: return "FrameIndex";
5660 case ISD::JumpTable: return "JumpTable";
5661 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5662 case ISD::RETURNADDR: return "RETURNADDR";
5663 case ISD::FRAMEADDR: return "FRAMEADDR";
5664 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5665 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5666 case ISD::LSDAADDR: return "LSDAADDR";
5667 case ISD::EHSELECTION: return "EHSELECTION";
5668 case ISD::EH_RETURN: return "EH_RETURN";
5669 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5670 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5671 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5672 case ISD::ConstantPool: return "ConstantPool";
5673 case ISD::ExternalSymbol: return "ExternalSymbol";
5674 case ISD::BlockAddress: return "BlockAddress";
5675 case ISD::INTRINSIC_WO_CHAIN:
5676 case ISD::INTRINSIC_VOID:
5677 case ISD::INTRINSIC_W_CHAIN: {
5678 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5679 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5680 if (IID < Intrinsic::num_intrinsics)
5681 return Intrinsic::getName((Intrinsic::ID)IID);
5682 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5683 return TII->getName(IID);
5684 llvm_unreachable("Invalid intrinsic ID");
5687 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5688 case ISD::TargetConstant: return "TargetConstant";
5689 case ISD::TargetConstantFP:return "TargetConstantFP";
5690 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5691 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5692 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5693 case ISD::TargetJumpTable: return "TargetJumpTable";
5694 case ISD::TargetConstantPool: return "TargetConstantPool";
5695 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5696 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5698 case ISD::CopyToReg: return "CopyToReg";
5699 case ISD::CopyFromReg: return "CopyFromReg";
5700 case ISD::UNDEF: return "undef";
5701 case ISD::MERGE_VALUES: return "merge_values";
5702 case ISD::INLINEASM: return "inlineasm";
5703 case ISD::EH_LABEL: return "eh_label";
5704 case ISD::HANDLENODE: return "handlenode";
5707 case ISD::FABS: return "fabs";
5708 case ISD::FNEG: return "fneg";
5709 case ISD::FSQRT: return "fsqrt";
5710 case ISD::FSIN: return "fsin";
5711 case ISD::FCOS: return "fcos";
5712 case ISD::FTRUNC: return "ftrunc";
5713 case ISD::FFLOOR: return "ffloor";
5714 case ISD::FCEIL: return "fceil";
5715 case ISD::FRINT: return "frint";
5716 case ISD::FNEARBYINT: return "fnearbyint";
5717 case ISD::FEXP: return "fexp";
5718 case ISD::FEXP2: return "fexp2";
5719 case ISD::FLOG: return "flog";
5720 case ISD::FLOG2: return "flog2";
5721 case ISD::FLOG10: return "flog10";
5724 case ISD::ADD: return "add";
5725 case ISD::SUB: return "sub";
5726 case ISD::MUL: return "mul";
5727 case ISD::MULHU: return "mulhu";
5728 case ISD::MULHS: return "mulhs";
5729 case ISD::SDIV: return "sdiv";
5730 case ISD::UDIV: return "udiv";
5731 case ISD::SREM: return "srem";
5732 case ISD::UREM: return "urem";
5733 case ISD::SMUL_LOHI: return "smul_lohi";
5734 case ISD::UMUL_LOHI: return "umul_lohi";
5735 case ISD::SDIVREM: return "sdivrem";
5736 case ISD::UDIVREM: return "udivrem";
5737 case ISD::AND: return "and";
5738 case ISD::OR: return "or";
5739 case ISD::XOR: return "xor";
5740 case ISD::SHL: return "shl";
5741 case ISD::SRA: return "sra";
5742 case ISD::SRL: return "srl";
5743 case ISD::ROTL: return "rotl";
5744 case ISD::ROTR: return "rotr";
5745 case ISD::FADD: return "fadd";
5746 case ISD::FSUB: return "fsub";
5747 case ISD::FMUL: return "fmul";
5748 case ISD::FDIV: return "fdiv";
5749 case ISD::FREM: return "frem";
5750 case ISD::FCOPYSIGN: return "fcopysign";
5751 case ISD::FGETSIGN: return "fgetsign";
5752 case ISD::FPOW: return "fpow";
5754 case ISD::FPOWI: return "fpowi";
5755 case ISD::SETCC: return "setcc";
5756 case ISD::VSETCC: return "vsetcc";
5757 case ISD::SELECT: return "select";
5758 case ISD::SELECT_CC: return "select_cc";
5759 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5760 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5761 case ISD::CONCAT_VECTORS: return "concat_vectors";
5762 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5763 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5764 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5765 case ISD::CARRY_FALSE: return "carry_false";
5766 case ISD::ADDC: return "addc";
5767 case ISD::ADDE: return "adde";
5768 case ISD::SADDO: return "saddo";
5769 case ISD::UADDO: return "uaddo";
5770 case ISD::SSUBO: return "ssubo";
5771 case ISD::USUBO: return "usubo";
5772 case ISD::SMULO: return "smulo";
5773 case ISD::UMULO: return "umulo";
5774 case ISD::SUBC: return "subc";
5775 case ISD::SUBE: return "sube";
5776 case ISD::SHL_PARTS: return "shl_parts";
5777 case ISD::SRA_PARTS: return "sra_parts";
5778 case ISD::SRL_PARTS: return "srl_parts";
5780 // Conversion operators.
5781 case ISD::SIGN_EXTEND: return "sign_extend";
5782 case ISD::ZERO_EXTEND: return "zero_extend";
5783 case ISD::ANY_EXTEND: return "any_extend";
5784 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5785 case ISD::TRUNCATE: return "truncate";
5786 case ISD::FP_ROUND: return "fp_round";
5787 case ISD::FLT_ROUNDS_: return "flt_rounds";
5788 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5789 case ISD::FP_EXTEND: return "fp_extend";
5791 case ISD::SINT_TO_FP: return "sint_to_fp";
5792 case ISD::UINT_TO_FP: return "uint_to_fp";
5793 case ISD::FP_TO_SINT: return "fp_to_sint";
5794 case ISD::FP_TO_UINT: return "fp_to_uint";
5795 case ISD::BITCAST: return "bit_convert";
5796 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5797 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5799 case ISD::CONVERT_RNDSAT: {
5800 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5801 default: llvm_unreachable("Unknown cvt code!");
5802 case ISD::CVT_FF: return "cvt_ff";
5803 case ISD::CVT_FS: return "cvt_fs";
5804 case ISD::CVT_FU: return "cvt_fu";
5805 case ISD::CVT_SF: return "cvt_sf";
5806 case ISD::CVT_UF: return "cvt_uf";
5807 case ISD::CVT_SS: return "cvt_ss";
5808 case ISD::CVT_SU: return "cvt_su";
5809 case ISD::CVT_US: return "cvt_us";
5810 case ISD::CVT_UU: return "cvt_uu";
5814 // Control flow instructions
5815 case ISD::BR: return "br";
5816 case ISD::BRIND: return "brind";
5817 case ISD::BR_JT: return "br_jt";
5818 case ISD::BRCOND: return "brcond";
5819 case ISD::BR_CC: return "br_cc";
5820 case ISD::CALLSEQ_START: return "callseq_start";
5821 case ISD::CALLSEQ_END: return "callseq_end";
5824 case ISD::LOAD: return "load";
5825 case ISD::STORE: return "store";
5826 case ISD::VAARG: return "vaarg";
5827 case ISD::VACOPY: return "vacopy";
5828 case ISD::VAEND: return "vaend";
5829 case ISD::VASTART: return "vastart";
5830 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5831 case ISD::EXTRACT_ELEMENT: return "extract_element";
5832 case ISD::BUILD_PAIR: return "build_pair";
5833 case ISD::STACKSAVE: return "stacksave";
5834 case ISD::STACKRESTORE: return "stackrestore";
5835 case ISD::TRAP: return "trap";
5838 case ISD::BSWAP: return "bswap";
5839 case ISD::CTPOP: return "ctpop";
5840 case ISD::CTTZ: return "cttz";
5841 case ISD::CTLZ: return "ctlz";
5844 case ISD::TRAMPOLINE: return "trampoline";
5847 switch (cast<CondCodeSDNode>(this)->get()) {
5848 default: llvm_unreachable("Unknown setcc condition!");
5849 case ISD::SETOEQ: return "setoeq";
5850 case ISD::SETOGT: return "setogt";
5851 case ISD::SETOGE: return "setoge";
5852 case ISD::SETOLT: return "setolt";
5853 case ISD::SETOLE: return "setole";
5854 case ISD::SETONE: return "setone";
5856 case ISD::SETO: return "seto";
5857 case ISD::SETUO: return "setuo";
5858 case ISD::SETUEQ: return "setue";
5859 case ISD::SETUGT: return "setugt";
5860 case ISD::SETUGE: return "setuge";
5861 case ISD::SETULT: return "setult";
5862 case ISD::SETULE: return "setule";
5863 case ISD::SETUNE: return "setune";
5865 case ISD::SETEQ: return "seteq";
5866 case ISD::SETGT: return "setgt";
5867 case ISD::SETGE: return "setge";
5868 case ISD::SETLT: return "setlt";
5869 case ISD::SETLE: return "setle";
5870 case ISD::SETNE: return "setne";
5875 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5884 return "<post-inc>";
5886 return "<post-dec>";
5890 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5891 std::string S = "< ";
5905 if (getByValAlign())
5906 S += "byval-align:" + utostr(getByValAlign()) + " ";
5908 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5910 S += "byval-size:" + utostr(getByValSize()) + " ";
5914 void SDNode::dump() const { dump(0); }
5915 void SDNode::dump(const SelectionDAG *G) const {
5920 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5921 OS << (void*)this << ": ";
5923 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5925 if (getValueType(i) == MVT::Other)
5928 OS << getValueType(i).getEVTString();
5930 OS << " = " << getOperationName(G);
5933 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5934 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5935 if (!MN->memoperands_empty()) {
5938 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5939 e = MN->memoperands_end(); i != e; ++i) {
5941 if (llvm::next(i) != e)
5946 } else if (const ShuffleVectorSDNode *SVN =
5947 dyn_cast<ShuffleVectorSDNode>(this)) {
5949 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5950 int Idx = SVN->getMaskElt(i);
5958 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5959 OS << '<' << CSDN->getAPIntValue() << '>';
5960 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5961 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5962 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5963 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5964 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5967 CSDN->getValueAPF().bitcastToAPInt().dump();
5970 } else if (const GlobalAddressSDNode *GADN =
5971 dyn_cast<GlobalAddressSDNode>(this)) {
5972 int64_t offset = GADN->getOffset();
5974 WriteAsOperand(OS, GADN->getGlobal());
5977 OS << " + " << offset;
5979 OS << " " << offset;
5980 if (unsigned int TF = GADN->getTargetFlags())
5981 OS << " [TF=" << TF << ']';
5982 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5983 OS << "<" << FIDN->getIndex() << ">";
5984 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5985 OS << "<" << JTDN->getIndex() << ">";
5986 if (unsigned int TF = JTDN->getTargetFlags())
5987 OS << " [TF=" << TF << ']';
5988 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5989 int offset = CP->getOffset();
5990 if (CP->isMachineConstantPoolEntry())
5991 OS << "<" << *CP->getMachineCPVal() << ">";
5993 OS << "<" << *CP->getConstVal() << ">";
5995 OS << " + " << offset;
5997 OS << " " << offset;
5998 if (unsigned int TF = CP->getTargetFlags())
5999 OS << " [TF=" << TF << ']';
6000 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6002 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6004 OS << LBB->getName() << " ";
6005 OS << (const void*)BBDN->getBasicBlock() << ">";
6006 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6007 if (G && R->getReg() &&
6008 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
6009 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
6011 OS << " %reg" << R->getReg();
6013 } else if (const ExternalSymbolSDNode *ES =
6014 dyn_cast<ExternalSymbolSDNode>(this)) {
6015 OS << "'" << ES->getSymbol() << "'";
6016 if (unsigned int TF = ES->getTargetFlags())
6017 OS << " [TF=" << TF << ']';
6018 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6020 OS << "<" << M->getValue() << ">";
6023 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6025 OS << "<" << MD->getMD() << ">";
6028 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6029 OS << ":" << N->getVT().getEVTString();
6031 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6032 OS << "<" << *LD->getMemOperand();
6035 switch (LD->getExtensionType()) {
6036 default: doExt = false; break;
6037 case ISD::EXTLOAD: OS << ", anyext"; break;
6038 case ISD::SEXTLOAD: OS << ", sext"; break;
6039 case ISD::ZEXTLOAD: OS << ", zext"; break;
6042 OS << " from " << LD->getMemoryVT().getEVTString();
6044 const char *AM = getIndexedModeName(LD->getAddressingMode());
6049 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6050 OS << "<" << *ST->getMemOperand();
6052 if (ST->isTruncatingStore())
6053 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6055 const char *AM = getIndexedModeName(ST->getAddressingMode());
6060 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6061 OS << "<" << *M->getMemOperand() << ">";
6062 } else if (const BlockAddressSDNode *BA =
6063 dyn_cast<BlockAddressSDNode>(this)) {
6065 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6067 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6069 if (unsigned int TF = BA->getTargetFlags())
6070 OS << " [TF=" << TF << ']';
6074 if (unsigned Order = G->GetOrdering(this))
6075 OS << " [ORD=" << Order << ']';
6077 if (getNodeId() != -1)
6078 OS << " [ID=" << getNodeId() << ']';
6080 DebugLoc dl = getDebugLoc();
6081 if (G && !dl.isUnknown()) {
6083 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6085 // Omit the directory, since it's usually long and uninteresting.
6087 OS << Scope.getFilename();
6090 OS << ':' << dl.getLine();
6091 if (dl.getCol() != 0)
6092 OS << ':' << dl.getCol();
6096 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6098 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6099 if (i) OS << ", "; else OS << " ";
6100 OS << (void*)getOperand(i).getNode();
6101 if (unsigned RN = getOperand(i).getResNo())
6104 print_details(OS, G);
6107 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6108 const SelectionDAG *G, unsigned depth,
6121 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6123 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6127 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6128 unsigned depth) const {
6129 printrWithDepthHelper(OS, this, G, depth, 0);
6132 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6133 // Don't print impossibly deep things.
6134 printrWithDepth(OS, G, 100);
6137 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6138 printrWithDepth(dbgs(), G, depth);
6141 void SDNode::dumprFull(const SelectionDAG *G) const {
6142 // Don't print impossibly deep things.
6143 dumprWithDepth(G, 100);
6146 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6147 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6148 if (N->getOperand(i).getNode()->hasOneUse())
6149 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6151 dbgs() << "\n" << std::string(indent+2, ' ')
6152 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6156 dbgs().indent(indent);
6160 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6161 assert(N->getNumValues() == 1 &&
6162 "Can't unroll a vector with multiple results!");
6164 EVT VT = N->getValueType(0);
6165 unsigned NE = VT.getVectorNumElements();
6166 EVT EltVT = VT.getVectorElementType();
6167 DebugLoc dl = N->getDebugLoc();
6169 SmallVector<SDValue, 8> Scalars;
6170 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6172 // If ResNE is 0, fully unroll the vector op.
6175 else if (NE > ResNE)
6179 for (i= 0; i != NE; ++i) {
6180 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6181 SDValue Operand = N->getOperand(j);
6182 EVT OperandVT = Operand.getValueType();
6183 if (OperandVT.isVector()) {
6184 // A vector operand; extract a single element.
6185 EVT OperandEltVT = OperandVT.getVectorElementType();
6186 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6189 getConstant(i, MVT::i32));
6191 // A scalar operand; just use it as is.
6192 Operands[j] = Operand;
6196 switch (N->getOpcode()) {
6198 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6199 &Operands[0], Operands.size()));
6206 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6207 getShiftAmountOperand(Operands[1])));
6209 case ISD::SIGN_EXTEND_INREG:
6210 case ISD::FP_ROUND_INREG: {
6211 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6212 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6214 getValueType(ExtVT)));
6219 for (; i < ResNE; ++i)
6220 Scalars.push_back(getUNDEF(EltVT));
6222 return getNode(ISD::BUILD_VECTOR, dl,
6223 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6224 &Scalars[0], Scalars.size());
6228 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6229 /// location that is 'Dist' units away from the location that the 'Base' load
6230 /// is loading from.
6231 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6232 unsigned Bytes, int Dist) const {
6233 if (LD->getChain() != Base->getChain())
6235 EVT VT = LD->getValueType(0);
6236 if (VT.getSizeInBits() / 8 != Bytes)
6239 SDValue Loc = LD->getOperand(1);
6240 SDValue BaseLoc = Base->getOperand(1);
6241 if (Loc.getOpcode() == ISD::FrameIndex) {
6242 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6244 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6245 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6246 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6247 int FS = MFI->getObjectSize(FI);
6248 int BFS = MFI->getObjectSize(BFI);
6249 if (FS != BFS || FS != (int)Bytes) return false;
6250 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6252 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6253 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6254 if (V && (V->getSExtValue() == Dist*Bytes))
6258 const GlobalValue *GV1 = NULL;
6259 const GlobalValue *GV2 = NULL;
6260 int64_t Offset1 = 0;
6261 int64_t Offset2 = 0;
6262 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6263 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6264 if (isGA1 && isGA2 && GV1 == GV2)
6265 return Offset1 == (Offset2 + Dist*Bytes);
6270 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6271 /// it cannot be inferred.
6272 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6273 // If this is a GlobalAddress + cst, return the alignment.
6274 const GlobalValue *GV;
6275 int64_t GVOffset = 0;
6276 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6277 // If GV has specified alignment, then use it. Otherwise, use the preferred
6279 unsigned Align = GV->getAlignment();
6281 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6282 if (GVar->hasInitializer()) {
6283 const TargetData *TD = TLI.getTargetData();
6284 Align = TD->getPreferredAlignment(GVar);
6288 return MinAlign(Align, GVOffset);
6291 // If this is a direct reference to a stack slot, use information about the
6292 // stack slot's alignment.
6293 int FrameIdx = 1 << 31;
6294 int64_t FrameOffset = 0;
6295 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6296 FrameIdx = FI->getIndex();
6297 } else if (Ptr.getOpcode() == ISD::ADD &&
6298 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6299 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6300 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6301 FrameOffset = Ptr.getConstantOperandVal(1);
6304 if (FrameIdx != (1 << 31)) {
6305 // FIXME: Handle FI+CST.
6306 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6307 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6315 void SelectionDAG::dump() const {
6316 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6318 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6320 const SDNode *N = I;
6321 if (!N->hasOneUse() && N != getRoot().getNode())
6322 DumpNodes(N, 2, this);
6325 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6330 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6332 print_details(OS, G);
6335 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6336 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6337 const SelectionDAG *G, VisitedSDNodeSet &once) {
6338 if (!once.insert(N)) // If we've been here before, return now.
6341 // Dump the current SDNode, but don't end the line yet.
6342 OS << std::string(indent, ' ');
6345 // Having printed this SDNode, walk the children:
6346 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6347 const SDNode *child = N->getOperand(i).getNode();
6352 if (child->getNumOperands() == 0) {
6353 // This child has no grandchildren; print it inline right here.
6354 child->printr(OS, G);
6356 } else { // Just the address. FIXME: also print the child's opcode.
6358 if (unsigned RN = N->getOperand(i).getResNo())
6365 // Dump children that have grandchildren on their own line(s).
6366 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6367 const SDNode *child = N->getOperand(i).getNode();
6368 DumpNodesr(OS, child, indent+2, G, once);
6372 void SDNode::dumpr() const {
6373 VisitedSDNodeSet once;
6374 DumpNodesr(dbgs(), this, 0, 0, once);
6377 void SDNode::dumpr(const SelectionDAG *G) const {
6378 VisitedSDNodeSet once;
6379 DumpNodesr(dbgs(), this, 0, G, once);
6383 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6384 unsigned GlobalAddressSDNode::getAddressSpace() const {
6385 return getGlobal()->getType()->getAddressSpace();
6389 const Type *ConstantPoolSDNode::getType() const {
6390 if (isMachineConstantPoolEntry())
6391 return Val.MachineCPVal->getType();
6392 return Val.ConstVal->getType();
6395 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6397 unsigned &SplatBitSize,
6399 unsigned MinSplatBits,
6401 EVT VT = getValueType(0);
6402 assert(VT.isVector() && "Expected a vector type");
6403 unsigned sz = VT.getSizeInBits();
6404 if (MinSplatBits > sz)
6407 SplatValue = APInt(sz, 0);
6408 SplatUndef = APInt(sz, 0);
6410 // Get the bits. Bits with undefined values (when the corresponding element
6411 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6412 // in SplatValue. If any of the values are not constant, give up and return
6414 unsigned int nOps = getNumOperands();
6415 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6416 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6418 for (unsigned j = 0; j < nOps; ++j) {
6419 unsigned i = isBigEndian ? nOps-1-j : j;
6420 SDValue OpVal = getOperand(i);
6421 unsigned BitPos = j * EltBitSize;
6423 if (OpVal.getOpcode() == ISD::UNDEF)
6424 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6425 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6426 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6427 zextOrTrunc(sz) << BitPos;
6428 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6429 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6434 // The build_vector is all constants or undefs. Find the smallest element
6435 // size that splats the vector.
6437 HasAnyUndefs = (SplatUndef != 0);
6440 unsigned HalfSize = sz / 2;
6441 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6442 APInt LowValue = SplatValue.trunc(HalfSize);
6443 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6444 APInt LowUndef = SplatUndef.trunc(HalfSize);
6446 // If the two halves do not match (ignoring undef bits), stop here.
6447 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6448 MinSplatBits > HalfSize)
6451 SplatValue = HighValue | LowValue;
6452 SplatUndef = HighUndef & LowUndef;
6461 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6462 // Find the first non-undef value in the shuffle mask.
6464 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6467 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6469 // Make sure all remaining elements are either undef or the same as the first
6471 for (int Idx = Mask[i]; i != e; ++i)
6472 if (Mask[i] >= 0 && Mask[i] != Idx)
6478 static void checkForCyclesHelper(const SDNode *N,
6479 SmallPtrSet<const SDNode*, 32> &Visited,
6480 SmallPtrSet<const SDNode*, 32> &Checked) {
6481 // If this node has already been checked, don't check it again.
6482 if (Checked.count(N))
6485 // If a node has already been visited on this depth-first walk, reject it as
6487 if (!Visited.insert(N)) {
6488 dbgs() << "Offending node:\n";
6490 errs() << "Detected cycle in SelectionDAG\n";
6494 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6495 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6502 void llvm::checkForCycles(const llvm::SDNode *N) {
6504 assert(N && "Checking nonexistant SDNode");
6505 SmallPtrSet<const SDNode*, 32> visited;
6506 SmallPtrSet<const SDNode*, 32> checked;
6507 checkForCyclesHelper(N, visited, checked);
6511 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6512 checkForCycles(DAG->getRoot().getNode());