1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
200 /// all ConstantFPSDNode or undef.
201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
205 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
206 SDValue Op = N->getOperand(i);
207 if (Op.getOpcode() == ISD::UNDEF)
209 if (!isa<ConstantFPSDNode>(Op))
215 /// isScalarToVector - Return true if the specified node is a
216 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
217 /// element is not an undef.
218 bool ISD::isScalarToVector(const SDNode *N) {
219 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
222 if (N->getOpcode() != ISD::BUILD_VECTOR)
224 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
226 unsigned NumElems = N->getNumOperands();
229 for (unsigned i = 1; i < NumElems; ++i) {
230 SDValue V = N->getOperand(i);
231 if (V.getOpcode() != ISD::UNDEF)
237 /// allOperandsUndef - Return true if the node has at least one operand
238 /// and all operands of the specified node are ISD::UNDEF.
239 bool ISD::allOperandsUndef(const SDNode *N) {
240 // Return false if the node has no operands.
241 // This is "logically inconsistent" with the definition of "all" but
242 // is probably the desired behavior.
243 if (N->getNumOperands() == 0)
246 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
247 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
253 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
256 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
258 return ISD::SIGN_EXTEND;
260 return ISD::ZERO_EXTEND;
265 llvm_unreachable("Invalid LoadExtType");
268 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
269 /// when given the operation for (X op Y).
270 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
271 // To perform this operation, we just need to swap the L and G bits of the
273 unsigned OldL = (Operation >> 2) & 1;
274 unsigned OldG = (Operation >> 1) & 1;
275 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
276 (OldL << 1) | // New G bit
277 (OldG << 2)); // New L bit.
280 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
281 /// 'op' is a valid SetCC operation.
282 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
283 unsigned Operation = Op;
285 Operation ^= 7; // Flip L, G, E bits, but not U.
287 Operation ^= 15; // Flip all of the condition bits.
289 if (Operation > ISD::SETTRUE2)
290 Operation &= ~8; // Don't let N and U bits get set.
292 return ISD::CondCode(Operation);
296 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
297 /// signed operation and 2 if the result is an unsigned comparison. Return zero
298 /// if the operation does not depend on the sign of the input (setne and seteq).
299 static int isSignedOp(ISD::CondCode Opcode) {
301 default: llvm_unreachable("Illegal integer setcc operation!");
303 case ISD::SETNE: return 0;
307 case ISD::SETGE: return 1;
311 case ISD::SETUGE: return 2;
315 /// getSetCCOrOperation - Return the result of a logical OR between different
316 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
317 /// returns SETCC_INVALID if it is not possible to represent the resultant
319 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
321 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
322 // Cannot fold a signed integer setcc with an unsigned integer setcc.
323 return ISD::SETCC_INVALID;
325 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
327 // If the N and U bits get set then the resultant comparison DOES suddenly
328 // care about orderedness, and is true when ordered.
329 if (Op > ISD::SETTRUE2)
330 Op &= ~16; // Clear the U bit if the N bit is set.
332 // Canonicalize illegal integer setcc's.
333 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
336 return ISD::CondCode(Op);
339 /// getSetCCAndOperation - Return the result of a logical AND between different
340 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
341 /// function returns zero if it is not possible to represent the resultant
343 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
345 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
346 // Cannot fold a signed setcc with an unsigned setcc.
347 return ISD::SETCC_INVALID;
349 // Combine all of the condition bits.
350 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
352 // Canonicalize illegal integer setcc's.
356 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
357 case ISD::SETOEQ: // SETEQ & SETU[LG]E
358 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
359 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
360 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
367 //===----------------------------------------------------------------------===//
368 // SDNode Profile Support
369 //===----------------------------------------------------------------------===//
371 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
373 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
377 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
378 /// solely with their pointer.
379 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
380 ID.AddPointer(VTList.VTs);
383 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
385 static void AddNodeIDOperands(FoldingSetNodeID &ID,
386 ArrayRef<SDValue> Ops) {
387 for (auto& Op : Ops) {
388 ID.AddPointer(Op.getNode());
389 ID.AddInteger(Op.getResNo());
393 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
395 static void AddNodeIDOperands(FoldingSetNodeID &ID,
396 ArrayRef<SDUse> Ops) {
397 for (auto& Op : Ops) {
398 ID.AddPointer(Op.getNode());
399 ID.AddInteger(Op.getResNo());
403 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
407 ID.AddBoolean(exact);
410 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
411 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
412 bool nuw, bool nsw, bool exact) {
413 if (isBinOpWithFlags(Opcode))
414 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
417 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
418 SDVTList VTList, ArrayRef<SDValue> OpList) {
419 AddNodeIDOpcode(ID, OpC);
420 AddNodeIDValueTypes(ID, VTList);
421 AddNodeIDOperands(ID, OpList);
424 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
426 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
427 switch (N->getOpcode()) {
428 case ISD::TargetExternalSymbol:
429 case ISD::ExternalSymbol:
430 llvm_unreachable("Should only be used on nodes with operands");
431 default: break; // Normal nodes don't need extra info.
432 case ISD::TargetConstant:
433 case ISD::Constant: {
434 const ConstantSDNode *C = cast<ConstantSDNode>(N);
435 ID.AddPointer(C->getConstantIntValue());
436 ID.AddBoolean(C->isOpaque());
439 case ISD::TargetConstantFP:
440 case ISD::ConstantFP: {
441 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
444 case ISD::TargetGlobalAddress:
445 case ISD::GlobalAddress:
446 case ISD::TargetGlobalTLSAddress:
447 case ISD::GlobalTLSAddress: {
448 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
449 ID.AddPointer(GA->getGlobal());
450 ID.AddInteger(GA->getOffset());
451 ID.AddInteger(GA->getTargetFlags());
452 ID.AddInteger(GA->getAddressSpace());
455 case ISD::BasicBlock:
456 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
459 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
461 case ISD::RegisterMask:
462 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
465 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
467 case ISD::FrameIndex:
468 case ISD::TargetFrameIndex:
469 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
472 case ISD::TargetJumpTable:
473 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
474 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
476 case ISD::ConstantPool:
477 case ISD::TargetConstantPool: {
478 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
479 ID.AddInteger(CP->getAlignment());
480 ID.AddInteger(CP->getOffset());
481 if (CP->isMachineConstantPoolEntry())
482 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
484 ID.AddPointer(CP->getConstVal());
485 ID.AddInteger(CP->getTargetFlags());
488 case ISD::TargetIndex: {
489 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
490 ID.AddInteger(TI->getIndex());
491 ID.AddInteger(TI->getOffset());
492 ID.AddInteger(TI->getTargetFlags());
496 const LoadSDNode *LD = cast<LoadSDNode>(N);
497 ID.AddInteger(LD->getMemoryVT().getRawBits());
498 ID.AddInteger(LD->getRawSubclassData());
499 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
503 const StoreSDNode *ST = cast<StoreSDNode>(N);
504 ID.AddInteger(ST->getMemoryVT().getRawBits());
505 ID.AddInteger(ST->getRawSubclassData());
506 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
517 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
518 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
519 BinNode->hasNoSignedWrap(), BinNode->isExact());
522 case ISD::ATOMIC_CMP_SWAP:
523 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
524 case ISD::ATOMIC_SWAP:
525 case ISD::ATOMIC_LOAD_ADD:
526 case ISD::ATOMIC_LOAD_SUB:
527 case ISD::ATOMIC_LOAD_AND:
528 case ISD::ATOMIC_LOAD_OR:
529 case ISD::ATOMIC_LOAD_XOR:
530 case ISD::ATOMIC_LOAD_NAND:
531 case ISD::ATOMIC_LOAD_MIN:
532 case ISD::ATOMIC_LOAD_MAX:
533 case ISD::ATOMIC_LOAD_UMIN:
534 case ISD::ATOMIC_LOAD_UMAX:
535 case ISD::ATOMIC_LOAD:
536 case ISD::ATOMIC_STORE: {
537 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
538 ID.AddInteger(AT->getMemoryVT().getRawBits());
539 ID.AddInteger(AT->getRawSubclassData());
540 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
543 case ISD::PREFETCH: {
544 const MemSDNode *PF = cast<MemSDNode>(N);
545 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
548 case ISD::VECTOR_SHUFFLE: {
549 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
550 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
552 ID.AddInteger(SVN->getMaskElt(i));
555 case ISD::TargetBlockAddress:
556 case ISD::BlockAddress: {
557 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
558 ID.AddPointer(BA->getBlockAddress());
559 ID.AddInteger(BA->getOffset());
560 ID.AddInteger(BA->getTargetFlags());
563 } // end switch (N->getOpcode())
565 // Target specific memory nodes could also have address spaces to check.
566 if (N->isTargetMemoryOpcode())
567 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
570 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
572 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
573 AddNodeIDOpcode(ID, N->getOpcode());
574 // Add the return value info.
575 AddNodeIDValueTypes(ID, N->getVTList());
576 // Add the operand info.
577 AddNodeIDOperands(ID, N->ops());
579 // Handle SDNode leafs with special info.
580 AddNodeIDCustom(ID, N);
583 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
584 /// the CSE map that carries volatility, temporalness, indexing mode, and
585 /// extension/truncation information.
587 static inline unsigned
588 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
589 bool isNonTemporal, bool isInvariant) {
590 assert((ConvType & 3) == ConvType &&
591 "ConvType may not require more than 2 bits!");
592 assert((AM & 7) == AM &&
593 "AM may not require more than 3 bits!");
597 (isNonTemporal << 6) |
601 //===----------------------------------------------------------------------===//
602 // SelectionDAG Class
603 //===----------------------------------------------------------------------===//
605 /// doNotCSE - Return true if CSE should not be performed for this node.
606 static bool doNotCSE(SDNode *N) {
607 if (N->getValueType(0) == MVT::Glue)
608 return true; // Never CSE anything that produces a flag.
610 switch (N->getOpcode()) {
612 case ISD::HANDLENODE:
614 return true; // Never CSE these nodes.
617 // Check that remaining values produced are not flags.
618 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
619 if (N->getValueType(i) == MVT::Glue)
620 return true; // Never CSE anything that produces a flag.
625 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
627 void SelectionDAG::RemoveDeadNodes() {
628 // Create a dummy node (which is not added to allnodes), that adds a reference
629 // to the root node, preventing it from being deleted.
630 HandleSDNode Dummy(getRoot());
632 SmallVector<SDNode*, 128> DeadNodes;
634 // Add all obviously-dead nodes to the DeadNodes worklist.
635 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
637 DeadNodes.push_back(I);
639 RemoveDeadNodes(DeadNodes);
641 // If the root changed (e.g. it was a dead load, update the root).
642 setRoot(Dummy.getValue());
645 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
646 /// given list, and any nodes that become unreachable as a result.
647 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
649 // Process the worklist, deleting the nodes and adding their uses to the
651 while (!DeadNodes.empty()) {
652 SDNode *N = DeadNodes.pop_back_val();
654 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
655 DUL->NodeDeleted(N, nullptr);
657 // Take the node out of the appropriate CSE map.
658 RemoveNodeFromCSEMaps(N);
660 // Next, brutally remove the operand list. This is safe to do, as there are
661 // no cycles in the graph.
662 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
664 SDNode *Operand = Use.getNode();
667 // Now that we removed this operand, see if there are no uses of it left.
668 if (Operand->use_empty())
669 DeadNodes.push_back(Operand);
676 void SelectionDAG::RemoveDeadNode(SDNode *N){
677 SmallVector<SDNode*, 16> DeadNodes(1, N);
679 // Create a dummy node that adds a reference to the root node, preventing
680 // it from being deleted. (This matters if the root is an operand of the
682 HandleSDNode Dummy(getRoot());
684 RemoveDeadNodes(DeadNodes);
687 void SelectionDAG::DeleteNode(SDNode *N) {
688 // First take this out of the appropriate CSE map.
689 RemoveNodeFromCSEMaps(N);
691 // Finally, remove uses due to operands of this node, remove from the
692 // AllNodes list, and delete the node.
693 DeleteNodeNotInCSEMaps(N);
696 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
697 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
698 assert(N->use_empty() && "Cannot delete a node that is not dead!");
700 // Drop all of the operands and decrement used node's use counts.
706 void SDDbgInfo::erase(const SDNode *Node) {
707 DbgValMapType::iterator I = DbgValMap.find(Node);
708 if (I == DbgValMap.end())
710 for (auto &Val: I->second)
711 Val->setIsInvalidated();
715 void SelectionDAG::DeallocateNode(SDNode *N) {
716 if (N->OperandsNeedDelete)
717 delete[] N->OperandList;
719 // Set the opcode to DELETED_NODE to help catch bugs when node
720 // memory is reallocated.
721 N->NodeType = ISD::DELETED_NODE;
723 NodeAllocator.Deallocate(AllNodes.remove(N));
725 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
726 // them and forget about that node.
731 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
732 static void VerifySDNode(SDNode *N) {
733 switch (N->getOpcode()) {
736 case ISD::BUILD_PAIR: {
737 EVT VT = N->getValueType(0);
738 assert(N->getNumValues() == 1 && "Too many results!");
739 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
740 "Wrong return type!");
741 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
742 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
743 "Mismatched operand types!");
744 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
745 "Wrong operand type!");
746 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
747 "Wrong return type size");
750 case ISD::BUILD_VECTOR: {
751 assert(N->getNumValues() == 1 && "Too many results!");
752 assert(N->getValueType(0).isVector() && "Wrong return type!");
753 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
754 "Wrong number of operands!");
755 EVT EltVT = N->getValueType(0).getVectorElementType();
756 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
757 assert((I->getValueType() == EltVT ||
758 (EltVT.isInteger() && I->getValueType().isInteger() &&
759 EltVT.bitsLE(I->getValueType()))) &&
760 "Wrong operand type!");
761 assert(I->getValueType() == N->getOperand(0).getValueType() &&
762 "Operands must all have the same type");
770 /// \brief Insert a newly allocated node into the DAG.
772 /// Handles insertion into the all nodes list and CSE map, as well as
773 /// verification and other common operations when a new node is allocated.
774 void SelectionDAG::InsertNode(SDNode *N) {
775 AllNodes.push_back(N);
781 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
782 /// correspond to it. This is useful when we're about to delete or repurpose
783 /// the node. We don't want future request for structurally identical nodes
784 /// to return N anymore.
785 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
787 switch (N->getOpcode()) {
788 case ISD::HANDLENODE: return false; // noop.
790 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
791 "Cond code doesn't exist!");
792 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
793 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
795 case ISD::ExternalSymbol:
796 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
798 case ISD::TargetExternalSymbol: {
799 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
800 Erased = TargetExternalSymbols.erase(
801 std::pair<std::string,unsigned char>(ESN->getSymbol(),
802 ESN->getTargetFlags()));
805 case ISD::VALUETYPE: {
806 EVT VT = cast<VTSDNode>(N)->getVT();
807 if (VT.isExtended()) {
808 Erased = ExtendedValueTypeNodes.erase(VT);
810 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
811 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
816 // Remove it from the CSE Map.
817 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
818 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
819 Erased = CSEMap.RemoveNode(N);
823 // Verify that the node was actually in one of the CSE maps, unless it has a
824 // flag result (which cannot be CSE'd) or is one of the special cases that are
825 // not subject to CSE.
826 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
827 !N->isMachineOpcode() && !doNotCSE(N)) {
830 llvm_unreachable("Node is not in map!");
836 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
837 /// maps and modified in place. Add it back to the CSE maps, unless an identical
838 /// node already exists, in which case transfer all its users to the existing
839 /// node. This transfer can potentially trigger recursive merging.
842 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
843 // For node types that aren't CSE'd, just act as if no identical node
846 SDNode *Existing = CSEMap.GetOrInsertNode(N);
848 // If there was already an existing matching node, use ReplaceAllUsesWith
849 // to replace the dead one with the existing one. This can cause
850 // recursive merging of other unrelated nodes down the line.
851 ReplaceAllUsesWith(N, Existing);
853 // N is now dead. Inform the listeners and delete it.
854 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
855 DUL->NodeDeleted(N, Existing);
856 DeleteNodeNotInCSEMaps(N);
861 // If the node doesn't already exist, we updated it. Inform listeners.
862 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
866 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
867 /// were replaced with those specified. If this node is never memoized,
868 /// return null, otherwise return a pointer to the slot it would take. If a
869 /// node already exists with these operands, the slot will be non-null.
870 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
875 SDValue Ops[] = { Op };
877 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
878 AddNodeIDCustom(ID, N);
879 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
883 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
884 /// were replaced with those specified. If this node is never memoized,
885 /// return null, otherwise return a pointer to the slot it would take. If a
886 /// node already exists with these operands, the slot will be non-null.
887 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
888 SDValue Op1, SDValue Op2,
893 SDValue Ops[] = { Op1, Op2 };
895 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
896 AddNodeIDCustom(ID, N);
897 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
903 /// were replaced with those specified. If this node is never memoized,
904 /// return null, otherwise return a pointer to the slot it would take. If a
905 /// node already exists with these operands, the slot will be non-null.
906 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
912 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
913 AddNodeIDCustom(ID, N);
914 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
918 /// getEVTAlignment - Compute the default alignment value for the
921 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
922 Type *Ty = VT == MVT::iPTR ?
923 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
924 VT.getTypeForEVT(*getContext());
926 return TLI->getDataLayout()->getABITypeAlignment(Ty);
929 // EntryNode could meaningfully have debug info if we can find it...
930 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
931 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
932 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
933 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
934 UpdateListeners(nullptr) {
935 AllNodes.push_back(&EntryNode);
936 DbgInfo = new SDDbgInfo();
939 void SelectionDAG::init(MachineFunction &mf) {
941 TLI = getSubtarget().getTargetLowering();
942 TSI = getSubtarget().getSelectionDAGInfo();
943 Context = &mf.getFunction()->getContext();
946 SelectionDAG::~SelectionDAG() {
947 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
952 void SelectionDAG::allnodes_clear() {
953 assert(&*AllNodes.begin() == &EntryNode);
954 AllNodes.remove(AllNodes.begin());
955 while (!AllNodes.empty())
956 DeallocateNode(AllNodes.begin());
959 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
960 SDVTList VTs, SDValue N1,
961 SDValue N2, bool nuw, bool nsw,
963 if (isBinOpWithFlags(Opcode)) {
964 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
965 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
966 FN->setHasNoUnsignedWrap(nuw);
967 FN->setHasNoSignedWrap(nsw);
968 FN->setIsExact(exact);
973 BinarySDNode *N = new (NodeAllocator)
974 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
978 void SelectionDAG::clear() {
980 OperandAllocator.Reset();
983 ExtendedValueTypeNodes.clear();
984 ExternalSymbols.clear();
985 TargetExternalSymbols.clear();
986 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
987 static_cast<CondCodeSDNode*>(nullptr));
988 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
989 static_cast<SDNode*>(nullptr));
991 EntryNode.UseList = nullptr;
992 AllNodes.push_back(&EntryNode);
993 Root = getEntryNode();
997 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
998 return VT.bitsGT(Op.getValueType()) ?
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1000 getNode(ISD::TRUNCATE, DL, VT, Op);
1003 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1004 return VT.bitsGT(Op.getValueType()) ?
1005 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1006 getNode(ISD::TRUNCATE, DL, VT, Op);
1009 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1010 return VT.bitsGT(Op.getValueType()) ?
1011 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1012 getNode(ISD::TRUNCATE, DL, VT, Op);
1015 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1017 if (VT.bitsLE(Op.getValueType()))
1018 return getNode(ISD::TRUNCATE, SL, VT, Op);
1020 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1021 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1024 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1025 assert(!VT.isVector() &&
1026 "getZeroExtendInReg should use the vector element type instead of "
1027 "the vector type!");
1028 if (Op.getValueType() == VT) return Op;
1029 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1030 APInt Imm = APInt::getLowBitsSet(BitWidth,
1031 VT.getSizeInBits());
1032 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1033 getConstant(Imm, Op.getValueType()));
1036 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1037 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1038 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1039 "The sizes of the input and result must match in order to perform the "
1040 "extend in-register.");
1041 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1042 "The destination vector type must have fewer lanes than the input.");
1043 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1046 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1047 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1048 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1049 "The sizes of the input and result must match in order to perform the "
1050 "extend in-register.");
1051 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1052 "The destination vector type must have fewer lanes than the input.");
1053 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1056 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1057 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1058 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1059 "The sizes of the input and result must match in order to perform the "
1060 "extend in-register.");
1061 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1062 "The destination vector type must have fewer lanes than the input.");
1063 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1066 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1068 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1069 EVT EltVT = VT.getScalarType();
1071 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1072 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1075 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1076 EVT EltVT = VT.getScalarType();
1078 switch (TLI->getBooleanContents(VT)) {
1079 case TargetLowering::ZeroOrOneBooleanContent:
1080 case TargetLowering::UndefinedBooleanContent:
1081 TrueValue = getConstant(1, VT);
1083 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1084 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1088 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1091 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1092 EVT EltVT = VT.getScalarType();
1093 assert((EltVT.getSizeInBits() >= 64 ||
1094 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1095 "getConstant with a uint64_t value that doesn't fit in the type!");
1096 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1099 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1101 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1104 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1106 assert(VT.isInteger() && "Cannot create FP integer constant!");
1108 EVT EltVT = VT.getScalarType();
1109 const ConstantInt *Elt = &Val;
1111 // In some cases the vector type is legal but the element type is illegal and
1112 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1113 // inserted value (the type does not need to match the vector element type).
1114 // Any extra bits introduced will be truncated away.
1115 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1116 TargetLowering::TypePromoteInteger) {
1117 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1118 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1119 Elt = ConstantInt::get(*getContext(), NewVal);
1121 // In other cases the element type is illegal and needs to be expanded, for
1122 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1123 // the value into n parts and use a vector type with n-times the elements.
1124 // Then bitcast to the type requested.
1125 // Legalizing constants too early makes the DAGCombiner's job harder so we
1126 // only legalize if the DAG tells us we must produce legal types.
1127 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1128 TLI->getTypeAction(*getContext(), EltVT) ==
1129 TargetLowering::TypeExpandInteger) {
1130 APInt NewVal = Elt->getValue();
1131 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1132 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1133 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1134 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1136 // Check the temporary vector is the correct size. If this fails then
1137 // getTypeToTransformTo() probably returned a type whose size (in bits)
1138 // isn't a power-of-2 factor of the requested type size.
1139 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1141 SmallVector<SDValue, 2> EltParts;
1142 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1143 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1144 .trunc(ViaEltSizeInBits),
1145 ViaEltVT, isT, isO));
1148 // EltParts is currently in little endian order. If we actually want
1149 // big-endian order then reverse it now.
1150 if (TLI->isBigEndian())
1151 std::reverse(EltParts.begin(), EltParts.end());
1153 // The elements must be reversed when the element order is different
1154 // to the endianness of the elements (because the BITCAST is itself a
1155 // vector shuffle in this situation). However, we do not need any code to
1156 // perform this reversal because getConstant() is producing a vector
1158 // This situation occurs in MIPS MSA.
1160 SmallVector<SDValue, 8> Ops;
1161 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1162 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1164 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1165 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1170 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1171 "APInt size does not match type size!");
1172 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1178 SDNode *N = nullptr;
1179 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1181 return SDValue(N, 0);
1184 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1185 CSEMap.InsertNode(N, IP);
1189 SDValue Result(N, 0);
1190 if (VT.isVector()) {
1191 SmallVector<SDValue, 8> Ops;
1192 Ops.assign(VT.getVectorNumElements(), Result);
1193 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1198 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1199 return getConstant(Val, TLI->getPointerTy(), isTarget);
1203 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1204 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1207 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1208 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1210 EVT EltVT = VT.getScalarType();
1212 // Do the map lookup using the actual bit pattern for the floating point
1213 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1214 // we don't have issues with SNANs.
1215 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1216 FoldingSetNodeID ID;
1217 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1220 SDNode *N = nullptr;
1221 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1223 return SDValue(N, 0);
1226 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1227 CSEMap.InsertNode(N, IP);
1231 SDValue Result(N, 0);
1232 if (VT.isVector()) {
1233 SmallVector<SDValue, 8> Ops;
1234 Ops.assign(VT.getVectorNumElements(), Result);
1235 // FIXME SDLoc info might be appropriate here
1236 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1241 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1242 EVT EltVT = VT.getScalarType();
1243 if (EltVT==MVT::f32)
1244 return getConstantFP(APFloat((float)Val), VT, isTarget);
1245 else if (EltVT==MVT::f64)
1246 return getConstantFP(APFloat(Val), VT, isTarget);
1247 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1250 APFloat apf = APFloat(Val);
1251 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1253 return getConstantFP(apf, VT, isTarget);
1255 llvm_unreachable("Unsupported type in getConstantFP");
1258 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1259 EVT VT, int64_t Offset,
1261 unsigned char TargetFlags) {
1262 assert((TargetFlags == 0 || isTargetGA) &&
1263 "Cannot set target flags on target-independent globals");
1265 // Truncate (with sign-extension) the offset value to the pointer size.
1266 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1268 Offset = SignExtend64(Offset, BitWidth);
1271 if (GV->isThreadLocal())
1272 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1274 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1276 FoldingSetNodeID ID;
1277 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1279 ID.AddInteger(Offset);
1280 ID.AddInteger(TargetFlags);
1281 ID.AddInteger(GV->getType()->getAddressSpace());
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1287 DL.getDebugLoc(), GV, VT,
1288 Offset, TargetFlags);
1289 CSEMap.InsertNode(N, IP);
1291 return SDValue(N, 0);
1294 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1295 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1296 FoldingSetNodeID ID;
1297 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1301 return SDValue(E, 0);
1303 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1304 CSEMap.InsertNode(N, IP);
1306 return SDValue(N, 0);
1309 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1310 unsigned char TargetFlags) {
1311 assert((TargetFlags == 0 || isTarget) &&
1312 "Cannot set target flags on target-independent jump tables");
1313 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1314 FoldingSetNodeID ID;
1315 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1317 ID.AddInteger(TargetFlags);
1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1324 CSEMap.InsertNode(N, IP);
1326 return SDValue(N, 0);
1329 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1330 unsigned Alignment, int Offset,
1332 unsigned char TargetFlags) {
1333 assert((TargetFlags == 0 || isTarget) &&
1334 "Cannot set target flags on target-independent globals");
1336 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1337 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1340 ID.AddInteger(Alignment);
1341 ID.AddInteger(Offset);
1343 ID.AddInteger(TargetFlags);
1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1346 return SDValue(E, 0);
1348 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1349 Alignment, TargetFlags);
1350 CSEMap.InsertNode(N, IP);
1352 return SDValue(N, 0);
1356 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1357 unsigned Alignment, int Offset,
1359 unsigned char TargetFlags) {
1360 assert((TargetFlags == 0 || isTarget) &&
1361 "Cannot set target flags on target-independent globals");
1363 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1364 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1367 ID.AddInteger(Alignment);
1368 ID.AddInteger(Offset);
1369 C->addSelectionDAGCSEId(ID);
1370 ID.AddInteger(TargetFlags);
1372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1373 return SDValue(E, 0);
1375 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1376 Alignment, TargetFlags);
1377 CSEMap.InsertNode(N, IP);
1379 return SDValue(N, 0);
1382 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1383 unsigned char TargetFlags) {
1384 FoldingSetNodeID ID;
1385 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1386 ID.AddInteger(Index);
1387 ID.AddInteger(Offset);
1388 ID.AddInteger(TargetFlags);
1390 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1391 return SDValue(E, 0);
1393 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1395 CSEMap.InsertNode(N, IP);
1397 return SDValue(N, 0);
1400 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1401 FoldingSetNodeID ID;
1402 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1405 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1406 return SDValue(E, 0);
1408 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1409 CSEMap.InsertNode(N, IP);
1411 return SDValue(N, 0);
1414 SDValue SelectionDAG::getValueType(EVT VT) {
1415 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1416 ValueTypeNodes.size())
1417 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1419 SDNode *&N = VT.isExtended() ?
1420 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1422 if (N) return SDValue(N, 0);
1423 N = new (NodeAllocator) VTSDNode(VT);
1425 return SDValue(N, 0);
1428 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1429 SDNode *&N = ExternalSymbols[Sym];
1430 if (N) return SDValue(N, 0);
1431 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1437 unsigned char TargetFlags) {
1439 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1441 if (N) return SDValue(N, 0);
1442 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1444 return SDValue(N, 0);
1447 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1448 if ((unsigned)Cond >= CondCodeNodes.size())
1449 CondCodeNodes.resize(Cond+1);
1451 if (!CondCodeNodes[Cond]) {
1452 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1453 CondCodeNodes[Cond] = N;
1457 return SDValue(CondCodeNodes[Cond], 0);
1460 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1461 // the shuffle mask M that point at N1 to point at N2, and indices that point
1462 // N2 to point at N1.
1463 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1465 ShuffleVectorSDNode::commuteMask(M);
1468 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1469 SDValue N2, const int *Mask) {
1470 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1471 "Invalid VECTOR_SHUFFLE");
1473 // Canonicalize shuffle undef, undef -> undef
1474 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1475 return getUNDEF(VT);
1477 // Validate that all indices in Mask are within the range of the elements
1478 // input to the shuffle.
1479 unsigned NElts = VT.getVectorNumElements();
1480 SmallVector<int, 8> MaskVec;
1481 for (unsigned i = 0; i != NElts; ++i) {
1482 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1483 MaskVec.push_back(Mask[i]);
1486 // Canonicalize shuffle v, v -> v, undef
1489 for (unsigned i = 0; i != NElts; ++i)
1490 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1493 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1494 if (N1.getOpcode() == ISD::UNDEF)
1495 commuteShuffle(N1, N2, MaskVec);
1497 // If shuffling a splat, try to blend the splat instead. We do this here so
1498 // that even when this arises during lowering we don't have to re-handle it.
1499 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1500 BitVector UndefElements;
1501 SDValue Splat = BV->getSplatValue(&UndefElements);
1505 for (int i = 0; i < (int)NElts; ++i) {
1506 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1509 // If this input comes from undef, mark it as such.
1510 if (UndefElements[MaskVec[i] - Offset]) {
1515 // If we can blend a non-undef lane, use that instead.
1516 if (!UndefElements[i])
1517 MaskVec[i] = i + Offset;
1520 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1521 BlendSplat(N1BV, 0);
1522 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1523 BlendSplat(N2BV, NElts);
1525 // Canonicalize all index into lhs, -> shuffle lhs, undef
1526 // Canonicalize all index into rhs, -> shuffle rhs, undef
1527 bool AllLHS = true, AllRHS = true;
1528 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1529 for (unsigned i = 0; i != NElts; ++i) {
1530 if (MaskVec[i] >= (int)NElts) {
1535 } else if (MaskVec[i] >= 0) {
1539 if (AllLHS && AllRHS)
1540 return getUNDEF(VT);
1541 if (AllLHS && !N2Undef)
1545 commuteShuffle(N1, N2, MaskVec);
1547 // Reset our undef status after accounting for the mask.
1548 N2Undef = N2.getOpcode() == ISD::UNDEF;
1549 // Re-check whether both sides ended up undef.
1550 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1551 return getUNDEF(VT);
1553 // If Identity shuffle return that node.
1554 bool Identity = true, AllSame = true;
1555 for (unsigned i = 0; i != NElts; ++i) {
1556 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1557 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1559 if (Identity && NElts)
1562 // Shuffling a constant splat doesn't change the result.
1566 // Look through any bitcasts. We check that these don't change the number
1567 // (and size) of elements and just changes their types.
1568 while (V.getOpcode() == ISD::BITCAST)
1569 V = V->getOperand(0);
1571 // A splat should always show up as a build vector node.
1572 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1573 BitVector UndefElements;
1574 SDValue Splat = BV->getSplatValue(&UndefElements);
1575 // If this is a splat of an undef, shuffling it is also undef.
1576 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1577 return getUNDEF(VT);
1580 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1582 // We only have a splat which can skip shuffles if there is a splatted
1583 // value and no undef lanes rearranged by the shuffle.
1584 if (Splat && UndefElements.none()) {
1585 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1586 // number of elements match or the value splatted is a zero constant.
1589 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1590 if (C->isNullValue())
1594 // If the shuffle itself creates a splat, build the vector directly.
1595 if (AllSame && SameNumElts) {
1596 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1597 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1599 EVT BuildVT = BV->getValueType(0);
1600 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1602 // We may have jumped through bitcasts, so the type of the
1603 // BUILD_VECTOR may not match the type of the shuffle.
1605 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1611 FoldingSetNodeID ID;
1612 SDValue Ops[2] = { N1, N2 };
1613 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1614 for (unsigned i = 0; i != NElts; ++i)
1615 ID.AddInteger(MaskVec[i]);
1618 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1619 return SDValue(E, 0);
1621 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1622 // SDNode doesn't have access to it. This memory will be "leaked" when
1623 // the node is deallocated, but recovered when the NodeAllocator is released.
1624 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1625 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1627 ShuffleVectorSDNode *N =
1628 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1629 dl.getDebugLoc(), N1, N2,
1631 CSEMap.InsertNode(N, IP);
1633 return SDValue(N, 0);
1636 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1637 MVT VT = SV.getSimpleValueType(0);
1638 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1639 ShuffleVectorSDNode::commuteMask(MaskVec);
1641 SDValue Op0 = SV.getOperand(0);
1642 SDValue Op1 = SV.getOperand(1);
1643 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1646 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1647 SDValue Val, SDValue DTy,
1648 SDValue STy, SDValue Rnd, SDValue Sat,
1649 ISD::CvtCode Code) {
1650 // If the src and dest types are the same and the conversion is between
1651 // integer types of the same sign or two floats, no conversion is necessary.
1653 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1656 FoldingSetNodeID ID;
1657 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1658 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1661 return SDValue(E, 0);
1663 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1666 CSEMap.InsertNode(N, IP);
1668 return SDValue(N, 0);
1671 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1672 FoldingSetNodeID ID;
1673 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1674 ID.AddInteger(RegNo);
1676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1677 return SDValue(E, 0);
1679 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1680 CSEMap.InsertNode(N, IP);
1682 return SDValue(N, 0);
1685 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1686 FoldingSetNodeID ID;
1687 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1688 ID.AddPointer(RegMask);
1690 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1691 return SDValue(E, 0);
1693 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1694 CSEMap.InsertNode(N, IP);
1696 return SDValue(N, 0);
1699 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1700 FoldingSetNodeID ID;
1701 SDValue Ops[] = { Root };
1702 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1703 ID.AddPointer(Label);
1705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1706 return SDValue(E, 0);
1708 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1709 dl.getDebugLoc(), Root, Label);
1710 CSEMap.InsertNode(N, IP);
1712 return SDValue(N, 0);
1716 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1719 unsigned char TargetFlags) {
1720 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1722 FoldingSetNodeID ID;
1723 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1725 ID.AddInteger(Offset);
1726 ID.AddInteger(TargetFlags);
1728 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1729 return SDValue(E, 0);
1731 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1733 CSEMap.InsertNode(N, IP);
1735 return SDValue(N, 0);
1738 SDValue SelectionDAG::getSrcValue(const Value *V) {
1739 assert((!V || V->getType()->isPointerTy()) &&
1740 "SrcValue is not a pointer?");
1742 FoldingSetNodeID ID;
1743 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1747 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1748 return SDValue(E, 0);
1750 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1751 CSEMap.InsertNode(N, IP);
1753 return SDValue(N, 0);
1756 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1757 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1758 FoldingSetNodeID ID;
1759 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1764 return SDValue(E, 0);
1766 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1767 CSEMap.InsertNode(N, IP);
1769 return SDValue(N, 0);
1772 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1773 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1774 unsigned SrcAS, unsigned DestAS) {
1775 SDValue Ops[] = {Ptr};
1776 FoldingSetNodeID ID;
1777 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1778 ID.AddInteger(SrcAS);
1779 ID.AddInteger(DestAS);
1782 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1783 return SDValue(E, 0);
1785 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1787 VT, Ptr, SrcAS, DestAS);
1788 CSEMap.InsertNode(N, IP);
1790 return SDValue(N, 0);
1793 /// getShiftAmountOperand - Return the specified value casted to
1794 /// the target's desired shift amount type.
1795 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1796 EVT OpTy = Op.getValueType();
1797 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1798 if (OpTy == ShTy || OpTy.isVector()) return Op;
1800 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1801 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1804 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1805 /// specified value type.
1806 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1807 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1808 unsigned ByteSize = VT.getStoreSize();
1809 Type *Ty = VT.getTypeForEVT(*getContext());
1810 unsigned StackAlign =
1811 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1813 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1814 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1817 /// CreateStackTemporary - Create a stack temporary suitable for holding
1818 /// either of the specified value types.
1819 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1820 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1821 VT2.getStoreSizeInBits())/8;
1822 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1823 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1824 const DataLayout *TD = TLI->getDataLayout();
1825 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1826 TD->getPrefTypeAlignment(Ty2));
1828 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1829 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1830 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1833 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1834 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1835 // These setcc operations always fold.
1839 case ISD::SETFALSE2: return getConstant(0, VT);
1841 case ISD::SETTRUE2: {
1842 TargetLowering::BooleanContent Cnt =
1843 TLI->getBooleanContents(N1->getValueType(0));
1845 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1858 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1862 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1863 const APInt &C2 = N2C->getAPIntValue();
1864 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1865 const APInt &C1 = N1C->getAPIntValue();
1868 default: llvm_unreachable("Unknown integer setcc!");
1869 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1870 case ISD::SETNE: return getConstant(C1 != C2, VT);
1871 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1872 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1873 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1874 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1875 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1876 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1877 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1878 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1882 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1883 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1884 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1887 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1888 return getUNDEF(VT);
1890 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1891 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1892 return getUNDEF(VT);
1894 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1895 R==APFloat::cmpLessThan, VT);
1896 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1897 return getUNDEF(VT);
1899 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1900 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1901 return getUNDEF(VT);
1903 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1904 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1905 return getUNDEF(VT);
1907 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1908 R==APFloat::cmpEqual, VT);
1909 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1910 return getUNDEF(VT);
1912 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1913 R==APFloat::cmpEqual, VT);
1914 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1915 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1916 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1917 R==APFloat::cmpEqual, VT);
1918 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1919 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1920 R==APFloat::cmpLessThan, VT);
1921 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1922 R==APFloat::cmpUnordered, VT);
1923 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1924 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1927 // Ensure that the constant occurs on the RHS.
1928 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1929 MVT CompVT = N1.getValueType().getSimpleVT();
1930 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1933 return getSetCC(dl, VT, N2, N1, SwappedCond);
1937 // Could not fold it.
1941 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1942 /// use this predicate to simplify operations downstream.
1943 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1944 // This predicate is not safe for vector operations.
1945 if (Op.getValueType().isVector())
1948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1949 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1952 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1953 /// this predicate to simplify operations downstream. Mask is known to be zero
1954 /// for bits that V cannot have.
1955 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1956 unsigned Depth) const {
1957 APInt KnownZero, KnownOne;
1958 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1959 return (KnownZero & Mask) == Mask;
1962 /// Determine which bits of Op are known to be either zero or one and return
1963 /// them in the KnownZero/KnownOne bitsets.
1964 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1965 APInt &KnownOne, unsigned Depth) const {
1966 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1968 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1970 return; // Limit search depth.
1972 APInt KnownZero2, KnownOne2;
1974 switch (Op.getOpcode()) {
1976 // We know all of the bits for a constant!
1977 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1978 KnownZero = ~KnownOne;
1981 // If either the LHS or the RHS are Zero, the result is zero.
1982 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1983 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1985 // Output known-1 bits are only known if set in both the LHS & RHS.
1986 KnownOne &= KnownOne2;
1987 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1988 KnownZero |= KnownZero2;
1991 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1992 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1994 // Output known-0 bits are only known if clear in both the LHS & RHS.
1995 KnownZero &= KnownZero2;
1996 // Output known-1 are known to be set if set in either the LHS | RHS.
1997 KnownOne |= KnownOne2;
2000 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2001 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2003 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2004 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2005 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2006 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2007 KnownZero = KnownZeroOut;
2011 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2012 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2014 // If low bits are zero in either operand, output low known-0 bits.
2015 // Also compute a conserative estimate for high known-0 bits.
2016 // More trickiness is possible, but this is sufficient for the
2017 // interesting case of alignment computation.
2018 KnownOne.clearAllBits();
2019 unsigned TrailZ = KnownZero.countTrailingOnes() +
2020 KnownZero2.countTrailingOnes();
2021 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2022 KnownZero2.countLeadingOnes(),
2023 BitWidth) - BitWidth;
2025 TrailZ = std::min(TrailZ, BitWidth);
2026 LeadZ = std::min(LeadZ, BitWidth);
2027 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2028 APInt::getHighBitsSet(BitWidth, LeadZ);
2032 // For the purposes of computing leading zeros we can conservatively
2033 // treat a udiv as a logical right shift by the power of 2 known to
2034 // be less than the denominator.
2035 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2036 unsigned LeadZ = KnownZero2.countLeadingOnes();
2038 KnownOne2.clearAllBits();
2039 KnownZero2.clearAllBits();
2040 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2041 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2042 if (RHSUnknownLeadingOnes != BitWidth)
2043 LeadZ = std::min(BitWidth,
2044 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2046 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2050 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2051 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2053 // Only known if known in both the LHS and RHS.
2054 KnownOne &= KnownOne2;
2055 KnownZero &= KnownZero2;
2057 case ISD::SELECT_CC:
2058 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2059 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2061 // Only known if known in both the LHS and RHS.
2062 KnownOne &= KnownOne2;
2063 KnownZero &= KnownZero2;
2071 if (Op.getResNo() != 1)
2073 // The boolean result conforms to getBooleanContents.
2074 // If we know the result of a setcc has the top bits zero, use this info.
2075 // We know that we have an integer-based boolean since these operations
2076 // are only available for integer.
2077 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2078 TargetLowering::ZeroOrOneBooleanContent &&
2080 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2083 // If we know the result of a setcc has the top bits zero, use this info.
2084 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2085 TargetLowering::ZeroOrOneBooleanContent &&
2087 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2090 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2091 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2092 unsigned ShAmt = SA->getZExtValue();
2094 // If the shift count is an invalid immediate, don't do anything.
2095 if (ShAmt >= BitWidth)
2098 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2099 KnownZero <<= ShAmt;
2101 // low bits known zero.
2102 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2106 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2107 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2108 unsigned ShAmt = SA->getZExtValue();
2110 // If the shift count is an invalid immediate, don't do anything.
2111 if (ShAmt >= BitWidth)
2114 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2115 KnownZero = KnownZero.lshr(ShAmt);
2116 KnownOne = KnownOne.lshr(ShAmt);
2118 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2119 KnownZero |= HighBits; // High bits known zero.
2123 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2124 unsigned ShAmt = SA->getZExtValue();
2126 // If the shift count is an invalid immediate, don't do anything.
2127 if (ShAmt >= BitWidth)
2130 // If any of the demanded bits are produced by the sign extension, we also
2131 // demand the input sign bit.
2132 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2134 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2135 KnownZero = KnownZero.lshr(ShAmt);
2136 KnownOne = KnownOne.lshr(ShAmt);
2138 // Handle the sign bits.
2139 APInt SignBit = APInt::getSignBit(BitWidth);
2140 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2142 if (KnownZero.intersects(SignBit)) {
2143 KnownZero |= HighBits; // New bits are known zero.
2144 } else if (KnownOne.intersects(SignBit)) {
2145 KnownOne |= HighBits; // New bits are known one.
2149 case ISD::SIGN_EXTEND_INREG: {
2150 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2151 unsigned EBits = EVT.getScalarType().getSizeInBits();
2153 // Sign extension. Compute the demanded bits in the result that are not
2154 // present in the input.
2155 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2157 APInt InSignBit = APInt::getSignBit(EBits);
2158 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2160 // If the sign extended bits are demanded, we know that the sign
2162 InSignBit = InSignBit.zext(BitWidth);
2163 if (NewBits.getBoolValue())
2164 InputDemandedBits |= InSignBit;
2166 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2167 KnownOne &= InputDemandedBits;
2168 KnownZero &= InputDemandedBits;
2170 // If the sign bit of the input is known set or clear, then we know the
2171 // top bits of the result.
2172 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2173 KnownZero |= NewBits;
2174 KnownOne &= ~NewBits;
2175 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2176 KnownOne |= NewBits;
2177 KnownZero &= ~NewBits;
2178 } else { // Input sign bit unknown
2179 KnownZero &= ~NewBits;
2180 KnownOne &= ~NewBits;
2185 case ISD::CTTZ_ZERO_UNDEF:
2187 case ISD::CTLZ_ZERO_UNDEF:
2189 unsigned LowBits = Log2_32(BitWidth)+1;
2190 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2191 KnownOne.clearAllBits();
2195 LoadSDNode *LD = cast<LoadSDNode>(Op);
2196 // If this is a ZEXTLoad and we are looking at the loaded value.
2197 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2198 EVT VT = LD->getMemoryVT();
2199 unsigned MemBits = VT.getScalarType().getSizeInBits();
2200 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2201 } else if (const MDNode *Ranges = LD->getRanges()) {
2202 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2206 case ISD::ZERO_EXTEND: {
2207 EVT InVT = Op.getOperand(0).getValueType();
2208 unsigned InBits = InVT.getScalarType().getSizeInBits();
2209 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2210 KnownZero = KnownZero.trunc(InBits);
2211 KnownOne = KnownOne.trunc(InBits);
2212 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2213 KnownZero = KnownZero.zext(BitWidth);
2214 KnownOne = KnownOne.zext(BitWidth);
2215 KnownZero |= NewBits;
2218 case ISD::SIGN_EXTEND: {
2219 EVT InVT = Op.getOperand(0).getValueType();
2220 unsigned InBits = InVT.getScalarType().getSizeInBits();
2221 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2223 KnownZero = KnownZero.trunc(InBits);
2224 KnownOne = KnownOne.trunc(InBits);
2225 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2227 // Note if the sign bit is known to be zero or one.
2228 bool SignBitKnownZero = KnownZero.isNegative();
2229 bool SignBitKnownOne = KnownOne.isNegative();
2231 KnownZero = KnownZero.zext(BitWidth);
2232 KnownOne = KnownOne.zext(BitWidth);
2234 // If the sign bit is known zero or one, the top bits match.
2235 if (SignBitKnownZero)
2236 KnownZero |= NewBits;
2237 else if (SignBitKnownOne)
2238 KnownOne |= NewBits;
2241 case ISD::ANY_EXTEND: {
2242 EVT InVT = Op.getOperand(0).getValueType();
2243 unsigned InBits = InVT.getScalarType().getSizeInBits();
2244 KnownZero = KnownZero.trunc(InBits);
2245 KnownOne = KnownOne.trunc(InBits);
2246 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2247 KnownZero = KnownZero.zext(BitWidth);
2248 KnownOne = KnownOne.zext(BitWidth);
2251 case ISD::TRUNCATE: {
2252 EVT InVT = Op.getOperand(0).getValueType();
2253 unsigned InBits = InVT.getScalarType().getSizeInBits();
2254 KnownZero = KnownZero.zext(InBits);
2255 KnownOne = KnownOne.zext(InBits);
2256 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2257 KnownZero = KnownZero.trunc(BitWidth);
2258 KnownOne = KnownOne.trunc(BitWidth);
2261 case ISD::AssertZext: {
2262 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2263 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2264 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2265 KnownZero |= (~InMask);
2266 KnownOne &= (~KnownZero);
2270 // All bits are zero except the low bit.
2271 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2275 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2276 // We know that the top bits of C-X are clear if X contains less bits
2277 // than C (i.e. no wrap-around can happen). For example, 20-X is
2278 // positive if we can prove that X is >= 0 and < 16.
2279 if (CLHS->getAPIntValue().isNonNegative()) {
2280 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2281 // NLZ can't be BitWidth with no sign bit
2282 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2283 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2285 // If all of the MaskV bits are known to be zero, then we know the
2286 // output top bits are zero, because we now know that the output is
2288 if ((KnownZero2 & MaskV) == MaskV) {
2289 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2290 // Top bits known zero.
2291 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2299 // Output known-0 bits are known if clear or set in both the low clear bits
2300 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2301 // low 3 bits clear.
2302 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2303 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2305 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2306 KnownZeroOut = std::min(KnownZeroOut,
2307 KnownZero2.countTrailingOnes());
2309 if (Op.getOpcode() == ISD::ADD) {
2310 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2314 // With ADDE, a carry bit may be added in, so we can only use this
2315 // information if we know (at least) that the low two bits are clear. We
2316 // then return to the caller that the low bit is unknown but that other bits
2318 if (KnownZeroOut >= 2) // ADDE
2319 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2323 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2324 const APInt &RA = Rem->getAPIntValue().abs();
2325 if (RA.isPowerOf2()) {
2326 APInt LowBits = RA - 1;
2327 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2329 // The low bits of the first operand are unchanged by the srem.
2330 KnownZero = KnownZero2 & LowBits;
2331 KnownOne = KnownOne2 & LowBits;
2333 // If the first operand is non-negative or has all low bits zero, then
2334 // the upper bits are all zero.
2335 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2336 KnownZero |= ~LowBits;
2338 // If the first operand is negative and not all low bits are zero, then
2339 // the upper bits are all one.
2340 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2341 KnownOne |= ~LowBits;
2342 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2347 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2348 const APInt &RA = Rem->getAPIntValue();
2349 if (RA.isPowerOf2()) {
2350 APInt LowBits = (RA - 1);
2351 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2353 // The upper bits are all zero, the lower ones are unchanged.
2354 KnownZero = KnownZero2 | ~LowBits;
2355 KnownOne = KnownOne2 & LowBits;
2360 // Since the result is less than or equal to either operand, any leading
2361 // zero bits in either operand must also exist in the result.
2362 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2363 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2365 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2366 KnownZero2.countLeadingOnes());
2367 KnownOne.clearAllBits();
2368 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2371 case ISD::EXTRACT_ELEMENT: {
2372 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2373 const unsigned Index =
2374 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2375 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2377 // Remove low part of known bits mask
2378 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2379 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2381 // Remove high part of known bit mask
2382 KnownZero = KnownZero.trunc(BitWidth);
2383 KnownOne = KnownOne.trunc(BitWidth);
2386 case ISD::FrameIndex:
2387 case ISD::TargetFrameIndex:
2388 if (unsigned Align = InferPtrAlignment(Op)) {
2389 // The low bits are known zero if the pointer is aligned.
2390 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2396 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2399 case ISD::INTRINSIC_WO_CHAIN:
2400 case ISD::INTRINSIC_W_CHAIN:
2401 case ISD::INTRINSIC_VOID:
2402 // Allow the target to implement this method for its nodes.
2403 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2407 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2410 /// ComputeNumSignBits - Return the number of times the sign bit of the
2411 /// register is replicated into the other bits. We know that at least 1 bit
2412 /// is always equal to the sign bit (itself), but other cases can give us
2413 /// information. For example, immediately after an "SRA X, 2", we know that
2414 /// the top 3 bits are all equal to each other, so we return 3.
2415 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2416 EVT VT = Op.getValueType();
2417 assert(VT.isInteger() && "Invalid VT!");
2418 unsigned VTBits = VT.getScalarType().getSizeInBits();
2420 unsigned FirstAnswer = 1;
2423 return 1; // Limit search depth.
2425 switch (Op.getOpcode()) {
2427 case ISD::AssertSext:
2428 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2429 return VTBits-Tmp+1;
2430 case ISD::AssertZext:
2431 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2434 case ISD::Constant: {
2435 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2436 return Val.getNumSignBits();
2439 case ISD::SIGN_EXTEND:
2441 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2442 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2444 case ISD::SIGN_EXTEND_INREG:
2445 // Max of the input and what this extends.
2447 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2450 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2451 return std::max(Tmp, Tmp2);
2454 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2455 // SRA X, C -> adds C sign bits.
2456 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2457 Tmp += C->getZExtValue();
2458 if (Tmp > VTBits) Tmp = VTBits;
2462 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2463 // shl destroys sign bits.
2464 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2465 if (C->getZExtValue() >= VTBits || // Bad shift.
2466 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2467 return Tmp - C->getZExtValue();
2472 case ISD::XOR: // NOT is handled here.
2473 // Logical binary ops preserve the number of sign bits at the worst.
2474 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2476 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2477 FirstAnswer = std::min(Tmp, Tmp2);
2478 // We computed what we know about the sign bits as our first
2479 // answer. Now proceed to the generic code that uses
2480 // computeKnownBits, and pick whichever answer is better.
2485 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2486 if (Tmp == 1) return 1; // Early out.
2487 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2488 return std::min(Tmp, Tmp2);
2496 if (Op.getResNo() != 1)
2498 // The boolean result conforms to getBooleanContents. Fall through.
2499 // If setcc returns 0/-1, all bits are sign bits.
2500 // We know that we have an integer-based boolean since these operations
2501 // are only available for integer.
2502 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2503 TargetLowering::ZeroOrNegativeOneBooleanContent)
2507 // If setcc returns 0/-1, all bits are sign bits.
2508 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2509 TargetLowering::ZeroOrNegativeOneBooleanContent)
2514 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2515 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2517 // Handle rotate right by N like a rotate left by 32-N.
2518 if (Op.getOpcode() == ISD::ROTR)
2519 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2521 // If we aren't rotating out all of the known-in sign bits, return the
2522 // number that are left. This handles rotl(sext(x), 1) for example.
2523 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2524 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2528 // Add can have at most one carry bit. Thus we know that the output
2529 // is, at worst, one more bit than the inputs.
2530 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2531 if (Tmp == 1) return 1; // Early out.
2533 // Special case decrementing a value (ADD X, -1):
2534 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2535 if (CRHS->isAllOnesValue()) {
2536 APInt KnownZero, KnownOne;
2537 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2539 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2541 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2544 // If we are subtracting one from a positive number, there is no carry
2545 // out of the result.
2546 if (KnownZero.isNegative())
2550 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2551 if (Tmp2 == 1) return 1;
2552 return std::min(Tmp, Tmp2)-1;
2555 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2556 if (Tmp2 == 1) return 1;
2559 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2560 if (CLHS->isNullValue()) {
2561 APInt KnownZero, KnownOne;
2562 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2563 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2565 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2568 // If the input is known to be positive (the sign bit is known clear),
2569 // the output of the NEG has the same number of sign bits as the input.
2570 if (KnownZero.isNegative())
2573 // Otherwise, we treat this like a SUB.
2576 // Sub can have at most one carry bit. Thus we know that the output
2577 // is, at worst, one more bit than the inputs.
2578 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2579 if (Tmp == 1) return 1; // Early out.
2580 return std::min(Tmp, Tmp2)-1;
2582 // FIXME: it's tricky to do anything useful for this, but it is an important
2583 // case for targets like X86.
2585 case ISD::EXTRACT_ELEMENT: {
2586 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2587 const int BitWidth = Op.getValueType().getSizeInBits();
2589 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2591 // Get reverse index (starting from 1), Op1 value indexes elements from
2592 // little end. Sign starts at big end.
2593 const int rIndex = Items - 1 -
2594 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2596 // If the sign portion ends in our element the substraction gives correct
2597 // result. Otherwise it gives either negative or > bitwidth result
2598 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2602 // If we are looking at the loaded value of the SDNode.
2603 if (Op.getResNo() == 0) {
2604 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2605 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2606 unsigned ExtType = LD->getExtensionType();
2609 case ISD::SEXTLOAD: // '17' bits known
2610 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2611 return VTBits-Tmp+1;
2612 case ISD::ZEXTLOAD: // '16' bits known
2613 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2619 // Allow the target to implement this method for its nodes.
2620 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2621 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2622 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2623 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2624 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2625 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2628 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2629 // use this information.
2630 APInt KnownZero, KnownOne;
2631 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2634 if (KnownZero.isNegative()) { // sign bit is 0
2636 } else if (KnownOne.isNegative()) { // sign bit is 1;
2643 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2644 // the number of identical bits in the top of the input value.
2646 Mask <<= Mask.getBitWidth()-VTBits;
2647 // Return # leading zeros. We use 'min' here in case Val was zero before
2648 // shifting. We don't want to return '64' as for an i32 "0".
2649 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2652 /// isBaseWithConstantOffset - Return true if the specified operand is an
2653 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2654 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2655 /// semantics as an ADD. This handles the equivalence:
2656 /// X|Cst == X+Cst iff X&Cst = 0.
2657 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2658 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2659 !isa<ConstantSDNode>(Op.getOperand(1)))
2662 if (Op.getOpcode() == ISD::OR &&
2663 !MaskedValueIsZero(Op.getOperand(0),
2664 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2671 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2672 // If we're told that NaNs won't happen, assume they won't.
2673 if (getTarget().Options.NoNaNsFPMath)
2676 // If the value is a constant, we can obviously see if it is a NaN or not.
2677 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2678 return !C->getValueAPF().isNaN();
2680 // TODO: Recognize more cases here.
2685 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2686 // If the value is a constant, we can obviously see if it is a zero or not.
2687 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2688 return !C->isZero();
2690 // TODO: Recognize more cases here.
2691 switch (Op.getOpcode()) {
2694 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2695 return !C->isNullValue();
2702 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2703 // Check the obvious case.
2704 if (A == B) return true;
2706 // For for negative and positive zero.
2707 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2708 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2709 if (CA->isZero() && CB->isZero()) return true;
2711 // Otherwise they may not be equal.
2715 /// getNode - Gets or creates the specified node.
2717 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2718 FoldingSetNodeID ID;
2719 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2722 return SDValue(E, 0);
2724 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2725 DL.getDebugLoc(), getVTList(VT));
2726 CSEMap.InsertNode(N, IP);
2729 return SDValue(N, 0);
2732 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2733 EVT VT, SDValue Operand) {
2734 // Constant fold unary operations with an integer constant operand. Even
2735 // opaque constant will be folded, because the folding of unary operations
2736 // doesn't create new constants with different values. Nevertheless, the
2737 // opaque flag is preserved during folding to prevent future folding with
2739 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2740 const APInt &Val = C->getAPIntValue();
2743 case ISD::SIGN_EXTEND:
2744 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2745 C->isTargetOpcode(), C->isOpaque());
2746 case ISD::ANY_EXTEND:
2747 case ISD::ZERO_EXTEND:
2749 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2750 C->isTargetOpcode(), C->isOpaque());
2751 case ISD::UINT_TO_FP:
2752 case ISD::SINT_TO_FP: {
2753 APFloat apf(EVTToAPFloatSemantics(VT),
2754 APInt::getNullValue(VT.getSizeInBits()));
2755 (void)apf.convertFromAPInt(Val,
2756 Opcode==ISD::SINT_TO_FP,
2757 APFloat::rmNearestTiesToEven);
2758 return getConstantFP(apf, VT);
2761 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2762 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), VT);
2763 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2764 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2765 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2766 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2769 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2772 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2775 case ISD::CTLZ_ZERO_UNDEF:
2776 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2779 case ISD::CTTZ_ZERO_UNDEF:
2780 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2785 // Constant fold unary operations with a floating point constant operand.
2786 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2787 APFloat V = C->getValueAPF(); // make copy
2791 return getConstantFP(V, VT);
2794 return getConstantFP(V, VT);
2796 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2797 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2798 return getConstantFP(V, VT);
2802 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2803 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2804 return getConstantFP(V, VT);
2808 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2809 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2810 return getConstantFP(V, VT);
2813 case ISD::FP_EXTEND: {
2815 // This can return overflow, underflow, or inexact; we don't care.
2816 // FIXME need to be more flexible about rounding mode.
2817 (void)V.convert(EVTToAPFloatSemantics(VT),
2818 APFloat::rmNearestTiesToEven, &ignored);
2819 return getConstantFP(V, VT);
2821 case ISD::FP_TO_SINT:
2822 case ISD::FP_TO_UINT: {
2825 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2826 // FIXME need to be more flexible about rounding mode.
2827 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2828 Opcode==ISD::FP_TO_SINT,
2829 APFloat::rmTowardZero, &ignored);
2830 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2832 APInt api(VT.getSizeInBits(), x);
2833 return getConstant(api, VT);
2836 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2837 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), VT);
2838 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2839 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2840 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2841 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2846 // Constant fold unary operations with a vector integer or float operand.
2847 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2848 if (BV->isConstant()) {
2851 // FIXME: Entirely reasonable to perform folding of other unary
2852 // operations here as the need arises.
2856 case ISD::FP_EXTEND:
2858 case ISD::UINT_TO_FP:
2859 case ISD::SINT_TO_FP: {
2860 // Let the above scalar folding handle the folding of each element.
2861 SmallVector<SDValue, 8> Ops;
2862 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2863 SDValue OpN = BV->getOperand(i);
2864 OpN = getNode(Opcode, DL, VT.getVectorElementType(), OpN);
2865 if (OpN.getOpcode() != ISD::UNDEF &&
2866 OpN.getOpcode() != ISD::Constant &&
2867 OpN.getOpcode() != ISD::ConstantFP)
2871 if (Ops.size() == VT.getVectorNumElements())
2872 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2878 unsigned OpOpcode = Operand.getNode()->getOpcode();
2880 case ISD::TokenFactor:
2881 case ISD::MERGE_VALUES:
2882 case ISD::CONCAT_VECTORS:
2883 return Operand; // Factor, merge or concat of one node? No need.
2884 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2885 case ISD::FP_EXTEND:
2886 assert(VT.isFloatingPoint() &&
2887 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2888 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2889 assert((!VT.isVector() ||
2890 VT.getVectorNumElements() ==
2891 Operand.getValueType().getVectorNumElements()) &&
2892 "Vector element count mismatch!");
2893 if (Operand.getOpcode() == ISD::UNDEF)
2894 return getUNDEF(VT);
2896 case ISD::SIGN_EXTEND:
2897 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2898 "Invalid SIGN_EXTEND!");
2899 if (Operand.getValueType() == VT) return Operand; // noop extension
2900 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2901 "Invalid sext node, dst < src!");
2902 assert((!VT.isVector() ||
2903 VT.getVectorNumElements() ==
2904 Operand.getValueType().getVectorNumElements()) &&
2905 "Vector element count mismatch!");
2906 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2907 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2908 else if (OpOpcode == ISD::UNDEF)
2909 // sext(undef) = 0, because the top bits will all be the same.
2910 return getConstant(0, VT);
2912 case ISD::ZERO_EXTEND:
2913 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2914 "Invalid ZERO_EXTEND!");
2915 if (Operand.getValueType() == VT) return Operand; // noop extension
2916 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2917 "Invalid zext node, dst < src!");
2918 assert((!VT.isVector() ||
2919 VT.getVectorNumElements() ==
2920 Operand.getValueType().getVectorNumElements()) &&
2921 "Vector element count mismatch!");
2922 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2923 return getNode(ISD::ZERO_EXTEND, DL, VT,
2924 Operand.getNode()->getOperand(0));
2925 else if (OpOpcode == ISD::UNDEF)
2926 // zext(undef) = 0, because the top bits will be zero.
2927 return getConstant(0, VT);
2929 case ISD::ANY_EXTEND:
2930 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2931 "Invalid ANY_EXTEND!");
2932 if (Operand.getValueType() == VT) return Operand; // noop extension
2933 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2934 "Invalid anyext node, dst < src!");
2935 assert((!VT.isVector() ||
2936 VT.getVectorNumElements() ==
2937 Operand.getValueType().getVectorNumElements()) &&
2938 "Vector element count mismatch!");
2940 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2941 OpOpcode == ISD::ANY_EXTEND)
2942 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2943 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2944 else if (OpOpcode == ISD::UNDEF)
2945 return getUNDEF(VT);
2947 // (ext (trunx x)) -> x
2948 if (OpOpcode == ISD::TRUNCATE) {
2949 SDValue OpOp = Operand.getNode()->getOperand(0);
2950 if (OpOp.getValueType() == VT)
2955 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2956 "Invalid TRUNCATE!");
2957 if (Operand.getValueType() == VT) return Operand; // noop truncate
2958 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2959 "Invalid truncate node, src < dst!");
2960 assert((!VT.isVector() ||
2961 VT.getVectorNumElements() ==
2962 Operand.getValueType().getVectorNumElements()) &&
2963 "Vector element count mismatch!");
2964 if (OpOpcode == ISD::TRUNCATE)
2965 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2966 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2967 OpOpcode == ISD::ANY_EXTEND) {
2968 // If the source is smaller than the dest, we still need an extend.
2969 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2970 .bitsLT(VT.getScalarType()))
2971 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2972 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2973 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2974 return Operand.getNode()->getOperand(0);
2976 if (OpOpcode == ISD::UNDEF)
2977 return getUNDEF(VT);
2980 // Basic sanity checking.
2981 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2982 && "Cannot BITCAST between types of different sizes!");
2983 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2984 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2985 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2986 if (OpOpcode == ISD::UNDEF)
2987 return getUNDEF(VT);
2989 case ISD::SCALAR_TO_VECTOR:
2990 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2991 (VT.getVectorElementType() == Operand.getValueType() ||
2992 (VT.getVectorElementType().isInteger() &&
2993 Operand.getValueType().isInteger() &&
2994 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2995 "Illegal SCALAR_TO_VECTOR node!");
2996 if (OpOpcode == ISD::UNDEF)
2997 return getUNDEF(VT);
2998 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2999 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3000 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3001 Operand.getConstantOperandVal(1) == 0 &&
3002 Operand.getOperand(0).getValueType() == VT)
3003 return Operand.getOperand(0);
3006 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3007 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3008 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3009 Operand.getNode()->getOperand(0));
3010 if (OpOpcode == ISD::FNEG) // --X -> X
3011 return Operand.getNode()->getOperand(0);
3014 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3015 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3020 SDVTList VTs = getVTList(VT);
3021 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3022 FoldingSetNodeID ID;
3023 SDValue Ops[1] = { Operand };
3024 AddNodeIDNode(ID, Opcode, VTs, Ops);
3026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3027 return SDValue(E, 0);
3029 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3030 DL.getDebugLoc(), VTs, Operand);
3031 CSEMap.InsertNode(N, IP);
3033 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3034 DL.getDebugLoc(), VTs, Operand);
3038 return SDValue(N, 0);
3041 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
3042 SDNode *Cst1, SDNode *Cst2) {
3043 // If the opcode is a target-specific ISD node, there's nothing we can
3044 // do here and the operand rules may not line up with the below, so
3046 if (Opcode >= ISD::BUILTIN_OP_END)
3049 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
3050 SmallVector<SDValue, 4> Outputs;
3051 EVT SVT = VT.getScalarType();
3053 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
3054 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
3055 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
3058 if (Scalar1 && Scalar2)
3059 // Scalar instruction.
3060 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
3062 // For vectors extract each constant element into Inputs so we can constant
3063 // fold them individually.
3064 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3065 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3069 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3071 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3072 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3073 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3074 if (!V1 || !V2) // Not a constant, bail.
3077 if (V1->isOpaque() || V2->isOpaque())
3080 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3081 // FIXME: This is valid and could be handled by truncating the APInts.
3082 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3085 Inputs.push_back(std::make_pair(V1, V2));
3089 // We have a number of constant values, constant fold them element by element.
3090 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3091 const APInt &C1 = Inputs[I].first->getAPIntValue();
3092 const APInt &C2 = Inputs[I].second->getAPIntValue();
3096 Outputs.push_back(getConstant(C1 + C2, SVT));
3099 Outputs.push_back(getConstant(C1 - C2, SVT));
3102 Outputs.push_back(getConstant(C1 * C2, SVT));
3105 if (!C2.getBoolValue())
3107 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3110 if (!C2.getBoolValue())
3112 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3115 if (!C2.getBoolValue())
3117 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3120 if (!C2.getBoolValue())
3122 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3125 Outputs.push_back(getConstant(C1 & C2, SVT));
3128 Outputs.push_back(getConstant(C1 | C2, SVT));
3131 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3134 Outputs.push_back(getConstant(C1 << C2, SVT));
3137 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3140 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3143 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3146 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3153 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3154 "Expected a scalar or vector!"));
3156 // Handle the scalar case first.
3158 return Outputs.back();
3160 // We may have a vector type but a scalar result. Create a splat.
3161 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3163 // Build a big vector out of the scalar elements we generated.
3164 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3167 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3168 SDValue N2, bool nuw, bool nsw, bool exact) {
3169 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3170 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3173 case ISD::TokenFactor:
3174 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3175 N2.getValueType() == MVT::Other && "Invalid token factor!");
3176 // Fold trivial token factors.
3177 if (N1.getOpcode() == ISD::EntryToken) return N2;
3178 if (N2.getOpcode() == ISD::EntryToken) return N1;
3179 if (N1 == N2) return N1;
3181 case ISD::CONCAT_VECTORS:
3182 // Concat of UNDEFs is UNDEF.
3183 if (N1.getOpcode() == ISD::UNDEF &&
3184 N2.getOpcode() == ISD::UNDEF)
3185 return getUNDEF(VT);
3187 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3188 // one big BUILD_VECTOR.
3189 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3190 N2.getOpcode() == ISD::BUILD_VECTOR) {
3191 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3192 N1.getNode()->op_end());
3193 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3194 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3198 assert(VT.isInteger() && "This operator does not apply to FP types!");
3199 assert(N1.getValueType() == N2.getValueType() &&
3200 N1.getValueType() == VT && "Binary operator types must match!");
3201 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3202 // worth handling here.
3203 if (N2C && N2C->isNullValue())
3205 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3212 assert(VT.isInteger() && "This operator does not apply to FP types!");
3213 assert(N1.getValueType() == N2.getValueType() &&
3214 N1.getValueType() == VT && "Binary operator types must match!");
3215 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3216 // it's worth handling here.
3217 if (N2C && N2C->isNullValue())
3227 assert(VT.isInteger() && "This operator does not apply to FP types!");
3228 assert(N1.getValueType() == N2.getValueType() &&
3229 N1.getValueType() == VT && "Binary operator types must match!");
3236 if (getTarget().Options.UnsafeFPMath) {
3237 if (Opcode == ISD::FADD) {
3239 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3240 if (CFP->getValueAPF().isZero())
3243 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3244 if (CFP->getValueAPF().isZero())
3246 } else if (Opcode == ISD::FSUB) {
3248 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3249 if (CFP->getValueAPF().isZero())
3251 } else if (Opcode == ISD::FMUL) {
3252 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3255 // If the first operand isn't the constant, try the second
3257 CFP = dyn_cast<ConstantFPSDNode>(N2);
3264 return SDValue(CFP,0);
3266 if (CFP->isExactlyValue(1.0))
3271 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3272 assert(N1.getValueType() == N2.getValueType() &&
3273 N1.getValueType() == VT && "Binary operator types must match!");
3275 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3276 assert(N1.getValueType() == VT &&
3277 N1.getValueType().isFloatingPoint() &&
3278 N2.getValueType().isFloatingPoint() &&
3279 "Invalid FCOPYSIGN!");
3286 assert(VT == N1.getValueType() &&
3287 "Shift operators return type must be the same as their first arg");
3288 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3289 "Shifts only work on integers");
3290 assert((!VT.isVector() || VT == N2.getValueType()) &&
3291 "Vector shift amounts must be in the same as their first arg");
3292 // Verify that the shift amount VT is bit enough to hold valid shift
3293 // amounts. This catches things like trying to shift an i1024 value by an
3294 // i8, which is easy to fall into in generic code that uses
3295 // TLI.getShiftAmount().
3296 assert(N2.getValueType().getSizeInBits() >=
3297 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3298 "Invalid use of small shift amount with oversized value!");
3300 // Always fold shifts of i1 values so the code generator doesn't need to
3301 // handle them. Since we know the size of the shift has to be less than the
3302 // size of the value, the shift/rotate count is guaranteed to be zero.
3305 if (N2C && N2C->isNullValue())
3308 case ISD::FP_ROUND_INREG: {
3309 EVT EVT = cast<VTSDNode>(N2)->getVT();
3310 assert(VT == N1.getValueType() && "Not an inreg round!");
3311 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3312 "Cannot FP_ROUND_INREG integer types");
3313 assert(EVT.isVector() == VT.isVector() &&
3314 "FP_ROUND_INREG type should be vector iff the operand "
3316 assert((!EVT.isVector() ||
3317 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3318 "Vector element counts must match in FP_ROUND_INREG");
3319 assert(EVT.bitsLE(VT) && "Not rounding down!");
3321 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3325 assert(VT.isFloatingPoint() &&
3326 N1.getValueType().isFloatingPoint() &&
3327 VT.bitsLE(N1.getValueType()) &&
3328 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3329 if (N1.getValueType() == VT) return N1; // noop conversion.
3331 case ISD::AssertSext:
3332 case ISD::AssertZext: {
3333 EVT EVT = cast<VTSDNode>(N2)->getVT();
3334 assert(VT == N1.getValueType() && "Not an inreg extend!");
3335 assert(VT.isInteger() && EVT.isInteger() &&
3336 "Cannot *_EXTEND_INREG FP types");
3337 assert(!EVT.isVector() &&
3338 "AssertSExt/AssertZExt type should be the vector element type "
3339 "rather than the vector type!");
3340 assert(EVT.bitsLE(VT) && "Not extending!");
3341 if (VT == EVT) return N1; // noop assertion.
3344 case ISD::SIGN_EXTEND_INREG: {
3345 EVT EVT = cast<VTSDNode>(N2)->getVT();
3346 assert(VT == N1.getValueType() && "Not an inreg extend!");
3347 assert(VT.isInteger() && EVT.isInteger() &&
3348 "Cannot *_EXTEND_INREG FP types");
3349 assert(EVT.isVector() == VT.isVector() &&
3350 "SIGN_EXTEND_INREG type should be vector iff the operand "
3352 assert((!EVT.isVector() ||
3353 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3354 "Vector element counts must match in SIGN_EXTEND_INREG");
3355 assert(EVT.bitsLE(VT) && "Not extending!");
3356 if (EVT == VT) return N1; // Not actually extending
3359 APInt Val = N1C->getAPIntValue();
3360 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3361 Val <<= Val.getBitWidth()-FromBits;
3362 Val = Val.ashr(Val.getBitWidth()-FromBits);
3363 return getConstant(Val, VT);
3367 case ISD::EXTRACT_VECTOR_ELT:
3368 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3369 if (N1.getOpcode() == ISD::UNDEF)
3370 return getUNDEF(VT);
3372 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3373 // expanding copies of large vectors from registers.
3375 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3376 N1.getNumOperands() > 0) {
3378 N1.getOperand(0).getValueType().getVectorNumElements();
3379 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3380 N1.getOperand(N2C->getZExtValue() / Factor),
3381 getConstant(N2C->getZExtValue() % Factor,
3382 N2.getValueType()));
3385 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3386 // expanding large vector constants.
3387 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3388 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3390 if (VT != Elt.getValueType())
3391 // If the vector element type is not legal, the BUILD_VECTOR operands
3392 // are promoted and implicitly truncated, and the result implicitly
3393 // extended. Make that explicit here.
3394 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3399 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3400 // operations are lowered to scalars.
3401 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3402 // If the indices are the same, return the inserted element else
3403 // if the indices are known different, extract the element from
3404 // the original vector.
3405 SDValue N1Op2 = N1.getOperand(2);
3406 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3408 if (N1Op2C && N2C) {
3409 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3410 if (VT == N1.getOperand(1).getValueType())
3411 return N1.getOperand(1);
3413 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3416 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3420 case ISD::EXTRACT_ELEMENT:
3421 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3422 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3423 (N1.getValueType().isInteger() == VT.isInteger()) &&
3424 N1.getValueType() != VT &&
3425 "Wrong types for EXTRACT_ELEMENT!");
3427 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3428 // 64-bit integers into 32-bit parts. Instead of building the extract of
3429 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3430 if (N1.getOpcode() == ISD::BUILD_PAIR)
3431 return N1.getOperand(N2C->getZExtValue());
3433 // EXTRACT_ELEMENT of a constant int is also very common.
3434 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3435 unsigned ElementSize = VT.getSizeInBits();
3436 unsigned Shift = ElementSize * N2C->getZExtValue();
3437 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3438 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3441 case ISD::EXTRACT_SUBVECTOR: {
3443 if (VT.isSimple() && N1.getValueType().isSimple()) {
3444 assert(VT.isVector() && N1.getValueType().isVector() &&
3445 "Extract subvector VTs must be a vectors!");
3446 assert(VT.getVectorElementType() ==
3447 N1.getValueType().getVectorElementType() &&
3448 "Extract subvector VTs must have the same element type!");
3449 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3450 "Extract subvector must be from larger vector to smaller vector!");
3452 if (isa<ConstantSDNode>(Index.getNode())) {
3453 assert((VT.getVectorNumElements() +
3454 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3455 <= N1.getValueType().getVectorNumElements())
3456 && "Extract subvector overflow!");
3459 // Trivial extraction.
3460 if (VT.getSimpleVT() == N1.getSimpleValueType())
3467 // Perform trivial constant folding.
3469 FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()))
3472 // Canonicalize constant to RHS if commutative.
3473 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3474 std::swap(N1C, N2C);
3478 // Constant fold FP operations.
3479 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3480 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3481 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3483 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3484 // Canonicalize constant to RHS if commutative.
3485 std::swap(N1CFP, N2CFP);
3488 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3489 APFloat::opStatus s;
3492 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3493 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3494 return getConstantFP(V1, VT);
3497 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3498 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3499 return getConstantFP(V1, VT);
3502 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3503 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3504 return getConstantFP(V1, VT);
3507 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3508 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3509 s!=APFloat::opDivByZero)) {
3510 return getConstantFP(V1, VT);
3514 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3515 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3516 s!=APFloat::opDivByZero)) {
3517 return getConstantFP(V1, VT);
3520 case ISD::FCOPYSIGN:
3522 return getConstantFP(V1, VT);
3527 if (Opcode == ISD::FP_ROUND) {
3528 APFloat V = N1CFP->getValueAPF(); // make copy
3530 // This can return overflow, underflow, or inexact; we don't care.
3531 // FIXME need to be more flexible about rounding mode.
3532 (void)V.convert(EVTToAPFloatSemantics(VT),
3533 APFloat::rmNearestTiesToEven, &ignored);
3534 return getConstantFP(V, VT);
3538 // Canonicalize an UNDEF to the RHS, even over a constant.
3539 if (N1.getOpcode() == ISD::UNDEF) {
3540 if (isCommutativeBinOp(Opcode)) {
3544 case ISD::FP_ROUND_INREG:
3545 case ISD::SIGN_EXTEND_INREG:
3551 return N1; // fold op(undef, arg2) -> undef
3559 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3560 // For vectors, we can't easily build an all zero vector, just return
3567 // Fold a bunch of operators when the RHS is undef.
3568 if (N2.getOpcode() == ISD::UNDEF) {
3571 if (N1.getOpcode() == ISD::UNDEF)
3572 // Handle undef ^ undef -> 0 special case. This is a common
3574 return getConstant(0, VT);
3584 return N2; // fold op(arg1, undef) -> undef
3590 if (getTarget().Options.UnsafeFPMath)
3598 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3599 // For vectors, we can't easily build an all zero vector, just return
3604 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3605 // For vectors, we can't easily build an all one vector, just return
3613 // Memoize this node if possible.
3615 SDVTList VTs = getVTList(VT);
3616 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3617 if (VT != MVT::Glue) {
3618 SDValue Ops[] = {N1, N2};
3619 FoldingSetNodeID ID;
3620 AddNodeIDNode(ID, Opcode, VTs, Ops);
3622 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3625 return SDValue(E, 0);
3627 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3629 CSEMap.InsertNode(N, IP);
3632 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3636 return SDValue(N, 0);
3639 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3640 SDValue N1, SDValue N2, SDValue N3) {
3641 // Perform various simplifications.
3642 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3645 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3646 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3647 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3648 if (N1CFP && N2CFP && N3CFP) {
3649 APFloat V1 = N1CFP->getValueAPF();
3650 const APFloat &V2 = N2CFP->getValueAPF();
3651 const APFloat &V3 = N3CFP->getValueAPF();
3652 APFloat::opStatus s =
3653 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3654 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3655 return getConstantFP(V1, VT);
3659 case ISD::CONCAT_VECTORS:
3660 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3661 // one big BUILD_VECTOR.
3662 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3663 N2.getOpcode() == ISD::BUILD_VECTOR &&
3664 N3.getOpcode() == ISD::BUILD_VECTOR) {
3665 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3666 N1.getNode()->op_end());
3667 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3668 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3669 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3673 // Use FoldSetCC to simplify SETCC's.
3674 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3675 if (Simp.getNode()) return Simp;
3680 if (N1C->getZExtValue())
3681 return N2; // select true, X, Y -> X
3682 return N3; // select false, X, Y -> Y
3685 if (N2 == N3) return N2; // select C, X, X -> X
3687 case ISD::VECTOR_SHUFFLE:
3688 llvm_unreachable("should use getVectorShuffle constructor!");
3689 case ISD::INSERT_SUBVECTOR: {
3691 if (VT.isSimple() && N1.getValueType().isSimple()
3692 && N2.getValueType().isSimple()) {
3693 assert(VT.isVector() && N1.getValueType().isVector() &&
3694 N2.getValueType().isVector() &&
3695 "Insert subvector VTs must be a vectors");
3696 assert(VT == N1.getValueType() &&
3697 "Dest and insert subvector source types must match!");
3698 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3699 "Insert subvector must be from smaller vector to larger vector!");
3700 if (isa<ConstantSDNode>(Index.getNode())) {
3701 assert((N2.getValueType().getVectorNumElements() +
3702 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3703 <= VT.getVectorNumElements())
3704 && "Insert subvector overflow!");
3707 // Trivial insertion.
3708 if (VT.getSimpleVT() == N2.getSimpleValueType())
3714 // Fold bit_convert nodes from a type to themselves.
3715 if (N1.getValueType() == VT)
3720 // Memoize node if it doesn't produce a flag.
3722 SDVTList VTs = getVTList(VT);
3723 if (VT != MVT::Glue) {
3724 SDValue Ops[] = { N1, N2, N3 };
3725 FoldingSetNodeID ID;
3726 AddNodeIDNode(ID, Opcode, VTs, Ops);
3728 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3729 return SDValue(E, 0);
3731 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3732 DL.getDebugLoc(), VTs, N1, N2, N3);
3733 CSEMap.InsertNode(N, IP);
3735 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3736 DL.getDebugLoc(), VTs, N1, N2, N3);
3740 return SDValue(N, 0);
3743 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3744 SDValue N1, SDValue N2, SDValue N3,
3746 SDValue Ops[] = { N1, N2, N3, N4 };
3747 return getNode(Opcode, DL, VT, Ops);
3750 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3751 SDValue N1, SDValue N2, SDValue N3,
3752 SDValue N4, SDValue N5) {
3753 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3754 return getNode(Opcode, DL, VT, Ops);
3757 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3758 /// the incoming stack arguments to be loaded from the stack.
3759 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3760 SmallVector<SDValue, 8> ArgChains;
3762 // Include the original chain at the beginning of the list. When this is
3763 // used by target LowerCall hooks, this helps legalize find the
3764 // CALLSEQ_BEGIN node.
3765 ArgChains.push_back(Chain);
3767 // Add a chain value for each stack argument.
3768 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3769 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3770 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3771 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3772 if (FI->getIndex() < 0)
3773 ArgChains.push_back(SDValue(L, 1));
3775 // Build a tokenfactor for all the chains.
3776 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3779 /// getMemsetValue - Vectorized representation of the memset value
3781 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3783 assert(Value.getOpcode() != ISD::UNDEF);
3785 unsigned NumBits = VT.getScalarType().getSizeInBits();
3786 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3787 assert(C->getAPIntValue().getBitWidth() == 8);
3788 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3790 return DAG.getConstant(Val, VT);
3791 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3794 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
3795 EVT IntVT = VT.getScalarType();
3796 if (!IntVT.isInteger())
3797 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
3799 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
3801 // Use a multiplication with 0x010101... to extend the input to the
3803 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3804 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
3805 DAG.getConstant(Magic, IntVT));
3808 if (VT != Value.getValueType() && !VT.isInteger())
3809 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
3810 if (VT != Value.getValueType()) {
3811 assert(VT.getVectorElementType() == Value.getValueType() &&
3812 "value type should be one vector element here");
3813 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
3814 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
3820 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3821 /// used when a memcpy is turned into a memset when the source is a constant
3823 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3824 const TargetLowering &TLI, StringRef Str) {
3825 // Handle vector with all elements zero.
3828 return DAG.getConstant(0, VT);
3829 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3830 return DAG.getConstantFP(0.0, VT);
3831 else if (VT.isVector()) {
3832 unsigned NumElts = VT.getVectorNumElements();
3833 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3834 return DAG.getNode(ISD::BITCAST, dl, VT,
3835 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3838 llvm_unreachable("Expected type!");
3841 assert(!VT.isVector() && "Can't handle vector type here!");
3842 unsigned NumVTBits = VT.getSizeInBits();
3843 unsigned NumVTBytes = NumVTBits / 8;
3844 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3846 APInt Val(NumVTBits, 0);
3847 if (TLI.isLittleEndian()) {
3848 for (unsigned i = 0; i != NumBytes; ++i)
3849 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3851 for (unsigned i = 0; i != NumBytes; ++i)
3852 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3855 // If the "cost" of materializing the integer immediate is less than the cost
3856 // of a load, then it is cost effective to turn the load into the immediate.
3857 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3858 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3859 return DAG.getConstant(Val, VT);
3860 return SDValue(nullptr, 0);
3863 /// getMemBasePlusOffset - Returns base and offset node for the
3865 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3866 SelectionDAG &DAG) {
3867 EVT VT = Base.getValueType();
3868 return DAG.getNode(ISD::ADD, dl,
3869 VT, Base, DAG.getConstant(Offset, VT));
3872 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3874 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3875 unsigned SrcDelta = 0;
3876 GlobalAddressSDNode *G = nullptr;
3877 if (Src.getOpcode() == ISD::GlobalAddress)
3878 G = cast<GlobalAddressSDNode>(Src);
3879 else if (Src.getOpcode() == ISD::ADD &&
3880 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3881 Src.getOperand(1).getOpcode() == ISD::Constant) {
3882 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3883 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3888 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3891 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3892 /// to replace the memset / memcpy. Return true if the number of memory ops
3893 /// is below the threshold. It returns the types of the sequence of
3894 /// memory ops to perform memset / memcpy by reference.
3895 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3896 unsigned Limit, uint64_t Size,
3897 unsigned DstAlign, unsigned SrcAlign,
3903 const TargetLowering &TLI) {
3904 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3905 "Expecting memcpy / memset source to meet alignment requirement!");
3906 // If 'SrcAlign' is zero, that means the memory operation does not need to
3907 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3908 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3909 // is the specified alignment of the memory operation. If it is zero, that
3910 // means it's possible to change the alignment of the destination.
3911 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3912 // not need to be loaded.
3913 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3914 IsMemset, ZeroMemset, MemcpyStrSrc,
3915 DAG.getMachineFunction());
3917 if (VT == MVT::Other) {
3919 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3920 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3921 VT = TLI.getPointerTy();
3923 switch (DstAlign & 7) {
3924 case 0: VT = MVT::i64; break;
3925 case 4: VT = MVT::i32; break;
3926 case 2: VT = MVT::i16; break;
3927 default: VT = MVT::i8; break;
3932 while (!TLI.isTypeLegal(LVT))
3933 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3934 assert(LVT.isInteger());
3940 unsigned NumMemOps = 0;
3942 unsigned VTSize = VT.getSizeInBits() / 8;
3943 while (VTSize > Size) {
3944 // For now, only use non-vector load / store's for the left-over pieces.
3949 if (VT.isVector() || VT.isFloatingPoint()) {
3950 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3951 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3952 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3954 else if (NewVT == MVT::i64 &&
3955 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3956 TLI.isSafeMemOpType(MVT::f64)) {
3957 // i64 is usually not legal on 32-bit targets, but f64 may be.
3965 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3966 if (NewVT == MVT::i8)
3968 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3970 NewVTSize = NewVT.getSizeInBits() / 8;
3972 // If the new VT cannot cover all of the remaining bits, then consider
3973 // issuing a (or a pair of) unaligned and overlapping load / store.
3974 // FIXME: Only does this for 64-bit or more since we don't have proper
3975 // cost model for unaligned load / store.
3978 if (NumMemOps && AllowOverlap &&
3979 VTSize >= 8 && NewVTSize < Size &&
3980 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3988 if (++NumMemOps > Limit)
3991 MemOps.push_back(VT);
3998 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3999 SDValue Chain, SDValue Dst,
4000 SDValue Src, uint64_t Size,
4001 unsigned Align, bool isVol,
4003 MachinePointerInfo DstPtrInfo,
4004 MachinePointerInfo SrcPtrInfo) {
4005 // Turn a memcpy of undef to nop.
4006 if (Src.getOpcode() == ISD::UNDEF)
4009 // Expand memcpy to a series of load and store ops if the size operand falls
4010 // below a certain threshold.
4011 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4012 // rather than maybe a humongous number of loads and stores.
4013 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4014 std::vector<EVT> MemOps;
4015 bool DstAlignCanChange = false;
4016 MachineFunction &MF = DAG.getMachineFunction();
4017 MachineFrameInfo *MFI = MF.getFrameInfo();
4018 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4019 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4020 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4021 DstAlignCanChange = true;
4022 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4023 if (Align > SrcAlign)
4026 bool CopyFromStr = isMemSrcFromString(Src, Str);
4027 bool isZeroStr = CopyFromStr && Str.empty();
4028 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4030 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4031 (DstAlignCanChange ? 0 : Align),
4032 (isZeroStr ? 0 : SrcAlign),
4033 false, false, CopyFromStr, true, DAG, TLI))
4036 if (DstAlignCanChange) {
4037 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4038 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4040 // Don't promote to an alignment that would require dynamic stack
4042 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4043 if (!TRI->needsStackRealignment(MF))
4044 while (NewAlign > Align &&
4045 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
4048 if (NewAlign > Align) {
4049 // Give the stack frame object a larger alignment if needed.
4050 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4051 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4056 SmallVector<SDValue, 8> OutChains;
4057 unsigned NumMemOps = MemOps.size();
4058 uint64_t SrcOff = 0, DstOff = 0;
4059 for (unsigned i = 0; i != NumMemOps; ++i) {
4061 unsigned VTSize = VT.getSizeInBits() / 8;
4062 SDValue Value, Store;
4064 if (VTSize > Size) {
4065 // Issuing an unaligned load / store pair that overlaps with the previous
4066 // pair. Adjust the offset accordingly.
4067 assert(i == NumMemOps-1 && i != 0);
4068 SrcOff -= VTSize - Size;
4069 DstOff -= VTSize - Size;
4073 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4074 // It's unlikely a store of a vector immediate can be done in a single
4075 // instruction. It would require a load from a constantpool first.
4076 // We only handle zero vectors here.
4077 // FIXME: Handle other cases where store of vector immediate is done in
4078 // a single instruction.
4079 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4080 if (Value.getNode())
4081 Store = DAG.getStore(Chain, dl, Value,
4082 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4083 DstPtrInfo.getWithOffset(DstOff), isVol,
4087 if (!Store.getNode()) {
4088 // The type might not be legal for the target. This should only happen
4089 // if the type is smaller than a legal type, as on PPC, so the right
4090 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4091 // to Load/Store if NVT==VT.
4092 // FIXME does the case above also need this?
4093 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4094 assert(NVT.bitsGE(VT));
4095 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4096 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4097 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4098 false, MinAlign(SrcAlign, SrcOff));
4099 Store = DAG.getTruncStore(Chain, dl, Value,
4100 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4101 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4104 OutChains.push_back(Store);
4110 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4113 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4114 SDValue Chain, SDValue Dst,
4115 SDValue Src, uint64_t Size,
4116 unsigned Align, bool isVol,
4118 MachinePointerInfo DstPtrInfo,
4119 MachinePointerInfo SrcPtrInfo) {
4120 // Turn a memmove of undef to nop.
4121 if (Src.getOpcode() == ISD::UNDEF)
4124 // Expand memmove to a series of load and store ops if the size operand falls
4125 // below a certain threshold.
4126 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4127 std::vector<EVT> MemOps;
4128 bool DstAlignCanChange = false;
4129 MachineFunction &MF = DAG.getMachineFunction();
4130 MachineFrameInfo *MFI = MF.getFrameInfo();
4131 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4132 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4133 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4134 DstAlignCanChange = true;
4135 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4136 if (Align > SrcAlign)
4138 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4140 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4141 (DstAlignCanChange ? 0 : Align), SrcAlign,
4142 false, false, false, false, DAG, TLI))
4145 if (DstAlignCanChange) {
4146 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4147 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4148 if (NewAlign > Align) {
4149 // Give the stack frame object a larger alignment if needed.
4150 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4151 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4156 uint64_t SrcOff = 0, DstOff = 0;
4157 SmallVector<SDValue, 8> LoadValues;
4158 SmallVector<SDValue, 8> LoadChains;
4159 SmallVector<SDValue, 8> OutChains;
4160 unsigned NumMemOps = MemOps.size();
4161 for (unsigned i = 0; i < NumMemOps; i++) {
4163 unsigned VTSize = VT.getSizeInBits() / 8;
4166 Value = DAG.getLoad(VT, dl, Chain,
4167 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4168 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4169 false, false, SrcAlign);
4170 LoadValues.push_back(Value);
4171 LoadChains.push_back(Value.getValue(1));
4174 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4176 for (unsigned i = 0; i < NumMemOps; i++) {
4178 unsigned VTSize = VT.getSizeInBits() / 8;
4181 Store = DAG.getStore(Chain, dl, LoadValues[i],
4182 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4183 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4184 OutChains.push_back(Store);
4188 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4191 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4194 /// \param DAG Selection DAG where lowered code is placed.
4195 /// \param dl Link to corresponding IR location.
4196 /// \param Chain Control flow dependency.
4197 /// \param Dst Pointer to destination memory location.
4198 /// \param Src Value of byte to write into the memory.
4199 /// \param Size Number of bytes to write.
4200 /// \param Align Alignment of the destination in bytes.
4201 /// \param isVol True if destination is volatile.
4202 /// \param DstPtrInfo IR information on the memory pointer.
4203 /// \returns New head in the control flow, if lowering was successful, empty
4204 /// SDValue otherwise.
4206 /// The function tries to replace 'llvm.memset' intrinsic with several store
4207 /// operations and value calculation code. This is usually profitable for small
4209 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4210 SDValue Chain, SDValue Dst,
4211 SDValue Src, uint64_t Size,
4212 unsigned Align, bool isVol,
4213 MachinePointerInfo DstPtrInfo) {
4214 // Turn a memset of undef to nop.
4215 if (Src.getOpcode() == ISD::UNDEF)
4218 // Expand memset to a series of load/store ops if the size operand
4219 // falls below a certain threshold.
4220 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4221 std::vector<EVT> MemOps;
4222 bool DstAlignCanChange = false;
4223 MachineFunction &MF = DAG.getMachineFunction();
4224 MachineFrameInfo *MFI = MF.getFrameInfo();
4225 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4226 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4227 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4228 DstAlignCanChange = true;
4230 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4231 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4232 Size, (DstAlignCanChange ? 0 : Align), 0,
4233 true, IsZeroVal, false, true, DAG, TLI))
4236 if (DstAlignCanChange) {
4237 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4238 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4239 if (NewAlign > Align) {
4240 // Give the stack frame object a larger alignment if needed.
4241 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4242 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4247 SmallVector<SDValue, 8> OutChains;
4248 uint64_t DstOff = 0;
4249 unsigned NumMemOps = MemOps.size();
4251 // Find the largest store and generate the bit pattern for it.
4252 EVT LargestVT = MemOps[0];
4253 for (unsigned i = 1; i < NumMemOps; i++)
4254 if (MemOps[i].bitsGT(LargestVT))
4255 LargestVT = MemOps[i];
4256 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4258 for (unsigned i = 0; i < NumMemOps; i++) {
4260 unsigned VTSize = VT.getSizeInBits() / 8;
4261 if (VTSize > Size) {
4262 // Issuing an unaligned load / store pair that overlaps with the previous
4263 // pair. Adjust the offset accordingly.
4264 assert(i == NumMemOps-1 && i != 0);
4265 DstOff -= VTSize - Size;
4268 // If this store is smaller than the largest store see whether we can get
4269 // the smaller value for free with a truncate.
4270 SDValue Value = MemSetValue;
4271 if (VT.bitsLT(LargestVT)) {
4272 if (!LargestVT.isVector() && !VT.isVector() &&
4273 TLI.isTruncateFree(LargestVT, VT))
4274 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4276 Value = getMemsetValue(Src, VT, DAG, dl);
4278 assert(Value.getValueType() == VT && "Value with wrong type.");
4279 SDValue Store = DAG.getStore(Chain, dl, Value,
4280 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4281 DstPtrInfo.getWithOffset(DstOff),
4282 isVol, false, Align);
4283 OutChains.push_back(Store);
4284 DstOff += VT.getSizeInBits() / 8;
4288 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4291 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4292 SDValue Src, SDValue Size,
4293 unsigned Align, bool isVol, bool AlwaysInline,
4294 MachinePointerInfo DstPtrInfo,
4295 MachinePointerInfo SrcPtrInfo) {
4296 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4298 // Check to see if we should lower the memcpy to loads and stores first.
4299 // For cases within the target-specified limits, this is the best choice.
4300 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4302 // Memcpy with size zero? Just return the original chain.
4303 if (ConstantSize->isNullValue())
4306 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4307 ConstantSize->getZExtValue(),Align,
4308 isVol, false, DstPtrInfo, SrcPtrInfo);
4309 if (Result.getNode())
4313 // Then check to see if we should lower the memcpy with target-specific
4314 // code. If the target chooses to do this, this is the next best.
4316 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4317 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4318 DstPtrInfo, SrcPtrInfo);
4319 if (Result.getNode())
4323 // If we really need inline code and the target declined to provide it,
4324 // use a (potentially long) sequence of loads and stores.
4326 assert(ConstantSize && "AlwaysInline requires a constant size!");
4327 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4328 ConstantSize->getZExtValue(), Align, isVol,
4329 true, DstPtrInfo, SrcPtrInfo);
4332 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4333 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4334 // respect volatile, so they may do things like read or write memory
4335 // beyond the given memory regions. But fixing this isn't easy, and most
4336 // people don't care.
4338 // Emit a library call.
4339 TargetLowering::ArgListTy Args;
4340 TargetLowering::ArgListEntry Entry;
4341 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4342 Entry.Node = Dst; Args.push_back(Entry);
4343 Entry.Node = Src; Args.push_back(Entry);
4344 Entry.Node = Size; Args.push_back(Entry);
4345 // FIXME: pass in SDLoc
4346 TargetLowering::CallLoweringInfo CLI(*this);
4347 CLI.setDebugLoc(dl).setChain(Chain)
4348 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4349 Type::getVoidTy(*getContext()),
4350 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4351 TLI->getPointerTy()), std::move(Args), 0)
4352 .setDiscardResult();
4353 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4355 return CallResult.second;
4358 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4359 SDValue Src, SDValue Size,
4360 unsigned Align, bool isVol,
4361 MachinePointerInfo DstPtrInfo,
4362 MachinePointerInfo SrcPtrInfo) {
4363 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4365 // Check to see if we should lower the memmove to loads and stores first.
4366 // For cases within the target-specified limits, this is the best choice.
4367 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4369 // Memmove with size zero? Just return the original chain.
4370 if (ConstantSize->isNullValue())
4374 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4375 ConstantSize->getZExtValue(), Align, isVol,
4376 false, DstPtrInfo, SrcPtrInfo);
4377 if (Result.getNode())
4381 // Then check to see if we should lower the memmove with target-specific
4382 // code. If the target chooses to do this, this is the next best.
4384 SDValue Result = TSI->EmitTargetCodeForMemmove(
4385 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4386 if (Result.getNode())
4390 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4391 // not be safe. See memcpy above for more details.
4393 // Emit a library call.
4394 TargetLowering::ArgListTy Args;
4395 TargetLowering::ArgListEntry Entry;
4396 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4397 Entry.Node = Dst; Args.push_back(Entry);
4398 Entry.Node = Src; Args.push_back(Entry);
4399 Entry.Node = Size; Args.push_back(Entry);
4400 // FIXME: pass in SDLoc
4401 TargetLowering::CallLoweringInfo CLI(*this);
4402 CLI.setDebugLoc(dl).setChain(Chain)
4403 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4404 Type::getVoidTy(*getContext()),
4405 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4406 TLI->getPointerTy()), std::move(Args), 0)
4407 .setDiscardResult();
4408 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4410 return CallResult.second;
4413 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4414 SDValue Src, SDValue Size,
4415 unsigned Align, bool isVol,
4416 MachinePointerInfo DstPtrInfo) {
4417 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4419 // Check to see if we should lower the memset to stores first.
4420 // For cases within the target-specified limits, this is the best choice.
4421 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4423 // Memset with size zero? Just return the original chain.
4424 if (ConstantSize->isNullValue())
4428 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4429 Align, isVol, DstPtrInfo);
4431 if (Result.getNode())
4435 // Then check to see if we should lower the memset with target-specific
4436 // code. If the target chooses to do this, this is the next best.
4438 SDValue Result = TSI->EmitTargetCodeForMemset(
4439 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4440 if (Result.getNode())
4444 // Emit a library call.
4445 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4446 TargetLowering::ArgListTy Args;
4447 TargetLowering::ArgListEntry Entry;
4448 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4449 Args.push_back(Entry);
4451 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4452 Args.push_back(Entry);
4454 Entry.Ty = IntPtrTy;
4455 Args.push_back(Entry);
4457 // FIXME: pass in SDLoc
4458 TargetLowering::CallLoweringInfo CLI(*this);
4459 CLI.setDebugLoc(dl).setChain(Chain)
4460 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4461 Type::getVoidTy(*getContext()),
4462 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4463 TLI->getPointerTy()), std::move(Args), 0)
4464 .setDiscardResult();
4466 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4467 return CallResult.second;
4470 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4471 SDVTList VTList, ArrayRef<SDValue> Ops,
4472 MachineMemOperand *MMO,
4473 AtomicOrdering SuccessOrdering,
4474 AtomicOrdering FailureOrdering,
4475 SynchronizationScope SynchScope) {
4476 FoldingSetNodeID ID;
4477 ID.AddInteger(MemVT.getRawBits());
4478 AddNodeIDNode(ID, Opcode, VTList, Ops);
4479 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4482 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4483 return SDValue(E, 0);
4486 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4487 // SDNode doesn't have access to it. This memory will be "leaked" when
4488 // the node is deallocated, but recovered when the allocator is released.
4489 // If the number of operands is less than 5 we use AtomicSDNode's internal
4491 unsigned NumOps = Ops.size();
4492 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4495 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4496 dl.getDebugLoc(), VTList, MemVT,
4497 Ops.data(), DynOps, NumOps, MMO,
4498 SuccessOrdering, FailureOrdering,
4500 CSEMap.InsertNode(N, IP);
4502 return SDValue(N, 0);
4505 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4506 SDVTList VTList, ArrayRef<SDValue> Ops,
4507 MachineMemOperand *MMO,
4508 AtomicOrdering Ordering,
4509 SynchronizationScope SynchScope) {
4510 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4511 Ordering, SynchScope);
4514 SDValue SelectionDAG::getAtomicCmpSwap(
4515 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4516 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4517 unsigned Alignment, AtomicOrdering SuccessOrdering,
4518 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4519 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4520 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4521 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4523 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4524 Alignment = getEVTAlignment(MemVT);
4526 MachineFunction &MF = getMachineFunction();
4528 // FIXME: Volatile isn't really correct; we should keep track of atomic
4529 // orderings in the memoperand.
4530 unsigned Flags = MachineMemOperand::MOVolatile;
4531 Flags |= MachineMemOperand::MOLoad;
4532 Flags |= MachineMemOperand::MOStore;
4534 MachineMemOperand *MMO =
4535 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4537 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4538 SuccessOrdering, FailureOrdering, SynchScope);
4541 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4542 SDVTList VTs, SDValue Chain, SDValue Ptr,
4543 SDValue Cmp, SDValue Swp,
4544 MachineMemOperand *MMO,
4545 AtomicOrdering SuccessOrdering,
4546 AtomicOrdering FailureOrdering,
4547 SynchronizationScope SynchScope) {
4548 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4549 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4550 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4552 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4553 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4554 SuccessOrdering, FailureOrdering, SynchScope);
4557 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4559 SDValue Ptr, SDValue Val,
4560 const Value* PtrVal,
4562 AtomicOrdering Ordering,
4563 SynchronizationScope SynchScope) {
4564 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4565 Alignment = getEVTAlignment(MemVT);
4567 MachineFunction &MF = getMachineFunction();
4568 // An atomic store does not load. An atomic load does not store.
4569 // (An atomicrmw obviously both loads and stores.)
4570 // For now, atomics are considered to be volatile always, and they are
4572 // FIXME: Volatile isn't really correct; we should keep track of atomic
4573 // orderings in the memoperand.
4574 unsigned Flags = MachineMemOperand::MOVolatile;
4575 if (Opcode != ISD::ATOMIC_STORE)
4576 Flags |= MachineMemOperand::MOLoad;
4577 if (Opcode != ISD::ATOMIC_LOAD)
4578 Flags |= MachineMemOperand::MOStore;
4580 MachineMemOperand *MMO =
4581 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4582 MemVT.getStoreSize(), Alignment);
4584 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4585 Ordering, SynchScope);
4588 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4590 SDValue Ptr, SDValue Val,
4591 MachineMemOperand *MMO,
4592 AtomicOrdering Ordering,
4593 SynchronizationScope SynchScope) {
4594 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4595 Opcode == ISD::ATOMIC_LOAD_SUB ||
4596 Opcode == ISD::ATOMIC_LOAD_AND ||
4597 Opcode == ISD::ATOMIC_LOAD_OR ||
4598 Opcode == ISD::ATOMIC_LOAD_XOR ||
4599 Opcode == ISD::ATOMIC_LOAD_NAND ||
4600 Opcode == ISD::ATOMIC_LOAD_MIN ||
4601 Opcode == ISD::ATOMIC_LOAD_MAX ||
4602 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4603 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4604 Opcode == ISD::ATOMIC_SWAP ||
4605 Opcode == ISD::ATOMIC_STORE) &&
4606 "Invalid Atomic Op");
4608 EVT VT = Val.getValueType();
4610 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4611 getVTList(VT, MVT::Other);
4612 SDValue Ops[] = {Chain, Ptr, Val};
4613 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4616 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4617 EVT VT, SDValue Chain,
4619 MachineMemOperand *MMO,
4620 AtomicOrdering Ordering,
4621 SynchronizationScope SynchScope) {
4622 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4624 SDVTList VTs = getVTList(VT, MVT::Other);
4625 SDValue Ops[] = {Chain, Ptr};
4626 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4629 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4630 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4631 if (Ops.size() == 1)
4634 SmallVector<EVT, 4> VTs;
4635 VTs.reserve(Ops.size());
4636 for (unsigned i = 0; i < Ops.size(); ++i)
4637 VTs.push_back(Ops[i].getValueType());
4638 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4642 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4643 ArrayRef<SDValue> Ops,
4644 EVT MemVT, MachinePointerInfo PtrInfo,
4645 unsigned Align, bool Vol,
4646 bool ReadMem, bool WriteMem, unsigned Size) {
4647 if (Align == 0) // Ensure that codegen never sees alignment 0
4648 Align = getEVTAlignment(MemVT);
4650 MachineFunction &MF = getMachineFunction();
4653 Flags |= MachineMemOperand::MOStore;
4655 Flags |= MachineMemOperand::MOLoad;
4657 Flags |= MachineMemOperand::MOVolatile;
4659 Size = MemVT.getStoreSize();
4660 MachineMemOperand *MMO =
4661 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4663 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4667 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4668 ArrayRef<SDValue> Ops, EVT MemVT,
4669 MachineMemOperand *MMO) {
4670 assert((Opcode == ISD::INTRINSIC_VOID ||
4671 Opcode == ISD::INTRINSIC_W_CHAIN ||
4672 Opcode == ISD::PREFETCH ||
4673 Opcode == ISD::LIFETIME_START ||
4674 Opcode == ISD::LIFETIME_END ||
4675 (Opcode <= INT_MAX &&
4676 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4677 "Opcode is not a memory-accessing opcode!");
4679 // Memoize the node unless it returns a flag.
4680 MemIntrinsicSDNode *N;
4681 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4682 FoldingSetNodeID ID;
4683 AddNodeIDNode(ID, Opcode, VTList, Ops);
4684 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4687 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4688 return SDValue(E, 0);
4691 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4692 dl.getDebugLoc(), VTList, Ops,
4694 CSEMap.InsertNode(N, IP);
4696 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4697 dl.getDebugLoc(), VTList, Ops,
4701 return SDValue(N, 0);
4704 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4705 /// MachinePointerInfo record from it. This is particularly useful because the
4706 /// code generator has many cases where it doesn't bother passing in a
4707 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4708 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4709 // If this is FI+Offset, we can model it.
4710 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4711 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4713 // If this is (FI+Offset1)+Offset2, we can model it.
4714 if (Ptr.getOpcode() != ISD::ADD ||
4715 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4716 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4717 return MachinePointerInfo();
4719 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4720 return MachinePointerInfo::getFixedStack(FI, Offset+
4721 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4724 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4725 /// MachinePointerInfo record from it. This is particularly useful because the
4726 /// code generator has many cases where it doesn't bother passing in a
4727 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4728 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4729 // If the 'Offset' value isn't a constant, we can't handle this.
4730 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4731 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4732 if (OffsetOp.getOpcode() == ISD::UNDEF)
4733 return InferPointerInfo(Ptr);
4734 return MachinePointerInfo();
4739 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4740 EVT VT, SDLoc dl, SDValue Chain,
4741 SDValue Ptr, SDValue Offset,
4742 MachinePointerInfo PtrInfo, EVT MemVT,
4743 bool isVolatile, bool isNonTemporal, bool isInvariant,
4744 unsigned Alignment, const AAMDNodes &AAInfo,
4745 const MDNode *Ranges) {
4746 assert(Chain.getValueType() == MVT::Other &&
4747 "Invalid chain type");
4748 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4749 Alignment = getEVTAlignment(VT);
4751 unsigned Flags = MachineMemOperand::MOLoad;
4753 Flags |= MachineMemOperand::MOVolatile;
4755 Flags |= MachineMemOperand::MONonTemporal;
4757 Flags |= MachineMemOperand::MOInvariant;
4759 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4761 if (PtrInfo.V.isNull())
4762 PtrInfo = InferPointerInfo(Ptr, Offset);
4764 MachineFunction &MF = getMachineFunction();
4765 MachineMemOperand *MMO =
4766 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4768 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4772 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4773 EVT VT, SDLoc dl, SDValue Chain,
4774 SDValue Ptr, SDValue Offset, EVT MemVT,
4775 MachineMemOperand *MMO) {
4777 ExtType = ISD::NON_EXTLOAD;
4778 } else if (ExtType == ISD::NON_EXTLOAD) {
4779 assert(VT == MemVT && "Non-extending load from different memory type!");
4782 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4783 "Should only be an extending load, not truncating!");
4784 assert(VT.isInteger() == MemVT.isInteger() &&
4785 "Cannot convert from FP to Int or Int -> FP!");
4786 assert(VT.isVector() == MemVT.isVector() &&
4787 "Cannot use an ext load to convert to or from a vector!");
4788 assert((!VT.isVector() ||
4789 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4790 "Cannot use an ext load to change the number of vector elements!");
4793 bool Indexed = AM != ISD::UNINDEXED;
4794 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4795 "Unindexed load with an offset!");
4797 SDVTList VTs = Indexed ?
4798 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4799 SDValue Ops[] = { Chain, Ptr, Offset };
4800 FoldingSetNodeID ID;
4801 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4802 ID.AddInteger(MemVT.getRawBits());
4803 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4804 MMO->isNonTemporal(),
4805 MMO->isInvariant()));
4806 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4808 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4809 cast<LoadSDNode>(E)->refineAlignment(MMO);
4810 return SDValue(E, 0);
4812 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4813 dl.getDebugLoc(), VTs, AM, ExtType,
4815 CSEMap.InsertNode(N, IP);
4817 return SDValue(N, 0);
4820 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4821 SDValue Chain, SDValue Ptr,
4822 MachinePointerInfo PtrInfo,
4823 bool isVolatile, bool isNonTemporal,
4824 bool isInvariant, unsigned Alignment,
4825 const AAMDNodes &AAInfo,
4826 const MDNode *Ranges) {
4827 SDValue Undef = getUNDEF(Ptr.getValueType());
4828 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4829 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4833 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4834 SDValue Chain, SDValue Ptr,
4835 MachineMemOperand *MMO) {
4836 SDValue Undef = getUNDEF(Ptr.getValueType());
4837 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4841 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4842 SDValue Chain, SDValue Ptr,
4843 MachinePointerInfo PtrInfo, EVT MemVT,
4844 bool isVolatile, bool isNonTemporal,
4845 bool isInvariant, unsigned Alignment,
4846 const AAMDNodes &AAInfo) {
4847 SDValue Undef = getUNDEF(Ptr.getValueType());
4848 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4849 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4854 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4855 SDValue Chain, SDValue Ptr, EVT MemVT,
4856 MachineMemOperand *MMO) {
4857 SDValue Undef = getUNDEF(Ptr.getValueType());
4858 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4863 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4864 SDValue Offset, ISD::MemIndexedMode AM) {
4865 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4866 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4867 "Load is already a indexed load!");
4868 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4869 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4870 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4871 false, LD->getAlignment());
4874 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4875 SDValue Ptr, MachinePointerInfo PtrInfo,
4876 bool isVolatile, bool isNonTemporal,
4877 unsigned Alignment, const AAMDNodes &AAInfo) {
4878 assert(Chain.getValueType() == MVT::Other &&
4879 "Invalid chain type");
4880 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4881 Alignment = getEVTAlignment(Val.getValueType());
4883 unsigned Flags = MachineMemOperand::MOStore;
4885 Flags |= MachineMemOperand::MOVolatile;
4887 Flags |= MachineMemOperand::MONonTemporal;
4889 if (PtrInfo.V.isNull())
4890 PtrInfo = InferPointerInfo(Ptr);
4892 MachineFunction &MF = getMachineFunction();
4893 MachineMemOperand *MMO =
4894 MF.getMachineMemOperand(PtrInfo, Flags,
4895 Val.getValueType().getStoreSize(), Alignment,
4898 return getStore(Chain, dl, Val, Ptr, MMO);
4901 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4902 SDValue Ptr, MachineMemOperand *MMO) {
4903 assert(Chain.getValueType() == MVT::Other &&
4904 "Invalid chain type");
4905 EVT VT = Val.getValueType();
4906 SDVTList VTs = getVTList(MVT::Other);
4907 SDValue Undef = getUNDEF(Ptr.getValueType());
4908 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4909 FoldingSetNodeID ID;
4910 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4911 ID.AddInteger(VT.getRawBits());
4912 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4913 MMO->isNonTemporal(), MMO->isInvariant()));
4914 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4916 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4917 cast<StoreSDNode>(E)->refineAlignment(MMO);
4918 return SDValue(E, 0);
4920 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4921 dl.getDebugLoc(), VTs,
4922 ISD::UNINDEXED, false, VT, MMO);
4923 CSEMap.InsertNode(N, IP);
4925 return SDValue(N, 0);
4928 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4929 SDValue Ptr, MachinePointerInfo PtrInfo,
4930 EVT SVT,bool isVolatile, bool isNonTemporal,
4932 const AAMDNodes &AAInfo) {
4933 assert(Chain.getValueType() == MVT::Other &&
4934 "Invalid chain type");
4935 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4936 Alignment = getEVTAlignment(SVT);
4938 unsigned Flags = MachineMemOperand::MOStore;
4940 Flags |= MachineMemOperand::MOVolatile;
4942 Flags |= MachineMemOperand::MONonTemporal;
4944 if (PtrInfo.V.isNull())
4945 PtrInfo = InferPointerInfo(Ptr);
4947 MachineFunction &MF = getMachineFunction();
4948 MachineMemOperand *MMO =
4949 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4952 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4955 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4956 SDValue Ptr, EVT SVT,
4957 MachineMemOperand *MMO) {
4958 EVT VT = Val.getValueType();
4960 assert(Chain.getValueType() == MVT::Other &&
4961 "Invalid chain type");
4963 return getStore(Chain, dl, Val, Ptr, MMO);
4965 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4966 "Should only be a truncating store, not extending!");
4967 assert(VT.isInteger() == SVT.isInteger() &&
4968 "Can't do FP-INT conversion!");
4969 assert(VT.isVector() == SVT.isVector() &&
4970 "Cannot use trunc store to convert to or from a vector!");
4971 assert((!VT.isVector() ||
4972 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4973 "Cannot use trunc store to change the number of vector elements!");
4975 SDVTList VTs = getVTList(MVT::Other);
4976 SDValue Undef = getUNDEF(Ptr.getValueType());
4977 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4978 FoldingSetNodeID ID;
4979 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4980 ID.AddInteger(SVT.getRawBits());
4981 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4982 MMO->isNonTemporal(), MMO->isInvariant()));
4983 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4985 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4986 cast<StoreSDNode>(E)->refineAlignment(MMO);
4987 return SDValue(E, 0);
4989 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4990 dl.getDebugLoc(), VTs,
4991 ISD::UNINDEXED, true, SVT, MMO);
4992 CSEMap.InsertNode(N, IP);
4994 return SDValue(N, 0);
4998 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4999 SDValue Offset, ISD::MemIndexedMode AM) {
5000 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5001 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5002 "Store is already a indexed store!");
5003 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5004 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5005 FoldingSetNodeID ID;
5006 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5007 ID.AddInteger(ST->getMemoryVT().getRawBits());
5008 ID.AddInteger(ST->getRawSubclassData());
5009 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5012 return SDValue(E, 0);
5014 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5015 dl.getDebugLoc(), VTs, AM,
5016 ST->isTruncatingStore(),
5018 ST->getMemOperand());
5019 CSEMap.InsertNode(N, IP);
5021 return SDValue(N, 0);
5025 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5026 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5027 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5029 SDVTList VTs = getVTList(VT, MVT::Other);
5030 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5031 FoldingSetNodeID ID;
5032 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5033 ID.AddInteger(VT.getRawBits());
5034 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5036 MMO->isNonTemporal(),
5037 MMO->isInvariant()));
5038 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5041 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5042 return SDValue(E, 0);
5044 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5045 dl.getDebugLoc(), Ops, 4, VTs,
5047 CSEMap.InsertNode(N, IP);
5049 return SDValue(N, 0);
5052 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5053 SDValue Ptr, SDValue Mask, EVT MemVT,
5054 MachineMemOperand *MMO, bool isTrunc) {
5055 assert(Chain.getValueType() == MVT::Other &&
5056 "Invalid chain type");
5057 EVT VT = Val.getValueType();
5058 SDVTList VTs = getVTList(MVT::Other);
5059 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5060 FoldingSetNodeID ID;
5061 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5062 ID.AddInteger(VT.getRawBits());
5063 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5064 MMO->isNonTemporal(), MMO->isInvariant()));
5065 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5068 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5069 return SDValue(E, 0);
5071 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5072 dl.getDebugLoc(), Ops, 4,
5073 VTs, isTrunc, MemVT, MMO);
5074 CSEMap.InsertNode(N, IP);
5076 return SDValue(N, 0);
5079 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5080 SDValue Chain, SDValue Ptr,
5083 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
5084 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5087 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5088 ArrayRef<SDUse> Ops) {
5089 switch (Ops.size()) {
5090 case 0: return getNode(Opcode, DL, VT);
5091 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5092 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5093 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5097 // Copy from an SDUse array into an SDValue array for use with
5098 // the regular getNode logic.
5099 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5100 return getNode(Opcode, DL, VT, NewOps);
5103 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5104 ArrayRef<SDValue> Ops) {
5105 unsigned NumOps = Ops.size();
5107 case 0: return getNode(Opcode, DL, VT);
5108 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5109 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5110 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5116 case ISD::SELECT_CC: {
5117 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5118 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5119 "LHS and RHS of condition must have same type!");
5120 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5121 "True and False arms of SelectCC must have same type!");
5122 assert(Ops[2].getValueType() == VT &&
5123 "select_cc node must be of same type as true and false value!");
5127 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5128 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5129 "LHS/RHS of comparison should match types!");
5136 SDVTList VTs = getVTList(VT);
5138 if (VT != MVT::Glue) {
5139 FoldingSetNodeID ID;
5140 AddNodeIDNode(ID, Opcode, VTs, Ops);
5143 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5144 return SDValue(E, 0);
5146 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5148 CSEMap.InsertNode(N, IP);
5150 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5155 return SDValue(N, 0);
5158 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5159 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5160 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5163 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5164 ArrayRef<SDValue> Ops) {
5165 if (VTList.NumVTs == 1)
5166 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5170 // FIXME: figure out how to safely handle things like
5171 // int foo(int x) { return 1 << (x & 255); }
5172 // int bar() { return foo(256); }
5173 case ISD::SRA_PARTS:
5174 case ISD::SRL_PARTS:
5175 case ISD::SHL_PARTS:
5176 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5177 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5178 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5179 else if (N3.getOpcode() == ISD::AND)
5180 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5181 // If the and is only masking out bits that cannot effect the shift,
5182 // eliminate the and.
5183 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5184 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5185 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5191 // Memoize the node unless it returns a flag.
5193 unsigned NumOps = Ops.size();
5194 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5195 FoldingSetNodeID ID;
5196 AddNodeIDNode(ID, Opcode, VTList, Ops);
5198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5199 return SDValue(E, 0);
5202 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5203 DL.getDebugLoc(), VTList, Ops[0]);
5204 } else if (NumOps == 2) {
5205 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5206 DL.getDebugLoc(), VTList, Ops[0],
5208 } else if (NumOps == 3) {
5209 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5210 DL.getDebugLoc(), VTList, Ops[0],
5213 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5216 CSEMap.InsertNode(N, IP);
5219 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5220 DL.getDebugLoc(), VTList, Ops[0]);
5221 } else if (NumOps == 2) {
5222 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5223 DL.getDebugLoc(), VTList, Ops[0],
5225 } else if (NumOps == 3) {
5226 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5227 DL.getDebugLoc(), VTList, Ops[0],
5230 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5235 return SDValue(N, 0);
5238 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5239 return getNode(Opcode, DL, VTList, None);
5242 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5244 SDValue Ops[] = { N1 };
5245 return getNode(Opcode, DL, VTList, Ops);
5248 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5249 SDValue N1, SDValue N2) {
5250 SDValue Ops[] = { N1, N2 };
5251 return getNode(Opcode, DL, VTList, Ops);
5254 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5255 SDValue N1, SDValue N2, SDValue N3) {
5256 SDValue Ops[] = { N1, N2, N3 };
5257 return getNode(Opcode, DL, VTList, Ops);
5260 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5261 SDValue N1, SDValue N2, SDValue N3,
5263 SDValue Ops[] = { N1, N2, N3, N4 };
5264 return getNode(Opcode, DL, VTList, Ops);
5267 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5268 SDValue N1, SDValue N2, SDValue N3,
5269 SDValue N4, SDValue N5) {
5270 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5271 return getNode(Opcode, DL, VTList, Ops);
5274 SDVTList SelectionDAG::getVTList(EVT VT) {
5275 return makeVTList(SDNode::getValueTypeList(VT), 1);
5278 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5279 FoldingSetNodeID ID;
5281 ID.AddInteger(VT1.getRawBits());
5282 ID.AddInteger(VT2.getRawBits());
5285 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5287 EVT *Array = Allocator.Allocate<EVT>(2);
5290 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5291 VTListMap.InsertNode(Result, IP);
5293 return Result->getSDVTList();
5296 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5297 FoldingSetNodeID ID;
5299 ID.AddInteger(VT1.getRawBits());
5300 ID.AddInteger(VT2.getRawBits());
5301 ID.AddInteger(VT3.getRawBits());
5304 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5306 EVT *Array = Allocator.Allocate<EVT>(3);
5310 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5311 VTListMap.InsertNode(Result, IP);
5313 return Result->getSDVTList();
5316 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5317 FoldingSetNodeID ID;
5319 ID.AddInteger(VT1.getRawBits());
5320 ID.AddInteger(VT2.getRawBits());
5321 ID.AddInteger(VT3.getRawBits());
5322 ID.AddInteger(VT4.getRawBits());
5325 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5327 EVT *Array = Allocator.Allocate<EVT>(4);
5332 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5333 VTListMap.InsertNode(Result, IP);
5335 return Result->getSDVTList();
5338 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5339 unsigned NumVTs = VTs.size();
5340 FoldingSetNodeID ID;
5341 ID.AddInteger(NumVTs);
5342 for (unsigned index = 0; index < NumVTs; index++) {
5343 ID.AddInteger(VTs[index].getRawBits());
5347 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5349 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5350 std::copy(VTs.begin(), VTs.end(), Array);
5351 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5352 VTListMap.InsertNode(Result, IP);
5354 return Result->getSDVTList();
5358 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5359 /// specified operands. If the resultant node already exists in the DAG,
5360 /// this does not modify the specified node, instead it returns the node that
5361 /// already exists. If the resultant node does not exist in the DAG, the
5362 /// input node is returned. As a degenerate case, if you specify the same
5363 /// input operands as the node already has, the input node is returned.
5364 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5365 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5367 // Check to see if there is no change.
5368 if (Op == N->getOperand(0)) return N;
5370 // See if the modified node already exists.
5371 void *InsertPos = nullptr;
5372 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5375 // Nope it doesn't. Remove the node from its current place in the maps.
5377 if (!RemoveNodeFromCSEMaps(N))
5378 InsertPos = nullptr;
5380 // Now we update the operands.
5381 N->OperandList[0].set(Op);
5383 // If this gets put into a CSE map, add it.
5384 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5388 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5389 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5391 // Check to see if there is no change.
5392 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5393 return N; // No operands changed, just return the input node.
5395 // See if the modified node already exists.
5396 void *InsertPos = nullptr;
5397 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5400 // Nope it doesn't. Remove the node from its current place in the maps.
5402 if (!RemoveNodeFromCSEMaps(N))
5403 InsertPos = nullptr;
5405 // Now we update the operands.
5406 if (N->OperandList[0] != Op1)
5407 N->OperandList[0].set(Op1);
5408 if (N->OperandList[1] != Op2)
5409 N->OperandList[1].set(Op2);
5411 // If this gets put into a CSE map, add it.
5412 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5416 SDNode *SelectionDAG::
5417 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5418 SDValue Ops[] = { Op1, Op2, Op3 };
5419 return UpdateNodeOperands(N, Ops);
5422 SDNode *SelectionDAG::
5423 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5424 SDValue Op3, SDValue Op4) {
5425 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5426 return UpdateNodeOperands(N, Ops);
5429 SDNode *SelectionDAG::
5430 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5431 SDValue Op3, SDValue Op4, SDValue Op5) {
5432 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5433 return UpdateNodeOperands(N, Ops);
5436 SDNode *SelectionDAG::
5437 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5438 unsigned NumOps = Ops.size();
5439 assert(N->getNumOperands() == NumOps &&
5440 "Update with wrong number of operands");
5442 // If no operands changed just return the input node.
5443 if (Ops.empty() || std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5446 // See if the modified node already exists.
5447 void *InsertPos = nullptr;
5448 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5451 // Nope it doesn't. Remove the node from its current place in the maps.
5453 if (!RemoveNodeFromCSEMaps(N))
5454 InsertPos = nullptr;
5456 // Now we update the operands.
5457 for (unsigned i = 0; i != NumOps; ++i)
5458 if (N->OperandList[i] != Ops[i])
5459 N->OperandList[i].set(Ops[i]);
5461 // If this gets put into a CSE map, add it.
5462 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5466 /// DropOperands - Release the operands and set this node to have
5468 void SDNode::DropOperands() {
5469 // Unlike the code in MorphNodeTo that does this, we don't need to
5470 // watch for dead nodes here.
5471 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5477 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5480 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5482 SDVTList VTs = getVTList(VT);
5483 return SelectNodeTo(N, MachineOpc, VTs, None);
5486 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5487 EVT VT, SDValue Op1) {
5488 SDVTList VTs = getVTList(VT);
5489 SDValue Ops[] = { Op1 };
5490 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5493 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5494 EVT VT, SDValue Op1,
5496 SDVTList VTs = getVTList(VT);
5497 SDValue Ops[] = { Op1, Op2 };
5498 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5501 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5502 EVT VT, SDValue Op1,
5503 SDValue Op2, SDValue Op3) {
5504 SDVTList VTs = getVTList(VT);
5505 SDValue Ops[] = { Op1, Op2, Op3 };
5506 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5509 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5510 EVT VT, ArrayRef<SDValue> Ops) {
5511 SDVTList VTs = getVTList(VT);
5512 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5515 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5516 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5517 SDVTList VTs = getVTList(VT1, VT2);
5518 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5521 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5523 SDVTList VTs = getVTList(VT1, VT2);
5524 return SelectNodeTo(N, MachineOpc, VTs, None);
5527 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5528 EVT VT1, EVT VT2, EVT VT3,
5529 ArrayRef<SDValue> Ops) {
5530 SDVTList VTs = getVTList(VT1, VT2, VT3);
5531 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5534 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5535 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5536 ArrayRef<SDValue> Ops) {
5537 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5538 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5541 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5544 SDVTList VTs = getVTList(VT1, VT2);
5545 SDValue Ops[] = { Op1 };
5546 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5549 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5551 SDValue Op1, SDValue Op2) {
5552 SDVTList VTs = getVTList(VT1, VT2);
5553 SDValue Ops[] = { Op1, Op2 };
5554 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5557 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5559 SDValue Op1, SDValue Op2,
5561 SDVTList VTs = getVTList(VT1, VT2);
5562 SDValue Ops[] = { Op1, Op2, Op3 };
5563 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5566 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5567 EVT VT1, EVT VT2, EVT VT3,
5568 SDValue Op1, SDValue Op2,
5570 SDVTList VTs = getVTList(VT1, VT2, VT3);
5571 SDValue Ops[] = { Op1, Op2, Op3 };
5572 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5575 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5576 SDVTList VTs,ArrayRef<SDValue> Ops) {
5577 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5578 // Reset the NodeID to -1.
5583 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5584 /// the line number information on the merged node since it is not possible to
5585 /// preserve the information that operation is associated with multiple lines.
5586 /// This will make the debugger working better at -O0, were there is a higher
5587 /// probability having other instructions associated with that line.
5589 /// For IROrder, we keep the smaller of the two
5590 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5591 DebugLoc NLoc = N->getDebugLoc();
5592 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5593 N->setDebugLoc(DebugLoc());
5595 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5596 N->setIROrder(Order);
5600 /// MorphNodeTo - This *mutates* the specified node to have the specified
5601 /// return type, opcode, and operands.
5603 /// Note that MorphNodeTo returns the resultant node. If there is already a
5604 /// node of the specified opcode and operands, it returns that node instead of
5605 /// the current one. Note that the SDLoc need not be the same.
5607 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5608 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5609 /// node, and because it doesn't require CSE recalculation for any of
5610 /// the node's users.
5612 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5613 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5614 /// the legalizer which maintain worklists that would need to be updated when
5615 /// deleting things.
5616 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5617 SDVTList VTs, ArrayRef<SDValue> Ops) {
5618 unsigned NumOps = Ops.size();
5619 // If an identical node already exists, use it.
5621 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5622 FoldingSetNodeID ID;
5623 AddNodeIDNode(ID, Opc, VTs, Ops);
5624 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5625 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5628 if (!RemoveNodeFromCSEMaps(N))
5631 // Start the morphing.
5633 N->ValueList = VTs.VTs;
5634 N->NumValues = VTs.NumVTs;
5636 // Clear the operands list, updating used nodes to remove this from their
5637 // use list. Keep track of any operands that become dead as a result.
5638 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5639 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5641 SDNode *Used = Use.getNode();
5643 if (Used->use_empty())
5644 DeadNodeSet.insert(Used);
5647 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5648 // Initialize the memory references information.
5649 MN->setMemRefs(nullptr, nullptr);
5650 // If NumOps is larger than the # of operands we can have in a
5651 // MachineSDNode, reallocate the operand list.
5652 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5653 if (MN->OperandsNeedDelete)
5654 delete[] MN->OperandList;
5655 if (NumOps > array_lengthof(MN->LocalOperands))
5656 // We're creating a final node that will live unmorphed for the
5657 // remainder of the current SelectionDAG iteration, so we can allocate
5658 // the operands directly out of a pool with no recycling metadata.
5659 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5660 Ops.data(), NumOps);
5662 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5663 MN->OperandsNeedDelete = false;
5665 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5667 // If NumOps is larger than the # of operands we currently have, reallocate
5668 // the operand list.
5669 if (NumOps > N->NumOperands) {
5670 if (N->OperandsNeedDelete)
5671 delete[] N->OperandList;
5672 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5673 N->OperandsNeedDelete = true;
5675 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5678 // Delete any nodes that are still dead after adding the uses for the
5680 if (!DeadNodeSet.empty()) {
5681 SmallVector<SDNode *, 16> DeadNodes;
5682 for (SDNode *N : DeadNodeSet)
5684 DeadNodes.push_back(N);
5685 RemoveDeadNodes(DeadNodes);
5689 CSEMap.InsertNode(N, IP); // Memoize the new node.
5694 /// getMachineNode - These are used for target selectors to create a new node
5695 /// with specified return type(s), MachineInstr opcode, and operands.
5697 /// Note that getMachineNode returns the resultant node. If there is already a
5698 /// node of the specified opcode and operands, it returns that node instead of
5699 /// the current one.
5701 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5702 SDVTList VTs = getVTList(VT);
5703 return getMachineNode(Opcode, dl, VTs, None);
5707 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5708 SDVTList VTs = getVTList(VT);
5709 SDValue Ops[] = { Op1 };
5710 return getMachineNode(Opcode, dl, VTs, Ops);
5714 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5715 SDValue Op1, SDValue Op2) {
5716 SDVTList VTs = getVTList(VT);
5717 SDValue Ops[] = { Op1, Op2 };
5718 return getMachineNode(Opcode, dl, VTs, Ops);
5722 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5723 SDValue Op1, SDValue Op2, SDValue Op3) {
5724 SDVTList VTs = getVTList(VT);
5725 SDValue Ops[] = { Op1, Op2, Op3 };
5726 return getMachineNode(Opcode, dl, VTs, Ops);
5730 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5731 ArrayRef<SDValue> Ops) {
5732 SDVTList VTs = getVTList(VT);
5733 return getMachineNode(Opcode, dl, VTs, Ops);
5737 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5738 SDVTList VTs = getVTList(VT1, VT2);
5739 return getMachineNode(Opcode, dl, VTs, None);
5743 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5744 EVT VT1, EVT VT2, SDValue Op1) {
5745 SDVTList VTs = getVTList(VT1, VT2);
5746 SDValue Ops[] = { Op1 };
5747 return getMachineNode(Opcode, dl, VTs, Ops);
5751 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5752 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5753 SDVTList VTs = getVTList(VT1, VT2);
5754 SDValue Ops[] = { Op1, Op2 };
5755 return getMachineNode(Opcode, dl, VTs, Ops);
5759 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5760 EVT VT1, EVT VT2, SDValue Op1,
5761 SDValue Op2, SDValue Op3) {
5762 SDVTList VTs = getVTList(VT1, VT2);
5763 SDValue Ops[] = { Op1, Op2, Op3 };
5764 return getMachineNode(Opcode, dl, VTs, Ops);
5768 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5770 ArrayRef<SDValue> Ops) {
5771 SDVTList VTs = getVTList(VT1, VT2);
5772 return getMachineNode(Opcode, dl, VTs, Ops);
5776 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5777 EVT VT1, EVT VT2, EVT VT3,
5778 SDValue Op1, SDValue Op2) {
5779 SDVTList VTs = getVTList(VT1, VT2, VT3);
5780 SDValue Ops[] = { Op1, Op2 };
5781 return getMachineNode(Opcode, dl, VTs, Ops);
5785 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5786 EVT VT1, EVT VT2, EVT VT3,
5787 SDValue Op1, SDValue Op2, SDValue Op3) {
5788 SDVTList VTs = getVTList(VT1, VT2, VT3);
5789 SDValue Ops[] = { Op1, Op2, Op3 };
5790 return getMachineNode(Opcode, dl, VTs, Ops);
5794 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5795 EVT VT1, EVT VT2, EVT VT3,
5796 ArrayRef<SDValue> Ops) {
5797 SDVTList VTs = getVTList(VT1, VT2, VT3);
5798 return getMachineNode(Opcode, dl, VTs, Ops);
5802 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5803 EVT VT2, EVT VT3, EVT VT4,
5804 ArrayRef<SDValue> Ops) {
5805 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5806 return getMachineNode(Opcode, dl, VTs, Ops);
5810 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5811 ArrayRef<EVT> ResultTys,
5812 ArrayRef<SDValue> Ops) {
5813 SDVTList VTs = getVTList(ResultTys);
5814 return getMachineNode(Opcode, dl, VTs, Ops);
5818 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5819 ArrayRef<SDValue> OpsArray) {
5820 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5823 const SDValue *Ops = OpsArray.data();
5824 unsigned NumOps = OpsArray.size();
5827 FoldingSetNodeID ID;
5828 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5830 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5831 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5835 // Allocate a new MachineSDNode.
5836 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5837 DL.getDebugLoc(), VTs);
5839 // Initialize the operands list.
5840 if (NumOps > array_lengthof(N->LocalOperands))
5841 // We're creating a final node that will live unmorphed for the
5842 // remainder of the current SelectionDAG iteration, so we can allocate
5843 // the operands directly out of a pool with no recycling metadata.
5844 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5847 N->InitOperands(N->LocalOperands, Ops, NumOps);
5848 N->OperandsNeedDelete = false;
5851 CSEMap.InsertNode(N, IP);
5857 /// getTargetExtractSubreg - A convenience function for creating
5858 /// TargetOpcode::EXTRACT_SUBREG nodes.
5860 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5862 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5863 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5864 VT, Operand, SRIdxVal);
5865 return SDValue(Subreg, 0);
5868 /// getTargetInsertSubreg - A convenience function for creating
5869 /// TargetOpcode::INSERT_SUBREG nodes.
5871 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5872 SDValue Operand, SDValue Subreg) {
5873 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5874 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5875 VT, Operand, Subreg, SRIdxVal);
5876 return SDValue(Result, 0);
5879 /// getNodeIfExists - Get the specified node if it's already available, or
5880 /// else return NULL.
5881 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5882 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5884 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5885 FoldingSetNodeID ID;
5886 AddNodeIDNode(ID, Opcode, VTList, Ops);
5887 if (isBinOpWithFlags(Opcode))
5888 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5890 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5896 /// getDbgValue - Creates a SDDbgValue node.
5899 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5900 unsigned R, bool IsIndirect, uint64_t Off,
5901 DebugLoc DL, unsigned O) {
5902 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5903 "Expected inlined-at fields to agree");
5904 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5908 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5909 const Value *C, uint64_t Off,
5910 DebugLoc DL, unsigned O) {
5911 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5912 "Expected inlined-at fields to agree");
5913 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5917 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5918 unsigned FI, uint64_t Off,
5919 DebugLoc DL, unsigned O) {
5920 assert(DIVariable(Var)->isValidLocationForIntrinsic(DL) &&
5921 "Expected inlined-at fields to agree");
5922 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5927 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5928 /// pointed to by a use iterator is deleted, increment the use iterator
5929 /// so that it doesn't dangle.
5931 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5932 SDNode::use_iterator &UI;
5933 SDNode::use_iterator &UE;
5935 void NodeDeleted(SDNode *N, SDNode *E) override {
5936 // Increment the iterator as needed.
5937 while (UI != UE && N == *UI)
5942 RAUWUpdateListener(SelectionDAG &d,
5943 SDNode::use_iterator &ui,
5944 SDNode::use_iterator &ue)
5945 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5950 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5951 /// This can cause recursive merging of nodes in the DAG.
5953 /// This version assumes From has a single result value.
5955 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5956 SDNode *From = FromN.getNode();
5957 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5958 "Cannot replace with this method!");
5959 assert(From != To.getNode() && "Cannot replace uses of with self");
5961 // Iterate over all the existing uses of From. New uses will be added
5962 // to the beginning of the use list, which we avoid visiting.
5963 // This specifically avoids visiting uses of From that arise while the
5964 // replacement is happening, because any such uses would be the result
5965 // of CSE: If an existing node looks like From after one of its operands
5966 // is replaced by To, we don't want to replace of all its users with To
5967 // too. See PR3018 for more info.
5968 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5969 RAUWUpdateListener Listener(*this, UI, UE);
5973 // This node is about to morph, remove its old self from the CSE maps.
5974 RemoveNodeFromCSEMaps(User);
5976 // A user can appear in a use list multiple times, and when this
5977 // happens the uses are usually next to each other in the list.
5978 // To help reduce the number of CSE recomputations, process all
5979 // the uses of this user that we can find this way.
5981 SDUse &Use = UI.getUse();
5984 } while (UI != UE && *UI == User);
5986 // Now that we have modified User, add it back to the CSE maps. If it
5987 // already exists there, recursively merge the results together.
5988 AddModifiedNodeToCSEMaps(User);
5991 // If we just RAUW'd the root, take note.
5992 if (FromN == getRoot())
5996 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5997 /// This can cause recursive merging of nodes in the DAG.
5999 /// This version assumes that for each value of From, there is a
6000 /// corresponding value in To in the same position with the same type.
6002 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6004 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6005 assert((!From->hasAnyUseOfValue(i) ||
6006 From->getValueType(i) == To->getValueType(i)) &&
6007 "Cannot use this version of ReplaceAllUsesWith!");
6010 // Handle the trivial case.
6014 // Iterate over just the existing users of From. See the comments in
6015 // the ReplaceAllUsesWith above.
6016 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6017 RAUWUpdateListener Listener(*this, UI, UE);
6021 // This node is about to morph, remove its old self from the CSE maps.
6022 RemoveNodeFromCSEMaps(User);
6024 // A user can appear in a use list multiple times, and when this
6025 // happens the uses are usually next to each other in the list.
6026 // To help reduce the number of CSE recomputations, process all
6027 // the uses of this user that we can find this way.
6029 SDUse &Use = UI.getUse();
6032 } while (UI != UE && *UI == User);
6034 // Now that we have modified User, add it back to the CSE maps. If it
6035 // already exists there, recursively merge the results together.
6036 AddModifiedNodeToCSEMaps(User);
6039 // If we just RAUW'd the root, take note.
6040 if (From == getRoot().getNode())
6041 setRoot(SDValue(To, getRoot().getResNo()));
6044 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6045 /// This can cause recursive merging of nodes in the DAG.
6047 /// This version can replace From with any result values. To must match the
6048 /// number and types of values returned by From.
6049 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6050 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6051 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6053 // Iterate over just the existing users of From. See the comments in
6054 // the ReplaceAllUsesWith above.
6055 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6056 RAUWUpdateListener Listener(*this, UI, UE);
6060 // This node is about to morph, remove its old self from the CSE maps.
6061 RemoveNodeFromCSEMaps(User);
6063 // A user can appear in a use list multiple times, and when this
6064 // happens the uses are usually next to each other in the list.
6065 // To help reduce the number of CSE recomputations, process all
6066 // the uses of this user that we can find this way.
6068 SDUse &Use = UI.getUse();
6069 const SDValue &ToOp = To[Use.getResNo()];
6072 } while (UI != UE && *UI == User);
6074 // Now that we have modified User, add it back to the CSE maps. If it
6075 // already exists there, recursively merge the results together.
6076 AddModifiedNodeToCSEMaps(User);
6079 // If we just RAUW'd the root, take note.
6080 if (From == getRoot().getNode())
6081 setRoot(SDValue(To[getRoot().getResNo()]));
6084 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6085 /// uses of other values produced by From.getNode() alone. The Deleted
6086 /// vector is handled the same way as for ReplaceAllUsesWith.
6087 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6088 // Handle the really simple, really trivial case efficiently.
6089 if (From == To) return;
6091 // Handle the simple, trivial, case efficiently.
6092 if (From.getNode()->getNumValues() == 1) {
6093 ReplaceAllUsesWith(From, To);
6097 // Iterate over just the existing users of From. See the comments in
6098 // the ReplaceAllUsesWith above.
6099 SDNode::use_iterator UI = From.getNode()->use_begin(),
6100 UE = From.getNode()->use_end();
6101 RAUWUpdateListener Listener(*this, UI, UE);
6104 bool UserRemovedFromCSEMaps = false;
6106 // A user can appear in a use list multiple times, and when this
6107 // happens the uses are usually next to each other in the list.
6108 // To help reduce the number of CSE recomputations, process all
6109 // the uses of this user that we can find this way.
6111 SDUse &Use = UI.getUse();
6113 // Skip uses of different values from the same node.
6114 if (Use.getResNo() != From.getResNo()) {
6119 // If this node hasn't been modified yet, it's still in the CSE maps,
6120 // so remove its old self from the CSE maps.
6121 if (!UserRemovedFromCSEMaps) {
6122 RemoveNodeFromCSEMaps(User);
6123 UserRemovedFromCSEMaps = true;
6128 } while (UI != UE && *UI == User);
6130 // We are iterating over all uses of the From node, so if a use
6131 // doesn't use the specific value, no changes are made.
6132 if (!UserRemovedFromCSEMaps)
6135 // Now that we have modified User, add it back to the CSE maps. If it
6136 // already exists there, recursively merge the results together.
6137 AddModifiedNodeToCSEMaps(User);
6140 // If we just RAUW'd the root, take note.
6141 if (From == getRoot())
6146 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6147 /// to record information about a use.
6154 /// operator< - Sort Memos by User.
6155 bool operator<(const UseMemo &L, const UseMemo &R) {
6156 return (intptr_t)L.User < (intptr_t)R.User;
6160 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6161 /// uses of other values produced by From.getNode() alone. The same value
6162 /// may appear in both the From and To list. The Deleted vector is
6163 /// handled the same way as for ReplaceAllUsesWith.
6164 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6167 // Handle the simple, trivial case efficiently.
6169 return ReplaceAllUsesOfValueWith(*From, *To);
6171 // Read up all the uses and make records of them. This helps
6172 // processing new uses that are introduced during the
6173 // replacement process.
6174 SmallVector<UseMemo, 4> Uses;
6175 for (unsigned i = 0; i != Num; ++i) {
6176 unsigned FromResNo = From[i].getResNo();
6177 SDNode *FromNode = From[i].getNode();
6178 for (SDNode::use_iterator UI = FromNode->use_begin(),
6179 E = FromNode->use_end(); UI != E; ++UI) {
6180 SDUse &Use = UI.getUse();
6181 if (Use.getResNo() == FromResNo) {
6182 UseMemo Memo = { *UI, i, &Use };
6183 Uses.push_back(Memo);
6188 // Sort the uses, so that all the uses from a given User are together.
6189 std::sort(Uses.begin(), Uses.end());
6191 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6192 UseIndex != UseIndexEnd; ) {
6193 // We know that this user uses some value of From. If it is the right
6194 // value, update it.
6195 SDNode *User = Uses[UseIndex].User;
6197 // This node is about to morph, remove its old self from the CSE maps.
6198 RemoveNodeFromCSEMaps(User);
6200 // The Uses array is sorted, so all the uses for a given User
6201 // are next to each other in the list.
6202 // To help reduce the number of CSE recomputations, process all
6203 // the uses of this user that we can find this way.
6205 unsigned i = Uses[UseIndex].Index;
6206 SDUse &Use = *Uses[UseIndex].Use;
6210 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6212 // Now that we have modified User, add it back to the CSE maps. If it
6213 // already exists there, recursively merge the results together.
6214 AddModifiedNodeToCSEMaps(User);
6218 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6219 /// based on their topological order. It returns the maximum id and a vector
6220 /// of the SDNodes* in assigned order by reference.
6221 unsigned SelectionDAG::AssignTopologicalOrder() {
6223 unsigned DAGSize = 0;
6225 // SortedPos tracks the progress of the algorithm. Nodes before it are
6226 // sorted, nodes after it are unsorted. When the algorithm completes
6227 // it is at the end of the list.
6228 allnodes_iterator SortedPos = allnodes_begin();
6230 // Visit all the nodes. Move nodes with no operands to the front of
6231 // the list immediately. Annotate nodes that do have operands with their
6232 // operand count. Before we do this, the Node Id fields of the nodes
6233 // may contain arbitrary values. After, the Node Id fields for nodes
6234 // before SortedPos will contain the topological sort index, and the
6235 // Node Id fields for nodes At SortedPos and after will contain the
6236 // count of outstanding operands.
6237 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6239 checkForCycles(N, this);
6240 unsigned Degree = N->getNumOperands();
6242 // A node with no uses, add it to the result array immediately.
6243 N->setNodeId(DAGSize++);
6244 allnodes_iterator Q = N;
6246 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6247 assert(SortedPos != AllNodes.end() && "Overran node list");
6250 // Temporarily use the Node Id as scratch space for the degree count.
6251 N->setNodeId(Degree);
6255 // Visit all the nodes. As we iterate, move nodes into sorted order,
6256 // such that by the time the end is reached all nodes will be sorted.
6257 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6259 checkForCycles(N, this);
6260 // N is in sorted position, so all its uses have one less operand
6261 // that needs to be sorted.
6262 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6265 unsigned Degree = P->getNodeId();
6266 assert(Degree != 0 && "Invalid node degree");
6269 // All of P's operands are sorted, so P may sorted now.
6270 P->setNodeId(DAGSize++);
6272 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6273 assert(SortedPos != AllNodes.end() && "Overran node list");
6276 // Update P's outstanding operand count.
6277 P->setNodeId(Degree);
6280 if (I == SortedPos) {
6283 dbgs() << "Overran sorted position:\n";
6284 S->dumprFull(this); dbgs() << "\n";
6285 dbgs() << "Checking if this is due to cycles\n";
6286 checkForCycles(this, true);
6288 llvm_unreachable(nullptr);
6292 assert(SortedPos == AllNodes.end() &&
6293 "Topological sort incomplete!");
6294 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6295 "First node in topological sort is not the entry token!");
6296 assert(AllNodes.front().getNodeId() == 0 &&
6297 "First node in topological sort has non-zero id!");
6298 assert(AllNodes.front().getNumOperands() == 0 &&
6299 "First node in topological sort has operands!");
6300 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6301 "Last node in topologic sort has unexpected id!");
6302 assert(AllNodes.back().use_empty() &&
6303 "Last node in topologic sort has users!");
6304 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6308 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6309 /// value is produced by SD.
6310 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6312 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6313 SD->setHasDebugValue(true);
6315 DbgInfo->add(DB, SD, isParameter);
6318 /// TransferDbgValues - Transfer SDDbgValues.
6319 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6320 if (From == To || !From.getNode()->getHasDebugValue())
6322 SDNode *FromNode = From.getNode();
6323 SDNode *ToNode = To.getNode();
6324 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6325 SmallVector<SDDbgValue *, 2> ClonedDVs;
6326 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6328 SDDbgValue *Dbg = *I;
6329 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6331 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6332 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6333 Dbg->getDebugLoc(), Dbg->getOrder());
6334 ClonedDVs.push_back(Clone);
6337 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6338 E = ClonedDVs.end(); I != E; ++I)
6339 AddDbgValue(*I, ToNode, false);
6342 //===----------------------------------------------------------------------===//
6344 //===----------------------------------------------------------------------===//
6346 HandleSDNode::~HandleSDNode() {
6350 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6351 DebugLoc DL, const GlobalValue *GA,
6352 EVT VT, int64_t o, unsigned char TF)
6353 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6357 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6358 SDValue X, unsigned SrcAS,
6360 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6361 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6363 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6364 EVT memvt, MachineMemOperand *mmo)
6365 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6366 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6367 MMO->isNonTemporal(), MMO->isInvariant());
6368 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6369 assert(isNonTemporal() == MMO->isNonTemporal() &&
6370 "Non-temporal encoding error!");
6371 // We check here that the size of the memory operand fits within the size of
6372 // the MMO. This is because the MMO might indicate only a possible address
6373 // range instead of specifying the affected memory addresses precisely.
6374 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6377 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6378 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6379 : SDNode(Opc, Order, dl, VTs, Ops),
6380 MemoryVT(memvt), MMO(mmo) {
6381 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6382 MMO->isNonTemporal(), MMO->isInvariant());
6383 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6384 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6387 /// Profile - Gather unique data for the node.
6389 void SDNode::Profile(FoldingSetNodeID &ID) const {
6390 AddNodeIDNode(ID, this);
6395 std::vector<EVT> VTs;
6398 VTs.reserve(MVT::LAST_VALUETYPE);
6399 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6400 VTs.push_back(MVT((MVT::SimpleValueType)i));
6405 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6406 static ManagedStatic<EVTArray> SimpleVTArray;
6407 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6409 /// getValueTypeList - Return a pointer to the specified value type.
6411 const EVT *SDNode::getValueTypeList(EVT VT) {
6412 if (VT.isExtended()) {
6413 sys::SmartScopedLock<true> Lock(*VTMutex);
6414 return &(*EVTs->insert(VT).first);
6416 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6417 "Value type out of range!");
6418 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6422 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6423 /// indicated value. This method ignores uses of other values defined by this
6425 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6426 assert(Value < getNumValues() && "Bad value!");
6428 // TODO: Only iterate over uses of a given value of the node
6429 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6430 if (UI.getUse().getResNo() == Value) {
6437 // Found exactly the right number of uses?
6442 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6443 /// value. This method ignores uses of other values defined by this operation.
6444 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6445 assert(Value < getNumValues() && "Bad value!");
6447 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6448 if (UI.getUse().getResNo() == Value)
6455 /// isOnlyUserOf - Return true if this node is the only use of N.
6457 bool SDNode::isOnlyUserOf(SDNode *N) const {
6459 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6470 /// isOperand - Return true if this node is an operand of N.
6472 bool SDValue::isOperandOf(SDNode *N) const {
6473 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6474 if (*this == N->getOperand(i))
6479 bool SDNode::isOperandOf(SDNode *N) const {
6480 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6481 if (this == N->OperandList[i].getNode())
6486 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6487 /// be a chain) reaches the specified operand without crossing any
6488 /// side-effecting instructions on any chain path. In practice, this looks
6489 /// through token factors and non-volatile loads. In order to remain efficient,
6490 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6491 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6492 unsigned Depth) const {
6493 if (*this == Dest) return true;
6495 // Don't search too deeply, we just want to be able to see through
6496 // TokenFactor's etc.
6497 if (Depth == 0) return false;
6499 // If this is a token factor, all inputs to the TF happen in parallel. If any
6500 // of the operands of the TF does not reach dest, then we cannot do the xform.
6501 if (getOpcode() == ISD::TokenFactor) {
6502 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6503 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6508 // Loads don't have side effects, look through them.
6509 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6510 if (!Ld->isVolatile())
6511 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6516 /// hasPredecessor - Return true if N is a predecessor of this node.
6517 /// N is either an operand of this node, or can be reached by recursively
6518 /// traversing up the operands.
6519 /// NOTE: This is an expensive method. Use it carefully.
6520 bool SDNode::hasPredecessor(const SDNode *N) const {
6521 SmallPtrSet<const SDNode *, 32> Visited;
6522 SmallVector<const SDNode *, 16> Worklist;
6523 return hasPredecessorHelper(N, Visited, Worklist);
6527 SDNode::hasPredecessorHelper(const SDNode *N,
6528 SmallPtrSetImpl<const SDNode *> &Visited,
6529 SmallVectorImpl<const SDNode *> &Worklist) const {
6530 if (Visited.empty()) {
6531 Worklist.push_back(this);
6533 // Take a look in the visited set. If we've already encountered this node
6534 // we needn't search further.
6535 if (Visited.count(N))
6539 // Haven't visited N yet. Continue the search.
6540 while (!Worklist.empty()) {
6541 const SDNode *M = Worklist.pop_back_val();
6542 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6543 SDNode *Op = M->getOperand(i).getNode();
6544 if (Visited.insert(Op).second)
6545 Worklist.push_back(Op);
6554 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6555 assert(Num < NumOperands && "Invalid child # of SDNode!");
6556 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6559 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6560 assert(N->getNumValues() == 1 &&
6561 "Can't unroll a vector with multiple results!");
6563 EVT VT = N->getValueType(0);
6564 unsigned NE = VT.getVectorNumElements();
6565 EVT EltVT = VT.getVectorElementType();
6568 SmallVector<SDValue, 8> Scalars;
6569 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6571 // If ResNE is 0, fully unroll the vector op.
6574 else if (NE > ResNE)
6578 for (i= 0; i != NE; ++i) {
6579 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6580 SDValue Operand = N->getOperand(j);
6581 EVT OperandVT = Operand.getValueType();
6582 if (OperandVT.isVector()) {
6583 // A vector operand; extract a single element.
6584 EVT OperandEltVT = OperandVT.getVectorElementType();
6585 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6588 getConstant(i, TLI->getVectorIdxTy()));
6590 // A scalar operand; just use it as is.
6591 Operands[j] = Operand;
6595 switch (N->getOpcode()) {
6597 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6600 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6607 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6608 getShiftAmountOperand(Operands[0].getValueType(),
6611 case ISD::SIGN_EXTEND_INREG:
6612 case ISD::FP_ROUND_INREG: {
6613 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6614 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6616 getValueType(ExtVT)));
6621 for (; i < ResNE; ++i)
6622 Scalars.push_back(getUNDEF(EltVT));
6624 return getNode(ISD::BUILD_VECTOR, dl,
6625 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6629 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6630 /// location that is 'Dist' units away from the location that the 'Base' load
6631 /// is loading from.
6632 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6633 unsigned Bytes, int Dist) const {
6634 if (LD->getChain() != Base->getChain())
6636 EVT VT = LD->getValueType(0);
6637 if (VT.getSizeInBits() / 8 != Bytes)
6640 SDValue Loc = LD->getOperand(1);
6641 SDValue BaseLoc = Base->getOperand(1);
6642 if (Loc.getOpcode() == ISD::FrameIndex) {
6643 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6645 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6646 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6647 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6648 int FS = MFI->getObjectSize(FI);
6649 int BFS = MFI->getObjectSize(BFI);
6650 if (FS != BFS || FS != (int)Bytes) return false;
6651 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6655 if (isBaseWithConstantOffset(Loc)) {
6656 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6657 if (Loc.getOperand(0) == BaseLoc) {
6658 // If the base location is a simple address with no offset itself, then
6659 // the second load's first add operand should be the base address.
6660 if (LocOffset == Dist * (int)Bytes)
6662 } else if (isBaseWithConstantOffset(BaseLoc)) {
6663 // The base location itself has an offset, so subtract that value from the
6664 // second load's offset before comparing to distance * size.
6666 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6667 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6668 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6673 const GlobalValue *GV1 = nullptr;
6674 const GlobalValue *GV2 = nullptr;
6675 int64_t Offset1 = 0;
6676 int64_t Offset2 = 0;
6677 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6678 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6679 if (isGA1 && isGA2 && GV1 == GV2)
6680 return Offset1 == (Offset2 + Dist*Bytes);
6685 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6686 /// it cannot be inferred.
6687 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6688 // If this is a GlobalAddress + cst, return the alignment.
6689 const GlobalValue *GV;
6690 int64_t GVOffset = 0;
6691 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6692 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6693 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6694 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6695 *TLI->getDataLayout());
6696 unsigned AlignBits = KnownZero.countTrailingOnes();
6697 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6699 return MinAlign(Align, GVOffset);
6702 // If this is a direct reference to a stack slot, use information about the
6703 // stack slot's alignment.
6704 int FrameIdx = 1 << 31;
6705 int64_t FrameOffset = 0;
6706 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6707 FrameIdx = FI->getIndex();
6708 } else if (isBaseWithConstantOffset(Ptr) &&
6709 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6711 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6712 FrameOffset = Ptr.getConstantOperandVal(1);
6715 if (FrameIdx != (1 << 31)) {
6716 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6717 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6725 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6726 /// which is split (or expanded) into two not necessarily identical pieces.
6727 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6728 // Currently all types are split in half.
6730 if (!VT.isVector()) {
6731 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6733 unsigned NumElements = VT.getVectorNumElements();
6734 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6735 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6738 return std::make_pair(LoVT, HiVT);
6741 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6743 std::pair<SDValue, SDValue>
6744 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6746 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6747 N.getValueType().getVectorNumElements() &&
6748 "More vector elements requested than available!");
6750 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6751 getConstant(0, TLI->getVectorIdxTy()));
6752 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6753 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6754 return std::make_pair(Lo, Hi);
6757 void SelectionDAG::ExtractVectorElements(SDValue Op,
6758 SmallVectorImpl<SDValue> &Args,
6759 unsigned Start, unsigned Count) {
6760 EVT VT = Op.getValueType();
6762 Count = VT.getVectorNumElements();
6764 EVT EltVT = VT.getVectorElementType();
6765 EVT IdxTy = TLI->getVectorIdxTy();
6767 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6768 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6769 Op, getConstant(i, IdxTy)));
6773 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6774 unsigned GlobalAddressSDNode::getAddressSpace() const {
6775 return getGlobal()->getType()->getAddressSpace();
6779 Type *ConstantPoolSDNode::getType() const {
6780 if (isMachineConstantPoolEntry())
6781 return Val.MachineCPVal->getType();
6782 return Val.ConstVal->getType();
6785 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6787 unsigned &SplatBitSize,
6789 unsigned MinSplatBits,
6790 bool isBigEndian) const {
6791 EVT VT = getValueType(0);
6792 assert(VT.isVector() && "Expected a vector type");
6793 unsigned sz = VT.getSizeInBits();
6794 if (MinSplatBits > sz)
6797 SplatValue = APInt(sz, 0);
6798 SplatUndef = APInt(sz, 0);
6800 // Get the bits. Bits with undefined values (when the corresponding element
6801 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6802 // in SplatValue. If any of the values are not constant, give up and return
6804 unsigned int nOps = getNumOperands();
6805 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6806 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6808 for (unsigned j = 0; j < nOps; ++j) {
6809 unsigned i = isBigEndian ? nOps-1-j : j;
6810 SDValue OpVal = getOperand(i);
6811 unsigned BitPos = j * EltBitSize;
6813 if (OpVal.getOpcode() == ISD::UNDEF)
6814 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6815 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6816 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6817 zextOrTrunc(sz) << BitPos;
6818 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6819 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6824 // The build_vector is all constants or undefs. Find the smallest element
6825 // size that splats the vector.
6827 HasAnyUndefs = (SplatUndef != 0);
6830 unsigned HalfSize = sz / 2;
6831 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6832 APInt LowValue = SplatValue.trunc(HalfSize);
6833 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6834 APInt LowUndef = SplatUndef.trunc(HalfSize);
6836 // If the two halves do not match (ignoring undef bits), stop here.
6837 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6838 MinSplatBits > HalfSize)
6841 SplatValue = HighValue | LowValue;
6842 SplatUndef = HighUndef & LowUndef;
6851 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6852 if (UndefElements) {
6853 UndefElements->clear();
6854 UndefElements->resize(getNumOperands());
6857 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6858 SDValue Op = getOperand(i);
6859 if (Op.getOpcode() == ISD::UNDEF) {
6861 (*UndefElements)[i] = true;
6862 } else if (!Splatted) {
6864 } else if (Splatted != Op) {
6870 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6871 "Can only have a splat without a constant for all undefs.");
6872 return getOperand(0);
6879 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6880 return dyn_cast_or_null<ConstantSDNode>(
6881 getSplatValue(UndefElements).getNode());
6885 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6886 return dyn_cast_or_null<ConstantFPSDNode>(
6887 getSplatValue(UndefElements).getNode());
6890 bool BuildVectorSDNode::isConstant() const {
6891 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6892 unsigned Opc = getOperand(i).getOpcode();
6893 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6899 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6900 // Find the first non-undef value in the shuffle mask.
6902 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6905 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6907 // Make sure all remaining elements are either undef or the same as the first
6909 for (int Idx = Mask[i]; i != e; ++i)
6910 if (Mask[i] >= 0 && Mask[i] != Idx)
6916 static void checkForCyclesHelper(const SDNode *N,
6917 SmallPtrSetImpl<const SDNode*> &Visited,
6918 SmallPtrSetImpl<const SDNode*> &Checked,
6919 const llvm::SelectionDAG *DAG) {
6920 // If this node has already been checked, don't check it again.
6921 if (Checked.count(N))
6924 // If a node has already been visited on this depth-first walk, reject it as
6926 if (!Visited.insert(N).second) {
6927 errs() << "Detected cycle in SelectionDAG\n";
6928 dbgs() << "Offending node:\n";
6929 N->dumprFull(DAG); dbgs() << "\n";
6933 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6934 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6941 void llvm::checkForCycles(const llvm::SDNode *N,
6942 const llvm::SelectionDAG *DAG,
6950 assert(N && "Checking nonexistent SDNode");
6951 SmallPtrSet<const SDNode*, 32> visited;
6952 SmallPtrSet<const SDNode*, 32> checked;
6953 checkForCyclesHelper(N, visited, checked, DAG);
6958 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6959 checkForCycles(DAG->getRoot().getNode(), DAG, force);