1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/GlobalAlias.h"
16 #include "llvm/GlobalVariable.h"
17 #include "llvm/Intrinsics.h"
18 #include "llvm/DerivedTypes.h"
19 #include "llvm/Assembly/Writer.h"
20 #include "llvm/CallingConv.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineConstantPool.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/PseudoSourceValue.h"
26 #include "llvm/Support/MathExtras.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/ADT/SetVector.h"
33 #include "llvm/ADT/SmallPtrSet.h"
34 #include "llvm/ADT/SmallSet.h"
35 #include "llvm/ADT/SmallVector.h"
36 #include "llvm/ADT/StringExtras.h"
41 /// makeVTList - Return an instance of the SDVTList struct initialized with the
42 /// specified members.
43 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
44 SDVTList Res = {VTs, NumVTs};
48 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
49 switch (VT.getSimpleVT()) {
50 default: assert(0 && "Unknown FP format");
51 case MVT::f32: return &APFloat::IEEEsingle;
52 case MVT::f64: return &APFloat::IEEEdouble;
53 case MVT::f80: return &APFloat::x87DoubleExtended;
54 case MVT::f128: return &APFloat::IEEEquad;
55 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
59 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
61 //===----------------------------------------------------------------------===//
62 // ConstantFPSDNode Class
63 //===----------------------------------------------------------------------===//
65 /// isExactlyValue - We don't rely on operator== working on double values, as
66 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
67 /// As such, this method can be used to do an exact bit-for-bit comparison of
68 /// two floating point values.
69 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
70 return Value.bitwiseIsEqual(V);
73 bool ConstantFPSDNode::isValueValidForType(MVT VT,
75 assert(VT.isFloatingPoint() && "Can only convert between FP types");
77 // PPC long double cannot be converted to any other type.
78 if (VT == MVT::ppcf128 ||
79 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
84 return Val2.convert(*MVTToAPFloatSemantics(VT),
85 APFloat::rmNearestTiesToEven) == APFloat::opOK;
88 //===----------------------------------------------------------------------===//
90 //===----------------------------------------------------------------------===//
92 /// isBuildVectorAllOnes - Return true if the specified node is a
93 /// BUILD_VECTOR where all of the elements are ~0 or undef.
94 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
95 // Look through a bit convert.
96 if (N->getOpcode() == ISD::BIT_CONVERT)
97 N = N->getOperand(0).Val;
99 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
101 unsigned i = 0, e = N->getNumOperands();
103 // Skip over all of the undef values.
104 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
107 // Do not accept an all-undef vector.
108 if (i == e) return false;
110 // Do not accept build_vectors that aren't all constants or which have non-~0
112 SDOperand NotZero = N->getOperand(i);
113 if (isa<ConstantSDNode>(NotZero)) {
114 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
116 } else if (isa<ConstantFPSDNode>(NotZero)) {
117 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
118 convertToAPInt().isAllOnesValue())
123 // Okay, we have at least one ~0 value, check to see if the rest match or are
125 for (++i; i != e; ++i)
126 if (N->getOperand(i) != NotZero &&
127 N->getOperand(i).getOpcode() != ISD::UNDEF)
133 /// isBuildVectorAllZeros - Return true if the specified node is a
134 /// BUILD_VECTOR where all of the elements are 0 or undef.
135 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
136 // Look through a bit convert.
137 if (N->getOpcode() == ISD::BIT_CONVERT)
138 N = N->getOperand(0).Val;
140 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
142 unsigned i = 0, e = N->getNumOperands();
144 // Skip over all of the undef values.
145 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
148 // Do not accept an all-undef vector.
149 if (i == e) return false;
151 // Do not accept build_vectors that aren't all constants or which have non-~0
153 SDOperand Zero = N->getOperand(i);
154 if (isa<ConstantSDNode>(Zero)) {
155 if (!cast<ConstantSDNode>(Zero)->isNullValue())
157 } else if (isa<ConstantFPSDNode>(Zero)) {
158 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
163 // Okay, we have at least one ~0 value, check to see if the rest match or are
165 for (++i; i != e; ++i)
166 if (N->getOperand(i) != Zero &&
167 N->getOperand(i).getOpcode() != ISD::UNDEF)
172 /// isScalarToVector - Return true if the specified node is a
173 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
174 /// element is not an undef.
175 bool ISD::isScalarToVector(const SDNode *N) {
176 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
179 if (N->getOpcode() != ISD::BUILD_VECTOR)
181 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
183 unsigned NumElems = N->getNumOperands();
184 for (unsigned i = 1; i < NumElems; ++i) {
185 SDOperand V = N->getOperand(i);
186 if (V.getOpcode() != ISD::UNDEF)
193 /// isDebugLabel - Return true if the specified node represents a debug
194 /// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand
196 bool ISD::isDebugLabel(const SDNode *N) {
198 if (N->getOpcode() == ISD::LABEL)
199 Zero = N->getOperand(2);
200 else if (N->isTargetOpcode() &&
201 N->getTargetOpcode() == TargetInstrInfo::LABEL)
202 // Chain moved to last operand.
203 Zero = N->getOperand(1);
206 return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue();
209 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
210 /// when given the operation for (X op Y).
211 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
212 // To perform this operation, we just need to swap the L and G bits of the
214 unsigned OldL = (Operation >> 2) & 1;
215 unsigned OldG = (Operation >> 1) & 1;
216 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
217 (OldL << 1) | // New G bit
218 (OldG << 2)); // New L bit.
221 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
222 /// 'op' is a valid SetCC operation.
223 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
224 unsigned Operation = Op;
226 Operation ^= 7; // Flip L, G, E bits, but not U.
228 Operation ^= 15; // Flip all of the condition bits.
229 if (Operation > ISD::SETTRUE2)
230 Operation &= ~8; // Don't let N and U bits get set.
231 return ISD::CondCode(Operation);
235 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
236 /// signed operation and 2 if the result is an unsigned comparison. Return zero
237 /// if the operation does not depend on the sign of the input (setne and seteq).
238 static int isSignedOp(ISD::CondCode Opcode) {
240 default: assert(0 && "Illegal integer setcc operation!");
242 case ISD::SETNE: return 0;
246 case ISD::SETGE: return 1;
250 case ISD::SETUGE: return 2;
254 /// getSetCCOrOperation - Return the result of a logical OR between different
255 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
256 /// returns SETCC_INVALID if it is not possible to represent the resultant
258 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
261 // Cannot fold a signed integer setcc with an unsigned integer setcc.
262 return ISD::SETCC_INVALID;
264 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
266 // If the N and U bits get set then the resultant comparison DOES suddenly
267 // care about orderedness, and is true when ordered.
268 if (Op > ISD::SETTRUE2)
269 Op &= ~16; // Clear the U bit if the N bit is set.
271 // Canonicalize illegal integer setcc's.
272 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
275 return ISD::CondCode(Op);
278 /// getSetCCAndOperation - Return the result of a logical AND between different
279 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
280 /// function returns zero if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed setcc with an unsigned setcc.
286 return ISD::SETCC_INVALID;
288 // Combine all of the condition bits.
289 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291 // Canonicalize illegal integer setcc's.
295 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
296 case ISD::SETOEQ: // SETEQ & SETU[LG]E
297 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
298 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
299 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
306 const TargetMachine &SelectionDAG::getTarget() const {
307 return TLI.getTargetMachine();
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 SDOperandPtr Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->Val);
332 ID.AddInteger(Ops->ResNo);
336 static void AddNodeIDNode(FoldingSetNodeID &ID,
337 unsigned short OpC, SDVTList VTList,
338 SDOperandPtr OpList, unsigned N) {
339 AddNodeIDOpcode(ID, OpC);
340 AddNodeIDValueTypes(ID, VTList);
341 AddNodeIDOperands(ID, OpList, N);
345 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
347 static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
348 AddNodeIDOpcode(ID, N->getOpcode());
349 // Add the return value info.
350 AddNodeIDValueTypes(ID, N->getVTList());
351 // Add the operand info.
352 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
354 // Handle SDNode leafs with special info.
355 switch (N->getOpcode()) {
356 default: break; // Normal nodes don't need extra info.
358 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
360 case ISD::TargetConstant:
362 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue());
364 case ISD::TargetConstantFP:
365 case ISD::ConstantFP: {
366 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF());
369 case ISD::TargetGlobalAddress:
370 case ISD::GlobalAddress:
371 case ISD::TargetGlobalTLSAddress:
372 case ISD::GlobalTLSAddress: {
373 GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
374 ID.AddPointer(GA->getGlobal());
375 ID.AddInteger(GA->getOffset());
378 case ISD::BasicBlock:
379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
385 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
387 case ISD::MEMOPERAND: {
388 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
389 ID.AddPointer(MO.getValue());
390 ID.AddInteger(MO.getFlags());
391 ID.AddInteger(MO.getOffset());
392 ID.AddInteger(MO.getSize());
393 ID.AddInteger(MO.getAlignment());
396 case ISD::FrameIndex:
397 case ISD::TargetFrameIndex:
398 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
401 case ISD::TargetJumpTable:
402 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
404 case ISD::ConstantPool:
405 case ISD::TargetConstantPool: {
406 ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
407 ID.AddInteger(CP->getAlignment());
408 ID.AddInteger(CP->getOffset());
409 if (CP->isMachineConstantPoolEntry())
410 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
412 ID.AddPointer(CP->getConstVal());
416 LoadSDNode *LD = cast<LoadSDNode>(N);
417 ID.AddInteger(LD->getAddressingMode());
418 ID.AddInteger(LD->getExtensionType());
419 ID.AddInteger(LD->getMemoryVT().getRawBits());
420 ID.AddInteger(LD->getAlignment());
421 ID.AddInteger(LD->isVolatile());
425 StoreSDNode *ST = cast<StoreSDNode>(N);
426 ID.AddInteger(ST->getAddressingMode());
427 ID.AddInteger(ST->isTruncatingStore());
428 ID.AddInteger(ST->getMemoryVT().getRawBits());
429 ID.AddInteger(ST->getAlignment());
430 ID.AddInteger(ST->isVolatile());
433 case ISD::ATOMIC_CMP_SWAP:
434 case ISD::ATOMIC_LOAD_ADD:
435 case ISD::ATOMIC_SWAP:
436 case ISD::ATOMIC_LOAD_SUB:
437 case ISD::ATOMIC_LOAD_AND:
438 case ISD::ATOMIC_LOAD_OR:
439 case ISD::ATOMIC_LOAD_XOR:
440 case ISD::ATOMIC_LOAD_NAND:
441 case ISD::ATOMIC_LOAD_MIN:
442 case ISD::ATOMIC_LOAD_MAX:
443 case ISD::ATOMIC_LOAD_UMIN:
444 case ISD::ATOMIC_LOAD_UMAX: {
445 AtomicSDNode *AT = cast<AtomicSDNode>(N);
446 ID.AddInteger(AT->getAlignment());
447 ID.AddInteger(AT->isVolatile());
450 } // end switch (N->getOpcode())
453 //===----------------------------------------------------------------------===//
454 // SelectionDAG Class
455 //===----------------------------------------------------------------------===//
457 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
459 void SelectionDAG::RemoveDeadNodes() {
460 // Create a dummy node (which is not added to allnodes), that adds a reference
461 // to the root node, preventing it from being deleted.
462 HandleSDNode Dummy(getRoot());
464 SmallVector<SDNode*, 128> DeadNodes;
466 // Add all obviously-dead nodes to the DeadNodes worklist.
467 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
469 DeadNodes.push_back(I);
471 // Process the worklist, deleting the nodes and adding their uses to the
473 while (!DeadNodes.empty()) {
474 SDNode *N = DeadNodes.back();
475 DeadNodes.pop_back();
477 // Take the node out of the appropriate CSE map.
478 RemoveNodeFromCSEMaps(N);
480 // Next, brutally remove the operand list. This is safe to do, as there are
481 // no cycles in the graph.
482 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
483 SDNode *Operand = I->getVal();
484 Operand->removeUser(std::distance(N->op_begin(), I), N);
486 // Now that we removed this operand, see if there are no uses of it left.
487 if (Operand->use_empty())
488 DeadNodes.push_back(Operand);
490 if (N->OperandsNeedDelete) {
491 delete[] N->OperandList;
496 // Finally, remove N itself.
500 // If the root changed (e.g. it was a dead load, update the root).
501 setRoot(Dummy.getValue());
504 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
505 SmallVector<SDNode*, 16> DeadNodes;
506 DeadNodes.push_back(N);
508 // Process the worklist, deleting the nodes and adding their uses to the
510 while (!DeadNodes.empty()) {
511 SDNode *N = DeadNodes.back();
512 DeadNodes.pop_back();
515 UpdateListener->NodeDeleted(N, 0);
517 // Take the node out of the appropriate CSE map.
518 RemoveNodeFromCSEMaps(N);
520 // Next, brutally remove the operand list. This is safe to do, as there are
521 // no cycles in the graph.
522 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
523 SDNode *Operand = I->getVal();
524 Operand->removeUser(std::distance(N->op_begin(), I), N);
526 // Now that we removed this operand, see if there are no uses of it left.
527 if (Operand->use_empty())
528 DeadNodes.push_back(Operand);
530 if (N->OperandsNeedDelete) {
531 delete[] N->OperandList;
536 // Finally, remove N itself.
541 void SelectionDAG::DeleteNode(SDNode *N) {
542 assert(N->use_empty() && "Cannot delete a node that is not dead!");
544 // First take this out of the appropriate CSE map.
545 RemoveNodeFromCSEMaps(N);
547 // Finally, remove uses due to operands of this node, remove from the
548 // AllNodes list, and delete the node.
549 DeleteNodeNotInCSEMaps(N);
552 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
554 // Remove it from the AllNodes list.
557 // Drop all of the operands and decrement used nodes use counts.
558 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
559 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
560 if (N->OperandsNeedDelete) {
561 delete[] N->OperandList;
569 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
570 /// correspond to it. This is useful when we're about to delete or repurpose
571 /// the node. We don't want future request for structurally identical nodes
572 /// to return N anymore.
573 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
575 switch (N->getOpcode()) {
576 case ISD::HANDLENODE: return; // noop.
578 Erased = StringNodes.erase(cast<StringSDNode>(N)->getValue());
581 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
582 "Cond code doesn't exist!");
583 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
584 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
586 case ISD::ExternalSymbol:
587 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
589 case ISD::TargetExternalSymbol:
591 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
593 case ISD::VALUETYPE: {
594 MVT VT = cast<VTSDNode>(N)->getVT();
595 if (VT.isExtended()) {
596 Erased = ExtendedValueTypeNodes.erase(VT);
598 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
599 ValueTypeNodes[VT.getSimpleVT()] = 0;
604 // Remove it from the CSE Map.
605 Erased = CSEMap.RemoveNode(N);
609 // Verify that the node was actually in one of the CSE maps, unless it has a
610 // flag result (which cannot be CSE'd) or is one of the special cases that are
611 // not subject to CSE.
612 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
613 !N->isTargetOpcode()) {
616 assert(0 && "Node is not in map!");
621 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
622 /// has been taken out and modified in some way. If the specified node already
623 /// exists in the CSE maps, do not modify the maps, but return the existing node
624 /// instead. If it doesn't exist, add it and return null.
626 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
627 assert(N->getNumOperands() && "This is a leaf node!");
628 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
629 return 0; // Never add these nodes.
631 // Check that remaining values produced are not flags.
632 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
633 if (N->getValueType(i) == MVT::Flag)
634 return 0; // Never CSE anything that produces a flag.
636 SDNode *New = CSEMap.GetOrInsertNode(N);
637 if (New != N) return New; // Node already existed.
641 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
642 /// were replaced with those specified. If this node is never memoized,
643 /// return null, otherwise return a pointer to the slot it would take. If a
644 /// node already exists with these operands, the slot will be non-null.
645 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op,
647 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
648 return 0; // Never add these nodes.
650 // Check that remaining values produced are not flags.
651 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
652 if (N->getValueType(i) == MVT::Flag)
653 return 0; // Never CSE anything that produces a flag.
655 SDOperand Ops[] = { Op };
657 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
658 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
661 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
662 /// were replaced with those specified. If this node is never memoized,
663 /// return null, otherwise return a pointer to the slot it would take. If a
664 /// node already exists with these operands, the slot will be non-null.
665 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
666 SDOperand Op1, SDOperand Op2,
668 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
669 return 0; // Never add these nodes.
671 // Check that remaining values produced are not flags.
672 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
673 if (N->getValueType(i) == MVT::Flag)
674 return 0; // Never CSE anything that produces a flag.
676 SDOperand Ops[] = { Op1, Op2 };
678 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
679 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
683 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
684 /// were replaced with those specified. If this node is never memoized,
685 /// return null, otherwise return a pointer to the slot it would take. If a
686 /// node already exists with these operands, the slot will be non-null.
687 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
688 SDOperandPtr Ops,unsigned NumOps,
690 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
691 return 0; // Never add these nodes.
693 // Check that remaining values produced are not flags.
694 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
695 if (N->getValueType(i) == MVT::Flag)
696 return 0; // Never CSE anything that produces a flag.
699 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
701 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
702 ID.AddInteger(LD->getAddressingMode());
703 ID.AddInteger(LD->getExtensionType());
704 ID.AddInteger(LD->getMemoryVT().getRawBits());
705 ID.AddInteger(LD->getAlignment());
706 ID.AddInteger(LD->isVolatile());
707 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
708 ID.AddInteger(ST->getAddressingMode());
709 ID.AddInteger(ST->isTruncatingStore());
710 ID.AddInteger(ST->getMemoryVT().getRawBits());
711 ID.AddInteger(ST->getAlignment());
712 ID.AddInteger(ST->isVolatile());
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 SelectionDAG::~SelectionDAG() {
720 while (!AllNodes.empty()) {
721 SDNode *N = AllNodes.begin();
722 N->SetNextInBucket(0);
723 if (N->OperandsNeedDelete) {
724 delete [] N->OperandList;
728 AllNodes.pop_front();
732 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) {
733 if (Op.getValueType() == VT) return Op;
734 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
736 return getNode(ISD::AND, Op.getValueType(), Op,
737 getConstant(Imm, Op.getValueType()));
740 SDOperand SelectionDAG::getString(const std::string &Val) {
741 StringSDNode *&N = StringNodes[Val];
743 N = new StringSDNode(Val);
744 AllNodes.push_back(N);
746 return SDOperand(N, 0);
749 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
751 VT.isVector() ? VT.getVectorElementType() : VT;
753 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
756 SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
757 assert(VT.isInteger() && "Cannot create FP integer constant!");
760 VT.isVector() ? VT.getVectorElementType() : VT;
762 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
763 "APInt size does not match type size!");
765 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
767 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
771 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
773 return SDOperand(N, 0);
775 N = new ConstantSDNode(isT, Val, EltVT);
776 CSEMap.InsertNode(N, IP);
777 AllNodes.push_back(N);
780 SDOperand Result(N, 0);
782 SmallVector<SDOperand, 8> Ops;
783 Ops.assign(VT.getVectorNumElements(), Result);
784 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
789 SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
790 return getConstant(Val, TLI.getPointerTy(), isTarget);
794 SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
795 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
798 VT.isVector() ? VT.getVectorElementType() : VT;
800 // Do the map lookup using the actual bit pattern for the floating point
801 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
802 // we don't have issues with SNANs.
803 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
805 AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
809 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
811 return SDOperand(N, 0);
813 N = new ConstantFPSDNode(isTarget, V, EltVT);
814 CSEMap.InsertNode(N, IP);
815 AllNodes.push_back(N);
818 SDOperand Result(N, 0);
820 SmallVector<SDOperand, 8> Ops;
821 Ops.assign(VT.getVectorNumElements(), Result);
822 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
827 SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
829 VT.isVector() ? VT.getVectorElementType() : VT;
831 return getConstantFP(APFloat((float)Val), VT, isTarget);
833 return getConstantFP(APFloat(Val), VT, isTarget);
836 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
841 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
843 // If GV is an alias then use the aliasee for determining thread-localness.
844 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
845 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
848 if (GVar && GVar->isThreadLocal())
849 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
851 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
854 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
856 ID.AddInteger(Offset);
858 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
859 return SDOperand(E, 0);
860 SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
861 CSEMap.InsertNode(N, IP);
862 AllNodes.push_back(N);
863 return SDOperand(N, 0);
866 SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
867 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
869 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
872 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
873 return SDOperand(E, 0);
874 SDNode *N = new FrameIndexSDNode(FI, VT, isTarget);
875 CSEMap.InsertNode(N, IP);
876 AllNodes.push_back(N);
877 return SDOperand(N, 0);
880 SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
881 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
883 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
887 return SDOperand(E, 0);
888 SDNode *N = new JumpTableSDNode(JTI, VT, isTarget);
889 CSEMap.InsertNode(N, IP);
890 AllNodes.push_back(N);
891 return SDOperand(N, 0);
894 SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT,
895 unsigned Alignment, int Offset,
897 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
899 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
900 ID.AddInteger(Alignment);
901 ID.AddInteger(Offset);
904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
905 return SDOperand(E, 0);
906 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
907 CSEMap.InsertNode(N, IP);
908 AllNodes.push_back(N);
909 return SDOperand(N, 0);
913 SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
914 unsigned Alignment, int Offset,
916 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
918 AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
919 ID.AddInteger(Alignment);
920 ID.AddInteger(Offset);
921 C->AddSelectionDAGCSEId(ID);
923 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
924 return SDOperand(E, 0);
925 SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
926 CSEMap.InsertNode(N, IP);
927 AllNodes.push_back(N);
928 return SDOperand(N, 0);
932 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
934 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0);
937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
938 return SDOperand(E, 0);
939 SDNode *N = new BasicBlockSDNode(MBB);
940 CSEMap.InsertNode(N, IP);
941 AllNodes.push_back(N);
942 return SDOperand(N, 0);
945 SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
947 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0);
948 ID.AddInteger(Flags.getRawBits());
950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
951 return SDOperand(E, 0);
952 SDNode *N = new ARG_FLAGSSDNode(Flags);
953 CSEMap.InsertNode(N, IP);
954 AllNodes.push_back(N);
955 return SDOperand(N, 0);
958 SDOperand SelectionDAG::getValueType(MVT VT) {
959 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
960 ValueTypeNodes.resize(VT.getSimpleVT()+1);
962 SDNode *&N = VT.isExtended() ?
963 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
965 if (N) return SDOperand(N, 0);
966 N = new VTSDNode(VT);
967 AllNodes.push_back(N);
968 return SDOperand(N, 0);
971 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
972 SDNode *&N = ExternalSymbols[Sym];
973 if (N) return SDOperand(N, 0);
974 N = new ExternalSymbolSDNode(false, Sym, VT);
975 AllNodes.push_back(N);
976 return SDOperand(N, 0);
979 SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
980 SDNode *&N = TargetExternalSymbols[Sym];
981 if (N) return SDOperand(N, 0);
982 N = new ExternalSymbolSDNode(true, Sym, VT);
983 AllNodes.push_back(N);
984 return SDOperand(N, 0);
987 SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
988 if ((unsigned)Cond >= CondCodeNodes.size())
989 CondCodeNodes.resize(Cond+1);
991 if (CondCodeNodes[Cond] == 0) {
992 CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
993 AllNodes.push_back(CondCodeNodes[Cond]);
995 return SDOperand(CondCodeNodes[Cond], 0);
998 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1000 AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0);
1001 ID.AddInteger(RegNo);
1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1004 return SDOperand(E, 0);
1005 SDNode *N = new RegisterSDNode(RegNo, VT);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDOperand(N, 0);
1011 SDOperand SelectionDAG::getSrcValue(const Value *V) {
1012 assert((!V || isa<PointerType>(V->getType())) &&
1013 "SrcValue is not a pointer?");
1015 FoldingSetNodeID ID;
1016 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0);
1020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1021 return SDOperand(E, 0);
1023 SDNode *N = new SrcValueSDNode(V);
1024 CSEMap.InsertNode(N, IP);
1025 AllNodes.push_back(N);
1026 return SDOperand(N, 0);
1029 SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1030 const Value *v = MO.getValue();
1031 assert((!v || isa<PointerType>(v->getType())) &&
1032 "SrcValue is not a pointer?");
1034 FoldingSetNodeID ID;
1035 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0);
1037 ID.AddInteger(MO.getFlags());
1038 ID.AddInteger(MO.getOffset());
1039 ID.AddInteger(MO.getSize());
1040 ID.AddInteger(MO.getAlignment());
1043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1044 return SDOperand(E, 0);
1046 SDNode *N = new MemOperandSDNode(MO);
1047 CSEMap.InsertNode(N, IP);
1048 AllNodes.push_back(N);
1049 return SDOperand(N, 0);
1052 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1053 /// specified value type.
1054 SDOperand SelectionDAG::CreateStackTemporary(MVT VT) {
1055 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1056 unsigned ByteSize = VT.getSizeInBits()/8;
1057 const Type *Ty = VT.getTypeForMVT();
1058 unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty);
1059 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1060 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1064 SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1,
1065 SDOperand N2, ISD::CondCode Cond) {
1066 // These setcc operations always fold.
1070 case ISD::SETFALSE2: return getConstant(0, VT);
1072 case ISD::SETTRUE2: return getConstant(1, VT);
1084 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1088 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
1089 const APInt &C2 = N2C->getAPIntValue();
1090 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
1091 const APInt &C1 = N1C->getAPIntValue();
1094 default: assert(0 && "Unknown integer setcc!");
1095 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1096 case ISD::SETNE: return getConstant(C1 != C2, VT);
1097 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1098 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1099 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1100 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1101 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1102 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1103 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1104 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1108 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) {
1109 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
1110 // No compile time operations on this type yet.
1111 if (N1C->getValueType(0) == MVT::ppcf128)
1114 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1117 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1118 return getNode(ISD::UNDEF, VT);
1120 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1121 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1122 return getNode(ISD::UNDEF, VT);
1124 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1125 R==APFloat::cmpLessThan, VT);
1126 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1127 return getNode(ISD::UNDEF, VT);
1129 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1130 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1131 return getNode(ISD::UNDEF, VT);
1133 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1134 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1135 return getNode(ISD::UNDEF, VT);
1137 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1138 R==APFloat::cmpEqual, VT);
1139 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1140 return getNode(ISD::UNDEF, VT);
1142 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1143 R==APFloat::cmpEqual, VT);
1144 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1145 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1146 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1147 R==APFloat::cmpEqual, VT);
1148 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1149 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1150 R==APFloat::cmpLessThan, VT);
1151 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1152 R==APFloat::cmpUnordered, VT);
1153 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1154 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1157 // Ensure that the constant occurs on the RHS.
1158 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1162 // Could not fold it.
1166 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1167 /// use this predicate to simplify operations downstream.
1168 bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const {
1169 unsigned BitWidth = Op.getValueSizeInBits();
1170 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1173 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1174 /// this predicate to simplify operations downstream. Mask is known to be zero
1175 /// for bits that V cannot have.
1176 bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask,
1177 unsigned Depth) const {
1178 APInt KnownZero, KnownOne;
1179 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1180 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1181 return (KnownZero & Mask) == Mask;
1184 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1185 /// known to be either zero or one and return them in the KnownZero/KnownOne
1186 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1188 void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
1189 APInt &KnownZero, APInt &KnownOne,
1190 unsigned Depth) const {
1191 unsigned BitWidth = Mask.getBitWidth();
1192 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1193 "Mask size mismatches value type size!");
1195 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1196 if (Depth == 6 || Mask == 0)
1197 return; // Limit search depth.
1199 APInt KnownZero2, KnownOne2;
1201 switch (Op.getOpcode()) {
1203 // We know all of the bits for a constant!
1204 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1205 KnownZero = ~KnownOne & Mask;
1208 // If either the LHS or the RHS are Zero, the result is zero.
1209 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1210 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1211 KnownZero2, KnownOne2, Depth+1);
1212 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1213 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1215 // Output known-1 bits are only known if set in both the LHS & RHS.
1216 KnownOne &= KnownOne2;
1217 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1218 KnownZero |= KnownZero2;
1221 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1222 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1223 KnownZero2, KnownOne2, Depth+1);
1224 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1225 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1227 // Output known-0 bits are only known if clear in both the LHS & RHS.
1228 KnownZero &= KnownZero2;
1229 // Output known-1 are known to be set if set in either the LHS | RHS.
1230 KnownOne |= KnownOne2;
1233 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1234 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1235 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1236 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1238 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1239 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1240 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1241 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1242 KnownZero = KnownZeroOut;
1246 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1247 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1248 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1249 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1250 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1252 // If low bits are zero in either operand, output low known-0 bits.
1253 // Also compute a conserative estimate for high known-0 bits.
1254 // More trickiness is possible, but this is sufficient for the
1255 // interesting case of alignment computation.
1257 unsigned TrailZ = KnownZero.countTrailingOnes() +
1258 KnownZero2.countTrailingOnes();
1259 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1260 KnownZero2.countLeadingOnes(),
1261 BitWidth) - BitWidth;
1263 TrailZ = std::min(TrailZ, BitWidth);
1264 LeadZ = std::min(LeadZ, BitWidth);
1265 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1266 APInt::getHighBitsSet(BitWidth, LeadZ);
1271 // For the purposes of computing leading zeros we can conservatively
1272 // treat a udiv as a logical right shift by the power of 2 known to
1273 // be less than the denominator.
1274 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1275 ComputeMaskedBits(Op.getOperand(0),
1276 AllOnes, KnownZero2, KnownOne2, Depth+1);
1277 unsigned LeadZ = KnownZero2.countLeadingOnes();
1281 ComputeMaskedBits(Op.getOperand(1),
1282 AllOnes, KnownZero2, KnownOne2, Depth+1);
1283 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1284 if (RHSUnknownLeadingOnes != BitWidth)
1285 LeadZ = std::min(BitWidth,
1286 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1288 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1292 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1293 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1294 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1295 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1297 // Only known if known in both the LHS and RHS.
1298 KnownOne &= KnownOne2;
1299 KnownZero &= KnownZero2;
1301 case ISD::SELECT_CC:
1302 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1303 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1304 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1305 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1307 // Only known if known in both the LHS and RHS.
1308 KnownOne &= KnownOne2;
1309 KnownZero &= KnownZero2;
1312 // If we know the result of a setcc has the top bits zero, use this info.
1313 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1315 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1318 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1319 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1320 unsigned ShAmt = SA->getValue();
1322 // If the shift count is an invalid immediate, don't do anything.
1323 if (ShAmt >= BitWidth)
1326 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1327 KnownZero, KnownOne, Depth+1);
1328 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1329 KnownZero <<= ShAmt;
1331 // low bits known zero.
1332 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1336 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1337 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1338 unsigned ShAmt = SA->getValue();
1340 // If the shift count is an invalid immediate, don't do anything.
1341 if (ShAmt >= BitWidth)
1344 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1345 KnownZero, KnownOne, Depth+1);
1346 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1347 KnownZero = KnownZero.lshr(ShAmt);
1348 KnownOne = KnownOne.lshr(ShAmt);
1350 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1351 KnownZero |= HighBits; // High bits known zero.
1355 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1356 unsigned ShAmt = SA->getValue();
1358 // If the shift count is an invalid immediate, don't do anything.
1359 if (ShAmt >= BitWidth)
1362 APInt InDemandedMask = (Mask << ShAmt);
1363 // If any of the demanded bits are produced by the sign extension, we also
1364 // demand the input sign bit.
1365 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1366 if (HighBits.getBoolValue())
1367 InDemandedMask |= APInt::getSignBit(BitWidth);
1369 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1371 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1372 KnownZero = KnownZero.lshr(ShAmt);
1373 KnownOne = KnownOne.lshr(ShAmt);
1375 // Handle the sign bits.
1376 APInt SignBit = APInt::getSignBit(BitWidth);
1377 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1379 if (KnownZero.intersects(SignBit)) {
1380 KnownZero |= HighBits; // New bits are known zero.
1381 } else if (KnownOne.intersects(SignBit)) {
1382 KnownOne |= HighBits; // New bits are known one.
1386 case ISD::SIGN_EXTEND_INREG: {
1387 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1388 unsigned EBits = EVT.getSizeInBits();
1390 // Sign extension. Compute the demanded bits in the result that are not
1391 // present in the input.
1392 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1394 APInt InSignBit = APInt::getSignBit(EBits);
1395 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1397 // If the sign extended bits are demanded, we know that the sign
1399 InSignBit.zext(BitWidth);
1400 if (NewBits.getBoolValue())
1401 InputDemandedBits |= InSignBit;
1403 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1404 KnownZero, KnownOne, Depth+1);
1405 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1407 // If the sign bit of the input is known set or clear, then we know the
1408 // top bits of the result.
1409 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1410 KnownZero |= NewBits;
1411 KnownOne &= ~NewBits;
1412 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1413 KnownOne |= NewBits;
1414 KnownZero &= ~NewBits;
1415 } else { // Input sign bit unknown
1416 KnownZero &= ~NewBits;
1417 KnownOne &= ~NewBits;
1424 unsigned LowBits = Log2_32(BitWidth)+1;
1425 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1430 if (ISD::isZEXTLoad(Op.Val)) {
1431 LoadSDNode *LD = cast<LoadSDNode>(Op);
1432 MVT VT = LD->getMemoryVT();
1433 unsigned MemBits = VT.getSizeInBits();
1434 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1438 case ISD::ZERO_EXTEND: {
1439 MVT InVT = Op.getOperand(0).getValueType();
1440 unsigned InBits = InVT.getSizeInBits();
1441 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1442 APInt InMask = Mask;
1443 InMask.trunc(InBits);
1444 KnownZero.trunc(InBits);
1445 KnownOne.trunc(InBits);
1446 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1447 KnownZero.zext(BitWidth);
1448 KnownOne.zext(BitWidth);
1449 KnownZero |= NewBits;
1452 case ISD::SIGN_EXTEND: {
1453 MVT InVT = Op.getOperand(0).getValueType();
1454 unsigned InBits = InVT.getSizeInBits();
1455 APInt InSignBit = APInt::getSignBit(InBits);
1456 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1457 APInt InMask = Mask;
1458 InMask.trunc(InBits);
1460 // If any of the sign extended bits are demanded, we know that the sign
1461 // bit is demanded. Temporarily set this bit in the mask for our callee.
1462 if (NewBits.getBoolValue())
1463 InMask |= InSignBit;
1465 KnownZero.trunc(InBits);
1466 KnownOne.trunc(InBits);
1467 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1469 // Note if the sign bit is known to be zero or one.
1470 bool SignBitKnownZero = KnownZero.isNegative();
1471 bool SignBitKnownOne = KnownOne.isNegative();
1472 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1473 "Sign bit can't be known to be both zero and one!");
1475 // If the sign bit wasn't actually demanded by our caller, we don't
1476 // want it set in the KnownZero and KnownOne result values. Reset the
1477 // mask and reapply it to the result values.
1479 InMask.trunc(InBits);
1480 KnownZero &= InMask;
1483 KnownZero.zext(BitWidth);
1484 KnownOne.zext(BitWidth);
1486 // If the sign bit is known zero or one, the top bits match.
1487 if (SignBitKnownZero)
1488 KnownZero |= NewBits;
1489 else if (SignBitKnownOne)
1490 KnownOne |= NewBits;
1493 case ISD::ANY_EXTEND: {
1494 MVT InVT = Op.getOperand(0).getValueType();
1495 unsigned InBits = InVT.getSizeInBits();
1496 APInt InMask = Mask;
1497 InMask.trunc(InBits);
1498 KnownZero.trunc(InBits);
1499 KnownOne.trunc(InBits);
1500 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1501 KnownZero.zext(BitWidth);
1502 KnownOne.zext(BitWidth);
1505 case ISD::TRUNCATE: {
1506 MVT InVT = Op.getOperand(0).getValueType();
1507 unsigned InBits = InVT.getSizeInBits();
1508 APInt InMask = Mask;
1509 InMask.zext(InBits);
1510 KnownZero.zext(InBits);
1511 KnownOne.zext(InBits);
1512 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1513 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1514 KnownZero.trunc(BitWidth);
1515 KnownOne.trunc(BitWidth);
1518 case ISD::AssertZext: {
1519 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1520 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1521 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1523 KnownZero |= (~InMask) & Mask;
1527 // All bits are zero except the low bit.
1528 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1532 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1533 // We know that the top bits of C-X are clear if X contains less bits
1534 // than C (i.e. no wrap-around can happen). For example, 20-X is
1535 // positive if we can prove that X is >= 0 and < 16.
1536 if (CLHS->getAPIntValue().isNonNegative()) {
1537 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1538 // NLZ can't be BitWidth with no sign bit
1539 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1540 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1543 // If all of the MaskV bits are known to be zero, then we know the
1544 // output top bits are zero, because we now know that the output is
1546 if ((KnownZero2 & MaskV) == MaskV) {
1547 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1548 // Top bits known zero.
1549 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1556 // Output known-0 bits are known if clear or set in both the low clear bits
1557 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1558 // low 3 bits clear.
1559 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1560 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1562 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1564 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1566 KnownZeroOut = std::min(KnownZeroOut,
1567 KnownZero2.countTrailingOnes());
1569 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1573 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1574 APInt RA = Rem->getAPIntValue();
1575 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1576 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1577 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1578 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1580 // The sign of a remainder is equal to the sign of the first
1581 // operand (zero being positive).
1582 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1583 KnownZero2 |= ~LowBits;
1584 else if (KnownOne2[BitWidth-1])
1585 KnownOne2 |= ~LowBits;
1587 KnownZero |= KnownZero2 & Mask;
1588 KnownOne |= KnownOne2 & Mask;
1590 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1595 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1596 APInt RA = Rem->getAPIntValue();
1597 if (RA.isPowerOf2()) {
1598 APInt LowBits = (RA - 1);
1599 APInt Mask2 = LowBits & Mask;
1600 KnownZero |= ~LowBits & Mask;
1601 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1602 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1607 // Since the result is less than or equal to either operand, any leading
1608 // zero bits in either operand must also exist in the result.
1609 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1610 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1612 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1615 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1616 KnownZero2.countLeadingOnes());
1618 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1622 // Allow the target to implement this method for its nodes.
1623 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1624 case ISD::INTRINSIC_WO_CHAIN:
1625 case ISD::INTRINSIC_W_CHAIN:
1626 case ISD::INTRINSIC_VOID:
1627 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1633 /// ComputeNumSignBits - Return the number of times the sign bit of the
1634 /// register is replicated into the other bits. We know that at least 1 bit
1635 /// is always equal to the sign bit (itself), but other cases can give us
1636 /// information. For example, immediately after an "SRA X, 2", we know that
1637 /// the top 3 bits are all equal to each other, so we return 3.
1638 unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
1639 MVT VT = Op.getValueType();
1640 assert(VT.isInteger() && "Invalid VT!");
1641 unsigned VTBits = VT.getSizeInBits();
1643 unsigned FirstAnswer = 1;
1646 return 1; // Limit search depth.
1648 switch (Op.getOpcode()) {
1650 case ISD::AssertSext:
1651 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1652 return VTBits-Tmp+1;
1653 case ISD::AssertZext:
1654 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1657 case ISD::Constant: {
1658 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1659 // If negative, return # leading ones.
1660 if (Val.isNegative())
1661 return Val.countLeadingOnes();
1663 // Return # leading zeros.
1664 return Val.countLeadingZeros();
1667 case ISD::SIGN_EXTEND:
1668 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1669 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1671 case ISD::SIGN_EXTEND_INREG:
1672 // Max of the input and what this extends.
1673 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1676 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1677 return std::max(Tmp, Tmp2);
1680 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1681 // SRA X, C -> adds C sign bits.
1682 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1683 Tmp += C->getValue();
1684 if (Tmp > VTBits) Tmp = VTBits;
1688 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1689 // shl destroys sign bits.
1690 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1691 if (C->getValue() >= VTBits || // Bad shift.
1692 C->getValue() >= Tmp) break; // Shifted all sign bits out.
1693 return Tmp - C->getValue();
1698 case ISD::XOR: // NOT is handled here.
1699 // Logical binary ops preserve the number of sign bits at the worst.
1700 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1702 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1703 FirstAnswer = std::min(Tmp, Tmp2);
1704 // We computed what we know about the sign bits as our first
1705 // answer. Now proceed to the generic code that uses
1706 // ComputeMaskedBits, and pick whichever answer is better.
1711 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1712 if (Tmp == 1) return 1; // Early out.
1713 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1714 return std::min(Tmp, Tmp2);
1717 // If setcc returns 0/-1, all bits are sign bits.
1718 if (TLI.getSetCCResultContents() ==
1719 TargetLowering::ZeroOrNegativeOneSetCCResult)
1724 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1725 unsigned RotAmt = C->getValue() & (VTBits-1);
1727 // Handle rotate right by N like a rotate left by 32-N.
1728 if (Op.getOpcode() == ISD::ROTR)
1729 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1731 // If we aren't rotating out all of the known-in sign bits, return the
1732 // number that are left. This handles rotl(sext(x), 1) for example.
1733 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1734 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1738 // Add can have at most one carry bit. Thus we know that the output
1739 // is, at worst, one more bit than the inputs.
1740 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1741 if (Tmp == 1) return 1; // Early out.
1743 // Special case decrementing a value (ADD X, -1):
1744 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1745 if (CRHS->isAllOnesValue()) {
1746 APInt KnownZero, KnownOne;
1747 APInt Mask = APInt::getAllOnesValue(VTBits);
1748 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1750 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1752 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1755 // If we are subtracting one from a positive number, there is no carry
1756 // out of the result.
1757 if (KnownZero.isNegative())
1761 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1762 if (Tmp2 == 1) return 1;
1763 return std::min(Tmp, Tmp2)-1;
1767 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1768 if (Tmp2 == 1) return 1;
1771 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1772 if (CLHS->isNullValue()) {
1773 APInt KnownZero, KnownOne;
1774 APInt Mask = APInt::getAllOnesValue(VTBits);
1775 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1776 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1778 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1781 // If the input is known to be positive (the sign bit is known clear),
1782 // the output of the NEG has the same number of sign bits as the input.
1783 if (KnownZero.isNegative())
1786 // Otherwise, we treat this like a SUB.
1789 // Sub can have at most one carry bit. Thus we know that the output
1790 // is, at worst, one more bit than the inputs.
1791 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1792 if (Tmp == 1) return 1; // Early out.
1793 return std::min(Tmp, Tmp2)-1;
1796 // FIXME: it's tricky to do anything useful for this, but it is an important
1797 // case for targets like X86.
1801 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1802 if (Op.getOpcode() == ISD::LOAD) {
1803 LoadSDNode *LD = cast<LoadSDNode>(Op);
1804 unsigned ExtType = LD->getExtensionType();
1807 case ISD::SEXTLOAD: // '17' bits known
1808 Tmp = LD->getMemoryVT().getSizeInBits();
1809 return VTBits-Tmp+1;
1810 case ISD::ZEXTLOAD: // '16' bits known
1811 Tmp = LD->getMemoryVT().getSizeInBits();
1816 // Allow the target to implement this method for its nodes.
1817 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1818 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1819 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1820 Op.getOpcode() == ISD::INTRINSIC_VOID) {
1821 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
1822 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
1825 // Finally, if we can prove that the top bits of the result are 0's or 1's,
1826 // use this information.
1827 APInt KnownZero, KnownOne;
1828 APInt Mask = APInt::getAllOnesValue(VTBits);
1829 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1831 if (KnownZero.isNegative()) { // sign bit is 0
1833 } else if (KnownOne.isNegative()) { // sign bit is 1;
1840 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
1841 // the number of identical bits in the top of the input value.
1843 Mask <<= Mask.getBitWidth()-VTBits;
1844 // Return # leading zeros. We use 'min' here in case Val was zero before
1845 // shifting. We don't want to return '64' as for an i32 "0".
1846 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
1850 bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const {
1851 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
1852 if (!GA) return false;
1853 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
1854 if (!GV) return false;
1855 MachineModuleInfo *MMI = getMachineModuleInfo();
1856 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
1860 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
1861 /// element of the result of the vector shuffle.
1862 SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) {
1863 MVT VT = N->getValueType(0);
1864 SDOperand PermMask = N->getOperand(2);
1865 unsigned NumElems = PermMask.getNumOperands();
1866 SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1);
1869 if (V.getOpcode() == ISD::BIT_CONVERT) {
1870 V = V.getOperand(0);
1871 if (V.getValueType().getVectorNumElements() != NumElems)
1874 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
1875 return (Idx == 0) ? V.getOperand(0)
1876 : getNode(ISD::UNDEF, VT.getVectorElementType());
1877 if (V.getOpcode() == ISD::BUILD_VECTOR)
1878 return V.getOperand(Idx);
1879 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) {
1880 SDOperand Elt = PermMask.getOperand(Idx);
1881 if (Elt.getOpcode() == ISD::UNDEF)
1882 return getNode(ISD::UNDEF, VT.getVectorElementType());
1883 return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Elt)->getValue());
1889 /// getNode - Gets or creates the specified node.
1891 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) {
1892 FoldingSetNodeID ID;
1893 AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0);
1895 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1896 return SDOperand(E, 0);
1897 SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT));
1898 CSEMap.InsertNode(N, IP);
1900 AllNodes.push_back(N);
1901 return SDOperand(N, 0);
1904 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) {
1905 // Constant fold unary operations with an integer constant operand.
1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1907 const APInt &Val = C->getAPIntValue();
1908 unsigned BitWidth = VT.getSizeInBits();
1911 case ISD::SIGN_EXTEND:
1912 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
1913 case ISD::ANY_EXTEND:
1914 case ISD::ZERO_EXTEND:
1916 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
1917 case ISD::UINT_TO_FP:
1918 case ISD::SINT_TO_FP: {
1919 const uint64_t zero[] = {0, 0};
1920 // No compile time operations on this type.
1921 if (VT==MVT::ppcf128)
1923 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
1924 (void)apf.convertFromAPInt(Val,
1925 Opcode==ISD::SINT_TO_FP,
1926 APFloat::rmNearestTiesToEven);
1927 return getConstantFP(apf, VT);
1929 case ISD::BIT_CONVERT:
1930 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
1931 return getConstantFP(Val.bitsToFloat(), VT);
1932 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
1933 return getConstantFP(Val.bitsToDouble(), VT);
1936 return getConstant(Val.byteSwap(), VT);
1938 return getConstant(Val.countPopulation(), VT);
1940 return getConstant(Val.countLeadingZeros(), VT);
1942 return getConstant(Val.countTrailingZeros(), VT);
1946 // Constant fold unary operations with a floating point constant operand.
1947 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) {
1948 APFloat V = C->getValueAPF(); // make copy
1949 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
1953 return getConstantFP(V, VT);
1956 return getConstantFP(V, VT);
1958 case ISD::FP_EXTEND:
1959 // This can return overflow, underflow, or inexact; we don't care.
1960 // FIXME need to be more flexible about rounding mode.
1961 (void)V.convert(*MVTToAPFloatSemantics(VT),
1962 APFloat::rmNearestTiesToEven);
1963 return getConstantFP(V, VT);
1964 case ISD::FP_TO_SINT:
1965 case ISD::FP_TO_UINT: {
1967 assert(integerPartWidth >= 64);
1968 // FIXME need to be more flexible about rounding mode.
1969 APFloat::opStatus s = V.convertToInteger(&x, 64U,
1970 Opcode==ISD::FP_TO_SINT,
1971 APFloat::rmTowardZero);
1972 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
1974 return getConstant(x, VT);
1976 case ISD::BIT_CONVERT:
1977 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
1978 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT);
1979 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
1980 return getConstant(V.convertToAPInt().getZExtValue(), VT);
1986 unsigned OpOpcode = Operand.Val->getOpcode();
1988 case ISD::TokenFactor:
1989 case ISD::MERGE_VALUES:
1990 return Operand; // Factor or merge of one node? No need.
1991 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
1992 case ISD::FP_EXTEND:
1993 assert(VT.isFloatingPoint() &&
1994 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
1995 if (Operand.getValueType() == VT) return Operand; // noop conversion.
1996 if (Operand.getOpcode() == ISD::UNDEF)
1997 return getNode(ISD::UNDEF, VT);
1999 case ISD::SIGN_EXTEND:
2000 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2001 "Invalid SIGN_EXTEND!");
2002 if (Operand.getValueType() == VT) return Operand; // noop extension
2003 assert(Operand.getValueType().bitsLT(VT)
2004 && "Invalid sext node, dst < src!");
2005 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2006 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2008 case ISD::ZERO_EXTEND:
2009 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2010 "Invalid ZERO_EXTEND!");
2011 if (Operand.getValueType() == VT) return Operand; // noop extension
2012 assert(Operand.getValueType().bitsLT(VT)
2013 && "Invalid zext node, dst < src!");
2014 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2015 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
2017 case ISD::ANY_EXTEND:
2018 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2019 "Invalid ANY_EXTEND!");
2020 if (Operand.getValueType() == VT) return Operand; // noop extension
2021 assert(Operand.getValueType().bitsLT(VT)
2022 && "Invalid anyext node, dst < src!");
2023 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2024 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2025 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2028 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2029 "Invalid TRUNCATE!");
2030 if (Operand.getValueType() == VT) return Operand; // noop truncate
2031 assert(Operand.getValueType().bitsGT(VT)
2032 && "Invalid truncate node, src < dst!");
2033 if (OpOpcode == ISD::TRUNCATE)
2034 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2035 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2036 OpOpcode == ISD::ANY_EXTEND) {
2037 // If the source is smaller than the dest, we still need an extend.
2038 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT))
2039 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2040 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT))
2041 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2043 return Operand.Val->getOperand(0);
2046 case ISD::BIT_CONVERT:
2047 // Basic sanity checking.
2048 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2049 && "Cannot BIT_CONVERT between types of different sizes!");
2050 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2051 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2052 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2053 if (OpOpcode == ISD::UNDEF)
2054 return getNode(ISD::UNDEF, VT);
2056 case ISD::SCALAR_TO_VECTOR:
2057 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2058 VT.getVectorElementType() == Operand.getValueType() &&
2059 "Illegal SCALAR_TO_VECTOR node!");
2060 if (OpOpcode == ISD::UNDEF)
2061 return getNode(ISD::UNDEF, VT);
2062 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2063 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2064 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2065 Operand.getConstantOperandVal(1) == 0 &&
2066 Operand.getOperand(0).getValueType() == VT)
2067 return Operand.getOperand(0);
2070 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2071 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1),
2072 Operand.Val->getOperand(0));
2073 if (OpOpcode == ISD::FNEG) // --X -> X
2074 return Operand.Val->getOperand(0);
2077 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2078 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
2083 SDVTList VTs = getVTList(VT);
2084 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2085 FoldingSetNodeID ID;
2086 SDOperand Ops[1] = { Operand };
2087 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2090 return SDOperand(E, 0);
2091 N = new UnarySDNode(Opcode, VTs, Operand);
2092 CSEMap.InsertNode(N, IP);
2094 N = new UnarySDNode(Opcode, VTs, Operand);
2096 AllNodes.push_back(N);
2097 return SDOperand(N, 0);
2102 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2103 SDOperand N1, SDOperand N2) {
2104 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2105 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2108 case ISD::TokenFactor:
2109 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2110 N2.getValueType() == MVT::Other && "Invalid token factor!");
2111 // Fold trivial token factors.
2112 if (N1.getOpcode() == ISD::EntryToken) return N2;
2113 if (N2.getOpcode() == ISD::EntryToken) return N1;
2116 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2117 N1.getValueType() == VT && "Binary operator types must match!");
2118 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2119 // worth handling here.
2120 if (N2C && N2C->isNullValue())
2122 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2129 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2130 N1.getValueType() == VT && "Binary operator types must match!");
2131 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2132 // it's worth handling here.
2133 if (N2C && N2C->isNullValue())
2140 assert(VT.isInteger() && "This operator does not apply to FP types!");
2150 assert(N1.getValueType() == N2.getValueType() &&
2151 N1.getValueType() == VT && "Binary operator types must match!");
2153 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2154 assert(N1.getValueType() == VT &&
2155 N1.getValueType().isFloatingPoint() &&
2156 N2.getValueType().isFloatingPoint() &&
2157 "Invalid FCOPYSIGN!");
2164 assert(VT == N1.getValueType() &&
2165 "Shift operators return type must be the same as their first arg");
2166 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2167 VT != MVT::i1 && "Shifts only work on integers");
2169 case ISD::FP_ROUND_INREG: {
2170 MVT EVT = cast<VTSDNode>(N2)->getVT();
2171 assert(VT == N1.getValueType() && "Not an inreg round!");
2172 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2173 "Cannot FP_ROUND_INREG integer types");
2174 assert(EVT.bitsLE(VT) && "Not rounding down!");
2175 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2179 assert(VT.isFloatingPoint() &&
2180 N1.getValueType().isFloatingPoint() &&
2181 VT.bitsLE(N1.getValueType()) &&
2182 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2183 if (N1.getValueType() == VT) return N1; // noop conversion.
2185 case ISD::AssertSext:
2186 case ISD::AssertZext: {
2187 MVT EVT = cast<VTSDNode>(N2)->getVT();
2188 assert(VT == N1.getValueType() && "Not an inreg extend!");
2189 assert(VT.isInteger() && EVT.isInteger() &&
2190 "Cannot *_EXTEND_INREG FP types");
2191 assert(EVT.bitsLE(VT) && "Not extending!");
2192 if (VT == EVT) return N1; // noop assertion.
2195 case ISD::SIGN_EXTEND_INREG: {
2196 MVT EVT = cast<VTSDNode>(N2)->getVT();
2197 assert(VT == N1.getValueType() && "Not an inreg extend!");
2198 assert(VT.isInteger() && EVT.isInteger() &&
2199 "Cannot *_EXTEND_INREG FP types");
2200 assert(EVT.bitsLE(VT) && "Not extending!");
2201 if (EVT == VT) return N1; // Not actually extending
2204 APInt Val = N1C->getAPIntValue();
2205 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2206 Val <<= Val.getBitWidth()-FromBits;
2207 Val = Val.ashr(Val.getBitWidth()-FromBits);
2208 return getConstant(Val, VT);
2212 case ISD::EXTRACT_VECTOR_ELT:
2213 assert(N2C && "Bad EXTRACT_VECTOR_ELT!");
2215 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2216 if (N1.getOpcode() == ISD::UNDEF)
2217 return getNode(ISD::UNDEF, VT);
2219 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2220 // expanding copies of large vectors from registers.
2221 if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
2222 N1.getNumOperands() > 0) {
2224 N1.getOperand(0).getValueType().getVectorNumElements();
2225 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2226 N1.getOperand(N2C->getValue() / Factor),
2227 getConstant(N2C->getValue() % Factor, N2.getValueType()));
2230 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2231 // expanding large vector constants.
2232 if (N1.getOpcode() == ISD::BUILD_VECTOR)
2233 return N1.getOperand(N2C->getValue());
2235 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2236 // operations are lowered to scalars.
2237 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT)
2238 if (ConstantSDNode *IEC = dyn_cast<ConstantSDNode>(N1.getOperand(2))) {
2240 return N1.getOperand(1);
2242 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2245 case ISD::EXTRACT_ELEMENT:
2246 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
2247 assert(!N1.getValueType().isVector() &&
2248 N1.getValueType().isInteger() &&
2249 !VT.isVector() && VT.isInteger() &&
2250 "EXTRACT_ELEMENT only applies to integers!");
2252 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2253 // 64-bit integers into 32-bit parts. Instead of building the extract of
2254 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2255 if (N1.getOpcode() == ISD::BUILD_PAIR)
2256 return N1.getOperand(N2C->getValue());
2258 // EXTRACT_ELEMENT of a constant int is also very common.
2259 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2260 unsigned ElementSize = VT.getSizeInBits();
2261 unsigned Shift = ElementSize * N2C->getValue();
2262 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2263 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2266 case ISD::EXTRACT_SUBVECTOR:
2267 if (N1.getValueType() == VT) // Trivial extraction.
2274 APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue();
2276 case ISD::ADD: return getConstant(C1 + C2, VT);
2277 case ISD::SUB: return getConstant(C1 - C2, VT);
2278 case ISD::MUL: return getConstant(C1 * C2, VT);
2280 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2283 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2286 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2289 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2291 case ISD::AND : return getConstant(C1 & C2, VT);
2292 case ISD::OR : return getConstant(C1 | C2, VT);
2293 case ISD::XOR : return getConstant(C1 ^ C2, VT);
2294 case ISD::SHL : return getConstant(C1 << C2, VT);
2295 case ISD::SRL : return getConstant(C1.lshr(C2), VT);
2296 case ISD::SRA : return getConstant(C1.ashr(C2), VT);
2297 case ISD::ROTL : return getConstant(C1.rotl(C2), VT);
2298 case ISD::ROTR : return getConstant(C1.rotr(C2), VT);
2301 } else { // Cannonicalize constant to RHS if commutative
2302 if (isCommutativeBinOp(Opcode)) {
2303 std::swap(N1C, N2C);
2309 // Constant fold FP operations.
2310 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
2311 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
2313 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2314 // Cannonicalize constant to RHS if commutative
2315 std::swap(N1CFP, N2CFP);
2317 } else if (N2CFP && VT != MVT::ppcf128) {
2318 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2319 APFloat::opStatus s;
2322 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2323 if (s != APFloat::opInvalidOp)
2324 return getConstantFP(V1, VT);
2327 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2328 if (s!=APFloat::opInvalidOp)
2329 return getConstantFP(V1, VT);
2332 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2333 if (s!=APFloat::opInvalidOp)
2334 return getConstantFP(V1, VT);
2337 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2338 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2339 return getConstantFP(V1, VT);
2342 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2343 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2344 return getConstantFP(V1, VT);
2346 case ISD::FCOPYSIGN:
2348 return getConstantFP(V1, VT);
2354 // Canonicalize an UNDEF to the RHS, even over a constant.
2355 if (N1.getOpcode() == ISD::UNDEF) {
2356 if (isCommutativeBinOp(Opcode)) {
2360 case ISD::FP_ROUND_INREG:
2361 case ISD::SIGN_EXTEND_INREG:
2367 return N1; // fold op(undef, arg2) -> undef
2375 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2376 // For vectors, we can't easily build an all zero vector, just return
2383 // Fold a bunch of operators when the RHS is undef.
2384 if (N2.getOpcode() == ISD::UNDEF) {
2387 if (N1.getOpcode() == ISD::UNDEF)
2388 // Handle undef ^ undef -> 0 special case. This is a common
2390 return getConstant(0, VT);
2405 return N2; // fold op(arg1, undef) -> undef
2411 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2412 // For vectors, we can't easily build an all zero vector, just return
2417 return getConstant(VT.getIntegerVTBitMask(), VT);
2418 // For vectors, we can't easily build an all one vector, just return
2426 // Memoize this node if possible.
2428 SDVTList VTs = getVTList(VT);
2429 if (VT != MVT::Flag) {
2430 SDOperand Ops[] = { N1, N2 };
2431 FoldingSetNodeID ID;
2432 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2434 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2435 return SDOperand(E, 0);
2436 N = new BinarySDNode(Opcode, VTs, N1, N2);
2437 CSEMap.InsertNode(N, IP);
2439 N = new BinarySDNode(Opcode, VTs, N1, N2);
2442 AllNodes.push_back(N);
2443 return SDOperand(N, 0);
2446 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2447 SDOperand N1, SDOperand N2, SDOperand N3) {
2448 // Perform various simplifications.
2449 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2450 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2453 // Use FoldSetCC to simplify SETCC's.
2454 SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2455 if (Simp.Val) return Simp;
2460 if (N1C->getValue())
2461 return N2; // select true, X, Y -> X
2463 return N3; // select false, X, Y -> Y
2466 if (N2 == N3) return N2; // select C, X, X -> X
2470 if (N2C->getValue()) // Unconditional branch
2471 return getNode(ISD::BR, MVT::Other, N1, N3);
2473 return N1; // Never-taken branch
2476 case ISD::VECTOR_SHUFFLE:
2477 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2478 VT.isVector() && N3.getValueType().isVector() &&
2479 N3.getOpcode() == ISD::BUILD_VECTOR &&
2480 VT.getVectorNumElements() == N3.getNumOperands() &&
2481 "Illegal VECTOR_SHUFFLE node!");
2483 case ISD::BIT_CONVERT:
2484 // Fold bit_convert nodes from a type to themselves.
2485 if (N1.getValueType() == VT)
2490 // Memoize node if it doesn't produce a flag.
2492 SDVTList VTs = getVTList(VT);
2493 if (VT != MVT::Flag) {
2494 SDOperand Ops[] = { N1, N2, N3 };
2495 FoldingSetNodeID ID;
2496 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2498 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2499 return SDOperand(E, 0);
2500 N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
2501 CSEMap.InsertNode(N, IP);
2503 N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
2505 AllNodes.push_back(N);
2506 return SDOperand(N, 0);
2509 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2510 SDOperand N1, SDOperand N2, SDOperand N3,
2512 SDOperand Ops[] = { N1, N2, N3, N4 };
2513 return getNode(Opcode, VT, Ops, 4);
2516 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2517 SDOperand N1, SDOperand N2, SDOperand N3,
2518 SDOperand N4, SDOperand N5) {
2519 SDOperand Ops[] = { N1, N2, N3, N4, N5 };
2520 return getNode(Opcode, VT, Ops, 5);
2523 /// getMemsetValue - Vectorized representation of the memset value
2525 static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) {
2526 unsigned NumBits = VT.isVector() ?
2527 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2528 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2529 APInt Val = APInt(NumBits, C->getValue() & 255);
2531 for (unsigned i = NumBits; i > 8; i >>= 1) {
2532 Val = (Val << Shift) | Val;
2536 return DAG.getConstant(Val, VT);
2537 return DAG.getConstantFP(APFloat(Val), VT);
2540 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2542 for (unsigned i = NumBits; i > 8; i >>= 1) {
2543 Value = DAG.getNode(ISD::OR, VT,
2544 DAG.getNode(ISD::SHL, VT, Value,
2545 DAG.getConstant(Shift, MVT::i8)), Value);
2552 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2553 /// used when a memcpy is turned into a memset when the source is a constant
2555 static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2556 const TargetLowering &TLI,
2557 std::string &Str, unsigned Offset) {
2558 assert(!VT.isVector() && "Can't handle vector type here!");
2559 unsigned NumBits = VT.getSizeInBits();
2560 unsigned MSB = NumBits / 8;
2562 if (TLI.isLittleEndian())
2563 Offset = Offset + MSB - 1;
2564 for (unsigned i = 0; i != MSB; ++i) {
2565 Val = (Val << 8) | (unsigned char)Str[Offset];
2566 Offset += TLI.isLittleEndian() ? -1 : 1;
2568 return DAG.getConstant(Val, VT);
2571 /// getMemBasePlusOffset - Returns base and offset node for the
2573 static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset,
2574 SelectionDAG &DAG) {
2575 MVT VT = Base.getValueType();
2576 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2579 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2581 static bool isMemSrcFromString(SDOperand Src, std::string &Str,
2583 unsigned SrcDelta = 0;
2584 GlobalAddressSDNode *G = NULL;
2585 if (Src.getOpcode() == ISD::GlobalAddress)
2586 G = cast<GlobalAddressSDNode>(Src);
2587 else if (Src.getOpcode() == ISD::ADD &&
2588 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2589 Src.getOperand(1).getOpcode() == ISD::Constant) {
2590 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2591 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue();
2596 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2597 if (GV && GV->isConstant()) {
2598 Str = GV->getStringValue(false);
2608 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2609 /// to replace the memset / memcpy is below the threshold. It also returns the
2610 /// types of the sequence of memory ops to perform memset / memcpy.
2612 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2613 SDOperand Dst, SDOperand Src,
2614 unsigned Limit, uint64_t Size, unsigned &Align,
2616 const TargetLowering &TLI) {
2617 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2620 uint64_t SrcOff = 0;
2621 bool isSrcStr = isMemSrcFromString(Src, Str, SrcOff);
2622 bool isSrcConst = isa<ConstantSDNode>(Src);
2623 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2624 if (VT != MVT::iAny) {
2625 unsigned NewAlign = (unsigned)
2626 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2627 // If source is a string constant, this will require an unaligned load.
2628 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2629 if (Dst.getOpcode() != ISD::FrameIndex) {
2630 // Can't change destination alignment. It requires a unaligned store.
2634 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2635 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2636 if (MFI->isFixedObjectIndex(FI)) {
2637 // Can't change destination alignment. It requires a unaligned store.
2641 // Give the stack frame object a larger alignment if needed.
2642 if (MFI->getObjectAlignment(FI) < NewAlign)
2643 MFI->setObjectAlignment(FI, NewAlign);
2650 if (VT == MVT::iAny) {
2654 switch (Align & 7) {
2655 case 0: VT = MVT::i64; break;
2656 case 4: VT = MVT::i32; break;
2657 case 2: VT = MVT::i16; break;
2658 default: VT = MVT::i8; break;
2663 while (!TLI.isTypeLegal(LVT))
2664 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2665 assert(LVT.isInteger());
2671 unsigned NumMemOps = 0;
2673 unsigned VTSize = VT.getSizeInBits() / 8;
2674 while (VTSize > Size) {
2675 // For now, only use non-vector load / store's for the left-over pieces.
2676 if (VT.isVector()) {
2678 while (!TLI.isTypeLegal(VT))
2679 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2680 VTSize = VT.getSizeInBits() / 8;
2682 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2687 if (++NumMemOps > Limit)
2689 MemOps.push_back(VT);
2696 static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG,
2697 SDOperand Chain, SDOperand Dst,
2698 SDOperand Src, uint64_t Size,
2699 unsigned Align, bool AlwaysInline,
2700 const Value *DstSV, uint64_t DstSVOff,
2701 const Value *SrcSV, uint64_t SrcSVOff){
2702 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2704 // Expand memcpy to a series of load and store ops if the size operand falls
2705 // below a certain threshold.
2706 std::vector<MVT> MemOps;
2707 uint64_t Limit = -1;
2709 Limit = TLI.getMaxStoresPerMemcpy();
2710 unsigned DstAlign = Align; // Destination alignment can change.
2711 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2716 uint64_t SrcOff = 0, DstOff = 0;
2717 bool CopyFromStr = isMemSrcFromString(Src, Str, SrcOff);
2719 SmallVector<SDOperand, 8> OutChains;
2720 unsigned NumMemOps = MemOps.size();
2721 for (unsigned i = 0; i < NumMemOps; i++) {
2723 unsigned VTSize = VT.getSizeInBits() / 8;
2724 SDOperand Value, Store;
2726 if (CopyFromStr && !VT.isVector()) {
2727 // It's unlikely a store of a vector immediate can be done in a single
2728 // instruction. It would require a load from a constantpool first.
2729 // FIXME: Handle cases where store of vector immediate is done in a
2730 // single instruction.
2731 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2732 Store = DAG.getStore(Chain, Value,
2733 getMemBasePlusOffset(Dst, DstOff, DAG),
2734 DstSV, DstSVOff + DstOff);
2736 Value = DAG.getLoad(VT, Chain,
2737 getMemBasePlusOffset(Src, SrcOff, DAG),
2738 SrcSV, SrcSVOff + SrcOff, false, Align);
2739 Store = DAG.getStore(Chain, Value,
2740 getMemBasePlusOffset(Dst, DstOff, DAG),
2741 DstSV, DstSVOff + DstOff, false, DstAlign);
2743 OutChains.push_back(Store);
2748 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2749 &OutChains[0], OutChains.size());
2752 static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG,
2753 SDOperand Chain, SDOperand Dst,
2754 SDOperand Src, uint64_t Size,
2755 unsigned Align, bool AlwaysInline,
2756 const Value *DstSV, uint64_t DstSVOff,
2757 const Value *SrcSV, uint64_t SrcSVOff){
2758 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2760 // Expand memmove to a series of load and store ops if the size operand falls
2761 // below a certain threshold.
2762 std::vector<MVT> MemOps;
2763 uint64_t Limit = -1;
2765 Limit = TLI.getMaxStoresPerMemmove();
2766 unsigned DstAlign = Align; // Destination alignment can change.
2767 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2771 uint64_t SrcOff = 0, DstOff = 0;
2773 SmallVector<SDOperand, 8> LoadValues;
2774 SmallVector<SDOperand, 8> LoadChains;
2775 SmallVector<SDOperand, 8> OutChains;
2776 unsigned NumMemOps = MemOps.size();
2777 for (unsigned i = 0; i < NumMemOps; i++) {
2779 unsigned VTSize = VT.getSizeInBits() / 8;
2780 SDOperand Value, Store;
2782 Value = DAG.getLoad(VT, Chain,
2783 getMemBasePlusOffset(Src, SrcOff, DAG),
2784 SrcSV, SrcSVOff + SrcOff, false, Align);
2785 LoadValues.push_back(Value);
2786 LoadChains.push_back(Value.getValue(1));
2789 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
2790 &LoadChains[0], LoadChains.size());
2792 for (unsigned i = 0; i < NumMemOps; i++) {
2794 unsigned VTSize = VT.getSizeInBits() / 8;
2795 SDOperand Value, Store;
2797 Store = DAG.getStore(Chain, LoadValues[i],
2798 getMemBasePlusOffset(Dst, DstOff, DAG),
2799 DstSV, DstSVOff + DstOff, false, DstAlign);
2800 OutChains.push_back(Store);
2804 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2805 &OutChains[0], OutChains.size());
2808 static SDOperand getMemsetStores(SelectionDAG &DAG,
2809 SDOperand Chain, SDOperand Dst,
2810 SDOperand Src, uint64_t Size,
2812 const Value *DstSV, uint64_t DstSVOff) {
2813 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2815 // Expand memset to a series of load/store ops if the size operand
2816 // falls below a certain threshold.
2817 std::vector<MVT> MemOps;
2818 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
2819 Size, Align, DAG, TLI))
2822 SmallVector<SDOperand, 8> OutChains;
2823 uint64_t DstOff = 0;
2825 unsigned NumMemOps = MemOps.size();
2826 for (unsigned i = 0; i < NumMemOps; i++) {
2828 unsigned VTSize = VT.getSizeInBits() / 8;
2829 SDOperand Value = getMemsetValue(Src, VT, DAG);
2830 SDOperand Store = DAG.getStore(Chain, Value,
2831 getMemBasePlusOffset(Dst, DstOff, DAG),
2832 DstSV, DstSVOff + DstOff);
2833 OutChains.push_back(Store);
2837 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2838 &OutChains[0], OutChains.size());
2841 SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst,
2842 SDOperand Src, SDOperand Size,
2843 unsigned Align, bool AlwaysInline,
2844 const Value *DstSV, uint64_t DstSVOff,
2845 const Value *SrcSV, uint64_t SrcSVOff) {
2847 // Check to see if we should lower the memcpy to loads and stores first.
2848 // For cases within the target-specified limits, this is the best choice.
2849 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2851 // Memcpy with size zero? Just return the original chain.
2852 if (ConstantSize->isNullValue())
2856 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
2857 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
2862 // Then check to see if we should lower the memcpy with target-specific
2863 // code. If the target chooses to do this, this is the next best.
2865 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
2867 DstSV, DstSVOff, SrcSV, SrcSVOff);
2871 // If we really need inline code and the target declined to provide it,
2872 // use a (potentially long) sequence of loads and stores.
2874 assert(ConstantSize && "AlwaysInline requires a constant size!");
2875 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
2876 ConstantSize->getValue(), Align, true,
2877 DstSV, DstSVOff, SrcSV, SrcSVOff);
2880 // Emit a library call.
2881 TargetLowering::ArgListTy Args;
2882 TargetLowering::ArgListEntry Entry;
2883 Entry.Ty = TLI.getTargetData()->getIntPtrType();
2884 Entry.Node = Dst; Args.push_back(Entry);
2885 Entry.Node = Src; Args.push_back(Entry);
2886 Entry.Node = Size; Args.push_back(Entry);
2887 std::pair<SDOperand,SDOperand> CallResult =
2888 TLI.LowerCallTo(Chain, Type::VoidTy,
2889 false, false, false, CallingConv::C, false,
2890 getExternalSymbol("memcpy", TLI.getPointerTy()),
2892 return CallResult.second;
2895 SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst,
2896 SDOperand Src, SDOperand Size,
2898 const Value *DstSV, uint64_t DstSVOff,
2899 const Value *SrcSV, uint64_t SrcSVOff) {
2901 // Check to see if we should lower the memmove to loads and stores first.
2902 // For cases within the target-specified limits, this is the best choice.
2903 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2905 // Memmove with size zero? Just return the original chain.
2906 if (ConstantSize->isNullValue())
2910 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
2911 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
2916 // Then check to see if we should lower the memmove with target-specific
2917 // code. If the target chooses to do this, this is the next best.
2919 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
2920 DstSV, DstSVOff, SrcSV, SrcSVOff);
2924 // Emit a library call.
2925 TargetLowering::ArgListTy Args;
2926 TargetLowering::ArgListEntry Entry;
2927 Entry.Ty = TLI.getTargetData()->getIntPtrType();
2928 Entry.Node = Dst; Args.push_back(Entry);
2929 Entry.Node = Src; Args.push_back(Entry);
2930 Entry.Node = Size; Args.push_back(Entry);
2931 std::pair<SDOperand,SDOperand> CallResult =
2932 TLI.LowerCallTo(Chain, Type::VoidTy,
2933 false, false, false, CallingConv::C, false,
2934 getExternalSymbol("memmove", TLI.getPointerTy()),
2936 return CallResult.second;
2939 SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst,
2940 SDOperand Src, SDOperand Size,
2942 const Value *DstSV, uint64_t DstSVOff) {
2944 // Check to see if we should lower the memset to stores first.
2945 // For cases within the target-specified limits, this is the best choice.
2946 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2948 // Memset with size zero? Just return the original chain.
2949 if (ConstantSize->isNullValue())
2953 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align,
2959 // Then check to see if we should lower the memset with target-specific
2960 // code. If the target chooses to do this, this is the next best.
2962 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
2967 // Emit a library call.
2968 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
2969 TargetLowering::ArgListTy Args;
2970 TargetLowering::ArgListEntry Entry;
2971 Entry.Node = Dst; Entry.Ty = IntPtrTy;
2972 Args.push_back(Entry);
2973 // Extend or truncate the argument to be an i32 value for the call.
2974 if (Src.getValueType().bitsGT(MVT::i32))
2975 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
2977 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
2978 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
2979 Args.push_back(Entry);
2980 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
2981 Args.push_back(Entry);
2982 std::pair<SDOperand,SDOperand> CallResult =
2983 TLI.LowerCallTo(Chain, Type::VoidTy,
2984 false, false, false, CallingConv::C, false,
2985 getExternalSymbol("memset", TLI.getPointerTy()),
2987 return CallResult.second;
2990 SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
2991 SDOperand Ptr, SDOperand Cmp,
2992 SDOperand Swp, const Value* PtrVal,
2993 unsigned Alignment) {
2994 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
2995 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
2996 SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other);
2997 FoldingSetNodeID ID;
2998 SDOperand Ops[] = {Chain, Ptr, Cmp, Swp};
2999 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3002 return SDOperand(E, 0);
3003 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp,
3005 CSEMap.InsertNode(N, IP);
3006 AllNodes.push_back(N);
3007 return SDOperand(N, 0);
3010 SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
3011 SDOperand Ptr, SDOperand Val,
3012 const Value* PtrVal,
3013 unsigned Alignment) {
3014 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB
3015 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND
3016 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR
3017 || Opcode == ISD::ATOMIC_LOAD_NAND
3018 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX
3019 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX)
3020 && "Invalid Atomic Op");
3021 SDVTList VTs = getVTList(Val.getValueType(), MVT::Other);
3022 FoldingSetNodeID ID;
3023 SDOperand Ops[] = {Chain, Ptr, Val};
3024 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3027 return SDOperand(E, 0);
3028 SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val,
3030 CSEMap.InsertNode(N, IP);
3031 AllNodes.push_back(N);
3032 return SDOperand(N, 0);
3036 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3037 MVT VT, SDOperand Chain,
3038 SDOperand Ptr, SDOperand Offset,
3039 const Value *SV, int SVOffset, MVT EVT,
3040 bool isVolatile, unsigned Alignment) {
3041 if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3043 if (VT != MVT::iPTR) {
3044 Ty = VT.getTypeForMVT();
3046 const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3047 assert(PT && "Value for load must be a pointer");
3048 Ty = PT->getElementType();
3050 assert(Ty && "Could not get type information for load");
3051 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3055 ExtType = ISD::NON_EXTLOAD;
3056 } else if (ExtType == ISD::NON_EXTLOAD) {
3057 assert(VT == EVT && "Non-extending load from different memory type!");
3061 assert(EVT == VT.getVectorElementType() && "Invalid vector extload!");
3063 assert(EVT.bitsLT(VT) &&
3064 "Should only be an extending load, not truncating!");
3065 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3066 "Cannot sign/zero extend a FP/Vector load!");
3067 assert(VT.isInteger() == EVT.isInteger() &&
3068 "Cannot convert from FP to Int or Int -> FP!");
3071 bool Indexed = AM != ISD::UNINDEXED;
3072 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3073 "Unindexed load with an offset!");
3075 SDVTList VTs = Indexed ?
3076 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3077 SDOperand Ops[] = { Chain, Ptr, Offset };
3078 FoldingSetNodeID ID;
3079 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3081 ID.AddInteger(ExtType);
3082 ID.AddInteger(EVT.getRawBits());
3083 ID.AddInteger(Alignment);
3084 ID.AddInteger(isVolatile);
3086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3087 return SDOperand(E, 0);
3088 SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3089 Alignment, isVolatile);
3090 CSEMap.InsertNode(N, IP);
3091 AllNodes.push_back(N);
3092 return SDOperand(N, 0);
3095 SDOperand SelectionDAG::getLoad(MVT VT,
3096 SDOperand Chain, SDOperand Ptr,
3097 const Value *SV, int SVOffset,
3098 bool isVolatile, unsigned Alignment) {
3099 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3100 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3101 SV, SVOffset, VT, isVolatile, Alignment);
3104 SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3105 SDOperand Chain, SDOperand Ptr,
3107 int SVOffset, MVT EVT,
3108 bool isVolatile, unsigned Alignment) {
3109 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3110 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3111 SV, SVOffset, EVT, isVolatile, Alignment);
3115 SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
3116 SDOperand Offset, ISD::MemIndexedMode AM) {
3117 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3118 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3119 "Load is already a indexed load!");
3120 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3121 LD->getChain(), Base, Offset, LD->getSrcValue(),
3122 LD->getSrcValueOffset(), LD->getMemoryVT(),
3123 LD->isVolatile(), LD->getAlignment());
3126 SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val,
3127 SDOperand Ptr, const Value *SV, int SVOffset,
3128 bool isVolatile, unsigned Alignment) {
3129 MVT VT = Val.getValueType();
3131 if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3133 if (VT != MVT::iPTR) {
3134 Ty = VT.getTypeForMVT();
3136 const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3137 assert(PT && "Value for store must be a pointer");
3138 Ty = PT->getElementType();
3140 assert(Ty && "Could not get type information for store");
3141 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3143 SDVTList VTs = getVTList(MVT::Other);
3144 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3145 SDOperand Ops[] = { Chain, Val, Ptr, Undef };
3146 FoldingSetNodeID ID;
3147 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3148 ID.AddInteger(ISD::UNINDEXED);
3149 ID.AddInteger(false);
3150 ID.AddInteger(VT.getRawBits());
3151 ID.AddInteger(Alignment);
3152 ID.AddInteger(isVolatile);
3154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3155 return SDOperand(E, 0);
3156 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3157 VT, SV, SVOffset, Alignment, isVolatile);
3158 CSEMap.InsertNode(N, IP);
3159 AllNodes.push_back(N);
3160 return SDOperand(N, 0);
3163 SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val,
3164 SDOperand Ptr, const Value *SV,
3165 int SVOffset, MVT SVT,
3166 bool isVolatile, unsigned Alignment) {
3167 MVT VT = Val.getValueType();
3170 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3172 assert(VT.bitsGT(SVT) && "Not a truncation?");
3173 assert(VT.isInteger() == SVT.isInteger() &&
3174 "Can't do FP-INT conversion!");
3176 if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3178 if (VT != MVT::iPTR) {
3179 Ty = VT.getTypeForMVT();
3181 const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3182 assert(PT && "Value for store must be a pointer");
3183 Ty = PT->getElementType();
3185 assert(Ty && "Could not get type information for store");
3186 Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3188 SDVTList VTs = getVTList(MVT::Other);
3189 SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3190 SDOperand Ops[] = { Chain, Val, Ptr, Undef };
3191 FoldingSetNodeID ID;
3192 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3193 ID.AddInteger(ISD::UNINDEXED);
3195 ID.AddInteger(SVT.getRawBits());
3196 ID.AddInteger(Alignment);
3197 ID.AddInteger(isVolatile);
3199 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3200 return SDOperand(E, 0);
3201 SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3202 SVT, SV, SVOffset, Alignment, isVolatile);
3203 CSEMap.InsertNode(N, IP);
3204 AllNodes.push_back(N);
3205 return SDOperand(N, 0);
3209 SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base,
3210 SDOperand Offset, ISD::MemIndexedMode AM) {
3211 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3212 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3213 "Store is already a indexed store!");
3214 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3215 SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3216 FoldingSetNodeID ID;
3217 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3219 ID.AddInteger(ST->isTruncatingStore());
3220 ID.AddInteger(ST->getMemoryVT().getRawBits());
3221 ID.AddInteger(ST->getAlignment());
3222 ID.AddInteger(ST->isVolatile());
3224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3225 return SDOperand(E, 0);
3226 SDNode *N = new StoreSDNode(Ops, VTs, AM,
3227 ST->isTruncatingStore(), ST->getMemoryVT(),
3228 ST->getSrcValue(), ST->getSrcValueOffset(),
3229 ST->getAlignment(), ST->isVolatile());
3230 CSEMap.InsertNode(N, IP);
3231 AllNodes.push_back(N);
3232 return SDOperand(N, 0);
3235 SDOperand SelectionDAG::getVAArg(MVT VT,
3236 SDOperand Chain, SDOperand Ptr,
3238 SDOperand Ops[] = { Chain, Ptr, SV };
3239 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3242 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
3243 SDOperandPtr Ops, unsigned NumOps) {
3245 case 0: return getNode(Opcode, VT);
3246 case 1: return getNode(Opcode, VT, Ops[0]);
3247 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3248 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3254 case ISD::SELECT_CC: {
3255 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3256 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3257 "LHS and RHS of condition must have same type!");
3258 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3259 "True and False arms of SelectCC must have same type!");
3260 assert(Ops[2].getValueType() == VT &&
3261 "select_cc node must be of same type as true and false value!");
3265 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3266 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3267 "LHS/RHS of comparison should match types!");
3274 SDVTList VTs = getVTList(VT);
3275 if (VT != MVT::Flag) {
3276 FoldingSetNodeID ID;
3277 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3280 return SDOperand(E, 0);
3281 N = new SDNode(Opcode, VTs, Ops, NumOps);
3282 CSEMap.InsertNode(N, IP);
3284 N = new SDNode(Opcode, VTs, Ops, NumOps);
3286 AllNodes.push_back(N);
3287 return SDOperand(N, 0);
3290 SDOperand SelectionDAG::getNode(unsigned Opcode,
3291 std::vector<MVT> &ResultTys,
3292 SDOperandPtr Ops, unsigned NumOps) {
3293 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3297 SDOperand SelectionDAG::getNode(unsigned Opcode,
3298 const MVT *VTs, unsigned NumVTs,
3299 SDOperandPtr Ops, unsigned NumOps) {
3301 return getNode(Opcode, VTs[0], Ops, NumOps);
3302 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3305 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3306 SDOperandPtr Ops, unsigned NumOps) {
3307 if (VTList.NumVTs == 1)
3308 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3311 // FIXME: figure out how to safely handle things like
3312 // int foo(int x) { return 1 << (x & 255); }
3313 // int bar() { return foo(256); }
3315 case ISD::SRA_PARTS:
3316 case ISD::SRL_PARTS:
3317 case ISD::SHL_PARTS:
3318 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3319 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3320 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3321 else if (N3.getOpcode() == ISD::AND)
3322 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3323 // If the and is only masking out bits that cannot effect the shift,
3324 // eliminate the and.
3325 unsigned NumBits = VT.getSizeInBits()*2;
3326 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3327 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3333 // Memoize the node unless it returns a flag.
3335 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3336 FoldingSetNodeID ID;
3337 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3340 return SDOperand(E, 0);
3342 N = new UnarySDNode(Opcode, VTList, Ops[0]);
3343 else if (NumOps == 2)
3344 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3345 else if (NumOps == 3)
3346 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3348 N = new SDNode(Opcode, VTList, Ops, NumOps);
3349 CSEMap.InsertNode(N, IP);
3352 N = new UnarySDNode(Opcode, VTList, Ops[0]);
3353 else if (NumOps == 2)
3354 N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3355 else if (NumOps == 3)
3356 N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3358 N = new SDNode(Opcode, VTList, Ops, NumOps);
3360 AllNodes.push_back(N);
3361 return SDOperand(N, 0);
3364 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3365 return getNode(Opcode, VTList, (SDOperand*)0, 0);
3368 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3370 SDOperand Ops[] = { N1 };
3371 return getNode(Opcode, VTList, Ops, 1);
3374 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3375 SDOperand N1, SDOperand N2) {
3376 SDOperand Ops[] = { N1, N2 };
3377 return getNode(Opcode, VTList, Ops, 2);
3380 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3381 SDOperand N1, SDOperand N2, SDOperand N3) {
3382 SDOperand Ops[] = { N1, N2, N3 };
3383 return getNode(Opcode, VTList, Ops, 3);
3386 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3387 SDOperand N1, SDOperand N2, SDOperand N3,
3389 SDOperand Ops[] = { N1, N2, N3, N4 };
3390 return getNode(Opcode, VTList, Ops, 4);
3393 SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3394 SDOperand N1, SDOperand N2, SDOperand N3,
3395 SDOperand N4, SDOperand N5) {
3396 SDOperand Ops[] = { N1, N2, N3, N4, N5 };
3397 return getNode(Opcode, VTList, Ops, 5);
3400 SDVTList SelectionDAG::getVTList(MVT VT) {
3401 return makeVTList(SDNode::getValueTypeList(VT), 1);
3404 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3405 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3406 E = VTList.end(); I != E; ++I) {
3407 if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2)
3408 return makeVTList(&(*I)[0], 2);
3413 VTList.push_front(V);
3414 return makeVTList(&(*VTList.begin())[0], 2);
3416 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2,
3418 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3419 E = VTList.end(); I != E; ++I) {
3420 if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 &&
3422 return makeVTList(&(*I)[0], 3);
3428 VTList.push_front(V);
3429 return makeVTList(&(*VTList.begin())[0], 3);
3432 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3434 case 0: assert(0 && "Cannot have nodes without results!");
3435 case 1: return getVTList(VTs[0]);
3436 case 2: return getVTList(VTs[0], VTs[1]);
3437 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3441 for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3442 E = VTList.end(); I != E; ++I) {
3443 if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue;
3445 bool NoMatch = false;
3446 for (unsigned i = 2; i != NumVTs; ++i)
3447 if (VTs[i] != (*I)[i]) {
3452 return makeVTList(&*I->begin(), NumVTs);
3455 VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs));
3456 return makeVTList(&*VTList.begin()->begin(), NumVTs);
3460 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3461 /// specified operands. If the resultant node already exists in the DAG,
3462 /// this does not modify the specified node, instead it returns the node that
3463 /// already exists. If the resultant node does not exist in the DAG, the
3464 /// input node is returned. As a degenerate case, if you specify the same
3465 /// input operands as the node already has, the input node is returned.
3466 SDOperand SelectionDAG::
3467 UpdateNodeOperands(SDOperand InN, SDOperand Op) {
3468 SDNode *N = InN.Val;
3469 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3471 // Check to see if there is no change.
3472 if (Op == N->getOperand(0)) return InN;
3474 // See if the modified node already exists.
3475 void *InsertPos = 0;
3476 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3477 return SDOperand(Existing, InN.ResNo);
3479 // Nope it doesn't. Remove the node from it's current place in the maps.
3481 RemoveNodeFromCSEMaps(N);
3483 // Now we update the operands.
3484 N->OperandList[0].getVal()->removeUser(0, N);
3485 N->OperandList[0] = Op;
3486 N->OperandList[0].setUser(N);
3487 Op.Val->addUser(0, N);
3489 // If this gets put into a CSE map, add it.
3490 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3494 SDOperand SelectionDAG::
3495 UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) {
3496 SDNode *N = InN.Val;
3497 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3499 // Check to see if there is no change.
3500 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3501 return InN; // No operands changed, just return the input node.
3503 // See if the modified node already exists.
3504 void *InsertPos = 0;
3505 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3506 return SDOperand(Existing, InN.ResNo);
3508 // Nope it doesn't. Remove the node from it's current place in the maps.
3510 RemoveNodeFromCSEMaps(N);
3512 // Now we update the operands.
3513 if (N->OperandList[0] != Op1) {
3514 N->OperandList[0].getVal()->removeUser(0, N);
3515 N->OperandList[0] = Op1;
3516 N->OperandList[0].setUser(N);
3517 Op1.Val->addUser(0, N);
3519 if (N->OperandList[1] != Op2) {
3520 N->OperandList[1].getVal()->removeUser(1, N);
3521 N->OperandList[1] = Op2;
3522 N->OperandList[1].setUser(N);
3523 Op2.Val->addUser(1, N);
3526 // If this gets put into a CSE map, add it.
3527 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3531 SDOperand SelectionDAG::
3532 UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) {
3533 SDOperand Ops[] = { Op1, Op2, Op3 };
3534 return UpdateNodeOperands(N, Ops, 3);
3537 SDOperand SelectionDAG::
3538 UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
3539 SDOperand Op3, SDOperand Op4) {
3540 SDOperand Ops[] = { Op1, Op2, Op3, Op4 };
3541 return UpdateNodeOperands(N, Ops, 4);
3544 SDOperand SelectionDAG::
3545 UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
3546 SDOperand Op3, SDOperand Op4, SDOperand Op5) {
3547 SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3548 return UpdateNodeOperands(N, Ops, 5);
3551 SDOperand SelectionDAG::
3552 UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) {
3553 SDNode *N = InN.Val;
3554 assert(N->getNumOperands() == NumOps &&
3555 "Update with wrong number of operands");
3557 // Check to see if there is no change.
3558 bool AnyChange = false;
3559 for (unsigned i = 0; i != NumOps; ++i) {
3560 if (Ops[i] != N->getOperand(i)) {
3566 // No operands changed, just return the input node.
3567 if (!AnyChange) return InN;
3569 // See if the modified node already exists.
3570 void *InsertPos = 0;
3571 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3572 return SDOperand(Existing, InN.ResNo);
3574 // Nope it doesn't. Remove the node from its current place in the maps.
3576 RemoveNodeFromCSEMaps(N);
3578 // Now we update the operands.
3579 for (unsigned i = 0; i != NumOps; ++i) {
3580 if (N->OperandList[i] != Ops[i]) {
3581 N->OperandList[i].getVal()->removeUser(i, N);
3582 N->OperandList[i] = Ops[i];
3583 N->OperandList[i].setUser(N);
3584 Ops[i].Val->addUser(i, N);
3588 // If this gets put into a CSE map, add it.
3589 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3593 /// MorphNodeTo - This frees the operands of the current node, resets the
3594 /// opcode, types, and operands to the specified value. This should only be
3595 /// used by the SelectionDAG class.
3596 void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
3597 SDOperandPtr Ops, unsigned NumOps) {
3600 NumValues = L.NumVTs;
3602 // Clear the operands list, updating used nodes to remove this from their
3604 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3605 I->getVal()->removeUser(std::distance(op_begin(), I), this);
3607 // If NumOps is larger than the # of operands we currently have, reallocate
3608 // the operand list.
3609 if (NumOps > NumOperands) {
3610 if (OperandsNeedDelete) {
3611 delete [] OperandList;
3613 OperandList = new SDUse[NumOps];
3614 OperandsNeedDelete = true;
3617 // Assign the new operands.
3618 NumOperands = NumOps;
3620 for (unsigned i = 0, e = NumOps; i != e; ++i) {
3621 OperandList[i] = Ops[i];
3622 OperandList[i].setUser(this);
3623 SDNode *N = OperandList[i].getVal();
3624 N->addUser(i, this);
3629 /// SelectNodeTo - These are used for target selectors to *mutate* the
3630 /// specified node to have the specified return type, Target opcode, and
3631 /// operands. Note that target opcodes are stored as
3632 /// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
3634 /// Note that SelectNodeTo returns the resultant node. If there is already a
3635 /// node of the specified opcode and operands, it returns that node instead of
3636 /// the current one.
3637 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3639 SDVTList VTs = getVTList(VT);
3640 FoldingSetNodeID ID;
3641 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0);
3643 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3646 RemoveNodeFromCSEMaps(N);
3648 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0);
3650 CSEMap.InsertNode(N, IP);
3654 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3655 MVT VT, SDOperand Op1) {
3656 // If an identical node already exists, use it.
3657 SDVTList VTs = getVTList(VT);
3658 SDOperand Ops[] = { Op1 };
3660 FoldingSetNodeID ID;
3661 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
3663 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3666 RemoveNodeFromCSEMaps(N);
3667 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
3668 CSEMap.InsertNode(N, IP);
3672 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3673 MVT VT, SDOperand Op1,
3675 // If an identical node already exists, use it.
3676 SDVTList VTs = getVTList(VT);
3677 SDOperand Ops[] = { Op1, Op2 };
3679 FoldingSetNodeID ID;
3680 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3682 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3685 RemoveNodeFromCSEMaps(N);
3687 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3689 CSEMap.InsertNode(N, IP); // Memoize the new node.
3693 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3694 MVT VT, SDOperand Op1,
3695 SDOperand Op2, SDOperand Op3) {
3696 // If an identical node already exists, use it.
3697 SDVTList VTs = getVTList(VT);
3698 SDOperand Ops[] = { Op1, Op2, Op3 };
3699 FoldingSetNodeID ID;
3700 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3702 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3705 RemoveNodeFromCSEMaps(N);
3707 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3709 CSEMap.InsertNode(N, IP); // Memoize the new node.
3713 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3714 MVT VT, SDOperandPtr Ops,
3716 // If an identical node already exists, use it.
3717 SDVTList VTs = getVTList(VT);
3718 FoldingSetNodeID ID;
3719 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
3721 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3724 RemoveNodeFromCSEMaps(N);
3725 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
3727 CSEMap.InsertNode(N, IP); // Memoize the new node.
3731 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3733 SDOperand Op1, SDOperand Op2) {
3734 SDVTList VTs = getVTList(VT1, VT2);
3735 FoldingSetNodeID ID;
3736 SDOperand Ops[] = { Op1, Op2 };
3737 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3739 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3742 RemoveNodeFromCSEMaps(N);
3743 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3744 CSEMap.InsertNode(N, IP); // Memoize the new node.
3748 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3750 SDOperand Op1, SDOperand Op2,
3752 // If an identical node already exists, use it.
3753 SDVTList VTs = getVTList(VT1, VT2);
3754 SDOperand Ops[] = { Op1, Op2, Op3 };
3755 FoldingSetNodeID ID;
3756 AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3758 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3761 RemoveNodeFromCSEMaps(N);
3763 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3764 CSEMap.InsertNode(N, IP); // Memoize the new node.
3769 /// getTargetNode - These are used for target selectors to create a new node
3770 /// with specified return type(s), target opcode, and operands.
3772 /// Note that getTargetNode returns the resultant node. If there is already a
3773 /// node of the specified opcode and operands, it returns that node instead of
3774 /// the current one.
3775 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
3776 return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val;
3778 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) {
3779 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val;
3781 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3782 SDOperand Op1, SDOperand Op2) {
3783 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val;
3785 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3786 SDOperand Op1, SDOperand Op2,
3788 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val;
3790 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3791 SDOperandPtr Ops, unsigned NumOps) {
3792 return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val;
3794 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
3795 const MVT *VTs = getNodeValueTypes(VT1, VT2);
3797 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val;
3799 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3800 MVT VT2, SDOperand Op1) {
3801 const MVT *VTs = getNodeValueTypes(VT1, VT2);
3802 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val;
3804 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3805 MVT VT2, SDOperand Op1,
3807 const MVT *VTs = getNodeValueTypes(VT1, VT2);
3808 SDOperand Ops[] = { Op1, Op2 };
3809 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val;
3811 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3812 MVT VT2, SDOperand Op1,
3813 SDOperand Op2, SDOperand Op3) {
3814 const MVT *VTs = getNodeValueTypes(VT1, VT2);
3815 SDOperand Ops[] = { Op1, Op2, Op3 };
3816 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val;
3818 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
3819 SDOperandPtr Ops, unsigned NumOps) {
3820 const MVT *VTs = getNodeValueTypes(VT1, VT2);
3821 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val;
3823 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3824 SDOperand Op1, SDOperand Op2) {
3825 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3826 SDOperand Ops[] = { Op1, Op2 };
3827 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val;
3829 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3830 SDOperand Op1, SDOperand Op2,
3832 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3833 SDOperand Ops[] = { Op1, Op2, Op3 };
3834 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val;
3836 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3837 SDOperandPtr Ops, unsigned NumOps) {
3838 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3839 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val;
3841 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3842 MVT VT2, MVT VT3, MVT VT4,
3843 SDOperandPtr Ops, unsigned NumOps) {
3844 std::vector<MVT> VTList;
3845 VTList.push_back(VT1);
3846 VTList.push_back(VT2);
3847 VTList.push_back(VT3);
3848 VTList.push_back(VT4);
3849 const MVT *VTs = getNodeValueTypes(VTList);
3850 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val;
3852 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
3853 std::vector<MVT> &ResultTys,
3854 SDOperandPtr Ops, unsigned NumOps) {
3855 const MVT *VTs = getNodeValueTypes(ResultTys);
3856 return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(),
3860 /// getNodeIfExists - Get the specified node if it's already available, or
3861 /// else return NULL.
3862 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
3863 SDOperandPtr Ops, unsigned NumOps) {
3864 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3865 FoldingSetNodeID ID;
3866 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3875 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3876 /// This can cause recursive merging of nodes in the DAG.
3878 /// This version assumes From has a single result value.
3880 void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand To,
3881 DAGUpdateListener *UpdateListener) {
3882 SDNode *From = FromN.Val;
3883 assert(From->getNumValues() == 1 && FromN.ResNo == 0 &&
3884 "Cannot replace with this method!");
3885 assert(From != To.Val && "Cannot replace uses of with self");
3887 while (!From->use_empty()) {
3888 SDNode::use_iterator UI = From->use_begin();
3889 SDNode *U = UI->getUser();
3891 // This node is about to morph, remove its old self from the CSE maps.
3892 RemoveNodeFromCSEMaps(U);
3894 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3895 I != E; ++I, ++operandNum)
3896 if (I->getVal() == From) {
3897 From->removeUser(operandNum, U);
3900 To.Val->addUser(operandNum, U);
3903 // Now that we have modified U, add it back to the CSE maps. If it already
3904 // exists there, recursively merge the results together.
3905 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3906 ReplaceAllUsesWith(U, Existing, UpdateListener);
3907 // U is now dead. Inform the listener if it exists and delete it.
3909 UpdateListener->NodeDeleted(U, Existing);
3910 DeleteNodeNotInCSEMaps(U);
3912 // If the node doesn't already exist, we updated it. Inform a listener if
3915 UpdateListener->NodeUpdated(U);
3920 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3921 /// This can cause recursive merging of nodes in the DAG.
3923 /// This version assumes From/To have matching types and numbers of result
3926 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
3927 DAGUpdateListener *UpdateListener) {
3928 assert(From != To && "Cannot replace uses of with self");
3929 assert(From->getNumValues() == To->getNumValues() &&
3930 "Cannot use this version of ReplaceAllUsesWith!");
3931 if (From->getNumValues() == 1) // If possible, use the faster version.
3932 return ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0),
3935 while (!From->use_empty()) {
3936 SDNode::use_iterator UI = From->use_begin();
3937 SDNode *U = UI->getUser();
3939 // This node is about to morph, remove its old self from the CSE maps.
3940 RemoveNodeFromCSEMaps(U);
3942 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3943 I != E; ++I, ++operandNum)
3944 if (I->getVal() == From) {
3945 From->removeUser(operandNum, U);
3947 To->addUser(operandNum, U);
3950 // Now that we have modified U, add it back to the CSE maps. If it already
3951 // exists there, recursively merge the results together.
3952 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3953 ReplaceAllUsesWith(U, Existing, UpdateListener);
3954 // U is now dead. Inform the listener if it exists and delete it.
3956 UpdateListener->NodeDeleted(U, Existing);
3957 DeleteNodeNotInCSEMaps(U);
3959 // If the node doesn't already exist, we updated it. Inform a listener if
3962 UpdateListener->NodeUpdated(U);
3967 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3968 /// This can cause recursive merging of nodes in the DAG.
3970 /// This version can replace From with any result values. To must match the
3971 /// number and types of values returned by From.
3972 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
3974 DAGUpdateListener *UpdateListener) {
3975 if (From->getNumValues() == 1) // Handle the simple case efficiently.
3976 return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener);
3978 while (!From->use_empty()) {
3979 SDNode::use_iterator UI = From->use_begin();
3980 SDNode *U = UI->getUser();
3982 // This node is about to morph, remove its old self from the CSE maps.
3983 RemoveNodeFromCSEMaps(U);
3985 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3986 I != E; ++I, ++operandNum)
3987 if (I->getVal() == From) {
3988 const SDOperand &ToOp = To[I->getSDOperand().ResNo];
3989 From->removeUser(operandNum, U);
3992 ToOp.Val->addUser(operandNum, U);
3995 // Now that we have modified U, add it back to the CSE maps. If it already
3996 // exists there, recursively merge the results together.
3997 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3998 ReplaceAllUsesWith(U, Existing, UpdateListener);
3999 // U is now dead. Inform the listener if it exists and delete it.
4001 UpdateListener->NodeDeleted(U, Existing);
4002 DeleteNodeNotInCSEMaps(U);
4004 // If the node doesn't already exist, we updated it. Inform a listener if
4007 UpdateListener->NodeUpdated(U);
4013 /// ChainedSetUpdaterListener - This class is a DAGUpdateListener that removes
4014 /// any deleted nodes from the set passed into its constructor and recursively
4015 /// notifies another update listener if specified.
4016 class ChainedSetUpdaterListener :
4017 public SelectionDAG::DAGUpdateListener {
4018 SmallSetVector<SDNode*, 16> &Set;
4019 SelectionDAG::DAGUpdateListener *Chain;
4021 ChainedSetUpdaterListener(SmallSetVector<SDNode*, 16> &set,
4022 SelectionDAG::DAGUpdateListener *chain)
4023 : Set(set), Chain(chain) {}
4025 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4027 if (Chain) Chain->NodeDeleted(N, E);
4029 virtual void NodeUpdated(SDNode *N) {
4030 if (Chain) Chain->NodeUpdated(N);
4035 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4036 /// uses of other values produced by From.Val alone. The Deleted vector is
4037 /// handled the same way as for ReplaceAllUsesWith.
4038 void SelectionDAG::ReplaceAllUsesOfValueWith(SDOperand From, SDOperand To,
4039 DAGUpdateListener *UpdateListener){
4040 assert(From != To && "Cannot replace a value with itself");
4042 // Handle the simple, trivial, case efficiently.
4043 if (From.Val->getNumValues() == 1) {
4044 ReplaceAllUsesWith(From, To, UpdateListener);
4048 if (From.use_empty()) return;
4050 // Get all of the users of From.Val. We want these in a nice,
4051 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4052 SmallSetVector<SDNode*, 16> Users;
4053 for (SDNode::use_iterator UI = From.Val->use_begin(),
4054 E = From.Val->use_end(); UI != E; ++UI) {
4055 SDNode *User = UI->getUser();
4056 if (!Users.count(User))
4060 // When one of the recursive merges deletes nodes from the graph, we need to
4061 // make sure that UpdateListener is notified *and* that the node is removed
4062 // from Users if present. CSUL does this.
4063 ChainedSetUpdaterListener CSUL(Users, UpdateListener);
4065 while (!Users.empty()) {
4066 // We know that this user uses some value of From. If it is the right
4067 // value, update it.
4068 SDNode *User = Users.back();
4071 // Scan for an operand that matches From.
4072 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4073 for (; Op != E; ++Op)
4074 if (*Op == From) break;
4076 // If there are no matches, the user must use some other result of From.
4077 if (Op == E) continue;
4079 // Okay, we know this user needs to be updated. Remove its old self
4080 // from the CSE maps.
4081 RemoveNodeFromCSEMaps(User);
4083 // Update all operands that match "From" in case there are multiple uses.
4084 for (; Op != E; ++Op) {
4086 From.Val->removeUser(Op-User->op_begin(), User);
4089 To.Val->addUser(Op-User->op_begin(), User);
4093 // Now that we have modified User, add it back to the CSE maps. If it
4094 // already exists there, recursively merge the results together.
4095 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4097 if (UpdateListener) UpdateListener->NodeUpdated(User);
4098 continue; // Continue on to next user.
4101 // If there was already an existing matching node, use ReplaceAllUsesWith
4102 // to replace the dead one with the existing one. This can cause
4103 // recursive merging of other unrelated nodes down the line. The merging
4104 // can cause deletion of nodes that used the old value. To handle this, we
4105 // use CSUL to remove them from the Users set.
4106 ReplaceAllUsesWith(User, Existing, &CSUL);
4108 // User is now dead. Notify a listener if present.
4109 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4110 DeleteNodeNotInCSEMaps(User);
4114 /// AssignNodeIds - Assign a unique node id for each node in the DAG based on
4115 /// their allnodes order. It returns the maximum id.
4116 unsigned SelectionDAG::AssignNodeIds() {
4118 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I){
4125 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4126 /// based on their topological order. It returns the maximum id and a vector
4127 /// of the SDNodes* in assigned order by reference.
4128 unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) {
4129 unsigned DAGSize = AllNodes.size();
4130 std::vector<unsigned> InDegree(DAGSize);
4131 std::vector<SDNode*> Sources;
4133 // Use a two pass approach to avoid using a std::map which is slow.
4135 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){
4138 unsigned Degree = N->use_size();
4139 InDegree[N->getNodeId()] = Degree;
4141 Sources.push_back(N);
4145 while (!Sources.empty()) {
4146 SDNode *N = Sources.back();
4148 TopOrder.push_back(N);
4149 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
4150 SDNode *P = I->getVal();
4151 unsigned Degree = --InDegree[P->getNodeId()];
4153 Sources.push_back(P);
4157 // Second pass, assign the actual topological order as node ids.
4159 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end();
4161 (*TI)->setNodeId(Id++);
4168 //===----------------------------------------------------------------------===//
4170 //===----------------------------------------------------------------------===//
4172 // Out-of-line virtual method to give class a home.
4173 void SDNode::ANCHOR() {}
4174 void UnarySDNode::ANCHOR() {}
4175 void BinarySDNode::ANCHOR() {}
4176 void TernarySDNode::ANCHOR() {}
4177 void HandleSDNode::ANCHOR() {}
4178 void StringSDNode::ANCHOR() {}
4179 void ConstantSDNode::ANCHOR() {}
4180 void ConstantFPSDNode::ANCHOR() {}
4181 void GlobalAddressSDNode::ANCHOR() {}
4182 void FrameIndexSDNode::ANCHOR() {}
4183 void JumpTableSDNode::ANCHOR() {}
4184 void ConstantPoolSDNode::ANCHOR() {}
4185 void BasicBlockSDNode::ANCHOR() {}
4186 void SrcValueSDNode::ANCHOR() {}
4187 void MemOperandSDNode::ANCHOR() {}
4188 void RegisterSDNode::ANCHOR() {}
4189 void ExternalSymbolSDNode::ANCHOR() {}
4190 void CondCodeSDNode::ANCHOR() {}
4191 void ARG_FLAGSSDNode::ANCHOR() {}
4192 void VTSDNode::ANCHOR() {}
4193 void MemSDNode::ANCHOR() {}
4194 void LoadSDNode::ANCHOR() {}
4195 void StoreSDNode::ANCHOR() {}
4196 void AtomicSDNode::ANCHOR() {}
4198 HandleSDNode::~HandleSDNode() {
4199 SDVTList VTs = { 0, 0 };
4200 MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0); // Drops operand uses.
4203 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4205 : SDNode(isa<GlobalVariable>(GA) &&
4206 cast<GlobalVariable>(GA)->isThreadLocal() ?
4208 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4210 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4211 getSDVTList(VT)), Offset(o) {
4212 TheGlobal = const_cast<GlobalValue*>(GA);
4215 /// getMemOperand - Return a MachineMemOperand object describing the memory
4216 /// reference performed by this atomic.
4217 MachineMemOperand AtomicSDNode::getMemOperand() const {
4218 int Size = (getValueType(0).getSizeInBits() + 7) >> 3;
4219 int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4220 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4222 // Check if the atomic references a frame index
4223 const FrameIndexSDNode *FI =
4224 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
4225 if (!getSrcValue() && FI)
4226 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
4227 FI->getIndex(), Size, getAlignment());
4229 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4230 Size, getAlignment());
4233 /// getMemOperand - Return a MachineMemOperand object describing the memory
4234 /// reference performed by this load or store.
4235 MachineMemOperand LSBaseSDNode::getMemOperand() const {
4236 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4238 getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad :
4239 MachineMemOperand::MOStore;
4240 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4242 // Check if the load references a frame index, and does not have
4244 const FrameIndexSDNode *FI =
4245 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
4246 if (!getSrcValue() && FI)
4247 return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
4248 FI->getIndex(), Size, getAlignment());
4250 return MachineMemOperand(getSrcValue(), Flags,
4251 getSrcValueOffset(), Size, getAlignment());
4254 /// Profile - Gather unique data for the node.
4256 void SDNode::Profile(FoldingSetNodeID &ID) {
4257 AddNodeIDNode(ID, this);
4260 /// getValueTypeList - Return a pointer to the specified value type.
4262 const MVT *SDNode::getValueTypeList(MVT VT) {
4263 if (VT.isExtended()) {
4264 static std::set<MVT, MVT::compareRawBits> EVTs;
4265 return &(*EVTs.insert(VT).first);
4267 static MVT VTs[MVT::LAST_VALUETYPE];
4268 VTs[VT.getSimpleVT()] = VT;
4269 return &VTs[VT.getSimpleVT()];
4273 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4274 /// indicated value. This method ignores uses of other values defined by this
4276 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4277 assert(Value < getNumValues() && "Bad value!");
4279 // If there is only one value, this is easy.
4280 if (getNumValues() == 1)
4281 return use_size() == NUses;
4282 if (use_size() < NUses) return false;
4284 SDOperand TheValue(const_cast<SDNode *>(this), Value);
4286 SmallPtrSet<SDNode*, 32> UsersHandled;
4288 // TODO: Only iterate over uses of a given value of the node
4289 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4290 if (*UI == TheValue) {
4297 // Found exactly the right number of uses?
4302 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4303 /// value. This method ignores uses of other values defined by this operation.
4304 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4305 assert(Value < getNumValues() && "Bad value!");
4307 if (use_empty()) return false;
4309 SDOperand TheValue(const_cast<SDNode *>(this), Value);
4311 SmallPtrSet<SDNode*, 32> UsersHandled;
4313 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4314 SDNode *User = UI->getUser();
4315 if (User->getNumOperands() == 1 ||
4316 UsersHandled.insert(User)) // First time we've seen this?
4317 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
4318 if (User->getOperand(i) == TheValue) {
4327 /// isOnlyUseOf - Return true if this node is the only use of N.
4329 bool SDNode::isOnlyUseOf(SDNode *N) const {
4331 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4332 SDNode *User = I->getUser();
4342 /// isOperand - Return true if this node is an operand of N.
4344 bool SDOperand::isOperandOf(SDNode *N) const {
4345 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4346 if (*this == N->getOperand(i))
4351 bool SDNode::isOperandOf(SDNode *N) const {
4352 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4353 if (this == N->OperandList[i].getVal())
4358 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4359 /// be a chain) reaches the specified operand without crossing any
4360 /// side-effecting instructions. In practice, this looks through token
4361 /// factors and non-volatile loads. In order to remain efficient, this only
4362 /// looks a couple of nodes in, it does not do an exhaustive search.
4363 bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest,
4364 unsigned Depth) const {
4365 if (*this == Dest) return true;
4367 // Don't search too deeply, we just want to be able to see through
4368 // TokenFactor's etc.
4369 if (Depth == 0) return false;
4371 // If this is a token factor, all inputs to the TF happen in parallel. If any
4372 // of the operands of the TF reach dest, then we can do the xform.
4373 if (getOpcode() == ISD::TokenFactor) {
4374 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4375 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4380 // Loads don't have side effects, look through them.
4381 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4382 if (!Ld->isVolatile())
4383 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4389 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4390 SmallPtrSet<SDNode *, 32> &Visited) {
4391 if (found || !Visited.insert(N))
4394 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4395 SDNode *Op = N->getOperand(i).Val;
4400 findPredecessor(Op, P, found, Visited);
4404 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4405 /// is either an operand of N or it can be reached by recursively traversing
4406 /// up the operands.
4407 /// NOTE: this is an expensive method. Use it carefully.
4408 bool SDNode::isPredecessorOf(SDNode *N) const {
4409 SmallPtrSet<SDNode *, 32> Visited;
4411 findPredecessor(N, this, found, Visited);
4415 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4416 assert(Num < NumOperands && "Invalid child # of SDNode!");
4417 return cast<ConstantSDNode>(OperandList[Num])->getValue();
4420 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4421 switch (getOpcode()) {
4423 if (getOpcode() < ISD::BUILTIN_OP_END)
4424 return "<<Unknown DAG Node>>";
4427 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4428 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes())
4429 return TII->get(getOpcode()-ISD::BUILTIN_OP_END).getName();
4431 TargetLowering &TLI = G->getTargetLoweringInfo();
4433 TLI.getTargetNodeName(getOpcode());
4434 if (Name) return Name;
4437 return "<<Unknown Target Node>>";
4440 case ISD::PREFETCH: return "Prefetch";
4441 case ISD::MEMBARRIER: return "MemBarrier";
4442 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
4443 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
4444 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
4445 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
4446 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
4447 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
4448 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
4449 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
4450 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
4451 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
4452 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
4453 case ISD::ATOMIC_SWAP: return "AtomicSWAP";
4454 case ISD::PCMARKER: return "PCMarker";
4455 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
4456 case ISD::SRCVALUE: return "SrcValue";
4457 case ISD::MEMOPERAND: return "MemOperand";
4458 case ISD::EntryToken: return "EntryToken";
4459 case ISD::TokenFactor: return "TokenFactor";
4460 case ISD::AssertSext: return "AssertSext";
4461 case ISD::AssertZext: return "AssertZext";
4463 case ISD::STRING: return "String";
4464 case ISD::BasicBlock: return "BasicBlock";
4465 case ISD::ARG_FLAGS: return "ArgFlags";
4466 case ISD::VALUETYPE: return "ValueType";
4467 case ISD::Register: return "Register";
4469 case ISD::Constant: return "Constant";
4470 case ISD::ConstantFP: return "ConstantFP";
4471 case ISD::GlobalAddress: return "GlobalAddress";
4472 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
4473 case ISD::FrameIndex: return "FrameIndex";
4474 case ISD::JumpTable: return "JumpTable";
4475 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
4476 case ISD::RETURNADDR: return "RETURNADDR";
4477 case ISD::FRAMEADDR: return "FRAMEADDR";
4478 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
4479 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
4480 case ISD::EHSELECTION: return "EHSELECTION";
4481 case ISD::EH_RETURN: return "EH_RETURN";
4482 case ISD::ConstantPool: return "ConstantPool";
4483 case ISD::ExternalSymbol: return "ExternalSymbol";
4484 case ISD::INTRINSIC_WO_CHAIN: {
4485 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue();
4486 return Intrinsic::getName((Intrinsic::ID)IID);
4488 case ISD::INTRINSIC_VOID:
4489 case ISD::INTRINSIC_W_CHAIN: {
4490 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue();
4491 return Intrinsic::getName((Intrinsic::ID)IID);
4494 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
4495 case ISD::TargetConstant: return "TargetConstant";
4496 case ISD::TargetConstantFP:return "TargetConstantFP";
4497 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
4498 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
4499 case ISD::TargetFrameIndex: return "TargetFrameIndex";
4500 case ISD::TargetJumpTable: return "TargetJumpTable";
4501 case ISD::TargetConstantPool: return "TargetConstantPool";
4502 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
4504 case ISD::CopyToReg: return "CopyToReg";
4505 case ISD::CopyFromReg: return "CopyFromReg";
4506 case ISD::UNDEF: return "undef";
4507 case ISD::MERGE_VALUES: return "merge_values";
4508 case ISD::INLINEASM: return "inlineasm";
4509 case ISD::LABEL: return "label";
4510 case ISD::DECLARE: return "declare";
4511 case ISD::HANDLENODE: return "handlenode";
4512 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
4513 case ISD::CALL: return "call";
4516 case ISD::FABS: return "fabs";
4517 case ISD::FNEG: return "fneg";
4518 case ISD::FSQRT: return "fsqrt";
4519 case ISD::FSIN: return "fsin";
4520 case ISD::FCOS: return "fcos";
4521 case ISD::FPOWI: return "fpowi";
4522 case ISD::FPOW: return "fpow";
4525 case ISD::ADD: return "add";
4526 case ISD::SUB: return "sub";
4527 case ISD::MUL: return "mul";
4528 case ISD::MULHU: return "mulhu";
4529 case ISD::MULHS: return "mulhs";
4530 case ISD::SDIV: return "sdiv";
4531 case ISD::UDIV: return "udiv";
4532 case ISD::SREM: return "srem";
4533 case ISD::UREM: return "urem";
4534 case ISD::SMUL_LOHI: return "smul_lohi";
4535 case ISD::UMUL_LOHI: return "umul_lohi";
4536 case ISD::SDIVREM: return "sdivrem";
4537 case ISD::UDIVREM: return "divrem";
4538 case ISD::AND: return "and";
4539 case ISD::OR: return "or";
4540 case ISD::XOR: return "xor";
4541 case ISD::SHL: return "shl";
4542 case ISD::SRA: return "sra";
4543 case ISD::SRL: return "srl";
4544 case ISD::ROTL: return "rotl";
4545 case ISD::ROTR: return "rotr";
4546 case ISD::FADD: return "fadd";
4547 case ISD::FSUB: return "fsub";
4548 case ISD::FMUL: return "fmul";
4549 case ISD::FDIV: return "fdiv";
4550 case ISD::FREM: return "frem";
4551 case ISD::FCOPYSIGN: return "fcopysign";
4552 case ISD::FGETSIGN: return "fgetsign";
4554 case ISD::SETCC: return "setcc";
4555 case ISD::VSETCC: return "vsetcc";
4556 case ISD::SELECT: return "select";
4557 case ISD::SELECT_CC: return "select_cc";
4558 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
4559 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
4560 case ISD::CONCAT_VECTORS: return "concat_vectors";
4561 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
4562 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
4563 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
4564 case ISD::CARRY_FALSE: return "carry_false";
4565 case ISD::ADDC: return "addc";
4566 case ISD::ADDE: return "adde";
4567 case ISD::SUBC: return "subc";
4568 case ISD::SUBE: return "sube";
4569 case ISD::SHL_PARTS: return "shl_parts";
4570 case ISD::SRA_PARTS: return "sra_parts";
4571 case ISD::SRL_PARTS: return "srl_parts";
4573 case ISD::EXTRACT_SUBREG: return "extract_subreg";
4574 case ISD::INSERT_SUBREG: return "insert_subreg";
4576 // Conversion operators.
4577 case ISD::SIGN_EXTEND: return "sign_extend";
4578 case ISD::ZERO_EXTEND: return "zero_extend";
4579 case ISD::ANY_EXTEND: return "any_extend";
4580 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
4581 case ISD::TRUNCATE: return "truncate";
4582 case ISD::FP_ROUND: return "fp_round";
4583 case ISD::FLT_ROUNDS_: return "flt_rounds";
4584 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
4585 case ISD::FP_EXTEND: return "fp_extend";
4587 case ISD::SINT_TO_FP: return "sint_to_fp";
4588 case ISD::UINT_TO_FP: return "uint_to_fp";
4589 case ISD::FP_TO_SINT: return "fp_to_sint";
4590 case ISD::FP_TO_UINT: return "fp_to_uint";
4591 case ISD::BIT_CONVERT: return "bit_convert";
4593 // Control flow instructions
4594 case ISD::BR: return "br";
4595 case ISD::BRIND: return "brind";
4596 case ISD::BR_JT: return "br_jt";
4597 case ISD::BRCOND: return "brcond";
4598 case ISD::BR_CC: return "br_cc";
4599 case ISD::RET: return "ret";
4600 case ISD::CALLSEQ_START: return "callseq_start";
4601 case ISD::CALLSEQ_END: return "callseq_end";
4604 case ISD::LOAD: return "load";
4605 case ISD::STORE: return "store";
4606 case ISD::VAARG: return "vaarg";
4607 case ISD::VACOPY: return "vacopy";
4608 case ISD::VAEND: return "vaend";
4609 case ISD::VASTART: return "vastart";
4610 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
4611 case ISD::EXTRACT_ELEMENT: return "extract_element";
4612 case ISD::BUILD_PAIR: return "build_pair";
4613 case ISD::STACKSAVE: return "stacksave";
4614 case ISD::STACKRESTORE: return "stackrestore";
4615 case ISD::TRAP: return "trap";
4618 case ISD::BSWAP: return "bswap";
4619 case ISD::CTPOP: return "ctpop";
4620 case ISD::CTTZ: return "cttz";
4621 case ISD::CTLZ: return "ctlz";
4624 case ISD::LOCATION: return "location";
4625 case ISD::DEBUG_LOC: return "debug_loc";
4628 case ISD::TRAMPOLINE: return "trampoline";
4631 switch (cast<CondCodeSDNode>(this)->get()) {
4632 default: assert(0 && "Unknown setcc condition!");
4633 case ISD::SETOEQ: return "setoeq";
4634 case ISD::SETOGT: return "setogt";
4635 case ISD::SETOGE: return "setoge";
4636 case ISD::SETOLT: return "setolt";
4637 case ISD::SETOLE: return "setole";
4638 case ISD::SETONE: return "setone";
4640 case ISD::SETO: return "seto";
4641 case ISD::SETUO: return "setuo";
4642 case ISD::SETUEQ: return "setue";
4643 case ISD::SETUGT: return "setugt";
4644 case ISD::SETUGE: return "setuge";
4645 case ISD::SETULT: return "setult";
4646 case ISD::SETULE: return "setule";
4647 case ISD::SETUNE: return "setune";
4649 case ISD::SETEQ: return "seteq";
4650 case ISD::SETGT: return "setgt";
4651 case ISD::SETGE: return "setge";
4652 case ISD::SETLT: return "setlt";
4653 case ISD::SETLE: return "setle";
4654 case ISD::SETNE: return "setne";
4659 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
4668 return "<post-inc>";
4670 return "<post-dec>";
4674 std::string ISD::ArgFlagsTy::getArgFlagsString() {
4675 std::string S = "< ";
4689 if (getByValAlign())
4690 S += "byval-align:" + utostr(getByValAlign()) + " ";
4692 S += "orig-align:" + utostr(getOrigAlign()) + " ";
4694 S += "byval-size:" + utostr(getByValSize()) + " ";
4698 void SDNode::dump() const { dump(0); }
4699 void SDNode::dump(const SelectionDAG *G) const {
4700 cerr << (void*)this << ": ";
4702 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
4704 if (getValueType(i) == MVT::Other)
4707 cerr << getValueType(i).getMVTString();
4709 cerr << " = " << getOperationName(G);
4712 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
4713 if (i) cerr << ", ";
4714 cerr << (void*)getOperand(i).Val;
4715 if (unsigned RN = getOperand(i).ResNo)
4719 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
4720 SDNode *Mask = getOperand(2).Val;
4722 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
4724 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
4727 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue();
4732 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
4733 cerr << "<" << CSDN->getValue() << ">";
4734 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
4735 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
4736 cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">";
4737 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
4738 cerr << "<" << CSDN->getValueAPF().convertToDouble() << ">";
4740 cerr << "<APFloat(";
4741 CSDN->getValueAPF().convertToAPInt().dump();
4744 } else if (const GlobalAddressSDNode *GADN =
4745 dyn_cast<GlobalAddressSDNode>(this)) {
4746 int offset = GADN->getOffset();
4748 WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">";
4750 cerr << " + " << offset;
4752 cerr << " " << offset;
4753 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
4754 cerr << "<" << FIDN->getIndex() << ">";
4755 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
4756 cerr << "<" << JTDN->getIndex() << ">";
4757 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
4758 int offset = CP->getOffset();
4759 if (CP->isMachineConstantPoolEntry())
4760 cerr << "<" << *CP->getMachineCPVal() << ">";
4762 cerr << "<" << *CP->getConstVal() << ">";
4764 cerr << " + " << offset;
4766 cerr << " " << offset;
4767 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
4769 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
4771 cerr << LBB->getName() << " ";
4772 cerr << (const void*)BBDN->getBasicBlock() << ">";
4773 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
4774 if (G && R->getReg() &&
4775 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
4776 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
4778 cerr << " #" << R->getReg();
4780 } else if (const ExternalSymbolSDNode *ES =
4781 dyn_cast<ExternalSymbolSDNode>(this)) {
4782 cerr << "'" << ES->getSymbol() << "'";
4783 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
4785 cerr << "<" << M->getValue() << ">";
4788 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
4789 if (M->MO.getValue())
4790 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
4792 cerr << "<null:" << M->MO.getOffset() << ">";
4793 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
4794 cerr << N->getArgFlags().getArgFlagsString();
4795 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
4796 cerr << ":" << N->getVT().getMVTString();
4798 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
4799 const Value *SrcValue = LD->getSrcValue();
4800 int SrcOffset = LD->getSrcValueOffset();
4806 cerr << ":" << SrcOffset << ">";
4809 switch (LD->getExtensionType()) {
4810 default: doExt = false; break;
4812 cerr << " <anyext ";
4822 cerr << LD->getMemoryVT().getMVTString() << ">";
4824 const char *AM = getIndexedModeName(LD->getAddressingMode());
4827 if (LD->isVolatile())
4828 cerr << " <volatile>";
4829 cerr << " alignment=" << LD->getAlignment();
4830 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
4831 const Value *SrcValue = ST->getSrcValue();
4832 int SrcOffset = ST->getSrcValueOffset();
4838 cerr << ":" << SrcOffset << ">";
4840 if (ST->isTruncatingStore())
4842 << ST->getMemoryVT().getMVTString() << ">";
4844 const char *AM = getIndexedModeName(ST->getAddressingMode());
4847 if (ST->isVolatile())
4848 cerr << " <volatile>";
4849 cerr << " alignment=" << ST->getAlignment();
4850 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
4851 const Value *SrcValue = AT->getSrcValue();
4852 int SrcOffset = AT->getSrcValueOffset();
4858 cerr << ":" << SrcOffset << ">";
4859 if (AT->isVolatile())
4860 cerr << " <volatile>";
4861 cerr << " alignment=" << AT->getAlignment();
4865 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
4866 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4867 if (N->getOperand(i).Val->hasOneUse())
4868 DumpNodes(N->getOperand(i).Val, indent+2, G);
4870 cerr << "\n" << std::string(indent+2, ' ')
4871 << (void*)N->getOperand(i).Val << ": <multiple use>";
4874 cerr << "\n" << std::string(indent, ' ');
4878 void SelectionDAG::dump() const {
4879 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
4880 std::vector<const SDNode*> Nodes;
4881 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
4885 std::sort(Nodes.begin(), Nodes.end());
4887 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
4888 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
4889 DumpNodes(Nodes[i], 2, this);
4892 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this);
4897 const Type *ConstantPoolSDNode::getType() const {
4898 if (isMachineConstantPoolEntry())
4899 return Val.MachineCPVal->getType();
4900 return Val.ConstVal->getType();