1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/System/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BIT_CONVERT)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BIT_CONVERT)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
202 for (unsigned i = 1; i < NumElems; ++i) {
203 SDValue V = N->getOperand(i);
204 if (V.getOpcode() != ISD::UNDEF)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: llvm_unreachable("Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
353 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
356 switch (N->getOpcode()) {
357 case ISD::TargetExternalSymbol:
358 case ISD::ExternalSymbol:
359 llvm_unreachable("Should only be used on nodes with operands");
360 default: break; // Normal nodes don't need extra info.
361 case ISD::TargetConstant:
363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365 case ISD::TargetConstantFP:
366 case ISD::ConstantFP: {
367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
370 case ISD::TargetGlobalAddress:
371 case ISD::GlobalAddress:
372 case ISD::TargetGlobalTLSAddress:
373 case ISD::GlobalTLSAddress: {
374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375 ID.AddPointer(GA->getGlobal());
376 ID.AddInteger(GA->getOffset());
377 ID.AddInteger(GA->getTargetFlags());
380 case ISD::BasicBlock:
381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
390 case ISD::FrameIndex:
391 case ISD::TargetFrameIndex:
392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
395 case ISD::TargetJumpTable:
396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
399 case ISD::ConstantPool:
400 case ISD::TargetConstantPool: {
401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
402 ID.AddInteger(CP->getAlignment());
403 ID.AddInteger(CP->getOffset());
404 if (CP->isMachineConstantPoolEntry())
405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
407 ID.AddPointer(CP->getConstVal());
408 ID.AddInteger(CP->getTargetFlags());
412 const LoadSDNode *LD = cast<LoadSDNode>(N);
413 ID.AddInteger(LD->getMemoryVT().getRawBits());
414 ID.AddInteger(LD->getRawSubclassData());
418 const StoreSDNode *ST = cast<StoreSDNode>(N);
419 ID.AddInteger(ST->getMemoryVT().getRawBits());
420 ID.AddInteger(ST->getRawSubclassData());
423 case ISD::ATOMIC_CMP_SWAP:
424 case ISD::ATOMIC_SWAP:
425 case ISD::ATOMIC_LOAD_ADD:
426 case ISD::ATOMIC_LOAD_SUB:
427 case ISD::ATOMIC_LOAD_AND:
428 case ISD::ATOMIC_LOAD_OR:
429 case ISD::ATOMIC_LOAD_XOR:
430 case ISD::ATOMIC_LOAD_NAND:
431 case ISD::ATOMIC_LOAD_MIN:
432 case ISD::ATOMIC_LOAD_MAX:
433 case ISD::ATOMIC_LOAD_UMIN:
434 case ISD::ATOMIC_LOAD_UMAX: {
435 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
436 ID.AddInteger(AT->getMemoryVT().getRawBits());
437 ID.AddInteger(AT->getRawSubclassData());
440 case ISD::VECTOR_SHUFFLE: {
441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
444 ID.AddInteger(SVN->getMaskElt(i));
447 case ISD::TargetBlockAddress:
448 case ISD::BlockAddress: {
449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
453 } // end switch (N->getOpcode())
456 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
458 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
459 AddNodeIDOpcode(ID, N->getOpcode());
460 // Add the return value info.
461 AddNodeIDValueTypes(ID, N->getVTList());
462 // Add the operand info.
463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
465 // Handle SDNode leafs with special info.
466 AddNodeIDCustom(ID, N);
469 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
470 /// the CSE map that carries volatility, temporalness, indexing mode, and
471 /// extension/truncation information.
473 static inline unsigned
474 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
475 bool isNonTemporal) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
483 (isNonTemporal << 6);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 return true; // Never CSE these nodes.
502 // Check that remaining values produced are not flags.
503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
504 if (N->getValueType(i) == MVT::Flag)
505 return true; // Never CSE anything that produces a flag.
510 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
512 void SelectionDAG::RemoveDeadNodes() {
513 // Create a dummy node (which is not added to allnodes), that adds a reference
514 // to the root node, preventing it from being deleted.
515 HandleSDNode Dummy(getRoot());
517 SmallVector<SDNode*, 128> DeadNodes;
519 // Add all obviously-dead nodes to the DeadNodes worklist.
520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
522 DeadNodes.push_back(I);
524 RemoveDeadNodes(DeadNodes);
526 // If the root changed (e.g. it was a dead load, update the root).
527 setRoot(Dummy.getValue());
530 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
531 /// given list, and any nodes that become unreachable as a result.
532 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
533 DAGUpdateListener *UpdateListener) {
535 // Process the worklist, deleting the nodes and adding their uses to the
537 while (!DeadNodes.empty()) {
538 SDNode *N = DeadNodes.pop_back_val();
541 UpdateListener->NodeDeleted(N, 0);
543 // Take the node out of the appropriate CSE map.
544 RemoveNodeFromCSEMaps(N);
546 // Next, brutally remove the operand list. This is safe to do, as there are
547 // no cycles in the graph.
548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
550 SDNode *Operand = Use.getNode();
553 // Now that we removed this operand, see if there are no uses of it left.
554 if (Operand->use_empty())
555 DeadNodes.push_back(Operand);
562 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
563 SmallVector<SDNode*, 16> DeadNodes(1, N);
564 RemoveDeadNodes(DeadNodes, UpdateListener);
567 void SelectionDAG::DeleteNode(SDNode *N) {
568 // First take this out of the appropriate CSE map.
569 RemoveNodeFromCSEMaps(N);
571 // Finally, remove uses due to operands of this node, remove from the
572 // AllNodes list, and delete the node.
573 DeleteNodeNotInCSEMaps(N);
576 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
577 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
578 assert(N->use_empty() && "Cannot delete a node that is not dead!");
580 // Drop all of the operands and decrement used node's use counts.
586 void SelectionDAG::DeallocateNode(SDNode *N) {
587 if (N->OperandsNeedDelete)
588 delete[] N->OperandList;
590 // Set the opcode to DELETED_NODE to help catch bugs when node
591 // memory is reallocated.
592 N->NodeType = ISD::DELETED_NODE;
594 NodeAllocator.Deallocate(AllNodes.remove(N));
596 // Remove the ordering of this node.
599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
602 DbgVals[i]->setIsInvalidated();
605 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
606 /// correspond to it. This is useful when we're about to delete or repurpose
607 /// the node. We don't want future request for structurally identical nodes
608 /// to return N anymore.
609 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
611 switch (N->getOpcode()) {
612 case ISD::EntryToken:
613 llvm_unreachable("EntryToken should not be in CSEMaps!");
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 Erased = CSEMap.RemoveNode(N);
648 // Verify that the node was actually in one of the CSE maps, unless it has a
649 // flag result (which cannot be CSE'd) or is one of the special cases that are
650 // not subject to CSE.
651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
652 !N->isMachineOpcode() && !doNotCSE(N)) {
655 llvm_unreachable("Node is not in map!");
661 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
662 /// maps and modified in place. Add it back to the CSE maps, unless an identical
663 /// node already exists, in which case transfer all its users to the existing
664 /// node. This transfer can potentially trigger recursive merging.
667 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
668 DAGUpdateListener *UpdateListener) {
669 // For node types that aren't CSE'd, just act as if no identical node
672 SDNode *Existing = CSEMap.GetOrInsertNode(N);
674 // If there was already an existing matching node, use ReplaceAllUsesWith
675 // to replace the dead one with the existing one. This can cause
676 // recursive merging of other unrelated nodes down the line.
677 ReplaceAllUsesWith(N, Existing, UpdateListener);
679 // N is now dead. Inform the listener if it exists and delete it.
681 UpdateListener->NodeDeleted(N, Existing);
682 DeleteNodeNotInCSEMaps(N);
687 // If the node doesn't already exist, we updated it. Inform a listener if
690 UpdateListener->NodeUpdated(N);
693 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
694 /// were replaced with those specified. If this node is never memoized,
695 /// return null, otherwise return a pointer to the slot it would take. If a
696 /// node already exists with these operands, the slot will be non-null.
697 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
702 SDValue Ops[] = { Op };
704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
705 AddNodeIDCustom(ID, N);
706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
710 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
711 /// were replaced with those specified. If this node is never memoized,
712 /// return null, otherwise return a pointer to the slot it would take. If a
713 /// node already exists with these operands, the slot will be non-null.
714 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
715 SDValue Op1, SDValue Op2,
720 SDValue Ops[] = { Op1, Op2 };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
723 AddNodeIDCustom(ID, N);
724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 const SDValue *Ops,unsigned NumOps,
740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
741 AddNodeIDCustom(ID, N);
742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
746 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
747 void SelectionDAG::VerifyNode(SDNode *N) {
748 switch (N->getOpcode()) {
751 case ISD::BUILD_PAIR: {
752 EVT VT = N->getValueType(0);
753 assert(N->getNumValues() == 1 && "Too many results!");
754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
755 "Wrong return type!");
756 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
758 "Mismatched operand types!");
759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
760 "Wrong operand type!");
761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
762 "Wrong return type size");
765 case ISD::BUILD_VECTOR: {
766 assert(N->getNumValues() == 1 && "Too many results!");
767 assert(N->getValueType(0).isVector() && "Wrong return type!");
768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
769 "Wrong number of operands!");
770 EVT EltVT = N->getValueType(0).getVectorElementType();
771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
772 assert((I->getValueType() == EltVT ||
773 (EltVT.isInteger() && I->getValueType().isInteger() &&
774 EltVT.bitsLE(I->getValueType()))) &&
775 "Wrong operand type!");
781 /// getEVTAlignment - Compute the default alignment value for the
784 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
785 const Type *Ty = VT == MVT::iPTR ?
786 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
787 VT.getTypeForEVT(*getContext());
789 return TLI.getTargetData()->getABITypeAlignment(Ty);
792 // EntryNode could meaningfully have debug info if we can find it...
793 SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli)
794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
796 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
797 Root(getEntryNode()), Ordering(0) {
798 AllNodes.push_back(&EntryNode);
799 Ordering = new SDNodeOrdering();
800 DbgInfo = new SDDbgInfo();
803 void SelectionDAG::init(MachineFunction &mf) {
805 Context = &mf.getFunction()->getContext();
808 SelectionDAG::~SelectionDAG() {
815 void SelectionDAG::allnodes_clear() {
816 assert(&*AllNodes.begin() == &EntryNode);
817 AllNodes.remove(AllNodes.begin());
818 while (!AllNodes.empty())
819 DeallocateNode(AllNodes.begin());
822 void SelectionDAG::clear() {
824 OperandAllocator.Reset();
827 ExtendedValueTypeNodes.clear();
828 ExternalSymbols.clear();
829 TargetExternalSymbols.clear();
830 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
831 static_cast<CondCodeSDNode*>(0));
832 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
833 static_cast<SDNode*>(0));
835 EntryNode.UseList = 0;
836 AllNodes.push_back(&EntryNode);
837 Root = getEntryNode();
839 Ordering = new SDNodeOrdering();
842 DbgInfo = new SDDbgInfo();
845 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
846 return VT.bitsGT(Op.getValueType()) ?
847 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
848 getNode(ISD::TRUNCATE, DL, VT, Op);
851 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
852 return VT.bitsGT(Op.getValueType()) ?
853 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
854 getNode(ISD::TRUNCATE, DL, VT, Op);
857 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
858 assert(!VT.isVector() &&
859 "getZeroExtendInReg should use the vector element type instead of "
861 if (Op.getValueType() == VT) return Op;
862 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
863 APInt Imm = APInt::getLowBitsSet(BitWidth,
865 return getNode(ISD::AND, DL, Op.getValueType(), Op,
866 getConstant(Imm, Op.getValueType()));
869 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
871 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
872 EVT EltVT = VT.getScalarType();
874 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
875 return getNode(ISD::XOR, DL, VT, Val, NegOne);
878 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
879 EVT EltVT = VT.getScalarType();
880 assert((EltVT.getSizeInBits() >= 64 ||
881 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
882 "getConstant with a uint64_t value that doesn't fit in the type!");
883 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
886 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
887 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
890 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
891 assert(VT.isInteger() && "Cannot create FP integer constant!");
893 EVT EltVT = VT.getScalarType();
894 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
895 "APInt size does not match type size!");
897 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
899 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
903 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
905 return SDValue(N, 0);
908 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
909 CSEMap.InsertNode(N, IP);
910 AllNodes.push_back(N);
913 SDValue Result(N, 0);
915 SmallVector<SDValue, 8> Ops;
916 Ops.assign(VT.getVectorNumElements(), Result);
917 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
922 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
923 return getConstant(Val, TLI.getPointerTy(), isTarget);
927 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
928 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
931 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
932 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
934 EVT EltVT = VT.getScalarType();
936 // Do the map lookup using the actual bit pattern for the floating point
937 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
938 // we don't have issues with SNANs.
939 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
941 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
945 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
947 return SDValue(N, 0);
950 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
951 CSEMap.InsertNode(N, IP);
952 AllNodes.push_back(N);
955 SDValue Result(N, 0);
957 SmallVector<SDValue, 8> Ops;
958 Ops.assign(VT.getVectorNumElements(), Result);
959 // FIXME DebugLoc info might be appropriate here
960 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
965 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
966 EVT EltVT = VT.getScalarType();
968 return getConstantFP(APFloat((float)Val), VT, isTarget);
969 else if (EltVT==MVT::f64)
970 return getConstantFP(APFloat(Val), VT, isTarget);
971 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
973 APFloat apf = APFloat(Val);
974 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
976 return getConstantFP(apf, VT, isTarget);
978 assert(0 && "Unsupported type in getConstantFP");
983 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
984 EVT VT, int64_t Offset,
986 unsigned char TargetFlags) {
987 assert((TargetFlags == 0 || isTargetGA) &&
988 "Cannot set target flags on target-independent globals");
990 // Truncate (with sign-extension) the offset value to the pointer size.
991 EVT PTy = TLI.getPointerTy();
992 unsigned BitWidth = PTy.getSizeInBits();
994 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
996 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
998 // If GV is an alias then use the aliasee for determining thread-localness.
999 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1000 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1004 if (GVar && GVar->isThreadLocal())
1005 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1007 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1012 ID.AddInteger(Offset);
1013 ID.AddInteger(TargetFlags);
1015 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1016 return SDValue(E, 0);
1018 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1019 Offset, TargetFlags);
1020 CSEMap.InsertNode(N, IP);
1021 AllNodes.push_back(N);
1022 return SDValue(N, 0);
1025 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1026 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1027 FoldingSetNodeID ID;
1028 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1031 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1032 return SDValue(E, 0);
1034 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1035 CSEMap.InsertNode(N, IP);
1036 AllNodes.push_back(N);
1037 return SDValue(N, 0);
1040 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1041 unsigned char TargetFlags) {
1042 assert((TargetFlags == 0 || isTarget) &&
1043 "Cannot set target flags on target-independent jump tables");
1044 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1045 FoldingSetNodeID ID;
1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1048 ID.AddInteger(TargetFlags);
1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1051 return SDValue(E, 0);
1053 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1055 CSEMap.InsertNode(N, IP);
1056 AllNodes.push_back(N);
1057 return SDValue(N, 0);
1060 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1061 unsigned Alignment, int Offset,
1063 unsigned char TargetFlags) {
1064 assert((TargetFlags == 0 || isTarget) &&
1065 "Cannot set target flags on target-independent globals");
1067 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1068 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1069 FoldingSetNodeID ID;
1070 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1071 ID.AddInteger(Alignment);
1072 ID.AddInteger(Offset);
1074 ID.AddInteger(TargetFlags);
1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1077 return SDValue(E, 0);
1079 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1080 Alignment, TargetFlags);
1081 CSEMap.InsertNode(N, IP);
1082 AllNodes.push_back(N);
1083 return SDValue(N, 0);
1087 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1088 unsigned Alignment, int Offset,
1090 unsigned char TargetFlags) {
1091 assert((TargetFlags == 0 || isTarget) &&
1092 "Cannot set target flags on target-independent globals");
1094 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1095 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1096 FoldingSetNodeID ID;
1097 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1098 ID.AddInteger(Alignment);
1099 ID.AddInteger(Offset);
1100 C->AddSelectionDAGCSEId(ID);
1101 ID.AddInteger(TargetFlags);
1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1104 return SDValue(E, 0);
1106 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1107 Alignment, TargetFlags);
1108 CSEMap.InsertNode(N, IP);
1109 AllNodes.push_back(N);
1110 return SDValue(N, 0);
1113 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1114 FoldingSetNodeID ID;
1115 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1118 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1119 return SDValue(E, 0);
1121 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1122 CSEMap.InsertNode(N, IP);
1123 AllNodes.push_back(N);
1124 return SDValue(N, 0);
1127 SDValue SelectionDAG::getValueType(EVT VT) {
1128 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1129 ValueTypeNodes.size())
1130 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1132 SDNode *&N = VT.isExtended() ?
1133 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1135 if (N) return SDValue(N, 0);
1136 N = new (NodeAllocator) VTSDNode(VT);
1137 AllNodes.push_back(N);
1138 return SDValue(N, 0);
1141 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1142 SDNode *&N = ExternalSymbols[Sym];
1143 if (N) return SDValue(N, 0);
1144 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1150 unsigned char TargetFlags) {
1152 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1154 if (N) return SDValue(N, 0);
1155 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1156 AllNodes.push_back(N);
1157 return SDValue(N, 0);
1160 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1161 if ((unsigned)Cond >= CondCodeNodes.size())
1162 CondCodeNodes.resize(Cond+1);
1164 if (CondCodeNodes[Cond] == 0) {
1165 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1166 CondCodeNodes[Cond] = N;
1167 AllNodes.push_back(N);
1170 return SDValue(CondCodeNodes[Cond], 0);
1173 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1174 // the shuffle mask M that point at N1 to point at N2, and indices that point
1175 // N2 to point at N1.
1176 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1178 int NElts = M.size();
1179 for (int i = 0; i != NElts; ++i) {
1187 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1188 SDValue N2, const int *Mask) {
1189 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1190 assert(VT.isVector() && N1.getValueType().isVector() &&
1191 "Vector Shuffle VTs must be a vectors");
1192 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1193 && "Vector Shuffle VTs must have same element type");
1195 // Canonicalize shuffle undef, undef -> undef
1196 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1197 return getUNDEF(VT);
1199 // Validate that all indices in Mask are within the range of the elements
1200 // input to the shuffle.
1201 unsigned NElts = VT.getVectorNumElements();
1202 SmallVector<int, 8> MaskVec;
1203 for (unsigned i = 0; i != NElts; ++i) {
1204 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1205 MaskVec.push_back(Mask[i]);
1208 // Canonicalize shuffle v, v -> v, undef
1211 for (unsigned i = 0; i != NElts; ++i)
1212 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1215 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1216 if (N1.getOpcode() == ISD::UNDEF)
1217 commuteShuffle(N1, N2, MaskVec);
1219 // Canonicalize all index into lhs, -> shuffle lhs, undef
1220 // Canonicalize all index into rhs, -> shuffle rhs, undef
1221 bool AllLHS = true, AllRHS = true;
1222 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1223 for (unsigned i = 0; i != NElts; ++i) {
1224 if (MaskVec[i] >= (int)NElts) {
1229 } else if (MaskVec[i] >= 0) {
1233 if (AllLHS && AllRHS)
1234 return getUNDEF(VT);
1235 if (AllLHS && !N2Undef)
1239 commuteShuffle(N1, N2, MaskVec);
1242 // If Identity shuffle, or all shuffle in to undef, return that node.
1243 bool AllUndef = true;
1244 bool Identity = true;
1245 for (unsigned i = 0; i != NElts; ++i) {
1246 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1247 if (MaskVec[i] >= 0) AllUndef = false;
1249 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1252 return getUNDEF(VT);
1254 FoldingSetNodeID ID;
1255 SDValue Ops[2] = { N1, N2 };
1256 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1257 for (unsigned i = 0; i != NElts; ++i)
1258 ID.AddInteger(MaskVec[i]);
1261 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1262 return SDValue(E, 0);
1264 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1265 // SDNode doesn't have access to it. This memory will be "leaked" when
1266 // the node is deallocated, but recovered when the NodeAllocator is released.
1267 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1268 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1270 ShuffleVectorSDNode *N =
1271 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1272 CSEMap.InsertNode(N, IP);
1273 AllNodes.push_back(N);
1274 return SDValue(N, 0);
1277 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1278 SDValue Val, SDValue DTy,
1279 SDValue STy, SDValue Rnd, SDValue Sat,
1280 ISD::CvtCode Code) {
1281 // If the src and dest types are the same and the conversion is between
1282 // integer types of the same sign or two floats, no conversion is necessary.
1284 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1287 FoldingSetNodeID ID;
1288 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1289 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1292 return SDValue(E, 0);
1294 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1296 CSEMap.InsertNode(N, IP);
1297 AllNodes.push_back(N);
1298 return SDValue(N, 0);
1301 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1302 FoldingSetNodeID ID;
1303 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1304 ID.AddInteger(RegNo);
1306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1307 return SDValue(E, 0);
1309 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1310 CSEMap.InsertNode(N, IP);
1311 AllNodes.push_back(N);
1312 return SDValue(N, 0);
1315 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1316 FoldingSetNodeID ID;
1317 SDValue Ops[] = { Root };
1318 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1319 ID.AddPointer(Label);
1321 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1322 return SDValue(E, 0);
1324 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1325 CSEMap.InsertNode(N, IP);
1326 AllNodes.push_back(N);
1327 return SDValue(N, 0);
1331 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1333 unsigned char TargetFlags) {
1334 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1336 FoldingSetNodeID ID;
1337 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1339 ID.AddInteger(TargetFlags);
1341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1342 return SDValue(E, 0);
1344 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1345 CSEMap.InsertNode(N, IP);
1346 AllNodes.push_back(N);
1347 return SDValue(N, 0);
1350 SDValue SelectionDAG::getSrcValue(const Value *V) {
1351 assert((!V || V->getType()->isPointerTy()) &&
1352 "SrcValue is not a pointer?");
1354 FoldingSetNodeID ID;
1355 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1359 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1360 return SDValue(E, 0);
1362 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1363 CSEMap.InsertNode(N, IP);
1364 AllNodes.push_back(N);
1365 return SDValue(N, 0);
1368 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1369 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1370 FoldingSetNodeID ID;
1371 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1376 return SDValue(E, 0);
1378 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1379 CSEMap.InsertNode(N, IP);
1380 AllNodes.push_back(N);
1381 return SDValue(N, 0);
1385 /// getShiftAmountOperand - Return the specified value casted to
1386 /// the target's desired shift amount type.
1387 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1388 EVT OpTy = Op.getValueType();
1389 MVT ShTy = TLI.getShiftAmountTy();
1390 if (OpTy == ShTy || OpTy.isVector()) return Op;
1392 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1393 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1396 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1397 /// specified value type.
1398 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1399 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1400 unsigned ByteSize = VT.getStoreSize();
1401 const Type *Ty = VT.getTypeForEVT(*getContext());
1402 unsigned StackAlign =
1403 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1405 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1406 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1409 /// CreateStackTemporary - Create a stack temporary suitable for holding
1410 /// either of the specified value types.
1411 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1412 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1413 VT2.getStoreSizeInBits())/8;
1414 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1415 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1416 const TargetData *TD = TLI.getTargetData();
1417 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1418 TD->getPrefTypeAlignment(Ty2));
1420 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1421 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1422 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1425 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1426 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1427 // These setcc operations always fold.
1431 case ISD::SETFALSE2: return getConstant(0, VT);
1433 case ISD::SETTRUE2: return getConstant(1, VT);
1445 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1449 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1450 const APInt &C2 = N2C->getAPIntValue();
1451 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1452 const APInt &C1 = N1C->getAPIntValue();
1455 default: llvm_unreachable("Unknown integer setcc!");
1456 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1457 case ISD::SETNE: return getConstant(C1 != C2, VT);
1458 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1459 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1460 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1461 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1462 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1463 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1464 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1465 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1469 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1470 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1471 // No compile time operations on this type yet.
1472 if (N1C->getValueType(0) == MVT::ppcf128)
1475 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1478 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1479 return getUNDEF(VT);
1481 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1482 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1483 return getUNDEF(VT);
1485 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1486 R==APFloat::cmpLessThan, VT);
1487 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1488 return getUNDEF(VT);
1490 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1491 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1492 return getUNDEF(VT);
1494 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1495 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1496 return getUNDEF(VT);
1498 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1499 R==APFloat::cmpEqual, VT);
1500 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1501 return getUNDEF(VT);
1503 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1504 R==APFloat::cmpEqual, VT);
1505 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1506 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1507 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1508 R==APFloat::cmpEqual, VT);
1509 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1510 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1511 R==APFloat::cmpLessThan, VT);
1512 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1513 R==APFloat::cmpUnordered, VT);
1514 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1515 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1518 // Ensure that the constant occurs on the RHS.
1519 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1523 // Could not fold it.
1527 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1528 /// use this predicate to simplify operations downstream.
1529 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1530 // This predicate is not safe for vector operations.
1531 if (Op.getValueType().isVector())
1534 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1535 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1538 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1539 /// this predicate to simplify operations downstream. Mask is known to be zero
1540 /// for bits that V cannot have.
1541 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1542 unsigned Depth) const {
1543 APInt KnownZero, KnownOne;
1544 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1545 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1546 return (KnownZero & Mask) == Mask;
1549 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1550 /// known to be either zero or one and return them in the KnownZero/KnownOne
1551 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1553 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1554 APInt &KnownZero, APInt &KnownOne,
1555 unsigned Depth) const {
1556 unsigned BitWidth = Mask.getBitWidth();
1557 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1558 "Mask size mismatches value type size!");
1560 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1561 if (Depth == 6 || Mask == 0)
1562 return; // Limit search depth.
1564 APInt KnownZero2, KnownOne2;
1566 switch (Op.getOpcode()) {
1568 // We know all of the bits for a constant!
1569 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1570 KnownZero = ~KnownOne & Mask;
1573 // If either the LHS or the RHS are Zero, the result is zero.
1574 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1575 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1576 KnownZero2, KnownOne2, Depth+1);
1577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1578 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1580 // Output known-1 bits are only known if set in both the LHS & RHS.
1581 KnownOne &= KnownOne2;
1582 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1583 KnownZero |= KnownZero2;
1586 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1587 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1588 KnownZero2, KnownOne2, Depth+1);
1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1590 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1592 // Output known-0 bits are only known if clear in both the LHS & RHS.
1593 KnownZero &= KnownZero2;
1594 // Output known-1 are known to be set if set in either the LHS | RHS.
1595 KnownOne |= KnownOne2;
1598 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1599 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1600 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1601 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1603 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1604 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1605 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1606 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1607 KnownZero = KnownZeroOut;
1611 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1612 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1613 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1614 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1615 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1617 // If low bits are zero in either operand, output low known-0 bits.
1618 // Also compute a conserative estimate for high known-0 bits.
1619 // More trickiness is possible, but this is sufficient for the
1620 // interesting case of alignment computation.
1622 unsigned TrailZ = KnownZero.countTrailingOnes() +
1623 KnownZero2.countTrailingOnes();
1624 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1625 KnownZero2.countLeadingOnes(),
1626 BitWidth) - BitWidth;
1628 TrailZ = std::min(TrailZ, BitWidth);
1629 LeadZ = std::min(LeadZ, BitWidth);
1630 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1631 APInt::getHighBitsSet(BitWidth, LeadZ);
1636 // For the purposes of computing leading zeros we can conservatively
1637 // treat a udiv as a logical right shift by the power of 2 known to
1638 // be less than the denominator.
1639 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1640 ComputeMaskedBits(Op.getOperand(0),
1641 AllOnes, KnownZero2, KnownOne2, Depth+1);
1642 unsigned LeadZ = KnownZero2.countLeadingOnes();
1646 ComputeMaskedBits(Op.getOperand(1),
1647 AllOnes, KnownZero2, KnownOne2, Depth+1);
1648 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1649 if (RHSUnknownLeadingOnes != BitWidth)
1650 LeadZ = std::min(BitWidth,
1651 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1653 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1657 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1658 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1660 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1662 // Only known if known in both the LHS and RHS.
1663 KnownOne &= KnownOne2;
1664 KnownZero &= KnownZero2;
1666 case ISD::SELECT_CC:
1667 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1668 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1669 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1670 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1672 // Only known if known in both the LHS and RHS.
1673 KnownOne &= KnownOne2;
1674 KnownZero &= KnownZero2;
1682 if (Op.getResNo() != 1)
1684 // The boolean result conforms to getBooleanContents. Fall through.
1686 // If we know the result of a setcc has the top bits zero, use this info.
1687 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1689 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1692 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1693 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1694 unsigned ShAmt = SA->getZExtValue();
1696 // If the shift count is an invalid immediate, don't do anything.
1697 if (ShAmt >= BitWidth)
1700 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1701 KnownZero, KnownOne, Depth+1);
1702 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1703 KnownZero <<= ShAmt;
1705 // low bits known zero.
1706 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1710 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1711 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1712 unsigned ShAmt = SA->getZExtValue();
1714 // If the shift count is an invalid immediate, don't do anything.
1715 if (ShAmt >= BitWidth)
1718 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1719 KnownZero, KnownOne, Depth+1);
1720 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1721 KnownZero = KnownZero.lshr(ShAmt);
1722 KnownOne = KnownOne.lshr(ShAmt);
1724 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1725 KnownZero |= HighBits; // High bits known zero.
1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1730 unsigned ShAmt = SA->getZExtValue();
1732 // If the shift count is an invalid immediate, don't do anything.
1733 if (ShAmt >= BitWidth)
1736 APInt InDemandedMask = (Mask << ShAmt);
1737 // If any of the demanded bits are produced by the sign extension, we also
1738 // demand the input sign bit.
1739 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1740 if (HighBits.getBoolValue())
1741 InDemandedMask |= APInt::getSignBit(BitWidth);
1743 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1746 KnownZero = KnownZero.lshr(ShAmt);
1747 KnownOne = KnownOne.lshr(ShAmt);
1749 // Handle the sign bits.
1750 APInt SignBit = APInt::getSignBit(BitWidth);
1751 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1753 if (KnownZero.intersects(SignBit)) {
1754 KnownZero |= HighBits; // New bits are known zero.
1755 } else if (KnownOne.intersects(SignBit)) {
1756 KnownOne |= HighBits; // New bits are known one.
1760 case ISD::SIGN_EXTEND_INREG: {
1761 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1762 unsigned EBits = EVT.getScalarType().getSizeInBits();
1764 // Sign extension. Compute the demanded bits in the result that are not
1765 // present in the input.
1766 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1768 APInt InSignBit = APInt::getSignBit(EBits);
1769 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1771 // If the sign extended bits are demanded, we know that the sign
1773 InSignBit.zext(BitWidth);
1774 if (NewBits.getBoolValue())
1775 InputDemandedBits |= InSignBit;
1777 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1778 KnownZero, KnownOne, Depth+1);
1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1781 // If the sign bit of the input is known set or clear, then we know the
1782 // top bits of the result.
1783 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1784 KnownZero |= NewBits;
1785 KnownOne &= ~NewBits;
1786 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1787 KnownOne |= NewBits;
1788 KnownZero &= ~NewBits;
1789 } else { // Input sign bit unknown
1790 KnownZero &= ~NewBits;
1791 KnownOne &= ~NewBits;
1798 unsigned LowBits = Log2_32(BitWidth)+1;
1799 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1804 if (ISD::isZEXTLoad(Op.getNode())) {
1805 LoadSDNode *LD = cast<LoadSDNode>(Op);
1806 EVT VT = LD->getMemoryVT();
1807 unsigned MemBits = VT.getScalarType().getSizeInBits();
1808 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1812 case ISD::ZERO_EXTEND: {
1813 EVT InVT = Op.getOperand(0).getValueType();
1814 unsigned InBits = InVT.getScalarType().getSizeInBits();
1815 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1816 APInt InMask = Mask;
1817 InMask.trunc(InBits);
1818 KnownZero.trunc(InBits);
1819 KnownOne.trunc(InBits);
1820 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1821 KnownZero.zext(BitWidth);
1822 KnownOne.zext(BitWidth);
1823 KnownZero |= NewBits;
1826 case ISD::SIGN_EXTEND: {
1827 EVT InVT = Op.getOperand(0).getValueType();
1828 unsigned InBits = InVT.getScalarType().getSizeInBits();
1829 APInt InSignBit = APInt::getSignBit(InBits);
1830 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1831 APInt InMask = Mask;
1832 InMask.trunc(InBits);
1834 // If any of the sign extended bits are demanded, we know that the sign
1835 // bit is demanded. Temporarily set this bit in the mask for our callee.
1836 if (NewBits.getBoolValue())
1837 InMask |= InSignBit;
1839 KnownZero.trunc(InBits);
1840 KnownOne.trunc(InBits);
1841 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1843 // Note if the sign bit is known to be zero or one.
1844 bool SignBitKnownZero = KnownZero.isNegative();
1845 bool SignBitKnownOne = KnownOne.isNegative();
1846 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1847 "Sign bit can't be known to be both zero and one!");
1849 // If the sign bit wasn't actually demanded by our caller, we don't
1850 // want it set in the KnownZero and KnownOne result values. Reset the
1851 // mask and reapply it to the result values.
1853 InMask.trunc(InBits);
1854 KnownZero &= InMask;
1857 KnownZero.zext(BitWidth);
1858 KnownOne.zext(BitWidth);
1860 // If the sign bit is known zero or one, the top bits match.
1861 if (SignBitKnownZero)
1862 KnownZero |= NewBits;
1863 else if (SignBitKnownOne)
1864 KnownOne |= NewBits;
1867 case ISD::ANY_EXTEND: {
1868 EVT InVT = Op.getOperand(0).getValueType();
1869 unsigned InBits = InVT.getScalarType().getSizeInBits();
1870 APInt InMask = Mask;
1871 InMask.trunc(InBits);
1872 KnownZero.trunc(InBits);
1873 KnownOne.trunc(InBits);
1874 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1875 KnownZero.zext(BitWidth);
1876 KnownOne.zext(BitWidth);
1879 case ISD::TRUNCATE: {
1880 EVT InVT = Op.getOperand(0).getValueType();
1881 unsigned InBits = InVT.getScalarType().getSizeInBits();
1882 APInt InMask = Mask;
1883 InMask.zext(InBits);
1884 KnownZero.zext(InBits);
1885 KnownOne.zext(InBits);
1886 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1887 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1888 KnownZero.trunc(BitWidth);
1889 KnownOne.trunc(BitWidth);
1892 case ISD::AssertZext: {
1893 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1894 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1895 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1897 KnownZero |= (~InMask) & Mask;
1901 // All bits are zero except the low bit.
1902 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1906 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1907 // We know that the top bits of C-X are clear if X contains less bits
1908 // than C (i.e. no wrap-around can happen). For example, 20-X is
1909 // positive if we can prove that X is >= 0 and < 16.
1910 if (CLHS->getAPIntValue().isNonNegative()) {
1911 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1912 // NLZ can't be BitWidth with no sign bit
1913 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1914 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1917 // If all of the MaskV bits are known to be zero, then we know the
1918 // output top bits are zero, because we now know that the output is
1920 if ((KnownZero2 & MaskV) == MaskV) {
1921 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1922 // Top bits known zero.
1923 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1930 // Output known-0 bits are known if clear or set in both the low clear bits
1931 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1932 // low 3 bits clear.
1933 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1934 BitWidth - Mask.countLeadingZeros());
1935 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1936 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1937 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1939 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1940 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1941 KnownZeroOut = std::min(KnownZeroOut,
1942 KnownZero2.countTrailingOnes());
1944 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1948 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1949 const APInt &RA = Rem->getAPIntValue().abs();
1950 if (RA.isPowerOf2()) {
1951 APInt LowBits = RA - 1;
1952 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1953 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1955 // The low bits of the first operand are unchanged by the srem.
1956 KnownZero = KnownZero2 & LowBits;
1957 KnownOne = KnownOne2 & LowBits;
1959 // If the first operand is non-negative or has all low bits zero, then
1960 // the upper bits are all zero.
1961 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1962 KnownZero |= ~LowBits;
1964 // If the first operand is negative and not all low bits are zero, then
1965 // the upper bits are all one.
1966 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1967 KnownOne |= ~LowBits;
1972 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1977 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1978 const APInt &RA = Rem->getAPIntValue();
1979 if (RA.isPowerOf2()) {
1980 APInt LowBits = (RA - 1);
1981 APInt Mask2 = LowBits & Mask;
1982 KnownZero |= ~LowBits & Mask;
1983 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1984 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1989 // Since the result is less than or equal to either operand, any leading
1990 // zero bits in either operand must also exist in the result.
1991 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1992 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1994 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1997 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1998 KnownZero2.countLeadingOnes());
2000 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2004 // Allow the target to implement this method for its nodes.
2005 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2006 case ISD::INTRINSIC_WO_CHAIN:
2007 case ISD::INTRINSIC_W_CHAIN:
2008 case ISD::INTRINSIC_VOID:
2009 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2016 /// ComputeNumSignBits - Return the number of times the sign bit of the
2017 /// register is replicated into the other bits. We know that at least 1 bit
2018 /// is always equal to the sign bit (itself), but other cases can give us
2019 /// information. For example, immediately after an "SRA X, 2", we know that
2020 /// the top 3 bits are all equal to each other, so we return 3.
2021 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2022 EVT VT = Op.getValueType();
2023 assert(VT.isInteger() && "Invalid VT!");
2024 unsigned VTBits = VT.getScalarType().getSizeInBits();
2026 unsigned FirstAnswer = 1;
2029 return 1; // Limit search depth.
2031 switch (Op.getOpcode()) {
2033 case ISD::AssertSext:
2034 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2035 return VTBits-Tmp+1;
2036 case ISD::AssertZext:
2037 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2040 case ISD::Constant: {
2041 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2042 // If negative, return # leading ones.
2043 if (Val.isNegative())
2044 return Val.countLeadingOnes();
2046 // Return # leading zeros.
2047 return Val.countLeadingZeros();
2050 case ISD::SIGN_EXTEND:
2051 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2052 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2054 case ISD::SIGN_EXTEND_INREG:
2055 // Max of the input and what this extends.
2057 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2060 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2061 return std::max(Tmp, Tmp2);
2064 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2065 // SRA X, C -> adds C sign bits.
2066 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2067 Tmp += C->getZExtValue();
2068 if (Tmp > VTBits) Tmp = VTBits;
2072 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2073 // shl destroys sign bits.
2074 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2075 if (C->getZExtValue() >= VTBits || // Bad shift.
2076 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2077 return Tmp - C->getZExtValue();
2082 case ISD::XOR: // NOT is handled here.
2083 // Logical binary ops preserve the number of sign bits at the worst.
2084 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2086 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2087 FirstAnswer = std::min(Tmp, Tmp2);
2088 // We computed what we know about the sign bits as our first
2089 // answer. Now proceed to the generic code that uses
2090 // ComputeMaskedBits, and pick whichever answer is better.
2095 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2096 if (Tmp == 1) return 1; // Early out.
2097 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2098 return std::min(Tmp, Tmp2);
2106 if (Op.getResNo() != 1)
2108 // The boolean result conforms to getBooleanContents. Fall through.
2110 // If setcc returns 0/-1, all bits are sign bits.
2111 if (TLI.getBooleanContents() ==
2112 TargetLowering::ZeroOrNegativeOneBooleanContent)
2117 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2118 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2120 // Handle rotate right by N like a rotate left by 32-N.
2121 if (Op.getOpcode() == ISD::ROTR)
2122 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2124 // If we aren't rotating out all of the known-in sign bits, return the
2125 // number that are left. This handles rotl(sext(x), 1) for example.
2126 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2127 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2131 // Add can have at most one carry bit. Thus we know that the output
2132 // is, at worst, one more bit than the inputs.
2133 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2134 if (Tmp == 1) return 1; // Early out.
2136 // Special case decrementing a value (ADD X, -1):
2137 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2138 if (CRHS->isAllOnesValue()) {
2139 APInt KnownZero, KnownOne;
2140 APInt Mask = APInt::getAllOnesValue(VTBits);
2141 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2143 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2145 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2148 // If we are subtracting one from a positive number, there is no carry
2149 // out of the result.
2150 if (KnownZero.isNegative())
2154 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2155 if (Tmp2 == 1) return 1;
2156 return std::min(Tmp, Tmp2)-1;
2160 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2161 if (Tmp2 == 1) return 1;
2164 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2165 if (CLHS->isNullValue()) {
2166 APInt KnownZero, KnownOne;
2167 APInt Mask = APInt::getAllOnesValue(VTBits);
2168 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2169 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2171 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2174 // If the input is known to be positive (the sign bit is known clear),
2175 // the output of the NEG has the same number of sign bits as the input.
2176 if (KnownZero.isNegative())
2179 // Otherwise, we treat this like a SUB.
2182 // Sub can have at most one carry bit. Thus we know that the output
2183 // is, at worst, one more bit than the inputs.
2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2185 if (Tmp == 1) return 1; // Early out.
2186 return std::min(Tmp, Tmp2)-1;
2189 // FIXME: it's tricky to do anything useful for this, but it is an important
2190 // case for targets like X86.
2194 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2195 if (Op.getOpcode() == ISD::LOAD) {
2196 LoadSDNode *LD = cast<LoadSDNode>(Op);
2197 unsigned ExtType = LD->getExtensionType();
2200 case ISD::SEXTLOAD: // '17' bits known
2201 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2202 return VTBits-Tmp+1;
2203 case ISD::ZEXTLOAD: // '16' bits known
2204 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2209 // Allow the target to implement this method for its nodes.
2210 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2211 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2212 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2213 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2214 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2215 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2218 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2219 // use this information.
2220 APInt KnownZero, KnownOne;
2221 APInt Mask = APInt::getAllOnesValue(VTBits);
2222 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2224 if (KnownZero.isNegative()) { // sign bit is 0
2226 } else if (KnownOne.isNegative()) { // sign bit is 1;
2233 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2234 // the number of identical bits in the top of the input value.
2236 Mask <<= Mask.getBitWidth()-VTBits;
2237 // Return # leading zeros. We use 'min' here in case Val was zero before
2238 // shifting. We don't want to return '64' as for an i32 "0".
2239 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2242 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2243 // If we're told that NaNs won't happen, assume they won't.
2244 if (FiniteOnlyFPMath())
2247 // If the value is a constant, we can obviously see if it is a NaN or not.
2248 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2249 return !C->getValueAPF().isNaN();
2251 // TODO: Recognize more cases here.
2256 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2257 // If the value is a constant, we can obviously see if it is a zero or not.
2258 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2259 return !C->isZero();
2261 // TODO: Recognize more cases here.
2266 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2267 // Check the obvious case.
2268 if (A == B) return true;
2270 // For for negative and positive zero.
2271 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2272 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2273 if (CA->isZero() && CB->isZero()) return true;
2275 // Otherwise they may not be equal.
2279 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2280 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2281 if (!GA) return false;
2282 if (GA->getOffset() != 0) return false;
2283 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2284 if (!GV) return false;
2285 return MF->getMMI().hasDebugInfo();
2289 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2290 /// element of the result of the vector shuffle.
2291 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2293 EVT VT = N->getValueType(0);
2294 DebugLoc dl = N->getDebugLoc();
2295 if (N->getMaskElt(i) < 0)
2296 return getUNDEF(VT.getVectorElementType());
2297 unsigned Index = N->getMaskElt(i);
2298 unsigned NumElems = VT.getVectorNumElements();
2299 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2302 if (V.getOpcode() == ISD::BIT_CONVERT) {
2303 V = V.getOperand(0);
2304 EVT VVT = V.getValueType();
2305 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2308 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2309 return (Index == 0) ? V.getOperand(0)
2310 : getUNDEF(VT.getVectorElementType());
2311 if (V.getOpcode() == ISD::BUILD_VECTOR)
2312 return V.getOperand(Index);
2313 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2314 return getShuffleScalarElt(SVN, Index);
2319 /// getNode - Gets or creates the specified node.
2321 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2322 FoldingSetNodeID ID;
2323 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2326 return SDValue(E, 0);
2328 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2329 CSEMap.InsertNode(N, IP);
2331 AllNodes.push_back(N);
2335 return SDValue(N, 0);
2338 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2339 EVT VT, SDValue Operand) {
2340 // Constant fold unary operations with an integer constant operand.
2341 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2342 const APInt &Val = C->getAPIntValue();
2345 case ISD::SIGN_EXTEND:
2346 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2347 case ISD::ANY_EXTEND:
2348 case ISD::ZERO_EXTEND:
2350 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2351 case ISD::UINT_TO_FP:
2352 case ISD::SINT_TO_FP: {
2353 const uint64_t zero[] = {0, 0};
2354 // No compile time operations on ppcf128.
2355 if (VT == MVT::ppcf128) break;
2356 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2357 (void)apf.convertFromAPInt(Val,
2358 Opcode==ISD::SINT_TO_FP,
2359 APFloat::rmNearestTiesToEven);
2360 return getConstantFP(apf, VT);
2362 case ISD::BIT_CONVERT:
2363 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2364 return getConstantFP(Val.bitsToFloat(), VT);
2365 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2366 return getConstantFP(Val.bitsToDouble(), VT);
2369 return getConstant(Val.byteSwap(), VT);
2371 return getConstant(Val.countPopulation(), VT);
2373 return getConstant(Val.countLeadingZeros(), VT);
2375 return getConstant(Val.countTrailingZeros(), VT);
2379 // Constant fold unary operations with a floating point constant operand.
2380 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2381 APFloat V = C->getValueAPF(); // make copy
2382 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2386 return getConstantFP(V, VT);
2389 return getConstantFP(V, VT);
2391 case ISD::FP_EXTEND: {
2393 // This can return overflow, underflow, or inexact; we don't care.
2394 // FIXME need to be more flexible about rounding mode.
2395 (void)V.convert(*EVTToAPFloatSemantics(VT),
2396 APFloat::rmNearestTiesToEven, &ignored);
2397 return getConstantFP(V, VT);
2399 case ISD::FP_TO_SINT:
2400 case ISD::FP_TO_UINT: {
2403 assert(integerPartWidth >= 64);
2404 // FIXME need to be more flexible about rounding mode.
2405 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2406 Opcode==ISD::FP_TO_SINT,
2407 APFloat::rmTowardZero, &ignored);
2408 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2410 APInt api(VT.getSizeInBits(), 2, x);
2411 return getConstant(api, VT);
2413 case ISD::BIT_CONVERT:
2414 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2415 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2416 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2417 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2423 unsigned OpOpcode = Operand.getNode()->getOpcode();
2425 case ISD::TokenFactor:
2426 case ISD::MERGE_VALUES:
2427 case ISD::CONCAT_VECTORS:
2428 return Operand; // Factor, merge or concat of one node? No need.
2429 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2430 case ISD::FP_EXTEND:
2431 assert(VT.isFloatingPoint() &&
2432 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2433 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2434 assert((!VT.isVector() ||
2435 VT.getVectorNumElements() ==
2436 Operand.getValueType().getVectorNumElements()) &&
2437 "Vector element count mismatch!");
2438 if (Operand.getOpcode() == ISD::UNDEF)
2439 return getUNDEF(VT);
2441 case ISD::SIGN_EXTEND:
2442 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2443 "Invalid SIGN_EXTEND!");
2444 if (Operand.getValueType() == VT) return Operand; // noop extension
2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2446 "Invalid sext node, dst < src!");
2447 assert((!VT.isVector() ||
2448 VT.getVectorNumElements() ==
2449 Operand.getValueType().getVectorNumElements()) &&
2450 "Vector element count mismatch!");
2451 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2452 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2454 case ISD::ZERO_EXTEND:
2455 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2456 "Invalid ZERO_EXTEND!");
2457 if (Operand.getValueType() == VT) return Operand; // noop extension
2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2459 "Invalid zext node, dst < src!");
2460 assert((!VT.isVector() ||
2461 VT.getVectorNumElements() ==
2462 Operand.getValueType().getVectorNumElements()) &&
2463 "Vector element count mismatch!");
2464 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2465 return getNode(ISD::ZERO_EXTEND, DL, VT,
2466 Operand.getNode()->getOperand(0));
2468 case ISD::ANY_EXTEND:
2469 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2470 "Invalid ANY_EXTEND!");
2471 if (Operand.getValueType() == VT) return Operand; // noop extension
2472 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2473 "Invalid anyext node, dst < src!");
2474 assert((!VT.isVector() ||
2475 VT.getVectorNumElements() ==
2476 Operand.getValueType().getVectorNumElements()) &&
2477 "Vector element count mismatch!");
2478 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2479 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2480 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2483 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2484 "Invalid TRUNCATE!");
2485 if (Operand.getValueType() == VT) return Operand; // noop truncate
2486 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2487 "Invalid truncate node, src < dst!");
2488 assert((!VT.isVector() ||
2489 VT.getVectorNumElements() ==
2490 Operand.getValueType().getVectorNumElements()) &&
2491 "Vector element count mismatch!");
2492 if (OpOpcode == ISD::TRUNCATE)
2493 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2494 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2495 OpOpcode == ISD::ANY_EXTEND) {
2496 // If the source is smaller than the dest, we still need an extend.
2497 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2498 .bitsLT(VT.getScalarType()))
2499 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2500 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2501 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2503 return Operand.getNode()->getOperand(0);
2506 case ISD::BIT_CONVERT:
2507 // Basic sanity checking.
2508 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2509 && "Cannot BIT_CONVERT between types of different sizes!");
2510 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2511 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2512 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2513 if (OpOpcode == ISD::UNDEF)
2514 return getUNDEF(VT);
2516 case ISD::SCALAR_TO_VECTOR:
2517 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2518 (VT.getVectorElementType() == Operand.getValueType() ||
2519 (VT.getVectorElementType().isInteger() &&
2520 Operand.getValueType().isInteger() &&
2521 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2522 "Illegal SCALAR_TO_VECTOR node!");
2523 if (OpOpcode == ISD::UNDEF)
2524 return getUNDEF(VT);
2525 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2526 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2527 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2528 Operand.getConstantOperandVal(1) == 0 &&
2529 Operand.getOperand(0).getValueType() == VT)
2530 return Operand.getOperand(0);
2533 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2534 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2535 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2536 Operand.getNode()->getOperand(0));
2537 if (OpOpcode == ISD::FNEG) // --X -> X
2538 return Operand.getNode()->getOperand(0);
2541 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2542 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2547 SDVTList VTs = getVTList(VT);
2548 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2549 FoldingSetNodeID ID;
2550 SDValue Ops[1] = { Operand };
2551 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2554 return SDValue(E, 0);
2556 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2557 CSEMap.InsertNode(N, IP);
2559 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2562 AllNodes.push_back(N);
2566 return SDValue(N, 0);
2569 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2571 ConstantSDNode *Cst1,
2572 ConstantSDNode *Cst2) {
2573 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2576 case ISD::ADD: return getConstant(C1 + C2, VT);
2577 case ISD::SUB: return getConstant(C1 - C2, VT);
2578 case ISD::MUL: return getConstant(C1 * C2, VT);
2580 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2583 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2586 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2589 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2591 case ISD::AND: return getConstant(C1 & C2, VT);
2592 case ISD::OR: return getConstant(C1 | C2, VT);
2593 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2594 case ISD::SHL: return getConstant(C1 << C2, VT);
2595 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2596 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2597 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2598 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2605 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2606 SDValue N1, SDValue N2) {
2607 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2608 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2611 case ISD::TokenFactor:
2612 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2613 N2.getValueType() == MVT::Other && "Invalid token factor!");
2614 // Fold trivial token factors.
2615 if (N1.getOpcode() == ISD::EntryToken) return N2;
2616 if (N2.getOpcode() == ISD::EntryToken) return N1;
2617 if (N1 == N2) return N1;
2619 case ISD::CONCAT_VECTORS:
2620 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2621 // one big BUILD_VECTOR.
2622 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2623 N2.getOpcode() == ISD::BUILD_VECTOR) {
2624 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2625 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2626 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2630 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2631 N1.getValueType() == VT && "Binary operator types must match!");
2632 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2633 // worth handling here.
2634 if (N2C && N2C->isNullValue())
2636 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2643 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2644 N1.getValueType() == VT && "Binary operator types must match!");
2645 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2646 // it's worth handling here.
2647 if (N2C && N2C->isNullValue())
2657 assert(VT.isInteger() && "This operator does not apply to FP types!");
2665 if (Opcode == ISD::FADD) {
2667 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2668 if (CFP->getValueAPF().isZero())
2671 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2672 if (CFP->getValueAPF().isZero())
2674 } else if (Opcode == ISD::FSUB) {
2676 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2677 if (CFP->getValueAPF().isZero())
2681 assert(N1.getValueType() == N2.getValueType() &&
2682 N1.getValueType() == VT && "Binary operator types must match!");
2684 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2685 assert(N1.getValueType() == VT &&
2686 N1.getValueType().isFloatingPoint() &&
2687 N2.getValueType().isFloatingPoint() &&
2688 "Invalid FCOPYSIGN!");
2695 assert(VT == N1.getValueType() &&
2696 "Shift operators return type must be the same as their first arg");
2697 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2698 "Shifts only work on integers");
2700 // Always fold shifts of i1 values so the code generator doesn't need to
2701 // handle them. Since we know the size of the shift has to be less than the
2702 // size of the value, the shift/rotate count is guaranteed to be zero.
2705 if (N2C && N2C->isNullValue())
2708 case ISD::FP_ROUND_INREG: {
2709 EVT EVT = cast<VTSDNode>(N2)->getVT();
2710 assert(VT == N1.getValueType() && "Not an inreg round!");
2711 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2712 "Cannot FP_ROUND_INREG integer types");
2713 assert(EVT.isVector() == VT.isVector() &&
2714 "FP_ROUND_INREG type should be vector iff the operand "
2716 assert((!EVT.isVector() ||
2717 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2718 "Vector element counts must match in FP_ROUND_INREG");
2719 assert(EVT.bitsLE(VT) && "Not rounding down!");
2720 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2724 assert(VT.isFloatingPoint() &&
2725 N1.getValueType().isFloatingPoint() &&
2726 VT.bitsLE(N1.getValueType()) &&
2727 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2728 if (N1.getValueType() == VT) return N1; // noop conversion.
2730 case ISD::AssertSext:
2731 case ISD::AssertZext: {
2732 EVT EVT = cast<VTSDNode>(N2)->getVT();
2733 assert(VT == N1.getValueType() && "Not an inreg extend!");
2734 assert(VT.isInteger() && EVT.isInteger() &&
2735 "Cannot *_EXTEND_INREG FP types");
2736 assert(!EVT.isVector() &&
2737 "AssertSExt/AssertZExt type should be the vector element type "
2738 "rather than the vector type!");
2739 assert(EVT.bitsLE(VT) && "Not extending!");
2740 if (VT == EVT) return N1; // noop assertion.
2743 case ISD::SIGN_EXTEND_INREG: {
2744 EVT EVT = cast<VTSDNode>(N2)->getVT();
2745 assert(VT == N1.getValueType() && "Not an inreg extend!");
2746 assert(VT.isInteger() && EVT.isInteger() &&
2747 "Cannot *_EXTEND_INREG FP types");
2748 assert(EVT.isVector() == VT.isVector() &&
2749 "SIGN_EXTEND_INREG type should be vector iff the operand "
2751 assert((!EVT.isVector() ||
2752 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2753 "Vector element counts must match in SIGN_EXTEND_INREG");
2754 assert(EVT.bitsLE(VT) && "Not extending!");
2755 if (EVT == VT) return N1; // Not actually extending
2758 APInt Val = N1C->getAPIntValue();
2759 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2760 Val <<= Val.getBitWidth()-FromBits;
2761 Val = Val.ashr(Val.getBitWidth()-FromBits);
2762 return getConstant(Val, VT);
2766 case ISD::EXTRACT_VECTOR_ELT:
2767 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2768 if (N1.getOpcode() == ISD::UNDEF)
2769 return getUNDEF(VT);
2771 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2772 // expanding copies of large vectors from registers.
2774 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2775 N1.getNumOperands() > 0) {
2777 N1.getOperand(0).getValueType().getVectorNumElements();
2778 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2779 N1.getOperand(N2C->getZExtValue() / Factor),
2780 getConstant(N2C->getZExtValue() % Factor,
2781 N2.getValueType()));
2784 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2785 // expanding large vector constants.
2786 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2787 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2788 EVT VEltTy = N1.getValueType().getVectorElementType();
2789 if (Elt.getValueType() != VEltTy) {
2790 // If the vector element type is not legal, the BUILD_VECTOR operands
2791 // are promoted and implicitly truncated. Make that explicit here.
2792 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2795 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2796 // result is implicitly extended.
2797 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2802 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2803 // operations are lowered to scalars.
2804 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2805 // If the indices are the same, return the inserted element else
2806 // if the indices are known different, extract the element from
2807 // the original vector.
2808 SDValue N1Op2 = N1.getOperand(2);
2809 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2811 if (N1Op2C && N2C) {
2812 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2813 if (VT == N1.getOperand(1).getValueType())
2814 return N1.getOperand(1);
2816 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2819 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2823 case ISD::EXTRACT_ELEMENT:
2824 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2825 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2826 (N1.getValueType().isInteger() == VT.isInteger()) &&
2827 "Wrong types for EXTRACT_ELEMENT!");
2829 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2830 // 64-bit integers into 32-bit parts. Instead of building the extract of
2831 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2832 if (N1.getOpcode() == ISD::BUILD_PAIR)
2833 return N1.getOperand(N2C->getZExtValue());
2835 // EXTRACT_ELEMENT of a constant int is also very common.
2836 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2837 unsigned ElementSize = VT.getSizeInBits();
2838 unsigned Shift = ElementSize * N2C->getZExtValue();
2839 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2840 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2843 case ISD::EXTRACT_SUBVECTOR:
2844 if (N1.getValueType() == VT) // Trivial extraction.
2851 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2852 if (SV.getNode()) return SV;
2853 } else { // Cannonicalize constant to RHS if commutative
2854 if (isCommutativeBinOp(Opcode)) {
2855 std::swap(N1C, N2C);
2861 // Constant fold FP operations.
2862 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2863 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2865 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2866 // Cannonicalize constant to RHS if commutative
2867 std::swap(N1CFP, N2CFP);
2869 } else if (N2CFP && VT != MVT::ppcf128) {
2870 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2871 APFloat::opStatus s;
2874 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2875 if (s != APFloat::opInvalidOp)
2876 return getConstantFP(V1, VT);
2879 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2880 if (s!=APFloat::opInvalidOp)
2881 return getConstantFP(V1, VT);
2884 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2885 if (s!=APFloat::opInvalidOp)
2886 return getConstantFP(V1, VT);
2889 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2890 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2891 return getConstantFP(V1, VT);
2894 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2895 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2896 return getConstantFP(V1, VT);
2898 case ISD::FCOPYSIGN:
2900 return getConstantFP(V1, VT);
2906 // Canonicalize an UNDEF to the RHS, even over a constant.
2907 if (N1.getOpcode() == ISD::UNDEF) {
2908 if (isCommutativeBinOp(Opcode)) {
2912 case ISD::FP_ROUND_INREG:
2913 case ISD::SIGN_EXTEND_INREG:
2919 return N1; // fold op(undef, arg2) -> undef
2927 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2928 // For vectors, we can't easily build an all zero vector, just return
2935 // Fold a bunch of operators when the RHS is undef.
2936 if (N2.getOpcode() == ISD::UNDEF) {
2939 if (N1.getOpcode() == ISD::UNDEF)
2940 // Handle undef ^ undef -> 0 special case. This is a common
2942 return getConstant(0, VT);
2952 return N2; // fold op(arg1, undef) -> undef
2966 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2967 // For vectors, we can't easily build an all zero vector, just return
2972 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2973 // For vectors, we can't easily build an all one vector, just return
2981 // Memoize this node if possible.
2983 SDVTList VTs = getVTList(VT);
2984 if (VT != MVT::Flag) {
2985 SDValue Ops[] = { N1, N2 };
2986 FoldingSetNodeID ID;
2987 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2989 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2990 return SDValue(E, 0);
2992 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2993 CSEMap.InsertNode(N, IP);
2995 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2998 AllNodes.push_back(N);
3002 return SDValue(N, 0);
3005 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3006 SDValue N1, SDValue N2, SDValue N3) {
3007 // Perform various simplifications.
3008 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3009 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3011 case ISD::CONCAT_VECTORS:
3012 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3013 // one big BUILD_VECTOR.
3014 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3015 N2.getOpcode() == ISD::BUILD_VECTOR &&
3016 N3.getOpcode() == ISD::BUILD_VECTOR) {
3017 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
3018 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
3019 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
3020 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3024 // Use FoldSetCC to simplify SETCC's.
3025 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3026 if (Simp.getNode()) return Simp;
3031 if (N1C->getZExtValue())
3032 return N2; // select true, X, Y -> X
3034 return N3; // select false, X, Y -> Y
3037 if (N2 == N3) return N2; // select C, X, X -> X
3041 if (N2C->getZExtValue()) // Unconditional branch
3042 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3044 return N1; // Never-taken branch
3047 case ISD::VECTOR_SHUFFLE:
3048 llvm_unreachable("should use getVectorShuffle constructor!");
3050 case ISD::BIT_CONVERT:
3051 // Fold bit_convert nodes from a type to themselves.
3052 if (N1.getValueType() == VT)
3057 // Memoize node if it doesn't produce a flag.
3059 SDVTList VTs = getVTList(VT);
3060 if (VT != MVT::Flag) {
3061 SDValue Ops[] = { N1, N2, N3 };
3062 FoldingSetNodeID ID;
3063 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3066 return SDValue(E, 0);
3068 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3069 CSEMap.InsertNode(N, IP);
3071 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3074 AllNodes.push_back(N);
3078 return SDValue(N, 0);
3081 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3082 SDValue N1, SDValue N2, SDValue N3,
3084 SDValue Ops[] = { N1, N2, N3, N4 };
3085 return getNode(Opcode, DL, VT, Ops, 4);
3088 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3089 SDValue N1, SDValue N2, SDValue N3,
3090 SDValue N4, SDValue N5) {
3091 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3092 return getNode(Opcode, DL, VT, Ops, 5);
3095 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3096 /// the incoming stack arguments to be loaded from the stack.
3097 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3098 SmallVector<SDValue, 8> ArgChains;
3100 // Include the original chain at the beginning of the list. When this is
3101 // used by target LowerCall hooks, this helps legalize find the
3102 // CALLSEQ_BEGIN node.
3103 ArgChains.push_back(Chain);
3105 // Add a chain value for each stack argument.
3106 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3107 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3108 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3109 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3110 if (FI->getIndex() < 0)
3111 ArgChains.push_back(SDValue(L, 1));
3113 // Build a tokenfactor for all the chains.
3114 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3115 &ArgChains[0], ArgChains.size());
3118 /// getMemsetValue - Vectorized representation of the memset value
3120 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3122 assert(Value.getOpcode() != ISD::UNDEF);
3124 unsigned NumBits = VT.getScalarType().getSizeInBits();
3125 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3126 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3128 for (unsigned i = NumBits; i > 8; i >>= 1) {
3129 Val = (Val << Shift) | Val;
3133 return DAG.getConstant(Val, VT);
3134 return DAG.getConstantFP(APFloat(Val), VT);
3137 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3138 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3140 for (unsigned i = NumBits; i > 8; i >>= 1) {
3141 Value = DAG.getNode(ISD::OR, dl, VT,
3142 DAG.getNode(ISD::SHL, dl, VT, Value,
3143 DAG.getConstant(Shift,
3144 TLI.getShiftAmountTy())),
3152 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3153 /// used when a memcpy is turned into a memset when the source is a constant
3155 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3156 const TargetLowering &TLI,
3157 std::string &Str, unsigned Offset) {
3158 // Handle vector with all elements zero.
3161 return DAG.getConstant(0, VT);
3162 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3163 VT.getSimpleVT().SimpleTy == MVT::f64)
3164 return DAG.getConstantFP(0.0, VT);
3165 else if (VT.isVector()) {
3166 unsigned NumElts = VT.getVectorNumElements();
3167 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3168 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3169 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3172 llvm_unreachable("Expected type!");
3175 assert(!VT.isVector() && "Can't handle vector type here!");
3176 unsigned NumBits = VT.getSizeInBits();
3177 unsigned MSB = NumBits / 8;
3179 if (TLI.isLittleEndian())
3180 Offset = Offset + MSB - 1;
3181 for (unsigned i = 0; i != MSB; ++i) {
3182 Val = (Val << 8) | (unsigned char)Str[Offset];
3183 Offset += TLI.isLittleEndian() ? -1 : 1;
3185 return DAG.getConstant(Val, VT);
3188 /// getMemBasePlusOffset - Returns base and offset node for the
3190 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3191 SelectionDAG &DAG) {
3192 EVT VT = Base.getValueType();
3193 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3194 VT, Base, DAG.getConstant(Offset, VT));
3197 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3199 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3200 unsigned SrcDelta = 0;
3201 GlobalAddressSDNode *G = NULL;
3202 if (Src.getOpcode() == ISD::GlobalAddress)
3203 G = cast<GlobalAddressSDNode>(Src);
3204 else if (Src.getOpcode() == ISD::ADD &&
3205 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3206 Src.getOperand(1).getOpcode() == ISD::Constant) {
3207 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3208 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3213 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3214 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3220 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3221 /// to replace the memset / memcpy. Return true if the number of memory ops
3222 /// is below the threshold. It returns the types of the sequence of
3223 /// memory ops to perform memset / memcpy by reference.
3224 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3225 unsigned Limit, uint64_t Size,
3226 unsigned DstAlign, unsigned SrcAlign,
3227 bool NonScalarIntSafe,
3230 const TargetLowering &TLI) {
3231 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3232 "Expecting memcpy / memset source to meet alignment requirement!");
3233 // If 'SrcAlign' is zero, that means the memory operation does not need load
3234 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3235 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3236 // specified alignment of the memory operation. If it is zero, that means
3237 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3238 // indicates whether the memcpy source is constant so it does not need to be
3240 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3241 NonScalarIntSafe, MemcpyStrSrc,
3242 DAG.getMachineFunction());
3244 if (VT == MVT::Other) {
3245 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3246 TLI.allowsUnalignedMemoryAccesses(VT)) {
3247 VT = TLI.getPointerTy();
3249 switch (DstAlign & 7) {
3250 case 0: VT = MVT::i64; break;
3251 case 4: VT = MVT::i32; break;
3252 case 2: VT = MVT::i16; break;
3253 default: VT = MVT::i8; break;
3258 while (!TLI.isTypeLegal(LVT))
3259 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3260 assert(LVT.isInteger());
3266 unsigned NumMemOps = 0;
3268 unsigned VTSize = VT.getSizeInBits() / 8;
3269 while (VTSize > Size) {
3270 // For now, only use non-vector load / store's for the left-over pieces.
3271 if (VT.isVector() || VT.isFloatingPoint()) {
3273 while (!TLI.isTypeLegal(VT))
3274 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3275 VTSize = VT.getSizeInBits() / 8;
3277 // This can result in a type that is not legal on the target, e.g.
3278 // 1 or 2 bytes on PPC.
3279 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3284 if (++NumMemOps > Limit)
3286 MemOps.push_back(VT);
3293 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3294 SDValue Chain, SDValue Dst,
3295 SDValue Src, uint64_t Size,
3296 unsigned Align, bool isVol,
3298 const Value *DstSV, uint64_t DstSVOff,
3299 const Value *SrcSV, uint64_t SrcSVOff) {
3300 // Turn a memcpy of undef to nop.
3301 if (Src.getOpcode() == ISD::UNDEF)
3304 // Expand memcpy to a series of load and store ops if the size operand falls
3305 // below a certain threshold.
3306 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3307 std::vector<EVT> MemOps;
3308 bool DstAlignCanChange = false;
3309 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3310 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3311 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3312 DstAlignCanChange = true;
3313 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3314 if (Align > SrcAlign)
3317 bool CopyFromStr = isMemSrcFromString(Src, Str);
3318 bool isZeroStr = CopyFromStr && Str.empty();
3319 uint64_t Limit = -1ULL;
3321 Limit = TLI.getMaxStoresPerMemcpy();
3322 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3323 (DstAlignCanChange ? 0 : Align),
3324 (isZeroStr ? 0 : SrcAlign),
3325 true, CopyFromStr, DAG, TLI))
3328 if (DstAlignCanChange) {
3329 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3330 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3331 if (NewAlign > Align) {
3332 // Give the stack frame object a larger alignment if needed.
3333 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3334 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3339 SmallVector<SDValue, 8> OutChains;
3340 unsigned NumMemOps = MemOps.size();
3341 uint64_t SrcOff = 0, DstOff = 0;
3342 for (unsigned i = 0; i != NumMemOps; ++i) {
3344 unsigned VTSize = VT.getSizeInBits() / 8;
3345 SDValue Value, Store;
3348 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3349 // It's unlikely a store of a vector immediate can be done in a single
3350 // instruction. It would require a load from a constantpool first.
3351 // We only handle zero vectors here.
3352 // FIXME: Handle other cases where store of vector immediate is done in
3353 // a single instruction.
3354 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3355 Store = DAG.getStore(Chain, dl, Value,
3356 getMemBasePlusOffset(Dst, DstOff, DAG),
3357 DstSV, DstSVOff + DstOff, isVol, false, Align);
3359 // The type might not be legal for the target. This should only happen
3360 // if the type is smaller than a legal type, as on PPC, so the right
3361 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3362 // to Load/Store if NVT==VT.
3363 // FIXME does the case above also need this?
3364 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3365 assert(NVT.bitsGE(VT));
3366 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3367 getMemBasePlusOffset(Src, SrcOff, DAG),
3368 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3369 MinAlign(SrcAlign, SrcOff));
3370 Store = DAG.getTruncStore(Chain, dl, Value,
3371 getMemBasePlusOffset(Dst, DstOff, DAG),
3372 DstSV, DstSVOff + DstOff, VT, isVol, false,
3375 OutChains.push_back(Store);
3380 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3381 &OutChains[0], OutChains.size());
3384 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3385 SDValue Chain, SDValue Dst,
3386 SDValue Src, uint64_t Size,
3387 unsigned Align, bool isVol,
3389 const Value *DstSV, uint64_t DstSVOff,
3390 const Value *SrcSV, uint64_t SrcSVOff) {
3391 // Turn a memmove of undef to nop.
3392 if (Src.getOpcode() == ISD::UNDEF)
3395 // Expand memmove to a series of load and store ops if the size operand falls
3396 // below a certain threshold.
3397 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3398 std::vector<EVT> MemOps;
3399 uint64_t Limit = -1ULL;
3401 Limit = TLI.getMaxStoresPerMemmove();
3402 bool DstAlignCanChange = false;
3403 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3404 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3405 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3406 DstAlignCanChange = true;
3407 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3408 if (Align > SrcAlign)
3411 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3412 (DstAlignCanChange ? 0 : Align),
3413 SrcAlign, true, false, DAG, TLI))
3416 if (DstAlignCanChange) {
3417 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3418 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3419 if (NewAlign > Align) {
3420 // Give the stack frame object a larger alignment if needed.
3421 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3422 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3427 uint64_t SrcOff = 0, DstOff = 0;
3428 SmallVector<SDValue, 8> LoadValues;
3429 SmallVector<SDValue, 8> LoadChains;
3430 SmallVector<SDValue, 8> OutChains;
3431 unsigned NumMemOps = MemOps.size();
3432 for (unsigned i = 0; i < NumMemOps; i++) {
3434 unsigned VTSize = VT.getSizeInBits() / 8;
3435 SDValue Value, Store;
3437 Value = DAG.getLoad(VT, dl, Chain,
3438 getMemBasePlusOffset(Src, SrcOff, DAG),
3439 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3440 LoadValues.push_back(Value);
3441 LoadChains.push_back(Value.getValue(1));
3444 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3445 &LoadChains[0], LoadChains.size());
3447 for (unsigned i = 0; i < NumMemOps; i++) {
3449 unsigned VTSize = VT.getSizeInBits() / 8;
3450 SDValue Value, Store;
3452 Store = DAG.getStore(Chain, dl, LoadValues[i],
3453 getMemBasePlusOffset(Dst, DstOff, DAG),
3454 DstSV, DstSVOff + DstOff, isVol, false, Align);
3455 OutChains.push_back(Store);
3459 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3460 &OutChains[0], OutChains.size());
3463 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3464 SDValue Chain, SDValue Dst,
3465 SDValue Src, uint64_t Size,
3466 unsigned Align, bool isVol,
3467 const Value *DstSV, uint64_t DstSVOff) {
3468 // Turn a memset of undef to nop.
3469 if (Src.getOpcode() == ISD::UNDEF)
3472 // Expand memset to a series of load/store ops if the size operand
3473 // falls below a certain threshold.
3474 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3475 std::vector<EVT> MemOps;
3476 bool DstAlignCanChange = false;
3477 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3478 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3479 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3480 DstAlignCanChange = true;
3481 bool NonScalarIntSafe =
3482 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3483 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3484 Size, (DstAlignCanChange ? 0 : Align), 0,
3485 NonScalarIntSafe, false, DAG, TLI))
3488 if (DstAlignCanChange) {
3489 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3490 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3491 if (NewAlign > Align) {
3492 // Give the stack frame object a larger alignment if needed.
3493 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3494 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3499 SmallVector<SDValue, 8> OutChains;
3500 uint64_t DstOff = 0;
3501 unsigned NumMemOps = MemOps.size();
3502 for (unsigned i = 0; i < NumMemOps; i++) {
3504 unsigned VTSize = VT.getSizeInBits() / 8;
3505 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3506 SDValue Store = DAG.getStore(Chain, dl, Value,
3507 getMemBasePlusOffset(Dst, DstOff, DAG),
3508 DstSV, DstSVOff + DstOff, isVol, false, 0);
3509 OutChains.push_back(Store);
3513 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3514 &OutChains[0], OutChains.size());
3517 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3518 SDValue Src, SDValue Size,
3519 unsigned Align, bool isVol, bool AlwaysInline,
3520 const Value *DstSV, uint64_t DstSVOff,
3521 const Value *SrcSV, uint64_t SrcSVOff) {
3523 // Check to see if we should lower the memcpy to loads and stores first.
3524 // For cases within the target-specified limits, this is the best choice.
3525 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3527 // Memcpy with size zero? Just return the original chain.
3528 if (ConstantSize->isNullValue())
3531 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3532 ConstantSize->getZExtValue(),Align,
3533 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3534 if (Result.getNode())
3538 // Then check to see if we should lower the memcpy with target-specific
3539 // code. If the target chooses to do this, this is the next best.
3541 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3542 isVol, AlwaysInline,
3543 DstSV, DstSVOff, SrcSV, SrcSVOff);
3544 if (Result.getNode())
3547 // If we really need inline code and the target declined to provide it,
3548 // use a (potentially long) sequence of loads and stores.
3550 assert(ConstantSize && "AlwaysInline requires a constant size!");
3551 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3552 ConstantSize->getZExtValue(), Align, isVol,
3553 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3556 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3557 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3558 // respect volatile, so they may do things like read or write memory
3559 // beyond the given memory regions. But fixing this isn't easy, and most
3560 // people don't care.
3562 // Emit a library call.
3563 TargetLowering::ArgListTy Args;
3564 TargetLowering::ArgListEntry Entry;
3565 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3566 Entry.Node = Dst; Args.push_back(Entry);
3567 Entry.Node = Src; Args.push_back(Entry);
3568 Entry.Node = Size; Args.push_back(Entry);
3569 // FIXME: pass in DebugLoc
3570 std::pair<SDValue,SDValue> CallResult =
3571 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3572 false, false, false, false, 0,
3573 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3574 /*isReturnValueUsed=*/false,
3575 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3576 TLI.getPointerTy()),
3578 return CallResult.second;
3581 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3582 SDValue Src, SDValue Size,
3583 unsigned Align, bool isVol,
3584 const Value *DstSV, uint64_t DstSVOff,
3585 const Value *SrcSV, uint64_t SrcSVOff) {
3587 // Check to see if we should lower the memmove to loads and stores first.
3588 // For cases within the target-specified limits, this is the best choice.
3589 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3591 // Memmove with size zero? Just return the original chain.
3592 if (ConstantSize->isNullValue())
3596 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3597 ConstantSize->getZExtValue(), Align, isVol,
3598 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3599 if (Result.getNode())
3603 // Then check to see if we should lower the memmove with target-specific
3604 // code. If the target chooses to do this, this is the next best.
3606 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3607 DstSV, DstSVOff, SrcSV, SrcSVOff);
3608 if (Result.getNode())
3611 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3612 // not be safe. See memcpy above for more details.
3614 // Emit a library call.
3615 TargetLowering::ArgListTy Args;
3616 TargetLowering::ArgListEntry Entry;
3617 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3618 Entry.Node = Dst; Args.push_back(Entry);
3619 Entry.Node = Src; Args.push_back(Entry);
3620 Entry.Node = Size; Args.push_back(Entry);
3621 // FIXME: pass in DebugLoc
3622 std::pair<SDValue,SDValue> CallResult =
3623 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3624 false, false, false, false, 0,
3625 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3626 /*isReturnValueUsed=*/false,
3627 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3628 TLI.getPointerTy()),
3630 return CallResult.second;
3633 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3634 SDValue Src, SDValue Size,
3635 unsigned Align, bool isVol,
3636 const Value *DstSV, uint64_t DstSVOff) {
3638 // Check to see if we should lower the memset to stores first.
3639 // For cases within the target-specified limits, this is the best choice.
3640 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3642 // Memset with size zero? Just return the original chain.
3643 if (ConstantSize->isNullValue())
3647 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3648 Align, isVol, DstSV, DstSVOff);
3650 if (Result.getNode())
3654 // Then check to see if we should lower the memset with target-specific
3655 // code. If the target chooses to do this, this is the next best.
3657 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3659 if (Result.getNode())
3662 // Emit a library call.
3663 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3664 TargetLowering::ArgListTy Args;
3665 TargetLowering::ArgListEntry Entry;
3666 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3667 Args.push_back(Entry);
3668 // Extend or truncate the argument to be an i32 value for the call.
3669 if (Src.getValueType().bitsGT(MVT::i32))
3670 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3672 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3674 Entry.Ty = Type::getInt32Ty(*getContext());
3675 Entry.isSExt = true;
3676 Args.push_back(Entry);
3678 Entry.Ty = IntPtrTy;
3679 Entry.isSExt = false;
3680 Args.push_back(Entry);
3681 // FIXME: pass in DebugLoc
3682 std::pair<SDValue,SDValue> CallResult =
3683 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3684 false, false, false, false, 0,
3685 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3686 /*isReturnValueUsed=*/false,
3687 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3688 TLI.getPointerTy()),
3690 return CallResult.second;
3693 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3695 SDValue Ptr, SDValue Cmp,
3696 SDValue Swp, const Value* PtrVal,
3697 unsigned Alignment) {
3698 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3699 Alignment = getEVTAlignment(MemVT);
3701 // Check if the memory reference references a frame index
3703 if (const FrameIndexSDNode *FI =
3704 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3705 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3707 MachineFunction &MF = getMachineFunction();
3708 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3710 // For now, atomics are considered to be volatile always.
3711 Flags |= MachineMemOperand::MOVolatile;
3713 MachineMemOperand *MMO =
3714 MF.getMachineMemOperand(PtrVal, Flags, 0,
3715 MemVT.getStoreSize(), Alignment);
3717 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3720 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3722 SDValue Ptr, SDValue Cmp,
3723 SDValue Swp, MachineMemOperand *MMO) {
3724 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3725 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3727 EVT VT = Cmp.getValueType();
3729 SDVTList VTs = getVTList(VT, MVT::Other);
3730 FoldingSetNodeID ID;
3731 ID.AddInteger(MemVT.getRawBits());
3732 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3733 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3735 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3736 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3737 return SDValue(E, 0);
3739 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3740 Ptr, Cmp, Swp, MMO);
3741 CSEMap.InsertNode(N, IP);
3742 AllNodes.push_back(N);
3743 return SDValue(N, 0);
3746 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3748 SDValue Ptr, SDValue Val,
3749 const Value* PtrVal,
3750 unsigned Alignment) {
3751 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3752 Alignment = getEVTAlignment(MemVT);
3754 // Check if the memory reference references a frame index
3756 if (const FrameIndexSDNode *FI =
3757 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3758 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3760 MachineFunction &MF = getMachineFunction();
3761 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3763 // For now, atomics are considered to be volatile always.
3764 Flags |= MachineMemOperand::MOVolatile;
3766 MachineMemOperand *MMO =
3767 MF.getMachineMemOperand(PtrVal, Flags, 0,
3768 MemVT.getStoreSize(), Alignment);
3770 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3773 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3775 SDValue Ptr, SDValue Val,
3776 MachineMemOperand *MMO) {
3777 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3778 Opcode == ISD::ATOMIC_LOAD_SUB ||
3779 Opcode == ISD::ATOMIC_LOAD_AND ||
3780 Opcode == ISD::ATOMIC_LOAD_OR ||
3781 Opcode == ISD::ATOMIC_LOAD_XOR ||
3782 Opcode == ISD::ATOMIC_LOAD_NAND ||
3783 Opcode == ISD::ATOMIC_LOAD_MIN ||
3784 Opcode == ISD::ATOMIC_LOAD_MAX ||
3785 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3786 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3787 Opcode == ISD::ATOMIC_SWAP) &&
3788 "Invalid Atomic Op");
3790 EVT VT = Val.getValueType();
3792 SDVTList VTs = getVTList(VT, MVT::Other);
3793 FoldingSetNodeID ID;
3794 ID.AddInteger(MemVT.getRawBits());
3795 SDValue Ops[] = {Chain, Ptr, Val};
3796 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3798 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3799 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3800 return SDValue(E, 0);
3802 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3804 CSEMap.InsertNode(N, IP);
3805 AllNodes.push_back(N);
3806 return SDValue(N, 0);
3809 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3810 /// Allowed to return something different (and simpler) if Simplify is true.
3811 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3816 SmallVector<EVT, 4> VTs;
3817 VTs.reserve(NumOps);
3818 for (unsigned i = 0; i < NumOps; ++i)
3819 VTs.push_back(Ops[i].getValueType());
3820 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3825 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3826 const EVT *VTs, unsigned NumVTs,
3827 const SDValue *Ops, unsigned NumOps,
3828 EVT MemVT, const Value *srcValue, int SVOff,
3829 unsigned Align, bool Vol,
3830 bool ReadMem, bool WriteMem) {
3831 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3832 MemVT, srcValue, SVOff, Align, Vol,
3837 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3838 const SDValue *Ops, unsigned NumOps,
3839 EVT MemVT, const Value *srcValue, int SVOff,
3840 unsigned Align, bool Vol,
3841 bool ReadMem, bool WriteMem) {
3842 if (Align == 0) // Ensure that codegen never sees alignment 0
3843 Align = getEVTAlignment(MemVT);
3845 MachineFunction &MF = getMachineFunction();
3848 Flags |= MachineMemOperand::MOStore;
3850 Flags |= MachineMemOperand::MOLoad;
3852 Flags |= MachineMemOperand::MOVolatile;
3853 MachineMemOperand *MMO =
3854 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3855 MemVT.getStoreSize(), Align);
3857 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3861 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3862 const SDValue *Ops, unsigned NumOps,
3863 EVT MemVT, MachineMemOperand *MMO) {
3864 assert((Opcode == ISD::INTRINSIC_VOID ||
3865 Opcode == ISD::INTRINSIC_W_CHAIN ||
3866 (Opcode <= INT_MAX &&
3867 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3868 "Opcode is not a memory-accessing opcode!");
3870 // Memoize the node unless it returns a flag.
3871 MemIntrinsicSDNode *N;
3872 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3873 FoldingSetNodeID ID;
3874 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3876 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3877 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3878 return SDValue(E, 0);
3881 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3883 CSEMap.InsertNode(N, IP);
3885 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3888 AllNodes.push_back(N);
3889 return SDValue(N, 0);
3893 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3894 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3895 SDValue Ptr, SDValue Offset,
3896 const Value *SV, int SVOffset, EVT MemVT,
3897 bool isVolatile, bool isNonTemporal,
3898 unsigned Alignment) {
3899 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3900 Alignment = getEVTAlignment(VT);
3902 // Check if the memory reference references a frame index
3904 if (const FrameIndexSDNode *FI =
3905 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3906 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3908 MachineFunction &MF = getMachineFunction();
3909 unsigned Flags = MachineMemOperand::MOLoad;
3911 Flags |= MachineMemOperand::MOVolatile;
3913 Flags |= MachineMemOperand::MONonTemporal;
3914 MachineMemOperand *MMO =
3915 MF.getMachineMemOperand(SV, Flags, SVOffset,
3916 MemVT.getStoreSize(), Alignment);
3917 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3921 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3922 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3923 SDValue Ptr, SDValue Offset, EVT MemVT,
3924 MachineMemOperand *MMO) {
3926 ExtType = ISD::NON_EXTLOAD;
3927 } else if (ExtType == ISD::NON_EXTLOAD) {
3928 assert(VT == MemVT && "Non-extending load from different memory type!");
3931 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3932 "Should only be an extending load, not truncating!");
3933 assert(VT.isInteger() == MemVT.isInteger() &&
3934 "Cannot convert from FP to Int or Int -> FP!");
3935 assert(VT.isVector() == MemVT.isVector() &&
3936 "Cannot use trunc store to convert to or from a vector!");
3937 assert((!VT.isVector() ||
3938 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3939 "Cannot use trunc store to change the number of vector elements!");
3942 bool Indexed = AM != ISD::UNINDEXED;
3943 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3944 "Unindexed load with an offset!");
3946 SDVTList VTs = Indexed ?
3947 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3948 SDValue Ops[] = { Chain, Ptr, Offset };
3949 FoldingSetNodeID ID;
3950 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3951 ID.AddInteger(MemVT.getRawBits());
3952 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3953 MMO->isNonTemporal()));
3955 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3956 cast<LoadSDNode>(E)->refineAlignment(MMO);
3957 return SDValue(E, 0);
3959 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3961 CSEMap.InsertNode(N, IP);
3962 AllNodes.push_back(N);
3963 return SDValue(N, 0);
3966 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3967 SDValue Chain, SDValue Ptr,
3968 const Value *SV, int SVOffset,
3969 bool isVolatile, bool isNonTemporal,
3970 unsigned Alignment) {
3971 SDValue Undef = getUNDEF(Ptr.getValueType());
3972 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3973 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3976 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3977 SDValue Chain, SDValue Ptr,
3979 int SVOffset, EVT MemVT,
3980 bool isVolatile, bool isNonTemporal,
3981 unsigned Alignment) {
3982 SDValue Undef = getUNDEF(Ptr.getValueType());
3983 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3984 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
3988 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3989 SDValue Offset, ISD::MemIndexedMode AM) {
3990 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3991 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3992 "Load is already a indexed load!");
3993 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3994 LD->getChain(), Base, Offset, LD->getSrcValue(),
3995 LD->getSrcValueOffset(), LD->getMemoryVT(),
3996 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
3999 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4000 SDValue Ptr, const Value *SV, int SVOffset,
4001 bool isVolatile, bool isNonTemporal,
4002 unsigned Alignment) {
4003 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4004 Alignment = getEVTAlignment(Val.getValueType());
4006 // Check if the memory reference references a frame index
4008 if (const FrameIndexSDNode *FI =
4009 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4010 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4012 MachineFunction &MF = getMachineFunction();
4013 unsigned Flags = MachineMemOperand::MOStore;
4015 Flags |= MachineMemOperand::MOVolatile;
4017 Flags |= MachineMemOperand::MONonTemporal;
4018 MachineMemOperand *MMO =
4019 MF.getMachineMemOperand(SV, Flags, SVOffset,
4020 Val.getValueType().getStoreSize(), Alignment);
4022 return getStore(Chain, dl, Val, Ptr, MMO);
4025 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4026 SDValue Ptr, MachineMemOperand *MMO) {
4027 EVT VT = Val.getValueType();
4028 SDVTList VTs = getVTList(MVT::Other);
4029 SDValue Undef = getUNDEF(Ptr.getValueType());
4030 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4031 FoldingSetNodeID ID;
4032 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4033 ID.AddInteger(VT.getRawBits());
4034 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4035 MMO->isNonTemporal()));
4037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4038 cast<StoreSDNode>(E)->refineAlignment(MMO);
4039 return SDValue(E, 0);
4041 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4043 CSEMap.InsertNode(N, IP);
4044 AllNodes.push_back(N);
4045 return SDValue(N, 0);
4048 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4049 SDValue Ptr, const Value *SV,
4050 int SVOffset, EVT SVT,
4051 bool isVolatile, bool isNonTemporal,
4052 unsigned Alignment) {
4053 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4054 Alignment = getEVTAlignment(SVT);
4056 // Check if the memory reference references a frame index
4058 if (const FrameIndexSDNode *FI =
4059 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4060 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4062 MachineFunction &MF = getMachineFunction();
4063 unsigned Flags = MachineMemOperand::MOStore;
4065 Flags |= MachineMemOperand::MOVolatile;
4067 Flags |= MachineMemOperand::MONonTemporal;
4068 MachineMemOperand *MMO =
4069 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4071 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4074 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4075 SDValue Ptr, EVT SVT,
4076 MachineMemOperand *MMO) {
4077 EVT VT = Val.getValueType();
4080 return getStore(Chain, dl, Val, Ptr, MMO);
4082 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4083 "Should only be a truncating store, not extending!");
4084 assert(VT.isInteger() == SVT.isInteger() &&
4085 "Can't do FP-INT conversion!");
4086 assert(VT.isVector() == SVT.isVector() &&
4087 "Cannot use trunc store to convert to or from a vector!");
4088 assert((!VT.isVector() ||
4089 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4090 "Cannot use trunc store to change the number of vector elements!");
4092 SDVTList VTs = getVTList(MVT::Other);
4093 SDValue Undef = getUNDEF(Ptr.getValueType());
4094 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4095 FoldingSetNodeID ID;
4096 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4097 ID.AddInteger(SVT.getRawBits());
4098 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4099 MMO->isNonTemporal()));
4101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4102 cast<StoreSDNode>(E)->refineAlignment(MMO);
4103 return SDValue(E, 0);
4105 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4107 CSEMap.InsertNode(N, IP);
4108 AllNodes.push_back(N);
4109 return SDValue(N, 0);
4113 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4114 SDValue Offset, ISD::MemIndexedMode AM) {
4115 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4116 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4117 "Store is already a indexed store!");
4118 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4119 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4120 FoldingSetNodeID ID;
4121 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4122 ID.AddInteger(ST->getMemoryVT().getRawBits());
4123 ID.AddInteger(ST->getRawSubclassData());
4125 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4126 return SDValue(E, 0);
4128 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4129 ST->isTruncatingStore(),
4131 ST->getMemOperand());
4132 CSEMap.InsertNode(N, IP);
4133 AllNodes.push_back(N);
4134 return SDValue(N, 0);
4137 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4138 SDValue Chain, SDValue Ptr,
4140 SDValue Ops[] = { Chain, Ptr, SV };
4141 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4144 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4145 const SDUse *Ops, unsigned NumOps) {
4147 case 0: return getNode(Opcode, DL, VT);
4148 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4149 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4150 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4154 // Copy from an SDUse array into an SDValue array for use with
4155 // the regular getNode logic.
4156 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4157 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4160 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4161 const SDValue *Ops, unsigned NumOps) {
4163 case 0: return getNode(Opcode, DL, VT);
4164 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4165 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4166 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4172 case ISD::SELECT_CC: {
4173 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4174 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4175 "LHS and RHS of condition must have same type!");
4176 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4177 "True and False arms of SelectCC must have same type!");
4178 assert(Ops[2].getValueType() == VT &&
4179 "select_cc node must be of same type as true and false value!");
4183 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4184 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4185 "LHS/RHS of comparison should match types!");
4192 SDVTList VTs = getVTList(VT);
4194 if (VT != MVT::Flag) {
4195 FoldingSetNodeID ID;
4196 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4199 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4200 return SDValue(E, 0);
4202 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4203 CSEMap.InsertNode(N, IP);
4205 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4208 AllNodes.push_back(N);
4212 return SDValue(N, 0);
4215 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4216 const std::vector<EVT> &ResultTys,
4217 const SDValue *Ops, unsigned NumOps) {
4218 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4222 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4223 const EVT *VTs, unsigned NumVTs,
4224 const SDValue *Ops, unsigned NumOps) {
4226 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4227 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4230 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4231 const SDValue *Ops, unsigned NumOps) {
4232 if (VTList.NumVTs == 1)
4233 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4237 // FIXME: figure out how to safely handle things like
4238 // int foo(int x) { return 1 << (x & 255); }
4239 // int bar() { return foo(256); }
4240 case ISD::SRA_PARTS:
4241 case ISD::SRL_PARTS:
4242 case ISD::SHL_PARTS:
4243 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4244 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4245 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4246 else if (N3.getOpcode() == ISD::AND)
4247 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4248 // If the and is only masking out bits that cannot effect the shift,
4249 // eliminate the and.
4250 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4251 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4252 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4258 // Memoize the node unless it returns a flag.
4260 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4261 FoldingSetNodeID ID;
4262 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4265 return SDValue(E, 0);
4268 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4269 } else if (NumOps == 2) {
4270 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4271 } else if (NumOps == 3) {
4272 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4275 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4277 CSEMap.InsertNode(N, IP);
4280 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4281 } else if (NumOps == 2) {
4282 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4283 } else if (NumOps == 3) {
4284 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4287 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4290 AllNodes.push_back(N);
4294 return SDValue(N, 0);
4297 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4298 return getNode(Opcode, DL, VTList, 0, 0);
4301 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4303 SDValue Ops[] = { N1 };
4304 return getNode(Opcode, DL, VTList, Ops, 1);
4307 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4308 SDValue N1, SDValue N2) {
4309 SDValue Ops[] = { N1, N2 };
4310 return getNode(Opcode, DL, VTList, Ops, 2);
4313 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4314 SDValue N1, SDValue N2, SDValue N3) {
4315 SDValue Ops[] = { N1, N2, N3 };
4316 return getNode(Opcode, DL, VTList, Ops, 3);
4319 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4320 SDValue N1, SDValue N2, SDValue N3,
4322 SDValue Ops[] = { N1, N2, N3, N4 };
4323 return getNode(Opcode, DL, VTList, Ops, 4);
4326 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4327 SDValue N1, SDValue N2, SDValue N3,
4328 SDValue N4, SDValue N5) {
4329 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4330 return getNode(Opcode, DL, VTList, Ops, 5);
4333 SDVTList SelectionDAG::getVTList(EVT VT) {
4334 return makeVTList(SDNode::getValueTypeList(VT), 1);
4337 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4338 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4339 E = VTList.rend(); I != E; ++I)
4340 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4343 EVT *Array = Allocator.Allocate<EVT>(2);
4346 SDVTList Result = makeVTList(Array, 2);
4347 VTList.push_back(Result);
4351 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4352 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4353 E = VTList.rend(); I != E; ++I)
4354 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4358 EVT *Array = Allocator.Allocate<EVT>(3);
4362 SDVTList Result = makeVTList(Array, 3);
4363 VTList.push_back(Result);
4367 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4368 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4369 E = VTList.rend(); I != E; ++I)
4370 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4371 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4374 EVT *Array = Allocator.Allocate<EVT>(4);
4379 SDVTList Result = makeVTList(Array, 4);
4380 VTList.push_back(Result);
4384 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4386 case 0: llvm_unreachable("Cannot have nodes without results!");
4387 case 1: return getVTList(VTs[0]);
4388 case 2: return getVTList(VTs[0], VTs[1]);
4389 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4390 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4394 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4395 E = VTList.rend(); I != E; ++I) {
4396 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4399 bool NoMatch = false;
4400 for (unsigned i = 2; i != NumVTs; ++i)
4401 if (VTs[i] != I->VTs[i]) {
4409 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4410 std::copy(VTs, VTs+NumVTs, Array);
4411 SDVTList Result = makeVTList(Array, NumVTs);
4412 VTList.push_back(Result);
4417 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4418 /// specified operands. If the resultant node already exists in the DAG,
4419 /// this does not modify the specified node, instead it returns the node that
4420 /// already exists. If the resultant node does not exist in the DAG, the
4421 /// input node is returned. As a degenerate case, if you specify the same
4422 /// input operands as the node already has, the input node is returned.
4423 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4424 SDNode *N = InN.getNode();
4425 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4427 // Check to see if there is no change.
4428 if (Op == N->getOperand(0)) return InN;
4430 // See if the modified node already exists.
4431 void *InsertPos = 0;
4432 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4433 return SDValue(Existing, InN.getResNo());
4435 // Nope it doesn't. Remove the node from its current place in the maps.
4437 if (!RemoveNodeFromCSEMaps(N))
4440 // Now we update the operands.
4441 N->OperandList[0].set(Op);
4443 // If this gets put into a CSE map, add it.
4444 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4448 SDValue SelectionDAG::
4449 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4450 SDNode *N = InN.getNode();
4451 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4453 // Check to see if there is no change.
4454 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4455 return InN; // No operands changed, just return the input node.
4457 // See if the modified node already exists.
4458 void *InsertPos = 0;
4459 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4460 return SDValue(Existing, InN.getResNo());
4462 // Nope it doesn't. Remove the node from its current place in the maps.
4464 if (!RemoveNodeFromCSEMaps(N))
4467 // Now we update the operands.
4468 if (N->OperandList[0] != Op1)
4469 N->OperandList[0].set(Op1);
4470 if (N->OperandList[1] != Op2)
4471 N->OperandList[1].set(Op2);
4473 // If this gets put into a CSE map, add it.
4474 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4478 SDValue SelectionDAG::
4479 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4480 SDValue Ops[] = { Op1, Op2, Op3 };
4481 return UpdateNodeOperands(N, Ops, 3);
4484 SDValue SelectionDAG::
4485 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4486 SDValue Op3, SDValue Op4) {
4487 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4488 return UpdateNodeOperands(N, Ops, 4);
4491 SDValue SelectionDAG::
4492 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4493 SDValue Op3, SDValue Op4, SDValue Op5) {
4494 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4495 return UpdateNodeOperands(N, Ops, 5);
4498 SDValue SelectionDAG::
4499 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4500 SDNode *N = InN.getNode();
4501 assert(N->getNumOperands() == NumOps &&
4502 "Update with wrong number of operands");
4504 // Check to see if there is no change.
4505 bool AnyChange = false;
4506 for (unsigned i = 0; i != NumOps; ++i) {
4507 if (Ops[i] != N->getOperand(i)) {
4513 // No operands changed, just return the input node.
4514 if (!AnyChange) return InN;
4516 // See if the modified node already exists.
4517 void *InsertPos = 0;
4518 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4519 return SDValue(Existing, InN.getResNo());
4521 // Nope it doesn't. Remove the node from its current place in the maps.
4523 if (!RemoveNodeFromCSEMaps(N))
4526 // Now we update the operands.
4527 for (unsigned i = 0; i != NumOps; ++i)
4528 if (N->OperandList[i] != Ops[i])
4529 N->OperandList[i].set(Ops[i]);
4531 // If this gets put into a CSE map, add it.
4532 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4536 /// DropOperands - Release the operands and set this node to have
4538 void SDNode::DropOperands() {
4539 // Unlike the code in MorphNodeTo that does this, we don't need to
4540 // watch for dead nodes here.
4541 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4547 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4550 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4552 SDVTList VTs = getVTList(VT);
4553 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4556 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4557 EVT VT, SDValue Op1) {
4558 SDVTList VTs = getVTList(VT);
4559 SDValue Ops[] = { Op1 };
4560 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4563 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4564 EVT VT, SDValue Op1,
4566 SDVTList VTs = getVTList(VT);
4567 SDValue Ops[] = { Op1, Op2 };
4568 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4571 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4572 EVT VT, SDValue Op1,
4573 SDValue Op2, SDValue Op3) {
4574 SDVTList VTs = getVTList(VT);
4575 SDValue Ops[] = { Op1, Op2, Op3 };
4576 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4579 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4580 EVT VT, const SDValue *Ops,
4582 SDVTList VTs = getVTList(VT);
4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4586 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4587 EVT VT1, EVT VT2, const SDValue *Ops,
4589 SDVTList VTs = getVTList(VT1, VT2);
4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4593 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 SDVTList VTs = getVTList(VT1, VT2);
4596 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4599 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4600 EVT VT1, EVT VT2, EVT VT3,
4601 const SDValue *Ops, unsigned NumOps) {
4602 SDVTList VTs = getVTList(VT1, VT2, VT3);
4603 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4606 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4607 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4608 const SDValue *Ops, unsigned NumOps) {
4609 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4610 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4613 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4616 SDVTList VTs = getVTList(VT1, VT2);
4617 SDValue Ops[] = { Op1 };
4618 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4621 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4623 SDValue Op1, SDValue Op2) {
4624 SDVTList VTs = getVTList(VT1, VT2);
4625 SDValue Ops[] = { Op1, Op2 };
4626 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4631 SDValue Op1, SDValue Op2,
4633 SDVTList VTs = getVTList(VT1, VT2);
4634 SDValue Ops[] = { Op1, Op2, Op3 };
4635 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4638 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4639 EVT VT1, EVT VT2, EVT VT3,
4640 SDValue Op1, SDValue Op2,
4642 SDVTList VTs = getVTList(VT1, VT2, VT3);
4643 SDValue Ops[] = { Op1, Op2, Op3 };
4644 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4647 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4648 SDVTList VTs, const SDValue *Ops,
4650 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4651 // Reset the NodeID to -1.
4656 /// MorphNodeTo - This *mutates* the specified node to have the specified
4657 /// return type, opcode, and operands.
4659 /// Note that MorphNodeTo returns the resultant node. If there is already a
4660 /// node of the specified opcode and operands, it returns that node instead of
4661 /// the current one. Note that the DebugLoc need not be the same.
4663 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4664 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4665 /// node, and because it doesn't require CSE recalculation for any of
4666 /// the node's users.
4668 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4669 SDVTList VTs, const SDValue *Ops,
4671 // If an identical node already exists, use it.
4673 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4674 FoldingSetNodeID ID;
4675 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4676 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4680 if (!RemoveNodeFromCSEMaps(N))
4683 // Start the morphing.
4685 N->ValueList = VTs.VTs;
4686 N->NumValues = VTs.NumVTs;
4688 // Clear the operands list, updating used nodes to remove this from their
4689 // use list. Keep track of any operands that become dead as a result.
4690 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4691 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4693 SDNode *Used = Use.getNode();
4695 if (Used->use_empty())
4696 DeadNodeSet.insert(Used);
4699 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4700 // Initialize the memory references information.
4701 MN->setMemRefs(0, 0);
4702 // If NumOps is larger than the # of operands we can have in a
4703 // MachineSDNode, reallocate the operand list.
4704 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4705 if (MN->OperandsNeedDelete)
4706 delete[] MN->OperandList;
4707 if (NumOps > array_lengthof(MN->LocalOperands))
4708 // We're creating a final node that will live unmorphed for the
4709 // remainder of the current SelectionDAG iteration, so we can allocate
4710 // the operands directly out of a pool with no recycling metadata.
4711 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4714 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4715 MN->OperandsNeedDelete = false;
4717 MN->InitOperands(MN->OperandList, Ops, NumOps);
4719 // If NumOps is larger than the # of operands we currently have, reallocate
4720 // the operand list.
4721 if (NumOps > N->NumOperands) {
4722 if (N->OperandsNeedDelete)
4723 delete[] N->OperandList;
4724 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4725 N->OperandsNeedDelete = true;
4727 N->InitOperands(N->OperandList, Ops, NumOps);
4730 // Delete any nodes that are still dead after adding the uses for the
4732 if (!DeadNodeSet.empty()) {
4733 SmallVector<SDNode *, 16> DeadNodes;
4734 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4735 E = DeadNodeSet.end(); I != E; ++I)
4736 if ((*I)->use_empty())
4737 DeadNodes.push_back(*I);
4738 RemoveDeadNodes(DeadNodes);
4742 CSEMap.InsertNode(N, IP); // Memoize the new node.
4747 /// getMachineNode - These are used for target selectors to create a new node
4748 /// with specified return type(s), MachineInstr opcode, and operands.
4750 /// Note that getMachineNode returns the resultant node. If there is already a
4751 /// node of the specified opcode and operands, it returns that node instead of
4752 /// the current one.
4754 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4755 SDVTList VTs = getVTList(VT);
4756 return getMachineNode(Opcode, dl, VTs, 0, 0);
4760 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4761 SDVTList VTs = getVTList(VT);
4762 SDValue Ops[] = { Op1 };
4763 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4767 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4768 SDValue Op1, SDValue Op2) {
4769 SDVTList VTs = getVTList(VT);
4770 SDValue Ops[] = { Op1, Op2 };
4771 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4775 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4776 SDValue Op1, SDValue Op2, SDValue Op3) {
4777 SDVTList VTs = getVTList(VT);
4778 SDValue Ops[] = { Op1, Op2, Op3 };
4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4783 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4784 const SDValue *Ops, unsigned NumOps) {
4785 SDVTList VTs = getVTList(VT);
4786 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4790 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4791 SDVTList VTs = getVTList(VT1, VT2);
4792 return getMachineNode(Opcode, dl, VTs, 0, 0);
4796 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4797 EVT VT1, EVT VT2, SDValue Op1) {
4798 SDVTList VTs = getVTList(VT1, VT2);
4799 SDValue Ops[] = { Op1 };
4800 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4804 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4805 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 SDValue Ops[] = { Op1, Op2 };
4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4812 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4813 EVT VT1, EVT VT2, SDValue Op1,
4814 SDValue Op2, SDValue Op3) {
4815 SDVTList VTs = getVTList(VT1, VT2);
4816 SDValue Ops[] = { Op1, Op2, Op3 };
4817 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4821 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4823 const SDValue *Ops, unsigned NumOps) {
4824 SDVTList VTs = getVTList(VT1, VT2);
4825 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4830 EVT VT1, EVT VT2, EVT VT3,
4831 SDValue Op1, SDValue Op2) {
4832 SDVTList VTs = getVTList(VT1, VT2, VT3);
4833 SDValue Ops[] = { Op1, Op2 };
4834 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4838 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4839 EVT VT1, EVT VT2, EVT VT3,
4840 SDValue Op1, SDValue Op2, SDValue Op3) {
4841 SDVTList VTs = getVTList(VT1, VT2, VT3);
4842 SDValue Ops[] = { Op1, Op2, Op3 };
4843 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4847 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4848 EVT VT1, EVT VT2, EVT VT3,
4849 const SDValue *Ops, unsigned NumOps) {
4850 SDVTList VTs = getVTList(VT1, VT2, VT3);
4851 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4855 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4856 EVT VT2, EVT VT3, EVT VT4,
4857 const SDValue *Ops, unsigned NumOps) {
4858 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4859 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4863 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4864 const std::vector<EVT> &ResultTys,
4865 const SDValue *Ops, unsigned NumOps) {
4866 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4867 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4871 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4872 const SDValue *Ops, unsigned NumOps) {
4873 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4878 FoldingSetNodeID ID;
4879 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4882 return cast<MachineSDNode>(E);
4885 // Allocate a new MachineSDNode.
4886 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4888 // Initialize the operands list.
4889 if (NumOps > array_lengthof(N->LocalOperands))
4890 // We're creating a final node that will live unmorphed for the
4891 // remainder of the current SelectionDAG iteration, so we can allocate
4892 // the operands directly out of a pool with no recycling metadata.
4893 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4896 N->InitOperands(N->LocalOperands, Ops, NumOps);
4897 N->OperandsNeedDelete = false;
4900 CSEMap.InsertNode(N, IP);
4902 AllNodes.push_back(N);
4909 /// getTargetExtractSubreg - A convenience function for creating
4910 /// TargetOpcode::EXTRACT_SUBREG nodes.
4912 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4914 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4915 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4916 VT, Operand, SRIdxVal);
4917 return SDValue(Subreg, 0);
4920 /// getTargetInsertSubreg - A convenience function for creating
4921 /// TargetOpcode::INSERT_SUBREG nodes.
4923 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4924 SDValue Operand, SDValue Subreg) {
4925 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4926 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4927 VT, Operand, Subreg, SRIdxVal);
4928 return SDValue(Result, 0);
4931 /// getNodeIfExists - Get the specified node if it's already available, or
4932 /// else return NULL.
4933 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4934 const SDValue *Ops, unsigned NumOps) {
4935 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4936 FoldingSetNodeID ID;
4937 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4939 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4945 /// getDbgValue - Creates a SDDbgValue node.
4948 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4949 DebugLoc DL, unsigned O) {
4950 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4954 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4955 DebugLoc DL, unsigned O) {
4956 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4960 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4961 DebugLoc DL, unsigned O) {
4962 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4967 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4968 /// pointed to by a use iterator is deleted, increment the use iterator
4969 /// so that it doesn't dangle.
4971 /// This class also manages a "downlink" DAGUpdateListener, to forward
4972 /// messages to ReplaceAllUsesWith's callers.
4974 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4975 SelectionDAG::DAGUpdateListener *DownLink;
4976 SDNode::use_iterator &UI;
4977 SDNode::use_iterator &UE;
4979 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4980 // Increment the iterator as needed.
4981 while (UI != UE && N == *UI)
4984 // Then forward the message.
4985 if (DownLink) DownLink->NodeDeleted(N, E);
4988 virtual void NodeUpdated(SDNode *N) {
4989 // Just forward the message.
4990 if (DownLink) DownLink->NodeUpdated(N);
4994 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4995 SDNode::use_iterator &ui,
4996 SDNode::use_iterator &ue)
4997 : DownLink(dl), UI(ui), UE(ue) {}
5002 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5003 /// This can cause recursive merging of nodes in the DAG.
5005 /// This version assumes From has a single result value.
5007 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5008 DAGUpdateListener *UpdateListener) {
5009 SDNode *From = FromN.getNode();
5010 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5011 "Cannot replace with this method!");
5012 assert(From != To.getNode() && "Cannot replace uses of with self");
5014 // Iterate over all the existing uses of From. New uses will be added
5015 // to the beginning of the use list, which we avoid visiting.
5016 // This specifically avoids visiting uses of From that arise while the
5017 // replacement is happening, because any such uses would be the result
5018 // of CSE: If an existing node looks like From after one of its operands
5019 // is replaced by To, we don't want to replace of all its users with To
5020 // too. See PR3018 for more info.
5021 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5022 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5026 // This node is about to morph, remove its old self from the CSE maps.
5027 RemoveNodeFromCSEMaps(User);
5029 // A user can appear in a use list multiple times, and when this
5030 // happens the uses are usually next to each other in the list.
5031 // To help reduce the number of CSE recomputations, process all
5032 // the uses of this user that we can find this way.
5034 SDUse &Use = UI.getUse();
5037 } while (UI != UE && *UI == User);
5039 // Now that we have modified User, add it back to the CSE maps. If it
5040 // already exists there, recursively merge the results together.
5041 AddModifiedNodeToCSEMaps(User, &Listener);
5045 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5046 /// This can cause recursive merging of nodes in the DAG.
5048 /// This version assumes that for each value of From, there is a
5049 /// corresponding value in To in the same position with the same type.
5051 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5052 DAGUpdateListener *UpdateListener) {
5054 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5055 assert((!From->hasAnyUseOfValue(i) ||
5056 From->getValueType(i) == To->getValueType(i)) &&
5057 "Cannot use this version of ReplaceAllUsesWith!");
5060 // Handle the trivial case.
5064 // Iterate over just the existing users of From. See the comments in
5065 // the ReplaceAllUsesWith above.
5066 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5067 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5071 // This node is about to morph, remove its old self from the CSE maps.
5072 RemoveNodeFromCSEMaps(User);
5074 // A user can appear in a use list multiple times, and when this
5075 // happens the uses are usually next to each other in the list.
5076 // To help reduce the number of CSE recomputations, process all
5077 // the uses of this user that we can find this way.
5079 SDUse &Use = UI.getUse();
5082 } while (UI != UE && *UI == User);
5084 // Now that we have modified User, add it back to the CSE maps. If it
5085 // already exists there, recursively merge the results together.
5086 AddModifiedNodeToCSEMaps(User, &Listener);
5090 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5091 /// This can cause recursive merging of nodes in the DAG.
5093 /// This version can replace From with any result values. To must match the
5094 /// number and types of values returned by From.
5095 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5097 DAGUpdateListener *UpdateListener) {
5098 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5099 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5101 // Iterate over just the existing users of From. See the comments in
5102 // the ReplaceAllUsesWith above.
5103 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5104 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5108 // This node is about to morph, remove its old self from the CSE maps.
5109 RemoveNodeFromCSEMaps(User);
5111 // A user can appear in a use list multiple times, and when this
5112 // happens the uses are usually next to each other in the list.
5113 // To help reduce the number of CSE recomputations, process all
5114 // the uses of this user that we can find this way.
5116 SDUse &Use = UI.getUse();
5117 const SDValue &ToOp = To[Use.getResNo()];
5120 } while (UI != UE && *UI == User);
5122 // Now that we have modified User, add it back to the CSE maps. If it
5123 // already exists there, recursively merge the results together.
5124 AddModifiedNodeToCSEMaps(User, &Listener);
5128 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5129 /// uses of other values produced by From.getNode() alone. The Deleted
5130 /// vector is handled the same way as for ReplaceAllUsesWith.
5131 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5132 DAGUpdateListener *UpdateListener){
5133 // Handle the really simple, really trivial case efficiently.
5134 if (From == To) return;
5136 // Handle the simple, trivial, case efficiently.
5137 if (From.getNode()->getNumValues() == 1) {
5138 ReplaceAllUsesWith(From, To, UpdateListener);
5142 // Iterate over just the existing users of From. See the comments in
5143 // the ReplaceAllUsesWith above.
5144 SDNode::use_iterator UI = From.getNode()->use_begin(),
5145 UE = From.getNode()->use_end();
5146 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5149 bool UserRemovedFromCSEMaps = false;
5151 // A user can appear in a use list multiple times, and when this
5152 // happens the uses are usually next to each other in the list.
5153 // To help reduce the number of CSE recomputations, process all
5154 // the uses of this user that we can find this way.
5156 SDUse &Use = UI.getUse();
5158 // Skip uses of different values from the same node.
5159 if (Use.getResNo() != From.getResNo()) {
5164 // If this node hasn't been modified yet, it's still in the CSE maps,
5165 // so remove its old self from the CSE maps.
5166 if (!UserRemovedFromCSEMaps) {
5167 RemoveNodeFromCSEMaps(User);
5168 UserRemovedFromCSEMaps = true;
5173 } while (UI != UE && *UI == User);
5175 // We are iterating over all uses of the From node, so if a use
5176 // doesn't use the specific value, no changes are made.
5177 if (!UserRemovedFromCSEMaps)
5180 // Now that we have modified User, add it back to the CSE maps. If it
5181 // already exists there, recursively merge the results together.
5182 AddModifiedNodeToCSEMaps(User, &Listener);
5187 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5188 /// to record information about a use.
5195 /// operator< - Sort Memos by User.
5196 bool operator<(const UseMemo &L, const UseMemo &R) {
5197 return (intptr_t)L.User < (intptr_t)R.User;
5201 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5202 /// uses of other values produced by From.getNode() alone. The same value
5203 /// may appear in both the From and To list. The Deleted vector is
5204 /// handled the same way as for ReplaceAllUsesWith.
5205 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5208 DAGUpdateListener *UpdateListener){
5209 // Handle the simple, trivial case efficiently.
5211 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5213 // Read up all the uses and make records of them. This helps
5214 // processing new uses that are introduced during the
5215 // replacement process.
5216 SmallVector<UseMemo, 4> Uses;
5217 for (unsigned i = 0; i != Num; ++i) {
5218 unsigned FromResNo = From[i].getResNo();
5219 SDNode *FromNode = From[i].getNode();
5220 for (SDNode::use_iterator UI = FromNode->use_begin(),
5221 E = FromNode->use_end(); UI != E; ++UI) {
5222 SDUse &Use = UI.getUse();
5223 if (Use.getResNo() == FromResNo) {
5224 UseMemo Memo = { *UI, i, &Use };
5225 Uses.push_back(Memo);
5230 // Sort the uses, so that all the uses from a given User are together.
5231 std::sort(Uses.begin(), Uses.end());
5233 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5234 UseIndex != UseIndexEnd; ) {
5235 // We know that this user uses some value of From. If it is the right
5236 // value, update it.
5237 SDNode *User = Uses[UseIndex].User;
5239 // This node is about to morph, remove its old self from the CSE maps.
5240 RemoveNodeFromCSEMaps(User);
5242 // The Uses array is sorted, so all the uses for a given User
5243 // are next to each other in the list.
5244 // To help reduce the number of CSE recomputations, process all
5245 // the uses of this user that we can find this way.
5247 unsigned i = Uses[UseIndex].Index;
5248 SDUse &Use = *Uses[UseIndex].Use;
5252 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5254 // Now that we have modified User, add it back to the CSE maps. If it
5255 // already exists there, recursively merge the results together.
5256 AddModifiedNodeToCSEMaps(User, UpdateListener);
5260 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5261 /// based on their topological order. It returns the maximum id and a vector
5262 /// of the SDNodes* in assigned order by reference.
5263 unsigned SelectionDAG::AssignTopologicalOrder() {
5265 unsigned DAGSize = 0;
5267 // SortedPos tracks the progress of the algorithm. Nodes before it are
5268 // sorted, nodes after it are unsorted. When the algorithm completes
5269 // it is at the end of the list.
5270 allnodes_iterator SortedPos = allnodes_begin();
5272 // Visit all the nodes. Move nodes with no operands to the front of
5273 // the list immediately. Annotate nodes that do have operands with their
5274 // operand count. Before we do this, the Node Id fields of the nodes
5275 // may contain arbitrary values. After, the Node Id fields for nodes
5276 // before SortedPos will contain the topological sort index, and the
5277 // Node Id fields for nodes At SortedPos and after will contain the
5278 // count of outstanding operands.
5279 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5282 unsigned Degree = N->getNumOperands();
5284 // A node with no uses, add it to the result array immediately.
5285 N->setNodeId(DAGSize++);
5286 allnodes_iterator Q = N;
5288 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5289 assert(SortedPos != AllNodes.end() && "Overran node list");
5292 // Temporarily use the Node Id as scratch space for the degree count.
5293 N->setNodeId(Degree);
5297 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5298 // such that by the time the end is reached all nodes will be sorted.
5299 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5302 // N is in sorted position, so all its uses have one less operand
5303 // that needs to be sorted.
5304 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5307 unsigned Degree = P->getNodeId();
5308 assert(Degree != 0 && "Invalid node degree");
5311 // All of P's operands are sorted, so P may sorted now.
5312 P->setNodeId(DAGSize++);
5314 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5315 assert(SortedPos != AllNodes.end() && "Overran node list");
5318 // Update P's outstanding operand count.
5319 P->setNodeId(Degree);
5322 if (I == SortedPos) {
5325 dbgs() << "Overran sorted position:\n";
5328 llvm_unreachable(0);
5332 assert(SortedPos == AllNodes.end() &&
5333 "Topological sort incomplete!");
5334 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5335 "First node in topological sort is not the entry token!");
5336 assert(AllNodes.front().getNodeId() == 0 &&
5337 "First node in topological sort has non-zero id!");
5338 assert(AllNodes.front().getNumOperands() == 0 &&
5339 "First node in topological sort has operands!");
5340 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5341 "Last node in topologic sort has unexpected id!");
5342 assert(AllNodes.back().use_empty() &&
5343 "Last node in topologic sort has users!");
5344 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5348 /// AssignOrdering - Assign an order to the SDNode.
5349 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5350 assert(SD && "Trying to assign an order to a null node!");
5351 Ordering->add(SD, Order);
5354 /// GetOrdering - Get the order for the SDNode.
5355 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5356 assert(SD && "Trying to get the order of a null node!");
5357 return Ordering->getOrder(SD);
5360 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5361 /// value is produced by SD.
5362 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5363 DbgInfo->add(DB, SD, isParameter);
5365 SD->setHasDebugValue(true);
5368 //===----------------------------------------------------------------------===//
5370 //===----------------------------------------------------------------------===//
5372 HandleSDNode::~HandleSDNode() {
5376 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5377 EVT VT, int64_t o, unsigned char TF)
5378 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5382 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5383 MachineMemOperand *mmo)
5384 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5385 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5386 MMO->isNonTemporal());
5387 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5388 assert(isNonTemporal() == MMO->isNonTemporal() &&
5389 "Non-temporal encoding error!");
5390 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5393 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5394 const SDValue *Ops, unsigned NumOps, EVT memvt,
5395 MachineMemOperand *mmo)
5396 : SDNode(Opc, dl, VTs, Ops, NumOps),
5397 MemoryVT(memvt), MMO(mmo) {
5398 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5399 MMO->isNonTemporal());
5400 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5401 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5404 /// Profile - Gather unique data for the node.
5406 void SDNode::Profile(FoldingSetNodeID &ID) const {
5407 AddNodeIDNode(ID, this);
5412 std::vector<EVT> VTs;
5415 VTs.reserve(MVT::LAST_VALUETYPE);
5416 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5417 VTs.push_back(MVT((MVT::SimpleValueType)i));
5422 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5423 static ManagedStatic<EVTArray> SimpleVTArray;
5424 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5426 /// getValueTypeList - Return a pointer to the specified value type.
5428 const EVT *SDNode::getValueTypeList(EVT VT) {
5429 if (VT.isExtended()) {
5430 sys::SmartScopedLock<true> Lock(*VTMutex);
5431 return &(*EVTs->insert(VT).first);
5433 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE &&
5434 "Value type out of range!");
5435 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5439 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5440 /// indicated value. This method ignores uses of other values defined by this
5442 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5443 assert(Value < getNumValues() && "Bad value!");
5445 // TODO: Only iterate over uses of a given value of the node
5446 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5447 if (UI.getUse().getResNo() == Value) {
5454 // Found exactly the right number of uses?
5459 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5460 /// value. This method ignores uses of other values defined by this operation.
5461 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5462 assert(Value < getNumValues() && "Bad value!");
5464 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5465 if (UI.getUse().getResNo() == Value)
5472 /// isOnlyUserOf - Return true if this node is the only use of N.
5474 bool SDNode::isOnlyUserOf(SDNode *N) const {
5476 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5487 /// isOperand - Return true if this node is an operand of N.
5489 bool SDValue::isOperandOf(SDNode *N) const {
5490 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5491 if (*this == N->getOperand(i))
5496 bool SDNode::isOperandOf(SDNode *N) const {
5497 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5498 if (this == N->OperandList[i].getNode())
5503 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5504 /// be a chain) reaches the specified operand without crossing any
5505 /// side-effecting instructions. In practice, this looks through token
5506 /// factors and non-volatile loads. In order to remain efficient, this only
5507 /// looks a couple of nodes in, it does not do an exhaustive search.
5508 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5509 unsigned Depth) const {
5510 if (*this == Dest) return true;
5512 // Don't search too deeply, we just want to be able to see through
5513 // TokenFactor's etc.
5514 if (Depth == 0) return false;
5516 // If this is a token factor, all inputs to the TF happen in parallel. If any
5517 // of the operands of the TF reach dest, then we can do the xform.
5518 if (getOpcode() == ISD::TokenFactor) {
5519 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5520 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5525 // Loads don't have side effects, look through them.
5526 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5527 if (!Ld->isVolatile())
5528 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5533 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5534 /// is either an operand of N or it can be reached by traversing up the operands.
5535 /// NOTE: this is an expensive method. Use it carefully.
5536 bool SDNode::isPredecessorOf(SDNode *N) const {
5537 SmallPtrSet<SDNode *, 32> Visited;
5538 SmallVector<SDNode *, 16> Worklist;
5539 Worklist.push_back(N);
5542 N = Worklist.pop_back_val();
5543 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5544 SDNode *Op = N->getOperand(i).getNode();
5547 if (Visited.insert(Op))
5548 Worklist.push_back(Op);
5550 } while (!Worklist.empty());
5555 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5556 assert(Num < NumOperands && "Invalid child # of SDNode!");
5557 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5560 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5561 switch (getOpcode()) {
5563 if (getOpcode() < ISD::BUILTIN_OP_END)
5564 return "<<Unknown DAG Node>>";
5565 if (isMachineOpcode()) {
5567 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5568 if (getMachineOpcode() < TII->getNumOpcodes())
5569 return TII->get(getMachineOpcode()).getName();
5570 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5573 const TargetLowering &TLI = G->getTargetLoweringInfo();
5574 const char *Name = TLI.getTargetNodeName(getOpcode());
5575 if (Name) return Name;
5576 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5578 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5581 case ISD::DELETED_NODE:
5582 return "<<Deleted Node!>>";
5584 case ISD::PREFETCH: return "Prefetch";
5585 case ISD::MEMBARRIER: return "MemBarrier";
5586 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5587 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5588 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5589 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5590 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5591 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5592 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5593 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5594 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5595 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5596 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5597 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5598 case ISD::PCMARKER: return "PCMarker";
5599 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5600 case ISD::SRCVALUE: return "SrcValue";
5601 case ISD::MDNODE_SDNODE: return "MDNode";
5602 case ISD::EntryToken: return "EntryToken";
5603 case ISD::TokenFactor: return "TokenFactor";
5604 case ISD::AssertSext: return "AssertSext";
5605 case ISD::AssertZext: return "AssertZext";
5607 case ISD::BasicBlock: return "BasicBlock";
5608 case ISD::VALUETYPE: return "ValueType";
5609 case ISD::Register: return "Register";
5611 case ISD::Constant: return "Constant";
5612 case ISD::ConstantFP: return "ConstantFP";
5613 case ISD::GlobalAddress: return "GlobalAddress";
5614 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5615 case ISD::FrameIndex: return "FrameIndex";
5616 case ISD::JumpTable: return "JumpTable";
5617 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5618 case ISD::RETURNADDR: return "RETURNADDR";
5619 case ISD::FRAMEADDR: return "FRAMEADDR";
5620 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5621 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5622 case ISD::LSDAADDR: return "LSDAADDR";
5623 case ISD::EHSELECTION: return "EHSELECTION";
5624 case ISD::EH_RETURN: return "EH_RETURN";
5625 case ISD::ConstantPool: return "ConstantPool";
5626 case ISD::ExternalSymbol: return "ExternalSymbol";
5627 case ISD::BlockAddress: return "BlockAddress";
5628 case ISD::INTRINSIC_WO_CHAIN:
5629 case ISD::INTRINSIC_VOID:
5630 case ISD::INTRINSIC_W_CHAIN: {
5631 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5632 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5633 if (IID < Intrinsic::num_intrinsics)
5634 return Intrinsic::getName((Intrinsic::ID)IID);
5635 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5636 return TII->getName(IID);
5637 llvm_unreachable("Invalid intrinsic ID");
5640 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5641 case ISD::TargetConstant: return "TargetConstant";
5642 case ISD::TargetConstantFP:return "TargetConstantFP";
5643 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5644 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5645 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5646 case ISD::TargetJumpTable: return "TargetJumpTable";
5647 case ISD::TargetConstantPool: return "TargetConstantPool";
5648 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5649 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5651 case ISD::CopyToReg: return "CopyToReg";
5652 case ISD::CopyFromReg: return "CopyFromReg";
5653 case ISD::UNDEF: return "undef";
5654 case ISD::MERGE_VALUES: return "merge_values";
5655 case ISD::INLINEASM: return "inlineasm";
5656 case ISD::EH_LABEL: return "eh_label";
5657 case ISD::HANDLENODE: return "handlenode";
5660 case ISD::FABS: return "fabs";
5661 case ISD::FNEG: return "fneg";
5662 case ISD::FSQRT: return "fsqrt";
5663 case ISD::FSIN: return "fsin";
5664 case ISD::FCOS: return "fcos";
5665 case ISD::FPOWI: return "fpowi";
5666 case ISD::FPOW: return "fpow";
5667 case ISD::FTRUNC: return "ftrunc";
5668 case ISD::FFLOOR: return "ffloor";
5669 case ISD::FCEIL: return "fceil";
5670 case ISD::FRINT: return "frint";
5671 case ISD::FNEARBYINT: return "fnearbyint";
5674 case ISD::ADD: return "add";
5675 case ISD::SUB: return "sub";
5676 case ISD::MUL: return "mul";
5677 case ISD::MULHU: return "mulhu";
5678 case ISD::MULHS: return "mulhs";
5679 case ISD::SDIV: return "sdiv";
5680 case ISD::UDIV: return "udiv";
5681 case ISD::SREM: return "srem";
5682 case ISD::UREM: return "urem";
5683 case ISD::SMUL_LOHI: return "smul_lohi";
5684 case ISD::UMUL_LOHI: return "umul_lohi";
5685 case ISD::SDIVREM: return "sdivrem";
5686 case ISD::UDIVREM: return "udivrem";
5687 case ISD::AND: return "and";
5688 case ISD::OR: return "or";
5689 case ISD::XOR: return "xor";
5690 case ISD::SHL: return "shl";
5691 case ISD::SRA: return "sra";
5692 case ISD::SRL: return "srl";
5693 case ISD::ROTL: return "rotl";
5694 case ISD::ROTR: return "rotr";
5695 case ISD::FADD: return "fadd";
5696 case ISD::FSUB: return "fsub";
5697 case ISD::FMUL: return "fmul";
5698 case ISD::FDIV: return "fdiv";
5699 case ISD::FREM: return "frem";
5700 case ISD::FCOPYSIGN: return "fcopysign";
5701 case ISD::FGETSIGN: return "fgetsign";
5703 case ISD::SETCC: return "setcc";
5704 case ISD::VSETCC: return "vsetcc";
5705 case ISD::SELECT: return "select";
5706 case ISD::SELECT_CC: return "select_cc";
5707 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5708 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5709 case ISD::CONCAT_VECTORS: return "concat_vectors";
5710 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5711 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5712 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5713 case ISD::CARRY_FALSE: return "carry_false";
5714 case ISD::ADDC: return "addc";
5715 case ISD::ADDE: return "adde";
5716 case ISD::SADDO: return "saddo";
5717 case ISD::UADDO: return "uaddo";
5718 case ISD::SSUBO: return "ssubo";
5719 case ISD::USUBO: return "usubo";
5720 case ISD::SMULO: return "smulo";
5721 case ISD::UMULO: return "umulo";
5722 case ISD::SUBC: return "subc";
5723 case ISD::SUBE: return "sube";
5724 case ISD::SHL_PARTS: return "shl_parts";
5725 case ISD::SRA_PARTS: return "sra_parts";
5726 case ISD::SRL_PARTS: return "srl_parts";
5728 // Conversion operators.
5729 case ISD::SIGN_EXTEND: return "sign_extend";
5730 case ISD::ZERO_EXTEND: return "zero_extend";
5731 case ISD::ANY_EXTEND: return "any_extend";
5732 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5733 case ISD::TRUNCATE: return "truncate";
5734 case ISD::FP_ROUND: return "fp_round";
5735 case ISD::FLT_ROUNDS_: return "flt_rounds";
5736 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5737 case ISD::FP_EXTEND: return "fp_extend";
5739 case ISD::SINT_TO_FP: return "sint_to_fp";
5740 case ISD::UINT_TO_FP: return "uint_to_fp";
5741 case ISD::FP_TO_SINT: return "fp_to_sint";
5742 case ISD::FP_TO_UINT: return "fp_to_uint";
5743 case ISD::BIT_CONVERT: return "bit_convert";
5744 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5745 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5747 case ISD::CONVERT_RNDSAT: {
5748 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5749 default: llvm_unreachable("Unknown cvt code!");
5750 case ISD::CVT_FF: return "cvt_ff";
5751 case ISD::CVT_FS: return "cvt_fs";
5752 case ISD::CVT_FU: return "cvt_fu";
5753 case ISD::CVT_SF: return "cvt_sf";
5754 case ISD::CVT_UF: return "cvt_uf";
5755 case ISD::CVT_SS: return "cvt_ss";
5756 case ISD::CVT_SU: return "cvt_su";
5757 case ISD::CVT_US: return "cvt_us";
5758 case ISD::CVT_UU: return "cvt_uu";
5762 // Control flow instructions
5763 case ISD::BR: return "br";
5764 case ISD::BRIND: return "brind";
5765 case ISD::BR_JT: return "br_jt";
5766 case ISD::BRCOND: return "brcond";
5767 case ISD::BR_CC: return "br_cc";
5768 case ISD::CALLSEQ_START: return "callseq_start";
5769 case ISD::CALLSEQ_END: return "callseq_end";
5772 case ISD::LOAD: return "load";
5773 case ISD::STORE: return "store";
5774 case ISD::VAARG: return "vaarg";
5775 case ISD::VACOPY: return "vacopy";
5776 case ISD::VAEND: return "vaend";
5777 case ISD::VASTART: return "vastart";
5778 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5779 case ISD::EXTRACT_ELEMENT: return "extract_element";
5780 case ISD::BUILD_PAIR: return "build_pair";
5781 case ISD::STACKSAVE: return "stacksave";
5782 case ISD::STACKRESTORE: return "stackrestore";
5783 case ISD::TRAP: return "trap";
5786 case ISD::BSWAP: return "bswap";
5787 case ISD::CTPOP: return "ctpop";
5788 case ISD::CTTZ: return "cttz";
5789 case ISD::CTLZ: return "ctlz";
5792 case ISD::TRAMPOLINE: return "trampoline";
5795 switch (cast<CondCodeSDNode>(this)->get()) {
5796 default: llvm_unreachable("Unknown setcc condition!");
5797 case ISD::SETOEQ: return "setoeq";
5798 case ISD::SETOGT: return "setogt";
5799 case ISD::SETOGE: return "setoge";
5800 case ISD::SETOLT: return "setolt";
5801 case ISD::SETOLE: return "setole";
5802 case ISD::SETONE: return "setone";
5804 case ISD::SETO: return "seto";
5805 case ISD::SETUO: return "setuo";
5806 case ISD::SETUEQ: return "setue";
5807 case ISD::SETUGT: return "setugt";
5808 case ISD::SETUGE: return "setuge";
5809 case ISD::SETULT: return "setult";
5810 case ISD::SETULE: return "setule";
5811 case ISD::SETUNE: return "setune";
5813 case ISD::SETEQ: return "seteq";
5814 case ISD::SETGT: return "setgt";
5815 case ISD::SETGE: return "setge";
5816 case ISD::SETLT: return "setlt";
5817 case ISD::SETLE: return "setle";
5818 case ISD::SETNE: return "setne";
5823 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5832 return "<post-inc>";
5834 return "<post-dec>";
5838 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5839 std::string S = "< ";
5853 if (getByValAlign())
5854 S += "byval-align:" + utostr(getByValAlign()) + " ";
5856 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5858 S += "byval-size:" + utostr(getByValSize()) + " ";
5862 void SDNode::dump() const { dump(0); }
5863 void SDNode::dump(const SelectionDAG *G) const {
5867 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5868 OS << (void*)this << ": ";
5870 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5872 if (getValueType(i) == MVT::Other)
5875 OS << getValueType(i).getEVTString();
5877 OS << " = " << getOperationName(G);
5880 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5881 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5882 if (!MN->memoperands_empty()) {
5885 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5886 e = MN->memoperands_end(); i != e; ++i) {
5893 } else if (const ShuffleVectorSDNode *SVN =
5894 dyn_cast<ShuffleVectorSDNode>(this)) {
5896 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5897 int Idx = SVN->getMaskElt(i);
5905 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5906 OS << '<' << CSDN->getAPIntValue() << '>';
5907 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5908 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5909 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5910 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5911 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5914 CSDN->getValueAPF().bitcastToAPInt().dump();
5917 } else if (const GlobalAddressSDNode *GADN =
5918 dyn_cast<GlobalAddressSDNode>(this)) {
5919 int64_t offset = GADN->getOffset();
5921 WriteAsOperand(OS, GADN->getGlobal());
5924 OS << " + " << offset;
5926 OS << " " << offset;
5927 if (unsigned int TF = GADN->getTargetFlags())
5928 OS << " [TF=" << TF << ']';
5929 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5930 OS << "<" << FIDN->getIndex() << ">";
5931 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5932 OS << "<" << JTDN->getIndex() << ">";
5933 if (unsigned int TF = JTDN->getTargetFlags())
5934 OS << " [TF=" << TF << ']';
5935 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5936 int offset = CP->getOffset();
5937 if (CP->isMachineConstantPoolEntry())
5938 OS << "<" << *CP->getMachineCPVal() << ">";
5940 OS << "<" << *CP->getConstVal() << ">";
5942 OS << " + " << offset;
5944 OS << " " << offset;
5945 if (unsigned int TF = CP->getTargetFlags())
5946 OS << " [TF=" << TF << ']';
5947 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5949 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5951 OS << LBB->getName() << " ";
5952 OS << (const void*)BBDN->getBasicBlock() << ">";
5953 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5954 if (G && R->getReg() &&
5955 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5956 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5958 OS << " %reg" << R->getReg();
5960 } else if (const ExternalSymbolSDNode *ES =
5961 dyn_cast<ExternalSymbolSDNode>(this)) {
5962 OS << "'" << ES->getSymbol() << "'";
5963 if (unsigned int TF = ES->getTargetFlags())
5964 OS << " [TF=" << TF << ']';
5965 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5967 OS << "<" << M->getValue() << ">";
5970 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
5972 OS << "<" << MD->getMD() << ">";
5975 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5976 OS << ":" << N->getVT().getEVTString();
5978 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5979 OS << "<" << *LD->getMemOperand();
5982 switch (LD->getExtensionType()) {
5983 default: doExt = false; break;
5984 case ISD::EXTLOAD: OS << ", anyext"; break;
5985 case ISD::SEXTLOAD: OS << ", sext"; break;
5986 case ISD::ZEXTLOAD: OS << ", zext"; break;
5989 OS << " from " << LD->getMemoryVT().getEVTString();
5991 const char *AM = getIndexedModeName(LD->getAddressingMode());
5996 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5997 OS << "<" << *ST->getMemOperand();
5999 if (ST->isTruncatingStore())
6000 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6002 const char *AM = getIndexedModeName(ST->getAddressingMode());
6007 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6008 OS << "<" << *M->getMemOperand() << ">";
6009 } else if (const BlockAddressSDNode *BA =
6010 dyn_cast<BlockAddressSDNode>(this)) {
6012 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6014 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6016 if (unsigned int TF = BA->getTargetFlags())
6017 OS << " [TF=" << TF << ']';
6021 if (unsigned Order = G->GetOrdering(this))
6022 OS << " [ORD=" << Order << ']';
6024 if (getNodeId() != -1)
6025 OS << " [ID=" << getNodeId() << ']';
6027 DebugLoc dl = getDebugLoc();
6028 if (G && !dl.isUnknown()) {
6030 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6032 // Omit the directory, since it's usually long and uninteresting.
6034 OS << Scope.getFilename();
6037 OS << ':' << dl.getLine();
6038 if (dl.getCol() != 0)
6039 OS << ':' << dl.getCol();
6043 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6045 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6046 if (i) OS << ", "; else OS << " ";
6047 OS << (void*)getOperand(i).getNode();
6048 if (unsigned RN = getOperand(i).getResNo())
6051 print_details(OS, G);
6054 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6055 const SelectionDAG *G, unsigned depth,
6068 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6070 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6074 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6075 unsigned depth) const {
6076 printrWithDepthHelper(OS, this, G, depth, 0);
6079 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6080 // Don't print impossibly deep things.
6081 printrWithDepth(OS, G, 100);
6084 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6085 printrWithDepth(dbgs(), G, depth);
6088 void SDNode::dumprFull(const SelectionDAG *G) const {
6089 // Don't print impossibly deep things.
6090 dumprWithDepth(G, 100);
6093 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6094 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6095 if (N->getOperand(i).getNode()->hasOneUse())
6096 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6098 dbgs() << "\n" << std::string(indent+2, ' ')
6099 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6103 dbgs().indent(indent);
6107 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6108 assert(N->getNumValues() == 1 &&
6109 "Can't unroll a vector with multiple results!");
6111 EVT VT = N->getValueType(0);
6112 unsigned NE = VT.getVectorNumElements();
6113 EVT EltVT = VT.getVectorElementType();
6114 DebugLoc dl = N->getDebugLoc();
6116 SmallVector<SDValue, 8> Scalars;
6117 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6119 // If ResNE is 0, fully unroll the vector op.
6122 else if (NE > ResNE)
6126 for (i= 0; i != NE; ++i) {
6127 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6128 SDValue Operand = N->getOperand(j);
6129 EVT OperandVT = Operand.getValueType();
6130 if (OperandVT.isVector()) {
6131 // A vector operand; extract a single element.
6132 EVT OperandEltVT = OperandVT.getVectorElementType();
6133 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6136 getConstant(i, MVT::i32));
6138 // A scalar operand; just use it as is.
6139 Operands[j] = Operand;
6143 switch (N->getOpcode()) {
6145 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6146 &Operands[0], Operands.size()));
6153 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6154 getShiftAmountOperand(Operands[1])));
6156 case ISD::SIGN_EXTEND_INREG:
6157 case ISD::FP_ROUND_INREG: {
6158 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6159 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6161 getValueType(ExtVT)));
6166 for (; i < ResNE; ++i)
6167 Scalars.push_back(getUNDEF(EltVT));
6169 return getNode(ISD::BUILD_VECTOR, dl,
6170 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6171 &Scalars[0], Scalars.size());
6175 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6176 /// location that is 'Dist' units away from the location that the 'Base' load
6177 /// is loading from.
6178 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6179 unsigned Bytes, int Dist) const {
6180 if (LD->getChain() != Base->getChain())
6182 EVT VT = LD->getValueType(0);
6183 if (VT.getSizeInBits() / 8 != Bytes)
6186 SDValue Loc = LD->getOperand(1);
6187 SDValue BaseLoc = Base->getOperand(1);
6188 if (Loc.getOpcode() == ISD::FrameIndex) {
6189 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6191 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6192 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6193 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6194 int FS = MFI->getObjectSize(FI);
6195 int BFS = MFI->getObjectSize(BFI);
6196 if (FS != BFS || FS != (int)Bytes) return false;
6197 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6199 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6200 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6201 if (V && (V->getSExtValue() == Dist*Bytes))
6205 const GlobalValue *GV1 = NULL;
6206 const GlobalValue *GV2 = NULL;
6207 int64_t Offset1 = 0;
6208 int64_t Offset2 = 0;
6209 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6210 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6211 if (isGA1 && isGA2 && GV1 == GV2)
6212 return Offset1 == (Offset2 + Dist*Bytes);
6217 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6218 /// it cannot be inferred.
6219 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6220 // If this is a GlobalAddress + cst, return the alignment.
6221 const GlobalValue *GV;
6222 int64_t GVOffset = 0;
6223 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6224 // If GV has specified alignment, then use it. Otherwise, use the preferred
6226 unsigned Align = GV->getAlignment();
6228 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6229 if (GVar->hasInitializer()) {
6230 const TargetData *TD = TLI.getTargetData();
6231 Align = TD->getPreferredAlignment(GVar);
6235 return MinAlign(Align, GVOffset);
6238 // If this is a direct reference to a stack slot, use information about the
6239 // stack slot's alignment.
6240 int FrameIdx = 1 << 31;
6241 int64_t FrameOffset = 0;
6242 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6243 FrameIdx = FI->getIndex();
6244 } else if (Ptr.getOpcode() == ISD::ADD &&
6245 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6246 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6247 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6248 FrameOffset = Ptr.getConstantOperandVal(1);
6251 if (FrameIdx != (1 << 31)) {
6252 // FIXME: Handle FI+CST.
6253 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6254 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6256 if (MFI.isFixedObjectIndex(FrameIdx)) {
6257 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6259 // The alignment of the frame index can be determined from its offset from
6260 // the incoming frame position. If the frame object is at offset 32 and
6261 // the stack is guaranteed to be 16-byte aligned, then we know that the
6262 // object is 16-byte aligned.
6263 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6264 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6266 // Finally, the frame object itself may have a known alignment. Factor
6267 // the alignment + offset into a new alignment. For example, if we know
6268 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6269 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6270 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6271 return std::max(Align, FIInfoAlign);
6279 void SelectionDAG::dump() const {
6280 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6282 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6284 const SDNode *N = I;
6285 if (!N->hasOneUse() && N != getRoot().getNode())
6286 DumpNodes(N, 2, this);
6289 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6294 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6296 print_details(OS, G);
6299 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6300 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6301 const SelectionDAG *G, VisitedSDNodeSet &once) {
6302 if (!once.insert(N)) // If we've been here before, return now.
6305 // Dump the current SDNode, but don't end the line yet.
6306 OS << std::string(indent, ' ');
6309 // Having printed this SDNode, walk the children:
6310 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6311 const SDNode *child = N->getOperand(i).getNode();
6316 if (child->getNumOperands() == 0) {
6317 // This child has no grandchildren; print it inline right here.
6318 child->printr(OS, G);
6320 } else { // Just the address. FIXME: also print the child's opcode.
6322 if (unsigned RN = N->getOperand(i).getResNo())
6329 // Dump children that have grandchildren on their own line(s).
6330 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6331 const SDNode *child = N->getOperand(i).getNode();
6332 DumpNodesr(OS, child, indent+2, G, once);
6336 void SDNode::dumpr() const {
6337 VisitedSDNodeSet once;
6338 DumpNodesr(dbgs(), this, 0, 0, once);
6341 void SDNode::dumpr(const SelectionDAG *G) const {
6342 VisitedSDNodeSet once;
6343 DumpNodesr(dbgs(), this, 0, G, once);
6347 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6348 unsigned GlobalAddressSDNode::getAddressSpace() const {
6349 return getGlobal()->getType()->getAddressSpace();
6353 const Type *ConstantPoolSDNode::getType() const {
6354 if (isMachineConstantPoolEntry())
6355 return Val.MachineCPVal->getType();
6356 return Val.ConstVal->getType();
6359 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6361 unsigned &SplatBitSize,
6363 unsigned MinSplatBits,
6365 EVT VT = getValueType(0);
6366 assert(VT.isVector() && "Expected a vector type");
6367 unsigned sz = VT.getSizeInBits();
6368 if (MinSplatBits > sz)
6371 SplatValue = APInt(sz, 0);
6372 SplatUndef = APInt(sz, 0);
6374 // Get the bits. Bits with undefined values (when the corresponding element
6375 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6376 // in SplatValue. If any of the values are not constant, give up and return
6378 unsigned int nOps = getNumOperands();
6379 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6380 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6382 for (unsigned j = 0; j < nOps; ++j) {
6383 unsigned i = isBigEndian ? nOps-1-j : j;
6384 SDValue OpVal = getOperand(i);
6385 unsigned BitPos = j * EltBitSize;
6387 if (OpVal.getOpcode() == ISD::UNDEF)
6388 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6389 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6390 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6391 zextOrTrunc(sz) << BitPos;
6392 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6393 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6398 // The build_vector is all constants or undefs. Find the smallest element
6399 // size that splats the vector.
6401 HasAnyUndefs = (SplatUndef != 0);
6404 unsigned HalfSize = sz / 2;
6405 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6406 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6407 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6408 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6410 // If the two halves do not match (ignoring undef bits), stop here.
6411 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6412 MinSplatBits > HalfSize)
6415 SplatValue = HighValue | LowValue;
6416 SplatUndef = HighUndef & LowUndef;
6425 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6426 // Find the first non-undef value in the shuffle mask.
6428 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6431 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6433 // Make sure all remaining elements are either undef or the same as the first
6435 for (int Idx = Mask[i]; i != e; ++i)
6436 if (Mask[i] >= 0 && Mask[i] != Idx)
6442 static void checkForCyclesHelper(const SDNode *N,
6443 SmallPtrSet<const SDNode*, 32> &Visited,
6444 SmallPtrSet<const SDNode*, 32> &Checked) {
6445 // If this node has already been checked, don't check it again.
6446 if (Checked.count(N))
6449 // If a node has already been visited on this depth-first walk, reject it as
6451 if (!Visited.insert(N)) {
6452 dbgs() << "Offending node:\n";
6454 errs() << "Detected cycle in SelectionDAG\n";
6458 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6459 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6466 void llvm::checkForCycles(const llvm::SDNode *N) {
6468 assert(N && "Checking nonexistant SDNode");
6469 SmallPtrSet<const SDNode*, 32> visited;
6470 SmallPtrSet<const SDNode*, 32> checked;
6471 checkForCyclesHelper(N, visited, checked);
6475 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6476 checkForCycles(DAG->getRoot().getNode());