1 //===-- SelectionDAGISel.cpp - Implement the SelectionDAGISel class -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAGISel class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "isel"
15 #include "llvm/CodeGen/SelectionDAGISel.h"
16 #include "llvm/CallingConv.h"
17 #include "llvm/Constants.h"
18 #include "llvm/DerivedTypes.h"
19 #include "llvm/Function.h"
20 #include "llvm/GlobalVariable.h"
21 #include "llvm/Instructions.h"
22 #include "llvm/Intrinsics.h"
23 #include "llvm/CodeGen/IntrinsicLowering.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/SelectionDAG.h"
28 #include "llvm/CodeGen/SSARegMap.h"
29 #include "llvm/Target/MRegisterInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetFrameInfo.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetMachine.h"
35 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/Debug.h"
44 GEPISelTest("enable-gep-isel-opt", cl::Hidden,
45 cl::desc("temporary for testing"));
49 ViewDAGs("view-isel-dags", cl::Hidden,
50 cl::desc("Pop up a window to show isel dags as they are selected"));
52 static const bool ViewDAGs = 0;
56 //===--------------------------------------------------------------------===//
57 /// FunctionLoweringInfo - This contains information that is global to a
58 /// function that is used when lowering a region of the function.
59 class FunctionLoweringInfo {
66 FunctionLoweringInfo(TargetLowering &TLI, Function &Fn,MachineFunction &MF);
68 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
69 std::map<const BasicBlock*, MachineBasicBlock *> MBBMap;
71 /// ValueMap - Since we emit code for the function a basic block at a time,
72 /// we must remember which virtual registers hold the values for
73 /// cross-basic-block values.
74 std::map<const Value*, unsigned> ValueMap;
76 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
77 /// the entry block. This allows the allocas to be efficiently referenced
78 /// anywhere in the function.
79 std::map<const AllocaInst*, int> StaticAllocaMap;
81 unsigned MakeReg(MVT::ValueType VT) {
82 return RegMap->createVirtualRegister(TLI.getRegClassFor(VT));
85 unsigned CreateRegForValue(const Value *V) {
86 MVT::ValueType VT = TLI.getValueType(V->getType());
87 // The common case is that we will only create one register for this
88 // value. If we have that case, create and return the virtual register.
89 unsigned NV = TLI.getNumElements(VT);
91 // If we are promoting this value, pick the next largest supported type.
92 return MakeReg(TLI.getTypeToTransformTo(VT));
95 // If this value is represented with multiple target registers, make sure
96 // to create enough consequtive registers of the right (smaller) type.
97 unsigned NT = VT-1; // Find the type to use.
98 while (TLI.getNumElements((MVT::ValueType)NT) != 1)
101 unsigned R = MakeReg((MVT::ValueType)NT);
102 for (unsigned i = 1; i != NV; ++i)
103 MakeReg((MVT::ValueType)NT);
107 unsigned InitializeRegForValue(const Value *V) {
108 unsigned &R = ValueMap[V];
109 assert(R == 0 && "Already initialized this value register!");
110 return R = CreateRegForValue(V);
115 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
116 /// PHI nodes or outside of the basic block that defines it.
117 static bool isUsedOutsideOfDefiningBlock(Instruction *I) {
118 if (isa<PHINode>(I)) return true;
119 BasicBlock *BB = I->getParent();
120 for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E; ++UI)
121 if (cast<Instruction>(*UI)->getParent() != BB || isa<PHINode>(*UI))
126 /// isOnlyUsedInEntryBlock - If the specified argument is only used in the
127 /// entry block, return true.
128 static bool isOnlyUsedInEntryBlock(Argument *A) {
129 BasicBlock *Entry = A->getParent()->begin();
130 for (Value::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E; ++UI)
131 if (cast<Instruction>(*UI)->getParent() != Entry)
132 return false; // Use not in entry block.
136 FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli,
137 Function &fn, MachineFunction &mf)
138 : TLI(tli), Fn(fn), MF(mf), RegMap(MF.getSSARegMap()) {
140 // Create a vreg for each argument register that is not dead and is used
141 // outside of the entry block for the function.
142 for (Function::arg_iterator AI = Fn.arg_begin(), E = Fn.arg_end();
144 if (!isOnlyUsedInEntryBlock(AI))
145 InitializeRegForValue(AI);
147 // Initialize the mapping of values to registers. This is only set up for
148 // instruction values that are used outside of the block that defines
150 Function::iterator BB = Fn.begin(), EB = Fn.end();
151 for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
152 if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
153 if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(AI->getArraySize())) {
154 const Type *Ty = AI->getAllocatedType();
155 uint64_t TySize = TLI.getTargetData().getTypeSize(Ty);
157 std::max((unsigned)TLI.getTargetData().getTypeAlignment(Ty),
160 // If the alignment of the value is smaller than the size of the value,
161 // and if the size of the value is particularly small (<= 8 bytes),
162 // round up to the size of the value for potentially better performance.
164 // FIXME: This could be made better with a preferred alignment hook in
165 // TargetData. It serves primarily to 8-byte align doubles for X86.
166 if (Align < TySize && TySize <= 8) Align = TySize;
167 TySize *= CUI->getValue(); // Get total allocated size.
168 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
169 StaticAllocaMap[AI] =
170 MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
173 for (; BB != EB; ++BB)
174 for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
175 if (!I->use_empty() && isUsedOutsideOfDefiningBlock(I))
176 if (!isa<AllocaInst>(I) ||
177 !StaticAllocaMap.count(cast<AllocaInst>(I)))
178 InitializeRegForValue(I);
180 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
181 // also creates the initial PHI MachineInstrs, though none of the input
182 // operands are populated.
183 for (BB = Fn.begin(), EB = Fn.end(); BB != EB; ++BB) {
184 MachineBasicBlock *MBB = new MachineBasicBlock(BB);
186 MF.getBasicBlockList().push_back(MBB);
188 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
191 for (BasicBlock::iterator I = BB->begin();
192 (PN = dyn_cast<PHINode>(I)); ++I)
193 if (!PN->use_empty()) {
194 unsigned NumElements =
195 TLI.getNumElements(TLI.getValueType(PN->getType()));
196 unsigned PHIReg = ValueMap[PN];
197 assert(PHIReg &&"PHI node does not have an assigned virtual register!");
198 for (unsigned i = 0; i != NumElements; ++i)
199 BuildMI(MBB, TargetInstrInfo::PHI, PN->getNumOperands(), PHIReg+i);
206 //===----------------------------------------------------------------------===//
207 /// SelectionDAGLowering - This is the common target-independent lowering
208 /// implementation that is parameterized by a TargetLowering object.
209 /// Also, targets can overload any lowering method.
212 class SelectionDAGLowering {
213 MachineBasicBlock *CurMBB;
215 std::map<const Value*, SDOperand> NodeMap;
217 /// PendingLoads - Loads are not emitted to the program immediately. We bunch
218 /// them up and then emit token factor nodes when possible. This allows us to
219 /// get simple disambiguation between loads without worrying about alias
221 std::vector<SDOperand> PendingLoads;
224 // TLI - This is information that describes the available target features we
225 // need for lowering. This indicates when operations are unavailable,
226 // implemented with a libcall, etc.
229 const TargetData &TD;
231 /// FuncInfo - Information about the function as a whole.
233 FunctionLoweringInfo &FuncInfo;
235 SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
236 FunctionLoweringInfo &funcinfo)
237 : TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()),
241 /// getRoot - Return the current virtual root of the Selection DAG.
243 SDOperand getRoot() {
244 if (PendingLoads.empty())
245 return DAG.getRoot();
247 if (PendingLoads.size() == 1) {
248 SDOperand Root = PendingLoads[0];
250 PendingLoads.clear();
254 // Otherwise, we have to make a token factor node.
255 SDOperand Root = DAG.getNode(ISD::TokenFactor, MVT::Other, PendingLoads);
256 PendingLoads.clear();
261 void visit(Instruction &I) { visit(I.getOpcode(), I); }
263 void visit(unsigned Opcode, User &I) {
265 default: assert(0 && "Unknown instruction type encountered!");
267 // Build the switch statement using the Instruction.def file.
268 #define HANDLE_INST(NUM, OPCODE, CLASS) \
269 case Instruction::OPCODE:return visit##OPCODE((CLASS&)I);
270 #include "llvm/Instruction.def"
274 void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; }
277 SDOperand getIntPtrConstant(uint64_t Val) {
278 return DAG.getConstant(Val, TLI.getPointerTy());
281 SDOperand getValue(const Value *V) {
282 SDOperand &N = NodeMap[V];
285 const Type *VTy = V->getType();
286 MVT::ValueType VT = TLI.getValueType(VTy);
287 if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(V)))
288 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
289 visit(CE->getOpcode(), *CE);
290 assert(N.Val && "visit didn't populate the ValueMap!");
292 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(C)) {
293 return N = DAG.getGlobalAddress(GV, VT);
294 } else if (isa<ConstantPointerNull>(C)) {
295 return N = DAG.getConstant(0, TLI.getPointerTy());
296 } else if (isa<UndefValue>(C)) {
297 return N = DAG.getNode(ISD::UNDEF, VT);
298 } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
299 return N = DAG.getConstantFP(CFP->getValue(), VT);
300 } else if (const PackedType *PTy = dyn_cast<PackedType>(VTy)) {
301 unsigned NumElements = PTy->getNumElements();
302 MVT::ValueType PVT = TLI.getValueType(PTy->getElementType());
303 MVT::ValueType TVT = MVT::getVectorType(PVT, NumElements);
305 // Now that we know the number and type of the elements, push a
306 // Constant or ConstantFP node onto the ops list for each element of
307 // the packed constant.
308 std::vector<SDOperand> Ops;
309 for (unsigned i = 0; i < NumElements; ++i) {
310 const Constant *CEl = C->getOperand(i);
311 if (MVT::isFloatingPoint(PVT))
312 Ops.push_back(DAG.getConstantFP(cast<ConstantFP>(CEl)->getValue(),
316 DAG.getConstant(cast<ConstantIntegral>(CEl)->getRawValue(),
319 // Handle the case where we have a 1-element vector, in which
320 // case we want to immediately turn it into a scalar constant.
321 if (Ops.size() == 1) {
323 } else if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
324 return N = DAG.getNode(ISD::ConstantVec, TVT, Ops);
326 // If the packed type isn't legal, then create a ConstantVec node with
327 // generic Vector type instead.
328 return N = DAG.getNode(ISD::ConstantVec, MVT::Vector, Ops);
331 // Canonicalize all constant ints to be unsigned.
332 return N = DAG.getConstant(cast<ConstantIntegral>(C)->getRawValue(),VT);
335 if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
336 std::map<const AllocaInst*, int>::iterator SI =
337 FuncInfo.StaticAllocaMap.find(AI);
338 if (SI != FuncInfo.StaticAllocaMap.end())
339 return DAG.getFrameIndex(SI->second, TLI.getPointerTy());
342 std::map<const Value*, unsigned>::const_iterator VMI =
343 FuncInfo.ValueMap.find(V);
344 assert(VMI != FuncInfo.ValueMap.end() && "Value not in map!");
346 unsigned InReg = VMI->second;
348 // If this type is not legal, make it so now.
349 MVT::ValueType DestVT = TLI.getTypeToTransformTo(VT);
351 N = DAG.getCopyFromReg(DAG.getEntryNode(), InReg, DestVT);
353 // Source must be expanded. This input value is actually coming from the
354 // register pair VMI->second and VMI->second+1.
355 N = DAG.getNode(ISD::BUILD_PAIR, VT, N,
356 DAG.getCopyFromReg(DAG.getEntryNode(), InReg+1, DestVT));
358 if (DestVT > VT) { // Promotion case
359 if (MVT::isFloatingPoint(VT))
360 N = DAG.getNode(ISD::FP_ROUND, VT, N);
362 N = DAG.getNode(ISD::TRUNCATE, VT, N);
369 const SDOperand &setValue(const Value *V, SDOperand NewN) {
370 SDOperand &N = NodeMap[V];
371 assert(N.Val == 0 && "Already set a value for this node!");
375 // Terminator instructions.
376 void visitRet(ReturnInst &I);
377 void visitBr(BranchInst &I);
378 void visitUnreachable(UnreachableInst &I) { /* noop */ }
380 // These all get lowered before this pass.
381 void visitSwitch(SwitchInst &I) { assert(0 && "TODO"); }
382 void visitInvoke(InvokeInst &I) { assert(0 && "TODO"); }
383 void visitUnwind(UnwindInst &I) { assert(0 && "TODO"); }
386 void visitBinary(User &I, unsigned IntOp, unsigned FPOp, unsigned VecOp);
387 void visitShift(User &I, unsigned Opcode);
388 void visitAdd(User &I) {
389 visitBinary(I, ISD::ADD, ISD::FADD, ISD::VADD);
391 void visitSub(User &I);
392 void visitMul(User &I) {
393 visitBinary(I, ISD::MUL, ISD::FMUL, ISD::VMUL);
395 void visitDiv(User &I) {
396 const Type *Ty = I.getType();
397 visitBinary(I, Ty->isSigned() ? ISD::SDIV : ISD::UDIV, ISD::FDIV, 0);
399 void visitRem(User &I) {
400 const Type *Ty = I.getType();
401 visitBinary(I, Ty->isSigned() ? ISD::SREM : ISD::UREM, ISD::FREM, 0);
403 void visitAnd(User &I) { visitBinary(I, ISD::AND, 0, 0); }
404 void visitOr (User &I) { visitBinary(I, ISD::OR, 0, 0); }
405 void visitXor(User &I) { visitBinary(I, ISD::XOR, 0, 0); }
406 void visitShl(User &I) { visitShift(I, ISD::SHL); }
407 void visitShr(User &I) {
408 visitShift(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA);
411 void visitSetCC(User &I, ISD::CondCode SignedOpc, ISD::CondCode UnsignedOpc);
412 void visitSetEQ(User &I) { visitSetCC(I, ISD::SETEQ, ISD::SETEQ); }
413 void visitSetNE(User &I) { visitSetCC(I, ISD::SETNE, ISD::SETNE); }
414 void visitSetLE(User &I) { visitSetCC(I, ISD::SETLE, ISD::SETULE); }
415 void visitSetGE(User &I) { visitSetCC(I, ISD::SETGE, ISD::SETUGE); }
416 void visitSetLT(User &I) { visitSetCC(I, ISD::SETLT, ISD::SETULT); }
417 void visitSetGT(User &I) { visitSetCC(I, ISD::SETGT, ISD::SETUGT); }
419 void visitGetElementPtr(User &I);
420 void visitCast(User &I);
421 void visitSelect(User &I);
424 void visitMalloc(MallocInst &I);
425 void visitFree(FreeInst &I);
426 void visitAlloca(AllocaInst &I);
427 void visitLoad(LoadInst &I);
428 void visitStore(StoreInst &I);
429 void visitPHI(PHINode &I) { } // PHI nodes are handled specially.
430 void visitCall(CallInst &I);
431 const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic);
433 void visitVAStart(CallInst &I);
434 void visitVAArg(VAArgInst &I);
435 void visitVAEnd(CallInst &I);
436 void visitVACopy(CallInst &I);
437 void visitFrameReturnAddress(CallInst &I, bool isFrameAddress);
439 void visitMemIntrinsic(CallInst &I, unsigned Op);
441 void visitUserOp1(Instruction &I) {
442 assert(0 && "UserOp1 should not exist at instruction selection time!");
445 void visitUserOp2(Instruction &I) {
446 assert(0 && "UserOp2 should not exist at instruction selection time!");
450 } // end namespace llvm
452 void SelectionDAGLowering::visitRet(ReturnInst &I) {
453 if (I.getNumOperands() == 0) {
454 DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getRoot()));
458 SDOperand Op1 = getValue(I.getOperand(0));
459 MVT::ValueType TmpVT;
461 switch (Op1.getValueType()) {
462 default: assert(0 && "Unknown value type!");
467 // If this is a machine where 32-bits is legal or expanded, promote to
468 // 32-bits, otherwise, promote to 64-bits.
469 if (TLI.getTypeAction(MVT::i32) == TargetLowering::Promote)
470 TmpVT = TLI.getTypeToTransformTo(MVT::i32);
474 // Extend integer types to result type.
475 if (I.getOperand(0)->getType()->isSigned())
476 Op1 = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, Op1);
478 Op1 = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, Op1);
483 break; // No extension needed!
485 // Allow targets to lower this further to meet ABI requirements
486 DAG.setRoot(TLI.LowerReturnTo(getRoot(), Op1, DAG));
489 void SelectionDAGLowering::visitBr(BranchInst &I) {
490 // Update machine-CFG edges.
491 MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
493 // Figure out which block is immediately after the current one.
494 MachineBasicBlock *NextBlock = 0;
495 MachineFunction::iterator BBI = CurMBB;
496 if (++BBI != CurMBB->getParent()->end())
499 if (I.isUnconditional()) {
500 // If this is not a fall-through branch, emit the branch.
501 if (Succ0MBB != NextBlock)
502 DAG.setRoot(DAG.getNode(ISD::BR, MVT::Other, getRoot(),
503 DAG.getBasicBlock(Succ0MBB)));
505 MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
507 SDOperand Cond = getValue(I.getCondition());
508 if (Succ1MBB == NextBlock) {
509 // If the condition is false, fall through. This means we should branch
510 // if the condition is true to Succ #0.
511 DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
512 Cond, DAG.getBasicBlock(Succ0MBB)));
513 } else if (Succ0MBB == NextBlock) {
514 // If the condition is true, fall through. This means we should branch if
515 // the condition is false to Succ #1. Invert the condition first.
516 SDOperand True = DAG.getConstant(1, Cond.getValueType());
517 Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
518 DAG.setRoot(DAG.getNode(ISD::BRCOND, MVT::Other, getRoot(),
519 Cond, DAG.getBasicBlock(Succ1MBB)));
521 std::vector<SDOperand> Ops;
522 Ops.push_back(getRoot());
524 Ops.push_back(DAG.getBasicBlock(Succ0MBB));
525 Ops.push_back(DAG.getBasicBlock(Succ1MBB));
526 DAG.setRoot(DAG.getNode(ISD::BRCONDTWOWAY, MVT::Other, Ops));
531 void SelectionDAGLowering::visitSub(User &I) {
533 if (I.getType()->isFloatingPoint()) {
534 if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
535 if (CFP->isExactlyValue(-0.0)) {
536 SDOperand Op2 = getValue(I.getOperand(1));
537 setValue(&I, DAG.getNode(ISD::FNEG, Op2.getValueType(), Op2));
541 visitBinary(I, ISD::SUB, ISD::FSUB, ISD::VSUB);
544 void SelectionDAGLowering::visitBinary(User &I, unsigned IntOp, unsigned FPOp,
546 const Type *Ty = I.getType();
547 SDOperand Op1 = getValue(I.getOperand(0));
548 SDOperand Op2 = getValue(I.getOperand(1));
550 if (Ty->isIntegral()) {
551 setValue(&I, DAG.getNode(IntOp, Op1.getValueType(), Op1, Op2));
552 } else if (Ty->isFloatingPoint()) {
553 setValue(&I, DAG.getNode(FPOp, Op1.getValueType(), Op1, Op2));
555 const PackedType *PTy = cast<PackedType>(Ty);
556 unsigned NumElements = PTy->getNumElements();
557 MVT::ValueType PVT = TLI.getValueType(PTy->getElementType());
558 MVT::ValueType TVT = MVT::getVectorType(PVT, NumElements);
560 // Immediately scalarize packed types containing only one element, so that
561 // the Legalize pass does not have to deal with them. Similarly, if the
562 // abstract vector is going to turn into one that the target natively
563 // supports, generate that type now so that Legalize doesn't have to deal
564 // with that either. These steps ensure that Legalize only has to handle
565 // vector types in its Expand case.
566 unsigned Opc = MVT::isFloatingPoint(PVT) ? FPOp : IntOp;
567 if (NumElements == 1) {
568 setValue(&I, DAG.getNode(Opc, PVT, Op1, Op2));
569 } else if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
570 setValue(&I, DAG.getNode(Opc, TVT, Op1, Op2));
572 SDOperand Num = DAG.getConstant(NumElements, MVT::i32);
573 SDOperand Typ = DAG.getValueType(PVT);
574 setValue(&I, DAG.getNode(VecOp, MVT::Vector, Op1, Op2, Num, Typ));
579 void SelectionDAGLowering::visitShift(User &I, unsigned Opcode) {
580 SDOperand Op1 = getValue(I.getOperand(0));
581 SDOperand Op2 = getValue(I.getOperand(1));
583 Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
585 setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
588 void SelectionDAGLowering::visitSetCC(User &I,ISD::CondCode SignedOpcode,
589 ISD::CondCode UnsignedOpcode) {
590 SDOperand Op1 = getValue(I.getOperand(0));
591 SDOperand Op2 = getValue(I.getOperand(1));
592 ISD::CondCode Opcode = SignedOpcode;
593 if (I.getOperand(0)->getType()->isUnsigned())
594 Opcode = UnsignedOpcode;
595 setValue(&I, DAG.getSetCC(MVT::i1, Op1, Op2, Opcode));
598 void SelectionDAGLowering::visitSelect(User &I) {
599 SDOperand Cond = getValue(I.getOperand(0));
600 SDOperand TrueVal = getValue(I.getOperand(1));
601 SDOperand FalseVal = getValue(I.getOperand(2));
602 setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
606 void SelectionDAGLowering::visitCast(User &I) {
607 SDOperand N = getValue(I.getOperand(0));
608 MVT::ValueType SrcTy = TLI.getValueType(I.getOperand(0)->getType());
609 MVT::ValueType DestTy = TLI.getValueType(I.getType());
611 if (N.getValueType() == DestTy) {
612 setValue(&I, N); // noop cast.
613 } else if (DestTy == MVT::i1) {
614 // Cast to bool is a comparison against zero, not truncation to zero.
615 SDOperand Zero = isInteger(SrcTy) ? DAG.getConstant(0, N.getValueType()) :
616 DAG.getConstantFP(0.0, N.getValueType());
617 setValue(&I, DAG.getSetCC(MVT::i1, N, Zero, ISD::SETNE));
618 } else if (isInteger(SrcTy)) {
619 if (isInteger(DestTy)) { // Int -> Int cast
620 if (DestTy < SrcTy) // Truncating cast?
621 setValue(&I, DAG.getNode(ISD::TRUNCATE, DestTy, N));
622 else if (I.getOperand(0)->getType()->isSigned())
623 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, DestTy, N));
625 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, DestTy, N));
626 } else { // Int -> FP cast
627 if (I.getOperand(0)->getType()->isSigned())
628 setValue(&I, DAG.getNode(ISD::SINT_TO_FP, DestTy, N));
630 setValue(&I, DAG.getNode(ISD::UINT_TO_FP, DestTy, N));
633 assert(isFloatingPoint(SrcTy) && "Unknown value type!");
634 if (isFloatingPoint(DestTy)) { // FP -> FP cast
635 if (DestTy < SrcTy) // Rounding cast?
636 setValue(&I, DAG.getNode(ISD::FP_ROUND, DestTy, N));
638 setValue(&I, DAG.getNode(ISD::FP_EXTEND, DestTy, N));
639 } else { // FP -> Int cast.
640 if (I.getType()->isSigned())
641 setValue(&I, DAG.getNode(ISD::FP_TO_SINT, DestTy, N));
643 setValue(&I, DAG.getNode(ISD::FP_TO_UINT, DestTy, N));
648 void SelectionDAGLowering::visitGetElementPtr(User &I) {
649 SDOperand N = getValue(I.getOperand(0));
650 const Type *Ty = I.getOperand(0)->getType();
651 const Type *UIntPtrTy = TD.getIntPtrType();
653 for (GetElementPtrInst::op_iterator OI = I.op_begin()+1, E = I.op_end();
656 if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
657 unsigned Field = cast<ConstantUInt>(Idx)->getValue();
660 uint64_t Offset = TD.getStructLayout(StTy)->MemberOffsets[Field];
661 N = DAG.getNode(ISD::ADD, N.getValueType(), N,
662 getIntPtrConstant(Offset));
664 Ty = StTy->getElementType(Field);
666 Ty = cast<SequentialType>(Ty)->getElementType();
668 // If this is a constant subscript, handle it quickly.
669 if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
670 if (CI->getRawValue() == 0) continue;
673 if (ConstantSInt *CSI = dyn_cast<ConstantSInt>(CI))
674 Offs = (int64_t)TD.getTypeSize(Ty)*CSI->getValue();
676 Offs = TD.getTypeSize(Ty)*cast<ConstantUInt>(CI)->getValue();
677 N = DAG.getNode(ISD::ADD, N.getValueType(), N, getIntPtrConstant(Offs));
681 // N = N + Idx * ElementSize;
682 uint64_t ElementSize = TD.getTypeSize(Ty);
683 SDOperand IdxN = getValue(Idx);
685 // If the index is smaller or larger than intptr_t, truncate or extend
687 if (IdxN.getValueType() < N.getValueType()) {
688 if (Idx->getType()->isSigned())
689 IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN);
691 IdxN = DAG.getNode(ISD::ZERO_EXTEND, N.getValueType(), IdxN);
692 } else if (IdxN.getValueType() > N.getValueType())
693 IdxN = DAG.getNode(ISD::TRUNCATE, N.getValueType(), IdxN);
695 // If this is a multiply by a power of two, turn it into a shl
696 // immediately. This is a very common case.
697 if (isPowerOf2_64(ElementSize)) {
698 unsigned Amt = Log2_64(ElementSize);
699 IdxN = DAG.getNode(ISD::SHL, N.getValueType(), IdxN,
700 DAG.getConstant(Amt, TLI.getShiftAmountTy()));
701 N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
705 SDOperand Scale = getIntPtrConstant(ElementSize);
706 IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
707 N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
713 void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
714 // If this is a fixed sized alloca in the entry block of the function,
715 // allocate it statically on the stack.
716 if (FuncInfo.StaticAllocaMap.count(&I))
717 return; // getValue will auto-populate this.
719 const Type *Ty = I.getAllocatedType();
720 uint64_t TySize = TLI.getTargetData().getTypeSize(Ty);
721 unsigned Align = std::max((unsigned)TLI.getTargetData().getTypeAlignment(Ty),
724 SDOperand AllocSize = getValue(I.getArraySize());
725 MVT::ValueType IntPtr = TLI.getPointerTy();
726 if (IntPtr < AllocSize.getValueType())
727 AllocSize = DAG.getNode(ISD::TRUNCATE, IntPtr, AllocSize);
728 else if (IntPtr > AllocSize.getValueType())
729 AllocSize = DAG.getNode(ISD::ZERO_EXTEND, IntPtr, AllocSize);
731 AllocSize = DAG.getNode(ISD::MUL, IntPtr, AllocSize,
732 getIntPtrConstant(TySize));
734 // Handle alignment. If the requested alignment is less than or equal to the
735 // stack alignment, ignore it and round the size of the allocation up to the
736 // stack alignment size. If the size is greater than the stack alignment, we
737 // note this in the DYNAMIC_STACKALLOC node.
738 unsigned StackAlign =
739 TLI.getTargetMachine().getFrameInfo()->getStackAlignment();
740 if (Align <= StackAlign) {
742 // Add SA-1 to the size.
743 AllocSize = DAG.getNode(ISD::ADD, AllocSize.getValueType(), AllocSize,
744 getIntPtrConstant(StackAlign-1));
745 // Mask out the low bits for alignment purposes.
746 AllocSize = DAG.getNode(ISD::AND, AllocSize.getValueType(), AllocSize,
747 getIntPtrConstant(~(uint64_t)(StackAlign-1)));
750 std::vector<MVT::ValueType> VTs;
751 VTs.push_back(AllocSize.getValueType());
752 VTs.push_back(MVT::Other);
753 std::vector<SDOperand> Ops;
754 Ops.push_back(getRoot());
755 Ops.push_back(AllocSize);
756 Ops.push_back(getIntPtrConstant(Align));
757 SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops);
758 DAG.setRoot(setValue(&I, DSA).getValue(1));
760 // Inform the Frame Information that we have just allocated a variable-sized
762 CurMBB->getParent()->getFrameInfo()->CreateVariableSizedObject();
765 /// getStringValue - Turn an LLVM constant pointer that eventually points to a
766 /// global into a string value. Return an empty string if we can't do it.
768 static std::string getStringValue(Value *V, unsigned Offset = 0) {
769 if (GlobalVariable *GV = dyn_cast<GlobalVariable>(V)) {
770 if (GV->hasInitializer() && isa<ConstantArray>(GV->getInitializer())) {
771 ConstantArray *Init = cast<ConstantArray>(GV->getInitializer());
772 if (Init->isString()) {
773 std::string Result = Init->getAsString();
774 if (Offset < Result.size()) {
775 // If we are pointing INTO The string, erase the beginning...
776 Result.erase(Result.begin(), Result.begin()+Offset);
778 // Take off the null terminator, and any string fragments after it.
779 std::string::size_type NullPos = Result.find_first_of((char)0);
780 if (NullPos != std::string::npos)
781 Result.erase(Result.begin()+NullPos, Result.end());
786 } else if (Constant *C = dyn_cast<Constant>(V)) {
787 if (GlobalValue *GV = dyn_cast<GlobalValue>(C))
788 return getStringValue(GV, Offset);
789 else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
790 if (CE->getOpcode() == Instruction::GetElementPtr) {
791 // Turn a gep into the specified offset.
792 if (CE->getNumOperands() == 3 &&
793 cast<Constant>(CE->getOperand(1))->isNullValue() &&
794 isa<ConstantInt>(CE->getOperand(2))) {
795 return getStringValue(CE->getOperand(0),
796 Offset+cast<ConstantInt>(CE->getOperand(2))->getRawValue());
804 void SelectionDAGLowering::visitLoad(LoadInst &I) {
805 SDOperand Ptr = getValue(I.getOperand(0));
811 // Do not serialize non-volatile loads against each other.
812 Root = DAG.getRoot();
815 const Type *Ty = I.getType();
818 if (const PackedType *PTy = dyn_cast<PackedType>(Ty)) {
819 unsigned NumElements = PTy->getNumElements();
820 MVT::ValueType PVT = TLI.getValueType(PTy->getElementType());
821 MVT::ValueType TVT = MVT::getVectorType(PVT, NumElements);
823 // Immediately scalarize packed types containing only one element, so that
824 // the Legalize pass does not have to deal with them.
825 if (NumElements == 1) {
826 L = DAG.getLoad(PVT, Root, Ptr, DAG.getSrcValue(I.getOperand(0)));
827 } else if (TVT != MVT::Other && TLI.isTypeLegal(TVT)) {
828 L = DAG.getLoad(TVT, Root, Ptr, DAG.getSrcValue(I.getOperand(0)));
830 L = DAG.getVecLoad(NumElements, PVT, Root, Ptr,
831 DAG.getSrcValue(I.getOperand(0)));
834 L = DAG.getLoad(TLI.getValueType(Ty), Root, Ptr,
835 DAG.getSrcValue(I.getOperand(0)));
840 DAG.setRoot(L.getValue(1));
842 PendingLoads.push_back(L.getValue(1));
846 void SelectionDAGLowering::visitStore(StoreInst &I) {
847 Value *SrcV = I.getOperand(0);
848 SDOperand Src = getValue(SrcV);
849 SDOperand Ptr = getValue(I.getOperand(1));
850 DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
851 DAG.getSrcValue(I.getOperand(1))));
854 /// visitIntrinsicCall - Lower the call to the specified intrinsic function. If
855 /// we want to emit this as a call to a named external function, return the name
856 /// otherwise lower it and return null.
858 SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
860 case Intrinsic::vastart: visitVAStart(I); return 0;
861 case Intrinsic::vaend: visitVAEnd(I); return 0;
862 case Intrinsic::vacopy: visitVACopy(I); return 0;
863 case Intrinsic::returnaddress: visitFrameReturnAddress(I, false); return 0;
864 case Intrinsic::frameaddress: visitFrameReturnAddress(I, true); return 0;
865 case Intrinsic::setjmp:
866 return "_setjmp"+!TLI.usesUnderscoreSetJmpLongJmp();
868 case Intrinsic::longjmp:
869 return "_longjmp"+!TLI.usesUnderscoreSetJmpLongJmp();
871 case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return 0;
872 case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return 0;
873 case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return 0;
875 case Intrinsic::readport:
876 case Intrinsic::readio: {
877 std::vector<MVT::ValueType> VTs;
878 VTs.push_back(TLI.getValueType(I.getType()));
879 VTs.push_back(MVT::Other);
880 std::vector<SDOperand> Ops;
881 Ops.push_back(getRoot());
882 Ops.push_back(getValue(I.getOperand(1)));
883 SDOperand Tmp = DAG.getNode(Intrinsic == Intrinsic::readport ?
884 ISD::READPORT : ISD::READIO, VTs, Ops);
887 DAG.setRoot(Tmp.getValue(1));
890 case Intrinsic::writeport:
891 case Intrinsic::writeio:
892 DAG.setRoot(DAG.getNode(Intrinsic == Intrinsic::writeport ?
893 ISD::WRITEPORT : ISD::WRITEIO, MVT::Other,
894 getRoot(), getValue(I.getOperand(1)),
895 getValue(I.getOperand(2))));
898 case Intrinsic::dbg_stoppoint:
900 if (TLI.getTargetMachine().getIntrinsicLowering().EmitDebugFunctions())
901 return "llvm_debugger_stop";
903 std::string fname = "<unknown>";
904 std::vector<SDOperand> Ops;
906 // Pull the filename out of the the compilation unit.
907 const GlobalVariable *cunit = dyn_cast<GlobalVariable>(I.getOperand(4));
908 if (cunit && cunit->hasInitializer()) {
909 ConstantStruct *CS = dyn_cast<ConstantStruct>(cunit->getInitializer());
910 if (CS->getNumOperands() > 0) {
911 std::string dirname = getStringValue(CS->getOperand(4));
912 fname = dirname + "/" + getStringValue(CS->getOperand(3));
916 Ops.push_back(getRoot());
919 Ops.push_back(getValue(I.getOperand(2)));
922 Ops.push_back(getValue(I.getOperand(3)));
925 Ops.push_back(DAG.getString(fname));
926 Ops.push_back(DAG.getString(""));
927 DAG.setRoot(DAG.getNode(ISD::LOCATION, MVT::Other, Ops));
928 setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
931 case Intrinsic::dbg_region_start:
932 if (TLI.getTargetMachine().getIntrinsicLowering().EmitDebugFunctions())
933 return "llvm_dbg_region_start";
934 if (I.getType() != Type::VoidTy)
935 setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
937 case Intrinsic::dbg_region_end:
938 if (TLI.getTargetMachine().getIntrinsicLowering().EmitDebugFunctions())
939 return "llvm_dbg_region_end";
940 if (I.getType() != Type::VoidTy)
941 setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
943 case Intrinsic::dbg_func_start:
944 if (TLI.getTargetMachine().getIntrinsicLowering().EmitDebugFunctions())
945 return "llvm_dbg_subprogram";
946 if (I.getType() != Type::VoidTy)
947 setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
949 case Intrinsic::dbg_declare:
950 if (I.getType() != Type::VoidTy)
951 setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
954 case Intrinsic::isunordered:
955 setValue(&I, DAG.getSetCC(MVT::i1,getValue(I.getOperand(1)),
956 getValue(I.getOperand(2)), ISD::SETUO));
959 case Intrinsic::sqrt:
960 setValue(&I, DAG.getNode(ISD::FSQRT,
961 getValue(I.getOperand(1)).getValueType(),
962 getValue(I.getOperand(1))));
964 case Intrinsic::pcmarker: {
965 SDOperand Tmp = getValue(I.getOperand(1));
966 DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
969 case Intrinsic::readcyclecounter: {
970 std::vector<MVT::ValueType> VTs;
971 VTs.push_back(MVT::i64);
972 VTs.push_back(MVT::Other);
973 std::vector<SDOperand> Ops;
974 Ops.push_back(getRoot());
975 SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER, VTs, Ops);
977 DAG.setRoot(Tmp.getValue(1));
980 case Intrinsic::cttz:
981 setValue(&I, DAG.getNode(ISD::CTTZ,
982 getValue(I.getOperand(1)).getValueType(),
983 getValue(I.getOperand(1))));
985 case Intrinsic::ctlz:
986 setValue(&I, DAG.getNode(ISD::CTLZ,
987 getValue(I.getOperand(1)).getValueType(),
988 getValue(I.getOperand(1))));
990 case Intrinsic::ctpop:
991 setValue(&I, DAG.getNode(ISD::CTPOP,
992 getValue(I.getOperand(1)).getValueType(),
993 getValue(I.getOperand(1))));
995 case Intrinsic::prefetch:
996 // FIXME: Currently discarding prefetches.
1000 assert(0 && "This intrinsic is not implemented yet!");
1006 void SelectionDAGLowering::visitCall(CallInst &I) {
1007 const char *RenameFn = 0;
1008 if (Function *F = I.getCalledFunction()) {
1009 if (F->isExternal())
1010 if (unsigned IID = F->getIntrinsicID()) {
1011 RenameFn = visitIntrinsicCall(I, IID);
1014 } else { // Not an LLVM intrinsic.
1015 const std::string &Name = F->getName();
1016 if (Name[0] == 'f' && (Name == "fabs" || Name == "fabsf")) {
1017 if (I.getNumOperands() == 2 && // Basic sanity checks.
1018 I.getOperand(1)->getType()->isFloatingPoint() &&
1019 I.getType() == I.getOperand(1)->getType()) {
1020 SDOperand Tmp = getValue(I.getOperand(1));
1021 setValue(&I, DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp));
1024 } else if (Name[0] == 's' && (Name == "sin" || Name == "sinf")) {
1025 if (I.getNumOperands() == 2 && // Basic sanity checks.
1026 I.getOperand(1)->getType()->isFloatingPoint() &&
1027 I.getType() == I.getOperand(1)->getType()) {
1028 SDOperand Tmp = getValue(I.getOperand(1));
1029 setValue(&I, DAG.getNode(ISD::FSIN, Tmp.getValueType(), Tmp));
1032 } else if (Name[0] == 'c' && (Name == "cos" || Name == "cosf")) {
1033 if (I.getNumOperands() == 2 && // Basic sanity checks.
1034 I.getOperand(1)->getType()->isFloatingPoint() &&
1035 I.getType() == I.getOperand(1)->getType()) {
1036 SDOperand Tmp = getValue(I.getOperand(1));
1037 setValue(&I, DAG.getNode(ISD::FCOS, Tmp.getValueType(), Tmp));
1046 Callee = getValue(I.getOperand(0));
1048 Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
1049 std::vector<std::pair<SDOperand, const Type*> > Args;
1050 Args.reserve(I.getNumOperands());
1051 for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) {
1052 Value *Arg = I.getOperand(i);
1053 SDOperand ArgNode = getValue(Arg);
1054 Args.push_back(std::make_pair(ArgNode, Arg->getType()));
1057 const PointerType *PT = cast<PointerType>(I.getCalledValue()->getType());
1058 const FunctionType *FTy = cast<FunctionType>(PT->getElementType());
1060 std::pair<SDOperand,SDOperand> Result =
1061 TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), I.getCallingConv(),
1062 I.isTailCall(), Callee, Args, DAG);
1063 if (I.getType() != Type::VoidTy)
1064 setValue(&I, Result.first);
1065 DAG.setRoot(Result.second);
1068 void SelectionDAGLowering::visitMalloc(MallocInst &I) {
1069 SDOperand Src = getValue(I.getOperand(0));
1071 MVT::ValueType IntPtr = TLI.getPointerTy();
1073 if (IntPtr < Src.getValueType())
1074 Src = DAG.getNode(ISD::TRUNCATE, IntPtr, Src);
1075 else if (IntPtr > Src.getValueType())
1076 Src = DAG.getNode(ISD::ZERO_EXTEND, IntPtr, Src);
1078 // Scale the source by the type size.
1079 uint64_t ElementSize = TD.getTypeSize(I.getType()->getElementType());
1080 Src = DAG.getNode(ISD::MUL, Src.getValueType(),
1081 Src, getIntPtrConstant(ElementSize));
1083 std::vector<std::pair<SDOperand, const Type*> > Args;
1084 Args.push_back(std::make_pair(Src, TLI.getTargetData().getIntPtrType()));
1086 std::pair<SDOperand,SDOperand> Result =
1087 TLI.LowerCallTo(getRoot(), I.getType(), false, CallingConv::C, true,
1088 DAG.getExternalSymbol("malloc", IntPtr),
1090 setValue(&I, Result.first); // Pointers always fit in registers
1091 DAG.setRoot(Result.second);
1094 void SelectionDAGLowering::visitFree(FreeInst &I) {
1095 std::vector<std::pair<SDOperand, const Type*> > Args;
1096 Args.push_back(std::make_pair(getValue(I.getOperand(0)),
1097 TLI.getTargetData().getIntPtrType()));
1098 MVT::ValueType IntPtr = TLI.getPointerTy();
1099 std::pair<SDOperand,SDOperand> Result =
1100 TLI.LowerCallTo(getRoot(), Type::VoidTy, false, CallingConv::C, true,
1101 DAG.getExternalSymbol("free", IntPtr), Args, DAG);
1102 DAG.setRoot(Result.second);
1105 // InsertAtEndOfBasicBlock - This method should be implemented by targets that
1106 // mark instructions with the 'usesCustomDAGSchedInserter' flag. These
1107 // instructions are special in various ways, which require special support to
1108 // insert. The specified MachineInstr is created but not inserted into any
1109 // basic blocks, and the scheduler passes ownership of it to this method.
1110 MachineBasicBlock *TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
1111 MachineBasicBlock *MBB) {
1112 std::cerr << "If a target marks an instruction with "
1113 "'usesCustomDAGSchedInserter', it must implement "
1114 "TargetLowering::InsertAtEndOfBasicBlock!\n";
1119 SDOperand TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
1120 SelectionDAG &DAG) {
1121 return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
1124 SDOperand TargetLowering::LowerVAStart(SDOperand Chain,
1125 SDOperand VAListP, Value *VAListV,
1126 SelectionDAG &DAG) {
1127 // We have no sane default behavior, just emit a useful error message and bail
1129 std::cerr << "Variable arguments handling not implemented on this target!\n";
1134 SDOperand TargetLowering::LowerVAEnd(SDOperand Chain, SDOperand LP, Value *LV,
1135 SelectionDAG &DAG) {
1136 // Default to a noop.
1140 SDOperand TargetLowering::LowerVACopy(SDOperand Chain,
1141 SDOperand SrcP, Value *SrcV,
1142 SDOperand DestP, Value *DestV,
1143 SelectionDAG &DAG) {
1144 // Default to copying the input list.
1145 SDOperand Val = DAG.getLoad(getPointerTy(), Chain,
1146 SrcP, DAG.getSrcValue(SrcV));
1147 SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
1148 Val, DestP, DAG.getSrcValue(DestV));
1152 std::pair<SDOperand,SDOperand>
1153 TargetLowering::LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
1154 const Type *ArgTy, SelectionDAG &DAG) {
1155 // We have no sane default behavior, just emit a useful error message and bail
1157 std::cerr << "Variable arguments handling not implemented on this target!\n";
1159 return std::make_pair(SDOperand(), SDOperand());
1163 void SelectionDAGLowering::visitVAStart(CallInst &I) {
1164 DAG.setRoot(TLI.LowerVAStart(getRoot(), getValue(I.getOperand(1)),
1165 I.getOperand(1), DAG));
1168 void SelectionDAGLowering::visitVAArg(VAArgInst &I) {
1169 std::pair<SDOperand,SDOperand> Result =
1170 TLI.LowerVAArg(getRoot(), getValue(I.getOperand(0)), I.getOperand(0),
1172 setValue(&I, Result.first);
1173 DAG.setRoot(Result.second);
1176 void SelectionDAGLowering::visitVAEnd(CallInst &I) {
1177 DAG.setRoot(TLI.LowerVAEnd(getRoot(), getValue(I.getOperand(1)),
1178 I.getOperand(1), DAG));
1181 void SelectionDAGLowering::visitVACopy(CallInst &I) {
1183 TLI.LowerVACopy(getRoot(), getValue(I.getOperand(2)), I.getOperand(2),
1184 getValue(I.getOperand(1)), I.getOperand(1), DAG);
1185 DAG.setRoot(Result);
1189 // It is always conservatively correct for llvm.returnaddress and
1190 // llvm.frameaddress to return 0.
1191 std::pair<SDOperand, SDOperand>
1192 TargetLowering::LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain,
1193 unsigned Depth, SelectionDAG &DAG) {
1194 return std::make_pair(DAG.getConstant(0, getPointerTy()), Chain);
1197 SDOperand TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
1198 assert(0 && "LowerOperation not implemented for this target!");
1203 void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) {
1204 unsigned Depth = (unsigned)cast<ConstantUInt>(I.getOperand(1))->getValue();
1205 std::pair<SDOperand,SDOperand> Result =
1206 TLI.LowerFrameReturnAddress(isFrame, getRoot(), Depth, DAG);
1207 setValue(&I, Result.first);
1208 DAG.setRoot(Result.second);
1211 void SelectionDAGLowering::visitMemIntrinsic(CallInst &I, unsigned Op) {
1213 // If the size of the cpy/move/set is constant (known)
1214 if (ConstantUInt* op3 = dyn_cast<ConstantUInt>(I.getOperand(3))) {
1215 uint64_t size = op3->getValue();
1218 if (size <= TLI.getMaxStoresPerMemSet()) {
1219 if (ConstantUInt* op4 = dyn_cast<ConstantUInt>(I.getOperand(4))) {
1220 uint64_t TySize = TLI.getTargetData().getTypeSize(Ty);
1221 uint64_t align = op4.getValue();
1222 while (size > align) {
1225 Value *SrcV = I.getOperand(0);
1226 SDOperand Src = getValue(SrcV);
1227 SDOperand Ptr = getValue(I.getOperand(1));
1228 DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
1229 DAG.getSrcValue(I.getOperand(1))));
1233 break; // don't do this optimization, use a normal memset
1236 break; // FIXME: not implemented yet
1241 // Non-optimized version
1242 std::vector<SDOperand> Ops;
1243 Ops.push_back(getRoot());
1244 Ops.push_back(getValue(I.getOperand(1)));
1245 Ops.push_back(getValue(I.getOperand(2)));
1246 Ops.push_back(getValue(I.getOperand(3)));
1247 Ops.push_back(getValue(I.getOperand(4)));
1248 DAG.setRoot(DAG.getNode(Op, MVT::Other, Ops));
1251 //===----------------------------------------------------------------------===//
1252 // SelectionDAGISel code
1253 //===----------------------------------------------------------------------===//
1255 unsigned SelectionDAGISel::MakeReg(MVT::ValueType VT) {
1256 return RegMap->createVirtualRegister(TLI.getRegClassFor(VT));
1259 void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
1260 // FIXME: we only modify the CFG to split critical edges. This
1261 // updates dom and loop info.
1265 /// InsertGEPComputeCode - Insert code into BB to compute Ptr+PtrOffset,
1266 /// casting to the type of GEPI.
1267 static Value *InsertGEPComputeCode(Value *&V, BasicBlock *BB, Instruction *GEPI,
1268 Value *Ptr, Value *PtrOffset) {
1269 if (V) return V; // Already computed.
1271 BasicBlock::iterator InsertPt;
1272 if (BB == GEPI->getParent()) {
1273 // If insert into the GEP's block, insert right after the GEP.
1277 // Otherwise, insert at the top of BB, after any PHI nodes
1278 InsertPt = BB->begin();
1279 while (isa<PHINode>(InsertPt)) ++InsertPt;
1282 // If Ptr is itself a cast, but in some other BB, emit a copy of the cast into
1283 // BB so that there is only one value live across basic blocks (the cast
1285 if (CastInst *CI = dyn_cast<CastInst>(Ptr))
1286 if (CI->getParent() != BB && isa<PointerType>(CI->getOperand(0)->getType()))
1287 Ptr = new CastInst(CI->getOperand(0), CI->getType(), "", InsertPt);
1289 // Add the offset, cast it to the right type.
1290 Ptr = BinaryOperator::createAdd(Ptr, PtrOffset, "", InsertPt);
1291 Ptr = new CastInst(Ptr, GEPI->getType(), "", InsertPt);
1296 /// OptimizeGEPExpression - Since we are doing basic-block-at-a-time instruction
1297 /// selection, we want to be a bit careful about some things. In particular, if
1298 /// we have a GEP instruction that is used in a different block than it is
1299 /// defined, the addressing expression of the GEP cannot be folded into loads or
1300 /// stores that use it. In this case, decompose the GEP and move constant
1301 /// indices into blocks that use it.
1302 static void OptimizeGEPExpression(GetElementPtrInst *GEPI,
1303 const TargetData &TD) {
1304 if (!GEPISelTest) return;
1306 // If this GEP is only used inside the block it is defined in, there is no
1307 // need to rewrite it.
1308 bool isUsedOutsideDefBB = false;
1309 BasicBlock *DefBB = GEPI->getParent();
1310 for (Value::use_iterator UI = GEPI->use_begin(), E = GEPI->use_end();
1312 if (cast<Instruction>(*UI)->getParent() != DefBB) {
1313 isUsedOutsideDefBB = true;
1317 if (!isUsedOutsideDefBB) return;
1319 // If this GEP has no non-zero constant indices, there is nothing we can do,
1321 bool hasConstantIndex = false;
1322 for (GetElementPtrInst::op_iterator OI = GEPI->op_begin()+1,
1323 E = GEPI->op_end(); OI != E; ++OI) {
1324 if (ConstantInt *CI = dyn_cast<ConstantInt>(*OI))
1325 if (CI->getRawValue()) {
1326 hasConstantIndex = true;
1330 // If this is a GEP &Alloca, 0, 0, forward subst the frame index into uses.
1331 if (!hasConstantIndex && !isa<AllocaInst>(GEPI->getOperand(0))) return;
1333 // Otherwise, decompose the GEP instruction into multiplies and adds. Sum the
1334 // constant offset (which we now know is non-zero) and deal with it later.
1335 uint64_t ConstantOffset = 0;
1336 const Type *UIntPtrTy = TD.getIntPtrType();
1337 Value *Ptr = new CastInst(GEPI->getOperand(0), UIntPtrTy, "", GEPI);
1338 const Type *Ty = GEPI->getOperand(0)->getType();
1340 for (GetElementPtrInst::op_iterator OI = GEPI->op_begin()+1,
1341 E = GEPI->op_end(); OI != E; ++OI) {
1343 if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
1344 unsigned Field = cast<ConstantUInt>(Idx)->getValue();
1346 ConstantOffset += TD.getStructLayout(StTy)->MemberOffsets[Field];
1347 Ty = StTy->getElementType(Field);
1349 Ty = cast<SequentialType>(Ty)->getElementType();
1351 // Handle constant subscripts.
1352 if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
1353 if (CI->getRawValue() == 0) continue;
1355 if (ConstantSInt *CSI = dyn_cast<ConstantSInt>(CI))
1356 ConstantOffset += (int64_t)TD.getTypeSize(Ty)*CSI->getValue();
1358 ConstantOffset+=TD.getTypeSize(Ty)*cast<ConstantUInt>(CI)->getValue();
1362 // Ptr = Ptr + Idx * ElementSize;
1364 // Cast Idx to UIntPtrTy if needed.
1365 Idx = new CastInst(Idx, UIntPtrTy, "", GEPI);
1367 uint64_t ElementSize = TD.getTypeSize(Ty);
1368 // Mask off bits that should not be set.
1369 ElementSize &= ~0ULL >> (64-UIntPtrTy->getPrimitiveSizeInBits());
1370 Constant *SizeCst = ConstantUInt::get(UIntPtrTy, ElementSize);
1372 // Multiply by the element size and add to the base.
1373 Idx = BinaryOperator::createMul(Idx, SizeCst, "", GEPI);
1374 Ptr = BinaryOperator::createAdd(Ptr, Idx, "", GEPI);
1378 // Make sure that the offset fits in uintptr_t.
1379 ConstantOffset &= ~0ULL >> (64-UIntPtrTy->getPrimitiveSizeInBits());
1380 Constant *PtrOffset = ConstantUInt::get(UIntPtrTy, ConstantOffset);
1382 // Okay, we have now emitted all of the variable index parts to the BB that
1383 // the GEP is defined in. Loop over all of the using instructions, inserting
1384 // an "add Ptr, ConstantOffset" into each block that uses it and update the
1385 // instruction to use the newly computed value, making GEPI dead. When the
1386 // user is a load or store instruction address, we emit the add into the user
1387 // block, otherwise we use a canonical version right next to the gep (these
1388 // won't be foldable as addresses, so we might as well share the computation).
1390 std::map<BasicBlock*,Value*> InsertedExprs;
1391 while (!GEPI->use_empty()) {
1392 Instruction *User = cast<Instruction>(GEPI->use_back());
1394 // If this use is not foldable into the addressing mode, use a version
1395 // emitted in the GEP block.
1397 if (!isa<LoadInst>(User) &&
1398 (!isa<StoreInst>(User) || User->getOperand(0) == GEPI)) {
1399 NewVal = InsertGEPComputeCode(InsertedExprs[DefBB], DefBB, GEPI,
1402 // Otherwise, insert the code in the User's block so it can be folded into
1403 // any users in that block.
1404 NewVal = InsertGEPComputeCode(InsertedExprs[User->getParent()],
1405 User->getParent(), GEPI,
1408 User->replaceUsesOfWith(GEPI, NewVal);
1411 // Finally, the GEP is dead, remove it.
1412 GEPI->eraseFromParent();
1415 bool SelectionDAGISel::runOnFunction(Function &Fn) {
1416 MachineFunction &MF = MachineFunction::construct(&Fn, TLI.getTargetMachine());
1417 RegMap = MF.getSSARegMap();
1418 DEBUG(std::cerr << "\n\n\n=== " << Fn.getName() << "\n");
1420 // First, split all critical edges for PHI nodes with incoming values that are
1421 // constants, this way the load of the constant into a vreg will not be placed
1422 // into MBBs that are used some other way.
1424 // In this pass we also look for GEP instructions that are used across basic
1425 // blocks and rewrites them to improve basic-block-at-a-time selection.
1427 for (Function::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
1429 BasicBlock::iterator BBI;
1430 for (BBI = BB->begin(); (PN = dyn_cast<PHINode>(BBI)); ++BBI)
1431 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1432 if (isa<Constant>(PN->getIncomingValue(i)))
1433 SplitCriticalEdge(PN->getIncomingBlock(i), BB);
1435 for (BasicBlock::iterator E = BB->end(); BBI != E; )
1436 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(BBI++))
1437 OptimizeGEPExpression(GEPI, TLI.getTargetData());
1440 FunctionLoweringInfo FuncInfo(TLI, Fn, MF);
1442 for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
1443 SelectBasicBlock(I, MF, FuncInfo);
1449 SDOperand SelectionDAGISel::
1450 CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
1451 SDOperand Op = SDL.getValue(V);
1452 assert((Op.getOpcode() != ISD::CopyFromReg ||
1453 cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
1454 "Copy from a reg to the same reg!");
1456 // If this type is not legal, we must make sure to not create an invalid
1458 MVT::ValueType SrcVT = Op.getValueType();
1459 MVT::ValueType DestVT = TLI.getTypeToTransformTo(SrcVT);
1460 SelectionDAG &DAG = SDL.DAG;
1461 if (SrcVT == DestVT) {
1462 return DAG.getCopyToReg(SDL.getRoot(), Reg, Op);
1463 } else if (SrcVT < DestVT) {
1464 // The src value is promoted to the register.
1465 if (MVT::isFloatingPoint(SrcVT))
1466 Op = DAG.getNode(ISD::FP_EXTEND, DestVT, Op);
1468 Op = DAG.getNode(ISD::ANY_EXTEND, DestVT, Op);
1469 return DAG.getCopyToReg(SDL.getRoot(), Reg, Op);
1471 // The src value is expanded into multiple registers.
1472 SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
1473 Op, DAG.getConstant(0, MVT::i32));
1474 SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
1475 Op, DAG.getConstant(1, MVT::i32));
1476 Op = DAG.getCopyToReg(SDL.getRoot(), Reg, Lo);
1477 return DAG.getCopyToReg(Op, Reg+1, Hi);
1481 void SelectionDAGISel::
1482 LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
1483 std::vector<SDOperand> &UnorderedChains) {
1484 // If this is the entry block, emit arguments.
1485 Function &F = *BB->getParent();
1486 FunctionLoweringInfo &FuncInfo = SDL.FuncInfo;
1487 SDOperand OldRoot = SDL.DAG.getRoot();
1488 std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
1491 for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
1493 if (!AI->use_empty()) {
1494 SDL.setValue(AI, Args[a]);
1496 // If this argument is live outside of the entry block, insert a copy from
1497 // whereever we got it to the vreg that other BB's will reference it as.
1498 if (FuncInfo.ValueMap.count(AI)) {
1500 CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
1501 UnorderedChains.push_back(Copy);
1505 // Next, if the function has live ins that need to be copied into vregs,
1506 // emit the copies now, into the top of the block.
1507 MachineFunction &MF = SDL.DAG.getMachineFunction();
1508 if (MF.livein_begin() != MF.livein_end()) {
1509 SSARegMap *RegMap = MF.getSSARegMap();
1510 const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
1511 for (MachineFunction::livein_iterator LI = MF.livein_begin(),
1512 E = MF.livein_end(); LI != E; ++LI)
1514 MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
1515 LI->first, RegMap->getRegClass(LI->second));
1518 // Finally, if the target has anything special to do, allow it to do so.
1519 EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
1523 void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
1524 std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
1525 FunctionLoweringInfo &FuncInfo) {
1526 SelectionDAGLowering SDL(DAG, TLI, FuncInfo);
1528 std::vector<SDOperand> UnorderedChains;
1530 // Lower any arguments needed in this block if this is the entry block.
1531 if (LLVMBB == &LLVMBB->getParent()->front())
1532 LowerArguments(LLVMBB, SDL, UnorderedChains);
1534 BB = FuncInfo.MBBMap[LLVMBB];
1535 SDL.setCurrentBasicBlock(BB);
1537 // Lower all of the non-terminator instructions.
1538 for (BasicBlock::iterator I = LLVMBB->begin(), E = --LLVMBB->end();
1542 // Ensure that all instructions which are used outside of their defining
1543 // blocks are available as virtual registers.
1544 for (BasicBlock::iterator I = LLVMBB->begin(), E = LLVMBB->end(); I != E;++I)
1545 if (!I->use_empty() && !isa<PHINode>(I)) {
1546 std::map<const Value*, unsigned>::iterator VMI =FuncInfo.ValueMap.find(I);
1547 if (VMI != FuncInfo.ValueMap.end())
1548 UnorderedChains.push_back(
1549 CopyValueToVirtualRegister(SDL, I, VMI->second));
1552 // Handle PHI nodes in successor blocks. Emit code into the SelectionDAG to
1553 // ensure constants are generated when needed. Remember the virtual registers
1554 // that need to be added to the Machine PHI nodes as input. We cannot just
1555 // directly add them, because expansion might result in multiple MBB's for one
1556 // BB. As such, the start of the BB might correspond to a different MBB than
1560 // Emit constants only once even if used by multiple PHI nodes.
1561 std::map<Constant*, unsigned> ConstantsOut;
1563 // Check successor nodes PHI nodes that expect a constant to be available from
1565 TerminatorInst *TI = LLVMBB->getTerminator();
1566 for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
1567 BasicBlock *SuccBB = TI->getSuccessor(succ);
1568 MachineBasicBlock::iterator MBBI = FuncInfo.MBBMap[SuccBB]->begin();
1571 // At this point we know that there is a 1-1 correspondence between LLVM PHI
1572 // nodes and Machine PHI nodes, but the incoming operands have not been
1574 for (BasicBlock::iterator I = SuccBB->begin();
1575 (PN = dyn_cast<PHINode>(I)); ++I)
1576 if (!PN->use_empty()) {
1578 Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
1579 if (Constant *C = dyn_cast<Constant>(PHIOp)) {
1580 unsigned &RegOut = ConstantsOut[C];
1582 RegOut = FuncInfo.CreateRegForValue(C);
1583 UnorderedChains.push_back(
1584 CopyValueToVirtualRegister(SDL, C, RegOut));
1588 Reg = FuncInfo.ValueMap[PHIOp];
1590 assert(isa<AllocaInst>(PHIOp) &&
1591 FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(PHIOp)) &&
1592 "Didn't codegen value into a register!??");
1593 Reg = FuncInfo.CreateRegForValue(PHIOp);
1594 UnorderedChains.push_back(
1595 CopyValueToVirtualRegister(SDL, PHIOp, Reg));
1599 // Remember that this register needs to added to the machine PHI node as
1600 // the input for this MBB.
1601 unsigned NumElements =
1602 TLI.getNumElements(TLI.getValueType(PN->getType()));
1603 for (unsigned i = 0, e = NumElements; i != e; ++i)
1604 PHINodesToUpdate.push_back(std::make_pair(MBBI++, Reg+i));
1607 ConstantsOut.clear();
1609 // Turn all of the unordered chains into one factored node.
1610 if (!UnorderedChains.empty()) {
1611 SDOperand Root = SDL.getRoot();
1612 if (Root.getOpcode() != ISD::EntryToken) {
1613 unsigned i = 0, e = UnorderedChains.size();
1614 for (; i != e; ++i) {
1615 assert(UnorderedChains[i].Val->getNumOperands() > 1);
1616 if (UnorderedChains[i].Val->getOperand(0) == Root)
1617 break; // Don't add the root if we already indirectly depend on it.
1621 UnorderedChains.push_back(Root);
1623 DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, UnorderedChains));
1626 // Lower the terminator after the copies are emitted.
1627 SDL.visit(*LLVMBB->getTerminator());
1629 // Make sure the root of the DAG is up-to-date.
1630 DAG.setRoot(SDL.getRoot());
1633 void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
1634 FunctionLoweringInfo &FuncInfo) {
1635 SelectionDAG DAG(TLI, MF);
1637 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
1639 // First step, lower LLVM code to some DAG. This DAG may use operations and
1640 // types that are not supported by the target.
1641 BuildSelectionDAG(DAG, LLVMBB, PHINodesToUpdate, FuncInfo);
1643 // Run the DAG combiner in pre-legalize mode.
1646 DEBUG(std::cerr << "Lowered selection DAG:\n");
1649 // Second step, hack on the DAG until it only uses operations and types that
1650 // the target supports.
1653 DEBUG(std::cerr << "Legalized selection DAG:\n");
1656 // Run the DAG combiner in post-legalize mode.
1659 if (ViewDAGs) DAG.viewGraph();
1661 // Third, instruction select all of the operations to machine code, adding the
1662 // code to the MachineBasicBlock.
1663 InstructionSelectBasicBlock(DAG);
1665 DEBUG(std::cerr << "Selected machine code:\n");
1668 // Next, now that we know what the last MBB the LLVM BB expanded is, update
1669 // PHI nodes in successors.
1670 for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i) {
1671 MachineInstr *PHI = PHINodesToUpdate[i].first;
1672 assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
1673 "This is not a machine PHI node that we are updating!");
1674 PHI->addRegOperand(PHINodesToUpdate[i].second);
1675 PHI->addMachineBasicBlockOperand(BB);
1678 // Finally, add the CFG edges from the last selected MBB to the successor
1680 TerminatorInst *TI = LLVMBB->getTerminator();
1681 for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i) {
1682 MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[TI->getSuccessor(i)];
1683 BB->addSuccessor(Succ0MBB);