1 //===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the TargetLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetLowering.h"
15 #include "llvm/Target/TargetMachine.h"
16 #include "llvm/Target/MRegisterInfo.h"
17 #include "llvm/CodeGen/SelectionDAG.h"
18 #include "llvm/ADT/StringExtras.h"
21 TargetLowering::TargetLowering(TargetMachine &tm)
22 : TM(tm), TD(TM.getTargetData()) {
23 assert(ISD::BUILTIN_OP_END <= 128 &&
24 "Fixed size array in TargetLowering is not large enough!");
25 // All operations default to being supported.
26 memset(OpActions, 0, sizeof(OpActions));
28 IsLittleEndian = TD.isLittleEndian();
29 ShiftAmountTy = SetCCResultTy = PointerTy = getValueType(TD.getIntPtrType());
30 ShiftAmtHandling = Undefined;
31 memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*));
32 maxStoresPerMemSet = maxStoresPerMemCpy = maxStoresPerMemMove = 8;
33 allowUnalignedMemoryAccesses = false;
34 UseUnderscoreSetJmpLongJmp = false;
35 IntDivIsCheap = false;
36 Pow2DivIsCheap = false;
37 StackPointerRegisterToSaveRestore = 0;
38 SchedPreferenceInfo = SchedulingForLatency;
41 TargetLowering::~TargetLowering() {}
43 /// setValueTypeAction - Set the action for a particular value type. This
44 /// assumes an action has not already been set for this value type.
45 static void SetValueTypeAction(MVT::ValueType VT,
46 TargetLowering::LegalizeAction Action,
48 MVT::ValueType *TransformToType,
49 TargetLowering::ValueTypeActionImpl &ValueTypeActions) {
50 ValueTypeActions.setTypeAction(VT, Action);
51 if (Action == TargetLowering::Promote) {
52 MVT::ValueType PromoteTo;
56 unsigned LargerReg = VT+1;
57 while (!TLI.isTypeLegal((MVT::ValueType)LargerReg)) {
59 assert(MVT::isInteger((MVT::ValueType)LargerReg) &&
60 "Nothing to promote to??");
62 PromoteTo = (MVT::ValueType)LargerReg;
65 assert(MVT::isInteger(VT) == MVT::isInteger(PromoteTo) &&
66 MVT::isFloatingPoint(VT) == MVT::isFloatingPoint(PromoteTo) &&
67 "Can only promote from int->int or fp->fp!");
68 assert(VT < PromoteTo && "Must promote to a larger type!");
69 TransformToType[VT] = PromoteTo;
70 } else if (Action == TargetLowering::Expand) {
71 assert((VT == MVT::Vector || MVT::isInteger(VT)) && VT > MVT::i8 &&
72 "Cannot expand this type: target must support SOME integer reg!");
73 // Expand to the next smaller integer type!
74 TransformToType[VT] = (MVT::ValueType)(VT-1);
79 /// computeRegisterProperties - Once all of the register classes are added,
80 /// this allows us to compute derived properties we expose.
81 void TargetLowering::computeRegisterProperties() {
82 assert(MVT::LAST_VALUETYPE <= 32 &&
83 "Too many value types for ValueTypeActions to hold!");
85 // Everything defaults to one.
86 for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i)
87 NumElementsForVT[i] = 1;
89 // Find the largest integer register class.
90 unsigned LargestIntReg = MVT::i128;
91 for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
92 assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
94 // Every integer value type larger than this largest register takes twice as
95 // many registers to represent as the previous ValueType.
96 unsigned ExpandedReg = LargestIntReg; ++LargestIntReg;
97 for (++ExpandedReg; MVT::isInteger((MVT::ValueType)ExpandedReg);++ExpandedReg)
98 NumElementsForVT[ExpandedReg] = 2*NumElementsForVT[ExpandedReg-1];
100 // Inspect all of the ValueType's possible, deciding how to process them.
101 for (unsigned IntReg = MVT::i1; IntReg <= MVT::i128; ++IntReg)
102 // If we are expanding this type, expand it!
103 if (getNumElements((MVT::ValueType)IntReg) != 1)
104 SetValueTypeAction((MVT::ValueType)IntReg, Expand, *this, TransformToType,
106 else if (!isTypeLegal((MVT::ValueType)IntReg))
107 // Otherwise, if we don't have native support, we must promote to a
109 SetValueTypeAction((MVT::ValueType)IntReg, Promote, *this,
110 TransformToType, ValueTypeActions);
112 TransformToType[(MVT::ValueType)IntReg] = (MVT::ValueType)IntReg;
114 // If the target does not have native support for F32, promote it to F64.
115 if (!isTypeLegal(MVT::f32))
116 SetValueTypeAction(MVT::f32, Promote, *this,
117 TransformToType, ValueTypeActions);
119 TransformToType[MVT::f32] = MVT::f32;
121 // Set MVT::Vector to always be Expanded
122 SetValueTypeAction(MVT::Vector, Expand, *this, TransformToType,
125 assert(isTypeLegal(MVT::f64) && "Target does not support FP?");
126 TransformToType[MVT::f64] = MVT::f64;
129 const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
133 bool TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op,
135 MVIZFnPtr MVIZ) const {
139 std::vector<unsigned> TargetLowering::
140 getRegForInlineAsmConstraint(const std::string &Constraint) const {
141 // Scan to see if this constraint is a register name.
142 const MRegisterInfo *RI = TM.getRegisterInfo();
143 for (unsigned i = 1, e = RI->getNumRegs(); i != e; ++i) {
144 if (const char *Name = RI->get(i).Name)
145 if (StringsEqualNoCase(Constraint, Name))
146 return std::vector<unsigned>(1, i);
149 // Not a physreg, must not be a register reference or something.
150 return std::vector<unsigned>();