1 //===-- SimpleRegisterCoalescing.cpp - Register Coalescing ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register coalescing pass that attempts to
11 // aggressively coalesce every register copy that it can.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regcoalescing"
16 #include "SimpleRegisterCoalescing.h"
17 #include "VirtRegMap.h"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/Value.h"
20 #include "llvm/CodeGen/LiveVariables.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/CodeGen/RegisterCoalescer.h"
27 #include "llvm/Target/TargetInstrInfo.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/ADT/SmallSet.h"
32 #include "llvm/ADT/Statistic.h"
33 #include "llvm/ADT/STLExtras.h"
38 STATISTIC(numJoins , "Number of interval joins performed");
39 STATISTIC(numCommutes , "Number of instruction commuting performed");
40 STATISTIC(numExtends , "Number of copies extended");
41 STATISTIC(numPeep , "Number of identity moves eliminated after coalescing");
42 STATISTIC(numAborts , "Number of times interval joining aborted");
44 char SimpleRegisterCoalescing::ID = 0;
47 EnableJoining("join-liveintervals",
48 cl::desc("Coalesce copies (default=true)"),
52 NewHeuristic("new-coalescer-heuristic",
53 cl::desc("Use new coalescer heuristic"),
56 RegisterPass<SimpleRegisterCoalescing>
57 X("simple-register-coalescing", "Simple Register Coalescing");
59 // Declare that we implement the RegisterCoalescer interface
60 RegisterAnalysisGroup<RegisterCoalescer, true/*The Default*/> V(X);
63 const PassInfo *llvm::SimpleRegisterCoalescingID = X.getPassInfo();
65 void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
66 AU.addPreserved<LiveIntervals>();
67 AU.addPreserved<MachineLoopInfo>();
68 AU.addPreservedID(MachineDominatorsID);
69 AU.addPreservedID(PHIEliminationID);
70 AU.addPreservedID(TwoAddressInstructionPassID);
71 AU.addRequired<LiveVariables>();
72 AU.addRequired<LiveIntervals>();
73 AU.addRequired<MachineLoopInfo>();
74 MachineFunctionPass::getAnalysisUsage(AU);
77 /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy with IntA
78 /// being the source and IntB being the dest, thus this defines a value number
79 /// in IntB. If the source value number (in IntA) is defined by a copy from B,
80 /// see if we can merge these two pieces of B into a single value number,
81 /// eliminating a copy. For example:
85 /// B1 = A3 <- this copy
87 /// In this case, B0 can be extended to where the B1 copy lives, allowing the B1
88 /// value number to be replaced with B0 (which simplifies the B liveinterval).
90 /// This returns true if an interval was modified.
92 bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
94 MachineInstr *CopyMI) {
95 unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
97 // BValNo is a value number in B that is defined by a copy from A. 'B3' in
99 LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx);
100 VNInfo *BValNo = BLR->valno;
102 // Get the location that B is defined at. Two options: either this value has
103 // an unknown definition point or it is defined at CopyIdx. If unknown, we
105 if (!BValNo->copy) return false;
106 assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
108 // AValNo is the value number in A that defines the copy, A3 in the example.
109 LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1);
110 VNInfo *AValNo = ALR->valno;
112 // If AValNo is defined as a copy from IntB, we can potentially process this.
113 // Get the instruction that defines this value number.
114 unsigned SrcReg = li_->getVNInfoSourceReg(AValNo);
115 if (!SrcReg) return false; // Not defined by a copy.
117 // If the value number is not defined by a copy instruction, ignore it.
119 // If the source register comes from an interval other than IntB, we can't
121 if (SrcReg != IntB.reg) return false;
123 // Get the LiveRange in IntB that this value number starts with.
124 LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNo->def-1);
126 // Make sure that the end of the live range is inside the same block as
128 MachineInstr *ValLREndInst = li_->getInstructionFromIndex(ValLR->end-1);
130 ValLREndInst->getParent() != CopyMI->getParent()) return false;
132 // Okay, we now know that ValLR ends in the same block that the CopyMI
133 // live-range starts. If there are no intervening live ranges between them in
134 // IntB, we can merge them.
135 if (ValLR+1 != BLR) return false;
137 // If a live interval is a physical register, conservatively check if any
138 // of its sub-registers is overlapping the live interval of the virtual
139 // register. If so, do not coalesce.
140 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg) &&
141 *tri_->getSubRegisters(IntB.reg)) {
142 for (const unsigned* SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR)
143 if (li_->hasInterval(*SR) && IntA.overlaps(li_->getInterval(*SR))) {
144 DOUT << "Interfere with sub-register ";
145 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
150 DOUT << "\nExtending: "; IntB.print(DOUT, tri_);
152 unsigned FillerStart = ValLR->end, FillerEnd = BLR->start;
153 // We are about to delete CopyMI, so need to remove it as the 'instruction
154 // that defines this value #'. Update the the valnum with the new defining
156 BValNo->def = FillerStart;
159 // Okay, we can merge them. We need to insert a new liverange:
160 // [ValLR.end, BLR.begin) of either value number, then we merge the
161 // two value numbers.
162 IntB.addRange(LiveRange(FillerStart, FillerEnd, BValNo));
164 // If the IntB live range is assigned to a physical register, and if that
165 // physreg has aliases,
166 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
167 // Update the liveintervals of sub-registers.
168 for (const unsigned *AS = tri_->getSubRegisters(IntB.reg); *AS; ++AS) {
169 LiveInterval &AliasLI = li_->getInterval(*AS);
170 AliasLI.addRange(LiveRange(FillerStart, FillerEnd,
171 AliasLI.getNextValue(FillerStart, 0, li_->getVNInfoAllocator())));
175 // Okay, merge "B1" into the same value number as "B0".
176 if (BValNo != ValLR->valno)
177 IntB.MergeValueNumberInto(BValNo, ValLR->valno);
178 DOUT << " result = "; IntB.print(DOUT, tri_);
181 // If the source instruction was killing the source register before the
182 // merge, unset the isKill marker given the live range has been extended.
183 int UIdx = ValLREndInst->findRegisterUseOperandIdx(IntB.reg, true);
185 ValLREndInst->getOperand(UIdx).setIsKill(false);
191 /// HasOtherReachingDefs - Return true if there are definitions of IntB
192 /// other than BValNo val# that can reach uses of AValno val# of IntA.
193 bool SimpleRegisterCoalescing::HasOtherReachingDefs(LiveInterval &IntA,
197 for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
199 if (AI->valno != AValNo) continue;
200 LiveInterval::Ranges::iterator BI =
201 std::upper_bound(IntB.ranges.begin(), IntB.ranges.end(), AI->start);
202 if (BI != IntB.ranges.begin())
204 for (; BI != IntB.ranges.end() && AI->end >= BI->start; ++BI) {
205 if (BI->valno == BValNo)
207 if (BI->start <= AI->start && BI->end > AI->start)
209 if (BI->start > AI->start && BI->start < AI->end)
216 /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with IntA
217 /// being the source and IntB being the dest, thus this defines a value number
218 /// in IntB. If the source value number (in IntA) is defined by a commutable
219 /// instruction and its other operand is coalesced to the copy dest register,
220 /// see if we can transform the copy into a noop by commuting the definition. For
223 /// A3 = op A2 B0<kill>
225 /// B1 = A3 <- this copy
227 /// = op A3 <- more uses
231 /// B2 = op B0 A2<kill>
233 /// B1 = B2 <- now an identify copy
235 /// = op B2 <- more uses
237 /// This returns true if an interval was modified.
239 bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
241 MachineInstr *CopyMI) {
242 unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
244 // FIXME: For now, only eliminate the copy by commuting its def when the
245 // source register is a virtual register. We want to guard against cases
246 // where the copy is a back edge copy and commuting the def lengthen the
247 // live interval of the source register to the entire loop.
248 if (TargetRegisterInfo::isPhysicalRegister(IntA.reg))
251 // BValNo is a value number in B that is defined by a copy from A. 'B3' in
252 // the example above.
253 LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx);
254 VNInfo *BValNo = BLR->valno;
256 // Get the location that B is defined at. Two options: either this value has
257 // an unknown definition point or it is defined at CopyIdx. If unknown, we
259 if (!BValNo->copy) return false;
260 assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
262 // AValNo is the value number in A that defines the copy, A3 in the example.
263 LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1);
264 VNInfo *AValNo = ALR->valno;
265 // If other defs can reach uses of this def, then it's not safe to perform
267 if (AValNo->def == ~0U || AValNo->def == ~1U || AValNo->hasPHIKill)
269 MachineInstr *DefMI = li_->getInstructionFromIndex(AValNo->def);
270 const TargetInstrDesc &TID = DefMI->getDesc();
272 if (!TID.isCommutable() ||
273 !tii_->CommuteChangesDestination(DefMI, NewDstIdx))
276 MachineOperand &NewDstMO = DefMI->getOperand(NewDstIdx);
277 unsigned NewReg = NewDstMO.getReg();
278 if (NewReg != IntB.reg || !NewDstMO.isKill())
281 // Make sure there are no other definitions of IntB that would reach the
282 // uses which the new definition can reach.
283 if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
286 // At this point we have decided that it is legal to do this
287 // transformation. Start by commuting the instruction.
288 MachineBasicBlock *MBB = DefMI->getParent();
289 MachineInstr *NewMI = tii_->commuteInstruction(DefMI);
292 if (NewMI != DefMI) {
293 li_->ReplaceMachineInstrInMaps(DefMI, NewMI);
294 MBB->insert(DefMI, NewMI);
297 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
298 NewMI->getOperand(OpIdx).setIsKill();
300 bool BHasPHIKill = BValNo->hasPHIKill;
301 SmallVector<VNInfo*, 4> BDeadValNos;
302 SmallVector<unsigned, 4> BKills;
303 std::map<unsigned, unsigned> BExtend;
305 // If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
314 // then do not add kills of A to the newly created B interval.
315 bool Extended = BLR->end > ALR->end && ALR->end != ALR->start;
317 BExtend[ALR->end] = BLR->end;
319 // Update uses of IntA of the specific Val# with IntB.
320 for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(IntA.reg),
321 UE = mri_->use_end(); UI != UE;) {
322 MachineOperand &UseMO = UI.getOperand();
323 MachineInstr *UseMI = &*UI;
325 if (JoinedCopies.count(UseMI))
327 unsigned UseIdx = li_->getInstructionIndex(UseMI);
328 LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx);
329 if (ULR->valno != AValNo)
331 UseMO.setReg(NewReg);
334 if (UseMO.isKill()) {
336 UseMO.setIsKill(false);
338 BKills.push_back(li_->getUseIndex(UseIdx)+1);
340 unsigned SrcReg, DstReg;
341 if (!tii_->isMoveInstr(*UseMI, SrcReg, DstReg))
343 if (DstReg == IntB.reg) {
344 // This copy will become a noop. If it's defining a new val#,
345 // remove that val# as well. However this live range is being
346 // extended to the end of the existing live range defined by the copy.
347 unsigned DefIdx = li_->getDefIndex(UseIdx);
348 LiveInterval::iterator DLR = IntB.FindLiveRangeContaining(DefIdx);
349 BHasPHIKill |= DLR->valno->hasPHIKill;
350 assert(DLR->valno->def == DefIdx);
351 BDeadValNos.push_back(DLR->valno);
352 BExtend[DLR->start] = DLR->end;
353 JoinedCopies.insert(UseMI);
354 // If this is a kill but it's going to be removed, the last use
355 // of the same val# is the new kill.
361 // We need to insert a new liverange: [ALR.start, LastUse). It may be we can
362 // simply extend BLR if CopyMI doesn't end the range.
363 DOUT << "\nExtending: "; IntB.print(DOUT, tri_);
365 IntB.removeValNo(BValNo);
366 for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i)
367 IntB.removeValNo(BDeadValNos[i]);
368 VNInfo *ValNo = IntB.getNextValue(ALR->start, 0, li_->getVNInfoAllocator());
369 for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
371 if (AI->valno != AValNo) continue;
372 unsigned End = AI->end;
373 std::map<unsigned, unsigned>::iterator EI = BExtend.find(End);
374 if (EI != BExtend.end())
376 IntB.addRange(LiveRange(AI->start, End, ValNo));
378 IntB.addKills(ValNo, BKills);
379 ValNo->hasPHIKill = BHasPHIKill;
381 DOUT << " result = "; IntB.print(DOUT, tri_);
384 DOUT << "\nShortening: "; IntA.print(DOUT, tri_);
385 IntA.removeValNo(AValNo);
386 DOUT << " result = "; IntA.print(DOUT, tri_);
393 /// isBackEdgeCopy - Returns true if CopyMI is a back edge copy.
395 bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI,
397 MachineBasicBlock *MBB = CopyMI->getParent();
398 const MachineLoop *L = loopInfo->getLoopFor(MBB);
401 if (MBB != L->getLoopLatch())
404 LiveInterval &LI = li_->getInterval(DstReg);
405 unsigned DefIdx = li_->getInstructionIndex(CopyMI);
406 LiveInterval::const_iterator DstLR =
407 LI.FindLiveRangeContaining(li_->getDefIndex(DefIdx));
408 if (DstLR == LI.end())
410 unsigned KillIdx = li_->getInstructionIndex(&MBB->back()) + InstrSlots::NUM;
411 if (DstLR->valno->kills.size() == 1 &&
412 DstLR->valno->kills[0] == KillIdx && DstLR->valno->hasPHIKill)
417 /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
418 /// update the subregister number if it is not zero. If DstReg is a
419 /// physical register and the existing subregister number of the def / use
420 /// being updated is not zero, make sure to set it to the correct physical
423 SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
425 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
426 if (DstIsPhys && SubIdx) {
427 // Figure out the real physical register we are updating with.
428 DstReg = tri_->getSubReg(DstReg, SubIdx);
432 for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(SrcReg),
433 E = mri_->reg_end(); I != E; ) {
434 MachineOperand &O = I.getOperand();
437 unsigned UseSubIdx = O.getSubReg();
438 unsigned UseDstReg = DstReg;
440 UseDstReg = tri_->getSubReg(DstReg, UseSubIdx);
444 unsigned OldSubIdx = O.getSubReg();
445 // Sub-register indexes goes from small to large. e.g.
446 // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX
447 // EAX: 0 -> AL, 1 -> AH, 2 -> AX
448 // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
449 // sub-register 2 is also AX.
450 if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
451 assert(OldSubIdx < SubIdx && "Conflicting sub-register index!");
459 /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate
460 /// due to live range lengthening as the result of coalescing.
461 void SimpleRegisterCoalescing::RemoveUnnecessaryKills(unsigned Reg,
463 for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg),
464 UE = mri_->use_end(); UI != UE; ++UI) {
465 MachineOperand &UseMO = UI.getOperand();
466 if (UseMO.isKill()) {
467 MachineInstr *UseMI = UseMO.getParent();
469 if (!tii_->isMoveInstr(*UseMI, SReg, DReg))
471 unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI));
472 if (JoinedCopies.count(UseMI))
474 LiveInterval::const_iterator UI = LI.FindLiveRangeContaining(UseIdx);
475 assert(UI != LI.end());
476 if (!LI.isKill(UI->valno, UseIdx+1))
477 UseMO.setIsKill(false);
482 /// removeRange - Wrapper for LiveInterval::removeRange. This removes a range
483 /// from a physical register live interval as well as from the live intervals
484 /// of its sub-registers.
485 static void removeRange(LiveInterval &li, unsigned Start, unsigned End,
486 LiveIntervals *li_, const TargetRegisterInfo *tri_) {
487 li.removeRange(Start, End, true);
488 if (TargetRegisterInfo::isPhysicalRegister(li.reg)) {
489 for (const unsigned* SR = tri_->getSubRegisters(li.reg); *SR; ++SR) {
490 if (!li_->hasInterval(*SR))
492 LiveInterval &sli = li_->getInterval(*SR);
493 unsigned RemoveEnd = Start;
494 while (RemoveEnd != End) {
495 LiveInterval::iterator LR = sli.FindLiveRangeContaining(Start);
498 RemoveEnd = (LR->end < End) ? LR->end : End;
499 sli.removeRange(Start, RemoveEnd, true);
506 /// removeIntervalIfEmpty - Check if the live interval of a physical register
507 /// is empty, if so remove it and also remove the empty intervals of its
509 static void removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_,
510 const TargetRegisterInfo *tri_) {
512 li_->removeInterval(li.reg);
513 if (TargetRegisterInfo::isPhysicalRegister(li.reg))
514 for (const unsigned* SR = tri_->getSubRegisters(li.reg); *SR; ++SR) {
515 if (!li_->hasInterval(*SR))
517 LiveInterval &sli = li_->getInterval(*SR);
519 li_->removeInterval(*SR);
524 /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
526 void SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li,
527 MachineInstr *CopyMI) {
528 unsigned CopyIdx = li_->getInstructionIndex(CopyMI);
529 LiveInterval::iterator MLR =
530 li.FindLiveRangeContaining(li_->getDefIndex(CopyIdx));
532 return; // Already removed by ShortenDeadCopySrcLiveRange.
533 unsigned RemoveStart = MLR->start;
534 unsigned RemoveEnd = MLR->end;
535 // Remove the liverange that's defined by this.
536 if (RemoveEnd == li_->getDefIndex(CopyIdx)+1) {
537 removeRange(li, RemoveStart, RemoveEnd, li_, tri_);
538 removeIntervalIfEmpty(li, li_, tri_);
542 /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
543 /// extended by a dead copy. Mark the last use (if any) of the val# as kill
544 /// as ends the live range there. If there isn't another use, then this
545 /// live range is dead.
547 SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li,
548 MachineInstr *CopyMI) {
549 unsigned CopyIdx = li_->getInstructionIndex(CopyMI);
551 // FIXME: special case: function live in. It can be a general case if the
552 // first instruction index starts at > 0 value.
553 assert(TargetRegisterInfo::isPhysicalRegister(li.reg));
554 // Live-in to the function but dead. Remove it from entry live-in set.
555 mf_->begin()->removeLiveIn(li.reg);
556 LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx);
557 removeRange(li, LR->start, LR->end, li_, tri_);
558 removeIntervalIfEmpty(li, li_, tri_);
562 LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx-1);
564 // Livein but defined by a phi.
567 unsigned RemoveStart = LR->start;
568 unsigned RemoveEnd = li_->getDefIndex(CopyIdx)+1;
569 if (LR->end > RemoveEnd)
570 // More uses past this copy? Nothing to do.
574 MachineOperand *LastUse =
575 lastRegisterUse(LR->start, CopyIdx-1, li.reg, LastUseIdx);
577 // There are uses before the copy, just shorten the live range to the end
579 LastUse->setIsKill();
580 MachineInstr *LastUseMI = LastUse->getParent();
581 removeRange(li, li_->getDefIndex(LastUseIdx), LR->end, li_, tri_);
582 unsigned SrcReg, DstReg;
583 if (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg) &&
585 // Last use is itself an identity code.
586 int DeadIdx = LastUseMI->findRegisterDefOperandIdx(li.reg, false, tri_);
587 LastUseMI->getOperand(DeadIdx).setIsDead();
593 MachineBasicBlock *CopyMBB = CopyMI->getParent();
594 unsigned MBBStart = li_->getMBBStartIdx(CopyMBB);
595 if (LR->start <= MBBStart && LR->end > MBBStart) {
596 if (LR->start == 0) {
597 assert(TargetRegisterInfo::isPhysicalRegister(li.reg));
598 // Live-in to the function but dead. Remove it from entry live-in set.
599 mf_->begin()->removeLiveIn(li.reg);
601 removeRange(li, LR->start, LR->end, li_, tri_);
602 // FIXME: Shorten intervals in BBs that reaches this BB.
604 // Not livein into BB.
605 MachineInstr *DefMI =
606 li_->getInstructionFromIndex(li_->getDefIndex(RemoveStart));
607 if (DefMI && DefMI != CopyMI) {
608 int DeadIdx = DefMI->findRegisterDefOperandIdx(li.reg, false, tri_);
610 DefMI->getOperand(DeadIdx).setIsDead();
611 // A dead def should have a single cycle interval.
615 removeRange(li, RemoveStart, LR->end, li_, tri_);
618 removeIntervalIfEmpty(li, li_, tri_);
621 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
622 /// which are the src/dst of the copy instruction CopyMI. This returns true
623 /// if the copy was successfully coalesced away. If it is not currently
624 /// possible to coalesce this interval, but it may be possible if other
625 /// things get coalesced, then it returns true by reference in 'Again'.
626 bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
627 MachineInstr *CopyMI = TheCopy.MI;
630 if (JoinedCopies.count(CopyMI))
631 return false; // Already done.
633 DOUT << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI;
637 bool isExtSubReg = CopyMI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG;
640 DstReg = CopyMI->getOperand(0).getReg();
641 SrcReg = CopyMI->getOperand(1).getReg();
642 } else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg)) {
643 assert(0 && "Unrecognized copy instruction!");
647 // If they are already joined we continue.
648 if (SrcReg == DstReg) {
649 DOUT << "\tCopy already coalesced.\n";
650 return false; // Not coalescable.
653 bool SrcIsPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg);
654 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
656 // If they are both physical registers, we cannot join them.
657 if (SrcIsPhys && DstIsPhys) {
658 DOUT << "\tCan not coalesce physregs.\n";
659 return false; // Not coalescable.
662 // We only join virtual registers with allocatable physical registers.
663 if (SrcIsPhys && !allocatableRegs_[SrcReg]) {
664 DOUT << "\tSrc reg is unallocatable physreg.\n";
665 return false; // Not coalescable.
667 if (DstIsPhys && !allocatableRegs_[DstReg]) {
668 DOUT << "\tDst reg is unallocatable physreg.\n";
669 return false; // Not coalescable.
672 unsigned RealDstReg = 0;
674 SubIdx = CopyMI->getOperand(2).getImm();
676 // r1024 = EXTRACT_SUBREG EAX, 0 then r1024 is really going to be
677 // coalesced with AX.
678 SrcReg = tri_->getSubReg(SrcReg, SubIdx);
680 } else if (DstIsPhys) {
681 // If this is a extract_subreg where dst is a physical register, e.g.
682 // cl = EXTRACT_SUBREG reg1024, 1
683 // then create and update the actual physical register allocated to RHS.
684 const TargetRegisterClass *RC = mri_->getRegClass(SrcReg);
685 for (const unsigned *SRs = tri_->getSuperRegisters(DstReg);
686 unsigned SR = *SRs; ++SRs) {
687 if (DstReg == tri_->getSubReg(SR, SubIdx) &&
693 assert(RealDstReg && "Invalid extra_subreg instruction!");
695 // For this type of EXTRACT_SUBREG, conservatively
696 // check if the live interval of the source register interfere with the
697 // actual super physical register we are trying to coalesce with.
698 LiveInterval &RHS = li_->getInterval(SrcReg);
699 if (li_->hasInterval(RealDstReg) &&
700 RHS.overlaps(li_->getInterval(RealDstReg))) {
701 DOUT << "Interfere with register ";
702 DEBUG(li_->getInterval(RealDstReg).print(DOUT, tri_));
703 return false; // Not coalescable
705 for (const unsigned* SR = tri_->getSubRegisters(RealDstReg); *SR; ++SR)
706 if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
707 DOUT << "Interfere with sub-register ";
708 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
709 return false; // Not coalescable
713 unsigned SrcSize= li_->getInterval(SrcReg).getSize() / InstrSlots::NUM;
714 unsigned DstSize= li_->getInterval(DstReg).getSize() / InstrSlots::NUM;
715 const TargetRegisterClass *RC = mri_->getRegClass(DstReg);
716 unsigned Threshold = allocatableRCRegs_[RC].count();
717 // Be conservative. If both sides are virtual registers, do not coalesce
718 // if this will cause a high use density interval to target a smaller set
720 if (DstSize > Threshold || SrcSize > Threshold) {
721 LiveVariables::VarInfo &svi = lv_->getVarInfo(SrcReg);
722 LiveVariables::VarInfo &dvi = lv_->getVarInfo(DstReg);
723 if ((float)dvi.NumUses / DstSize < (float)svi.NumUses / SrcSize) {
724 Again = true; // May be possible to coalesce later.
729 } else if (differingRegisterClasses(SrcReg, DstReg)) {
730 // FIXME: What if the resul of a EXTRACT_SUBREG is then coalesced
731 // with another? If it's the resulting destination register, then
732 // the subidx must be propagated to uses (but only those defined
733 // by the EXTRACT_SUBREG). If it's being coalesced into another
734 // register, it should be safe because register is assumed to have
735 // the register class of the super-register.
737 // If they are not of the same register class, we cannot join them.
738 DOUT << "\tSrc/Dest are different register classes.\n";
739 // Allow the coalescer to try again in case either side gets coalesced to
740 // a physical register that's compatible with the other side. e.g.
741 // r1024 = MOV32to32_ r1025
742 // but later r1024 is assigned EAX then r1025 may be coalesced with EAX.
743 Again = true; // May be possible to coalesce later.
747 LiveInterval &SrcInt = li_->getInterval(SrcReg);
748 LiveInterval &DstInt = li_->getInterval(DstReg);
749 assert(SrcInt.reg == SrcReg && DstInt.reg == DstReg &&
750 "Register mapping is horribly broken!");
752 DOUT << "\t\tInspecting "; SrcInt.print(DOUT, tri_);
753 DOUT << " and "; DstInt.print(DOUT, tri_);
756 // Check if it is necessary to propagate "isDead" property.
757 MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false);
758 bool isDead = mopd->isDead();
760 // We need to be careful about coalescing a source physical register with a
761 // virtual register. Once the coalescing is done, it cannot be broken and
762 // these are not spillable! If the destination interval uses are far away,
763 // think twice about coalescing them!
764 if (!isDead && (SrcIsPhys || DstIsPhys) && !isExtSubReg) {
765 LiveInterval &JoinVInt = SrcIsPhys ? DstInt : SrcInt;
766 unsigned JoinVReg = SrcIsPhys ? DstReg : SrcReg;
767 unsigned JoinPReg = SrcIsPhys ? SrcReg : DstReg;
768 const TargetRegisterClass *RC = mri_->getRegClass(JoinVReg);
769 unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
770 if (TheCopy.isBackEdge)
771 Threshold *= 2; // Favors back edge copies.
773 // If the virtual register live interval is long but it has low use desity,
774 // do not join them, instead mark the physical register as its allocation
776 unsigned Length = JoinVInt.getSize() / InstrSlots::NUM;
777 LiveVariables::VarInfo &vi = lv_->getVarInfo(JoinVReg);
778 if (Length > Threshold &&
779 (((float)vi.NumUses / Length) < (1.0 / Threshold))) {
780 JoinVInt.preference = JoinPReg;
782 DOUT << "\tMay tie down a physical register, abort!\n";
783 Again = true; // May be possible to coalesce later.
788 // Okay, attempt to join these two intervals. On failure, this returns false.
789 // Otherwise, if one of the intervals being joined is a physreg, this method
790 // always canonicalizes DstInt to be it. The output "SrcInt" will not have
791 // been modified, so we can use this information below to update aliases.
792 bool Swapped = false;
793 if (!JoinIntervals(DstInt, SrcInt, Swapped)) {
794 // Coalescing failed.
796 // If we can eliminate the copy without merging the live ranges, do so now.
798 (AdjustCopiesBackFrom(SrcInt, DstInt, CopyMI) ||
799 RemoveCopyByCommutingDef(SrcInt, DstInt, CopyMI))) {
800 JoinedCopies.insert(CopyMI);
804 // Otherwise, we are unable to join the intervals.
805 DOUT << "Interference!\n";
806 Again = true; // May be possible to coalesce later.
810 LiveInterval *ResSrcInt = &SrcInt;
811 LiveInterval *ResDstInt = &DstInt;
813 std::swap(SrcReg, DstReg);
814 std::swap(ResSrcInt, ResDstInt);
816 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
817 "LiveInterval::join didn't work right!");
819 // If we're about to merge live ranges into a physical register live range,
820 // we have to update any aliased register's live ranges to indicate that they
821 // have clobbered values for this range.
822 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) {
823 // If this is a extract_subreg where dst is a physical register, e.g.
824 // cl = EXTRACT_SUBREG reg1024, 1
825 // then create and update the actual physical register allocated to RHS.
827 LiveInterval &RealDstInt = li_->getOrCreateInterval(RealDstReg);
828 SmallSet<const VNInfo*, 4> CopiedValNos;
829 for (LiveInterval::Ranges::const_iterator I = ResSrcInt->ranges.begin(),
830 E = ResSrcInt->ranges.end(); I != E; ++I) {
831 LiveInterval::const_iterator DstLR =
832 ResDstInt->FindLiveRangeContaining(I->start);
833 assert(DstLR != ResDstInt->end() && "Invalid joined interval!");
834 const VNInfo *DstValNo = DstLR->valno;
835 if (CopiedValNos.insert(DstValNo)) {
836 VNInfo *ValNo = RealDstInt.getNextValue(DstValNo->def, DstValNo->copy,
837 li_->getVNInfoAllocator());
838 ValNo->hasPHIKill = DstValNo->hasPHIKill;
839 RealDstInt.addKills(ValNo, DstValNo->kills);
840 RealDstInt.MergeValueInAsValue(*ResDstInt, DstValNo, ValNo);
846 // Update the liveintervals of sub-registers.
847 for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS)
848 li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt,
849 li_->getVNInfoAllocator());
851 // Merge use info if the destination is a virtual register.
852 LiveVariables::VarInfo& dVI = lv_->getVarInfo(DstReg);
853 LiveVariables::VarInfo& sVI = lv_->getVarInfo(SrcReg);
854 dVI.NumUses += sVI.NumUses;
857 // If this is a EXTRACT_SUBREG, make sure the result of coalescing is the
858 // larger super-register.
859 if (isExtSubReg && !SrcIsPhys && !DstIsPhys) {
861 ResSrcInt->Copy(*ResDstInt, li_->getVNInfoAllocator());
862 std::swap(SrcReg, DstReg);
863 std::swap(ResSrcInt, ResDstInt);
868 // Add all copies that define val# in the source interval into the queue.
869 for (LiveInterval::const_vni_iterator i = ResSrcInt->vni_begin(),
870 e = ResSrcInt->vni_end(); i != e; ++i) {
871 const VNInfo *vni = *i;
872 if (!vni->def || vni->def == ~1U || vni->def == ~0U)
874 MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def);
875 unsigned NewSrcReg, NewDstReg;
877 JoinedCopies.count(CopyMI) == 0 &&
878 tii_->isMoveInstr(*CopyMI, NewSrcReg, NewDstReg)) {
879 unsigned LoopDepth = loopInfo->getLoopDepth(CopyMI->getParent());
880 JoinQueue->push(CopyRec(CopyMI, LoopDepth,
881 isBackEdgeCopy(CopyMI, DstReg)));
886 DOUT << "\n\t\tJoined. Result = "; ResDstInt->print(DOUT, tri_);
889 // Remember to delete the copy instruction.
890 JoinedCopies.insert(CopyMI);
892 // Some live range has been lengthened due to colaescing, eliminate the
893 // unnecessary kills.
894 RemoveUnnecessaryKills(SrcReg, *ResDstInt);
895 if (TargetRegisterInfo::isVirtualRegister(DstReg))
896 RemoveUnnecessaryKills(DstReg, *ResDstInt);
898 // SrcReg is guarateed to be the register whose live interval that is
900 li_->removeInterval(SrcReg);
901 UpdateRegDefsUses(SrcReg, DstReg, SubIdx);
907 /// ComputeUltimateVN - Assuming we are going to join two live intervals,
908 /// compute what the resultant value numbers for each value in the input two
909 /// ranges will be. This is complicated by copies between the two which can
910 /// and will commonly cause multiple value numbers to be merged into one.
912 /// VN is the value number that we're trying to resolve. InstDefiningValue
913 /// keeps track of the new InstDefiningValue assignment for the result
914 /// LiveInterval. ThisFromOther/OtherFromThis are sets that keep track of
915 /// whether a value in this or other is a copy from the opposite set.
916 /// ThisValNoAssignments/OtherValNoAssignments keep track of value #'s that have
917 /// already been assigned.
919 /// ThisFromOther[x] - If x is defined as a copy from the other interval, this
920 /// contains the value number the copy is from.
922 static unsigned ComputeUltimateVN(VNInfo *VNI,
923 SmallVector<VNInfo*, 16> &NewVNInfo,
924 DenseMap<VNInfo*, VNInfo*> &ThisFromOther,
925 DenseMap<VNInfo*, VNInfo*> &OtherFromThis,
926 SmallVector<int, 16> &ThisValNoAssignments,
927 SmallVector<int, 16> &OtherValNoAssignments) {
928 unsigned VN = VNI->id;
930 // If the VN has already been computed, just return it.
931 if (ThisValNoAssignments[VN] >= 0)
932 return ThisValNoAssignments[VN];
933 // assert(ThisValNoAssignments[VN] != -2 && "Cyclic case?");
935 // If this val is not a copy from the other val, then it must be a new value
936 // number in the destination.
937 DenseMap<VNInfo*, VNInfo*>::iterator I = ThisFromOther.find(VNI);
938 if (I == ThisFromOther.end()) {
939 NewVNInfo.push_back(VNI);
940 return ThisValNoAssignments[VN] = NewVNInfo.size()-1;
942 VNInfo *OtherValNo = I->second;
944 // Otherwise, this *is* a copy from the RHS. If the other side has already
945 // been computed, return it.
946 if (OtherValNoAssignments[OtherValNo->id] >= 0)
947 return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo->id];
949 // Mark this value number as currently being computed, then ask what the
950 // ultimate value # of the other value is.
951 ThisValNoAssignments[VN] = -2;
952 unsigned UltimateVN =
953 ComputeUltimateVN(OtherValNo, NewVNInfo, OtherFromThis, ThisFromOther,
954 OtherValNoAssignments, ThisValNoAssignments);
955 return ThisValNoAssignments[VN] = UltimateVN;
958 static bool InVector(VNInfo *Val, const SmallVector<VNInfo*, 8> &V) {
959 return std::find(V.begin(), V.end(), Val) != V.end();
962 /// SimpleJoin - Attempt to joint the specified interval into this one. The
963 /// caller of this method must guarantee that the RHS only contains a single
964 /// value number and that the RHS is not defined by a copy from this
965 /// interval. This returns false if the intervals are not joinable, or it
966 /// joins them and returns true.
967 bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
968 assert(RHS.containsOneValue());
970 // Some number (potentially more than one) value numbers in the current
971 // interval may be defined as copies from the RHS. Scan the overlapping
972 // portions of the LHS and RHS, keeping track of this and looking for
973 // overlapping live ranges that are NOT defined as copies. If these exist, we
976 LiveInterval::iterator LHSIt = LHS.begin(), LHSEnd = LHS.end();
977 LiveInterval::iterator RHSIt = RHS.begin(), RHSEnd = RHS.end();
979 if (LHSIt->start < RHSIt->start) {
980 LHSIt = std::upper_bound(LHSIt, LHSEnd, RHSIt->start);
981 if (LHSIt != LHS.begin()) --LHSIt;
982 } else if (RHSIt->start < LHSIt->start) {
983 RHSIt = std::upper_bound(RHSIt, RHSEnd, LHSIt->start);
984 if (RHSIt != RHS.begin()) --RHSIt;
987 SmallVector<VNInfo*, 8> EliminatedLHSVals;
990 // Determine if these live intervals overlap.
991 bool Overlaps = false;
992 if (LHSIt->start <= RHSIt->start)
993 Overlaps = LHSIt->end > RHSIt->start;
995 Overlaps = RHSIt->end > LHSIt->start;
997 // If the live intervals overlap, there are two interesting cases: if the
998 // LHS interval is defined by a copy from the RHS, it's ok and we record
999 // that the LHS value # is the same as the RHS. If it's not, then we cannot
1000 // coalesce these live ranges and we bail out.
1002 // If we haven't already recorded that this value # is safe, check it.
1003 if (!InVector(LHSIt->valno, EliminatedLHSVals)) {
1004 // Copy from the RHS?
1005 unsigned SrcReg = li_->getVNInfoSourceReg(LHSIt->valno);
1006 if (SrcReg != RHS.reg)
1007 return false; // Nope, bail out.
1009 EliminatedLHSVals.push_back(LHSIt->valno);
1012 // We know this entire LHS live range is okay, so skip it now.
1013 if (++LHSIt == LHSEnd) break;
1017 if (LHSIt->end < RHSIt->end) {
1018 if (++LHSIt == LHSEnd) break;
1020 // One interesting case to check here. It's possible that we have
1021 // something like "X3 = Y" which defines a new value number in the LHS,
1022 // and is the last use of this liverange of the RHS. In this case, we
1023 // want to notice this copy (so that it gets coalesced away) even though
1024 // the live ranges don't actually overlap.
1025 if (LHSIt->start == RHSIt->end) {
1026 if (InVector(LHSIt->valno, EliminatedLHSVals)) {
1027 // We already know that this value number is going to be merged in
1028 // if coalescing succeeds. Just skip the liverange.
1029 if (++LHSIt == LHSEnd) break;
1031 // Otherwise, if this is a copy from the RHS, mark it as being merged
1033 if (li_->getVNInfoSourceReg(LHSIt->valno) == RHS.reg) {
1034 EliminatedLHSVals.push_back(LHSIt->valno);
1036 // We know this entire LHS live range is okay, so skip it now.
1037 if (++LHSIt == LHSEnd) break;
1042 if (++RHSIt == RHSEnd) break;
1046 // If we got here, we know that the coalescing will be successful and that
1047 // the value numbers in EliminatedLHSVals will all be merged together. Since
1048 // the most common case is that EliminatedLHSVals has a single number, we
1049 // optimize for it: if there is more than one value, we merge them all into
1050 // the lowest numbered one, then handle the interval as if we were merging
1051 // with one value number.
1053 if (EliminatedLHSVals.size() > 1) {
1054 // Loop through all the equal value numbers merging them into the smallest
1056 VNInfo *Smallest = EliminatedLHSVals[0];
1057 for (unsigned i = 1, e = EliminatedLHSVals.size(); i != e; ++i) {
1058 if (EliminatedLHSVals[i]->id < Smallest->id) {
1059 // Merge the current notion of the smallest into the smaller one.
1060 LHS.MergeValueNumberInto(Smallest, EliminatedLHSVals[i]);
1061 Smallest = EliminatedLHSVals[i];
1063 // Merge into the smallest.
1064 LHS.MergeValueNumberInto(EliminatedLHSVals[i], Smallest);
1067 LHSValNo = Smallest;
1069 assert(!EliminatedLHSVals.empty() && "No copies from the RHS?");
1070 LHSValNo = EliminatedLHSVals[0];
1073 // Okay, now that there is a single LHS value number that we're merging the
1074 // RHS into, update the value number info for the LHS to indicate that the
1075 // value number is defined where the RHS value number was.
1076 const VNInfo *VNI = RHS.getValNumInfo(0);
1077 LHSValNo->def = VNI->def;
1078 LHSValNo->copy = VNI->copy;
1080 // Okay, the final step is to loop over the RHS live intervals, adding them to
1082 LHSValNo->hasPHIKill |= VNI->hasPHIKill;
1083 LHS.addKills(LHSValNo, VNI->kills);
1084 LHS.MergeRangesInAsValue(RHS, LHSValNo);
1085 LHS.weight += RHS.weight;
1086 if (RHS.preference && !LHS.preference)
1087 LHS.preference = RHS.preference;
1092 /// JoinIntervals - Attempt to join these two intervals. On failure, this
1093 /// returns false. Otherwise, if one of the intervals being joined is a
1094 /// physreg, this method always canonicalizes LHS to be it. The output
1095 /// "RHS" will not have been modified, so we can use this information
1096 /// below to update aliases.
1097 bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS,
1098 LiveInterval &RHS, bool &Swapped) {
1099 // Compute the final value assignment, assuming that the live ranges can be
1101 SmallVector<int, 16> LHSValNoAssignments;
1102 SmallVector<int, 16> RHSValNoAssignments;
1103 DenseMap<VNInfo*, VNInfo*> LHSValsDefinedFromRHS;
1104 DenseMap<VNInfo*, VNInfo*> RHSValsDefinedFromLHS;
1105 SmallVector<VNInfo*, 16> NewVNInfo;
1107 // If a live interval is a physical register, conservatively check if any
1108 // of its sub-registers is overlapping the live interval of the virtual
1109 // register. If so, do not coalesce.
1110 if (TargetRegisterInfo::isPhysicalRegister(LHS.reg) &&
1111 *tri_->getSubRegisters(LHS.reg)) {
1112 for (const unsigned* SR = tri_->getSubRegisters(LHS.reg); *SR; ++SR)
1113 if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
1114 DOUT << "Interfere with sub-register ";
1115 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
1118 } else if (TargetRegisterInfo::isPhysicalRegister(RHS.reg) &&
1119 *tri_->getSubRegisters(RHS.reg)) {
1120 for (const unsigned* SR = tri_->getSubRegisters(RHS.reg); *SR; ++SR)
1121 if (li_->hasInterval(*SR) && LHS.overlaps(li_->getInterval(*SR))) {
1122 DOUT << "Interfere with sub-register ";
1123 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
1128 // Compute ultimate value numbers for the LHS and RHS values.
1129 if (RHS.containsOneValue()) {
1130 // Copies from a liveinterval with a single value are simple to handle and
1131 // very common, handle the special case here. This is important, because
1132 // often RHS is small and LHS is large (e.g. a physreg).
1134 // Find out if the RHS is defined as a copy from some value in the LHS.
1135 int RHSVal0DefinedFromLHS = -1;
1137 VNInfo *RHSValNoInfo = NULL;
1138 VNInfo *RHSValNoInfo0 = RHS.getValNumInfo(0);
1139 unsigned RHSSrcReg = li_->getVNInfoSourceReg(RHSValNoInfo0);
1140 if ((RHSSrcReg == 0 || RHSSrcReg != LHS.reg)) {
1141 // If RHS is not defined as a copy from the LHS, we can use simpler and
1142 // faster checks to see if the live ranges are coalescable. This joiner
1143 // can't swap the LHS/RHS intervals though.
1144 if (!TargetRegisterInfo::isPhysicalRegister(RHS.reg)) {
1145 return SimpleJoin(LHS, RHS);
1147 RHSValNoInfo = RHSValNoInfo0;
1150 // It was defined as a copy from the LHS, find out what value # it is.
1151 RHSValNoInfo = LHS.getLiveRangeContaining(RHSValNoInfo0->def-1)->valno;
1152 RHSValID = RHSValNoInfo->id;
1153 RHSVal0DefinedFromLHS = RHSValID;
1156 LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
1157 RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
1158 NewVNInfo.resize(LHS.getNumValNums(), NULL);
1160 // Okay, *all* of the values in LHS that are defined as a copy from RHS
1161 // should now get updated.
1162 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1165 unsigned VN = VNI->id;
1166 if (unsigned LHSSrcReg = li_->getVNInfoSourceReg(VNI)) {
1167 if (LHSSrcReg != RHS.reg) {
1168 // If this is not a copy from the RHS, its value number will be
1169 // unmodified by the coalescing.
1170 NewVNInfo[VN] = VNI;
1171 LHSValNoAssignments[VN] = VN;
1172 } else if (RHSValID == -1) {
1173 // Otherwise, it is a copy from the RHS, and we don't already have a
1174 // value# for it. Keep the current value number, but remember it.
1175 LHSValNoAssignments[VN] = RHSValID = VN;
1176 NewVNInfo[VN] = RHSValNoInfo;
1177 LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0;
1179 // Otherwise, use the specified value #.
1180 LHSValNoAssignments[VN] = RHSValID;
1181 if (VN == (unsigned)RHSValID) { // Else this val# is dead.
1182 NewVNInfo[VN] = RHSValNoInfo;
1183 LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0;
1187 NewVNInfo[VN] = VNI;
1188 LHSValNoAssignments[VN] = VN;
1192 assert(RHSValID != -1 && "Didn't find value #?");
1193 RHSValNoAssignments[0] = RHSValID;
1194 if (RHSVal0DefinedFromLHS != -1) {
1195 // This path doesn't go through ComputeUltimateVN so just set
1197 RHSValsDefinedFromLHS[RHSValNoInfo0] = (VNInfo*)1;
1200 // Loop over the value numbers of the LHS, seeing if any are defined from
1202 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1205 if (VNI->def == ~1U || VNI->copy == 0) // Src not defined by a copy?
1208 // DstReg is known to be a register in the LHS interval. If the src is
1209 // from the RHS interval, we can use its value #.
1210 if (li_->getVNInfoSourceReg(VNI) != RHS.reg)
1213 // Figure out the value # from the RHS.
1214 LHSValsDefinedFromRHS[VNI]=RHS.getLiveRangeContaining(VNI->def-1)->valno;
1217 // Loop over the value numbers of the RHS, seeing if any are defined from
1219 for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
1222 if (VNI->def == ~1U || VNI->copy == 0) // Src not defined by a copy?
1225 // DstReg is known to be a register in the RHS interval. If the src is
1226 // from the LHS interval, we can use its value #.
1227 if (li_->getVNInfoSourceReg(VNI) != LHS.reg)
1230 // Figure out the value # from the LHS.
1231 RHSValsDefinedFromLHS[VNI]=LHS.getLiveRangeContaining(VNI->def-1)->valno;
1234 LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
1235 RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
1236 NewVNInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums());
1238 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1241 unsigned VN = VNI->id;
1242 if (LHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
1244 ComputeUltimateVN(VNI, NewVNInfo,
1245 LHSValsDefinedFromRHS, RHSValsDefinedFromLHS,
1246 LHSValNoAssignments, RHSValNoAssignments);
1248 for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
1251 unsigned VN = VNI->id;
1252 if (RHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
1254 // If this value number isn't a copy from the LHS, it's a new number.
1255 if (RHSValsDefinedFromLHS.find(VNI) == RHSValsDefinedFromLHS.end()) {
1256 NewVNInfo.push_back(VNI);
1257 RHSValNoAssignments[VN] = NewVNInfo.size()-1;
1261 ComputeUltimateVN(VNI, NewVNInfo,
1262 RHSValsDefinedFromLHS, LHSValsDefinedFromRHS,
1263 RHSValNoAssignments, LHSValNoAssignments);
1267 // Armed with the mappings of LHS/RHS values to ultimate values, walk the
1268 // interval lists to see if these intervals are coalescable.
1269 LiveInterval::const_iterator I = LHS.begin();
1270 LiveInterval::const_iterator IE = LHS.end();
1271 LiveInterval::const_iterator J = RHS.begin();
1272 LiveInterval::const_iterator JE = RHS.end();
1274 // Skip ahead until the first place of potential sharing.
1275 if (I->start < J->start) {
1276 I = std::upper_bound(I, IE, J->start);
1277 if (I != LHS.begin()) --I;
1278 } else if (J->start < I->start) {
1279 J = std::upper_bound(J, JE, I->start);
1280 if (J != RHS.begin()) --J;
1284 // Determine if these two live ranges overlap.
1286 if (I->start < J->start) {
1287 Overlaps = I->end > J->start;
1289 Overlaps = J->end > I->start;
1292 // If so, check value # info to determine if they are really different.
1294 // If the live range overlap will map to the same value number in the
1295 // result liverange, we can still coalesce them. If not, we can't.
1296 if (LHSValNoAssignments[I->valno->id] !=
1297 RHSValNoAssignments[J->valno->id])
1301 if (I->end < J->end) {
1310 // Update kill info. Some live ranges are extended due to copy coalescing.
1311 for (DenseMap<VNInfo*, VNInfo*>::iterator I = LHSValsDefinedFromRHS.begin(),
1312 E = LHSValsDefinedFromRHS.end(); I != E; ++I) {
1313 VNInfo *VNI = I->first;
1314 unsigned LHSValID = LHSValNoAssignments[VNI->id];
1315 LiveInterval::removeKill(NewVNInfo[LHSValID], VNI->def);
1316 NewVNInfo[LHSValID]->hasPHIKill |= VNI->hasPHIKill;
1317 RHS.addKills(NewVNInfo[LHSValID], VNI->kills);
1320 // Update kill info. Some live ranges are extended due to copy coalescing.
1321 for (DenseMap<VNInfo*, VNInfo*>::iterator I = RHSValsDefinedFromLHS.begin(),
1322 E = RHSValsDefinedFromLHS.end(); I != E; ++I) {
1323 VNInfo *VNI = I->first;
1324 unsigned RHSValID = RHSValNoAssignments[VNI->id];
1325 LiveInterval::removeKill(NewVNInfo[RHSValID], VNI->def);
1326 NewVNInfo[RHSValID]->hasPHIKill |= VNI->hasPHIKill;
1327 LHS.addKills(NewVNInfo[RHSValID], VNI->kills);
1330 // If we get here, we know that we can coalesce the live ranges. Ask the
1331 // intervals to coalesce themselves now.
1332 if ((RHS.ranges.size() > LHS.ranges.size() &&
1333 TargetRegisterInfo::isVirtualRegister(LHS.reg)) ||
1334 TargetRegisterInfo::isPhysicalRegister(RHS.reg)) {
1335 RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], NewVNInfo);
1338 LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo);
1345 // DepthMBBCompare - Comparison predicate that sort first based on the loop
1346 // depth of the basic block (the unsigned), and then on the MBB number.
1347 struct DepthMBBCompare {
1348 typedef std::pair<unsigned, MachineBasicBlock*> DepthMBBPair;
1349 bool operator()(const DepthMBBPair &LHS, const DepthMBBPair &RHS) const {
1350 if (LHS.first > RHS.first) return true; // Deeper loops first
1351 return LHS.first == RHS.first &&
1352 LHS.second->getNumber() < RHS.second->getNumber();
1357 /// getRepIntervalSize - Returns the size of the interval that represents the
1358 /// specified register.
1360 unsigned JoinPriorityQueue<SF>::getRepIntervalSize(unsigned Reg) {
1361 return Rc->getRepIntervalSize(Reg);
1364 /// CopyRecSort::operator - Join priority queue sorting function.
1366 bool CopyRecSort::operator()(CopyRec left, CopyRec right) const {
1367 // Inner loops first.
1368 if (left.LoopDepth > right.LoopDepth)
1370 else if (left.LoopDepth == right.LoopDepth)
1371 if (left.isBackEdge && !right.isBackEdge)
1376 void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB,
1377 std::vector<CopyRec> &TryAgain) {
1378 DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
1380 std::vector<CopyRec> VirtCopies;
1381 std::vector<CopyRec> PhysCopies;
1382 unsigned LoopDepth = loopInfo->getLoopDepth(MBB);
1383 for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end();
1385 MachineInstr *Inst = MII++;
1387 // If this isn't a copy nor a extract_subreg, we can't join intervals.
1388 unsigned SrcReg, DstReg;
1389 if (Inst->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
1390 DstReg = Inst->getOperand(0).getReg();
1391 SrcReg = Inst->getOperand(1).getReg();
1392 } else if (!tii_->isMoveInstr(*Inst, SrcReg, DstReg))
1395 bool SrcIsPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg);
1396 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
1398 JoinQueue->push(CopyRec(Inst, LoopDepth, isBackEdgeCopy(Inst, DstReg)));
1400 if (SrcIsPhys || DstIsPhys)
1401 PhysCopies.push_back(CopyRec(Inst, 0, false));
1403 VirtCopies.push_back(CopyRec(Inst, 0, false));
1410 // Try coalescing physical register + virtual register first.
1411 for (unsigned i = 0, e = PhysCopies.size(); i != e; ++i) {
1412 CopyRec &TheCopy = PhysCopies[i];
1414 if (!JoinCopy(TheCopy, Again))
1416 TryAgain.push_back(TheCopy);
1418 for (unsigned i = 0, e = VirtCopies.size(); i != e; ++i) {
1419 CopyRec &TheCopy = VirtCopies[i];
1421 if (!JoinCopy(TheCopy, Again))
1423 TryAgain.push_back(TheCopy);
1427 void SimpleRegisterCoalescing::joinIntervals() {
1428 DOUT << "********** JOINING INTERVALS ***********\n";
1431 JoinQueue = new JoinPriorityQueue<CopyRecSort>(this);
1433 std::vector<CopyRec> TryAgainList;
1434 if (loopInfo->begin() == loopInfo->end()) {
1435 // If there are no loops in the function, join intervals in function order.
1436 for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();
1438 CopyCoalesceInMBB(I, TryAgainList);
1440 // Otherwise, join intervals in inner loops before other intervals.
1441 // Unfortunately we can't just iterate over loop hierarchy here because
1442 // there may be more MBB's than BB's. Collect MBB's for sorting.
1444 // Join intervals in the function prolog first. We want to join physical
1445 // registers with virtual registers before the intervals got too long.
1446 std::vector<std::pair<unsigned, MachineBasicBlock*> > MBBs;
1447 for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();I != E;++I){
1448 MachineBasicBlock *MBB = I;
1449 MBBs.push_back(std::make_pair(loopInfo->getLoopDepth(MBB), I));
1452 // Sort by loop depth.
1453 std::sort(MBBs.begin(), MBBs.end(), DepthMBBCompare());
1455 // Finally, join intervals in loop nest order.
1456 for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
1457 CopyCoalesceInMBB(MBBs[i].second, TryAgainList);
1460 // Joining intervals can allow other intervals to be joined. Iteratively join
1461 // until we make no progress.
1463 SmallVector<CopyRec, 16> TryAgain;
1464 bool ProgressMade = true;
1465 while (ProgressMade) {
1466 ProgressMade = false;
1467 while (!JoinQueue->empty()) {
1468 CopyRec R = JoinQueue->pop();
1470 bool Success = JoinCopy(R, Again);
1472 ProgressMade = true;
1474 TryAgain.push_back(R);
1478 while (!TryAgain.empty()) {
1479 JoinQueue->push(TryAgain.back());
1480 TryAgain.pop_back();
1485 bool ProgressMade = true;
1486 while (ProgressMade) {
1487 ProgressMade = false;
1489 for (unsigned i = 0, e = TryAgainList.size(); i != e; ++i) {
1490 CopyRec &TheCopy = TryAgainList[i];
1493 bool Success = JoinCopy(TheCopy, Again);
1494 if (Success || !Again) {
1495 TheCopy.MI = 0; // Mark this one as done.
1496 ProgressMade = true;
1507 /// Return true if the two specified registers belong to different register
1508 /// classes. The registers may be either phys or virt regs.
1509 bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA,
1510 unsigned RegB) const {
1512 // Get the register classes for the first reg.
1513 if (TargetRegisterInfo::isPhysicalRegister(RegA)) {
1514 assert(TargetRegisterInfo::isVirtualRegister(RegB) &&
1515 "Shouldn't consider two physregs!");
1516 return !mri_->getRegClass(RegB)->contains(RegA);
1519 // Compare against the regclass for the second reg.
1520 const TargetRegisterClass *RegClass = mri_->getRegClass(RegA);
1521 if (TargetRegisterInfo::isVirtualRegister(RegB))
1522 return RegClass != mri_->getRegClass(RegB);
1524 return !RegClass->contains(RegB);
1527 /// lastRegisterUse - Returns the last use of the specific register between
1528 /// cycles Start and End or NULL if there are no uses.
1530 SimpleRegisterCoalescing::lastRegisterUse(unsigned Start, unsigned End,
1531 unsigned Reg, unsigned &UseIdx) const{
1533 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
1534 MachineOperand *LastUse = NULL;
1535 for (MachineRegisterInfo::use_iterator I = mri_->use_begin(Reg),
1536 E = mri_->use_end(); I != E; ++I) {
1537 MachineOperand &Use = I.getOperand();
1538 MachineInstr *UseMI = Use.getParent();
1539 unsigned Idx = li_->getInstructionIndex(UseMI);
1540 if (Idx >= Start && Idx < End && Idx >= UseIdx) {
1548 int e = (End-1) / InstrSlots::NUM * InstrSlots::NUM;
1551 // Skip deleted instructions
1552 MachineInstr *MI = li_->getInstructionFromIndex(e);
1553 while ((e - InstrSlots::NUM) >= s && !MI) {
1554 e -= InstrSlots::NUM;
1555 MI = li_->getInstructionFromIndex(e);
1557 if (e < s || MI == NULL)
1560 for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) {
1561 MachineOperand &Use = MI->getOperand(i);
1562 if (Use.isRegister() && Use.isUse() && Use.getReg() &&
1563 tri_->regsOverlap(Use.getReg(), Reg)) {
1569 e -= InstrSlots::NUM;
1576 void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
1577 if (TargetRegisterInfo::isPhysicalRegister(reg))
1578 cerr << tri_->getName(reg);
1580 cerr << "%reg" << reg;
1583 void SimpleRegisterCoalescing::releaseMemory() {
1584 JoinedCopies.clear();
1587 static bool isZeroLengthInterval(LiveInterval *li) {
1588 for (LiveInterval::Ranges::const_iterator
1589 i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
1590 if (i->end - i->start > LiveIntervals::InstrSlots::NUM)
1595 bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
1597 mri_ = &fn.getRegInfo();
1598 tm_ = &fn.getTarget();
1599 tri_ = tm_->getRegisterInfo();
1600 tii_ = tm_->getInstrInfo();
1601 li_ = &getAnalysis<LiveIntervals>();
1602 lv_ = &getAnalysis<LiveVariables>();
1603 loopInfo = &getAnalysis<MachineLoopInfo>();
1605 DOUT << "********** SIMPLE REGISTER COALESCING **********\n"
1606 << "********** Function: "
1607 << ((Value*)mf_->getFunction())->getName() << '\n';
1609 allocatableRegs_ = tri_->getAllocatableSet(fn);
1610 for (TargetRegisterInfo::regclass_iterator I = tri_->regclass_begin(),
1611 E = tri_->regclass_end(); I != E; ++I)
1612 allocatableRCRegs_.insert(std::make_pair(*I,
1613 tri_->getAllocatableSet(fn, *I)));
1615 // Join (coalesce) intervals if requested.
1616 if (EnableJoining) {
1618 DOUT << "********** INTERVALS POST JOINING **********\n";
1619 for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I){
1620 I->second.print(DOUT, tri_);
1624 // Delete all coalesced copies.
1625 for (SmallPtrSet<MachineInstr*,32>::iterator I = JoinedCopies.begin(),
1626 E = JoinedCopies.end(); I != E; ++I) {
1627 MachineInstr *CopyMI = *I;
1628 unsigned SrcReg, DstReg;
1629 tii_->isMoveInstr(*CopyMI, SrcReg, DstReg);
1630 if (CopyMI->registerDefIsDead(DstReg)) {
1631 LiveInterval &li = li_->getInterval(DstReg);
1632 ShortenDeadCopySrcLiveRange(li, CopyMI);
1633 ShortenDeadCopyLiveRange(li, CopyMI);
1635 li_->RemoveMachineInstrFromMaps(*I);
1636 (*I)->eraseFromParent();
1641 // Perform a final pass over the instructions and compute spill weights
1642 // and remove identity moves.
1643 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
1644 mbbi != mbbe; ++mbbi) {
1645 MachineBasicBlock* mbb = mbbi;
1646 unsigned loopDepth = loopInfo->getLoopDepth(mbb);
1648 for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end();
1650 // if the move will be an identity move delete it
1651 unsigned srcReg, dstReg;
1652 if (tii_->isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) {
1653 if (li_->hasInterval(srcReg)) {
1654 LiveInterval &RegInt = li_->getInterval(srcReg);
1655 // If def of this move instruction is dead, remove its live range
1656 // from the dstination register's live interval.
1657 if (mii->registerDefIsDead(dstReg)) {
1658 ShortenDeadCopySrcLiveRange(RegInt, mii);
1659 ShortenDeadCopyLiveRange(RegInt, mii);
1662 li_->RemoveMachineInstrFromMaps(mii);
1663 mii = mbbi->erase(mii);
1666 SmallSet<unsigned, 4> UniqueUses;
1667 for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
1668 const MachineOperand &mop = mii->getOperand(i);
1669 if (mop.isRegister() && mop.getReg() &&
1670 TargetRegisterInfo::isVirtualRegister(mop.getReg())) {
1671 unsigned reg = mop.getReg();
1672 // Multiple uses of reg by the same instruction. It should not
1673 // contribute to spill weight again.
1674 if (UniqueUses.count(reg) != 0)
1676 LiveInterval &RegInt = li_->getInterval(reg);
1678 li_->getSpillWeight(mop.isDef(), mop.isUse(), loopDepth);
1679 UniqueUses.insert(reg);
1687 for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I) {
1688 LiveInterval &LI = I->second;
1689 if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
1690 // If the live interval length is essentially zero, i.e. in every live
1691 // range the use follows def immediately, it doesn't make sense to spill
1692 // it and hope it will be easier to allocate for this li.
1693 if (isZeroLengthInterval(&LI))
1694 LI.weight = HUGE_VALF;
1696 bool isLoad = false;
1697 if (li_->isReMaterializable(LI, isLoad)) {
1698 // If all of the definitions of the interval are re-materializable,
1699 // it is a preferred candidate for spilling. If non of the defs are
1700 // loads, then it's potentially very cheap to re-materialize.
1701 // FIXME: this gets much more complicated once we support non-trivial
1702 // re-materialization.
1710 // Slightly prefer live interval that has been assigned a preferred reg.
1714 // Divide the weight of the interval by its size. This encourages
1715 // spilling of intervals that are large and have few uses, and
1716 // discourages spilling of small intervals with many uses.
1717 LI.weight /= LI.getSize();
1725 /// print - Implement the dump method.
1726 void SimpleRegisterCoalescing::print(std::ostream &O, const Module* m) const {
1730 RegisterCoalescer* llvm::createSimpleRegisterCoalescer() {
1731 return new SimpleRegisterCoalescing();
1734 // Make sure that anything that uses RegisterCoalescer pulls in this file...
1735 DEFINING_FILE_FOR(SimpleRegisterCoalescing)