1 //===-- SimpleRegisterCoalescing.h - Register Coalescing --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register copy coalescing phase.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
15 #define LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/CodeGen/RegisterCoalescer.h"
20 #include "llvm/ADT/BitVector.h"
23 class SimpleRegisterCoalescing;
25 class TargetRegisterInfo;
26 class TargetInstrInfo;
28 class MachineLoopInfo;
30 /// CopyRec - Representation for copy instructions in coalescer queue.
35 CopyRec(MachineInstr *mi, unsigned depth)
36 : MI(mi), LoopDepth(depth) {}
39 class SimpleRegisterCoalescing : public MachineFunctionPass,
40 public RegisterCoalescer {
42 MachineRegisterInfo* mri_;
43 const TargetMachine* tm_;
44 const TargetRegisterInfo* tri_;
45 const TargetInstrInfo* tii_;
47 const MachineLoopInfo* loopInfo;
50 DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
52 /// JoinedCopies - Keep track of copies eliminated due to coalescing.
54 SmallPtrSet<MachineInstr*, 32> JoinedCopies;
56 /// ReMatCopies - Keep track of copies eliminated due to remat.
58 SmallPtrSet<MachineInstr*, 32> ReMatCopies;
60 /// ReMatDefs - Keep track of definition instructions which have
62 SmallPtrSet<MachineInstr*, 8> ReMatDefs;
65 static char ID; // Pass identifcation, replacement for typeid
66 SimpleRegisterCoalescing() : MachineFunctionPass(ID) {}
78 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
79 virtual void releaseMemory();
81 /// runOnMachineFunction - pass entry point
82 virtual bool runOnMachineFunction(MachineFunction&);
84 bool coalesceFunction(MachineFunction &mf, RegallocQuery &) {
85 // This runs as an independent pass, so don't do anything.
89 /// print - Implement the dump method.
90 virtual void print(raw_ostream &O, const Module* = 0) const;
93 /// joinIntervals - join compatible live intervals
96 /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
97 /// copies that cannot yet be coalesced into the "TryAgain" list.
98 void CopyCoalesceInMBB(MachineBasicBlock *MBB,
99 std::vector<CopyRec> &TryAgain);
101 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
102 /// which are the src/dst of the copy instruction CopyMI. This returns true
103 /// if the copy was successfully coalesced away. If it is not currently
104 /// possible to coalesce this interval, but it may be possible if other
105 /// things get coalesced, then it returns true by reference in 'Again'.
106 bool JoinCopy(CopyRec &TheCopy, bool &Again);
108 /// JoinIntervals - Attempt to join these two intervals. On failure, this
109 /// returns false. The output "SrcInt" will not have been modified, so we can
110 /// use this information below to update aliases.
111 bool JoinIntervals(CoalescerPair &CP);
113 /// Return true if the two specified registers belong to different register
114 /// classes. The registers may be either phys or virt regs.
115 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
117 /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
118 /// the source value number is defined by a copy from the destination reg
119 /// see if we can merge these two destination reg valno# into a single
120 /// value number, eliminating a copy.
121 bool AdjustCopiesBackFrom(const CoalescerPair &CP, MachineInstr *CopyMI);
123 /// HasOtherReachingDefs - Return true if there are definitions of IntB
124 /// other than BValNo val# that can reach uses of AValno val# of IntA.
125 bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
126 VNInfo *AValNo, VNInfo *BValNo);
128 /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
129 /// If the source value number is defined by a commutable instruction and
130 /// its other operand is coalesced to the copy dest register, see if we
131 /// can transform the copy into a noop by commuting the definition.
132 bool RemoveCopyByCommutingDef(const CoalescerPair &CP,MachineInstr *CopyMI);
134 /// TrimLiveIntervalToLastUse - If there is a last use in the same basic
135 /// block as the copy instruction, trim the ive interval to the last use
137 bool TrimLiveIntervalToLastUse(SlotIndex CopyIdx,
138 MachineBasicBlock *CopyMBB,
139 LiveInterval &li, const LiveRange *LR);
141 /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
142 /// computation, replace the copy by rematerialize the definition.
143 bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg,
144 unsigned DstSubIdx, MachineInstr *CopyMI);
146 /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
147 /// two virtual registers from different register classes.
148 bool isWinToJoinCrossClass(unsigned SrcReg,
150 const TargetRegisterClass *SrcRC,
151 const TargetRegisterClass *DstRC,
152 const TargetRegisterClass *NewRC);
154 /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
155 /// update the subregister number if it is not zero. If DstReg is a
156 /// physical register and the existing subregister number of the def / use
157 /// being updated is not zero, make sure to set it to the correct physical
159 void UpdateRegDefsUses(const CoalescerPair &CP);
161 /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
162 /// Return true if live interval is removed.
163 bool ShortenDeadCopyLiveRange(LiveInterval &li, MachineInstr *CopyMI);
165 /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
166 /// extended by a dead copy. Mark the last use (if any) of the val# as kill
167 /// as ends the live range there. If there isn't another use, then this
168 /// live range is dead. Return true if live interval is removed.
169 bool ShortenDeadCopySrcLiveRange(LiveInterval &li, MachineInstr *CopyMI);
171 /// RemoveDeadDef - If a def of a live interval is now determined dead,
172 /// remove the val# it defines. If the live interval becomes empty, remove
174 bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
176 /// RemoveCopyFlag - If DstReg is no longer defined by CopyMI, clear the
177 /// VNInfo copy flag for DstReg and all aliases.
178 void RemoveCopyFlag(unsigned DstReg, const MachineInstr *CopyMI);
180 /// lastRegisterUse - Returns the last use of the specific register between
181 /// cycles Start and End or NULL if there are no uses.
182 MachineOperand *lastRegisterUse(SlotIndex Start, SlotIndex End,
183 unsigned Reg, SlotIndex &LastUseIdx) const;
186 } // End llvm namespace