1 //===-- llvm/CodeGen/Spiller.cpp - Spiller -------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
12 #include "llvm/CodeGen/LiveRangeEdit.h"
13 #include "llvm/CodeGen/LiveStackAnalysis.h"
14 #include "llvm/CodeGen/MachineFrameInfo.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/CodeGen/MachineLoopInfo.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/VirtRegMap.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetInstrInfo.h"
28 #define DEBUG_TYPE "spiller"
31 enum SpillerName { trivial, inline_ };
34 static cl::opt<SpillerName>
36 cl::desc("Spiller to use: (default: standard)"),
38 cl::values(clEnumVal(trivial, "trivial spiller"),
39 clEnumValN(inline_, "inline", "inline spiller"),
43 // Spiller virtual destructor implementation.
44 Spiller::~Spiller() {}
48 /// Utility class for spillers.
49 class SpillerBase : public Spiller {
51 MachineFunctionPass *pass;
55 MachineFrameInfo *mfi;
56 MachineRegisterInfo *mri;
57 const TargetInstrInfo *tii;
58 const TargetRegisterInfo *tri;
60 /// Construct a spiller base.
61 SpillerBase(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm)
62 : pass(&pass), mf(&mf), vrm(&vrm)
64 lis = &pass.getAnalysis<LiveIntervals>();
65 mfi = mf.getFrameInfo();
66 mri = &mf.getRegInfo();
67 tii = mf.getSubtarget().getInstrInfo();
68 tri = mf.getSubtarget().getRegisterInfo();
71 /// Add spill ranges for every use/def of the live interval, inserting loads
72 /// immediately before each use, and stores after each def. No folding or
73 /// remat is attempted.
74 void trivialSpillEverywhere(LiveRangeEdit& LRE) {
75 LiveInterval* li = &LRE.getParent();
77 DEBUG(dbgs() << "Spilling everywhere " << *li << "\n");
79 assert(li->weight != llvm::huge_valf &&
80 "Attempting to spill already spilled value.");
82 assert(!TargetRegisterInfo::isStackSlot(li->reg) &&
83 "Trying to spill a stack slot.");
85 DEBUG(dbgs() << "Trivial spill everywhere of reg" << li->reg << "\n");
87 const TargetRegisterClass *trc = mri->getRegClass(li->reg);
88 unsigned ss = vrm->assignVirt2StackSlot(li->reg);
90 // Iterate over reg uses/defs.
91 for (MachineRegisterInfo::reg_instr_iterator
92 regItr = mri->reg_instr_begin(li->reg);
93 regItr != mri->reg_instr_end();) {
95 // Grab the use/def instr.
96 MachineInstr *mi = &*regItr;
98 DEBUG(dbgs() << " Processing " << *mi);
100 // Step regItr to the next use/def instr.
103 // Collect uses & defs for this instr.
104 SmallVector<unsigned, 2> indices;
107 for (unsigned i = 0; i != mi->getNumOperands(); ++i) {
108 MachineOperand &op = mi->getOperand(i);
109 if (!op.isReg() || op.getReg() != li->reg)
111 hasUse |= mi->getOperand(i).isUse();
112 hasDef |= mi->getOperand(i).isDef();
113 indices.push_back(i);
116 // Create a new virtual register for the load and/or store.
117 unsigned NewVReg = LRE.create();
119 // Update the reg operands & kill flags.
120 for (unsigned i = 0; i < indices.size(); ++i) {
121 unsigned mopIdx = indices[i];
122 MachineOperand &mop = mi->getOperand(mopIdx);
124 if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) {
128 assert(hasUse || hasDef);
130 // Insert reload if necessary.
131 MachineBasicBlock::iterator miItr(mi);
133 MachineInstrSpan MIS(miItr);
135 tii->loadRegFromStackSlot(*mi->getParent(), miItr, NewVReg, ss, trc,
137 lis->InsertMachineInstrRangeInMaps(MIS.begin(), miItr);
140 // Insert store if necessary.
142 MachineInstrSpan MIS(miItr);
144 tii->storeRegToStackSlot(*mi->getParent(), std::next(miItr), NewVReg,
146 lis->InsertMachineInstrRangeInMaps(std::next(miItr), MIS.end());
152 } // end anonymous namespace
156 /// Spills any live range using the spill-everywhere method with no attempt at
158 class TrivialSpiller : public SpillerBase {
161 TrivialSpiller(MachineFunctionPass &pass, MachineFunction &mf,
163 : SpillerBase(pass, mf, vrm) {}
165 void spill(LiveRangeEdit &LRE) override {
166 // Ignore spillIs - we don't use it.
167 trivialSpillEverywhere(LRE);
171 } // end anonymous namespace
173 void Spiller::anchor() { }
175 llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass,
178 switch (spillerOpt) {
179 case trivial: return new TrivialSpiller(pass, mf, vrm);
180 case inline_: return createInlineSpiller(pass, mf, vrm);
182 llvm_unreachable("Invalid spiller optimization");