1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/CodeGen/CalcSpillWeights.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetMachine.h"
34 AllowSplit("spiller-splits-edges",
35 cl::desc("Allow critical edge splitting during spilling"));
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
41 SplitAnalysis::SplitAnalysis(const MachineFunction &mf,
42 const LiveIntervals &lis,
43 const MachineLoopInfo &mli)
47 TII(*mf.getTarget().getInstrInfo()),
50 void SplitAnalysis::clear() {
58 bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
59 MachineBasicBlock *T, *F;
60 SmallVector<MachineOperand, 4> Cond;
61 return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
64 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
65 void SplitAnalysis::analyzeUses() {
66 const MachineRegisterInfo &MRI = MF.getRegInfo();
67 for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg),
68 E = MRI.reg_end(); I != E; ++I) {
69 MachineOperand &MO = I.getOperand();
70 if (MO.isUse() && MO.isUndef())
72 MachineInstr *MI = MO.getParent();
73 if (MI->isDebugValue() || !UsingInstrs.insert(MI))
75 UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
76 MachineBasicBlock *MBB = MI->getParent();
77 if (UsingBlocks[MBB]++)
79 for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop;
80 Loop = Loop->getParentLoop())
83 array_pod_sort(UseSlots.begin(), UseSlots.end());
84 DEBUG(dbgs() << " counted "
85 << UsingInstrs.size() << " instrs, "
86 << UsingBlocks.size() << " blocks, "
87 << UsingLoops.size() << " loops.\n");
90 void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
91 for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
92 unsigned count = UsingBlocks.lookup(*I);
93 OS << " BB#" << (*I)->getNumber();
95 OS << '(' << count << ')';
99 // Get three sets of basic blocks surrounding a loop: Blocks inside the loop,
100 // predecessor blocks, and exit blocks.
101 void SplitAnalysis::getLoopBlocks(const MachineLoop *Loop, LoopBlocks &Blocks) {
104 // Blocks in the loop.
105 Blocks.Loop.insert(Loop->block_begin(), Loop->block_end());
107 // Predecessor blocks.
108 const MachineBasicBlock *Header = Loop->getHeader();
109 for (MachineBasicBlock::const_pred_iterator I = Header->pred_begin(),
110 E = Header->pred_end(); I != E; ++I)
111 if (!Blocks.Loop.count(*I))
112 Blocks.Preds.insert(*I);
115 for (MachineLoop::block_iterator I = Loop->block_begin(),
116 E = Loop->block_end(); I != E; ++I) {
117 const MachineBasicBlock *MBB = *I;
118 for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
119 SE = MBB->succ_end(); SI != SE; ++SI)
120 if (!Blocks.Loop.count(*SI))
121 Blocks.Exits.insert(*SI);
125 void SplitAnalysis::print(const LoopBlocks &B, raw_ostream &OS) const {
134 /// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in
135 /// and around the Loop.
136 SplitAnalysis::LoopPeripheralUse SplitAnalysis::
137 analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) {
138 LoopPeripheralUse use = ContainedInLoop;
139 for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
141 const MachineBasicBlock *MBB = I->first;
142 // Is this a peripheral block?
143 if (use < MultiPeripheral &&
144 (Blocks.Preds.count(MBB) || Blocks.Exits.count(MBB))) {
145 if (I->second > 1) use = MultiPeripheral;
146 else use = SinglePeripheral;
149 // Is it a loop block?
150 if (Blocks.Loop.count(MBB))
152 // It must be an unrelated block.
153 DEBUG(dbgs() << ", outside: BB#" << MBB->getNumber());
159 /// getCriticalExits - It may be necessary to partially break critical edges
160 /// leaving the loop if an exit block has predecessors from outside the loop
162 void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
163 BlockPtrSet &CriticalExits) {
164 CriticalExits.clear();
166 // A critical exit block has CurLI live-in, and has a predecessor that is not
167 // in the loop nor a loop predecessor. For such an exit block, the edges
168 // carrying the new variable must be moved to a new pre-exit block.
169 for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end();
171 const MachineBasicBlock *Exit = *I;
172 // A single-predecessor exit block is definitely not a critical edge.
173 if (Exit->pred_size() == 1)
175 // This exit may not have CurLI live in at all. No need to split.
176 if (!LIS.isLiveInToMBB(*CurLI, Exit))
178 // Does this exit block have a predecessor that is not a loop block or loop
180 for (MachineBasicBlock::const_pred_iterator PI = Exit->pred_begin(),
181 PE = Exit->pred_end(); PI != PE; ++PI) {
182 const MachineBasicBlock *Pred = *PI;
183 if (Blocks.Loop.count(Pred) || Blocks.Preds.count(Pred))
185 // This is a critical exit block, and we need to split the exit edge.
186 CriticalExits.insert(Exit);
192 void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
193 BlockPtrSet &CriticalPreds) {
194 CriticalPreds.clear();
196 // A critical predecessor block has CurLI live-out, and has a successor that
197 // has CurLI live-in and is not in the loop nor a loop exit block. For such a
198 // predecessor block, we must carry the value in both the 'inside' and
199 // 'outside' registers.
200 for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end();
202 const MachineBasicBlock *Pred = *I;
203 // Definitely not a critical edge.
204 if (Pred->succ_size() == 1)
206 // This block may not have CurLI live out at all if there is a PHI.
207 if (!LIS.isLiveOutOfMBB(*CurLI, Pred))
209 // Does this block have a successor outside the loop?
210 for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(),
211 SE = Pred->succ_end(); SI != SE; ++SI) {
212 const MachineBasicBlock *Succ = *SI;
213 if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ))
215 if (!LIS.isLiveInToMBB(*CurLI, Succ))
217 // This is a critical predecessor block.
218 CriticalPreds.insert(Pred);
224 /// canSplitCriticalExits - Return true if it is possible to insert new exit
225 /// blocks before the blocks in CriticalExits.
227 SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
228 BlockPtrSet &CriticalExits) {
229 // If we don't allow critical edge splitting, require no critical exits.
231 return CriticalExits.empty();
233 for (BlockPtrSet::iterator I = CriticalExits.begin(), E = CriticalExits.end();
235 const MachineBasicBlock *Succ = *I;
236 // We want to insert a new pre-exit MBB before Succ, and change all the
237 // in-loop blocks to branch to the pre-exit instead of Succ.
238 // Check that all the in-loop predecessors can be changed.
239 for (MachineBasicBlock::const_pred_iterator PI = Succ->pred_begin(),
240 PE = Succ->pred_end(); PI != PE; ++PI) {
241 const MachineBasicBlock *Pred = *PI;
242 // The external predecessors won't be altered.
243 if (!Blocks.Loop.count(Pred) && !Blocks.Preds.count(Pred))
245 if (!canAnalyzeBranch(Pred))
249 // If Succ's layout predecessor falls through, that too must be analyzable.
250 // We need to insert the pre-exit block in the gap.
251 MachineFunction::const_iterator MFI = Succ;
252 if (MFI == MF.begin())
254 if (!canAnalyzeBranch(--MFI))
257 // No problems found.
261 void SplitAnalysis::analyze(const LiveInterval *li) {
267 void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) {
268 assert(CurLI && "Call analyze() before getSplitLoops");
269 if (UsingLoops.empty())
273 BlockPtrSet CriticalExits;
275 // We split around loops where CurLI is used outside the periphery.
276 for (LoopCountMap::const_iterator I = UsingLoops.begin(),
277 E = UsingLoops.end(); I != E; ++I) {
278 const MachineLoop *Loop = I->first;
279 getLoopBlocks(Loop, Blocks);
280 DEBUG({ dbgs() << " "; print(Blocks, dbgs()); });
282 switch(analyzeLoopPeripheralUse(Blocks)) {
285 case MultiPeripheral:
286 // FIXME: We could split a live range with multiple uses in a peripheral
287 // block and still make progress. However, it is possible that splitting
288 // another live range will insert copies into a peripheral block, and
289 // there is a small chance we can enter an infinite loop, inserting copies
291 // For safety, stick to splitting live ranges with uses outside the
293 DEBUG(dbgs() << ": multiple peripheral uses");
295 case ContainedInLoop:
296 DEBUG(dbgs() << ": fully contained\n");
298 case SinglePeripheral:
299 DEBUG(dbgs() << ": single peripheral use\n");
302 // Will it be possible to split around this loop?
303 getCriticalExits(Blocks, CriticalExits);
304 DEBUG(dbgs() << ": " << CriticalExits.size() << " critical exits\n");
305 if (!canSplitCriticalExits(Blocks, CriticalExits))
307 // This is a possible split.
311 DEBUG(dbgs() << " getSplitLoops found " << Loops.size()
312 << " candidate loops.\n");
315 const MachineLoop *SplitAnalysis::getBestSplitLoop() {
317 getSplitLoops(Loops);
321 // Pick the earliest loop.
322 // FIXME: Are there other heuristics to consider?
323 const MachineLoop *Best = 0;
325 for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E;
327 SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader());
328 if (!Best || Idx < BestIdx)
329 Best = *I, BestIdx = Idx;
331 DEBUG(dbgs() << " getBestSplitLoop found " << *Best);
335 /// isBypassLoop - Return true if CurLI is live through Loop and has no uses
336 /// inside the loop. Bypass loops are candidates for splitting because it can
337 /// prevent interference inside the loop.
338 bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) {
339 // If CurLI is live into the loop header and there are no uses in the loop, it
340 // must be live in the entire loop and live on at least one exiting edge.
341 return !UsingLoops.count(Loop) &&
342 LIS.isLiveInToMBB(*CurLI, Loop->getHeader());
345 /// getBypassLoops - Get all the maximal bypass loops. These are the bypass
346 /// loops whose parent is not a bypass loop.
347 void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) {
348 SmallVector<MachineLoop*, 8> Todo(Loops.begin(), Loops.end());
349 while (!Todo.empty()) {
350 MachineLoop *Loop = Todo.pop_back_val();
351 if (!UsingLoops.count(Loop)) {
352 // This is either a bypass loop or completely irrelevant.
353 if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader()))
354 BypassLoops.insert(Loop);
355 // Either way, skip the child loops.
359 // The child loops may be bypass loops.
360 Todo.append(Loop->begin(), Loop->end());
365 //===----------------------------------------------------------------------===//
367 //===----------------------------------------------------------------------===//
369 // Work around the fact that the std::pair constructors are broken for pointer
370 // pairs in some implementations. makeVV(x, 0) works.
371 static inline std::pair<const VNInfo*, VNInfo*>
372 makeVV(const VNInfo *a, VNInfo *b) {
373 return std::make_pair(a, b);
376 void LiveIntervalMap::reset(LiveInterval *li) {
379 LiveOutCache.clear();
382 bool LiveIntervalMap::isComplexMapped(const VNInfo *ParentVNI) const {
383 ValueMap::const_iterator i = Values.find(ParentVNI);
384 return i != Values.end() && i->second == 0;
387 // defValue - Introduce a LI def for ParentVNI that could be later than
389 VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
390 assert(LI && "call reset first");
391 assert(ParentVNI && "Mapping NULL value");
392 assert(Idx.isValid() && "Invalid SlotIndex");
393 assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
395 // Create a new value.
396 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
398 // Preserve the PHIDef bit.
399 if (ParentVNI->isPHIDef() && Idx == ParentVNI->def)
400 VNI->setIsPHIDef(true);
402 // Use insert for lookup, so we can add missing values with a second lookup.
403 std::pair<ValueMap::iterator,bool> InsP =
404 Values.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0));
406 // This is now a complex def. Mark with a NULL in valueMap.
408 InsP.first->second = 0;
414 // mapValue - Find the mapped value for ParentVNI at Idx.
415 // Potentially create phi-def values.
416 VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
418 assert(LI && "call reset first");
419 assert(ParentVNI && "Mapping NULL value");
420 assert(Idx.isValid() && "Invalid SlotIndex");
421 assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
423 // Use insert for lookup, so we can add missing values with a second lookup.
424 std::pair<ValueMap::iterator,bool> InsP =
425 Values.insert(makeVV(ParentVNI, 0));
427 // This was an unknown value. Create a simple mapping.
429 if (simple) *simple = true;
430 return InsP.first->second = LI->createValueCopy(ParentVNI,
431 LIS.getVNInfoAllocator());
434 // This was a simple mapped value.
435 if (InsP.first->second) {
436 if (simple) *simple = true;
437 return InsP.first->second;
440 // This is a complex mapped value. There may be multiple defs, and we may need
441 // to create phi-defs.
442 if (simple) *simple = false;
443 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
444 assert(IdxMBB && "No MBB at Idx");
446 // Is there a def in the same MBB we can extend?
447 if (VNInfo *VNI = extendTo(IdxMBB, Idx))
450 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
451 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
452 // Perform a search for all predecessor blocks where we know the dominating
453 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
454 DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
455 << " at " << Idx << " in " << *LI << '\n');
457 // Blocks where LI should be live-in.
458 SmallVector<MachineDomTreeNode*, 16> LiveIn;
459 LiveIn.push_back(MDT[IdxMBB]);
461 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
462 for (unsigned i = 0; i != LiveIn.size(); ++i) {
463 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
464 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
465 PE = MBB->pred_end(); PI != PE; ++PI) {
466 MachineBasicBlock *Pred = *PI;
467 // Is this a known live-out block?
468 std::pair<LiveOutMap::iterator,bool> LOIP =
469 LiveOutCache.insert(std::make_pair(Pred, LiveOutPair()));
470 // Yes, we have been here before.
472 DEBUG(if (VNInfo *VNI = LOIP.first->second.first)
473 dbgs() << " known valno #" << VNI->id
474 << " at BB#" << Pred->getNumber() << '\n');
478 // Does Pred provide a live-out value?
479 SlotIndex Last = LIS.getMBBEndIdx(Pred).getPrevSlot();
480 if (VNInfo *VNI = extendTo(Pred, Last)) {
481 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def);
482 DEBUG(dbgs() << " found valno #" << VNI->id
483 << " from BB#" << DefMBB->getNumber()
484 << " at BB#" << Pred->getNumber() << '\n');
485 LiveOutPair &LOP = LOIP.first->second;
487 LOP.second = MDT[DefMBB];
490 // No, we need a live-in value for Pred as well
492 LiveIn.push_back(MDT[Pred]);
496 // We may need to add phi-def values to preserve the SSA form.
497 // This is essentially the same iterative algorithm that SSAUpdater uses,
498 // except we already have a dominator tree, so we don't have to recompute it.
503 DEBUG(dbgs() << " Iterating over " << LiveIn.size() << " blocks.\n");
504 // Propagate live-out values down the dominator tree, inserting phi-defs when
505 // necessary. Since LiveIn was created by a BFS, going backwards makes it more
506 // likely for us to visit immediate dominators before their children.
507 for (unsigned i = LiveIn.size(); i; --i) {
508 MachineDomTreeNode *Node = LiveIn[i-1];
509 MachineBasicBlock *MBB = Node->getBlock();
510 MachineDomTreeNode *IDom = Node->getIDom();
511 LiveOutPair IDomValue;
512 // We need a live-in value to a block with no immediate dominator?
513 // This is probably an unreachable block that has survived somehow.
514 bool needPHI = !IDom;
516 // Get the IDom live-out value.
518 LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock());
519 if (I != LiveOutCache.end())
520 IDomValue = I->second;
522 // If IDom is outside our set of live-out blocks, there must be new
523 // defs, and we need a phi-def here.
527 // IDom dominates all of our predecessors, but it may not be the immediate
528 // dominator. Check if any of them have live-out values that are properly
529 // dominated by IDom. If so, we need a phi-def here.
531 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
532 PE = MBB->pred_end(); PI != PE; ++PI) {
533 LiveOutPair Value = LiveOutCache[*PI];
534 if (!Value.first || Value.first == IDomValue.first)
536 // This predecessor is carrying something other than IDomValue.
537 // It could be because IDomValue hasn't propagated yet, or it could be
538 // because MBB is in the dominance frontier of that value.
539 if (MDT.dominates(IDom, Value.second)) {
546 // Create a phi-def if required.
549 SlotIndex Start = LIS.getMBBStartIdx(MBB);
550 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
551 VNI->setIsPHIDef(true);
552 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
553 << " phi-def #" << VNI->id << " at " << Start << '\n');
554 // We no longer need LI to be live-in.
555 LiveIn.erase(LiveIn.begin()+(i-1));
556 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
559 // Check if we need to update live-out info.
560 LiveOutMap::iterator I = LiveOutCache.find(MBB);
561 if (I == LiveOutCache.end() || I->second.second == Node) {
562 // We already have a live-out defined in MBB, so this must be IdxMBB.
563 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
564 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
566 // This phi-def is also live-out, so color the whole block.
567 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
568 I->second = LiveOutPair(VNI, Node);
570 } else if (IDomValue.first) {
571 // No phi-def here. Remember incoming value for IdxMBB.
573 IdxVNI = IDomValue.first;
574 // Propagate IDomValue if needed:
575 // MBB is live-out and doesn't define its own value.
576 LiveOutMap::iterator I = LiveOutCache.find(MBB);
577 if (I != LiveOutCache.end() && I->second.second != Node &&
578 I->second.first != IDomValue.first) {
580 I->second = IDomValue;
581 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
582 << " idom valno #" << IDomValue.first->id
583 << " from BB#" << IDom->getBlock()->getNumber() << '\n');
587 DEBUG(dbgs() << " - made " << Changes << " changes.\n");
590 assert(IdxVNI && "Didn't find value for Idx");
593 // Check the LiveOutCache invariants.
594 for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
596 assert(I->first && "Null MBB entry in cache");
597 assert(I->second.first && "Null VNInfo in cache");
598 assert(I->second.second && "Null DomTreeNode in cache");
599 if (I->second.second->getBlock() == I->first)
601 for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
602 PE = I->first->pred_end(); PI != PE; ++PI)
603 assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant");
607 // Since we went through the trouble of a full BFS visiting all reaching defs,
608 // the values in LiveIn are now accurate. No more phi-defs are needed
609 // for these blocks, so we can color the live ranges.
610 // This makes the next mapValue call much faster.
611 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
612 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
613 SlotIndex Start = LIS.getMBBStartIdx(MBB);
614 VNInfo *VNI = LiveOutCache.lookup(MBB).first;
616 // Anything in LiveIn other than IdxMBB is live-through.
617 // In IdxMBB, we should stop at Idx unless the same value is live-out.
618 if (MBB == IdxMBB && IdxVNI != VNI)
619 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
621 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
628 void LiveIntervalMap::dumpCache() {
629 for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
631 assert(I->first && "Null MBB entry in cache");
632 assert(I->second.first && "Null VNInfo in cache");
633 assert(I->second.second && "Null DomTreeNode in cache");
634 dbgs() << " cache: BB#" << I->first->getNumber()
635 << " has valno #" << I->second.first->id << " from BB#"
636 << I->second.second->getBlock()->getNumber() << ", preds";
637 for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
638 PE = I->first->pred_end(); PI != PE; ++PI)
639 dbgs() << " BB#" << (*PI)->getNumber();
642 dbgs() << " cache: " << LiveOutCache.size() << " entries.\n";
646 // extendTo - Find the last LI value defined in MBB at or before Idx. The
647 // ParentLI is assumed to be live at Idx. Extend the live range to Idx.
648 // Return the found VNInfo, or NULL.
649 VNInfo *LiveIntervalMap::extendTo(const MachineBasicBlock *MBB, SlotIndex Idx) {
650 assert(LI && "call reset first");
651 LiveInterval::iterator I = std::upper_bound(LI->begin(), LI->end(), Idx);
652 if (I == LI->begin())
655 if (I->end <= LIS.getMBBStartIdx(MBB))
658 I->end = Idx.getNextSlot();
662 // addSimpleRange - Add a simple range from ParentLI to LI.
663 // ParentVNI must be live in the [Start;End) interval.
664 void LiveIntervalMap::addSimpleRange(SlotIndex Start, SlotIndex End,
665 const VNInfo *ParentVNI) {
666 assert(LI && "call reset first");
668 VNInfo *VNI = mapValue(ParentVNI, Start, &simple);
669 // A simple mapping is easy.
671 LI->addRange(LiveRange(Start, End, VNI));
675 // ParentVNI is a complex value. We must map per MBB.
676 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
677 MachineFunction::iterator MBBE = LIS.getMBBFromIndex(End.getPrevSlot());
680 LI->addRange(LiveRange(Start, End, VNI));
685 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
687 // Run sequence of full blocks.
688 for (++MBB; MBB != MBBE; ++MBB) {
689 Start = LIS.getMBBStartIdx(MBB);
690 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB),
691 mapValue(ParentVNI, Start)));
695 Start = LIS.getMBBStartIdx(MBB);
697 LI->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start)));
700 /// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
701 /// All needed values whose def is not inside [Start;End) must be defined
702 /// beforehand so mapValue will work.
703 void LiveIntervalMap::addRange(SlotIndex Start, SlotIndex End) {
704 assert(LI && "call reset first");
705 LiveInterval::const_iterator B = ParentLI.begin(), E = ParentLI.end();
706 LiveInterval::const_iterator I = std::lower_bound(B, E, Start);
708 // Check if --I begins before Start and overlaps.
712 addSimpleRange(Start, std::min(End, I->end), I->valno);
716 // The remaining ranges begin after Start.
717 for (;I != E && I->start < End; ++I)
718 addSimpleRange(I->start, std::min(End, I->end), I->valno);
722 //===----------------------------------------------------------------------===//
724 //===----------------------------------------------------------------------===//
726 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
727 SplitEditor::SplitEditor(SplitAnalysis &sa,
730 MachineDominatorTree &mdt,
732 : sa_(sa), LIS(lis), VRM(vrm),
733 MRI(vrm.getMachineFunction().getRegInfo()),
735 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
736 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
741 // We don't need an AliasAnalysis since we will only be performing
742 // cheap-as-a-copy remats anyway.
743 Edit.anyRematerializable(LIS, TII, 0);
746 void SplitEditor::dump() const {
747 if (RegAssign.empty()) {
748 dbgs() << " empty\n";
752 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
753 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
757 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
760 MachineBasicBlock &MBB,
761 MachineBasicBlock::iterator I) {
762 MachineInstr *CopyMI = 0;
764 LiveInterval *LI = Edit.get(RegIdx);
766 // Attempt cheap-as-a-copy rematerialization.
767 LiveRangeEdit::Remat RM(ParentVNI);
768 if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
769 Def = Edit.rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
771 // Can't remat, just insert a copy from parent.
772 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
773 .addReg(Edit.getReg());
774 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
777 // Define the value in Reg.
778 VNInfo *VNI = LIMappers[RegIdx].defValue(ParentVNI, Def);
779 VNI->setCopy(CopyMI);
781 // Add minimal liveness for the new value.
782 Edit.get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
786 /// Create a new virtual register and live interval.
787 void SplitEditor::openIntv() {
788 assert(!OpenIdx && "Previous LI not closed before openIntv");
790 // Create the complement as index 0.
792 Edit.create(MRI, LIS, VRM);
793 LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
794 LIMappers.back().reset(Edit.get(0));
797 // Create the open interval.
798 OpenIdx = Edit.size();
799 Edit.create(MRI, LIS, VRM);
800 LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
801 LIMappers[OpenIdx].reset(Edit.get(OpenIdx));
804 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
805 assert(OpenIdx && "openIntv not called before enterIntvBefore");
806 DEBUG(dbgs() << " enterIntvBefore " << Idx);
807 Idx = Idx.getBaseIndex();
808 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
810 DEBUG(dbgs() << ": not live\n");
813 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
814 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
815 assert(MI && "enterIntvBefore called with invalid index");
817 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
821 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
822 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
823 SlotIndex End = LIS.getMBBEndIdx(&MBB);
824 SlotIndex Last = End.getPrevSlot();
825 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
826 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Last);
828 DEBUG(dbgs() << ": not live\n");
831 DEBUG(dbgs() << ": valno " << ParentVNI->id);
832 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
833 LIS.getLastSplitPoint(Edit.getParent(), &MBB));
834 RegAssign.insert(VNI->def, End, OpenIdx);
839 /// useIntv - indicate that all instructions in MBB should use OpenLI.
840 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
841 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
844 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
845 assert(OpenIdx && "openIntv not called before useIntv");
846 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
847 RegAssign.insert(Start, End, OpenIdx);
851 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
852 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
853 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
855 // The interval must be live beyond the instruction at Idx.
856 Idx = Idx.getBoundaryIndex();
857 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
859 DEBUG(dbgs() << ": not live\n");
860 return Idx.getNextSlot();
862 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
864 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
865 assert(MI && "No instruction at index");
866 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
867 llvm::next(MachineBasicBlock::iterator(MI)));
871 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
872 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
873 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
874 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
876 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
878 DEBUG(dbgs() << ": not live\n");
882 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
883 MBB.SkipPHIsAndLabels(MBB.begin()));
884 RegAssign.insert(Start, VNI->def, OpenIdx);
889 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
890 assert(OpenIdx && "openIntv not called before overlapIntv");
891 assert(Edit.getParent().getVNInfoAt(Start) ==
892 Edit.getParent().getVNInfoAt(End.getPrevSlot()) &&
893 "Parent changes value in extended range");
894 assert(Edit.get(0)->getVNInfoAt(Start) && "Start must come from leaveIntv*");
895 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
896 "Range cannot span basic blocks");
898 // Treat this as useIntv() for now. The complement interval will be extended
899 // as needed by mapValue().
900 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
901 RegAssign.insert(Start, End, OpenIdx);
905 /// closeIntv - Indicate that we are done editing the currently open
906 /// LiveInterval, and ranges can be trimmed.
907 void SplitEditor::closeIntv() {
908 assert(OpenIdx && "openIntv not called before closeIntv");
912 /// rewriteAssigned - Rewrite all uses of Edit.getReg().
913 void SplitEditor::rewriteAssigned() {
914 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit.getReg()),
915 RE = MRI.reg_end(); RI != RE;) {
916 MachineOperand &MO = RI.getOperand();
917 MachineInstr *MI = MO.getParent();
919 // LiveDebugVariables should have handled all DBG_VALUE instructions.
920 if (MI->isDebugValue()) {
921 DEBUG(dbgs() << "Zapping " << *MI);
926 // <undef> operands don't really read the register, so just assign them to
928 if (MO.isUse() && MO.isUndef()) {
929 MO.setReg(Edit.get(0)->reg);
933 SlotIndex Idx = LIS.getInstructionIndex(MI);
934 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
936 // Rewrite to the mapped register at Idx.
937 unsigned RegIdx = RegAssign.lookup(Idx);
938 MO.setReg(Edit.get(RegIdx)->reg);
939 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
940 << Idx << ':' << RegIdx << '\t' << *MI);
942 // Extend liveness to Idx.
943 const VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
944 LIMappers[RegIdx].mapValue(ParentVNI, Idx);
948 /// rewriteSplit - Rewrite uses of Intvs[0] according to the ConEQ mapping.
949 void SplitEditor::rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
950 const ConnectedVNInfoEqClasses &ConEq) {
951 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Intvs[0]->reg),
952 RE = MRI.reg_end(); RI != RE;) {
953 MachineOperand &MO = RI.getOperand();
954 MachineInstr *MI = MO.getParent();
956 if (MO.isUse() && MO.isUndef())
958 // DBG_VALUE instructions should have been eliminated earlier.
959 SlotIndex Idx = LIS.getInstructionIndex(MI);
960 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
961 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
963 const VNInfo *VNI = Intvs[0]->getVNInfoAt(Idx);
964 assert(VNI && "Interval not live at use.");
965 MO.setReg(Intvs[ConEq.getEqClass(VNI)]->reg);
966 DEBUG(dbgs() << VNI->id << '\t' << *MI);
970 void SplitEditor::finish() {
971 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
973 // At this point, the live intervals in Edit contain VNInfos corresponding to
974 // the inserted copies.
976 // Add the original defs from the parent interval.
977 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
978 E = Edit.getParent().vni_end(); I != E; ++I) {
979 const VNInfo *ParentVNI = *I;
980 if (ParentVNI->isUnused())
982 LiveIntervalMap &LIM = LIMappers[RegAssign.lookup(ParentVNI->def)];
983 VNInfo *VNI = LIM.defValue(ParentVNI, ParentVNI->def);
984 LIM.getLI()->addRange(LiveRange(ParentVNI->def,
985 ParentVNI->def.getNextSlot(), VNI));
986 // Mark all values as complex to force liveness computation.
987 // This should really only be necessary for remat victims, but we are lazy.
988 LIM.markComplexMapped(ParentVNI);
992 // Every new interval must have a def by now, otherwise the split is bogus.
993 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
994 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
997 // FIXME: Don't recompute the liveness of all values, infer it from the
998 // overlaps between the parent live interval and RegAssign.
999 // The mapValue algorithm is only necessary when:
1000 // - The parent value maps to multiple defs, and new phis are needed, or
1001 // - The value has been rematerialized before some uses, and we want to
1002 // minimize the live range so it only reaches the remaining uses.
1003 // All other values have simple liveness that can be computed from RegAssign
1004 // and the parent live interval.
1006 // Extend live ranges to be live-out for successor PHI values.
1007 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
1008 E = Edit.getParent().vni_end(); I != E; ++I) {
1009 const VNInfo *PHIVNI = *I;
1010 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
1012 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
1013 LiveIntervalMap &LIM = LIMappers[RegIdx];
1014 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
1015 DEBUG(dbgs() << " map phi in BB#" << MBB->getNumber() << '@' << PHIVNI->def
1016 << " -> " << RegIdx << '\n');
1017 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
1018 PE = MBB->pred_end(); PI != PE; ++PI) {
1019 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
1020 DEBUG(dbgs() << " pred BB#" << (*PI)->getNumber() << '@' << End);
1021 // The predecessor may not have a live-out value. That is OK, like an
1022 // undef PHI operand.
1023 if (VNInfo *VNI = Edit.getParent().getVNInfoAt(End)) {
1024 DEBUG(dbgs() << " has parent valno #" << VNI->id << " live out\n");
1025 assert(RegAssign.lookup(End) == RegIdx &&
1026 "Different register assignment in phi predecessor");
1027 LIM.mapValue(VNI, End);
1030 DEBUG(dbgs() << " is not live-out\n");
1032 DEBUG(dbgs() << " " << *LIM.getLI() << '\n');
1035 // Rewrite instructions.
1038 // FIXME: Delete defs that were rematted everywhere.
1040 // Get rid of unused values and set phi-kill flags.
1041 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
1042 (*I)->RenumberValues(LIS);
1044 // Now check if any registers were separated into multiple components.
1045 ConnectedVNInfoEqClasses ConEQ(LIS);
1046 for (unsigned i = 0, e = Edit.size(); i != e; ++i) {
1047 // Don't use iterators, they are invalidated by create() below.
1048 LiveInterval *li = Edit.get(i);
1049 unsigned NumComp = ConEQ.Classify(li);
1052 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1053 SmallVector<LiveInterval*, 8> dups;
1055 for (unsigned i = 1; i != NumComp; ++i)
1056 dups.push_back(&Edit.create(MRI, LIS, VRM));
1057 rewriteComponents(dups, ConEQ);
1058 ConEQ.Distribute(&dups[0]);
1061 // Calculate spill weight and allocation hints for new intervals.
1062 VirtRegAuxInfo vrai(VRM.getMachineFunction(), LIS, sa_.Loops);
1063 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I){
1064 LiveInterval &li = **I;
1065 vrai.CalculateRegClass(li.reg);
1066 vrai.CalculateWeightAndHint(li);
1067 DEBUG(dbgs() << " new interval " << MRI.getRegClass(li.reg)->getName()
1068 << ":" << li << '\n');
1073 //===----------------------------------------------------------------------===//
1075 //===----------------------------------------------------------------------===//
1077 void SplitEditor::splitAroundLoop(const MachineLoop *Loop) {
1078 SplitAnalysis::LoopBlocks Blocks;
1079 sa_.getLoopBlocks(Loop, Blocks);
1082 dbgs() << " splitAround"; sa_.print(Blocks, dbgs()); dbgs() << '\n';
1085 // Break critical edges as needed.
1086 SplitAnalysis::BlockPtrSet CriticalExits;
1087 sa_.getCriticalExits(Blocks, CriticalExits);
1088 assert(CriticalExits.empty() && "Cannot break critical exits yet");
1090 // Create new live interval for the loop.
1093 // Insert copies in the predecessors if live-in to the header.
1094 if (LIS.isLiveInToMBB(Edit.getParent(), Loop->getHeader())) {
1095 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Preds.begin(),
1096 E = Blocks.Preds.end(); I != E; ++I) {
1097 MachineBasicBlock &MBB = const_cast<MachineBasicBlock&>(**I);
1098 enterIntvAtEnd(MBB);
1102 // Switch all loop blocks.
1103 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Loop.begin(),
1104 E = Blocks.Loop.end(); I != E; ++I)
1107 // Insert back copies in the exit blocks.
1108 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Exits.begin(),
1109 E = Blocks.Exits.end(); I != E; ++I) {
1110 MachineBasicBlock &MBB = const_cast<MachineBasicBlock&>(**I);
1111 leaveIntvAtTop(MBB);
1120 //===----------------------------------------------------------------------===//
1121 // Single Block Splitting
1122 //===----------------------------------------------------------------------===//
1124 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1125 /// may be an advantage to split CurLI for the duration of the block.
1126 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1127 // If CurLI is local to one block, there is no point to splitting it.
1128 if (UsingBlocks.size() <= 1)
1130 // Add blocks with multiple uses.
1131 for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
1133 switch (I->second) {
1138 // When there are only two uses and CurLI is both live in and live out,
1139 // we don't really win anything by isolating the block since we would be
1140 // inserting two copies.
1141 // The remaing register would still have two uses in the block. (Unless it
1142 // separates into disconnected components).
1143 if (LIS.isLiveInToMBB(*CurLI, I->first) &&
1144 LIS.isLiveOutOfMBB(*CurLI, I->first))
1148 Blocks.insert(I->first);
1150 return !Blocks.empty();
1153 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1154 /// basic block in Blocks.
1155 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1156 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1157 // Determine the first and last instruction using CurLI in each block.
1158 typedef std::pair<SlotIndex,SlotIndex> IndexPair;
1159 typedef DenseMap<const MachineBasicBlock*,IndexPair> IndexPairMap;
1160 IndexPairMap MBBRange;
1161 for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
1162 E = sa_.UsingInstrs.end(); I != E; ++I) {
1163 const MachineBasicBlock *MBB = (*I)->getParent();
1164 if (!Blocks.count(MBB))
1166 SlotIndex Idx = LIS.getInstructionIndex(*I);
1167 DEBUG(dbgs() << " BB#" << MBB->getNumber() << '\t' << Idx << '\t' << **I);
1168 IndexPair &IP = MBBRange[MBB];
1169 if (!IP.first.isValid() || Idx < IP.first)
1171 if (!IP.second.isValid() || Idx > IP.second)
1175 // Create a new interval for each block.
1176 for (SplitAnalysis::BlockPtrSet::const_iterator I = Blocks.begin(),
1177 E = Blocks.end(); I != E; ++I) {
1178 IndexPair &IP = MBBRange[*I];
1179 DEBUG(dbgs() << " splitting for BB#" << (*I)->getNumber() << ": ["
1180 << IP.first << ';' << IP.second << ")\n");
1181 assert(IP.first.isValid() && IP.second.isValid());
1184 useIntv(enterIntvBefore(IP.first), leaveIntvAfter(IP.second));
1191 //===----------------------------------------------------------------------===//
1192 // Sub Block Splitting
1193 //===----------------------------------------------------------------------===//
1195 /// getBlockForInsideSplit - If CurLI is contained inside a single basic block,
1196 /// and it wou pay to subdivide the interval inside that block, return it.
1197 /// Otherwise return NULL. The returned block can be passed to
1198 /// SplitEditor::splitInsideBlock.
1199 const MachineBasicBlock *SplitAnalysis::getBlockForInsideSplit() {
1200 // The interval must be exclusive to one block.
1201 if (UsingBlocks.size() != 1)
1203 // Don't to this for less than 4 instructions. We want to be sure that
1204 // splitting actually reduces the instruction count per interval.
1205 if (UsingInstrs.size() < 4)
1207 return UsingBlocks.begin()->first;
1210 /// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
1211 void SplitEditor::splitInsideBlock(const MachineBasicBlock *MBB) {
1212 SmallVector<SlotIndex, 32> Uses;
1213 Uses.reserve(sa_.UsingInstrs.size());
1214 for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
1215 E = sa_.UsingInstrs.end(); I != E; ++I)
1216 if ((*I)->getParent() == MBB)
1217 Uses.push_back(LIS.getInstructionIndex(*I));
1218 DEBUG(dbgs() << " splitInsideBlock BB#" << MBB->getNumber() << " for "
1219 << Uses.size() << " instructions.\n");
1220 assert(Uses.size() >= 3 && "Need at least 3 instructions");
1221 array_pod_sort(Uses.begin(), Uses.end());
1223 // Simple algorithm: Find the largest gap between uses as determined by slot
1224 // indices. Create new intervals for instructions before the gap and after the
1226 unsigned bestPos = 0;
1228 DEBUG(dbgs() << " dist (" << Uses[0]);
1229 for (unsigned i = 1, e = Uses.size(); i != e; ++i) {
1230 int g = Uses[i-1].distance(Uses[i]);
1231 DEBUG(dbgs() << ") -" << g << "- (" << Uses[i]);
1233 bestPos = i, bestGap = g;
1235 DEBUG(dbgs() << "), best: -" << bestGap << "-\n");
1237 // bestPos points to the first use after the best gap.
1238 assert(bestPos > 0 && "Invalid gap");
1240 // FIXME: Don't create intervals for low densities.
1242 // First interval before the gap. Don't create single-instr intervals.
1245 useIntv(enterIntvBefore(Uses.front()), leaveIntvAfter(Uses[bestPos-1]));
1249 // Second interval after the gap.
1250 if (bestPos < Uses.size()-1) {
1252 useIntv(enterIntvBefore(Uses[bestPos]), leaveIntvAfter(Uses.back()));