1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/Target/TargetInstrInfo.h"
28 #include "llvm/Target/TargetMachine.h"
32 STATISTIC(NumFinished, "Number of splits finished");
33 STATISTIC(NumSimple, "Number of splits that were simple");
34 STATISTIC(NumCopies, "Number of copies inserted for splitting");
35 STATISTIC(NumRemats, "Number of rematerialized defs for splitting");
36 STATISTIC(NumRepairs, "Number of invalid live ranges repaired");
38 //===----------------------------------------------------------------------===//
40 //===----------------------------------------------------------------------===//
42 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
43 const LiveIntervals &lis,
44 const MachineLoopInfo &mli)
45 : MF(vrm.getMachineFunction()),
49 TII(*MF.getTarget().getInstrInfo()),
51 LastSplitPoint(MF.getNumBlockIDs()) {}
53 void SplitAnalysis::clear() {
56 ThroughBlocks.clear();
58 DidRepairRange = false;
61 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
62 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
63 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
64 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
66 // Compute split points on the first call. The pair is independent of the
67 // current live interval.
68 if (!LSP.first.isValid()) {
69 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
70 if (FirstTerm == MBB->end())
71 LSP.first = LIS.getMBBEndIdx(MBB);
73 LSP.first = LIS.getInstructionIndex(FirstTerm);
75 // If there is a landing pad successor, also find the call instruction.
78 // There may not be a call instruction (?) in which case we ignore LPad.
79 LSP.second = LSP.first;
80 for (MachineBasicBlock::const_iterator I = MBB->end(), E = MBB->begin();
84 LSP.second = LIS.getInstructionIndex(I);
90 // If CurLI is live into a landing pad successor, move the last split point
91 // back to the call that may throw.
92 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
98 MachineBasicBlock::iterator
99 SplitAnalysis::getLastSplitPointIter(MachineBasicBlock *MBB) {
100 SlotIndex LSP = getLastSplitPoint(MBB->getNumber());
101 if (LSP == LIS.getMBBEndIdx(MBB))
103 return LIS.getInstructionFromIndex(LSP);
106 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
107 void SplitAnalysis::analyzeUses() {
108 assert(UseSlots.empty() && "Call clear first");
110 // First get all the defs from the interval values. This provides the correct
111 // slots for early clobbers.
112 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
113 E = CurLI->vni_end(); I != E; ++I)
114 if (!(*I)->isPHIDef() && !(*I)->isUnused())
115 UseSlots.push_back((*I)->def);
117 // Get use slots form the use-def chain.
118 const MachineRegisterInfo &MRI = MF.getRegInfo();
119 for (MachineRegisterInfo::use_nodbg_iterator
120 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
122 if (!I.getOperand().isUndef())
123 UseSlots.push_back(LIS.getInstructionIndex(&*I).getRegSlot());
125 array_pod_sort(UseSlots.begin(), UseSlots.end());
127 // Remove duplicates, keeping the smaller slot for each instruction.
128 // That is what we want for early clobbers.
129 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
130 SlotIndex::isSameInstr),
133 // Compute per-live block info.
134 if (!calcLiveBlockInfo()) {
135 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
136 // I am looking at you, RegisterCoalescer!
137 DidRepairRange = true;
139 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
140 const_cast<LiveIntervals&>(LIS)
141 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
143 ThroughBlocks.clear();
144 bool fixed = calcLiveBlockInfo();
146 assert(fixed && "Couldn't fix broken live interval");
149 DEBUG(dbgs() << "Analyze counted "
150 << UseSlots.size() << " instrs in "
151 << UseBlocks.size() << " blocks, through "
152 << NumThroughBlocks << " blocks.\n");
155 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
156 /// where CurLI is live.
157 bool SplitAnalysis::calcLiveBlockInfo() {
158 ThroughBlocks.resize(MF.getNumBlockIDs());
159 NumThroughBlocks = NumGapBlocks = 0;
163 LiveInterval::const_iterator LVI = CurLI->begin();
164 LiveInterval::const_iterator LVE = CurLI->end();
166 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
167 UseI = UseSlots.begin();
168 UseE = UseSlots.end();
170 // Loop over basic blocks where CurLI is live.
171 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
175 SlotIndex Start, Stop;
176 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
178 // If the block contains no uses, the range must be live through. At one
179 // point, RegisterCoalescer could create dangling ranges that ended
181 if (UseI == UseE || *UseI >= Stop) {
183 ThroughBlocks.set(BI.MBB->getNumber());
184 // The range shouldn't end mid-block if there are no uses. This shouldn't
189 // This block has uses. Find the first and last uses in the block.
190 BI.FirstInstr = *UseI;
191 assert(BI.FirstInstr >= Start);
193 while (UseI != UseE && *UseI < Stop);
194 BI.LastInstr = UseI[-1];
195 assert(BI.LastInstr < Stop);
197 // LVI is the first live segment overlapping MBB.
198 BI.LiveIn = LVI->start <= Start;
200 // When not live in, the first use should be a def.
202 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
203 assert(LVI->start == BI.FirstInstr && "First instr should be a def");
204 BI.FirstDef = BI.FirstInstr;
207 // Look for gaps in the live range.
209 while (LVI->end < Stop) {
210 SlotIndex LastStop = LVI->end;
211 if (++LVI == LVE || LVI->start >= Stop) {
213 BI.LastInstr = LastStop;
217 if (LastStop < LVI->start) {
218 // There is a gap in the live range. Create duplicate entries for the
219 // live-in snippet and the live-out snippet.
222 // Push the Live-in part.
224 UseBlocks.push_back(BI);
225 UseBlocks.back().LastInstr = LastStop;
227 // Set up BI for the live-out part.
230 BI.FirstInstr = BI.FirstDef = LVI->start;
233 // A LiveRange that starts in the middle of the block must be a def.
234 assert(LVI->start == LVI->valno->def && "Dangling LiveRange start");
236 BI.FirstDef = LVI->start;
239 UseBlocks.push_back(BI);
241 // LVI is now at LVE or LVI->end >= Stop.
246 // Live segment ends exactly at Stop. Move to the next segment.
247 if (LVI->end == Stop && ++LVI == LVE)
250 // Pick the next basic block.
251 if (LVI->start < Stop)
254 MFI = LIS.getMBBFromIndex(LVI->start);
257 assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count");
261 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
264 LiveInterval *li = const_cast<LiveInterval*>(cli);
265 LiveInterval::iterator LVI = li->begin();
266 LiveInterval::iterator LVE = li->end();
269 // Loop over basic blocks where li is live.
270 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
271 SlotIndex Stop = LIS.getMBBEndIdx(MFI);
274 LVI = li->advanceTo(LVI, Stop);
279 Stop = LIS.getMBBEndIdx(MFI);
280 } while (Stop <= LVI->start);
284 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
285 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
286 const LiveInterval &Orig = LIS.getInterval(OrigReg);
287 assert(!Orig.empty() && "Splitting empty interval?");
288 LiveInterval::const_iterator I = Orig.find(Idx);
290 // Range containing Idx should begin at Idx.
291 if (I != Orig.end() && I->start <= Idx)
292 return I->start == Idx;
294 // Range does not contain Idx, previous must end at Idx.
295 return I != Orig.begin() && (--I)->end == Idx;
298 void SplitAnalysis::analyze(const LiveInterval *li) {
305 //===----------------------------------------------------------------------===//
307 //===----------------------------------------------------------------------===//
309 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
310 SplitEditor::SplitEditor(SplitAnalysis &sa,
313 MachineDominatorTree &mdt)
314 : SA(sa), LIS(lis), VRM(vrm),
315 MRI(vrm.getMachineFunction().getRegInfo()),
317 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
318 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
321 SpillMode(SM_Partition),
325 void SplitEditor::reset(LiveRangeEdit &LRE, ComplementSpillMode SM) {
332 // Reset the LiveRangeCalc instances needed for this spill mode.
333 LRCalc[0].reset(&VRM.getMachineFunction());
335 LRCalc[1].reset(&VRM.getMachineFunction());
337 // We don't need an AliasAnalysis since we will only be performing
338 // cheap-as-a-copy remats anyway.
339 Edit->anyRematerializable(LIS, TII, 0);
342 void SplitEditor::dump() const {
343 if (RegAssign.empty()) {
344 dbgs() << " empty\n";
348 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
349 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
353 VNInfo *SplitEditor::defValue(unsigned RegIdx,
354 const VNInfo *ParentVNI,
356 assert(ParentVNI && "Mapping NULL value");
357 assert(Idx.isValid() && "Invalid SlotIndex");
358 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
359 LiveInterval *LI = Edit->get(RegIdx);
361 // Create a new value.
362 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
364 // Use insert for lookup, so we can add missing values with a second lookup.
365 std::pair<ValueMap::iterator, bool> InsP =
366 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
367 ValueForcePair(VNI, false)));
369 // This was the first time (RegIdx, ParentVNI) was mapped.
370 // Keep it as a simple def without any liveness.
374 // If the previous value was a simple mapping, add liveness for it now.
375 if (VNInfo *OldVNI = InsP.first->second.getPointer()) {
376 SlotIndex Def = OldVNI->def;
377 LI->addRange(LiveRange(Def, Def.getDeadSlot(), OldVNI));
378 // No longer a simple mapping. Switch to a complex, non-forced mapping.
379 InsP.first->second = ValueForcePair();
382 // This is a complex mapping, add liveness for VNI
383 SlotIndex Def = VNI->def;
384 LI->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
389 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
390 assert(ParentVNI && "Mapping NULL value");
391 ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
392 VNInfo *VNI = VFP.getPointer();
394 // ParentVNI was either unmapped or already complex mapped. Either way, just
395 // set the force bit.
401 // This was previously a single mapping. Make sure the old def is represented
402 // by a trivial live range.
403 SlotIndex Def = VNI->def;
404 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getDeadSlot(), VNI));
405 // Mark as complex mapped, forced.
406 VFP = ValueForcePair(0, true);
409 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
412 MachineBasicBlock &MBB,
413 MachineBasicBlock::iterator I) {
414 MachineInstr *CopyMI = 0;
416 LiveInterval *LI = Edit->get(RegIdx);
418 // We may be trying to avoid interference that ends at a deleted instruction,
419 // so always begin RegIdx 0 early and all others late.
420 bool Late = RegIdx != 0;
422 // Attempt cheap-as-a-copy rematerialization.
423 LiveRangeEdit::Remat RM(ParentVNI);
424 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
425 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
428 // Can't remat, just insert a copy from parent.
429 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
430 .addReg(Edit->getReg());
431 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
436 // Define the value in Reg.
437 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
438 VNI->setCopy(CopyMI);
442 /// Create a new virtual register and live interval.
443 unsigned SplitEditor::openIntv() {
444 // Create the complement as index 0.
446 Edit->create(LIS, VRM);
448 // Create the open interval.
449 OpenIdx = Edit->size();
450 Edit->create(LIS, VRM);
454 void SplitEditor::selectIntv(unsigned Idx) {
455 assert(Idx != 0 && "Cannot select the complement interval");
456 assert(Idx < Edit->size() && "Can only select previously opened interval");
457 DEBUG(dbgs() << " selectIntv " << OpenIdx << " -> " << Idx << '\n');
461 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
462 assert(OpenIdx && "openIntv not called before enterIntvBefore");
463 DEBUG(dbgs() << " enterIntvBefore " << Idx);
464 Idx = Idx.getBaseIndex();
465 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
467 DEBUG(dbgs() << ": not live\n");
470 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
471 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
472 assert(MI && "enterIntvBefore called with invalid index");
474 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
478 SlotIndex SplitEditor::enterIntvAfter(SlotIndex Idx) {
479 assert(OpenIdx && "openIntv not called before enterIntvAfter");
480 DEBUG(dbgs() << " enterIntvAfter " << Idx);
481 Idx = Idx.getBoundaryIndex();
482 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
484 DEBUG(dbgs() << ": not live\n");
487 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
488 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
489 assert(MI && "enterIntvAfter called with invalid index");
491 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(),
492 llvm::next(MachineBasicBlock::iterator(MI)));
496 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
497 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
498 SlotIndex End = LIS.getMBBEndIdx(&MBB);
499 SlotIndex Last = End.getPrevSlot();
500 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
501 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
503 DEBUG(dbgs() << ": not live\n");
506 DEBUG(dbgs() << ": valno " << ParentVNI->id);
507 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
508 SA.getLastSplitPointIter(&MBB));
509 RegAssign.insert(VNI->def, End, OpenIdx);
514 /// useIntv - indicate that all instructions in MBB should use OpenLI.
515 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
516 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
519 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
520 assert(OpenIdx && "openIntv not called before useIntv");
521 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
522 RegAssign.insert(Start, End, OpenIdx);
526 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
527 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
528 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
530 // The interval must be live beyond the instruction at Idx.
531 SlotIndex Boundary = Idx.getBoundaryIndex();
532 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Boundary);
534 DEBUG(dbgs() << ": not live\n");
535 return Boundary.getNextSlot();
537 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
538 MachineInstr *MI = LIS.getInstructionFromIndex(Boundary);
539 assert(MI && "No instruction at index");
541 // In spill mode, make live ranges as short as possible by inserting the copy
542 // before MI. This is only possible if that instruction doesn't redefine the
543 // value. The inserted COPY is not a kill, and we don't need to recompute
544 // the source live range. The spiller also won't try to hoist this copy.
545 if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) &&
546 MI->readsVirtualRegister(Edit->getReg())) {
547 forceRecompute(0, ParentVNI);
548 defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
552 VNInfo *VNI = defFromParent(0, ParentVNI, Boundary, *MI->getParent(),
553 llvm::next(MachineBasicBlock::iterator(MI)));
557 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
558 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
559 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
561 // The interval must be live into the instruction at Idx.
562 Idx = Idx.getBaseIndex();
563 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
565 DEBUG(dbgs() << ": not live\n");
566 return Idx.getNextSlot();
568 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
570 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
571 assert(MI && "No instruction at index");
572 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
576 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
577 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
578 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
579 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
581 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
583 DEBUG(dbgs() << ": not live\n");
587 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
588 MBB.SkipPHIsAndLabels(MBB.begin()));
589 RegAssign.insert(Start, VNI->def, OpenIdx);
594 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
595 assert(OpenIdx && "openIntv not called before overlapIntv");
596 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
597 assert(ParentVNI == Edit->getParent().getVNInfoBefore(End) &&
598 "Parent changes value in extended range");
599 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
600 "Range cannot span basic blocks");
602 // The complement interval will be extended as needed by LRCalc.extend().
604 forceRecompute(0, ParentVNI);
605 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
606 RegAssign.insert(Start, End, OpenIdx);
610 //===----------------------------------------------------------------------===//
612 //===----------------------------------------------------------------------===//
614 void SplitEditor::removeBackCopies(SmallVectorImpl<VNInfo*> &Copies) {
615 LiveInterval *LI = Edit->get(0);
616 DEBUG(dbgs() << "Removing " << Copies.size() << " back-copies.\n");
617 RegAssignMap::iterator AssignI;
618 AssignI.setMap(RegAssign);
620 for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
621 VNInfo *VNI = Copies[i];
622 SlotIndex Def = VNI->def;
623 MachineInstr *MI = LIS.getInstructionFromIndex(Def);
624 assert(MI && "No instruction for back-copy");
626 MachineBasicBlock *MBB = MI->getParent();
627 MachineBasicBlock::iterator MBBI(MI);
629 do AtBegin = MBBI == MBB->begin();
630 while (!AtBegin && (--MBBI)->isDebugValue());
632 DEBUG(dbgs() << "Removing " << Def << '\t' << *MI);
633 LI->removeValNo(VNI);
634 LIS.RemoveMachineInstrFromMaps(MI);
635 MI->eraseFromParent();
637 // Adjust RegAssign if a register assignment is killed at VNI->def. We
638 // want to avoid calculating the live range of the source register if
640 AssignI.find(VNI->def.getPrevSlot());
641 if (!AssignI.valid() || AssignI.start() >= Def)
643 // If MI doesn't kill the assigned register, just leave it.
644 if (AssignI.stop() != Def)
646 unsigned RegIdx = AssignI.value();
647 if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) {
648 DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx << '\n');
649 forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
651 SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot();
652 DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI);
653 AssignI.setStop(Kill);
659 SplitEditor::findShallowDominator(MachineBasicBlock *MBB,
660 MachineBasicBlock *DefMBB) {
663 assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def.");
665 const MachineLoopInfo &Loops = SA.Loops;
666 const MachineLoop *DefLoop = Loops.getLoopFor(DefMBB);
667 MachineDomTreeNode *DefDomNode = MDT[DefMBB];
669 // Best candidate so far.
670 MachineBasicBlock *BestMBB = MBB;
671 unsigned BestDepth = UINT_MAX;
674 const MachineLoop *Loop = Loops.getLoopFor(MBB);
676 // MBB isn't in a loop, it doesn't get any better. All dominators have a
677 // higher frequency by definition.
679 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
680 << MBB->getNumber() << " at depth 0\n");
684 // We'll never be able to exit the DefLoop.
685 if (Loop == DefLoop) {
686 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
687 << MBB->getNumber() << " in the same loop\n");
691 // Least busy dominator seen so far.
692 unsigned Depth = Loop->getLoopDepth();
693 if (Depth < BestDepth) {
696 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
697 << MBB->getNumber() << " at depth " << Depth << '\n');
700 // Leave loop by going to the immediate dominator of the loop header.
701 // This is a bigger stride than simply walking up the dominator tree.
702 MachineDomTreeNode *IDom = MDT[Loop->getHeader()]->getIDom();
704 // Too far up the dominator tree?
705 if (!IDom || !MDT.dominates(DefDomNode, IDom))
708 MBB = IDom->getBlock();
712 void SplitEditor::hoistCopiesForSize() {
713 // Get the complement interval, always RegIdx 0.
714 LiveInterval *LI = Edit->get(0);
715 LiveInterval *Parent = &Edit->getParent();
717 // Track the nearest common dominator for all back-copies for each ParentVNI,
718 // indexed by ParentVNI->id.
719 typedef std::pair<MachineBasicBlock*, SlotIndex> DomPair;
720 SmallVector<DomPair, 8> NearestDom(Parent->getNumValNums());
722 // Find the nearest common dominator for parent values with multiple
723 // back-copies. If a single back-copy dominates, put it in DomPair.second.
724 for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end();
727 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
728 assert(ParentVNI && "Parent not live at complement def");
730 // Don't hoist remats. The complement is probably going to disappear
731 // completely anyway.
732 if (Edit->didRematerialize(ParentVNI))
735 MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def);
736 DomPair &Dom = NearestDom[ParentVNI->id];
738 // Keep directly defined parent values. This is either a PHI or an
739 // instruction in the complement range. All other copies of ParentVNI
740 // should be eliminated.
741 if (VNI->def == ParentVNI->def) {
742 DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n');
743 Dom = DomPair(ValMBB, VNI->def);
746 // Skip the singly mapped values. There is nothing to gain from hoisting a
748 if (Values.lookup(std::make_pair(0, ParentVNI->id)).getPointer()) {
749 DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n');
754 // First time we see ParentVNI. VNI dominates itself.
755 Dom = DomPair(ValMBB, VNI->def);
756 } else if (Dom.first == ValMBB) {
757 // Two defs in the same block. Pick the earlier def.
758 if (!Dom.second.isValid() || VNI->def < Dom.second)
759 Dom.second = VNI->def;
761 // Different basic blocks. Check if one dominates.
762 MachineBasicBlock *Near =
763 MDT.findNearestCommonDominator(Dom.first, ValMBB);
765 // Def ValMBB dominates.
766 Dom = DomPair(ValMBB, VNI->def);
767 else if (Near != Dom.first)
768 // None dominate. Hoist to common dominator, need new def.
769 Dom = DomPair(Near, SlotIndex());
772 DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def
773 << " for parent " << ParentVNI->id << '@' << ParentVNI->def
774 << " hoist to BB#" << Dom.first->getNumber() << ' '
775 << Dom.second << '\n');
778 // Insert the hoisted copies.
779 for (unsigned i = 0, e = Parent->getNumValNums(); i != e; ++i) {
780 DomPair &Dom = NearestDom[i];
781 if (!Dom.first || Dom.second.isValid())
783 // This value needs a hoisted copy inserted at the end of Dom.first.
784 VNInfo *ParentVNI = Parent->getValNumInfo(i);
785 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def);
786 // Get a less loopy dominator than Dom.first.
787 Dom.first = findShallowDominator(Dom.first, DefMBB);
788 SlotIndex Last = LIS.getMBBEndIdx(Dom.first).getPrevSlot();
790 defFromParent(0, ParentVNI, Last, *Dom.first,
791 SA.getLastSplitPointIter(Dom.first))->def;
794 // Remove redundant back-copies that are now known to be dominated by another
795 // def with the same value.
796 SmallVector<VNInfo*, 8> BackCopies;
797 for (LiveInterval::vni_iterator VI = LI->vni_begin(), VE = LI->vni_end();
800 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
801 const DomPair &Dom = NearestDom[ParentVNI->id];
802 if (!Dom.first || Dom.second == VNI->def)
804 BackCopies.push_back(VNI);
805 forceRecompute(0, ParentVNI);
807 removeBackCopies(BackCopies);
811 /// transferValues - Transfer all possible values to the new live ranges.
812 /// Values that were rematerialized are left alone, they need LRCalc.extend().
813 bool SplitEditor::transferValues() {
814 bool Skipped = false;
815 RegAssignMap::const_iterator AssignI = RegAssign.begin();
816 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
817 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
818 DEBUG(dbgs() << " blit " << *ParentI << ':');
819 VNInfo *ParentVNI = ParentI->valno;
820 // RegAssign has holes where RegIdx 0 should be used.
821 SlotIndex Start = ParentI->start;
822 AssignI.advanceTo(Start);
825 SlotIndex End = ParentI->end;
826 if (!AssignI.valid()) {
828 } else if (AssignI.start() <= Start) {
829 RegIdx = AssignI.value();
830 if (AssignI.stop() < End) {
831 End = AssignI.stop();
836 End = std::min(End, AssignI.start());
839 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
840 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
841 LiveInterval *LI = Edit->get(RegIdx);
843 // Check for a simply defined value that can be blitted directly.
844 ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
845 if (VNInfo *VNI = VFP.getPointer()) {
846 DEBUG(dbgs() << ':' << VNI->id);
847 LI->addRange(LiveRange(Start, End, VNI));
852 // Skip values with forced recomputation.
854 DEBUG(dbgs() << "(recalc)");
860 LiveRangeCalc &LRC = getLRCalc(RegIdx);
862 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
863 // so the live range is accurate. Add live-in blocks in [Start;End) to the
865 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
866 SlotIndex BlockStart, BlockEnd;
867 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
869 // The first block may be live-in, or it may have its own def.
870 if (Start != BlockStart) {
871 VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
872 assert(VNI && "Missing def for complex mapped value");
873 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
874 // MBB has its own def. Is it also live-out?
876 LRC.setLiveOutValue(MBB, VNI);
878 // Skip to the next block for live-in.
880 BlockStart = BlockEnd;
883 // Handle the live-in blocks covered by [Start;End).
884 assert(Start <= BlockStart && "Expected live-in block");
885 while (BlockStart < End) {
886 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
887 BlockEnd = LIS.getMBBEndIdx(MBB);
888 if (BlockStart == ParentVNI->def) {
889 // This block has the def of a parent PHI, so it isn't live-in.
890 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
891 VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
892 assert(VNI && "Missing def for complex mapped parent PHI");
894 LRC.setLiveOutValue(MBB, VNI); // Live-out as well.
896 // This block needs a live-in value. The last block covered may not
899 LRC.addLiveInBlock(LI, MDT[MBB], End);
901 // Live-through, and we don't know the value.
902 LRC.addLiveInBlock(LI, MDT[MBB]);
903 LRC.setLiveOutValue(MBB, 0);
906 BlockStart = BlockEnd;
910 } while (Start != ParentI->end);
911 DEBUG(dbgs() << '\n');
914 LRCalc[0].calculateValues(LIS.getSlotIndexes(), &MDT,
915 &LIS.getVNInfoAllocator());
917 LRCalc[1].calculateValues(LIS.getSlotIndexes(), &MDT,
918 &LIS.getVNInfoAllocator());
923 void SplitEditor::extendPHIKillRanges() {
924 // Extend live ranges to be live-out for successor PHI values.
925 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
926 E = Edit->getParent().vni_end(); I != E; ++I) {
927 const VNInfo *PHIVNI = *I;
928 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
930 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
931 LiveInterval *LI = Edit->get(RegIdx);
932 LiveRangeCalc &LRC = getLRCalc(RegIdx);
933 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
934 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
935 PE = MBB->pred_end(); PI != PE; ++PI) {
936 SlotIndex End = LIS.getMBBEndIdx(*PI);
937 SlotIndex LastUse = End.getPrevSlot();
938 // The predecessor may not have a live-out value. That is OK, like an
939 // undef PHI operand.
940 if (Edit->getParent().liveAt(LastUse)) {
941 assert(RegAssign.lookup(LastUse) == RegIdx &&
942 "Different register assignment in phi predecessor");
944 LIS.getSlotIndexes(), &MDT, &LIS.getVNInfoAllocator());
950 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
951 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
952 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
953 RE = MRI.reg_end(); RI != RE;) {
954 MachineOperand &MO = RI.getOperand();
955 MachineInstr *MI = MO.getParent();
957 // LiveDebugVariables should have handled all DBG_VALUE instructions.
958 if (MI->isDebugValue()) {
959 DEBUG(dbgs() << "Zapping " << *MI);
964 // <undef> operands don't really read the register, so it doesn't matter
965 // which register we choose. When the use operand is tied to a def, we must
966 // use the same register as the def, so just do that always.
967 SlotIndex Idx = LIS.getInstructionIndex(MI);
968 if (MO.isDef() || MO.isUndef())
969 Idx = Idx.getRegSlot(MO.isEarlyClobber());
971 // Rewrite to the mapped register at Idx.
972 unsigned RegIdx = RegAssign.lookup(Idx);
973 LiveInterval *LI = Edit->get(RegIdx);
975 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
976 << Idx << ':' << RegIdx << '\t' << *MI);
978 // Extend liveness to Idx if the instruction reads reg.
979 if (!ExtendRanges || MO.isUndef())
982 // Skip instructions that don't read Reg.
984 if (!MO.getSubReg() && !MO.isEarlyClobber())
986 // We may wan't to extend a live range for a partial redef, or for a use
987 // tied to an early clobber.
988 Idx = Idx.getPrevSlot();
989 if (!Edit->getParent().liveAt(Idx))
992 Idx = Idx.getRegSlot(true);
994 getLRCalc(RegIdx).extend(LI, Idx.getNextSlot(), LIS.getSlotIndexes(),
995 &MDT, &LIS.getVNInfoAllocator());
999 void SplitEditor::deleteRematVictims() {
1000 SmallVector<MachineInstr*, 8> Dead;
1001 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
1002 LiveInterval *LI = *I;
1003 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
1004 LII != LIE; ++LII) {
1005 // Dead defs end at the dead slot.
1006 if (LII->end != LII->valno->def.getDeadSlot())
1008 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
1009 assert(MI && "Missing instruction for dead def");
1010 MI->addRegisterDead(LI->reg, &TRI);
1012 if (!MI->allDefsAreDead())
1015 DEBUG(dbgs() << "All defs dead: " << *MI);
1023 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
1026 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
1029 // At this point, the live intervals in Edit contain VNInfos corresponding to
1030 // the inserted copies.
1032 // Add the original defs from the parent interval.
1033 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
1034 E = Edit->getParent().vni_end(); I != E; ++I) {
1035 const VNInfo *ParentVNI = *I;
1036 if (ParentVNI->isUnused())
1038 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1039 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
1040 VNI->setIsPHIDef(ParentVNI->isPHIDef());
1041 VNI->setCopy(ParentVNI->getCopy());
1043 // Force rematted values to be recomputed everywhere.
1044 // The new live ranges may be truncated.
1045 if (Edit->didRematerialize(ParentVNI))
1046 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1047 forceRecompute(i, ParentVNI);
1050 // Hoist back-copies to the complement interval when in spill mode.
1051 switch (SpillMode) {
1053 // Leave all back-copies as is.
1056 hoistCopiesForSize();
1059 llvm_unreachable("Spill mode 'speed' not implemented yet");
1063 // Transfer the simply mapped values, check if any are skipped.
1064 bool Skipped = transferValues();
1066 extendPHIKillRanges();
1070 // Rewrite virtual registers, possibly extending ranges.
1071 rewriteAssigned(Skipped);
1073 // Delete defs that were rematted everywhere.
1075 deleteRematVictims();
1077 // Get rid of unused values and set phi-kill flags.
1078 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1079 (*I)->RenumberValues(LIS);
1081 // Provide a reverse mapping from original indices to Edit ranges.
1084 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1085 LRMap->push_back(i);
1088 // Now check if any registers were separated into multiple components.
1089 ConnectedVNInfoEqClasses ConEQ(LIS);
1090 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1091 // Don't use iterators, they are invalidated by create() below.
1092 LiveInterval *li = Edit->get(i);
1093 unsigned NumComp = ConEQ.Classify(li);
1096 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1097 SmallVector<LiveInterval*, 8> dups;
1099 for (unsigned j = 1; j != NumComp; ++j)
1100 dups.push_back(&Edit->create(LIS, VRM));
1101 ConEQ.Distribute(&dups[0], MRI);
1102 // The new intervals all map back to i.
1104 LRMap->resize(Edit->size(), i);
1107 // Calculate spill weight and allocation hints for new intervals.
1108 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1110 assert(!LRMap || LRMap->size() == Edit->size());
1114 //===----------------------------------------------------------------------===//
1115 // Single Block Splitting
1116 //===----------------------------------------------------------------------===//
1118 bool SplitAnalysis::shouldSplitSingleBlock(const BlockInfo &BI,
1119 bool SingleInstrs) const {
1120 // Always split for multiple instructions.
1121 if (!BI.isOneInstr())
1123 // Don't split for single instructions unless explicitly requested.
1126 // Splitting a live-through range always makes progress.
1127 if (BI.LiveIn && BI.LiveOut)
1129 // No point in isolating a copy. It has no register class constraints.
1130 if (LIS.getInstructionFromIndex(BI.FirstInstr)->isCopyLike())
1132 // Finally, don't isolate an end point that was created by earlier splits.
1133 return isOriginalEndpoint(BI.FirstInstr);
1136 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1138 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1139 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstInstr,
1141 if (!BI.LiveOut || BI.LastInstr < LastSplitPoint) {
1142 useIntv(SegStart, leaveIntvAfter(BI.LastInstr));
1144 // The last use is after the last valid split point.
1145 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1146 useIntv(SegStart, SegStop);
1147 overlapIntv(SegStop, BI.LastInstr);
1152 //===----------------------------------------------------------------------===//
1153 // Global Live Range Splitting Support
1154 //===----------------------------------------------------------------------===//
1156 // These methods support a method of global live range splitting that uses a
1157 // global algorithm to decide intervals for CFG edges. They will insert split
1158 // points and color intervals in basic blocks while avoiding interference.
1160 // Note that splitSingleBlock is also useful for blocks where both CFG edges
1161 // are on the stack.
1163 void SplitEditor::splitLiveThroughBlock(unsigned MBBNum,
1164 unsigned IntvIn, SlotIndex LeaveBefore,
1165 unsigned IntvOut, SlotIndex EnterAfter){
1166 SlotIndex Start, Stop;
1167 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum);
1169 DEBUG(dbgs() << "BB#" << MBBNum << " [" << Start << ';' << Stop
1170 << ") intf " << LeaveBefore << '-' << EnterAfter
1171 << ", live-through " << IntvIn << " -> " << IntvOut);
1173 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks");
1175 assert((!LeaveBefore || LeaveBefore < Stop) && "Interference after block");
1176 assert((!IntvIn || !LeaveBefore || LeaveBefore > Start) && "Impossible intf");
1177 assert((!EnterAfter || EnterAfter >= Start) && "Interference before block");
1179 MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum);
1182 DEBUG(dbgs() << ", spill on entry.\n");
1184 // <<<<<<<<< Possible LeaveBefore interference.
1185 // |-----------| Live through.
1186 // -____________ Spill on entry.
1189 SlotIndex Idx = leaveIntvAtTop(*MBB);
1190 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
1196 DEBUG(dbgs() << ", reload on exit.\n");
1198 // >>>>>>> Possible EnterAfter interference.
1199 // |-----------| Live through.
1200 // ___________-- Reload on exit.
1202 selectIntv(IntvOut);
1203 SlotIndex Idx = enterIntvAtEnd(*MBB);
1204 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
1209 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) {
1210 DEBUG(dbgs() << ", straight through.\n");
1212 // |-----------| Live through.
1213 // ------------- Straight through, same intv, no interference.
1215 selectIntv(IntvOut);
1216 useIntv(Start, Stop);
1220 // We cannot legally insert splits after LSP.
1221 SlotIndex LSP = SA.getLastSplitPoint(MBBNum);
1222 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf");
1224 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter ||
1225 LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) {
1226 DEBUG(dbgs() << ", switch avoiding interference.\n");
1228 // >>>> <<<< Non-overlapping EnterAfter/LeaveBefore interference.
1229 // |-----------| Live through.
1230 // ------======= Switch intervals between interference.
1232 selectIntv(IntvOut);
1234 if (LeaveBefore && LeaveBefore < LSP) {
1235 Idx = enterIntvBefore(LeaveBefore);
1238 Idx = enterIntvAtEnd(*MBB);
1241 useIntv(Start, Idx);
1242 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
1243 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
1247 DEBUG(dbgs() << ", create local intv for interference.\n");
1249 // >>><><><><<<< Overlapping EnterAfter/LeaveBefore interference.
1250 // |-----------| Live through.
1251 // ==---------== Switch intervals before/after interference.
1253 assert(LeaveBefore <= EnterAfter && "Missed case");
1255 selectIntv(IntvOut);
1256 SlotIndex Idx = enterIntvAfter(EnterAfter);
1258 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
1261 Idx = leaveIntvBefore(LeaveBefore);
1262 useIntv(Start, Idx);
1263 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
1267 void SplitEditor::splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
1268 unsigned IntvIn, SlotIndex LeaveBefore) {
1269 SlotIndex Start, Stop;
1270 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
1272 DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
1273 << "), uses " << BI.FirstInstr << '-' << BI.LastInstr
1274 << ", reg-in " << IntvIn << ", leave before " << LeaveBefore
1275 << (BI.LiveOut ? ", stack-out" : ", killed in block"));
1277 assert(IntvIn && "Must have register in");
1278 assert(BI.LiveIn && "Must be live-in");
1279 assert((!LeaveBefore || LeaveBefore > Start) && "Bad interference");
1281 if (!BI.LiveOut && (!LeaveBefore || LeaveBefore >= BI.LastInstr)) {
1282 DEBUG(dbgs() << " before interference.\n");
1284 // <<< Interference after kill.
1285 // |---o---x | Killed in block.
1286 // ========= Use IntvIn everywhere.
1289 useIntv(Start, BI.LastInstr);
1293 SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber());
1295 if (!LeaveBefore || LeaveBefore > BI.LastInstr.getBoundaryIndex()) {
1297 // <<< Possible interference after last use.
1298 // |---o---o---| Live-out on stack.
1299 // =========____ Leave IntvIn after last use.
1301 // < Interference after last use.
1302 // |---o---o--o| Live-out on stack, late last use.
1303 // ============ Copy to stack after LSP, overlap IntvIn.
1304 // \_____ Stack interval is live-out.
1306 if (BI.LastInstr < LSP) {
1307 DEBUG(dbgs() << ", spill after last use before interference.\n");
1309 SlotIndex Idx = leaveIntvAfter(BI.LastInstr);
1310 useIntv(Start, Idx);
1311 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
1313 DEBUG(dbgs() << ", spill before last split point.\n");
1315 SlotIndex Idx = leaveIntvBefore(LSP);
1316 overlapIntv(Idx, BI.LastInstr);
1317 useIntv(Start, Idx);
1318 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference");
1323 // The interference is overlapping somewhere we wanted to use IntvIn. That
1324 // means we need to create a local interval that can be allocated a
1325 // different register.
1326 unsigned LocalIntv = openIntv();
1328 DEBUG(dbgs() << ", creating local interval " << LocalIntv << ".\n");
1330 if (!BI.LiveOut || BI.LastInstr < LSP) {
1332 // <<<<<<< Interference overlapping uses.
1333 // |---o---o---| Live-out on stack.
1334 // =====----____ Leave IntvIn before interference, then spill.
1336 SlotIndex To = leaveIntvAfter(BI.LastInstr);
1337 SlotIndex From = enterIntvBefore(LeaveBefore);
1340 useIntv(Start, From);
1341 assert((!LeaveBefore || From <= LeaveBefore) && "Interference");
1345 // <<<<<<< Interference overlapping uses.
1346 // |---o---o--o| Live-out on stack, late last use.
1347 // =====------- Copy to stack before LSP, overlap LocalIntv.
1348 // \_____ Stack interval is live-out.
1350 SlotIndex To = leaveIntvBefore(LSP);
1351 overlapIntv(To, BI.LastInstr);
1352 SlotIndex From = enterIntvBefore(std::min(To, LeaveBefore));
1355 useIntv(Start, From);
1356 assert((!LeaveBefore || From <= LeaveBefore) && "Interference");
1359 void SplitEditor::splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
1360 unsigned IntvOut, SlotIndex EnterAfter) {
1361 SlotIndex Start, Stop;
1362 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
1364 DEBUG(dbgs() << "BB#" << BI.MBB->getNumber() << " [" << Start << ';' << Stop
1365 << "), uses " << BI.FirstInstr << '-' << BI.LastInstr
1366 << ", reg-out " << IntvOut << ", enter after " << EnterAfter
1367 << (BI.LiveIn ? ", stack-in" : ", defined in block"));
1369 SlotIndex LSP = SA.getLastSplitPoint(BI.MBB->getNumber());
1371 assert(IntvOut && "Must have register out");
1372 assert(BI.LiveOut && "Must be live-out");
1373 assert((!EnterAfter || EnterAfter < LSP) && "Bad interference");
1375 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) {
1376 DEBUG(dbgs() << " after interference.\n");
1378 // >>>> Interference before def.
1379 // | o---o---| Defined in block.
1380 // ========= Use IntvOut everywhere.
1382 selectIntv(IntvOut);
1383 useIntv(BI.FirstInstr, Stop);
1387 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) {
1388 DEBUG(dbgs() << ", reload after interference.\n");
1390 // >>>> Interference before def.
1391 // |---o---o---| Live-through, stack-in.
1392 // ____========= Enter IntvOut before first use.
1394 selectIntv(IntvOut);
1395 SlotIndex Idx = enterIntvBefore(std::min(LSP, BI.FirstInstr));
1397 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
1401 // The interference is overlapping somewhere we wanted to use IntvOut. That
1402 // means we need to create a local interval that can be allocated a
1403 // different register.
1404 DEBUG(dbgs() << ", interference overlaps uses.\n");
1406 // >>>>>>> Interference overlapping uses.
1407 // |---o---o---| Live-through, stack-in.
1408 // ____---====== Create local interval for interference range.
1410 selectIntv(IntvOut);
1411 SlotIndex Idx = enterIntvAfter(EnterAfter);
1413 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");
1416 SlotIndex From = enterIntvBefore(std::min(Idx, BI.FirstInstr));