1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
34 //===----------------------------------------------------------------------===//
36 //===----------------------------------------------------------------------===//
38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
39 const LiveIntervals &lis,
40 const MachineLoopInfo &mli)
41 : MF(vrm.getMachineFunction()),
45 TII(*MF.getTarget().getInstrInfo()),
47 LastSplitPoint(MF.getNumBlockIDs()) {}
49 void SplitAnalysis::clear() {
52 ThroughBlocks.clear();
56 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
57 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
58 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
59 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
61 // Compute split points on the first call. The pair is independent of the
62 // current live interval.
63 if (!LSP.first.isValid()) {
64 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
65 if (FirstTerm == MBB->end())
66 LSP.first = LIS.getMBBEndIdx(MBB);
68 LSP.first = LIS.getInstructionIndex(FirstTerm);
70 // If there is a landing pad successor, also find the call instruction.
73 // There may not be a call instruction (?) in which case we ignore LPad.
74 LSP.second = LSP.first;
75 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
77 if (I->getDesc().isCall()) {
78 LSP.second = LIS.getInstructionIndex(I);
83 // If CurLI is live into a landing pad successor, move the last split point
84 // back to the call that may throw.
85 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
91 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
92 void SplitAnalysis::analyzeUses() {
93 assert(UseSlots.empty() && "Call clear first");
95 // First get all the defs from the interval values. This provides the correct
96 // slots for early clobbers.
97 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
98 E = CurLI->vni_end(); I != E; ++I)
99 if (!(*I)->isPHIDef() && !(*I)->isUnused())
100 UseSlots.push_back((*I)->def);
102 // Get use slots form the use-def chain.
103 const MachineRegisterInfo &MRI = MF.getRegInfo();
104 for (MachineRegisterInfo::use_nodbg_iterator
105 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
107 if (!I.getOperand().isUndef())
108 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
110 array_pod_sort(UseSlots.begin(), UseSlots.end());
112 // Remove duplicates, keeping the smaller slot for each instruction.
113 // That is what we want for early clobbers.
114 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
115 SlotIndex::isSameInstr),
118 // Compute per-live block info.
119 if (!calcLiveBlockInfo()) {
120 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
121 // I am looking at you, SimpleRegisterCoalescing!
122 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
123 const_cast<LiveIntervals&>(LIS)
124 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
126 ThroughBlocks.clear();
127 bool fixed = calcLiveBlockInfo();
129 assert(fixed && "Couldn't fix broken live interval");
132 DEBUG(dbgs() << "Analyze counted "
133 << UseSlots.size() << " instrs in "
134 << UseBlocks.size() << " blocks, through "
135 << NumThroughBlocks << " blocks.\n");
138 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
139 /// where CurLI is live.
140 bool SplitAnalysis::calcLiveBlockInfo() {
141 ThroughBlocks.resize(MF.getNumBlockIDs());
142 NumThroughBlocks = 0;
146 LiveInterval::const_iterator LVI = CurLI->begin();
147 LiveInterval::const_iterator LVE = CurLI->end();
149 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
150 UseI = UseSlots.begin();
151 UseE = UseSlots.end();
153 // Loop over basic blocks where CurLI is live.
154 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
158 SlotIndex Start, Stop;
159 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
161 // LVI is the first live segment overlapping MBB.
162 BI.LiveIn = LVI->start <= Start;
166 // Find the first and last uses in the block.
167 bool Uses = UseI != UseE && *UseI < Stop;
170 assert(BI.FirstUse >= Start);
172 while (UseI != UseE && *UseI < Stop);
173 BI.LastUse = UseI[-1];
174 assert(BI.LastUse < Stop);
177 // Look for gaps in the live range.
180 while (LVI->end < Stop) {
181 SlotIndex LastStop = LVI->end;
182 if (++LVI == LVE || LVI->start >= Stop) {
187 if (LastStop < LVI->start) {
194 // Don't set LiveThrough when the block has a gap.
195 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
197 UseBlocks.push_back(BI);
200 ThroughBlocks.set(BI.MBB->getNumber());
202 // FIXME: This should never happen. The live range stops or starts without a
203 // corresponding use. An earlier pass did something wrong.
204 if (!BI.LiveThrough && !Uses)
207 // LVI is now at LVE or LVI->end >= Stop.
211 // Live segment ends exactly at Stop. Move to the next segment.
212 if (LVI->end == Stop && ++LVI == LVE)
215 // Pick the next basic block.
216 if (LVI->start < Stop)
219 MFI = LIS.getMBBFromIndex(LVI->start);
224 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
227 LiveInterval *li = const_cast<LiveInterval*>(cli);
228 LiveInterval::iterator LVI = li->begin();
229 LiveInterval::iterator LVE = li->end();
232 // Loop over basic blocks where li is live.
233 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
234 SlotIndex Stop = LIS.getMBBEndIdx(MFI);
237 LVI = li->advanceTo(LVI, Stop);
242 Stop = LIS.getMBBEndIdx(MFI);
243 } while (Stop <= LVI->start);
247 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
248 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
249 const LiveInterval &Orig = LIS.getInterval(OrigReg);
250 assert(!Orig.empty() && "Splitting empty interval?");
251 LiveInterval::const_iterator I = Orig.find(Idx);
253 // Range containing Idx should begin at Idx.
254 if (I != Orig.end() && I->start <= Idx)
255 return I->start == Idx;
257 // Range does not contain Idx, previous must end at Idx.
258 return I != Orig.begin() && (--I)->end == Idx;
261 void SplitAnalysis::analyze(const LiveInterval *li) {
268 //===----------------------------------------------------------------------===//
270 //===----------------------------------------------------------------------===//
272 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
273 SplitEditor::SplitEditor(SplitAnalysis &sa,
276 MachineDominatorTree &mdt)
277 : SA(sa), LIS(lis), VRM(vrm),
278 MRI(vrm.getMachineFunction().getRegInfo()),
280 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
281 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
287 void SplitEditor::reset(LiveRangeEdit &lre) {
293 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
296 // We don't need an AliasAnalysis since we will only be performing
297 // cheap-as-a-copy remats anyway.
298 Edit->anyRematerializable(LIS, TII, 0);
301 void SplitEditor::dump() const {
302 if (RegAssign.empty()) {
303 dbgs() << " empty\n";
307 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
308 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
312 VNInfo *SplitEditor::defValue(unsigned RegIdx,
313 const VNInfo *ParentVNI,
315 assert(ParentVNI && "Mapping NULL value");
316 assert(Idx.isValid() && "Invalid SlotIndex");
317 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
318 LiveInterval *LI = Edit->get(RegIdx);
320 // Create a new value.
321 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
323 // Use insert for lookup, so we can add missing values with a second lookup.
324 std::pair<ValueMap::iterator, bool> InsP =
325 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
327 // This was the first time (RegIdx, ParentVNI) was mapped.
328 // Keep it as a simple def without any liveness.
332 // If the previous value was a simple mapping, add liveness for it now.
333 if (VNInfo *OldVNI = InsP.first->second) {
334 SlotIndex Def = OldVNI->def;
335 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
336 // No longer a simple mapping.
337 InsP.first->second = 0;
340 // This is a complex mapping, add liveness for VNI
341 SlotIndex Def = VNI->def;
342 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
347 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
348 assert(ParentVNI && "Mapping NULL value");
349 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
351 // ParentVNI was either unmapped or already complex mapped. Either way.
355 // This was previously a single mapping. Make sure the old def is represented
356 // by a trivial live range.
357 SlotIndex Def = VNI->def;
358 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
362 // extendRange - Extend the live range to reach Idx.
363 // Potentially create phi-def values.
364 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
365 assert(Idx.isValid() && "Invalid SlotIndex");
366 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
367 assert(IdxMBB && "No MBB at Idx");
368 LiveInterval *LI = Edit->get(RegIdx);
370 // Is there a def in the same MBB we can extend?
371 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
374 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
375 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
376 // Perform a search for all predecessor blocks where we know the dominating
378 VNInfo *VNI = findReachingDefs(LI, IdxMBB, Idx.getNextSlot());
380 // When there were multiple different values, we may need new PHIs.
384 // Poor man's SSA update for the single-value case.
385 LiveOutPair LOP(VNI, MDT[LIS.getMBBFromIndex(VNI->def)]);
386 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
387 E = LiveInBlocks.end(); I != E; ++I) {
388 MachineBasicBlock *MBB = I->DomNode->getBlock();
389 SlotIndex Start = LIS.getMBBStartIdx(MBB);
390 if (I->Kill.isValid())
391 LI->addRange(LiveRange(Start, I->Kill, VNI));
393 LiveOutCache[MBB] = LOP;
394 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
399 /// findReachingDefs - Search the CFG for known live-out values.
400 /// Add required live-in blocks to LiveInBlocks.
401 VNInfo *SplitEditor::findReachingDefs(LiveInterval *LI,
402 MachineBasicBlock *KillMBB,
404 // Initialize the live-out cache the first time it is needed.
405 if (LiveOutSeen.empty()) {
406 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
407 LiveOutSeen.resize(N);
408 LiveOutCache.resize(N);
411 // Blocks where LI should be live-in.
412 SmallVector<MachineBasicBlock*, 16> WorkList(1, KillMBB);
414 // Remember if we have seen more than one value.
415 bool UniqueVNI = true;
418 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
419 for (unsigned i = 0; i != WorkList.size(); ++i) {
420 MachineBasicBlock *MBB = WorkList[i];
421 assert(!MBB->pred_empty() && "Value live-in to entry block?");
422 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
423 PE = MBB->pred_end(); PI != PE; ++PI) {
424 MachineBasicBlock *Pred = *PI;
425 LiveOutPair &LOP = LiveOutCache[Pred];
427 // Is this a known live-out block?
428 if (LiveOutSeen.test(Pred->getNumber())) {
429 if (VNInfo *VNI = LOP.first) {
430 if (TheVNI && TheVNI != VNI)
437 // First time. LOP is garbage and must be cleared below.
438 LiveOutSeen.set(Pred->getNumber());
440 // Does Pred provide a live-out value?
441 SlotIndex Start, Last;
442 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
443 Last = Last.getPrevSlot();
444 VNInfo *VNI = LI->extendInBlock(Start, Last);
447 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
448 if (TheVNI && TheVNI != VNI)
455 // No, we need a live-in value for Pred as well
457 WorkList.push_back(Pred);
459 // Loopback to KillMBB, so value is really live through.
464 // Transfer WorkList to LiveInBlocks in reverse order.
465 // This ordering works best with updateSSA().
466 LiveInBlocks.clear();
467 LiveInBlocks.reserve(WorkList.size());
468 while(!WorkList.empty())
469 LiveInBlocks.push_back(MDT[WorkList.pop_back_val()]);
471 // The kill block may not be live-through.
472 assert(LiveInBlocks.back().DomNode->getBlock() == KillMBB);
473 LiveInBlocks.back().Kill = Kill;
475 return UniqueVNI ? TheVNI : 0;
478 void SplitEditor::updateSSA() {
479 // This is essentially the same iterative algorithm that SSAUpdater uses,
480 // except we already have a dominator tree, so we don't have to recompute it.
484 // Propagate live-out values down the dominator tree, inserting phi-defs
486 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
487 E = LiveInBlocks.end(); I != E; ++I) {
488 MachineDomTreeNode *Node = I->DomNode;
489 // Skip block if the live-in value has already been determined.
492 MachineBasicBlock *MBB = Node->getBlock();
493 MachineDomTreeNode *IDom = Node->getIDom();
494 LiveOutPair IDomValue;
496 // We need a live-in value to a block with no immediate dominator?
497 // This is probably an unreachable block that has survived somehow.
498 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
500 // IDom dominates all of our predecessors, but it may not be their
501 // immediate dominator. Check if any of them have live-out values that are
502 // properly dominated by IDom. If so, we need a phi-def here.
504 IDomValue = LiveOutCache[IDom->getBlock()];
505 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
506 PE = MBB->pred_end(); PI != PE; ++PI) {
507 LiveOutPair Value = LiveOutCache[*PI];
508 if (!Value.first || Value.first == IDomValue.first)
510 // This predecessor is carrying something other than IDomValue.
511 // It could be because IDomValue hasn't propagated yet, or it could be
512 // because MBB is in the dominance frontier of that value.
513 if (MDT.dominates(IDom, Value.second)) {
520 // The value may be live-through even if Kill is set, as can happen when
521 // we are called from extendRange. In that case LiveOutSeen is true, and
522 // LiveOutCache indicates a foreign or missing value.
523 LiveOutPair &LOP = LiveOutCache[MBB];
525 // Create a phi-def if required.
528 SlotIndex Start = LIS.getMBBStartIdx(MBB);
529 unsigned RegIdx = RegAssign.lookup(Start);
530 LiveInterval *LI = Edit->get(RegIdx);
531 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
532 VNI->setIsPHIDef(true);
534 // This block is done, we know the final value.
536 if (I->Kill.isValid())
537 LI->addRange(LiveRange(Start, I->Kill, VNI));
539 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
540 LOP = LiveOutPair(VNI, Node);
542 } else if (IDomValue.first) {
543 // No phi-def here. Remember incoming value.
544 I->Value = IDomValue.first;
545 if (I->Kill.isValid())
547 // Propagate IDomValue if needed:
548 // MBB is live-out and doesn't define its own value.
549 if (LOP.second != Node && LOP.first != IDomValue.first) {
557 // The values in LiveInBlocks are now accurate. No more phi-defs are needed
558 // for these blocks, so we can color the live ranges.
559 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
560 E = LiveInBlocks.end(); I != E; ++I) {
563 assert(I->Value && "No live-in value found");
564 MachineBasicBlock *MBB = I->DomNode->getBlock();
565 SlotIndex Start = LIS.getMBBStartIdx(MBB);
566 unsigned RegIdx = RegAssign.lookup(Start);
567 LiveInterval *LI = Edit->get(RegIdx);
568 LI->addRange(LiveRange(Start, I->Kill.isValid() ?
569 I->Kill : LIS.getMBBEndIdx(MBB), I->Value));
573 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
576 MachineBasicBlock &MBB,
577 MachineBasicBlock::iterator I) {
578 MachineInstr *CopyMI = 0;
580 LiveInterval *LI = Edit->get(RegIdx);
582 // We may be trying to avoid interference that ends at a deleted instruction,
583 // so always begin RegIdx 0 early and all others late.
584 bool Late = RegIdx != 0;
586 // Attempt cheap-as-a-copy rematerialization.
587 LiveRangeEdit::Remat RM(ParentVNI);
588 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
589 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
591 // Can't remat, just insert a copy from parent.
592 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
593 .addReg(Edit->getReg());
594 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
598 // Define the value in Reg.
599 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
600 VNI->setCopy(CopyMI);
604 /// Create a new virtual register and live interval.
605 unsigned SplitEditor::openIntv() {
606 // Create the complement as index 0.
608 Edit->create(LIS, VRM);
610 // Create the open interval.
611 OpenIdx = Edit->size();
612 Edit->create(LIS, VRM);
616 void SplitEditor::selectIntv(unsigned Idx) {
617 assert(Idx != 0 && "Cannot select the complement interval");
618 assert(Idx < Edit->size() && "Can only select previously opened interval");
622 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
623 assert(OpenIdx && "openIntv not called before enterIntvBefore");
624 DEBUG(dbgs() << " enterIntvBefore " << Idx);
625 Idx = Idx.getBaseIndex();
626 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
628 DEBUG(dbgs() << ": not live\n");
631 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
632 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
633 assert(MI && "enterIntvBefore called with invalid index");
635 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
639 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
640 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
641 SlotIndex End = LIS.getMBBEndIdx(&MBB);
642 SlotIndex Last = End.getPrevSlot();
643 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
644 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
646 DEBUG(dbgs() << ": not live\n");
649 DEBUG(dbgs() << ": valno " << ParentVNI->id);
650 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
651 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
652 RegAssign.insert(VNI->def, End, OpenIdx);
657 /// useIntv - indicate that all instructions in MBB should use OpenLI.
658 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
659 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
662 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
663 assert(OpenIdx && "openIntv not called before useIntv");
664 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
665 RegAssign.insert(Start, End, OpenIdx);
669 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
670 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
671 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
673 // The interval must be live beyond the instruction at Idx.
674 Idx = Idx.getBoundaryIndex();
675 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
677 DEBUG(dbgs() << ": not live\n");
678 return Idx.getNextSlot();
680 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
682 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
683 assert(MI && "No instruction at index");
684 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
685 llvm::next(MachineBasicBlock::iterator(MI)));
689 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
690 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
691 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
693 // The interval must be live into the instruction at Idx.
694 Idx = Idx.getBoundaryIndex();
695 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
697 DEBUG(dbgs() << ": not live\n");
698 return Idx.getNextSlot();
700 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
702 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
703 assert(MI && "No instruction at index");
704 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
708 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
709 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
710 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
711 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
713 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
715 DEBUG(dbgs() << ": not live\n");
719 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
720 MBB.SkipPHIsAndLabels(MBB.begin()));
721 RegAssign.insert(Start, VNI->def, OpenIdx);
726 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
727 assert(OpenIdx && "openIntv not called before overlapIntv");
728 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
729 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
730 "Parent changes value in extended range");
731 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
732 "Range cannot span basic blocks");
734 // The complement interval will be extended as needed by extendRange().
736 markComplexMapped(0, ParentVNI);
737 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
738 RegAssign.insert(Start, End, OpenIdx);
742 /// transferValues - Transfer all possible values to the new live ranges.
743 /// Values that were rematerialized are left alone, they need extendRange().
744 bool SplitEditor::transferValues() {
745 bool Skipped = false;
746 LiveInBlocks.clear();
747 RegAssignMap::const_iterator AssignI = RegAssign.begin();
748 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
749 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
750 DEBUG(dbgs() << " blit " << *ParentI << ':');
751 VNInfo *ParentVNI = ParentI->valno;
752 // RegAssign has holes where RegIdx 0 should be used.
753 SlotIndex Start = ParentI->start;
754 AssignI.advanceTo(Start);
757 SlotIndex End = ParentI->end;
758 if (!AssignI.valid()) {
760 } else if (AssignI.start() <= Start) {
761 RegIdx = AssignI.value();
762 if (AssignI.stop() < End) {
763 End = AssignI.stop();
768 End = std::min(End, AssignI.start());
771 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
772 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
773 LiveInterval *LI = Edit->get(RegIdx);
775 // Check for a simply defined value that can be blitted directly.
776 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
777 DEBUG(dbgs() << ':' << VNI->id);
778 LI->addRange(LiveRange(Start, End, VNI));
783 // Skip rematerialized values, we need to use extendRange() and
784 // extendPHIKillRanges() to completely recompute the live ranges.
785 if (Edit->didRematerialize(ParentVNI)) {
786 DEBUG(dbgs() << "(remat)");
792 // Initialize the live-out cache the first time it is needed.
793 if (LiveOutSeen.empty()) {
794 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
795 LiveOutSeen.resize(N);
796 LiveOutCache.resize(N);
799 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
800 // so the live range is accurate. Add live-in blocks in [Start;End) to the
802 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
803 SlotIndex BlockStart, BlockEnd;
804 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
806 // The first block may be live-in, or it may have its own def.
807 if (Start != BlockStart) {
808 VNInfo *VNI = LI->extendInBlock(BlockStart,
809 std::min(BlockEnd, End).getPrevSlot());
810 assert(VNI && "Missing def for complex mapped value");
811 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
812 // MBB has its own def. Is it also live-out?
813 if (BlockEnd <= End) {
814 LiveOutSeen.set(MBB->getNumber());
815 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
817 // Skip to the next block for live-in.
819 BlockStart = BlockEnd;
822 // Handle the live-in blocks covered by [Start;End).
823 assert(Start <= BlockStart && "Expected live-in block");
824 while (BlockStart < End) {
825 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
826 BlockEnd = LIS.getMBBEndIdx(MBB);
827 if (BlockStart == ParentVNI->def) {
828 // This block has the def of a parent PHI, so it isn't live-in.
829 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
830 VNInfo *VNI = LI->extendInBlock(BlockStart,
831 std::min(BlockEnd, End).getPrevSlot());
832 assert(VNI && "Missing def for complex mapped parent PHI");
833 if (End >= BlockEnd) {
835 LiveOutSeen.set(MBB->getNumber());
836 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
839 // This block needs a live-in value.
840 LiveInBlocks.push_back(MDT[MBB]);
841 // The last block covered may not be live-out.
843 LiveInBlocks.back().Kill = End;
845 // Live-out, but we need updateSSA to tell us the value.
846 LiveOutSeen.set(MBB->getNumber());
847 LiveOutCache[MBB] = LiveOutPair((VNInfo*)0,
848 (MachineDomTreeNode*)0);
851 BlockStart = BlockEnd;
855 } while (Start != ParentI->end);
856 DEBUG(dbgs() << '\n');
859 if (!LiveInBlocks.empty())
865 void SplitEditor::extendPHIKillRanges() {
866 // Extend live ranges to be live-out for successor PHI values.
867 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
868 E = Edit->getParent().vni_end(); I != E; ++I) {
869 const VNInfo *PHIVNI = *I;
870 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
872 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
873 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
874 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
875 PE = MBB->pred_end(); PI != PE; ++PI) {
876 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
877 // The predecessor may not have a live-out value. That is OK, like an
878 // undef PHI operand.
879 if (Edit->getParent().liveAt(End)) {
880 assert(RegAssign.lookup(End) == RegIdx &&
881 "Different register assignment in phi predecessor");
882 extendRange(RegIdx, End);
888 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
889 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
890 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
891 RE = MRI.reg_end(); RI != RE;) {
892 MachineOperand &MO = RI.getOperand();
893 MachineInstr *MI = MO.getParent();
895 // LiveDebugVariables should have handled all DBG_VALUE instructions.
896 if (MI->isDebugValue()) {
897 DEBUG(dbgs() << "Zapping " << *MI);
902 // <undef> operands don't really read the register, so just assign them to
904 if (MO.isUse() && MO.isUndef()) {
905 MO.setReg(Edit->get(0)->reg);
909 SlotIndex Idx = LIS.getInstructionIndex(MI);
911 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
913 // Rewrite to the mapped register at Idx.
914 unsigned RegIdx = RegAssign.lookup(Idx);
915 MO.setReg(Edit->get(RegIdx)->reg);
916 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
917 << Idx << ':' << RegIdx << '\t' << *MI);
919 // Extend liveness to Idx if the instruction reads reg.
923 // Skip instructions that don't read Reg.
925 if (!MO.getSubReg() && !MO.isEarlyClobber())
927 // We may wan't to extend a live range for a partial redef, or for a use
928 // tied to an early clobber.
929 Idx = Idx.getPrevSlot();
930 if (!Edit->getParent().liveAt(Idx))
933 Idx = Idx.getUseIndex();
935 extendRange(RegIdx, Idx);
939 void SplitEditor::deleteRematVictims() {
940 SmallVector<MachineInstr*, 8> Dead;
941 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
942 LiveInterval *LI = *I;
943 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
945 // Dead defs end at the store slot.
946 if (LII->end != LII->valno->def.getNextSlot())
948 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
949 assert(MI && "Missing instruction for dead def");
950 MI->addRegisterDead(LI->reg, &TRI);
952 if (!MI->allDefsAreDead())
955 DEBUG(dbgs() << "All defs dead: " << *MI);
963 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
966 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
969 // At this point, the live intervals in Edit contain VNInfos corresponding to
970 // the inserted copies.
972 // Add the original defs from the parent interval.
973 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
974 E = Edit->getParent().vni_end(); I != E; ++I) {
975 const VNInfo *ParentVNI = *I;
976 if (ParentVNI->isUnused())
978 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
979 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
980 VNI->setIsPHIDef(ParentVNI->isPHIDef());
981 VNI->setCopy(ParentVNI->getCopy());
983 // Mark rematted values as complex everywhere to force liveness computation.
984 // The new live ranges may be truncated.
985 if (Edit->didRematerialize(ParentVNI))
986 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
987 markComplexMapped(i, ParentVNI);
991 // Every new interval must have a def by now, otherwise the split is bogus.
992 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
993 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
996 // Transfer the simply mapped values, check if any are skipped.
997 bool Skipped = transferValues();
999 extendPHIKillRanges();
1003 // Rewrite virtual registers, possibly extending ranges.
1004 rewriteAssigned(Skipped);
1006 // Delete defs that were rematted everywhere.
1008 deleteRematVictims();
1010 // Get rid of unused values and set phi-kill flags.
1011 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1012 (*I)->RenumberValues(LIS);
1014 // Provide a reverse mapping from original indices to Edit ranges.
1017 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1018 LRMap->push_back(i);
1021 // Now check if any registers were separated into multiple components.
1022 ConnectedVNInfoEqClasses ConEQ(LIS);
1023 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1024 // Don't use iterators, they are invalidated by create() below.
1025 LiveInterval *li = Edit->get(i);
1026 unsigned NumComp = ConEQ.Classify(li);
1029 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1030 SmallVector<LiveInterval*, 8> dups;
1032 for (unsigned j = 1; j != NumComp; ++j)
1033 dups.push_back(&Edit->create(LIS, VRM));
1034 ConEQ.Distribute(&dups[0], MRI);
1035 // The new intervals all map back to i.
1037 LRMap->resize(Edit->size(), i);
1040 // Calculate spill weight and allocation hints for new intervals.
1041 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1043 assert(!LRMap || LRMap->size() == Edit->size());
1047 //===----------------------------------------------------------------------===//
1048 // Single Block Splitting
1049 //===----------------------------------------------------------------------===//
1051 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1052 /// may be an advantage to split CurLI for the duration of the block.
1053 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1054 // If CurLI is local to one block, there is no point to splitting it.
1055 if (UseBlocks.size() <= 1)
1057 // Add blocks with multiple uses.
1058 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
1059 const BlockInfo &BI = UseBlocks[i];
1060 if (BI.FirstUse == BI.LastUse)
1062 Blocks.insert(BI.MBB);
1064 return !Blocks.empty();
1067 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1069 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1070 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
1072 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
1073 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
1075 // The last use is after the last valid split point.
1076 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1077 useIntv(SegStart, SegStop);
1078 overlapIntv(SegStop, BI.LastUse);
1082 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1083 /// basic block in Blocks.
1084 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1085 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1086 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
1087 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
1088 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
1089 if (Blocks.count(BI.MBB))
1090 splitSingleBlock(BI);