1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/CodeGen/CalcSpillWeights.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetMachine.h"
34 AllowSplit("spiller-splits-edges",
35 cl::desc("Allow critical edge splitting during spilling"));
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
41 SplitAnalysis::SplitAnalysis(const MachineFunction &mf,
42 const LiveIntervals &lis,
43 const MachineLoopInfo &mli)
47 TII(*mf.getTarget().getInstrInfo()),
50 void SplitAnalysis::clear() {
58 bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
59 MachineBasicBlock *T, *F;
60 SmallVector<MachineOperand, 4> Cond;
61 return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
64 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
65 void SplitAnalysis::analyzeUses() {
66 const MachineRegisterInfo &MRI = MF.getRegInfo();
67 for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg);
68 MachineInstr *MI = I.skipInstruction();) {
69 if (MI->isDebugValue() || !UsingInstrs.insert(MI))
71 UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
72 MachineBasicBlock *MBB = MI->getParent();
73 if (UsingBlocks[MBB]++)
75 for (MachineLoop *Loop = Loops.getLoopFor(MBB); Loop;
76 Loop = Loop->getParentLoop())
79 array_pod_sort(UseSlots.begin(), UseSlots.end());
80 DEBUG(dbgs() << " counted "
81 << UsingInstrs.size() << " instrs, "
82 << UsingBlocks.size() << " blocks, "
83 << UsingLoops.size() << " loops.\n");
86 void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
87 for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
88 unsigned count = UsingBlocks.lookup(*I);
89 OS << " BB#" << (*I)->getNumber();
91 OS << '(' << count << ')';
95 // Get three sets of basic blocks surrounding a loop: Blocks inside the loop,
96 // predecessor blocks, and exit blocks.
97 void SplitAnalysis::getLoopBlocks(const MachineLoop *Loop, LoopBlocks &Blocks) {
100 // Blocks in the loop.
101 Blocks.Loop.insert(Loop->block_begin(), Loop->block_end());
103 // Predecessor blocks.
104 const MachineBasicBlock *Header = Loop->getHeader();
105 for (MachineBasicBlock::const_pred_iterator I = Header->pred_begin(),
106 E = Header->pred_end(); I != E; ++I)
107 if (!Blocks.Loop.count(*I))
108 Blocks.Preds.insert(*I);
111 for (MachineLoop::block_iterator I = Loop->block_begin(),
112 E = Loop->block_end(); I != E; ++I) {
113 const MachineBasicBlock *MBB = *I;
114 for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
115 SE = MBB->succ_end(); SI != SE; ++SI)
116 if (!Blocks.Loop.count(*SI))
117 Blocks.Exits.insert(*SI);
121 void SplitAnalysis::print(const LoopBlocks &B, raw_ostream &OS) const {
130 /// analyzeLoopPeripheralUse - Return an enum describing how CurLI is used in
131 /// and around the Loop.
132 SplitAnalysis::LoopPeripheralUse SplitAnalysis::
133 analyzeLoopPeripheralUse(const SplitAnalysis::LoopBlocks &Blocks) {
134 LoopPeripheralUse use = ContainedInLoop;
135 for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
137 const MachineBasicBlock *MBB = I->first;
138 // Is this a peripheral block?
139 if (use < MultiPeripheral &&
140 (Blocks.Preds.count(MBB) || Blocks.Exits.count(MBB))) {
141 if (I->second > 1) use = MultiPeripheral;
142 else use = SinglePeripheral;
145 // Is it a loop block?
146 if (Blocks.Loop.count(MBB))
148 // It must be an unrelated block.
149 DEBUG(dbgs() << ", outside: BB#" << MBB->getNumber());
155 /// getCriticalExits - It may be necessary to partially break critical edges
156 /// leaving the loop if an exit block has predecessors from outside the loop
158 void SplitAnalysis::getCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
159 BlockPtrSet &CriticalExits) {
160 CriticalExits.clear();
162 // A critical exit block has CurLI live-in, and has a predecessor that is not
163 // in the loop nor a loop predecessor. For such an exit block, the edges
164 // carrying the new variable must be moved to a new pre-exit block.
165 for (BlockPtrSet::iterator I = Blocks.Exits.begin(), E = Blocks.Exits.end();
167 const MachineBasicBlock *Exit = *I;
168 // A single-predecessor exit block is definitely not a critical edge.
169 if (Exit->pred_size() == 1)
171 // This exit may not have CurLI live in at all. No need to split.
172 if (!LIS.isLiveInToMBB(*CurLI, Exit))
174 // Does this exit block have a predecessor that is not a loop block or loop
176 for (MachineBasicBlock::const_pred_iterator PI = Exit->pred_begin(),
177 PE = Exit->pred_end(); PI != PE; ++PI) {
178 const MachineBasicBlock *Pred = *PI;
179 if (Blocks.Loop.count(Pred) || Blocks.Preds.count(Pred))
181 // This is a critical exit block, and we need to split the exit edge.
182 CriticalExits.insert(Exit);
188 void SplitAnalysis::getCriticalPreds(const SplitAnalysis::LoopBlocks &Blocks,
189 BlockPtrSet &CriticalPreds) {
190 CriticalPreds.clear();
192 // A critical predecessor block has CurLI live-out, and has a successor that
193 // has CurLI live-in and is not in the loop nor a loop exit block. For such a
194 // predecessor block, we must carry the value in both the 'inside' and
195 // 'outside' registers.
196 for (BlockPtrSet::iterator I = Blocks.Preds.begin(), E = Blocks.Preds.end();
198 const MachineBasicBlock *Pred = *I;
199 // Definitely not a critical edge.
200 if (Pred->succ_size() == 1)
202 // This block may not have CurLI live out at all if there is a PHI.
203 if (!LIS.isLiveOutOfMBB(*CurLI, Pred))
205 // Does this block have a successor outside the loop?
206 for (MachineBasicBlock::const_pred_iterator SI = Pred->succ_begin(),
207 SE = Pred->succ_end(); SI != SE; ++SI) {
208 const MachineBasicBlock *Succ = *SI;
209 if (Blocks.Loop.count(Succ) || Blocks.Exits.count(Succ))
211 if (!LIS.isLiveInToMBB(*CurLI, Succ))
213 // This is a critical predecessor block.
214 CriticalPreds.insert(Pred);
220 /// canSplitCriticalExits - Return true if it is possible to insert new exit
221 /// blocks before the blocks in CriticalExits.
223 SplitAnalysis::canSplitCriticalExits(const SplitAnalysis::LoopBlocks &Blocks,
224 BlockPtrSet &CriticalExits) {
225 // If we don't allow critical edge splitting, require no critical exits.
227 return CriticalExits.empty();
229 for (BlockPtrSet::iterator I = CriticalExits.begin(), E = CriticalExits.end();
231 const MachineBasicBlock *Succ = *I;
232 // We want to insert a new pre-exit MBB before Succ, and change all the
233 // in-loop blocks to branch to the pre-exit instead of Succ.
234 // Check that all the in-loop predecessors can be changed.
235 for (MachineBasicBlock::const_pred_iterator PI = Succ->pred_begin(),
236 PE = Succ->pred_end(); PI != PE; ++PI) {
237 const MachineBasicBlock *Pred = *PI;
238 // The external predecessors won't be altered.
239 if (!Blocks.Loop.count(Pred) && !Blocks.Preds.count(Pred))
241 if (!canAnalyzeBranch(Pred))
245 // If Succ's layout predecessor falls through, that too must be analyzable.
246 // We need to insert the pre-exit block in the gap.
247 MachineFunction::const_iterator MFI = Succ;
248 if (MFI == MF.begin())
250 if (!canAnalyzeBranch(--MFI))
253 // No problems found.
257 void SplitAnalysis::analyze(const LiveInterval *li) {
263 void SplitAnalysis::getSplitLoops(LoopPtrSet &Loops) {
264 assert(CurLI && "Call analyze() before getSplitLoops");
265 if (UsingLoops.empty())
269 BlockPtrSet CriticalExits;
271 // We split around loops where CurLI is used outside the periphery.
272 for (LoopCountMap::const_iterator I = UsingLoops.begin(),
273 E = UsingLoops.end(); I != E; ++I) {
274 const MachineLoop *Loop = I->first;
275 getLoopBlocks(Loop, Blocks);
276 DEBUG({ dbgs() << " "; print(Blocks, dbgs()); });
278 switch(analyzeLoopPeripheralUse(Blocks)) {
281 case MultiPeripheral:
282 // FIXME: We could split a live range with multiple uses in a peripheral
283 // block and still make progress. However, it is possible that splitting
284 // another live range will insert copies into a peripheral block, and
285 // there is a small chance we can enter an infinite loop, inserting copies
287 // For safety, stick to splitting live ranges with uses outside the
289 DEBUG(dbgs() << ": multiple peripheral uses");
291 case ContainedInLoop:
292 DEBUG(dbgs() << ": fully contained\n");
294 case SinglePeripheral:
295 DEBUG(dbgs() << ": single peripheral use\n");
298 // Will it be possible to split around this loop?
299 getCriticalExits(Blocks, CriticalExits);
300 DEBUG(dbgs() << ": " << CriticalExits.size() << " critical exits\n");
301 if (!canSplitCriticalExits(Blocks, CriticalExits))
303 // This is a possible split.
307 DEBUG(dbgs() << " getSplitLoops found " << Loops.size()
308 << " candidate loops.\n");
311 const MachineLoop *SplitAnalysis::getBestSplitLoop() {
313 getSplitLoops(Loops);
317 // Pick the earliest loop.
318 // FIXME: Are there other heuristics to consider?
319 const MachineLoop *Best = 0;
321 for (LoopPtrSet::const_iterator I = Loops.begin(), E = Loops.end(); I != E;
323 SlotIndex Idx = LIS.getMBBStartIdx((*I)->getHeader());
324 if (!Best || Idx < BestIdx)
325 Best = *I, BestIdx = Idx;
327 DEBUG(dbgs() << " getBestSplitLoop found " << *Best);
331 /// isBypassLoop - Return true if CurLI is live through Loop and has no uses
332 /// inside the loop. Bypass loops are candidates for splitting because it can
333 /// prevent interference inside the loop.
334 bool SplitAnalysis::isBypassLoop(const MachineLoop *Loop) {
335 // If CurLI is live into the loop header and there are no uses in the loop, it
336 // must be live in the entire loop and live on at least one exiting edge.
337 return !UsingLoops.count(Loop) &&
338 LIS.isLiveInToMBB(*CurLI, Loop->getHeader());
341 /// getBypassLoops - Get all the maximal bypass loops. These are the bypass
342 /// loops whose parent is not a bypass loop.
343 void SplitAnalysis::getBypassLoops(LoopPtrSet &BypassLoops) {
344 SmallVector<MachineLoop*, 8> Todo(Loops.begin(), Loops.end());
345 while (!Todo.empty()) {
346 MachineLoop *Loop = Todo.pop_back_val();
347 if (!UsingLoops.count(Loop)) {
348 // This is either a bypass loop or completely irrelevant.
349 if (LIS.isLiveInToMBB(*CurLI, Loop->getHeader()))
350 BypassLoops.insert(Loop);
351 // Either way, skip the child loops.
355 // The child loops may be bypass loops.
356 Todo.append(Loop->begin(), Loop->end());
361 //===----------------------------------------------------------------------===//
363 //===----------------------------------------------------------------------===//
365 // Work around the fact that the std::pair constructors are broken for pointer
366 // pairs in some implementations. makeVV(x, 0) works.
367 static inline std::pair<const VNInfo*, VNInfo*>
368 makeVV(const VNInfo *a, VNInfo *b) {
369 return std::make_pair(a, b);
372 void LiveIntervalMap::reset(LiveInterval *li) {
375 LiveOutCache.clear();
378 bool LiveIntervalMap::isComplexMapped(const VNInfo *ParentVNI) const {
379 ValueMap::const_iterator i = Values.find(ParentVNI);
380 return i != Values.end() && i->second == 0;
383 // defValue - Introduce a LI def for ParentVNI that could be later than
385 VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) {
386 assert(LI && "call reset first");
387 assert(ParentVNI && "Mapping NULL value");
388 assert(Idx.isValid() && "Invalid SlotIndex");
389 assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
391 // Create a new value.
392 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
394 // Preserve the PHIDef bit.
395 if (ParentVNI->isPHIDef() && Idx == ParentVNI->def)
396 VNI->setIsPHIDef(true);
398 // Use insert for lookup, so we can add missing values with a second lookup.
399 std::pair<ValueMap::iterator,bool> InsP =
400 Values.insert(makeVV(ParentVNI, Idx == ParentVNI->def ? VNI : 0));
402 // This is now a complex def. Mark with a NULL in valueMap.
404 InsP.first->second = 0;
410 // mapValue - Find the mapped value for ParentVNI at Idx.
411 // Potentially create phi-def values.
412 VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx,
414 assert(LI && "call reset first");
415 assert(ParentVNI && "Mapping NULL value");
416 assert(Idx.isValid() && "Invalid SlotIndex");
417 assert(ParentLI.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI");
419 // Use insert for lookup, so we can add missing values with a second lookup.
420 std::pair<ValueMap::iterator,bool> InsP =
421 Values.insert(makeVV(ParentVNI, 0));
423 // This was an unknown value. Create a simple mapping.
425 if (simple) *simple = true;
426 return InsP.first->second = LI->createValueCopy(ParentVNI,
427 LIS.getVNInfoAllocator());
430 // This was a simple mapped value.
431 if (InsP.first->second) {
432 if (simple) *simple = true;
433 return InsP.first->second;
436 // This is a complex mapped value. There may be multiple defs, and we may need
437 // to create phi-defs.
438 if (simple) *simple = false;
439 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
440 assert(IdxMBB && "No MBB at Idx");
442 // Is there a def in the same MBB we can extend?
443 if (VNInfo *VNI = extendTo(IdxMBB, Idx))
446 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
447 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
448 // Perform a search for all predecessor blocks where we know the dominating
449 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
450 DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
451 << " at " << Idx << " in " << *LI << '\n');
453 // Blocks where LI should be live-in.
454 SmallVector<MachineDomTreeNode*, 16> LiveIn;
455 LiveIn.push_back(MDT[IdxMBB]);
457 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
458 for (unsigned i = 0; i != LiveIn.size(); ++i) {
459 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
460 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
461 PE = MBB->pred_end(); PI != PE; ++PI) {
462 MachineBasicBlock *Pred = *PI;
463 // Is this a known live-out block?
464 std::pair<LiveOutMap::iterator,bool> LOIP =
465 LiveOutCache.insert(std::make_pair(Pred, LiveOutPair()));
466 // Yes, we have been here before.
468 DEBUG(if (VNInfo *VNI = LOIP.first->second.first)
469 dbgs() << " known valno #" << VNI->id
470 << " at BB#" << Pred->getNumber() << '\n');
474 // Does Pred provide a live-out value?
475 SlotIndex Last = LIS.getMBBEndIdx(Pred).getPrevSlot();
476 if (VNInfo *VNI = extendTo(Pred, Last)) {
477 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def);
478 DEBUG(dbgs() << " found valno #" << VNI->id
479 << " from BB#" << DefMBB->getNumber()
480 << " at BB#" << Pred->getNumber() << '\n');
481 LiveOutPair &LOP = LOIP.first->second;
483 LOP.second = MDT[DefMBB];
486 // No, we need a live-in value for Pred as well
488 LiveIn.push_back(MDT[Pred]);
492 // We may need to add phi-def values to preserve the SSA form.
493 // This is essentially the same iterative algorithm that SSAUpdater uses,
494 // except we already have a dominator tree, so we don't have to recompute it.
499 DEBUG(dbgs() << " Iterating over " << LiveIn.size() << " blocks.\n");
500 // Propagate live-out values down the dominator tree, inserting phi-defs when
501 // necessary. Since LiveIn was created by a BFS, going backwards makes it more
502 // likely for us to visit immediate dominators before their children.
503 for (unsigned i = LiveIn.size(); i; --i) {
504 MachineDomTreeNode *Node = LiveIn[i-1];
505 MachineBasicBlock *MBB = Node->getBlock();
506 MachineDomTreeNode *IDom = Node->getIDom();
507 LiveOutPair IDomValue;
508 // We need a live-in value to a block with no immediate dominator?
509 // This is probably an unreachable block that has survived somehow.
510 bool needPHI = !IDom;
512 // Get the IDom live-out value.
514 LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock());
515 if (I != LiveOutCache.end())
516 IDomValue = I->second;
518 // If IDom is outside our set of live-out blocks, there must be new
519 // defs, and we need a phi-def here.
523 // IDom dominates all of our predecessors, but it may not be the immediate
524 // dominator. Check if any of them have live-out values that are properly
525 // dominated by IDom. If so, we need a phi-def here.
527 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
528 PE = MBB->pred_end(); PI != PE; ++PI) {
529 LiveOutPair Value = LiveOutCache[*PI];
530 if (!Value.first || Value.first == IDomValue.first)
532 // This predecessor is carrying something other than IDomValue.
533 // It could be because IDomValue hasn't propagated yet, or it could be
534 // because MBB is in the dominance frontier of that value.
535 if (MDT.dominates(IDom, Value.second)) {
542 // Create a phi-def if required.
545 SlotIndex Start = LIS.getMBBStartIdx(MBB);
546 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
547 VNI->setIsPHIDef(true);
548 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
549 << " phi-def #" << VNI->id << " at " << Start << '\n');
550 // We no longer need LI to be live-in.
551 LiveIn.erase(LiveIn.begin()+(i-1));
552 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
555 // Check if we need to update live-out info.
556 LiveOutMap::iterator I = LiveOutCache.find(MBB);
557 if (I == LiveOutCache.end() || I->second.second == Node) {
558 // We already have a live-out defined in MBB, so this must be IdxMBB.
559 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
560 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
562 // This phi-def is also live-out, so color the whole block.
563 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
564 I->second = LiveOutPair(VNI, Node);
566 } else if (IDomValue.first) {
567 // No phi-def here. Remember incoming value for IdxMBB.
569 IdxVNI = IDomValue.first;
570 // Propagate IDomValue if needed:
571 // MBB is live-out and doesn't define its own value.
572 LiveOutMap::iterator I = LiveOutCache.find(MBB);
573 if (I != LiveOutCache.end() && I->second.second != Node &&
574 I->second.first != IDomValue.first) {
576 I->second = IDomValue;
577 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
578 << " idom valno #" << IDomValue.first->id
579 << " from BB#" << IDom->getBlock()->getNumber() << '\n');
583 DEBUG(dbgs() << " - made " << Changes << " changes.\n");
586 assert(IdxVNI && "Didn't find value for Idx");
589 // Check the LiveOutCache invariants.
590 for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
592 assert(I->first && "Null MBB entry in cache");
593 assert(I->second.first && "Null VNInfo in cache");
594 assert(I->second.second && "Null DomTreeNode in cache");
595 if (I->second.second->getBlock() == I->first)
597 for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
598 PE = I->first->pred_end(); PI != PE; ++PI)
599 assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant");
603 // Since we went through the trouble of a full BFS visiting all reaching defs,
604 // the values in LiveIn are now accurate. No more phi-defs are needed
605 // for these blocks, so we can color the live ranges.
606 // This makes the next mapValue call much faster.
607 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
608 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
609 SlotIndex Start = LIS.getMBBStartIdx(MBB);
610 VNInfo *VNI = LiveOutCache.lookup(MBB).first;
612 // Anything in LiveIn other than IdxMBB is live-through.
613 // In IdxMBB, we should stop at Idx unless the same value is live-out.
614 if (MBB == IdxMBB && IdxVNI != VNI)
615 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
617 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
624 void LiveIntervalMap::dumpCache() {
625 for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
627 assert(I->first && "Null MBB entry in cache");
628 assert(I->second.first && "Null VNInfo in cache");
629 assert(I->second.second && "Null DomTreeNode in cache");
630 dbgs() << " cache: BB#" << I->first->getNumber()
631 << " has valno #" << I->second.first->id << " from BB#"
632 << I->second.second->getBlock()->getNumber() << ", preds";
633 for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
634 PE = I->first->pred_end(); PI != PE; ++PI)
635 dbgs() << " BB#" << (*PI)->getNumber();
638 dbgs() << " cache: " << LiveOutCache.size() << " entries.\n";
642 // extendTo - Find the last LI value defined in MBB at or before Idx. The
643 // ParentLI is assumed to be live at Idx. Extend the live range to Idx.
644 // Return the found VNInfo, or NULL.
645 VNInfo *LiveIntervalMap::extendTo(const MachineBasicBlock *MBB, SlotIndex Idx) {
646 assert(LI && "call reset first");
647 LiveInterval::iterator I = std::upper_bound(LI->begin(), LI->end(), Idx);
648 if (I == LI->begin())
651 if (I->end <= LIS.getMBBStartIdx(MBB))
654 I->end = Idx.getNextSlot();
658 // addSimpleRange - Add a simple range from ParentLI to LI.
659 // ParentVNI must be live in the [Start;End) interval.
660 void LiveIntervalMap::addSimpleRange(SlotIndex Start, SlotIndex End,
661 const VNInfo *ParentVNI) {
662 assert(LI && "call reset first");
664 VNInfo *VNI = mapValue(ParentVNI, Start, &simple);
665 // A simple mapping is easy.
667 LI->addRange(LiveRange(Start, End, VNI));
671 // ParentVNI is a complex value. We must map per MBB.
672 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
673 MachineFunction::iterator MBBE = LIS.getMBBFromIndex(End.getPrevSlot());
676 LI->addRange(LiveRange(Start, End, VNI));
681 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
683 // Run sequence of full blocks.
684 for (++MBB; MBB != MBBE; ++MBB) {
685 Start = LIS.getMBBStartIdx(MBB);
686 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB),
687 mapValue(ParentVNI, Start)));
691 Start = LIS.getMBBStartIdx(MBB);
693 LI->addRange(LiveRange(Start, End, mapValue(ParentVNI, Start)));
696 /// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
697 /// All needed values whose def is not inside [Start;End) must be defined
698 /// beforehand so mapValue will work.
699 void LiveIntervalMap::addRange(SlotIndex Start, SlotIndex End) {
700 assert(LI && "call reset first");
701 LiveInterval::const_iterator B = ParentLI.begin(), E = ParentLI.end();
702 LiveInterval::const_iterator I = std::lower_bound(B, E, Start);
704 // Check if --I begins before Start and overlaps.
708 addSimpleRange(Start, std::min(End, I->end), I->valno);
712 // The remaining ranges begin after Start.
713 for (;I != E && I->start < End; ++I)
714 addSimpleRange(I->start, std::min(End, I->end), I->valno);
718 //===----------------------------------------------------------------------===//
720 //===----------------------------------------------------------------------===//
722 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
723 SplitEditor::SplitEditor(SplitAnalysis &sa,
726 MachineDominatorTree &mdt,
728 : sa_(sa), LIS(lis), VRM(vrm),
729 MRI(vrm.getMachineFunction().getRegInfo()),
731 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
732 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
737 // We don't need an AliasAnalysis since we will only be performing
738 // cheap-as-a-copy remats anyway.
739 Edit.anyRematerializable(LIS, TII, 0);
742 void SplitEditor::dump() const {
743 if (RegAssign.empty()) {
744 dbgs() << " empty\n";
748 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
749 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
753 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
756 MachineBasicBlock &MBB,
757 MachineBasicBlock::iterator I) {
758 MachineInstr *CopyMI = 0;
760 LiveInterval *LI = Edit.get(RegIdx);
762 // Attempt cheap-as-a-copy rematerialization.
763 LiveRangeEdit::Remat RM(ParentVNI);
764 if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
765 Def = Edit.rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
767 // Can't remat, just insert a copy from parent.
768 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
769 .addReg(Edit.getReg());
770 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
773 // Define the value in Reg.
774 VNInfo *VNI = LIMappers[RegIdx].defValue(ParentVNI, Def);
775 VNI->setCopy(CopyMI);
777 // Add minimal liveness for the new value.
778 Edit.get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
782 /// Create a new virtual register and live interval.
783 void SplitEditor::openIntv() {
784 assert(!OpenIdx && "Previous LI not closed before openIntv");
786 // Create the complement as index 0.
788 Edit.create(MRI, LIS, VRM);
789 LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
790 LIMappers.back().reset(Edit.get(0));
793 // Create the open interval.
794 OpenIdx = Edit.size();
795 Edit.create(MRI, LIS, VRM);
796 LIMappers.push_back(LiveIntervalMap(LIS, MDT, Edit.getParent()));
797 LIMappers[OpenIdx].reset(Edit.get(OpenIdx));
800 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
801 assert(OpenIdx && "openIntv not called before enterIntvBefore");
802 DEBUG(dbgs() << " enterIntvBefore " << Idx);
803 Idx = Idx.getBaseIndex();
804 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
806 DEBUG(dbgs() << ": not live\n");
809 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
810 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
811 assert(MI && "enterIntvBefore called with invalid index");
813 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
817 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
818 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
819 SlotIndex End = LIS.getMBBEndIdx(&MBB);
820 SlotIndex Last = End.getPrevSlot();
821 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
822 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Last);
824 DEBUG(dbgs() << ": not live\n");
827 DEBUG(dbgs() << ": valno " << ParentVNI->id);
828 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
829 LIS.getLastSplitPoint(Edit.getParent(), &MBB));
830 RegAssign.insert(VNI->def, End, OpenIdx);
835 /// useIntv - indicate that all instructions in MBB should use OpenLI.
836 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
837 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
840 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
841 assert(OpenIdx && "openIntv not called before useIntv");
842 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
843 RegAssign.insert(Start, End, OpenIdx);
847 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
848 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
849 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
851 // The interval must be live beyond the instruction at Idx.
852 Idx = Idx.getBoundaryIndex();
853 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
855 DEBUG(dbgs() << ": not live\n");
856 return Idx.getNextSlot();
858 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
860 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
861 assert(MI && "No instruction at index");
862 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
863 llvm::next(MachineBasicBlock::iterator(MI)));
867 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
868 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
869 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
870 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
872 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
874 DEBUG(dbgs() << ": not live\n");
878 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
879 MBB.SkipPHIsAndLabels(MBB.begin()));
880 RegAssign.insert(Start, VNI->def, OpenIdx);
885 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
886 assert(OpenIdx && "openIntv not called before overlapIntv");
887 assert(Edit.getParent().getVNInfoAt(Start) ==
888 Edit.getParent().getVNInfoAt(End.getPrevSlot()) &&
889 "Parent changes value in extended range");
890 assert(Edit.get(0)->getVNInfoAt(Start) && "Start must come from leaveIntv*");
891 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
892 "Range cannot span basic blocks");
894 // Treat this as useIntv() for now. The complement interval will be extended
895 // as needed by mapValue().
896 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
897 RegAssign.insert(Start, End, OpenIdx);
901 /// closeIntv - Indicate that we are done editing the currently open
902 /// LiveInterval, and ranges can be trimmed.
903 void SplitEditor::closeIntv() {
904 assert(OpenIdx && "openIntv not called before closeIntv");
908 /// rewriteAssigned - Rewrite all uses of Edit.getReg().
909 void SplitEditor::rewriteAssigned() {
910 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit.getReg()),
911 RE = MRI.reg_end(); RI != RE;) {
912 MachineOperand &MO = RI.getOperand();
913 MachineInstr *MI = MO.getParent();
915 // LiveDebugVariables should have handled all DBG_VALUE instructions.
916 if (MI->isDebugValue()) {
917 DEBUG(dbgs() << "Zapping " << *MI);
921 SlotIndex Idx = LIS.getInstructionIndex(MI);
922 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
924 // Rewrite to the mapped register at Idx.
925 unsigned RegIdx = RegAssign.lookup(Idx);
926 MO.setReg(Edit.get(RegIdx)->reg);
927 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
928 << Idx << ':' << RegIdx << '\t' << *MI);
930 // Extend liveness to Idx.
931 const VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
932 LIMappers[RegIdx].mapValue(ParentVNI, Idx);
936 /// rewriteSplit - Rewrite uses of Intvs[0] according to the ConEQ mapping.
937 void SplitEditor::rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
938 const ConnectedVNInfoEqClasses &ConEq) {
939 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Intvs[0]->reg),
940 RE = MRI.reg_end(); RI != RE;) {
941 MachineOperand &MO = RI.getOperand();
942 MachineInstr *MI = MO.getParent();
944 if (MO.isUse() && MO.isUndef())
946 // DBG_VALUE instructions should have been eliminated earlier.
947 SlotIndex Idx = LIS.getInstructionIndex(MI);
948 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
949 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
951 const VNInfo *VNI = Intvs[0]->getVNInfoAt(Idx);
952 assert(VNI && "Interval not live at use.");
953 MO.setReg(Intvs[ConEq.getEqClass(VNI)]->reg);
954 DEBUG(dbgs() << VNI->id << '\t' << *MI);
958 void SplitEditor::finish() {
959 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
961 // At this point, the live intervals in Edit contain VNInfos corresponding to
962 // the inserted copies.
964 // Add the original defs from the parent interval.
965 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
966 E = Edit.getParent().vni_end(); I != E; ++I) {
967 const VNInfo *ParentVNI = *I;
968 if (ParentVNI->isUnused())
970 LiveIntervalMap &LIM = LIMappers[RegAssign.lookup(ParentVNI->def)];
971 VNInfo *VNI = LIM.defValue(ParentVNI, ParentVNI->def);
972 LIM.getLI()->addRange(LiveRange(ParentVNI->def,
973 ParentVNI->def.getNextSlot(), VNI));
974 // Mark all values as complex to force liveness computation.
975 // This should really only be necessary for remat victims, but we are lazy.
976 LIM.markComplexMapped(ParentVNI);
980 // Every new interval must have a def by now, otherwise the split is bogus.
981 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
982 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
985 // FIXME: Don't recompute the liveness of all values, infer it from the
986 // overlaps between the parent live interval and RegAssign.
987 // The mapValue algorithm is only necessary when:
988 // - The parent value maps to multiple defs, and new phis are needed, or
989 // - The value has been rematerialized before some uses, and we want to
990 // minimize the live range so it only reaches the remaining uses.
991 // All other values have simple liveness that can be computed from RegAssign
992 // and the parent live interval.
994 // Extend live ranges to be live-out for successor PHI values.
995 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
996 E = Edit.getParent().vni_end(); I != E; ++I) {
997 const VNInfo *PHIVNI = *I;
998 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
1000 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
1001 LiveIntervalMap &LIM = LIMappers[RegIdx];
1002 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
1003 DEBUG(dbgs() << " map phi in BB#" << MBB->getNumber() << '@' << PHIVNI->def
1004 << " -> " << RegIdx << '\n');
1005 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
1006 PE = MBB->pred_end(); PI != PE; ++PI) {
1007 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
1008 DEBUG(dbgs() << " pred BB#" << (*PI)->getNumber() << '@' << End);
1009 // The predecessor may not have a live-out value. That is OK, like an
1010 // undef PHI operand.
1011 if (VNInfo *VNI = Edit.getParent().getVNInfoAt(End)) {
1012 DEBUG(dbgs() << " has parent valno #" << VNI->id << " live out\n");
1013 assert(RegAssign.lookup(End) == RegIdx &&
1014 "Different register assignment in phi predecessor");
1015 LIM.mapValue(VNI, End);
1018 DEBUG(dbgs() << " is not live-out\n");
1020 DEBUG(dbgs() << " " << *LIM.getLI() << '\n');
1023 // Rewrite instructions.
1026 // FIXME: Delete defs that were rematted everywhere.
1028 // Get rid of unused values and set phi-kill flags.
1029 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
1030 (*I)->RenumberValues(LIS);
1032 // Now check if any registers were separated into multiple components.
1033 ConnectedVNInfoEqClasses ConEQ(LIS);
1034 for (unsigned i = 0, e = Edit.size(); i != e; ++i) {
1035 // Don't use iterators, they are invalidated by create() below.
1036 LiveInterval *li = Edit.get(i);
1037 unsigned NumComp = ConEQ.Classify(li);
1040 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1041 SmallVector<LiveInterval*, 8> dups;
1043 for (unsigned i = 1; i != NumComp; ++i)
1044 dups.push_back(&Edit.create(MRI, LIS, VRM));
1045 rewriteComponents(dups, ConEQ);
1046 ConEQ.Distribute(&dups[0]);
1049 // Calculate spill weight and allocation hints for new intervals.
1050 VirtRegAuxInfo vrai(VRM.getMachineFunction(), LIS, sa_.Loops);
1051 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I){
1052 LiveInterval &li = **I;
1053 vrai.CalculateRegClass(li.reg);
1054 vrai.CalculateWeightAndHint(li);
1055 DEBUG(dbgs() << " new interval " << MRI.getRegClass(li.reg)->getName()
1056 << ":" << li << '\n');
1061 //===----------------------------------------------------------------------===//
1063 //===----------------------------------------------------------------------===//
1065 void SplitEditor::splitAroundLoop(const MachineLoop *Loop) {
1066 SplitAnalysis::LoopBlocks Blocks;
1067 sa_.getLoopBlocks(Loop, Blocks);
1070 dbgs() << " splitAround"; sa_.print(Blocks, dbgs()); dbgs() << '\n';
1073 // Break critical edges as needed.
1074 SplitAnalysis::BlockPtrSet CriticalExits;
1075 sa_.getCriticalExits(Blocks, CriticalExits);
1076 assert(CriticalExits.empty() && "Cannot break critical exits yet");
1078 // Create new live interval for the loop.
1081 // Insert copies in the predecessors if live-in to the header.
1082 if (LIS.isLiveInToMBB(Edit.getParent(), Loop->getHeader())) {
1083 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Preds.begin(),
1084 E = Blocks.Preds.end(); I != E; ++I) {
1085 MachineBasicBlock &MBB = const_cast<MachineBasicBlock&>(**I);
1086 enterIntvAtEnd(MBB);
1090 // Switch all loop blocks.
1091 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Loop.begin(),
1092 E = Blocks.Loop.end(); I != E; ++I)
1095 // Insert back copies in the exit blocks.
1096 for (SplitAnalysis::BlockPtrSet::iterator I = Blocks.Exits.begin(),
1097 E = Blocks.Exits.end(); I != E; ++I) {
1098 MachineBasicBlock &MBB = const_cast<MachineBasicBlock&>(**I);
1099 leaveIntvAtTop(MBB);
1108 //===----------------------------------------------------------------------===//
1109 // Single Block Splitting
1110 //===----------------------------------------------------------------------===//
1112 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1113 /// may be an advantage to split CurLI for the duration of the block.
1114 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1115 // If CurLI is local to one block, there is no point to splitting it.
1116 if (UsingBlocks.size() <= 1)
1118 // Add blocks with multiple uses.
1119 for (BlockCountMap::iterator I = UsingBlocks.begin(), E = UsingBlocks.end();
1121 switch (I->second) {
1126 // When there are only two uses and CurLI is both live in and live out,
1127 // we don't really win anything by isolating the block since we would be
1128 // inserting two copies.
1129 // The remaing register would still have two uses in the block. (Unless it
1130 // separates into disconnected components).
1131 if (LIS.isLiveInToMBB(*CurLI, I->first) &&
1132 LIS.isLiveOutOfMBB(*CurLI, I->first))
1136 Blocks.insert(I->first);
1138 return !Blocks.empty();
1141 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1142 /// basic block in Blocks.
1143 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1144 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1145 // Determine the first and last instruction using CurLI in each block.
1146 typedef std::pair<SlotIndex,SlotIndex> IndexPair;
1147 typedef DenseMap<const MachineBasicBlock*,IndexPair> IndexPairMap;
1148 IndexPairMap MBBRange;
1149 for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
1150 E = sa_.UsingInstrs.end(); I != E; ++I) {
1151 const MachineBasicBlock *MBB = (*I)->getParent();
1152 if (!Blocks.count(MBB))
1154 SlotIndex Idx = LIS.getInstructionIndex(*I);
1155 DEBUG(dbgs() << " BB#" << MBB->getNumber() << '\t' << Idx << '\t' << **I);
1156 IndexPair &IP = MBBRange[MBB];
1157 if (!IP.first.isValid() || Idx < IP.first)
1159 if (!IP.second.isValid() || Idx > IP.second)
1163 // Create a new interval for each block.
1164 for (SplitAnalysis::BlockPtrSet::const_iterator I = Blocks.begin(),
1165 E = Blocks.end(); I != E; ++I) {
1166 IndexPair &IP = MBBRange[*I];
1167 DEBUG(dbgs() << " splitting for BB#" << (*I)->getNumber() << ": ["
1168 << IP.first << ';' << IP.second << ")\n");
1169 assert(IP.first.isValid() && IP.second.isValid());
1172 useIntv(enterIntvBefore(IP.first), leaveIntvAfter(IP.second));
1179 //===----------------------------------------------------------------------===//
1180 // Sub Block Splitting
1181 //===----------------------------------------------------------------------===//
1183 /// getBlockForInsideSplit - If CurLI is contained inside a single basic block,
1184 /// and it wou pay to subdivide the interval inside that block, return it.
1185 /// Otherwise return NULL. The returned block can be passed to
1186 /// SplitEditor::splitInsideBlock.
1187 const MachineBasicBlock *SplitAnalysis::getBlockForInsideSplit() {
1188 // The interval must be exclusive to one block.
1189 if (UsingBlocks.size() != 1)
1191 // Don't to this for less than 4 instructions. We want to be sure that
1192 // splitting actually reduces the instruction count per interval.
1193 if (UsingInstrs.size() < 4)
1195 return UsingBlocks.begin()->first;
1198 /// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
1199 void SplitEditor::splitInsideBlock(const MachineBasicBlock *MBB) {
1200 SmallVector<SlotIndex, 32> Uses;
1201 Uses.reserve(sa_.UsingInstrs.size());
1202 for (SplitAnalysis::InstrPtrSet::const_iterator I = sa_.UsingInstrs.begin(),
1203 E = sa_.UsingInstrs.end(); I != E; ++I)
1204 if ((*I)->getParent() == MBB)
1205 Uses.push_back(LIS.getInstructionIndex(*I));
1206 DEBUG(dbgs() << " splitInsideBlock BB#" << MBB->getNumber() << " for "
1207 << Uses.size() << " instructions.\n");
1208 assert(Uses.size() >= 3 && "Need at least 3 instructions");
1209 array_pod_sort(Uses.begin(), Uses.end());
1211 // Simple algorithm: Find the largest gap between uses as determined by slot
1212 // indices. Create new intervals for instructions before the gap and after the
1214 unsigned bestPos = 0;
1216 DEBUG(dbgs() << " dist (" << Uses[0]);
1217 for (unsigned i = 1, e = Uses.size(); i != e; ++i) {
1218 int g = Uses[i-1].distance(Uses[i]);
1219 DEBUG(dbgs() << ") -" << g << "- (" << Uses[i]);
1221 bestPos = i, bestGap = g;
1223 DEBUG(dbgs() << "), best: -" << bestGap << "-\n");
1225 // bestPos points to the first use after the best gap.
1226 assert(bestPos > 0 && "Invalid gap");
1228 // FIXME: Don't create intervals for low densities.
1230 // First interval before the gap. Don't create single-instr intervals.
1233 useIntv(enterIntvBefore(Uses.front()), leaveIntvAfter(Uses[bestPos-1]));
1237 // Second interval after the gap.
1238 if (bestPos < Uses.size()-1) {
1240 useIntv(enterIntvBefore(Uses[bestPos]), leaveIntvAfter(Uses.back()));