1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
34 //===----------------------------------------------------------------------===//
36 //===----------------------------------------------------------------------===//
38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
39 const LiveIntervals &lis,
40 const MachineLoopInfo &mli)
41 : MF(vrm.getMachineFunction()),
45 TII(*MF.getTarget().getInstrInfo()),
47 LastSplitPoint(MF.getNumBlockIDs()) {}
49 void SplitAnalysis::clear() {
52 ThroughBlocks.clear();
54 DidRepairRange = false;
57 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
58 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
59 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
60 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
62 // Compute split points on the first call. The pair is independent of the
63 // current live interval.
64 if (!LSP.first.isValid()) {
65 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
66 if (FirstTerm == MBB->end())
67 LSP.first = LIS.getMBBEndIdx(MBB);
69 LSP.first = LIS.getInstructionIndex(FirstTerm);
71 // If there is a landing pad successor, also find the call instruction.
74 // There may not be a call instruction (?) in which case we ignore LPad.
75 LSP.second = LSP.first;
76 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
78 if (I->getDesc().isCall()) {
79 LSP.second = LIS.getInstructionIndex(I);
84 // If CurLI is live into a landing pad successor, move the last split point
85 // back to the call that may throw.
86 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
92 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
93 void SplitAnalysis::analyzeUses() {
94 assert(UseSlots.empty() && "Call clear first");
96 // First get all the defs from the interval values. This provides the correct
97 // slots for early clobbers.
98 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
99 E = CurLI->vni_end(); I != E; ++I)
100 if (!(*I)->isPHIDef() && !(*I)->isUnused())
101 UseSlots.push_back((*I)->def);
103 // Get use slots form the use-def chain.
104 const MachineRegisterInfo &MRI = MF.getRegInfo();
105 for (MachineRegisterInfo::use_nodbg_iterator
106 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
108 if (!I.getOperand().isUndef())
109 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
111 array_pod_sort(UseSlots.begin(), UseSlots.end());
113 // Remove duplicates, keeping the smaller slot for each instruction.
114 // That is what we want for early clobbers.
115 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
116 SlotIndex::isSameInstr),
119 // Compute per-live block info.
120 if (!calcLiveBlockInfo()) {
121 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
122 // I am looking at you, SimpleRegisterCoalescing!
123 DidRepairRange = true;
124 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
125 const_cast<LiveIntervals&>(LIS)
126 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
128 ThroughBlocks.clear();
129 bool fixed = calcLiveBlockInfo();
131 assert(fixed && "Couldn't fix broken live interval");
134 DEBUG(dbgs() << "Analyze counted "
135 << UseSlots.size() << " instrs in "
136 << UseBlocks.size() << " blocks, through "
137 << NumThroughBlocks << " blocks.\n");
140 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
141 /// where CurLI is live.
142 bool SplitAnalysis::calcLiveBlockInfo() {
143 ThroughBlocks.resize(MF.getNumBlockIDs());
144 NumThroughBlocks = 0;
148 LiveInterval::const_iterator LVI = CurLI->begin();
149 LiveInterval::const_iterator LVE = CurLI->end();
151 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
152 UseI = UseSlots.begin();
153 UseE = UseSlots.end();
155 // Loop over basic blocks where CurLI is live.
156 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
160 SlotIndex Start, Stop;
161 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
163 // LVI is the first live segment overlapping MBB.
164 BI.LiveIn = LVI->start <= Start;
168 // Find the first and last uses in the block.
169 bool Uses = UseI != UseE && *UseI < Stop;
172 assert(BI.FirstUse >= Start);
174 while (UseI != UseE && *UseI < Stop);
175 BI.LastUse = UseI[-1];
176 assert(BI.LastUse < Stop);
179 // Look for gaps in the live range.
182 while (LVI->end < Stop) {
183 SlotIndex LastStop = LVI->end;
184 if (++LVI == LVE || LVI->start >= Stop) {
189 if (LastStop < LVI->start) {
196 // Don't set LiveThrough when the block has a gap.
197 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
199 UseBlocks.push_back(BI);
202 ThroughBlocks.set(BI.MBB->getNumber());
204 // FIXME: This should never happen. The live range stops or starts without a
205 // corresponding use. An earlier pass did something wrong.
206 if (!BI.LiveThrough && !Uses)
209 // LVI is now at LVE or LVI->end >= Stop.
213 // Live segment ends exactly at Stop. Move to the next segment.
214 if (LVI->end == Stop && ++LVI == LVE)
217 // Pick the next basic block.
218 if (LVI->start < Stop)
221 MFI = LIS.getMBBFromIndex(LVI->start);
226 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
229 LiveInterval *li = const_cast<LiveInterval*>(cli);
230 LiveInterval::iterator LVI = li->begin();
231 LiveInterval::iterator LVE = li->end();
234 // Loop over basic blocks where li is live.
235 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
236 SlotIndex Stop = LIS.getMBBEndIdx(MFI);
239 LVI = li->advanceTo(LVI, Stop);
244 Stop = LIS.getMBBEndIdx(MFI);
245 } while (Stop <= LVI->start);
249 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
250 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
251 const LiveInterval &Orig = LIS.getInterval(OrigReg);
252 assert(!Orig.empty() && "Splitting empty interval?");
253 LiveInterval::const_iterator I = Orig.find(Idx);
255 // Range containing Idx should begin at Idx.
256 if (I != Orig.end() && I->start <= Idx)
257 return I->start == Idx;
259 // Range does not contain Idx, previous must end at Idx.
260 return I != Orig.begin() && (--I)->end == Idx;
263 void SplitAnalysis::analyze(const LiveInterval *li) {
270 //===----------------------------------------------------------------------===//
272 //===----------------------------------------------------------------------===//
274 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
275 SplitEditor::SplitEditor(SplitAnalysis &sa,
278 MachineDominatorTree &mdt)
279 : SA(sa), LIS(lis), VRM(vrm),
280 MRI(vrm.getMachineFunction().getRegInfo()),
282 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
283 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
289 void SplitEditor::reset(LiveRangeEdit &lre) {
295 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
298 // We don't need an AliasAnalysis since we will only be performing
299 // cheap-as-a-copy remats anyway.
300 Edit->anyRematerializable(LIS, TII, 0);
303 void SplitEditor::dump() const {
304 if (RegAssign.empty()) {
305 dbgs() << " empty\n";
309 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
310 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
314 VNInfo *SplitEditor::defValue(unsigned RegIdx,
315 const VNInfo *ParentVNI,
317 assert(ParentVNI && "Mapping NULL value");
318 assert(Idx.isValid() && "Invalid SlotIndex");
319 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
320 LiveInterval *LI = Edit->get(RegIdx);
322 // Create a new value.
323 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
325 // Use insert for lookup, so we can add missing values with a second lookup.
326 std::pair<ValueMap::iterator, bool> InsP =
327 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
329 // This was the first time (RegIdx, ParentVNI) was mapped.
330 // Keep it as a simple def without any liveness.
334 // If the previous value was a simple mapping, add liveness for it now.
335 if (VNInfo *OldVNI = InsP.first->second) {
336 SlotIndex Def = OldVNI->def;
337 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
338 // No longer a simple mapping.
339 InsP.first->second = 0;
342 // This is a complex mapping, add liveness for VNI
343 SlotIndex Def = VNI->def;
344 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
349 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
350 assert(ParentVNI && "Mapping NULL value");
351 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
353 // ParentVNI was either unmapped or already complex mapped. Either way.
357 // This was previously a single mapping. Make sure the old def is represented
358 // by a trivial live range.
359 SlotIndex Def = VNI->def;
360 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
364 // extendRange - Extend the live range to reach Idx.
365 // Potentially create phi-def values.
366 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
367 assert(Idx.isValid() && "Invalid SlotIndex");
368 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
369 assert(IdxMBB && "No MBB at Idx");
370 LiveInterval *LI = Edit->get(RegIdx);
372 // Is there a def in the same MBB we can extend?
373 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
376 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
377 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
378 // Perform a search for all predecessor blocks where we know the dominating
380 VNInfo *VNI = findReachingDefs(LI, IdxMBB, Idx.getNextSlot());
382 // When there were multiple different values, we may need new PHIs.
386 // Poor man's SSA update for the single-value case.
387 LiveOutPair LOP(VNI, MDT[LIS.getMBBFromIndex(VNI->def)]);
388 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
389 E = LiveInBlocks.end(); I != E; ++I) {
390 MachineBasicBlock *MBB = I->DomNode->getBlock();
391 SlotIndex Start = LIS.getMBBStartIdx(MBB);
392 if (I->Kill.isValid())
393 LI->addRange(LiveRange(Start, I->Kill, VNI));
395 LiveOutCache[MBB] = LOP;
396 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
401 /// findReachingDefs - Search the CFG for known live-out values.
402 /// Add required live-in blocks to LiveInBlocks.
403 VNInfo *SplitEditor::findReachingDefs(LiveInterval *LI,
404 MachineBasicBlock *KillMBB,
406 // Initialize the live-out cache the first time it is needed.
407 if (LiveOutSeen.empty()) {
408 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
409 LiveOutSeen.resize(N);
410 LiveOutCache.resize(N);
413 // Blocks where LI should be live-in.
414 SmallVector<MachineBasicBlock*, 16> WorkList(1, KillMBB);
416 // Remember if we have seen more than one value.
417 bool UniqueVNI = true;
420 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
421 for (unsigned i = 0; i != WorkList.size(); ++i) {
422 MachineBasicBlock *MBB = WorkList[i];
423 assert(!MBB->pred_empty() && "Value live-in to entry block?");
424 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
425 PE = MBB->pred_end(); PI != PE; ++PI) {
426 MachineBasicBlock *Pred = *PI;
427 LiveOutPair &LOP = LiveOutCache[Pred];
429 // Is this a known live-out block?
430 if (LiveOutSeen.test(Pred->getNumber())) {
431 if (VNInfo *VNI = LOP.first) {
432 if (TheVNI && TheVNI != VNI)
439 // First time. LOP is garbage and must be cleared below.
440 LiveOutSeen.set(Pred->getNumber());
442 // Does Pred provide a live-out value?
443 SlotIndex Start, Last;
444 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
445 Last = Last.getPrevSlot();
446 VNInfo *VNI = LI->extendInBlock(Start, Last);
449 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
450 if (TheVNI && TheVNI != VNI)
457 // No, we need a live-in value for Pred as well
459 WorkList.push_back(Pred);
461 // Loopback to KillMBB, so value is really live through.
466 // Transfer WorkList to LiveInBlocks in reverse order.
467 // This ordering works best with updateSSA().
468 LiveInBlocks.clear();
469 LiveInBlocks.reserve(WorkList.size());
470 while(!WorkList.empty())
471 LiveInBlocks.push_back(MDT[WorkList.pop_back_val()]);
473 // The kill block may not be live-through.
474 assert(LiveInBlocks.back().DomNode->getBlock() == KillMBB);
475 LiveInBlocks.back().Kill = Kill;
477 return UniqueVNI ? TheVNI : 0;
480 void SplitEditor::updateSSA() {
481 // This is essentially the same iterative algorithm that SSAUpdater uses,
482 // except we already have a dominator tree, so we don't have to recompute it.
486 // Propagate live-out values down the dominator tree, inserting phi-defs
488 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
489 E = LiveInBlocks.end(); I != E; ++I) {
490 MachineDomTreeNode *Node = I->DomNode;
491 // Skip block if the live-in value has already been determined.
494 MachineBasicBlock *MBB = Node->getBlock();
495 MachineDomTreeNode *IDom = Node->getIDom();
496 LiveOutPair IDomValue;
498 // We need a live-in value to a block with no immediate dominator?
499 // This is probably an unreachable block that has survived somehow.
500 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
502 // IDom dominates all of our predecessors, but it may not be their
503 // immediate dominator. Check if any of them have live-out values that are
504 // properly dominated by IDom. If so, we need a phi-def here.
506 IDomValue = LiveOutCache[IDom->getBlock()];
507 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
508 PE = MBB->pred_end(); PI != PE; ++PI) {
509 LiveOutPair Value = LiveOutCache[*PI];
510 if (!Value.first || Value.first == IDomValue.first)
512 // This predecessor is carrying something other than IDomValue.
513 // It could be because IDomValue hasn't propagated yet, or it could be
514 // because MBB is in the dominance frontier of that value.
515 if (MDT.dominates(IDom, Value.second)) {
522 // The value may be live-through even if Kill is set, as can happen when
523 // we are called from extendRange. In that case LiveOutSeen is true, and
524 // LiveOutCache indicates a foreign or missing value.
525 LiveOutPair &LOP = LiveOutCache[MBB];
527 // Create a phi-def if required.
530 SlotIndex Start = LIS.getMBBStartIdx(MBB);
531 unsigned RegIdx = RegAssign.lookup(Start);
532 LiveInterval *LI = Edit->get(RegIdx);
533 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
534 VNI->setIsPHIDef(true);
536 // This block is done, we know the final value.
538 if (I->Kill.isValid())
539 LI->addRange(LiveRange(Start, I->Kill, VNI));
541 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
542 LOP = LiveOutPair(VNI, Node);
544 } else if (IDomValue.first) {
545 // No phi-def here. Remember incoming value.
546 I->Value = IDomValue.first;
547 if (I->Kill.isValid())
549 // Propagate IDomValue if needed:
550 // MBB is live-out and doesn't define its own value.
551 if (LOP.second != Node && LOP.first != IDomValue.first) {
559 // The values in LiveInBlocks are now accurate. No more phi-defs are needed
560 // for these blocks, so we can color the live ranges.
561 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
562 E = LiveInBlocks.end(); I != E; ++I) {
565 assert(I->Value && "No live-in value found");
566 MachineBasicBlock *MBB = I->DomNode->getBlock();
567 SlotIndex Start = LIS.getMBBStartIdx(MBB);
568 unsigned RegIdx = RegAssign.lookup(Start);
569 LiveInterval *LI = Edit->get(RegIdx);
570 LI->addRange(LiveRange(Start, I->Kill.isValid() ?
571 I->Kill : LIS.getMBBEndIdx(MBB), I->Value));
575 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
578 MachineBasicBlock &MBB,
579 MachineBasicBlock::iterator I) {
580 MachineInstr *CopyMI = 0;
582 LiveInterval *LI = Edit->get(RegIdx);
584 // We may be trying to avoid interference that ends at a deleted instruction,
585 // so always begin RegIdx 0 early and all others late.
586 bool Late = RegIdx != 0;
588 // Attempt cheap-as-a-copy rematerialization.
589 LiveRangeEdit::Remat RM(ParentVNI);
590 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
591 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
593 // Can't remat, just insert a copy from parent.
594 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
595 .addReg(Edit->getReg());
596 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
600 // Define the value in Reg.
601 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
602 VNI->setCopy(CopyMI);
606 /// Create a new virtual register and live interval.
607 unsigned SplitEditor::openIntv() {
608 // Create the complement as index 0.
610 Edit->create(LIS, VRM);
612 // Create the open interval.
613 OpenIdx = Edit->size();
614 Edit->create(LIS, VRM);
618 void SplitEditor::selectIntv(unsigned Idx) {
619 assert(Idx != 0 && "Cannot select the complement interval");
620 assert(Idx < Edit->size() && "Can only select previously opened interval");
624 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
625 assert(OpenIdx && "openIntv not called before enterIntvBefore");
626 DEBUG(dbgs() << " enterIntvBefore " << Idx);
627 Idx = Idx.getBaseIndex();
628 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
630 DEBUG(dbgs() << ": not live\n");
633 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
634 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
635 assert(MI && "enterIntvBefore called with invalid index");
637 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
641 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
642 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
643 SlotIndex End = LIS.getMBBEndIdx(&MBB);
644 SlotIndex Last = End.getPrevSlot();
645 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
646 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
648 DEBUG(dbgs() << ": not live\n");
651 DEBUG(dbgs() << ": valno " << ParentVNI->id);
652 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
653 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
654 RegAssign.insert(VNI->def, End, OpenIdx);
659 /// useIntv - indicate that all instructions in MBB should use OpenLI.
660 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
661 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
664 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
665 assert(OpenIdx && "openIntv not called before useIntv");
666 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
667 RegAssign.insert(Start, End, OpenIdx);
671 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
672 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
673 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
675 // The interval must be live beyond the instruction at Idx.
676 Idx = Idx.getBoundaryIndex();
677 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
679 DEBUG(dbgs() << ": not live\n");
680 return Idx.getNextSlot();
682 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
684 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
685 assert(MI && "No instruction at index");
686 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
687 llvm::next(MachineBasicBlock::iterator(MI)));
691 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
692 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
693 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
695 // The interval must be live into the instruction at Idx.
696 Idx = Idx.getBoundaryIndex();
697 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
699 DEBUG(dbgs() << ": not live\n");
700 return Idx.getNextSlot();
702 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
704 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
705 assert(MI && "No instruction at index");
706 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
710 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
711 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
712 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
713 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
715 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
717 DEBUG(dbgs() << ": not live\n");
721 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
722 MBB.SkipPHIsAndLabels(MBB.begin()));
723 RegAssign.insert(Start, VNI->def, OpenIdx);
728 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
729 assert(OpenIdx && "openIntv not called before overlapIntv");
730 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
731 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
732 "Parent changes value in extended range");
733 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
734 "Range cannot span basic blocks");
736 // The complement interval will be extended as needed by extendRange().
738 markComplexMapped(0, ParentVNI);
739 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
740 RegAssign.insert(Start, End, OpenIdx);
744 /// transferValues - Transfer all possible values to the new live ranges.
745 /// Values that were rematerialized are left alone, they need extendRange().
746 bool SplitEditor::transferValues() {
747 bool Skipped = false;
748 LiveInBlocks.clear();
749 RegAssignMap::const_iterator AssignI = RegAssign.begin();
750 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
751 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
752 DEBUG(dbgs() << " blit " << *ParentI << ':');
753 VNInfo *ParentVNI = ParentI->valno;
754 // RegAssign has holes where RegIdx 0 should be used.
755 SlotIndex Start = ParentI->start;
756 AssignI.advanceTo(Start);
759 SlotIndex End = ParentI->end;
760 if (!AssignI.valid()) {
762 } else if (AssignI.start() <= Start) {
763 RegIdx = AssignI.value();
764 if (AssignI.stop() < End) {
765 End = AssignI.stop();
770 End = std::min(End, AssignI.start());
773 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
774 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
775 LiveInterval *LI = Edit->get(RegIdx);
777 // Check for a simply defined value that can be blitted directly.
778 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
779 DEBUG(dbgs() << ':' << VNI->id);
780 LI->addRange(LiveRange(Start, End, VNI));
785 // Skip rematerialized values, we need to use extendRange() and
786 // extendPHIKillRanges() to completely recompute the live ranges.
787 if (Edit->didRematerialize(ParentVNI)) {
788 DEBUG(dbgs() << "(remat)");
794 // Initialize the live-out cache the first time it is needed.
795 if (LiveOutSeen.empty()) {
796 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
797 LiveOutSeen.resize(N);
798 LiveOutCache.resize(N);
801 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
802 // so the live range is accurate. Add live-in blocks in [Start;End) to the
804 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
805 SlotIndex BlockStart, BlockEnd;
806 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
808 // The first block may be live-in, or it may have its own def.
809 if (Start != BlockStart) {
810 VNInfo *VNI = LI->extendInBlock(BlockStart,
811 std::min(BlockEnd, End).getPrevSlot());
812 assert(VNI && "Missing def for complex mapped value");
813 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
814 // MBB has its own def. Is it also live-out?
815 if (BlockEnd <= End) {
816 LiveOutSeen.set(MBB->getNumber());
817 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
819 // Skip to the next block for live-in.
821 BlockStart = BlockEnd;
824 // Handle the live-in blocks covered by [Start;End).
825 assert(Start <= BlockStart && "Expected live-in block");
826 while (BlockStart < End) {
827 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
828 BlockEnd = LIS.getMBBEndIdx(MBB);
829 if (BlockStart == ParentVNI->def) {
830 // This block has the def of a parent PHI, so it isn't live-in.
831 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
832 VNInfo *VNI = LI->extendInBlock(BlockStart,
833 std::min(BlockEnd, End).getPrevSlot());
834 assert(VNI && "Missing def for complex mapped parent PHI");
835 if (End >= BlockEnd) {
837 LiveOutSeen.set(MBB->getNumber());
838 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
841 // This block needs a live-in value.
842 LiveInBlocks.push_back(MDT[MBB]);
843 // The last block covered may not be live-out.
845 LiveInBlocks.back().Kill = End;
847 // Live-out, but we need updateSSA to tell us the value.
848 LiveOutSeen.set(MBB->getNumber());
849 LiveOutCache[MBB] = LiveOutPair((VNInfo*)0,
850 (MachineDomTreeNode*)0);
853 BlockStart = BlockEnd;
857 } while (Start != ParentI->end);
858 DEBUG(dbgs() << '\n');
861 if (!LiveInBlocks.empty())
867 void SplitEditor::extendPHIKillRanges() {
868 // Extend live ranges to be live-out for successor PHI values.
869 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
870 E = Edit->getParent().vni_end(); I != E; ++I) {
871 const VNInfo *PHIVNI = *I;
872 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
874 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
875 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
876 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
877 PE = MBB->pred_end(); PI != PE; ++PI) {
878 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
879 // The predecessor may not have a live-out value. That is OK, like an
880 // undef PHI operand.
881 if (Edit->getParent().liveAt(End)) {
882 assert(RegAssign.lookup(End) == RegIdx &&
883 "Different register assignment in phi predecessor");
884 extendRange(RegIdx, End);
890 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
891 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
892 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
893 RE = MRI.reg_end(); RI != RE;) {
894 MachineOperand &MO = RI.getOperand();
895 MachineInstr *MI = MO.getParent();
897 // LiveDebugVariables should have handled all DBG_VALUE instructions.
898 if (MI->isDebugValue()) {
899 DEBUG(dbgs() << "Zapping " << *MI);
904 // <undef> operands don't really read the register, so just assign them to
906 if (MO.isUse() && MO.isUndef()) {
907 MO.setReg(Edit->get(0)->reg);
911 SlotIndex Idx = LIS.getInstructionIndex(MI);
913 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
915 // Rewrite to the mapped register at Idx.
916 unsigned RegIdx = RegAssign.lookup(Idx);
917 MO.setReg(Edit->get(RegIdx)->reg);
918 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
919 << Idx << ':' << RegIdx << '\t' << *MI);
921 // Extend liveness to Idx if the instruction reads reg.
925 // Skip instructions that don't read Reg.
927 if (!MO.getSubReg() && !MO.isEarlyClobber())
929 // We may wan't to extend a live range for a partial redef, or for a use
930 // tied to an early clobber.
931 Idx = Idx.getPrevSlot();
932 if (!Edit->getParent().liveAt(Idx))
935 Idx = Idx.getUseIndex();
937 extendRange(RegIdx, Idx);
941 void SplitEditor::deleteRematVictims() {
942 SmallVector<MachineInstr*, 8> Dead;
943 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
944 LiveInterval *LI = *I;
945 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
947 // Dead defs end at the store slot.
948 if (LII->end != LII->valno->def.getNextSlot())
950 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
951 assert(MI && "Missing instruction for dead def");
952 MI->addRegisterDead(LI->reg, &TRI);
954 if (!MI->allDefsAreDead())
957 DEBUG(dbgs() << "All defs dead: " << *MI);
965 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
968 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
971 // At this point, the live intervals in Edit contain VNInfos corresponding to
972 // the inserted copies.
974 // Add the original defs from the parent interval.
975 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
976 E = Edit->getParent().vni_end(); I != E; ++I) {
977 const VNInfo *ParentVNI = *I;
978 if (ParentVNI->isUnused())
980 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
981 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
982 VNI->setIsPHIDef(ParentVNI->isPHIDef());
983 VNI->setCopy(ParentVNI->getCopy());
985 // Mark rematted values as complex everywhere to force liveness computation.
986 // The new live ranges may be truncated.
987 if (Edit->didRematerialize(ParentVNI))
988 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
989 markComplexMapped(i, ParentVNI);
993 // Every new interval must have a def by now, otherwise the split is bogus.
994 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
995 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
998 // Transfer the simply mapped values, check if any are skipped.
999 bool Skipped = transferValues();
1001 extendPHIKillRanges();
1005 // Rewrite virtual registers, possibly extending ranges.
1006 rewriteAssigned(Skipped);
1008 // Delete defs that were rematted everywhere.
1010 deleteRematVictims();
1012 // Get rid of unused values and set phi-kill flags.
1013 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1014 (*I)->RenumberValues(LIS);
1016 // Provide a reverse mapping from original indices to Edit ranges.
1019 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1020 LRMap->push_back(i);
1023 // Now check if any registers were separated into multiple components.
1024 ConnectedVNInfoEqClasses ConEQ(LIS);
1025 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1026 // Don't use iterators, they are invalidated by create() below.
1027 LiveInterval *li = Edit->get(i);
1028 unsigned NumComp = ConEQ.Classify(li);
1031 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1032 SmallVector<LiveInterval*, 8> dups;
1034 for (unsigned j = 1; j != NumComp; ++j)
1035 dups.push_back(&Edit->create(LIS, VRM));
1036 ConEQ.Distribute(&dups[0], MRI);
1037 // The new intervals all map back to i.
1039 LRMap->resize(Edit->size(), i);
1042 // Calculate spill weight and allocation hints for new intervals.
1043 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1045 assert(!LRMap || LRMap->size() == Edit->size());
1049 //===----------------------------------------------------------------------===//
1050 // Single Block Splitting
1051 //===----------------------------------------------------------------------===//
1053 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1054 /// may be an advantage to split CurLI for the duration of the block.
1055 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1056 // If CurLI is local to one block, there is no point to splitting it.
1057 if (UseBlocks.size() <= 1)
1059 // Add blocks with multiple uses.
1060 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
1061 const BlockInfo &BI = UseBlocks[i];
1062 if (BI.FirstUse == BI.LastUse)
1064 Blocks.insert(BI.MBB);
1066 return !Blocks.empty();
1069 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1071 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1072 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
1074 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
1075 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
1077 // The last use is after the last valid split point.
1078 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1079 useIntv(SegStart, SegStop);
1080 overlapIntv(SegStop, BI.LastUse);
1084 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1085 /// basic block in Blocks.
1086 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1087 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1088 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
1089 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
1090 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
1091 if (Blocks.count(BI.MBB))
1092 splitSingleBlock(BI);