1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
33 STATISTIC(NumCopies, "Number of copies inserted for splitting");
34 STATISTIC(NumRemats, "Number of rematerialized defs for splitting");
35 STATISTIC(NumRepairs, "Number of invalid live ranges repaired");
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
41 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
42 const LiveIntervals &lis,
43 const MachineLoopInfo &mli)
44 : MF(vrm.getMachineFunction()),
48 TII(*MF.getTarget().getInstrInfo()),
50 LastSplitPoint(MF.getNumBlockIDs()) {}
52 void SplitAnalysis::clear() {
55 ThroughBlocks.clear();
57 DidRepairRange = false;
60 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
61 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
62 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
63 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
65 // Compute split points on the first call. The pair is independent of the
66 // current live interval.
67 if (!LSP.first.isValid()) {
68 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
69 if (FirstTerm == MBB->end())
70 LSP.first = LIS.getMBBEndIdx(MBB);
72 LSP.first = LIS.getInstructionIndex(FirstTerm);
74 // If there is a landing pad successor, also find the call instruction.
77 // There may not be a call instruction (?) in which case we ignore LPad.
78 LSP.second = LSP.first;
79 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
81 if (I->getDesc().isCall()) {
82 LSP.second = LIS.getInstructionIndex(I);
87 // If CurLI is live into a landing pad successor, move the last split point
88 // back to the call that may throw.
89 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
95 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
96 void SplitAnalysis::analyzeUses() {
97 assert(UseSlots.empty() && "Call clear first");
99 // First get all the defs from the interval values. This provides the correct
100 // slots for early clobbers.
101 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
102 E = CurLI->vni_end(); I != E; ++I)
103 if (!(*I)->isPHIDef() && !(*I)->isUnused())
104 UseSlots.push_back((*I)->def);
106 // Get use slots form the use-def chain.
107 const MachineRegisterInfo &MRI = MF.getRegInfo();
108 for (MachineRegisterInfo::use_nodbg_iterator
109 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
111 if (!I.getOperand().isUndef())
112 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
114 array_pod_sort(UseSlots.begin(), UseSlots.end());
116 // Remove duplicates, keeping the smaller slot for each instruction.
117 // That is what we want for early clobbers.
118 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
119 SlotIndex::isSameInstr),
122 // Compute per-live block info.
123 if (!calcLiveBlockInfo()) {
124 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
125 // I am looking at you, SimpleRegisterCoalescing!
126 DidRepairRange = true;
128 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
129 const_cast<LiveIntervals&>(LIS)
130 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
132 ThroughBlocks.clear();
133 bool fixed = calcLiveBlockInfo();
135 assert(fixed && "Couldn't fix broken live interval");
138 DEBUG(dbgs() << "Analyze counted "
139 << UseSlots.size() << " instrs in "
140 << UseBlocks.size() << " blocks, through "
141 << NumThroughBlocks << " blocks.\n");
144 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
145 /// where CurLI is live.
146 bool SplitAnalysis::calcLiveBlockInfo() {
147 ThroughBlocks.resize(MF.getNumBlockIDs());
148 NumThroughBlocks = NumGapBlocks = 0;
152 LiveInterval::const_iterator LVI = CurLI->begin();
153 LiveInterval::const_iterator LVE = CurLI->end();
155 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
156 UseI = UseSlots.begin();
157 UseE = UseSlots.end();
159 // Loop over basic blocks where CurLI is live.
160 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
164 SlotIndex Start, Stop;
165 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
167 // If the block contains no uses, the range must be live through. At one
168 // point, SimpleRegisterCoalescing could create dangling ranges that ended
170 if (UseI == UseE || *UseI >= Stop) {
172 ThroughBlocks.set(BI.MBB->getNumber());
173 // The range shouldn't end mid-block if there are no uses. This shouldn't
178 // This block has uses. Find the first and last uses in the block.
180 assert(BI.FirstUse >= Start);
182 while (UseI != UseE && *UseI < Stop);
183 BI.LastUse = UseI[-1];
184 assert(BI.LastUse < Stop);
186 // LVI is the first live segment overlapping MBB.
187 BI.LiveIn = LVI->start <= Start;
189 // Look for gaps in the live range.
191 while (LVI->end < Stop) {
192 SlotIndex LastStop = LVI->end;
193 if (++LVI == LVE || LVI->start >= Stop) {
197 if (LastStop < LVI->start) {
198 // There is a gap in the live range. Create duplicate entries for the
199 // live-in snippet and the live-out snippet.
202 // Push the Live-in part.
203 BI.LiveThrough = false;
205 UseBlocks.push_back(BI);
206 UseBlocks.back().LastUse = LastStop;
208 // Set up BI for the live-out part.
211 BI.FirstUse = LVI->start;
215 // Don't set LiveThrough when the block has a gap.
216 BI.LiveThrough = BI.LiveIn && BI.LiveOut;
217 UseBlocks.push_back(BI);
219 // LVI is now at LVE or LVI->end >= Stop.
224 // Live segment ends exactly at Stop. Move to the next segment.
225 if (LVI->end == Stop && ++LVI == LVE)
228 // Pick the next basic block.
229 if (LVI->start < Stop)
232 MFI = LIS.getMBBFromIndex(LVI->start);
235 assert(getNumLiveBlocks() == countLiveBlocks(CurLI) && "Bad block count");
239 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
242 LiveInterval *li = const_cast<LiveInterval*>(cli);
243 LiveInterval::iterator LVI = li->begin();
244 LiveInterval::iterator LVE = li->end();
247 // Loop over basic blocks where li is live.
248 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
249 SlotIndex Stop = LIS.getMBBEndIdx(MFI);
252 LVI = li->advanceTo(LVI, Stop);
257 Stop = LIS.getMBBEndIdx(MFI);
258 } while (Stop <= LVI->start);
262 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
263 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
264 const LiveInterval &Orig = LIS.getInterval(OrigReg);
265 assert(!Orig.empty() && "Splitting empty interval?");
266 LiveInterval::const_iterator I = Orig.find(Idx);
268 // Range containing Idx should begin at Idx.
269 if (I != Orig.end() && I->start <= Idx)
270 return I->start == Idx;
272 // Range does not contain Idx, previous must end at Idx.
273 return I != Orig.begin() && (--I)->end == Idx;
276 void SplitAnalysis::analyze(const LiveInterval *li) {
283 //===----------------------------------------------------------------------===//
285 //===----------------------------------------------------------------------===//
287 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
288 SplitEditor::SplitEditor(SplitAnalysis &sa,
291 MachineDominatorTree &mdt)
292 : SA(sa), LIS(lis), VRM(vrm),
293 MRI(vrm.getMachineFunction().getRegInfo()),
295 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
296 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
302 void SplitEditor::reset(LiveRangeEdit &lre) {
308 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
311 // We don't need an AliasAnalysis since we will only be performing
312 // cheap-as-a-copy remats anyway.
313 Edit->anyRematerializable(LIS, TII, 0);
316 void SplitEditor::dump() const {
317 if (RegAssign.empty()) {
318 dbgs() << " empty\n";
322 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
323 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
327 VNInfo *SplitEditor::defValue(unsigned RegIdx,
328 const VNInfo *ParentVNI,
330 assert(ParentVNI && "Mapping NULL value");
331 assert(Idx.isValid() && "Invalid SlotIndex");
332 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
333 LiveInterval *LI = Edit->get(RegIdx);
335 // Create a new value.
336 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
338 // Use insert for lookup, so we can add missing values with a second lookup.
339 std::pair<ValueMap::iterator, bool> InsP =
340 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
342 // This was the first time (RegIdx, ParentVNI) was mapped.
343 // Keep it as a simple def without any liveness.
347 // If the previous value was a simple mapping, add liveness for it now.
348 if (VNInfo *OldVNI = InsP.first->second) {
349 SlotIndex Def = OldVNI->def;
350 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
351 // No longer a simple mapping.
352 InsP.first->second = 0;
355 // This is a complex mapping, add liveness for VNI
356 SlotIndex Def = VNI->def;
357 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
362 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
363 assert(ParentVNI && "Mapping NULL value");
364 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
366 // ParentVNI was either unmapped or already complex mapped. Either way.
370 // This was previously a single mapping. Make sure the old def is represented
371 // by a trivial live range.
372 SlotIndex Def = VNI->def;
373 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
377 // extendRange - Extend the live range to reach Idx.
378 // Potentially create phi-def values.
379 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
380 assert(Idx.isValid() && "Invalid SlotIndex");
381 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
382 assert(IdxMBB && "No MBB at Idx");
383 LiveInterval *LI = Edit->get(RegIdx);
385 // Is there a def in the same MBB we can extend?
386 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
389 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
390 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
391 // Perform a search for all predecessor blocks where we know the dominating
393 VNInfo *VNI = findReachingDefs(LI, IdxMBB, Idx.getNextSlot());
395 // When there were multiple different values, we may need new PHIs.
399 // Poor man's SSA update for the single-value case.
400 LiveOutPair LOP(VNI, MDT[LIS.getMBBFromIndex(VNI->def)]);
401 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
402 E = LiveInBlocks.end(); I != E; ++I) {
403 MachineBasicBlock *MBB = I->DomNode->getBlock();
404 SlotIndex Start = LIS.getMBBStartIdx(MBB);
405 if (I->Kill.isValid())
406 LI->addRange(LiveRange(Start, I->Kill, VNI));
408 LiveOutCache[MBB] = LOP;
409 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
414 /// findReachingDefs - Search the CFG for known live-out values.
415 /// Add required live-in blocks to LiveInBlocks.
416 VNInfo *SplitEditor::findReachingDefs(LiveInterval *LI,
417 MachineBasicBlock *KillMBB,
419 // Initialize the live-out cache the first time it is needed.
420 if (LiveOutSeen.empty()) {
421 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
422 LiveOutSeen.resize(N);
423 LiveOutCache.resize(N);
426 // Blocks where LI should be live-in.
427 SmallVector<MachineBasicBlock*, 16> WorkList(1, KillMBB);
429 // Remember if we have seen more than one value.
430 bool UniqueVNI = true;
433 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
434 for (unsigned i = 0; i != WorkList.size(); ++i) {
435 MachineBasicBlock *MBB = WorkList[i];
436 assert(!MBB->pred_empty() && "Value live-in to entry block?");
437 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
438 PE = MBB->pred_end(); PI != PE; ++PI) {
439 MachineBasicBlock *Pred = *PI;
440 LiveOutPair &LOP = LiveOutCache[Pred];
442 // Is this a known live-out block?
443 if (LiveOutSeen.test(Pred->getNumber())) {
444 if (VNInfo *VNI = LOP.first) {
445 if (TheVNI && TheVNI != VNI)
452 // First time. LOP is garbage and must be cleared below.
453 LiveOutSeen.set(Pred->getNumber());
455 // Does Pred provide a live-out value?
456 SlotIndex Start, Last;
457 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
458 Last = Last.getPrevSlot();
459 VNInfo *VNI = LI->extendInBlock(Start, Last);
462 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
463 if (TheVNI && TheVNI != VNI)
470 // No, we need a live-in value for Pred as well
472 WorkList.push_back(Pred);
474 // Loopback to KillMBB, so value is really live through.
479 // Transfer WorkList to LiveInBlocks in reverse order.
480 // This ordering works best with updateSSA().
481 LiveInBlocks.clear();
482 LiveInBlocks.reserve(WorkList.size());
483 while(!WorkList.empty())
484 LiveInBlocks.push_back(MDT[WorkList.pop_back_val()]);
486 // The kill block may not be live-through.
487 assert(LiveInBlocks.back().DomNode->getBlock() == KillMBB);
488 LiveInBlocks.back().Kill = Kill;
490 return UniqueVNI ? TheVNI : 0;
493 void SplitEditor::updateSSA() {
494 // This is essentially the same iterative algorithm that SSAUpdater uses,
495 // except we already have a dominator tree, so we don't have to recompute it.
499 // Propagate live-out values down the dominator tree, inserting phi-defs
501 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
502 E = LiveInBlocks.end(); I != E; ++I) {
503 MachineDomTreeNode *Node = I->DomNode;
504 // Skip block if the live-in value has already been determined.
507 MachineBasicBlock *MBB = Node->getBlock();
508 MachineDomTreeNode *IDom = Node->getIDom();
509 LiveOutPair IDomValue;
511 // We need a live-in value to a block with no immediate dominator?
512 // This is probably an unreachable block that has survived somehow.
513 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
515 // IDom dominates all of our predecessors, but it may not be their
516 // immediate dominator. Check if any of them have live-out values that are
517 // properly dominated by IDom. If so, we need a phi-def here.
519 IDomValue = LiveOutCache[IDom->getBlock()];
520 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
521 PE = MBB->pred_end(); PI != PE; ++PI) {
522 LiveOutPair Value = LiveOutCache[*PI];
523 if (!Value.first || Value.first == IDomValue.first)
525 // This predecessor is carrying something other than IDomValue.
526 // It could be because IDomValue hasn't propagated yet, or it could be
527 // because MBB is in the dominance frontier of that value.
528 if (MDT.dominates(IDom, Value.second)) {
535 // The value may be live-through even if Kill is set, as can happen when
536 // we are called from extendRange. In that case LiveOutSeen is true, and
537 // LiveOutCache indicates a foreign or missing value.
538 LiveOutPair &LOP = LiveOutCache[MBB];
540 // Create a phi-def if required.
543 SlotIndex Start = LIS.getMBBStartIdx(MBB);
544 unsigned RegIdx = RegAssign.lookup(Start);
545 LiveInterval *LI = Edit->get(RegIdx);
546 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
547 VNI->setIsPHIDef(true);
549 // This block is done, we know the final value.
551 if (I->Kill.isValid())
552 LI->addRange(LiveRange(Start, I->Kill, VNI));
554 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
555 LOP = LiveOutPair(VNI, Node);
557 } else if (IDomValue.first) {
558 // No phi-def here. Remember incoming value.
559 I->Value = IDomValue.first;
560 if (I->Kill.isValid())
562 // Propagate IDomValue if needed:
563 // MBB is live-out and doesn't define its own value.
564 if (LOP.second != Node && LOP.first != IDomValue.first) {
572 // The values in LiveInBlocks are now accurate. No more phi-defs are needed
573 // for these blocks, so we can color the live ranges.
574 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
575 E = LiveInBlocks.end(); I != E; ++I) {
578 assert(I->Value && "No live-in value found");
579 MachineBasicBlock *MBB = I->DomNode->getBlock();
580 SlotIndex Start = LIS.getMBBStartIdx(MBB);
581 unsigned RegIdx = RegAssign.lookup(Start);
582 LiveInterval *LI = Edit->get(RegIdx);
583 LI->addRange(LiveRange(Start, I->Kill.isValid() ?
584 I->Kill : LIS.getMBBEndIdx(MBB), I->Value));
588 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
591 MachineBasicBlock &MBB,
592 MachineBasicBlock::iterator I) {
593 MachineInstr *CopyMI = 0;
595 LiveInterval *LI = Edit->get(RegIdx);
597 // We may be trying to avoid interference that ends at a deleted instruction,
598 // so always begin RegIdx 0 early and all others late.
599 bool Late = RegIdx != 0;
601 // Attempt cheap-as-a-copy rematerialization.
602 LiveRangeEdit::Remat RM(ParentVNI);
603 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
604 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
607 // Can't remat, just insert a copy from parent.
608 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
609 .addReg(Edit->getReg());
610 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
615 // Define the value in Reg.
616 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
617 VNI->setCopy(CopyMI);
621 /// Create a new virtual register and live interval.
622 unsigned SplitEditor::openIntv() {
623 // Create the complement as index 0.
625 Edit->create(LIS, VRM);
627 // Create the open interval.
628 OpenIdx = Edit->size();
629 Edit->create(LIS, VRM);
633 void SplitEditor::selectIntv(unsigned Idx) {
634 assert(Idx != 0 && "Cannot select the complement interval");
635 assert(Idx < Edit->size() && "Can only select previously opened interval");
639 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
640 assert(OpenIdx && "openIntv not called before enterIntvBefore");
641 DEBUG(dbgs() << " enterIntvBefore " << Idx);
642 Idx = Idx.getBaseIndex();
643 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
645 DEBUG(dbgs() << ": not live\n");
648 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
649 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
650 assert(MI && "enterIntvBefore called with invalid index");
652 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
656 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
657 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
658 SlotIndex End = LIS.getMBBEndIdx(&MBB);
659 SlotIndex Last = End.getPrevSlot();
660 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
661 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
663 DEBUG(dbgs() << ": not live\n");
666 DEBUG(dbgs() << ": valno " << ParentVNI->id);
667 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
668 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
669 RegAssign.insert(VNI->def, End, OpenIdx);
674 /// useIntv - indicate that all instructions in MBB should use OpenLI.
675 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
676 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
679 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
680 assert(OpenIdx && "openIntv not called before useIntv");
681 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
682 RegAssign.insert(Start, End, OpenIdx);
686 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
687 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
688 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
690 // The interval must be live beyond the instruction at Idx.
691 Idx = Idx.getBoundaryIndex();
692 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
694 DEBUG(dbgs() << ": not live\n");
695 return Idx.getNextSlot();
697 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
699 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
700 assert(MI && "No instruction at index");
701 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
702 llvm::next(MachineBasicBlock::iterator(MI)));
706 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
707 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
708 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
710 // The interval must be live into the instruction at Idx.
711 Idx = Idx.getBoundaryIndex();
712 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
714 DEBUG(dbgs() << ": not live\n");
715 return Idx.getNextSlot();
717 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
719 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
720 assert(MI && "No instruction at index");
721 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
725 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
726 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
727 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
728 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
730 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
732 DEBUG(dbgs() << ": not live\n");
736 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
737 MBB.SkipPHIsAndLabels(MBB.begin()));
738 RegAssign.insert(Start, VNI->def, OpenIdx);
743 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
744 assert(OpenIdx && "openIntv not called before overlapIntv");
745 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
746 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
747 "Parent changes value in extended range");
748 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
749 "Range cannot span basic blocks");
751 // The complement interval will be extended as needed by extendRange().
753 markComplexMapped(0, ParentVNI);
754 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
755 RegAssign.insert(Start, End, OpenIdx);
759 /// transferValues - Transfer all possible values to the new live ranges.
760 /// Values that were rematerialized are left alone, they need extendRange().
761 bool SplitEditor::transferValues() {
762 bool Skipped = false;
763 LiveInBlocks.clear();
764 RegAssignMap::const_iterator AssignI = RegAssign.begin();
765 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
766 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
767 DEBUG(dbgs() << " blit " << *ParentI << ':');
768 VNInfo *ParentVNI = ParentI->valno;
769 // RegAssign has holes where RegIdx 0 should be used.
770 SlotIndex Start = ParentI->start;
771 AssignI.advanceTo(Start);
774 SlotIndex End = ParentI->end;
775 if (!AssignI.valid()) {
777 } else if (AssignI.start() <= Start) {
778 RegIdx = AssignI.value();
779 if (AssignI.stop() < End) {
780 End = AssignI.stop();
785 End = std::min(End, AssignI.start());
788 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
789 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
790 LiveInterval *LI = Edit->get(RegIdx);
792 // Check for a simply defined value that can be blitted directly.
793 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
794 DEBUG(dbgs() << ':' << VNI->id);
795 LI->addRange(LiveRange(Start, End, VNI));
800 // Skip rematerialized values, we need to use extendRange() and
801 // extendPHIKillRanges() to completely recompute the live ranges.
802 if (Edit->didRematerialize(ParentVNI)) {
803 DEBUG(dbgs() << "(remat)");
809 // Initialize the live-out cache the first time it is needed.
810 if (LiveOutSeen.empty()) {
811 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
812 LiveOutSeen.resize(N);
813 LiveOutCache.resize(N);
816 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
817 // so the live range is accurate. Add live-in blocks in [Start;End) to the
819 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
820 SlotIndex BlockStart, BlockEnd;
821 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
823 // The first block may be live-in, or it may have its own def.
824 if (Start != BlockStart) {
825 VNInfo *VNI = LI->extendInBlock(BlockStart,
826 std::min(BlockEnd, End).getPrevSlot());
827 assert(VNI && "Missing def for complex mapped value");
828 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
829 // MBB has its own def. Is it also live-out?
830 if (BlockEnd <= End) {
831 LiveOutSeen.set(MBB->getNumber());
832 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
834 // Skip to the next block for live-in.
836 BlockStart = BlockEnd;
839 // Handle the live-in blocks covered by [Start;End).
840 assert(Start <= BlockStart && "Expected live-in block");
841 while (BlockStart < End) {
842 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
843 BlockEnd = LIS.getMBBEndIdx(MBB);
844 if (BlockStart == ParentVNI->def) {
845 // This block has the def of a parent PHI, so it isn't live-in.
846 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
847 VNInfo *VNI = LI->extendInBlock(BlockStart,
848 std::min(BlockEnd, End).getPrevSlot());
849 assert(VNI && "Missing def for complex mapped parent PHI");
850 if (End >= BlockEnd) {
852 LiveOutSeen.set(MBB->getNumber());
853 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
856 // This block needs a live-in value.
857 LiveInBlocks.push_back(MDT[MBB]);
858 // The last block covered may not be live-out.
860 LiveInBlocks.back().Kill = End;
862 // Live-out, but we need updateSSA to tell us the value.
863 LiveOutSeen.set(MBB->getNumber());
864 LiveOutCache[MBB] = LiveOutPair((VNInfo*)0,
865 (MachineDomTreeNode*)0);
868 BlockStart = BlockEnd;
872 } while (Start != ParentI->end);
873 DEBUG(dbgs() << '\n');
876 if (!LiveInBlocks.empty())
882 void SplitEditor::extendPHIKillRanges() {
883 // Extend live ranges to be live-out for successor PHI values.
884 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
885 E = Edit->getParent().vni_end(); I != E; ++I) {
886 const VNInfo *PHIVNI = *I;
887 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
889 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
890 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
891 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
892 PE = MBB->pred_end(); PI != PE; ++PI) {
893 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
894 // The predecessor may not have a live-out value. That is OK, like an
895 // undef PHI operand.
896 if (Edit->getParent().liveAt(End)) {
897 assert(RegAssign.lookup(End) == RegIdx &&
898 "Different register assignment in phi predecessor");
899 extendRange(RegIdx, End);
905 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
906 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
907 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
908 RE = MRI.reg_end(); RI != RE;) {
909 MachineOperand &MO = RI.getOperand();
910 MachineInstr *MI = MO.getParent();
912 // LiveDebugVariables should have handled all DBG_VALUE instructions.
913 if (MI->isDebugValue()) {
914 DEBUG(dbgs() << "Zapping " << *MI);
919 // <undef> operands don't really read the register, so just assign them to
921 if (MO.isUse() && MO.isUndef()) {
922 MO.setReg(Edit->get(0)->reg);
926 SlotIndex Idx = LIS.getInstructionIndex(MI);
928 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
930 // Rewrite to the mapped register at Idx.
931 unsigned RegIdx = RegAssign.lookup(Idx);
932 MO.setReg(Edit->get(RegIdx)->reg);
933 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
934 << Idx << ':' << RegIdx << '\t' << *MI);
936 // Extend liveness to Idx if the instruction reads reg.
940 // Skip instructions that don't read Reg.
942 if (!MO.getSubReg() && !MO.isEarlyClobber())
944 // We may wan't to extend a live range for a partial redef, or for a use
945 // tied to an early clobber.
946 Idx = Idx.getPrevSlot();
947 if (!Edit->getParent().liveAt(Idx))
950 Idx = Idx.getUseIndex();
952 extendRange(RegIdx, Idx);
956 void SplitEditor::deleteRematVictims() {
957 SmallVector<MachineInstr*, 8> Dead;
958 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
959 LiveInterval *LI = *I;
960 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
962 // Dead defs end at the store slot.
963 if (LII->end != LII->valno->def.getNextSlot())
965 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
966 assert(MI && "Missing instruction for dead def");
967 MI->addRegisterDead(LI->reg, &TRI);
969 if (!MI->allDefsAreDead())
972 DEBUG(dbgs() << "All defs dead: " << *MI);
980 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
983 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
986 // At this point, the live intervals in Edit contain VNInfos corresponding to
987 // the inserted copies.
989 // Add the original defs from the parent interval.
990 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
991 E = Edit->getParent().vni_end(); I != E; ++I) {
992 const VNInfo *ParentVNI = *I;
993 if (ParentVNI->isUnused())
995 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
996 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
997 VNI->setIsPHIDef(ParentVNI->isPHIDef());
998 VNI->setCopy(ParentVNI->getCopy());
1000 // Mark rematted values as complex everywhere to force liveness computation.
1001 // The new live ranges may be truncated.
1002 if (Edit->didRematerialize(ParentVNI))
1003 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1004 markComplexMapped(i, ParentVNI);
1008 // Every new interval must have a def by now, otherwise the split is bogus.
1009 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1010 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
1013 // Transfer the simply mapped values, check if any are skipped.
1014 bool Skipped = transferValues();
1016 extendPHIKillRanges();
1020 // Rewrite virtual registers, possibly extending ranges.
1021 rewriteAssigned(Skipped);
1023 // Delete defs that were rematted everywhere.
1025 deleteRematVictims();
1027 // Get rid of unused values and set phi-kill flags.
1028 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1029 (*I)->RenumberValues(LIS);
1031 // Provide a reverse mapping from original indices to Edit ranges.
1034 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1035 LRMap->push_back(i);
1038 // Now check if any registers were separated into multiple components.
1039 ConnectedVNInfoEqClasses ConEQ(LIS);
1040 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1041 // Don't use iterators, they are invalidated by create() below.
1042 LiveInterval *li = Edit->get(i);
1043 unsigned NumComp = ConEQ.Classify(li);
1046 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1047 SmallVector<LiveInterval*, 8> dups;
1049 for (unsigned j = 1; j != NumComp; ++j)
1050 dups.push_back(&Edit->create(LIS, VRM));
1051 ConEQ.Distribute(&dups[0], MRI);
1052 // The new intervals all map back to i.
1054 LRMap->resize(Edit->size(), i);
1057 // Calculate spill weight and allocation hints for new intervals.
1058 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1060 assert(!LRMap || LRMap->size() == Edit->size());
1064 //===----------------------------------------------------------------------===//
1065 // Single Block Splitting
1066 //===----------------------------------------------------------------------===//
1068 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1069 /// may be an advantage to split CurLI for the duration of the block.
1070 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1071 // If CurLI is local to one block, there is no point to splitting it.
1072 if (UseBlocks.size() <= 1)
1074 // Add blocks with multiple uses.
1075 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
1076 const BlockInfo &BI = UseBlocks[i];
1077 if (BI.FirstUse == BI.LastUse)
1079 Blocks.insert(BI.MBB);
1081 return !Blocks.empty();
1084 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1086 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1087 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
1089 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
1090 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
1092 // The last use is after the last valid split point.
1093 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1094 useIntv(SegStart, SegStop);
1095 overlapIntv(SegStop, BI.LastUse);
1099 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1100 /// basic block in Blocks.
1101 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1102 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1103 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
1104 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
1105 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
1106 if (Blocks.count(BI.MBB))
1107 splitSingleBlock(BI);